AXI Interconnect AXI4 Memory-Mapped Interconnect AXI Interconnect AXI4 Memory-Mapped Interconnect MicroBlaze The MicroBlaze 32 bit soft processor Local Memory Bus (LMB) 1.0 'The LMB is a fast, local bus for connecting MicroBlaze I and D ports to peripherals and BRAM' Local Memory Bus (LMB) 1.0 'The LMB is a fast, local bus for connecting MicroBlaze I and D ports to peripherals and BRAM' LMB BRAM Controller Local Memory Bus (LMB) Block RAM (BRAM) Interface Controller connects to an lmb bus LMB BRAM Controller Local Memory Bus (LMB) Block RAM (BRAM) Interface Controller connects to an lmb bus Block RAM (BRAM) Block The BRAM Block is a configurable memory module that attaches to a variety of BRAM Interface Controllers. Processor System Reset Module Reset management module Clock Generator Clock generator for processor system. MicroBlaze Debug Module (MDM) Debug module for MicroBlaze Soft Processor. AXI UART (Lite) Generic UART (Universal Asynchronous Receiver/Transmitter) for AXI. Serial Data Out Serial Data In AXI General Purpose IO General Purpose Input/Output (GPIO) core for the AXI bus. GPIO1 Data IO GPIO2 Data IO AXI General Purpose IO General Purpose Input/Output (GPIO) core for the AXI bus. GPIO1 Data IO GPIO2 Data IO AXI S6 Memory Controller(DDR/DDR2/DDR3) Spartan-6 memory controller AXI 10/100 Ethernet MAC Lite 'IEEE Std. 802.3 MII interface MAC with AXI interface, lightweight implementation' Ethernet PHY Management Data Ethernet PHY Management Clock Ethernet Transmit Data Output Ethernet Transmit Enable Ethernet Transmit Clock Input Ethernet Collision Input Ethernet Receive Data Input Ethernet Receive Error Input Ethernet Receive Clock Input Ethernet Carrier Sense Input Ethernet Receive Data Valid Ethernet PHY Reset AXI Timer/Counter Timer counter with AXI interface Capture Trig 0 Capture Trig 1 Generate Out 0 Generate Out 1 Pulse Width Modulation 0 AXI Interrupt Controller intc core attached to the AXI Interrupt Request Output Interrupt Inputs