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4 commits

Author SHA1 Message Date
chinglee-iot dbf70559b2 [AUTO][RELEASE]: Update SBOM 2024-04-22 07:38:21 +00:00
chinglee-iot 57df8a0f9f [AUTO][RELEASE]: Update version number in manifest.yml 2024-04-22 07:38:19 +00:00
chinglee-iot d12c012a11 [AUTO][RELEASE]: Bump file header version to "11.1.0" 2024-04-22 07:38:19 +00:00
chinglee-iot 2a343ea4a4 [AUTO][RELEASE]: Bump task.h version macros to "11.1.0" 2024-04-22 07:38:18 +00:00
715 changed files with 18178 additions and 18440 deletions

View file

@ -23,7 +23,6 @@ AIRCR
ALMIEN ALMIEN
ALMV ALMV
ANDC ANDC
andi
ANDCCR ANDCCR
APIC APIC
APROCFREQ APROCFREQ
@ -48,7 +47,6 @@ bcpc
BCPC BCPC
beevt beevt
BEEVT BEEVT
beqz
BERR BERR
bfextu bfextu
Biagioni Biagioni
@ -77,7 +75,6 @@ CCNT
CCNTR CCNTR
CCPN CCPN
CCPR CCPR
CCRH
CDTY CDTY
CDTYR CDTYR
CFBS CFBS
@ -89,7 +86,6 @@ CHSR
CICR CICR
CISR CISR
CKDIV CKDIV
CKDIVMD
CKEY CKEY
CKGR CKGR
CKLO CKLO
@ -108,7 +104,6 @@ CLKSOURCE
CLKSTA CLKSTA
CLRB CLRB
CLRF CLRF
clrm
CLRPSW CLRPSW
CMCNT CMCNT
CMCON CMCON
@ -130,7 +125,6 @@ CODR
comms comms
COMPA COMPA
CONFG CONFG
coreid
coremqtt coremqtt
CORTUS CORTUS
coverity coverity
@ -155,7 +149,6 @@ CPRE
cpsid cpsid
cpsie cpsie
CPSR CPSR
CPUCLK
CPUID CPUID
CRCB CRCB
crflash crflash
@ -171,8 +164,6 @@ csrs
csrw csrw
CTCR CTCR
ctest ctest
CTPC
CTPSW
CTRLA CTRLA
CTSIC CTSIC
CUPD CUPD
@ -236,7 +227,6 @@ DTREN
DTXD DTXD
DUNITY DUNITY
DVAR DVAR
Dxxx
EABI EABI
ecall ecall
ECIT ECIT
@ -247,7 +237,6 @@ EEVT
eevtedg eevtedg
EEVTEDG EEVTEDG
EFRHD EFRHD
EIIC
EINT EINT
EIPC EIPC
EIPSW EIPSW
@ -300,7 +289,6 @@ FADD
FCMD FCMD
fcolor fcolor
FCSE FCSE
fcsr
fdiagnostics fdiagnostics
fdiv fdiv
FDIV FDIV
@ -322,7 +310,6 @@ FNTR
FOSC FOSC
FPCCR FPCCR
FPCSR FPCSR
FPEPC
FPSW FPSW
FPUL FPUL
FRDY FRDY
@ -351,7 +338,6 @@ GPTA
HCLK HCLK
Hitach Hitach
HRESP HRESP
HTCFG
HWHSH HWHSH
HWORD HWORD
HWRD HWRD
@ -367,7 +353,6 @@ ICCR
ICCRPR ICCRPR
ICCRX ICCRX
ICERST ICERST
ICIPI
ICSR ICSR
IDCR IDCR
IECR IECR
@ -387,7 +372,6 @@ INTTM
IODEFINE IODEFINE
IORLW IORLW
IPEN IPEN
IPIR
IPLB IPLB
ipsr ipsr
IPSR IPSR
@ -396,8 +380,8 @@ IRET
IRXFCS IRXFCS
ISRAM ISRAM
ISRR ISRR
ISRS
ISR's ISR's
ISRS
ISRTICK ISRTICK
isystem isystem
ITIF ITIF
@ -452,7 +436,6 @@ MAINRDY
MAIR MAIR
Mang Mang
Mbits Mbits
mbranch
mcause mcause
MCFR MCFR
MCKA MCKA
@ -581,7 +564,6 @@ OSCEN
OSCOFF OSCOFF
OSCOUNT OSCOUNT
OSMC OSMC
OSTM
outpw outpw
OVLY OVLY
OVRE OVRE
@ -591,8 +573,6 @@ OWATCOM
OWDR OWDR
OWER OWER
OWSR OWSR
pacbti
PACBTI
PAGEN PAGEN
PCDR PCDR
PCER PCER
@ -604,7 +584,6 @@ PCLKSEL
PCSR PCSR
PCXI PCXI
PDSR PDSR
PEID
PEIE PEIE
PENDSV PENDSV
PENDSVCLEAR PENDSVCLEAR
@ -682,7 +661,6 @@ pylint
pytest pytest
pyyaml pyyaml
RAMPZ RAMPZ
randomisation
RASR RASR
Rationalised Rationalised
Raynald Raynald
@ -786,7 +764,6 @@ SHPR
SHTIM SHTIM
SIFIVE SIFIVE
sinclude sinclude
slli
SODR SODR
SOFTIRQ SOFTIRQ
SPCK SPCK
@ -822,8 +799,6 @@ SWINTR
SWRST SWRST
SWTRG SWTRG
synchronise synchronise
SYNCM
syncm
SYSC SYSC
sysclk sysclk
Sysclk Sysclk
@ -909,7 +884,6 @@ TXTEN
TXUBR TXUBR
TXVC TXVC
TXVDIS TXVDIS
UBTI
UDCP UDCP
UNACKED UNACKED
uncrustify uncrustify
@ -925,7 +899,6 @@ UNSUB
UNSUBACK UNSUBACK
unsubscriptions unsubscriptions
unsuspended unsuspended
UPAC
URAD URAD
URAT URAT
URSTEN URSTEN
@ -938,7 +911,6 @@ USRIO
utest utest
utilises utilises
utilising utilising
vcsr
VDDCORE VDDCORE
vect vect
Vect Vect
@ -949,7 +921,6 @@ visualisation
vldmdbeq vldmdbeq
vldmia vldmia
vldmiaeq vldmiaeq
vlenb
VMSRNE VMSRNE
vpop vpop
VPOPNE VPOPNE
@ -957,7 +928,6 @@ vpush
VPUSHNE VPUSHNE
VRPM VRPM
Vrtc Vrtc
vsetvl
vstmdbeq vstmdbeq
vstmiaeq vstmiaeq
VTOR VTOR

2
.github/CODEOWNERS vendored
View file

@ -4,7 +4,7 @@
# the repo. Unless a later match takes precedence, # the repo. Unless a later match takes precedence,
# @global-owner1 and @global-owner2 will be requested for # @global-owner1 and @global-owner2 will be requested for
# review when someone opens a pull request. # review when someone opens a pull request.
* @FreeRTOS/pr-bar-raisers * @FreeRTOS/pr-bar-raiser
# Order is important; the last matching pattern takes the most # Order is important; the last matching pattern takes the most
# precedence. When someone opens a pull request that only # precedence. When someone opens a pull request that only

View file

@ -1,3 +0,0 @@
https://www.renesas.com/us/en/document/mah/rh850f1k-group-users-manual-hardware?r=1170166
https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rh850-automotive-mcus
https://www.renesas.com/us/en/software-tool/c-compiler-package-rh850-family#downloads

View file

@ -1,6 +1,6 @@
#!/usr/bin/env python3 #!/usr/bin/env python3
#/* #/*
# * FreeRTOS Kernel <DEVELOPMENT BRANCH> # * FreeRTOS Kernel V11.1.0
# * Copyright (C) 2024 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * Copyright (C) 2024 Amazon.com, Inc. or its affiliates. All Rights Reserved.
# * # *
# * SPDX-License-Identifier: MIT # * SPDX-License-Identifier: MIT
@ -28,7 +28,6 @@
# */ # */
import os import os
import re
from common.header_checker import HeaderChecker from common.header_checker import HeaderChecker
#-------------------------------------------------------------------------------------------------- #--------------------------------------------------------------------------------------------------
@ -107,18 +106,9 @@ KERNEL_THIRD_PARTY_PATTERNS = [
r'.*portable/GCC/AVR32_UC3/.*', r'.*portable/GCC/AVR32_UC3/.*',
] ]
KERNEL_ARM_COLLAB_FILES_PATTERNS = [
r'.*portable/ARMv8M/*',
r'.*portable/.*/ARM_CM23*',
r'.*portable/.*/ARM_CM33*',
r'.*portable/.*/ARM_CM35*',
r'.*portable/.*/ARM_CM55*',
r'.*portable/.*/ARM_CM85*',
]
KERNEL_HEADER = [ KERNEL_HEADER = [
'/*\n', '/*\n',
' * FreeRTOS Kernel <DEVELOPMENT BRANCH>\n', ' * FreeRTOS Kernel V11.1.0\n',
' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n', ' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n',
' *\n', ' *\n',
' * SPDX-License-Identifier: MIT\n', ' * SPDX-License-Identifier: MIT\n',
@ -149,85 +139,12 @@ KERNEL_HEADER = [
FREERTOS_COPYRIGHT_REGEX = r"^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright \(C\) 20\d\d Amazon.com, Inc. or its affiliates. All Rights Reserved\.( \*\/)?$" FREERTOS_COPYRIGHT_REGEX = r"^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright \(C\) 20\d\d Amazon.com, Inc. or its affiliates. All Rights Reserved\.( \*\/)?$"
FREERTOS_ARM_COLLAB_COPYRIGHT_REGEX = r"(^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright \(C\) 20\d\d Amazon.com, Inc. or its affiliates. All Rights Reserved\.( \*\/)?$)|" + \
r"(^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright 20\d\d Arm Limited and/or its affiliates( \*\/)?$)|" + \
r"(^(;|#)?( *(\/\*|\*|#|\/\/))? <open-source-office@arm.com>( \*\/)?$)"
class KernelHeaderChecker(HeaderChecker):
def __init__(
self,
header,
padding=1000,
ignored_files=None,
ignored_ext=None,
ignored_patterns=None,
py_ext=None,
asm_ext=None,
third_party_patterns=None,
copyright_regex = None
):
super().__init__(header, padding, ignored_files, ignored_ext, ignored_patterns,
py_ext, asm_ext, third_party_patterns, copyright_regex)
self.armCollabRegex = re.compile(FREERTOS_ARM_COLLAB_COPYRIGHT_REGEX)
self.armCollabFilesPatternList = []
for pattern in KERNEL_ARM_COLLAB_FILES_PATTERNS:
self.armCollabFilesPatternList.append(re.compile(pattern))
def isArmCollabFile(self, path):
for pattern in self.armCollabFilesPatternList:
if pattern.match(path):
return True
return False
def checkArmCollabFile(self, path):
isValid = False
file_ext = os.path.splitext(path)[-1]
with open(path, encoding="utf-8", errors="ignore") as file:
chunk = file.read(len("".join(self.header)) + self.padding)
lines = [("%s\n" % line) for line in chunk.strip().splitlines()][
: len(self.header) + 2
]
if (len(lines) > 0) and (lines[0].find("#!") == 0):
lines.remove(lines[0])
# Split lines in sections.
headers = dict()
headers["text"] = []
headers["copyright"] = []
headers["spdx"] = []
for line in lines:
if self.armCollabRegex.match(line):
headers["copyright"].append(line)
elif "SPDX-License-Identifier:" in line:
headers["spdx"].append(line)
else:
headers["text"].append(line)
text_equal = self.isValidHeaderSection(file_ext, "text", headers["text"])
spdx_equal = self.isValidHeaderSection(file_ext, "spdx", headers["spdx"])
if text_equal and spdx_equal and len(headers["copyright"]) == 3:
isValid = True
return isValid
def customCheck(self, path):
isValid = False
if self.isArmCollabFile(path):
isValid = self.checkArmCollabFile(path)
return isValid
def main(): def main():
parser = HeaderChecker.configArgParser() parser = HeaderChecker.configArgParser()
args = parser.parse_args() args = parser.parse_args()
# Configure the checks then run # Configure the checks then run
checker = KernelHeaderChecker(KERNEL_HEADER, checker = HeaderChecker(KERNEL_HEADER,
copyright_regex=FREERTOS_COPYRIGHT_REGEX, copyright_regex=FREERTOS_COPYRIGHT_REGEX,
ignored_files=KERNEL_IGNORED_FILES, ignored_files=KERNEL_IGNORED_FILES,
ignored_ext=KERNEL_IGNORED_EXTENSIONS, ignored_ext=KERNEL_IGNORED_EXTENSIONS,

View file

@ -11,7 +11,7 @@ def update_manifest_file(new_version_number):
for line in f: for line in f:
line = line.strip() line = line.strip()
if line.startswith('version'): if line.startswith('version'):
updated_lines.append(f'version: "V{new_version_number}"\n') updated_lines.append(f'version: "v{new_version_number}"\n')
else: else:
updated_lines.append(f'{line}\n') updated_lines.append(f'{line}\n')

View file

@ -1,14 +0,0 @@
Note that these tools are provided by different vendors and not by the FreeRTOS
team.
## Tracing Tools
| Tool | Website | Getting Started |
|------|---------|-----------------|
| Tracelyzer | [Link](https://percepio.com/tracealyzer/freertostrace/) | [Link](https://percepio.com/getstarted/latest/html/freertos.html) |
| SystemView | [Link](https://www.segger.com/products/development-tools/systemview/) | [Link](https://wiki.segger.com/FreeRTOS_with_SystemView) |
## Static Code Analysis Tools
| Tool | Website | Getting Started |
|------|---------|-----------------|
| Code Sonar | [Link](https://codesecure.com/our-products/codesonar/) | [Link](https://github.com/CodeSecure-SE/FreeRTOS-Kernel/blob/main/examples/codesonar/README.md) |
| Coverity | [Link](https://www.blackduck.com/static-analysis-tools-sast/coverity.html) | [Link](../examples/coverity/README.md) |

View file

@ -44,49 +44,37 @@ jobs:
fetch-depth: 0 fetch-depth: 0
- name: Configure git identity - name: Configure git identity
env:
ACTOR: ${{ github.actor }}
run: | run: |
git config --global user.name "$ACTOR" git config --global user.name ${{ github.actor }}
git config --global user.email "$ACTOR"@users.noreply.github.com git config --global user.email ${{ github.actor }}@users.noreply.github.com
- name: create a new branch that references commit id - name: create a new branch that references commit id
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
COMMIT_ID: ${{ github.event.inputs.commit_id }}
working-directory: ./local_kernel working-directory: ./local_kernel
run: | run: |
git checkout -b "$VERSION_NUMBER" "$COMMIT_ID" git checkout -b ${{ github.event.inputs.version_number }} ${{ github.event.inputs.commit_id }}
echo "COMMIT_SHA_1=$(git rev-parse HEAD)" >> $GITHUB_ENV echo "COMMIT_SHA_1=$(git rev-parse HEAD)" >> $GITHUB_ENV
- name: Update source files with version info - name: Update source files with version info
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
MAIN_BR_VERSION_NUMBER: ${{ github.event.inputs.main_br_version }}
COMMIT_SHA_1: ${{ env.COMMIT_SHA_1 }}
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
run: | run: |
# Install deps and run # Install deps and run
pip install -r ./tools/.github/scripts/release-requirements.txt pip install -r ./tools/.github/scripts/release-requirements.txt
./tools/.github/scripts/update_src_version.py FreeRTOS --kernel-repo-path=local_kernel --kernel-commit="$COMMIT_SHA_1" --new-kernel-version="$VERSION_NUMBER" --new-kernel-main-br-version="$MAIN_BR_VERSION_NUMBER" ./tools/.github/scripts/update_src_version.py FreeRTOS --kernel-repo-path=local_kernel --kernel-commit=${{ env.COMMIT_SHA_1 }} --new-kernel-version=${{ github.event.inputs.version_number }} --new-kernel-main-br-version=${{ github.event.inputs.main_br_version }}
exit $? exit $?
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
- name : Update version number in manifest.yml - name : Update version number in manifest.yml
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
working-directory: ./local_kernel working-directory: ./local_kernel
run: | run: |
./.github/scripts/manifest_updater.py -v "$VERSION_NUMBER" ./.github/scripts/manifest_updater.py -v ${{ github.event.inputs.version_number }}
exit $? exit $?
- name : Commit version number change in manifest.yml - name : Commit version number change in manifest.yml
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
working-directory: ./local_kernel working-directory: ./local_kernel
run: | run: |
git add . git add .
git commit -m '[AUTO][RELEASE]: Update version number in manifest.yml' git commit -m '[AUTO][RELEASE]: Update version number in manifest.yml'
git push -u origin "$VERSION_NUMBER" git push -u origin ${{ github.event.inputs.version_number }}
- name: Generate SBOM - name: Generate SBOM
uses: FreeRTOS/CI-CD-Github-Actions/sbom-generator@main uses: FreeRTOS/CI-CD-Github-Actions/sbom-generator@main
@ -95,32 +83,24 @@ jobs:
source_path: ./ source_path: ./
- name: commit SBOM file - name: commit SBOM file
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
working-directory: ./local_kernel working-directory: ./local_kernel
run: | run: |
git add . git add .
git commit -m '[AUTO][RELEASE]: Update SBOM' git commit -m '[AUTO][RELEASE]: Update SBOM'
git push -u origin "$VERSION_NUMBER" git push -u origin ${{ github.event.inputs.version_number }}
echo "COMMIT_SHA_2=$(git rev-parse HEAD)" >> $GITHUB_ENV echo "COMMIT_SHA_2=$(git rev-parse HEAD)" >> $GITHUB_ENV
- name: Release - name: Release
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
MAIN_BR_VERSION_NUMBER: ${{ github.event.inputs.main_br_version }}
COMMIT_SHA_2: ${{ env.COMMIT_SHA_2 }}
REPO_OWNER: ${{ github.repository_owner }}
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
run: | run: |
# Install deps and run # Install deps and run
pip install -r ./tools/.github/scripts/release-requirements.txt pip install -r ./tools/.github/scripts/release-requirements.txt
./tools/.github/scripts/release.py "$REPO_OWNER" --kernel-repo-path=local_kernel --kernel-commit="$COMMIT_SHA_2" --new-kernel-version="$VERSION_NUMBER" --new-kernel-main-br-version="$MAIN_BR_VERSION_NUMBER" ./tools/.github/scripts/release.py ${{ github.repository_owner }} --kernel-repo-path=local_kernel --kernel-commit=${{ env.COMMIT_SHA_2 }} --new-kernel-version=${{ github.event.inputs.version_number }} --new-kernel-main-br-version=${{ github.event.inputs.main_br_version }}
exit $? exit $?
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
- name: Cleanup - name: Cleanup
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
working-directory: ./local_kernel working-directory: ./local_kernel
run: | run: |
# Delete the branch created for Tag by SBOM generator # Delete the branch created for Tag by SBOM generator
git push -u origin --delete "$VERSION_NUMBER" git push -u origin --delete ${{ github.event.inputs.version_number }}

View file

@ -33,8 +33,6 @@ jobs:
uses: actions/checkout@v4.1.1 uses: actions/checkout@v4.1.1
- name: Link Verification - name: Link Verification
uses: FreeRTOS/CI-CD-Github-Actions/link-verifier@main uses: FreeRTOS/CI-CD-Github-Actions/link-verifier@main
with:
allowlist-file: '.github/allowed_urls.txt'
verify-manifest: verify-manifest:
runs-on: ubuntu-latest runs-on: ubuntu-latest

View file

@ -150,25 +150,16 @@ jobs:
with: with:
path: ./FreeRTOS/Source path: ./FreeRTOS/Source
- env: - name: Install MSP430 Toolchain
stepName: Install MSP430 Toolchain
shell: bash shell: bash
run: | run: |
# ${{ env.stepName }} sudo apt-get -y update
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}" sudo apt-get -y install gcc-msp430 build-essential
curl -L -O https://dr-download.ti.com/software-development/ide-configuration-compiler-or-debugger/MD-LlCjWuAbzH/9.3.1.2/msp430-gcc-full-linux-x64-installer-9.3.1.2.7z
sudo apt update -y
sudo apt install -y p7zip-full
7z x ./msp430-gcc-full-linux-x64-installer-9.3.1.2.7z
chmod +x ./msp430-gcc-full-linux-x64-installer-9.3.1.2.run
sudo ./msp430-gcc-full-linux-x64-installer-9.3.1.2.run --prefix /usr/bin/msp430-gcc --mode unattended
echo "::endgroup::"
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
- name: Build msp430_GCC Demo - name: Build msp430_GCC Demo
shell: bash shell: bash
working-directory: FreeRTOS/Demo/msp430_GCC working-directory: FreeRTOS/Demo/msp430_GCC
run: make -j CC=/usr/bin/msp430-gcc/bin/msp430-elf-gcc OPT="-Os -I/usr/bin/msp430-gcc/include -L/usr/bin/msp430-gcc/include" run: make -j
MicroBlaze-GCC: MicroBlaze-GCC:
name: GCC MicroBlaze Toolchain name: GCC MicroBlaze Toolchain
@ -268,12 +259,12 @@ jobs:
fetch-depth: 1 fetch-depth: 1
- env: - env:
stepName: Fetch Dependencies stepName: Fetch Community-Supported-Demos Submodule
shell: bash shell: bash
run: | run: |
# ${{ env.stepName }} # ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}" echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos FreeRTOS-Plus/Source/FreeRTOS-Plus-Trace git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}" echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
# Checkout user pull request changes # Checkout user pull request changes

View file

@ -45,12 +45,12 @@ jobs:
fail_ci_if_error: false fail_ci_if_error: false
verbose: false verbose: false
- name: Archive code coverage data - name: Archive code coverage data
uses: actions/upload-artifact@v4 uses: actions/upload-artifact@v2
with: with:
name: coverage-data name: coverage-data
path: FreeRTOS/Test/CMock/build/cmock_test* path: FreeRTOS/Test/CMock/build/cmock_test*
- name: Archive code coverage html report - name: Archive code coverage html report
uses: actions/upload-artifact@v4 uses: actions/upload-artifact@v2
with: with:
name: coverage-report name: coverage-report
path: FreeRTOS/Test/CMock/build/coverage path: FreeRTOS/Test/CMock/build/coverage

View file

@ -138,18 +138,15 @@ if(NOT FREERTOS_PORT)
" IAR_ARM_CM33_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-secure\n" " IAR_ARM_CM33_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-secure\n"
" IAR_ARM_CM33_SECURE - Compiler: IAR Target: ARM Cortex-M33 secure\n" " IAR_ARM_CM33_SECURE - Compiler: IAR Target: ARM Cortex-M33 secure\n"
" IAR_ARM_CM33_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-trustzone non-secure\n" " IAR_ARM_CM33_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-trustzone non-secure\n"
" IAR_ARM_CM33_TFM - Compiler: IAR Target: ARM Cortex-M33 non-secure for TF-M\n"
" IAR_ARM_CM35P_NONSECURE - Compiler: IAR Target: ARM Cortex-M35P non-secure\n" " IAR_ARM_CM35P_NONSECURE - Compiler: IAR Target: ARM Cortex-M35P non-secure\n"
" IAR_ARM_CM35P_SECURE - Compiler: IAR Target: ARM Cortex-M35P secure\n" " IAR_ARM_CM35P_SECURE - Compiler: IAR Target: ARM Cortex-M35P secure\n"
" IAR_ARM_CM35P_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M35P non-trustzone non-secure\n" " IAR_ARM_CM35P_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M35P non-trustzone non-secure\n"
" IAR_ARM_CM55_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-secure\n" " IAR_ARM_CM55_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-secure\n"
" IAR_ARM_CM55_SECURE - Compiler: IAR Target: ARM Cortex-M55 secure\n" " IAR_ARM_CM55_SECURE - Compiler: IAR Target: ARM Cortex-M55 secure\n"
" IAR_ARM_CM55_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-trustzone non-secure\n" " IAR_ARM_CM55_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-trustzone non-secure\n"
" IAR_ARM_CM55_TFM - Compiler: IAR Target: ARM Cortex-M55 non-secure for TF-M\n"
" IAR_ARM_CM85_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-secure\n" " IAR_ARM_CM85_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-secure\n"
" IAR_ARM_CM85_SECURE - Compiler: IAR Target: ARM Cortex-M85 secure\n" " IAR_ARM_CM85_SECURE - Compiler: IAR Target: ARM Cortex-M85 secure\n"
" IAR_ARM_CM85_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-trustzone non-secure\n" " IAR_ARM_CM85_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-trustzone non-secure\n"
" IAR_ARM_CM85_TFM - Compiler: IAR Target: ARM Cortex-M85 non-secure for TF-M\n"
" IAR_ARM_CRX_NOGIC - Compiler: IAR Target: ARM Cortex-Rx no GIC\n" " IAR_ARM_CRX_NOGIC - Compiler: IAR Target: ARM Cortex-Rx no GIC\n"
" IAR_ATMEGA323 - Compiler: IAR Target: ATMega323\n" " IAR_ATMEGA323 - Compiler: IAR Target: ATMega323\n"
" IAR_ATMEL_SAM7S64 - Compiler: IAR Target: Atmel SAM7S64\n" " IAR_ATMEL_SAM7S64 - Compiler: IAR Target: Atmel SAM7S64\n"

View file

@ -1,140 +1,5 @@
Documentation and download available at https://www.FreeRTOS.org/ Documentation and download available at https://www.FreeRTOS.org/
Changes between FreeRTOS V11.1.0 and FreeRTOS V11.2.0 released March 04, 2025
+ Add CC-RH port for Renesas F1Kx devices. We thank @TrongNguyenR for their
contribution.
+ Add Pointer Authentication (PAC) and Branch Target Identification (BTI)
support to the ARMv8-M ports. We thank @AhmedIsmail02 for their
contribution.
+ Add Floating Point Unit (FPU) support to the ARM_AARCH64 port. We thank
@StefanBalt for their contribution.
+ Add FPU Safe Application IRQ Handler suport to the ARM_AARCH64_SRE port.
We thank @GhMarwen for their contribution.
+ Add Privileged eXecute Never MPU attribute support to the ARMv8-M ports.
We thank @AhmedIsmail02 for their contribution.
+ Update XMOS xcore.ai port to be compatible with FreeRTOS Kernel version
11. We thank @ACascarino for their contribution.
+ ARM_CRx_No_GIC port updates:
- Remove inline assembly and move assembly code to separate portASM.S
file.
- Add support for Floating Point Unit (FPU).
- Add support to allow the application writer to handle SVC calls raised
from the application code.
- Add support for vApplicationFPUSafeIRQHandler.
+ POSIX port updates:
- Set PTHREAD_MUTEX_ROBUST attribute on the mutex to prevent application
hangs when a thread dies while holding a mutex.
- Avoid calling pthread_sigmask on non-FreeROS threads when
vPortEndScheduler is called from a non-FreeRTOS thread. We thank
@johnboiles for their contribution.
- Remove unnecessary call to pthread_attr_setstacksize. We thank
@hollinsky for their contribution.
- Add an assert to catch if vPortYield is called from a non-FreeRTOS
thread. We thank @johnboiles for their contribution.
- Fix Posix port compilation on FreeBSD. We thank @tymmej for their
contribution.
+ Update the Xtensa port and move it to the Partner-Supported-Ports
repository. We thank @ianstcdns for their contribution.
+ Add vPortGenerateSimulatedInterruptFromWindowsThread API in the MSVC-MingW
port to enable native windows thread to synchronize with FreeRTOS task
through simulated interrupt.
+ Update Windows port to use Waitable Timer instead of Sleep to improve tick
accuracy. We thank @bknicholls and @leegeth for their contribution.
+ Update the value of queueQUEUE_TYPE_SET to a unique value (5) to allow
tracers to differentiate between queues and queue sets. We thank @schilkp
for their contribution.
+ Add traceSTARTING_SCHEDULER tracing hook to enable tracers to run code on
startup. We thank @schilkp for their contribution.
+ Define vApplicationGetTimerTaskMemory only when configUSE_TIMERS is set to
1. We thank @HazardyKnusperkeks for their contribution.
+ Reset xNextTaskUnblockTime in task notify FromISR APIs to allow the core
to enter sleep mode at the earliest possible time when using tickless
idle.
+ Optimize xTaskIncrementTick for SMP by removing xYieldRequiredForCore. We
thank @cymizer for their contribution.
+ Update the SMP scheduler to re-select a core to yield when the core
affinity of a ready task is changed.
+ Update xEventGroupSetBits to read the event bits value to be returned to
the caller while the scheduler is suspended. This fixes dereference after
the event group is deleted by higher priority task. We thank @skotopes for
their contribution.
+ Optimize certain getter APIs by removing unnecessary calls to
task{ENTER|EXIT}_CRITICAL() when the data access is atomic. We thank
@GuilhermeGiacomoSimoes for their contribution.
+ Optimize xTaskNotifyWait and ulTaskNotifyTake APIs to suspend the
scheduler only if the task is not already notified, and the caller is
willing to wait for the notification. We thank @jefftenney for
their contribution.
+ Fix error checking of prvCreateIdleTasks. We thank @kakkoko for their
contribution.
+ Update SMP lock macros and critical nesting macros to pass core ID as an
argument. This reduces the number of accesses to a peripheral register to
query core ID. We thank @felixvanoost for their contribution.
+ Add stack pointer bounds check when configCHECK_FOR_STACK_OVERFLOW is set
to 2 to improve reliability of stack overflow detection. We thank
@jiladahe1997 for their contribution.
+ Update run-time stats to include time elapsed since the last context
switch for the currently running task.
+ Add xQueueCreateSetStatic API for static creation of Queue Sets. We thank
@kzorer for their contribution.
+ Update the traceMALLOC() macro to pass the actual size of the allocated
block for secure_heap, heap_2, heap_4 and heap_5. We thank @DazzlingOkami
for their contribution.
+ Update heap_1 to use heapADD_WILL_OVERFLOW macro to improve readability.
We thank @wdfk-prog for their contribution.
+ Add pointer protection to the pxNextFreeBlock member of the allocated
block's metadata in heap_4 and heap_5 when configENABLE_HEAP_PROTECTOR is
set to 1. We thank @Saiiijchan for their contribution.
+ Allow the application writer to override pointer validation for heap_5
when configENABLE_HEAP_PROTECTOR is used. We thank @Saiiijchan for their
contribution.
+ Add xPortResetHeapMinimumEverFreeHeapSize to heap_4.c and heap_5.c.
We thank @TomasGalbickaNXP for their contribution.
+ Add NULL check in the event_create function in the POSIX port. We thank
@laroche for their contribution.
+ Use _GNU_SOURCE macro instead of __USE_GNU in the Posix port. We thank
@maxiaogood for their contribution.
+ Use the new __ARM_FP macro instead of the deprectred __VFP_FP__ macro in
GCC/ARM_CM7, GCC/ARM_CM4_MPU, and GCC/ARM_CM4F ports. We thank @haydenridd
for their contribution.
+ Add portMEMORY_BARRIER definition to the Xtensa port. We thank @superroc
for their contribution.
+ Move the hardware include msp430.h to port.c from portmacro.h. We thank
@mayl for their contribution.
+ Update ARM assembly syntax for Cortex-M ports. We thank @laroche for their
contribution.
+ Update the Windows port to records a pending yield in
vPortCloseRunningThread to ensure that the next tick interrupt schedules
the next task regardless of the value of configUSE_PREEMPTION.
+ Fix the context switch issue in the RL78 port. We thank @KeitaKashima for
their contribution.
+ Fix compilation issue in ARM CM0 port when using Keil MDK. We thank
@TomasGalbickaNXP for their contribution.
+ Fix IA32 port compilation when configUSE_COMMON_INTERRUPT_ENTRY_POINT is
set to 0. We thank @Ryzee119 for their contribution.
+ Store configMTIMECMP_BASE_ADDRESS in a 64-bit integer for the RISC-V port.
We thank @vishwamartur for their contribution.
+ Fix nested interrupt handling and optimize FPU related context switching
for the F1Kx port. We thank @TrongNguyenR for their contribution.
+ Update the RP2040 port to add support for Raspberry Pi Pico SDK 2.0.0.
We thank @kilograham for their contribution.
+ Fix the return value of portYIELD_FROM_ISR macro for the MSVC-MingW port.
We thank @wwhheerree for their contribution.
+ Optimize vApplicationFPUSafeIRQHandler for the Coretex-A9 port by
removing the unnecessarily preserved callee saved registers. We thank
@Saiiijchan for their contribution.
+ Fix the context array size for MPU ports to ensure the saved context
location falls within the reserved context area rather than overlapping
with the next MPU_SETTINGS structure member.
+ Update CMake files for RP2040 port to fetch the port from the
Community-Supported-Ports repo. We thank @kilograham for their
contribution.
+ Fix CMake file for the GCC ARM_CM0 port to include MPU files. We thank
@0mhu for their contribution.
+ Add an example of human readable table generated by vTaskListTasks() in
the function documentation. We thank @wwhheerree for their contribution.
Changes between FreeRTOS V11.0.1 and FreeRTOS V11.1.0 released April 22, 2024 Changes between FreeRTOS V11.0.1 and FreeRTOS V11.1.0 released April 22, 2024
+ Add ARMv7-R port with Memory Protection Unit (MPU) support. + Add ARMv7-R port with Memory Protection Unit (MPU) support.
@ -663,7 +528,7 @@ Changes between FreeRTOS V10.4.3 and FreeRTOS V10.4.4 released May 28 2021
in more files. in more files.
+ Other minor updates include adding additional configASSERT() checks and + Other minor updates include adding additional configASSERT() checks and
correcting and improving code comments. correcting and improving code comments.
+ Go look at the smp branch to see the progress towards the Symmetric + Go look at the smp branch to see the progress towards the Symetric
Multiprocessing Kernel. https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/smp Multiprocessing Kernel. https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/smp
Changes between FreeRTOS V10.4.2 and FreeRTOS V10.4.3 released December 14 2020 Changes between FreeRTOS V10.4.2 and FreeRTOS V10.4.3 released December 14 2020
@ -2150,7 +2015,7 @@ Changes between V6.1.0 and V6.1.1 released January 14 2011
Embedded Workbench. Embedded Workbench.
+ Added a new port for the MSP430X core using the IAR Embedded Workbench. + Added a new port for the MSP430X core using the IAR Embedded Workbench.
+ Updated all the RX62N demo projects that target the Renesas Demonstration + Updated all the RX62N demo projects that target the Renesas Demonstration
Kit (RDK) to take into account the reversed LED wiring on later hardware Kit (RDK) to take into account the revered LED wiring on later hardware
revisions, and the new J-Link debug interface DLL. revisions, and the new J-Link debug interface DLL.
+ Updated all the RX62N demo projects so the IO page served by the example + Updated all the RX62N demo projects so the IO page served by the example
embedded web server works with all web browsers. embedded web server works with all web browsers.
@ -3309,7 +3174,7 @@ Changes between V1.2.3 and V1.2.4
xSerialPortInitMinimal() and the function xPortInit() has been renamed xSerialPortInitMinimal() and the function xPortInit() has been renamed
to xSerialPortInit(). to xSerialPortInit().
+ The function sSerialPutChar() has been renamed cSerialPutChar() and + The function sSerialPutChar() has been renamed cSerialPutChar() and
the function return type changed to portCHAR. the function return type chaned to portCHAR.
+ The integer and flop tasks now include calls to tskYIELD(), allowing + The integer and flop tasks now include calls to tskYIELD(), allowing
them to be used with the cooperative scheduler. them to be used with the cooperative scheduler.
+ All the demo applications now use the integer and comtest tasks when the + All the demo applications now use the integer and comtest tasks when the
@ -3443,7 +3308,7 @@ Changes between V1.01 and V1.2.0
ports to allocate a different maximum number of priorities. ports to allocate a different maximum number of priorities.
+ By default the trace facility is off, previously USE_TRACE_FACILITY + By default the trace facility is off, previously USE_TRACE_FACILITY
was defined. was defined.
+ comtest.c now uses a pseudo random delay between sends. This allows for + comtest.c now uses a psuedo random delay between sends. This allows for
better testing as the interrupts do not arrive at regular intervals. better testing as the interrupts do not arrive at regular intervals.
+ Minor change to the Flashlite serial port driver. The driver is written + Minor change to the Flashlite serial port driver. The driver is written
to demonstrate the scheduler and is not written to be efficient. to demonstrate the scheduler and is not written to be efficient.

View file

@ -115,25 +115,6 @@ _Ref 11.5.5_
because data storage buffers are implemented as uint8_t arrays for the because data storage buffers are implemented as uint8_t arrays for the
ease of sizing, alignment and access. ease of sizing, alignment and access.
#### Rule 14.3
MISRA C-2012 Rule 14.3: Controlling expressions shall not be invariant.
_Ref 14.3_
- The `configMAX_TASK_NAME_LEN` , `taskRESERVED_TASK_NAME_LENGTH` and `SIZE_MAX`
are evaluated to constants at compile time and may vary based on the build
configuration.
#### Rule 18.1
MISRA C-2012 Rule 18.1: A pointer resulting from arithmetic on a pointer operand
shall address an element of the same array as that pointer operand.
_Ref 18.1_
- Array access remains within bounds since either the null terminator in
the IDLE task name will break the loop, or the loop will break normally
if the array size is smaller than the IDLE task name length.
#### Rule 21.6 #### Rule 21.6
MISRA C-2012 Rule 21.6: The Standard Library input/output functions shall not MISRA C-2012 Rule 21.6: The Standard Library input/output functions shall not

View file

@ -14,22 +14,16 @@ application projects. That way you will have the correct FreeRTOS source files
included, and the correct include paths configured. Once a demo application is included, and the correct include paths configured. Once a demo application is
building and executing you can remove the demo application files, and start to building and executing you can remove the demo application files, and start to
add in your own application source files. See the add in your own application source files. See the
[FreeRTOS Kernel Quick Start Guide](https://www.freertos.org/Documentation/01-FreeRTOS-quick-start/01-Beginners-guide/02-Quick-start-guide) [FreeRTOS Kernel Quick Start Guide](https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html)
for detailed instructions and other useful links. for detailed instructions and other useful links.
Additionally, for FreeRTOS kernel feature information refer to the Additionally, for FreeRTOS kernel feature information refer to the
[Developer Documentation](https://www.freertos.org/Documentation/02-Kernel/02-Kernel-features/00-Developer-docs), [Developer Documentation](https://www.FreeRTOS.org/features.html),
and [API Reference](https://www.freertos.org/Documentation/02-Kernel/04-API-references/01-Task-creation/00-TaskHandle). and [API Reference](https://www.FreeRTOS.org/a00106.html).
Also for contributing and creating a Pull Request please refer to Also for contributing and creating a Pull Request please refer to
[the instructions here](.github/CONTRIBUTING.md#contributing-via-pull-request). [the instructions here](.github/CONTRIBUTING.md#contributing-via-pull-request).
**FreeRTOS-Kernel V11.1.0
[source code](https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/V11.1.0) is part
of the
[FreeRTOS 202406.00 LTS](https://github.com/FreeRTOS/FreeRTOS-LTS/tree/202406-LTS)
release.**
### Getting help ### Getting help
If you have any questions or need assistance troubleshooting your FreeRTOS project, If you have any questions or need assistance troubleshooting your FreeRTOS project,
@ -186,7 +180,3 @@ then sort the list, which can be done by running the bash command:
Note that only the FreeRTOS-Kernel Source Files, [include](include), Note that only the FreeRTOS-Kernel Source Files, [include](include),
[portable/MemMang](portable/MemMang), and [portable/Common](portable/Common) [portable/MemMang](portable/MemMang), and [portable/Common](portable/Common)
files are checked for proper spelling, and formatting at this time. files are checked for proper spelling, and formatting at this time.
## Third Party Tools
Visit [this link](.github/third_party_tools.md) for detailed information about
third-party tools with FreeRTOS support.

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -551,7 +551,7 @@
ListItem_t * pxNext; ListItem_t * pxNext;
ListItem_t const * pxListEnd; ListItem_t const * pxListEnd;
List_t const * pxList; List_t const * pxList;
EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits, uxReturnBits; EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits;
EventGroup_t * pxEventBits = xEventGroup; EventGroup_t * pxEventBits = xEventGroup;
BaseType_t xMatchFound = pdFALSE; BaseType_t xMatchFound = pdFALSE;
@ -635,15 +635,12 @@
/* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT /* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT
* bit was set in the control word. */ * bit was set in the control word. */
pxEventBits->uxEventBits &= ~uxBitsToClear; pxEventBits->uxEventBits &= ~uxBitsToClear;
/* Snapshot resulting bits. */
uxReturnBits = pxEventBits->uxEventBits;
} }
( void ) xTaskResumeAll(); ( void ) xTaskResumeAll();
traceRETURN_xEventGroupSetBits( uxReturnBits ); traceRETURN_xEventGroupSetBits( pxEventBits->uxEventBits );
return uxReturnBits; return pxEventBits->uxEventBits;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -30,7 +30,7 @@
* This is a simple main that will start the FreeRTOS-Kernel and run a periodic task * This is a simple main that will start the FreeRTOS-Kernel and run a periodic task
* that only delays if compiled with the template port, this project will do nothing. * that only delays if compiled with the template port, this project will do nothing.
* For more information on getting started please look here: * For more information on getting started please look here:
* https://www.freertos.org/Documentation/01-FreeRTOS-quick-start/01-Beginners-guide/02-Quick-start-guide * https://freertos.org/FreeRTOS-quick-start-guide.html
*/ */
/* FreeRTOS includes. */ /* FreeRTOS includes. */
@ -45,7 +45,7 @@
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static void exampleTask( void * parameters ) __attribute__( ( noreturn ) ); static void exampleTask( void * parameters );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -62,7 +62,7 @@ static void exampleTask( void * parameters )
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
int main( void ) void main( void )
{ {
static StaticTask_t exampleTaskTCB; static StaticTask_t exampleTaskTCB;
static StackType_t exampleTaskStack[ configMINIMAL_STACK_SIZE ]; static StackType_t exampleTaskStack[ configMINIMAL_STACK_SIZE ];
@ -84,8 +84,6 @@ int main( void )
{ {
/* Should not reach here. */ /* Should not reach here. */
} }
return 0;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -118,6 +118,7 @@
#define INCLUDE_uxTaskPriorityGet 1 #define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1 #define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskSuspend 1 #define INCLUDE_vTaskSuspend 1
#define INCLUDE_xResumeFromISR 1
#define INCLUDE_vTaskDelayUntil 1 #define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1 #define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 1 #define INCLUDE_xTaskGetSchedulerState 1
@ -125,6 +126,7 @@
#define INCLUDE_uxTaskGetStackHighWaterMark 1 #define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_xTaskGetIdleTaskHandle 1 #define INCLUDE_xTaskGetIdleTaskHandle 1
#define INCLUDE_eTaskGetState 1 #define INCLUDE_eTaskGetState 1
#define INCLUDE_xEventGroupSetBitFromISR 1
#define INCLUDE_xTimerPendFunctionCall 1 #define INCLUDE_xTimerPendFunctionCall 1
#define INCLUDE_xTaskAbortDelay 1 #define INCLUDE_xTaskAbortDelay 1
#define INCLUDE_xTaskGetHandle 1 #define INCLUDE_xTaskGetHandle 1

View file

@ -1,6 +1,6 @@
# MISRA Compliance for FreeRTOS-Kernel # MISRA Compliance for FreeRTOS-Kernel
FreeRTOS-Kernel is MISRA C:2012 compliant. This directory contains a project to FreeRTOS-Kernel is MISRA C:2012 compliant. This directory contains a project to
run [Synopsys Coverity](https://www.blackduck.com/static-analysis-tools-sast/coverity.html) run [Synopsys Coverity](https://www.synopsys.com/software-integrity/security-testing/static-analysis-sast.html)
for checking MISRA compliance. for checking MISRA compliance.
> **Note** > **Note**
@ -17,7 +17,7 @@ files.
## Getting Started ## Getting Started
### Prerequisites ### Prerequisites
Coverity can be run on any platform mentioned [here](https://documentation.blackduck.com/bundle/coverity-docs/page/deploy-install-guide/topics/supported_platforms_for_coverity_analysis.html). Coverity can be run on any platform mentioned [here](https://sig-docs.synopsys.com/polaris/topics/c_coverity-compatible-platforms.html).
The following are the prerequisites to generate coverity report: The following are the prerequisites to generate coverity report:
1. CMake version > 3.13.0 (You can check whether you have this by typing `cmake --version`). 1. CMake version > 3.13.0 (You can check whether you have this by typing `cmake --version`).
@ -35,7 +35,7 @@ commands in a terminal:
~~~ ~~~
2. Create the build files using CMake in a `build` directory: 2. Create the build files using CMake in a `build` directory:
Single core FreeRTOS: Singe core FreeRTOS:
~~~ ~~~
cmake -B build -S examples/coverity cmake -B build -S examples/coverity
~~~ ~~~

View file

@ -3,10 +3,6 @@
"standard" : "c2012", "standard" : "c2012",
"title": "Coverity MISRA Configuration", "title": "Coverity MISRA Configuration",
"deviations" : [ "deviations" : [
{
"deviation": "Rule 1.2",
"reason": "Allow use of __attribute__ for necessary functions placement in specific memory regions."
},
{ {
"deviation": "Rule 3.1", "deviation": "Rule 3.1",
"reason": "We post HTTP links in code comments which contain // inside comments blocks." "reason": "We post HTTP links in code comments which contain // inside comments blocks."

View file

@ -1,26 +1,25 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy * Permission is hereby granted, free of charge, to any person obtaining a copy of
* of this software and associated documentation files (the "Software"), to deal * this software and associated documentation files (the "Software"), to deal in
* in the Software without restriction, including without limitation the rights * the Software without restriction, including without limitation the rights to
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* copies of the Software, and to permit persons to whom the Software is * the Software, and to permit persons to whom the Software is furnished to do so,
* furnished to do so, subject to the following conditions: * subject to the following conditions:
* *
* The above copyright notice and this permission notice shall be included in * The above copyright notice and this permission notice shall be included in all
* all copies or substantial portions of the Software. * copies or substantial portions of the Software.
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* SOFTWARE.
* *
* https://www.FreeRTOS.org * https://www.FreeRTOS.org
* https://github.com/FreeRTOS * https://github.com/FreeRTOS
@ -48,11 +47,10 @@
/******************************************************************************/ /******************************************************************************/
/* In most cases, configCPU_CLOCK_HZ must be set to the frequency of the clock /* In most cases, configCPU_CLOCK_HZ must be set to the frequency of the clock
* that drives the peripheral used to generate the kernels periodic tick * that drives the peripheral used to generate the kernels periodic tick interrupt.
* interrupt. The default value is set to 20MHz and matches the QEMU demo * The default value is set to 20MHz and matches the QEMU demo settings. Your
* settings. Your application will certainly need a different value so set this * application will certainly need a different value so set this correctly.
* correctly. This is very often, but not always, equal to the main system clock * This is very often, but not always, equal to the main system clock frequency. */
* frequency. */
#define configCPU_CLOCK_HZ ( ( unsigned long ) 20000000 ) #define configCPU_CLOCK_HZ ( ( unsigned long ) 20000000 )
/* configSYSTICK_CLOCK_HZ is an optional parameter for ARM Cortex-M ports only. /* configSYSTICK_CLOCK_HZ is an optional parameter for ARM Cortex-M ports only.
@ -61,11 +59,11 @@
* Cortex-M SysTick timer. Most Cortex-M MCUs run the SysTick timer at the same * Cortex-M SysTick timer. Most Cortex-M MCUs run the SysTick timer at the same
* frequency as the MCU itself - when that is the case configSYSTICK_CLOCK_HZ is * frequency as the MCU itself - when that is the case configSYSTICK_CLOCK_HZ is
* not needed and should be left undefined. If the SysTick timer is clocked at a * not needed and should be left undefined. If the SysTick timer is clocked at a
* different frequency to the MCU core then set configCPU_CLOCK_HZ to the MCU * different frequency to the MCU core then set configCPU_CLOCK_HZ to the MCU clock
* clock frequency, as normal, and configSYSTICK_CLOCK_HZ to the SysTick clock * frequency, as normal, and configSYSTICK_CLOCK_HZ to the SysTick clock
* frequency. Not used if left undefined. * frequency. Not used if left undefined.
* The default value is undefined (commented out). If you need this value bring * The default value is undefined (commented out). If you need this value bring it
* it back and set it to a suitable value. */ * back and set it to a suitable value. */
/* /*
#define configSYSTICK_CLOCK_HZ [Platform specific] #define configSYSTICK_CLOCK_HZ [Platform specific]
@ -92,29 +90,28 @@
#define configUSE_TIME_SLICING 0 #define configUSE_TIME_SLICING 0
/* Set configUSE_PORT_OPTIMISED_TASK_SELECTION to 1 to select the next task to /* Set configUSE_PORT_OPTIMISED_TASK_SELECTION to 1 to select the next task to
* run using an algorithm optimised to the instruction set of the target * run using an algorithm optimised to the instruction set of the target hardware -
* hardware - normally using a count leading zeros assembly instruction. Set to * normally using a count leading zeros assembly instruction. Set to 0 to select
* 0 to select the next task to run using a generic C algorithm that works for * the next task to run using a generic C algorithm that works for all FreeRTOS
* all FreeRTOS ports. Not all FreeRTOS ports have this option. Defaults to 0 * ports. Not all FreeRTOS ports have this option. Defaults to 0 if left
* if left undefined. */ * undefined. */
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
/* Set configUSE_TICKLESS_IDLE to 1 to use the low power tickless mode. Set to /* Set configUSE_TICKLESS_IDLE to 1 to use the low power tickless mode. Set to
* 0 to keep the tick interrupt running at all times. Not all FreeRTOS ports * 0 to keep the tick interrupt running at all times. Not all FreeRTOS ports
* support tickless mode. See * support tickless mode. See https://www.freertos.org/low-power-tickless-rtos.html
* https://www.freertos.org/low-power-tickless-rtos.html Defaults to 0 if left * Defaults to 0 if left undefined. */
* undefined. */
#define configUSE_TICKLESS_IDLE 0 #define configUSE_TICKLESS_IDLE 0
/* configMAX_PRIORITIES Sets the number of available task priorities. Tasks can /* configMAX_PRIORITIES Sets the number of available task priorities. Tasks can
* be assigned priorities of 0 to (configMAX_PRIORITIES - 1). Zero is the * be assigned priorities of 0 to (configMAX_PRIORITIES - 1). Zero is the lowest
* lowest priority. */ * priority. */
#define configMAX_PRIORITIES 5 #define configMAX_PRIORITIES 5
/* configMINIMAL_STACK_SIZE defines the size of the stack used by the Idle task /* configMINIMAL_STACK_SIZE defines the size of the stack used by the Idle task
* (in words, not in bytes!). The kernel does not use this constant for any * (in words, not in bytes!). The kernel does not use this constant for any other
* other purpose. Demo applications use the constant to make the demos somewhat * purpose. Demo applications use the constant to make the demos somewhat portable
* portable across hardware architectures. */ * across hardware architectures. */
#define configMINIMAL_STACK_SIZE 128 #define configMINIMAL_STACK_SIZE 128
/* configMAX_TASK_NAME_LEN sets the maximum length (in characters) of a task's /* configMAX_TASK_NAME_LEN sets the maximum length (in characters) of a task's
@ -125,8 +122,7 @@
* has executed since the RTOS kernel was started. * has executed since the RTOS kernel was started.
* The tick count is held in a variable of type TickType_t. * The tick count is held in a variable of type TickType_t.
* *
* configTICK_TYPE_WIDTH_IN_BITS controls the type (and therefore bit-width) of * configTICK_TYPE_WIDTH_IN_BITS controls the type (and therefore bit-width) of TickType_t:
* TickType_t:
* *
* Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_16_BITS causes * Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_16_BITS causes
* TickType_t to be defined (typedef'ed) as an unsigned 16-bit type. * TickType_t to be defined (typedef'ed) as an unsigned 16-bit type.
@ -139,15 +135,15 @@
#define configTICK_TYPE_WIDTH_IN_BITS TICK_TYPE_WIDTH_64_BITS #define configTICK_TYPE_WIDTH_IN_BITS TICK_TYPE_WIDTH_64_BITS
/* Set configIDLE_SHOULD_YIELD to 1 to have the Idle task yield to an /* Set configIDLE_SHOULD_YIELD to 1 to have the Idle task yield to an
* application task if there is an Idle priority (priority 0) application task * application task if there is an Idle priority (priority 0) application task that
* that can run. Set to 0 to have the Idle task use all of its timeslice. * can run. Set to 0 to have the Idle task use all of its timeslice. Default to 1
* Default to 1 if left undefined. */ * if left undefined. */
#define configIDLE_SHOULD_YIELD 1 #define configIDLE_SHOULD_YIELD 1
/* Each task has an array of task notifications. /* Each task has an array of task notifications.
* configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the array.
* array. See https://www.freertos.org/RTOS-task-notifications.html Defaults to * See https://www.freertos.org/RTOS-task-notifications.html Defaults to 1 if
* 1 if left undefined. */ * left undefined. */
#define configTASK_NOTIFICATION_ARRAY_ENTRIES 1 #define configTASK_NOTIFICATION_ARRAY_ENTRIES 1
/* configQUEUE_REGISTRY_SIZE sets the maximum number of queues and semaphores /* configQUEUE_REGISTRY_SIZE sets the maximum number of queues and semaphores
@ -156,22 +152,21 @@
#define configQUEUE_REGISTRY_SIZE 0 #define configQUEUE_REGISTRY_SIZE 0
/* Set configENABLE_BACKWARD_COMPATIBILITY to 1 to map function names and /* Set configENABLE_BACKWARD_COMPATIBILITY to 1 to map function names and
* datatypes from old version of FreeRTOS to their latest equivalent. Defaults * datatypes from old version of FreeRTOS to their latest equivalent. Defaults to
* to 1 if left undefined. */ * 1 if left undefined. */
#define configENABLE_BACKWARD_COMPATIBILITY 0 #define configENABLE_BACKWARD_COMPATIBILITY 0
/* Each task has its own array of pointers that can be used as thread local /* Each task has its own array of pointers that can be used as thread local
* storage. configNUM_THREAD_LOCAL_STORAGE_POINTERS set the number of indexes * storage. configNUM_THREAD_LOCAL_STORAGE_POINTERS set the number of indexes in
* in the array. See * the array. See https://www.freertos.org/thread-local-storage-pointers.html
* https://www.freertos.org/thread-local-storage-pointers.html Defaults to 0 if * Defaults to 0 if left undefined. */
* left undefined. */
#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0 #define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0
/* When configUSE_MINI_LIST_ITEM is set to 0, MiniListItem_t and ListItem_t are /* When configUSE_MINI_LIST_ITEM is set to 0, MiniListItem_t and ListItem_t are
* both the same. When configUSE_MINI_LIST_ITEM is set to 1, MiniListItem_t * both the same. When configUSE_MINI_LIST_ITEM is set to 1, MiniListItem_t contains
* contains 3 fewer fields than ListItem_t which saves some RAM at the cost of * 3 fewer fields than ListItem_t which saves some RAM at the cost of violating
* violating strict aliasing rules which some compilers depend on for * strict aliasing rules which some compilers depend on for optimization. Defaults
* optimization. Defaults to 1 if left undefined. */ * to 1 if left undefined. */
#define configUSE_MINI_LIST_ITEM 1 #define configUSE_MINI_LIST_ITEM 1
/* Sets the type used by the parameter to xTaskCreate() that specifies the stack /* Sets the type used by the parameter to xTaskCreate() that specifies the stack
@ -181,22 +176,22 @@
#define configSTACK_DEPTH_TYPE size_t #define configSTACK_DEPTH_TYPE size_t
/* configMESSAGE_BUFFER_LENGTH_TYPE sets the type used to store the length of /* configMESSAGE_BUFFER_LENGTH_TYPE sets the type used to store the length of
* each message written to a FreeRTOS message buffer (the length is also written * each message written to a FreeRTOS message buffer (the length is also written to
* to the message buffer. Defaults to size_t if left undefined - but that may * the message buffer. Defaults to size_t if left undefined - but that may waste
* waste space if messages never go above a length that could be held in a * space if messages never go above a length that could be held in a uint8_t. */
* uint8_t. */
#define configMESSAGE_BUFFER_LENGTH_TYPE size_t #define configMESSAGE_BUFFER_LENGTH_TYPE size_t
/* If configHEAP_CLEAR_MEMORY_ON_FREE is set to 1, then blocks of memory /* If configHEAP_CLEAR_MEMORY_ON_FREE is set to 1, then blocks of memory allocated
* allocated using pvPortMalloc() will be cleared (i.e. set to zero) when freed * using pvPortMalloc() will be cleared (i.e. set to zero) when freed using
* using vPortFree(). Defaults to 0 if left undefined. */ * vPortFree(). Defaults to 0 if left undefined. */
#define configHEAP_CLEAR_MEMORY_ON_FREE 1 #define configHEAP_CLEAR_MEMORY_ON_FREE 1
/* vTaskList and vTaskGetRunTimeStats APIs take a buffer as a parameter and /* vTaskList and vTaskGetRunTimeStats APIs take a buffer as a parameter and assume
* assume that the length of the buffer is configSTATS_BUFFER_MAX_LENGTH. * that the length of the buffer is configSTATS_BUFFER_MAX_LENGTH. Defaults to
* Defaults to 0xFFFF if left undefined. New applications are recommended to use * 0xFFFF if left undefined.
* vTaskListTasks and vTaskGetRunTimeStatistics APIs instead and supply the * New applications are recommended to use vTaskListTasks and
* length of the buffer explicitly to avoid memory corruption. */ * vTaskGetRunTimeStatistics APIs instead and supply the length of the buffer
* explicitly to avoid memory corruption. */
#define configSTATS_BUFFER_MAX_LENGTH 0xFFFF #define configSTATS_BUFFER_MAX_LENGTH 0xFFFF
/* Set configUSE_NEWLIB_REENTRANT to 1 to have a newlib reent structure /* Set configUSE_NEWLIB_REENTRANT to 1 to have a newlib reent structure
@ -204,11 +199,11 @@
* Default to 0 if left undefined. * Default to 0 if left undefined.
* *
* Note Newlib support has been included by popular demand, but is not used or * Note Newlib support has been included by popular demand, but is not used or
* tested by the FreeRTOS maintainers themselves. FreeRTOS is not responsible * tested by the FreeRTOS maintainers themselves. FreeRTOS is not responsible for
* for resulting newlib operation. User must be familiar with newlib and must * resulting newlib operation. User must be familiar with newlib and must provide
* provide system-wide implementations of the necessary stubs. Note that (at the * system-wide implementations of the necessary stubs. Note that (at the time of
* time of writing) the current newlib design implements a system-wide malloc() * writing) the current newlib design implements a system-wide malloc() that must
* that must be provided with locks. */ * be provided with locks. */
#define configUSE_NEWLIB_REENTRANT 0 #define configUSE_NEWLIB_REENTRANT 0
/******************************************************************************/ /******************************************************************************/
@ -225,21 +220,20 @@
/* configTIMER_TASK_PRIORITY sets the priority used by the timer task. Only /* configTIMER_TASK_PRIORITY sets the priority used by the timer task. Only
* used if configUSE_TIMERS is set to 1. The timer task is a standard FreeRTOS * used if configUSE_TIMERS is set to 1. The timer task is a standard FreeRTOS
* task, so its priority is set like any other task. See * task, so its priority is set like any other task. See
* https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only * https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only used
* used if configUSE_TIMERS is set to 1. */ * if configUSE_TIMERS is set to 1. */
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) #define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
/* configTIMER_TASK_STACK_DEPTH sets the size of the stack allocated to the /* configTIMER_TASK_STACK_DEPTH sets the size of the stack allocated to the
* timer task (in words, not in bytes!). The timer task is a standard FreeRTOS * timer task (in words, not in bytes!). The timer task is a standard FreeRTOS
* task. See * task. See https://www.freertos.org/RTOS-software-timer-service-daemon-task.html
* https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only * Only used if configUSE_TIMERS is set to 1. */
* used if configUSE_TIMERS is set to 1. */
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE #define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* configTIMER_QUEUE_LENGTH sets the length of the queue (the number of discrete /* configTIMER_QUEUE_LENGTH sets the length of the queue (the number of discrete
* items the queue can hold) used to send commands to the timer task. See * items the queue can hold) used to send commands to the timer task. See
* https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only * https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only used
* used if configUSE_TIMERS is set to 1. */ * if configUSE_TIMERS is set to 1. */
#define configTIMER_QUEUE_LENGTH 10 #define configTIMER_QUEUE_LENGTH 10
/******************************************************************************/ /******************************************************************************/
@ -276,22 +270,21 @@
#define configSUPPORT_STATIC_ALLOCATION 1 #define configSUPPORT_STATIC_ALLOCATION 1
/* Set configSUPPORT_DYNAMIC_ALLOCATION to 1 to include FreeRTOS API functions /* Set configSUPPORT_DYNAMIC_ALLOCATION to 1 to include FreeRTOS API functions
* that create FreeRTOS objects (tasks, queues, etc.) using dynamically * that create FreeRTOS objects (tasks, queues, etc.) using dynamically allocated
* allocated memory in the build. Set to 0 to exclude the ability to create * memory in the build. Set to 0 to exclude the ability to create dynamically
* dynamically allocated objects from the build. Defaults to 1 if left * allocated objects from the build. Defaults to 1 if left undefined. See
* undefined. See
* https://www.freertos.org/Static_Vs_Dynamic_Memory_Allocation.html. */ * https://www.freertos.org/Static_Vs_Dynamic_Memory_Allocation.html. */
#define configSUPPORT_DYNAMIC_ALLOCATION 1 #define configSUPPORT_DYNAMIC_ALLOCATION 1
/* Sets the total size of the FreeRTOS heap, in bytes, when heap_1.c, heap_2.c /* Sets the total size of the FreeRTOS heap, in bytes, when heap_1.c, heap_2.c
* or heap_4.c are included in the build. This value is defaulted to 4096 bytes * or heap_4.c are included in the build. This value is defaulted to 4096 bytes but
* but it must be tailored to each application. Note the heap will appear in * it must be tailored to each application. Note the heap will appear in the .bss
* the .bss section. See https://www.freertos.org/a00111.html. */ * section. See https://www.freertos.org/a00111.html. */
#define configTOTAL_HEAP_SIZE 4096 #define configTOTAL_HEAP_SIZE 4096
/* Set configAPPLICATION_ALLOCATED_HEAP to 1 to have the application allocate /* Set configAPPLICATION_ALLOCATED_HEAP to 1 to have the application allocate
* the array used as the FreeRTOS heap. Set to 0 to have the linker allocate * the array used as the FreeRTOS heap. Set to 0 to have the linker allocate the
* the array used as the FreeRTOS heap. Defaults to 0 if left undefined. */ * array used as the FreeRTOS heap. Defaults to 0 if left undefined. */
#define configAPPLICATION_ALLOCATED_HEAP 0 #define configAPPLICATION_ALLOCATED_HEAP 0
/* Set configSTACK_ALLOCATION_FROM_SEPARATE_HEAP to 1 to have task stacks /* Set configSTACK_ALLOCATION_FROM_SEPARATE_HEAP to 1 to have task stacks
@ -302,9 +295,9 @@
* Defaults to 0 if left undefined. */ * Defaults to 0 if left undefined. */
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 #define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
/* Set configENABLE_HEAP_PROTECTOR to 1 to enable bounds checking and /* Set configENABLE_HEAP_PROTECTOR to 1 to enable bounds checking and obfuscation
* obfuscation to internal heap block pointers in heap_4.c and heap_5.c to help * to internal heap block pointers in heap_4.c and heap_5.c to help catch pointer
* catch pointer corruptions. Defaults to 0 if left undefined. */ * corruptions. Defaults to 0 if left undefined. */
#define configENABLE_HEAP_PROTECTOR 0 #define configENABLE_HEAP_PROTECTOR 0
/******************************************************************************/ /******************************************************************************/
@ -318,11 +311,11 @@
#define configKERNEL_INTERRUPT_PRIORITY 0 #define configKERNEL_INTERRUPT_PRIORITY 0
/* configMAX_SYSCALL_INTERRUPT_PRIORITY sets the interrupt priority above which /* configMAX_SYSCALL_INTERRUPT_PRIORITY sets the interrupt priority above which
* FreeRTOS API calls must not be made. Interrupts above this priority are * FreeRTOS API calls must not be made. Interrupts above this priority are never
* never disabled, so never delayed by RTOS activity. The default value is set * disabled, so never delayed by RTOS activity. The default value is set to the
* to the highest interrupt priority (0). Not supported by all FreeRTOS ports. * highest interrupt priority (0). Not supported by all FreeRTOS ports.
* See https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific * See https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific to
* to ARM Cortex-M devices. */ * ARM Cortex-M devices. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 0 #define configMAX_SYSCALL_INTERRUPT_PRIORITY 0
/* Another name for configMAX_SYSCALL_INTERRUPT_PRIORITY - the name used depends /* Another name for configMAX_SYSCALL_INTERRUPT_PRIORITY - the name used depends
@ -334,9 +327,9 @@
/******************************************************************************/ /******************************************************************************/
/* Set the following configUSE_* constants to 1 to include the named hook /* Set the following configUSE_* constants to 1 to include the named hook
* functionality in the build. Set to 0 to exclude the hook functionality from * functionality in the build. Set to 0 to exclude the hook functionality from the
* the build. The application writer is responsible for providing the hook * build. The application writer is responsible for providing the hook function
* function for any set to 1. See https://www.freertos.org/a00016.html. */ * for any set to 1. See https://www.freertos.org/a00016.html. */
#define configUSE_IDLE_HOOK 0 #define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0 #define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 0 #define configUSE_MALLOC_FAILED_HOOK 0
@ -353,15 +346,14 @@
/* Set configCHECK_FOR_STACK_OVERFLOW to 1 or 2 for FreeRTOS to check for a /* Set configCHECK_FOR_STACK_OVERFLOW to 1 or 2 for FreeRTOS to check for a
* stack overflow at the time of a context switch. Set to 0 to not look for a * stack overflow at the time of a context switch. Set to 0 to not look for a
* stack overflow. If configCHECK_FOR_STACK_OVERFLOW is 1 then the check only * stack overflow. If configCHECK_FOR_STACK_OVERFLOW is 1 then the check only
* looks for the stack pointer being out of bounds when a task's context is * looks for the stack pointer being out of bounds when a task's context is saved
* saved to its stack - this is fast but somewhat ineffective. If * to its stack - this is fast but somewhat ineffective. If
* configCHECK_FOR_STACK_OVERFLOW is 2 then the check looks for a pattern * configCHECK_FOR_STACK_OVERFLOW is 2 then the check looks for a pattern written
* written to the end of a task's stack having been overwritten. This is * to the end of a task's stack having been overwritten. This is slower, but will
* slower, but will catch most (but not all) stack overflows. The application * catch most (but not all) stack overflows. The application writer must provide
* writer must provide the stack overflow callback when * the stack overflow callback when configCHECK_FOR_STACK_OVERFLOW is set to 1.
* configCHECK_FOR_STACK_OVERFLOW is set to 1. See * See https://www.freertos.org/Stacks-and-stack-overflow-checking.html Defaults
* https://www.freertos.org/Stacks-and-stack-overflow-checking.html Defaults to * to 0 if left undefined. */
* 0 if left undefined. */
#define configCHECK_FOR_STACK_OVERFLOW 2 #define configCHECK_FOR_STACK_OVERFLOW 2
/******************************************************************************/ /******************************************************************************/
@ -370,9 +362,8 @@
/* Set configGENERATE_RUN_TIME_STATS to 1 to have FreeRTOS collect data on the /* Set configGENERATE_RUN_TIME_STATS to 1 to have FreeRTOS collect data on the
* processing time used by each task. Set to 0 to not collect the data. The * processing time used by each task. Set to 0 to not collect the data. The
* application writer needs to provide a clock source if set to 1. Defaults to * application writer needs to provide a clock source if set to 1. Defaults to 0
* 0 if left undefined. See https://www.freertos.org/rtos-run-time-stats.html. * if left undefined. See https://www.freertos.org/rtos-run-time-stats.html. */
*/
#define configGENERATE_RUN_TIME_STATS 0 #define configGENERATE_RUN_TIME_STATS 0
/* Set configUSE_TRACE_FACILITY to include additional task structure members /* Set configUSE_TRACE_FACILITY to include additional task structure members
@ -394,8 +385,8 @@
/* Set configUSE_CO_ROUTINES to 1 to include co-routine functionality in the /* Set configUSE_CO_ROUTINES to 1 to include co-routine functionality in the
* build, or 0 to omit co-routine functionality from the build. To include * build, or 0 to omit co-routine functionality from the build. To include
* co-routines, croutine.c must be included in the project. Defaults to 0 if * co-routines, croutine.c must be included in the project. Defaults to 0 if left
* left undefined. */ * undefined. */
#define configUSE_CO_ROUTINES 0 #define configUSE_CO_ROUTINES 0
/* configMAX_CO_ROUTINE_PRIORITIES defines the number of priorities available /* configMAX_CO_ROUTINE_PRIORITIES defines the number of priorities available
@ -412,9 +403,9 @@
* at all (i.e. comment out or delete the definitions) to completely remove * at all (i.e. comment out or delete the definitions) to completely remove
* assertions. configASSERT() can be defined to anything you want, for example * assertions. configASSERT() can be defined to anything you want, for example
* you can call a function if an assert fails that passes the filename and line * you can call a function if an assert fails that passes the filename and line
* number of the failing assert (for example, "vAssertCalled( __FILE__, __LINE__ * number of the failing assert (for example, "vAssertCalled( __FILE__, __LINE__ )"
* )" or it can simple disable interrupts and sit in a loop to halt all * or it can simple disable interrupts and sit in a loop to halt all execution
* execution on the failing line for viewing in a debugger. */ * on the failing line for viewing in a debugger. */
#define configASSERT( x ) \ #define configASSERT( x ) \
if( ( x ) == 0 ) \ if( ( x ) == 0 ) \
{ \ { \
@ -429,10 +420,9 @@
/* If configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS is set to 1 then /* If configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS is set to 1 then
* the application writer can provide functions that execute in privileged mode. * the application writer can provide functions that execute in privileged mode.
* See: * See: https://www.freertos.org/a00110.html#configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
* https://www.freertos.org/a00110.html#configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS * Defaults to 0 if left undefined. Only used by the FreeRTOS Cortex-M MPU ports,
* Defaults to 0 if left undefined. Only used by the FreeRTOS Cortex-M MPU * not the standard ARMv7-M Cortex-M port. */
* ports, not the standard ARMv7-M Cortex-M port. */
#define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0 #define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0
/* Set configTOTAL_MPU_REGIONS to the number of MPU regions implemented on your /* Set configTOTAL_MPU_REGIONS to the number of MPU regions implemented on your
@ -442,24 +432,24 @@
#define configTOTAL_MPU_REGIONS 8 #define configTOTAL_MPU_REGIONS 8
/* configTEX_S_C_B_FLASH allows application writers to override the default /* configTEX_S_C_B_FLASH allows application writers to override the default
* values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits * values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for
* for the MPU region covering Flash. Defaults to 0x07UL (which means TEX=000, * the MPU region covering Flash. Defaults to 0x07UL (which means TEX=000, S=1,
* S=1, C=1, B=1) if left undefined. Only used by the FreeRTOS Cortex-M MPU * C=1, B=1) if left undefined. Only used by the FreeRTOS Cortex-M MPU ports, not
* ports, not the standard ARMv7-M Cortex-M port. */ * the standard ARMv7-M Cortex-M port. */
#define configTEX_S_C_B_FLASH 0x07UL #define configTEX_S_C_B_FLASH 0x07UL
/* configTEX_S_C_B_SRAM allows application writers to override the default /* configTEX_S_C_B_SRAM allows application writers to override the default
* values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits * values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for
* for the MPU region covering RAM. Defaults to 0x07UL (which means TEX=000, * the MPU region covering RAM. Defaults to 0x07UL (which means TEX=000, S=1, C=1,
* S=1, C=1, B=1) if left undefined. Only used by the FreeRTOS Cortex-M MPU * B=1) if left undefined. Only used by the FreeRTOS Cortex-M MPU ports, not
* ports, not the standard ARMv7-M Cortex-M port. */ * the standard ARMv7-M Cortex-M port. */
#define configTEX_S_C_B_SRAM 0x07UL #define configTEX_S_C_B_SRAM 0x07UL
/* Set configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY to 0 to prevent any privilege /* Set configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY to 0 to prevent any privilege
* escalations originating from outside of the kernel code itself. Set to 1 to * escalations originating from outside of the kernel code itself. Set to 1 to
* allow application tasks to raise privilege. Defaults to 1 if left undefined. * allow application tasks to raise privilege. Defaults to 1 if left undefined.
* Only used by the FreeRTOS Cortex-M MPU ports, not the standard ARMv7-M * Only used by the FreeRTOS Cortex-M MPU ports, not the standard ARMv7-M Cortex-M
* Cortex-M port. */ * port. */
#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 1 #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 1
/* Set configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS to 1 to allow unprivileged /* Set configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS to 1 to allow unprivileged
@ -503,8 +493,8 @@
/* SMP( Symmetric MultiProcessing ) Specific Configuration definitions. *******/ /* SMP( Symmetric MultiProcessing ) Specific Configuration definitions. *******/
/******************************************************************************/ /******************************************************************************/
/* Set configNUMBER_OF_CORES to the number of available processor cores. /* Set configNUMBER_OF_CORES to the number of available processor cores. Defaults
* Defaults to 1 if left undefined. */ * to 1 if left undefined. */
/* /*
#define configNUMBER_OF_CORES [Num of available cores] #define configNUMBER_OF_CORES [Num of available cores]
@ -521,20 +511,19 @@
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set /* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
* configUSE_CORE_AFFINITY to 1 to enable core affinity feature. When core * configUSE_CORE_AFFINITY to 1 to enable core affinity feature. When core
* affinity feature is enabled, the vTaskCoreAffinitySet and * affinity feature is enabled, the vTaskCoreAffinitySet and vTaskCoreAffinityGet
* vTaskCoreAffinityGet APIs can be used to set and retrieve which cores a task * APIs can be used to set and retrieve which cores a task can run on. If
* can run on. If configUSE_CORE_AFFINITY is set to 0 then the FreeRTOS * configUSE_CORE_AFFINITY is set to 0 then the FreeRTOS scheduler is free to
* scheduler is free to run any task on any available core. */ * run any task on any available core. */
#define configUSE_CORE_AFFINITY 0 #define configUSE_CORE_AFFINITY 0
/* When using SMP with core affinity feature enabled, set /* When using SMP with core affinity feature enabled, set
* configTASK_DEFAULT_CORE_AFFINITY to change the default core affinity mask for * configTASK_DEFAULT_CORE_AFFINITY to change the default core affinity mask for
* tasks created without an affinity mask specified. Setting the define to 1 * tasks created without an affinity mask specified. Setting the define to 1 would
* would make such tasks run on core 0 and setting it to (1 << * make such tasks run on core 0 and setting it to (1 << portGET_CORE_ID()) would
* portGET_CORE_ID()) would make such tasks run on the current core. This config * make such tasks run on the current core. This config value is useful, if
* value is useful, if swapping tasks between cores is not supported (e.g. * swapping tasks between cores is not supported (e.g. Tricore) or if legacy code
* Tricore) or if legacy code should be controlled. Defaults to tskNO_AFFINITY * should be controlled. Defaults to tskNO_AFFINITY if left undefined. */
* if left undefined. */
#define configTASK_DEFAULT_CORE_AFFINITY tskNO_AFFINITY #define configTASK_DEFAULT_CORE_AFFINITY tskNO_AFFINITY
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), if /* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), if
@ -545,8 +534,8 @@
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set /* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
* configUSE_PASSIVE_IDLE_HOOK to 1 to allow the application writer to use * configUSE_PASSIVE_IDLE_HOOK to 1 to allow the application writer to use
* the passive idle task hook to add background functionality without the * the passive idle task hook to add background functionality without the overhead
* overhead of a separate task. Defaults to 0 if left undefined. */ * of a separate task. Defaults to 0 if left undefined. */
#define configUSE_PASSIVE_IDLE_HOOK 0 #define configUSE_PASSIVE_IDLE_HOOK 0
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), /* When using SMP (i.e. configNUMBER_OF_CORES is greater than one),
@ -555,19 +544,19 @@
* tskNO_AFFINITY if left undefined. */ * tskNO_AFFINITY if left undefined. */
#define configTIMER_SERVICE_TASK_CORE_AFFINITY tskNO_AFFINITY #define configTIMER_SERVICE_TASK_CORE_AFFINITY tskNO_AFFINITY
/******************************************************************************/ /******************************************************************************/
/* ARMv8-M secure side port related definitions. ******************************/ /* ARMv8-M secure side port related definitions. ******************************/
/******************************************************************************/ /******************************************************************************/
/* secureconfigMAX_SECURE_CONTEXTS define the maximum number of tasks that can /* secureconfigMAX_SECURE_CONTEXTS define the maximum number of tasks that can
* call into the secure side of an ARMv8-M chip. Not used by any other ports. * call into the secure side of an ARMv8-M chip. Not used by any other ports. */
*/
#define secureconfigMAX_SECURE_CONTEXTS 5 #define secureconfigMAX_SECURE_CONTEXTS 5
/* Defines the kernel provided implementation of /* Defines the kernel provided implementation of
* vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory() * vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory()
* to provide the memory that is used by the Idle task and Timer task * to provide the memory that is used by the Idle task and Timer task respectively.
* respectively. The application can provide it's own implementation of * The application can provide it's own implementation of
* vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory() by * vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory() by
* setting configKERNEL_PROVIDED_STATIC_MEMORY to 0 or leaving it undefined. */ * setting configKERNEL_PROVIDED_STATIC_MEMORY to 0 or leaving it undefined. */
#define configKERNEL_PROVIDED_STATIC_MEMORY 1 #define configKERNEL_PROVIDED_STATIC_MEMORY 1
@ -582,11 +571,11 @@
* exported from secure side. */ * exported from secure side. */
#define configENABLE_TRUSTZONE 1 #define configENABLE_TRUSTZONE 1
/* If the application writer does not want to use TrustZone, but the hardware /* If the application writer does not want to use TrustZone, but the hardware does
* does not support disabling TrustZone then the entire application (including * not support disabling TrustZone then the entire application (including the FreeRTOS
* the FreeRTOS scheduler) can run on the secure side without ever branching to * scheduler) can run on the secure side without ever branching to the non-secure side.
* the non-secure side. To do that, in addition to setting * To do that, in addition to setting configENABLE_TRUSTZONE to 0, also set
* configENABLE_TRUSTZONE to 0, also set configRUN_FREERTOS_SECURE_ONLY to 1. */ * configRUN_FREERTOS_SECURE_ONLY to 1. */
#define configRUN_FREERTOS_SECURE_ONLY 1 #define configRUN_FREERTOS_SECURE_ONLY 1
/* Set configENABLE_MPU to 1 to enable the Memory Protection Unit (MPU), or 0 /* Set configENABLE_MPU to 1 to enable the Memory Protection Unit (MPU), or 0
@ -597,31 +586,27 @@
* to leave the Floating Point Unit disabled. */ * to leave the Floating Point Unit disabled. */
#define configENABLE_FPU 1 #define configENABLE_FPU 1
/* Set configENABLE_MVE to 1 to enable the M-Profile Vector Extension (MVE) /* Set configENABLE_MVE to 1 to enable the M-Profile Vector Extension (MVE) support,
* support, or 0 to leave the MVE support disabled. This option is only * or 0 to leave the MVE support disabled. This option is only applicable to Cortex-M55
* applicable to Cortex-M55 and Cortex-M85 ports as M-Profile Vector Extension * and Cortex-M85 ports as M-Profile Vector Extension (MVE) is available only on
* (MVE) is available only on these architectures. configENABLE_MVE must be left * these architectures. configENABLE_MVE must be left undefined, or defined to 0
* undefined, or defined to 0 for the Cortex-M23,Cortex-M33 and Cortex-M35P * for the Cortex-M23,Cortex-M33 and Cortex-M35P ports. */
* ports. */
#define configENABLE_MVE 1 #define configENABLE_MVE 1
/******************************************************************************/ /******************************************************************************/
/* ARMv7-M and ARMv8-M port Specific Configuration definitions. ***************/ /* ARMv7-M and ARMv8-M port Specific Configuration definitions. ***************/
/******************************************************************************/ /******************************************************************************/
/* Set configCHECK_HANDLER_INSTALLATION to 1 to enable additional asserts to /* Set configCHECK_HANDLER_INSTALLATION to 1 to enable additional asserts to verify
* verify that the application has correctly installed FreeRTOS interrupt * that the application has correctly installed FreeRTOS interrupt handlers.
* handlers.
* *
* An application can install FreeRTOS interrupt handlers in one of the * An application can install FreeRTOS interrupt handlers in one of the following ways:
* following ways: * 1. Direct Routing - Install the functions vPortSVCHandler and xPortPendSVHandler
* 1. Direct Routing - Install the functions vPortSVCHandler and * for SVC call and PendSV interrupts respectively.
* xPortPendSVHandler for SVC call and PendSV interrupts respectively.
* 2. Indirect Routing - Install separate handlers for SVC call and PendSV * 2. Indirect Routing - Install separate handlers for SVC call and PendSV
* interrupts and route program control from those * interrupts and route program control from those handlers
* handlers to vPortSVCHandler and xPortPendSVHandler functions. The * to vPortSVCHandler and xPortPendSVHandler functions.
* applications that use Indirect Routing must set * The applications that use Indirect Routing must set configCHECK_HANDLER_INSTALLATION to 0.
* configCHECK_HANDLER_INSTALLATION to 0.
* *
* Defaults to 1 if left undefined. */ * Defaults to 1 if left undefined. */
#define configCHECK_HANDLER_INSTALLATION 1 #define configCHECK_HANDLER_INSTALLATION 1
@ -639,17 +624,14 @@
#define configUSE_QUEUE_SETS 0 #define configUSE_QUEUE_SETS 0
#define configUSE_APPLICATION_TASK_TAG 0 #define configUSE_APPLICATION_TASK_TAG 0
/* USE_POSIX_ERRNO enables the task global FreeRTOS_errno variable which will /* Set the following INCLUDE_* constants to 1 to incldue the named API function,
* contain the most recent error for that task. */
#define configUSE_POSIX_ERRNO 0
/* Set the following INCLUDE_* constants to 1 to include the named API function,
* or 0 to exclude the named API function. Most linkers will remove unused * or 0 to exclude the named API function. Most linkers will remove unused
* functions even when the constant is 1. */ * functions even when the constant is 1. */
#define INCLUDE_vTaskPrioritySet 1 #define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1 #define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1 #define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskSuspend 1 #define INCLUDE_vTaskSuspend 1
#define INCLUDE_xResumeFromISR 1
#define INCLUDE_vTaskDelayUntil 1 #define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1 #define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 1 #define INCLUDE_xTaskGetSchedulerState 1
@ -657,6 +639,7 @@
#define INCLUDE_uxTaskGetStackHighWaterMark 0 #define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0 #define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_eTaskGetState 0 #define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 1
#define INCLUDE_xTimerPendFunctionCall 0 #define INCLUDE_xTimerPendFunctionCall 0
#define INCLUDE_xTaskAbortDelay 0 #define INCLUDE_xTaskAbortDelay 0
#define INCLUDE_xTaskGetHandle 0 #define INCLUDE_xTaskGetHandle 0

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -49,6 +49,12 @@
*/ */
#include <stdint.h> /* READ COMMENT ABOVE. */ #include <stdint.h> /* READ COMMENT ABOVE. */
/* *INDENT-OFF* */
#ifdef __cplusplus
extern "C" {
#endif
/* *INDENT-ON* */
/* Acceptable values for configTICK_TYPE_WIDTH_IN_BITS. */ /* Acceptable values for configTICK_TYPE_WIDTH_IN_BITS. */
#define TICK_TYPE_WIDTH_16_BITS 0 #define TICK_TYPE_WIDTH_16_BITS 0
#define TICK_TYPE_WIDTH_32_BITS 1 #define TICK_TYPE_WIDTH_32_BITS 1
@ -94,13 +100,6 @@
#define configUSE_MALLOC_FAILED_HOOK 0 #define configUSE_MALLOC_FAILED_HOOK 0
#endif #endif
#ifndef configASSERT
#define configASSERT( x )
#define configASSERT_DEFINED 0
#else
#define configASSERT_DEFINED 1
#endif
/* Basic FreeRTOS definitions. */ /* Basic FreeRTOS definitions. */
#include "projdefs.h" #include "projdefs.h"
@ -130,12 +129,6 @@
#endif /* if ( configUSE_PICOLIBC_TLS == 1 ) */ #endif /* if ( configUSE_PICOLIBC_TLS == 1 ) */
/* *INDENT-OFF* */
#ifdef __cplusplus
extern "C" {
#endif
/* *INDENT-ON* */
#ifndef configUSE_C_RUNTIME_TLS_SUPPORT #ifndef configUSE_C_RUNTIME_TLS_SUPPORT
#define configUSE_C_RUNTIME_TLS_SUPPORT 0 #define configUSE_C_RUNTIME_TLS_SUPPORT 0
#endif #endif
@ -371,6 +364,13 @@
#error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h #error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h
#endif #endif
#ifndef configASSERT
#define configASSERT( x )
#define configASSERT_DEFINED 0
#else
#define configASSERT_DEFINED 1
#endif
/* configPRECONDITION should be defined as configASSERT. /* configPRECONDITION should be defined as configASSERT.
* The CBMC proofs need a way to track assumptions and assertions. * The CBMC proofs need a way to track assumptions and assertions.
* A configPRECONDITION statement should express an implicit invariant or * A configPRECONDITION statement should express an implicit invariant or
@ -445,7 +445,7 @@
#ifndef portRELEASE_TASK_LOCK #ifndef portRELEASE_TASK_LOCK
#if ( configNUMBER_OF_CORES == 1 ) #if ( configNUMBER_OF_CORES == 1 )
#define portRELEASE_TASK_LOCK( xCoreID ) #define portRELEASE_TASK_LOCK()
#else #else
#error portRELEASE_TASK_LOCK is required in SMP #error portRELEASE_TASK_LOCK is required in SMP
#endif #endif
@ -455,7 +455,7 @@
#ifndef portGET_TASK_LOCK #ifndef portGET_TASK_LOCK
#if ( configNUMBER_OF_CORES == 1 ) #if ( configNUMBER_OF_CORES == 1 )
#define portGET_TASK_LOCK( xCoreID ) #define portGET_TASK_LOCK()
#else #else
#error portGET_TASK_LOCK is required in SMP #error portGET_TASK_LOCK is required in SMP
#endif #endif
@ -465,7 +465,7 @@
#ifndef portRELEASE_ISR_LOCK #ifndef portRELEASE_ISR_LOCK
#if ( configNUMBER_OF_CORES == 1 ) #if ( configNUMBER_OF_CORES == 1 )
#define portRELEASE_ISR_LOCK( xCoreID ) #define portRELEASE_ISR_LOCK()
#else #else
#error portRELEASE_ISR_LOCK is required in SMP #error portRELEASE_ISR_LOCK is required in SMP
#endif #endif
@ -475,7 +475,7 @@
#ifndef portGET_ISR_LOCK #ifndef portGET_ISR_LOCK
#if ( configNUMBER_OF_CORES == 1 ) #if ( configNUMBER_OF_CORES == 1 )
#define portGET_ISR_LOCK( xCoreID ) #define portGET_ISR_LOCK()
#else #else
#error portGET_ISR_LOCK is required in SMP #error portGET_ISR_LOCK is required in SMP
#endif #endif
@ -621,13 +621,6 @@
#define traceTASK_SWITCHED_IN() #define traceTASK_SWITCHED_IN()
#endif #endif
#ifndef traceSTARTING_SCHEDULER
/* Called after all idle tasks and timer task (if enabled) have been created
* successfully, just before the scheduler is started. */
#define traceSTARTING_SCHEDULER( xIdleTaskHandles )
#endif
#ifndef traceINCREASE_TICK_COUNT #ifndef traceINCREASE_TICK_COUNT
/* Called before stepping the tick count after waking from tickless idle /* Called before stepping the tick count after waking from tickless idle
@ -1484,14 +1477,6 @@
#define traceRETURN_xQueueCreateSet( pxQueue ) #define traceRETURN_xQueueCreateSet( pxQueue )
#endif #endif
#ifndef traceENTER_xQueueCreateSetStatic
#define traceENTER_xQueueCreateSetStatic( uxEventQueueLength )
#endif
#ifndef traceRETURN_xQueueCreateSetStatic
#define traceRETURN_xQueueCreateSetStatic( pxQueue )
#endif
#ifndef traceENTER_xQueueAddToSet #ifndef traceENTER_xQueueAddToSet
#define traceENTER_xQueueAddToSet( xQueueOrSemaphore, xQueueSet ) #define traceENTER_xQueueAddToSet( xQueueOrSemaphore, xQueueSet )
#endif #endif
@ -3040,16 +3025,6 @@
#define configCONTROL_INFINITE_LOOP() #define configCONTROL_INFINITE_LOOP()
#endif #endif
/* Set configENABLE_PAC and/or configENABLE_BTI to 1 to enable PAC and/or BTI
* support and 0 to disable them. These are currently used in ARMv8.1-M ports. */
#ifndef configENABLE_PAC
#define configENABLE_PAC 0
#endif
#ifndef configENABLE_BTI
#define configENABLE_BTI 0
#endif
/* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using /* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using
* dynamically allocated RAM, in which case when any task is deleted it is known * dynamically allocated RAM, in which case when any task is deleted it is known
* that both the task's stack and TCB need to be freed. Sometimes the * that both the task's stack and TCB need to be freed. Sometimes the

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -483,11 +483,14 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
* and bit 0 set uxBitsToSet to 0x09. * and bit 0 set uxBitsToSet to 0x09.
* *
* @return The value of the event group at the time the call to * @return The value of the event group at the time the call to
* xEventGroupSetBits() returns. Returned value might have the bits specified * xEventGroupSetBits() returns. There are two reasons why the returned value
* by the uxBitsToSet parameter cleared if setting a bit results in a task * might have the bits specified by the uxBitsToSet parameter cleared. First,
* that was waiting for the bit leaving the blocked state then it is possible * if setting a bit results in a task that was waiting for the bit leaving the
* the bit will be cleared automatically (see the xClearBitOnExit parameter * blocked state then it is possible the bit will be cleared automatically
* of xEventGroupWaitBits()). * (see the xClearBitOnExit parameter of xEventGroupWaitBits()). Second, any
* unblocked (or otherwise Ready state) task that has a priority above that of
* the task that called xEventGroupSetBits() will execute and may change the
* event group value before the call to xEventGroupSetBits() returns.
* *
* Example usage: * Example usage:
* @code{c} * @code{c}

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -43,12 +43,12 @@
* writer and reader to be different tasks or interrupts, but, unlike other * writer and reader to be different tasks or interrupts, but, unlike other
* FreeRTOS objects, it is not safe to have multiple different writers or * FreeRTOS objects, it is not safe to have multiple different writers or
* multiple different readers. If there are to be multiple different writers * multiple different readers. If there are to be multiple different writers
* then the application writer must serialize calls to writing API functions * then the application writer must place each call to a writing API function
* (such as xStreamBufferSend()). Likewise, if there are to be multiple * (such as xMessageBufferSend()) inside a critical section and set the send
* different readers then the application writer must serialize calls to reading * block time to 0. Likewise, if there are to be multiple different readers
* API functions (such as xStreamBufferReceive()). One way to achieve such * then the application writer must place each call to a reading API function
* serialization in single core or SMP kernel is to place each API call inside a * (such as xMessageBufferRead()) inside a critical section and set the receive
* critical section and use a block time of 0. * timeout to 0.
* *
* Message buffers hold variable length messages. To enable that, when a * Message buffers hold variable length messages. To enable that, when a
* message is written to the message buffer an additional sizeof( size_t ) bytes * message is written to the message buffer an additional sizeof( size_t ) bytes
@ -306,12 +306,12 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
* writer and reader to be different tasks or interrupts, but, unlike other * writer and reader to be different tasks or interrupts, but, unlike other
* FreeRTOS objects, it is not safe to have multiple different writers or * FreeRTOS objects, it is not safe to have multiple different writers or
* multiple different readers. If there are to be multiple different writers * multiple different readers. If there are to be multiple different writers
* then the application writer must serialize calls to writing API functions * then the application writer must place each call to a writing API function
* (such as xStreamBufferSend()). Likewise, if there are to be multiple * (such as xMessageBufferSend()) inside a critical section and set the send
* different readers then the application writer must serialize calls to reading * block time to 0. Likewise, if there are to be multiple different readers
* API functions (such as xStreamBufferReceive()). One way to achieve such * then the application writer must place each call to a reading API function
* serialization in single core or SMP kernel is to place each API call inside a * (such as xMessageBufferRead()) inside a critical section and set the receive
* critical section and use a block time of 0. * block time to 0.
* *
* Use xMessageBufferSend() to write to a message buffer from a task. Use * Use xMessageBufferSend() to write to a message buffer from a task. Use
* xMessageBufferSendFromISR() to write to a message buffer from an interrupt * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
@ -409,12 +409,12 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
* writer and reader to be different tasks or interrupts, but, unlike other * writer and reader to be different tasks or interrupts, but, unlike other
* FreeRTOS objects, it is not safe to have multiple different writers or * FreeRTOS objects, it is not safe to have multiple different writers or
* multiple different readers. If there are to be multiple different writers * multiple different readers. If there are to be multiple different writers
* then the application writer must serialize calls to writing API functions * then the application writer must place each call to a writing API function
* (such as xStreamBufferSend()). Likewise, if there are to be multiple * (such as xMessageBufferSend()) inside a critical section and set the send
* different readers then the application writer must serialize calls to reading * block time to 0. Likewise, if there are to be multiple different readers
* API functions (such as xStreamBufferReceive()). One way to achieve such * then the application writer must place each call to a reading API function
* serialization in single core or SMP kernel is to place each API call inside a * (such as xMessageBufferRead()) inside a critical section and set the receive
* critical section and use a block time of 0. * block time to 0.
* *
* Use xMessageBufferSend() to write to a message buffer from a task. Use * Use xMessageBufferSend() to write to a message buffer from a task. Use
* xMessageBufferSendFromISR() to write to a message buffer from an interrupt * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
@ -516,12 +516,12 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
* writer and reader to be different tasks or interrupts, but, unlike other * writer and reader to be different tasks or interrupts, but, unlike other
* FreeRTOS objects, it is not safe to have multiple different writers or * FreeRTOS objects, it is not safe to have multiple different writers or
* multiple different readers. If there are to be multiple different writers * multiple different readers. If there are to be multiple different writers
* then the application writer must serialize calls to writing API functions * then the application writer must place each call to a writing API function
* (such as xStreamBufferSend()). Likewise, if there are to be multiple * (such as xMessageBufferSend()) inside a critical section and set the send
* different readers then the application writer must serialize calls to reading * block time to 0. Likewise, if there are to be multiple different readers
* API functions (such as xStreamBufferReceive()). One way to achieve such * then the application writer must place each call to a reading API function
* serialization in single core or SMP kernel is to place each API call inside a * (such as xMessageBufferRead()) inside a critical section and set the receive
* critical section and use a block time of 0. * block time to 0.
* *
* Use xMessageBufferReceive() to read from a message buffer from a task. Use * Use xMessageBufferReceive() to read from a message buffer from a task. Use
* xMessageBufferReceiveFromISR() to read from a message buffer from an * xMessageBufferReceiveFromISR() to read from a message buffer from an
@ -610,12 +610,12 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
* writer and reader to be different tasks or interrupts, but, unlike other * writer and reader to be different tasks or interrupts, but, unlike other
* FreeRTOS objects, it is not safe to have multiple different writers or * FreeRTOS objects, it is not safe to have multiple different writers or
* multiple different readers. If there are to be multiple different writers * multiple different readers. If there are to be multiple different writers
* then the application writer must serialize calls to writing API functions * then the application writer must place each call to a writing API function
* (such as xStreamBufferSend()). Likewise, if there are to be multiple * (such as xMessageBufferSend()) inside a critical section and set the send
* different readers then the application writer must serialize calls to reading * block time to 0. Likewise, if there are to be multiple different readers
* API functions (such as xStreamBufferReceive()). One way to achieve such * then the application writer must place each call to a reading API function
* serialization in single core or SMP kernel is to place each API call inside a * (such as xMessageBufferRead()) inside a critical section and set the receive
* critical section and use a block time of 0. * block time to 0.
* *
* Use xMessageBufferReceive() to read from a message buffer from a task. Use * Use xMessageBufferReceive() to read from a message buffer from a task. Use
* xMessageBufferReceiveFromISR() to read from a message buffer from an * xMessageBufferReceiveFromISR() to read from a message buffer from an

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -136,37 +136,6 @@ BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
/* Privileged only wrappers for Task APIs. These are needed so that /* Privileged only wrappers for Task APIs. These are needed so that
* the application can use opaque handles maintained in mpu_wrappers.c * the application can use opaque handles maintained in mpu_wrappers.c
* with all the APIs. */ * with all the APIs. */
#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
const char * const pcName,
const configSTACK_DEPTH_TYPE uxStackDepth,
void * const pvParameters,
UBaseType_t uxPriority,
TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
const char * const pcName,
const configSTACK_DEPTH_TYPE uxStackDepth,
void * const pvParameters,
UBaseType_t uxPriority,
StackType_t * const puxStackBuffer,
StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskPrioritySet( TaskHandle_t xTask,
UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
void * pvParameter ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskGetRunTimeStatistics( char * pcWriteBuffer,
size_t uxBufferLength ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskListTasks( char * pcWriteBuffer,
size_t uxBufferLength ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskSuspendAll( void ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL;
#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
const char * const pcName, const char * const pcName,
const configSTACK_DEPTH_TYPE uxStackDepth, const configSTACK_DEPTH_TYPE uxStackDepth,
@ -186,9 +155,6 @@ BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION; TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION;
BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
void * pvParameter ) PRIVILEGED_FUNCTION; void * pvParameter ) PRIVILEGED_FUNCTION;
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION; char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION; TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
@ -249,36 +215,6 @@ uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
/* Privileged only wrappers for Queue APIs. These are needed so that /* Privileged only wrappers for Queue APIs. These are needed so that
* the application can use opaque handles maintained in mpu_wrappers.c * the application can use opaque handles maintained in mpu_wrappers.c
* with all the APIs. */ * with all the APIs. */
#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
const UBaseType_t uxInitialCount,
StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength,
const UBaseType_t uxItemSize,
const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
const UBaseType_t uxItemSize,
uint8_t * pucQueueStorage,
StaticQueue_t * pxStaticQueue,
const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL;
QueueSetHandle_t MPU_xQueueCreateSetStatic( const UBaseType_t uxEventQueueLength,
uint8_t * pucQueueStorage,
StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL;
#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
void MPU_vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; void MPU_vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
@ -297,16 +233,10 @@ uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
StaticQueue_t * pxStaticQueue, StaticQueue_t * pxStaticQueue,
const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION; QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
QueueSetHandle_t MPU_xQueueCreateSetStatic( const UBaseType_t uxEventQueueLength,
uint8_t * pucQueueStorage,
StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue, BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
BaseType_t xNewQueue ) PRIVILEGED_FUNCTION; BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
BaseType_t MPU_xQueueGenericGetStaticBuffers( QueueHandle_t xQueue, BaseType_t MPU_xQueueGenericGetStaticBuffers( QueueHandle_t xQueue,
uint8_t ** ppucQueueStorage, uint8_t ** ppucQueueStorage,
StaticQueue_t ** ppxStaticQueue ) PRIVILEGED_FUNCTION; StaticQueue_t ** ppxStaticQueue ) PRIVILEGED_FUNCTION;
@ -341,7 +271,7 @@ BaseType_t MPU_xTimerGenericCommandFromTask( TimerHandle_t xTimer,
BaseType_t MPU_xTimerGenericCommandFromTaskEntry( const xTimerGenericCommandFromTaskParams_t * pxParams ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTimerGenericCommandFromTaskEntry( const xTimerGenericCommandFromTaskParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
const BaseType_t xAutoReload ) FREERTOS_SYSTEM_CALL; const BaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
@ -352,12 +282,12 @@ TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
* with all the APIs. */ * with all the APIs. */
TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName,
const TickType_t xTimerPeriodInTicks, const TickType_t xTimerPeriodInTicks,
const BaseType_t xAutoReload, const UBaseType_t uxAutoReload,
void * const pvTimerID, void * const pvTimerID,
TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION; TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION;
TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName,
const TickType_t xTimerPeriodInTicks, const TickType_t xTimerPeriodInTicks,
const BaseType_t xAutoReload, const UBaseType_t uxAutoReload,
void * const pvTimerID, void * const pvTimerID,
TimerCallbackFunction_t pxCallbackFunction, TimerCallbackFunction_t pxCallbackFunction,
StaticTimer_t * pxTimerBuffer ) PRIVILEGED_FUNCTION; StaticTimer_t * pxTimerBuffer ) PRIVILEGED_FUNCTION;
@ -388,25 +318,14 @@ EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup,
UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) FREERTOS_SYSTEM_CALL;
void MPU_vEventGroupSetNumber( void * xEventGroup, void MPU_vEventGroupSetNumber( void * xEventGroup,
UBaseType_t uxEventGroupNumber ) FREERTOS_SYSTEM_CALL; UBaseType_t uxEventGroupNumber ) FREERTOS_SYSTEM_CALL;
#endif /* #if ( configUSE_TRACE_FACILITY == 1 ) */ #endif /* ( configUSE_TRACE_FACILITY == 1 )*/
/* Privileged only wrappers for Event Group APIs. These are needed so that /* Privileged only wrappers for Event Group APIs. These are needed so that
* the application can use opaque handles maintained in mpu_wrappers.c * the application can use opaque handles maintained in mpu_wrappers.c
* with all the APIs. */ * with all the APIs. */
#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL;
EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL;
#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
EventGroupHandle_t MPU_xEventGroupCreate( void ) PRIVILEGED_FUNCTION; EventGroupHandle_t MPU_xEventGroupCreate( void ) PRIVILEGED_FUNCTION;
EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) PRIVILEGED_FUNCTION; EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) PRIVILEGED_FUNCTION;
void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
BaseType_t MPU_xEventGroupGetStaticBuffer( EventGroupHandle_t xEventGroup, BaseType_t MPU_xEventGroupGetStaticBuffer( EventGroupHandle_t xEventGroup,
StaticEventGroup_t ** ppxEventGroupBuffer ) PRIVILEGED_FUNCTION; StaticEventGroup_t ** ppxEventGroupBuffer ) PRIVILEGED_FUNCTION;
BaseType_t MPU_xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, BaseType_t MPU_xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup,
@ -436,25 +355,6 @@ size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuff
/* Privileged only wrappers for Stream Buffer APIs. These are needed so that /* Privileged only wrappers for Stream Buffer APIs. These are needed so that
* the application can use opaque handles maintained in mpu_wrappers.c * the application can use opaque handles maintained in mpu_wrappers.c
* with all the APIs. */ * with all the APIs. */
#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
size_t xTriggerLevelBytes,
BaseType_t xStreamBufferType,
StreamBufferCallbackFunction_t pxSendCompletedCallback,
StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) FREERTOS_SYSTEM_CALL;
StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
size_t xTriggerLevelBytes,
BaseType_t xStreamBufferType,
uint8_t * const pucStreamBufferStorageArea,
StaticStreamBuffer_t * const pxStaticStreamBuffer,
StreamBufferCallbackFunction_t pxSendCompletedCallback,
StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) FREERTOS_SYSTEM_CALL;
void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes, StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
size_t xTriggerLevelBytes, size_t xTriggerLevelBytes,
BaseType_t xStreamBufferType, BaseType_t xStreamBufferType,
@ -469,9 +369,6 @@ size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuff
StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION; StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
BaseType_t MPU_xStreamBufferGetStaticBuffers( StreamBufferHandle_t xStreamBuffers, BaseType_t MPU_xStreamBufferGetStaticBuffers( StreamBufferHandle_t xStreamBuffers,
uint8_t * ppucStreamBufferStorageArea, uint8_t * ppucStreamBufferStorageArea,
StaticStreamBuffer_t * ppxStaticStreamBuffer ) PRIVILEGED_FUNCTION; StaticStreamBuffer_t * ppxStaticStreamBuffer ) PRIVILEGED_FUNCTION;

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -85,18 +85,6 @@
/* Privileged only wrappers for Task APIs. These are needed so that /* Privileged only wrappers for Task APIs. These are needed so that
* the application can use opaque handles maintained in mpu_wrappers.c * the application can use opaque handles maintained in mpu_wrappers.c
* with all the APIs. */ * with all the APIs. */
#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
/* These are not needed in v2 because they do not take a task
* handle and therefore, no lookup is needed. Needed in v1 because
* these are available as system calls in v1. */
#define vTaskGetRunTimeStatistics MPU_vTaskGetRunTimeStatistics
#define vTaskListTasks MPU_vTaskListTasks
#define vTaskSuspendAll MPU_vTaskSuspendAll
#define xTaskCatchUpTicks MPU_xTaskCatchUpTicks
#define xTaskResumeAll MPU_xTaskResumeAll
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
#define xTaskCreate MPU_xTaskCreate #define xTaskCreate MPU_xTaskCreate
#define xTaskCreateStatic MPU_xTaskCreateStatic #define xTaskCreateStatic MPU_xTaskCreateStatic
#define vTaskDelete MPU_vTaskDelete #define vTaskDelete MPU_vTaskDelete
@ -150,7 +138,6 @@
#define xQueueGenericCreateStatic MPU_xQueueGenericCreateStatic #define xQueueGenericCreateStatic MPU_xQueueGenericCreateStatic
#define xQueueGenericReset MPU_xQueueGenericReset #define xQueueGenericReset MPU_xQueueGenericReset
#define xQueueCreateSet MPU_xQueueCreateSet #define xQueueCreateSet MPU_xQueueCreateSet
#define xQueueCreateSetStatic MPU_xQueueCreateSetStatic
#define xQueueRemoveFromSet MPU_xQueueRemoveFromSet #define xQueueRemoveFromSet MPU_xQueueRemoveFromSet
#if ( configUSE_MPU_WRAPPERS_V1 == 0 ) #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
@ -178,14 +165,11 @@
#define xTimerGetPeriod MPU_xTimerGetPeriod #define xTimerGetPeriod MPU_xTimerGetPeriod
#define xTimerGetExpiryTime MPU_xTimerGetExpiryTime #define xTimerGetExpiryTime MPU_xTimerGetExpiryTime
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
#define xTimerGetReloadMode MPU_xTimerGetReloadMode
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/* Privileged only wrappers for Timer APIs. These are needed so that /* Privileged only wrappers for Timer APIs. These are needed so that
* the application can use opaque handles maintained in mpu_wrappers.c * the application can use opaque handles maintained in mpu_wrappers.c
* with all the APIs. */ * with all the APIs. */
#if ( configUSE_MPU_WRAPPERS_V1 == 0 ) #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
#define xTimerGetReloadMode MPU_xTimerGetReloadMode
#define xTimerCreate MPU_xTimerCreate #define xTimerCreate MPU_xTimerCreate
#define xTimerCreateStatic MPU_xTimerCreateStatic #define xTimerCreateStatic MPU_xTimerCreateStatic
#define xTimerGetStaticBuffer MPU_xTimerGetStaticBuffer #define xTimerGetStaticBuffer MPU_xTimerGetStaticBuffer

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -85,14 +85,6 @@
#define portARCH_NAME NULL #define portARCH_NAME NULL
#endif #endif
#ifndef portBASE_TYPE_ENTER_CRITICAL
#define portBASE_TYPE_ENTER_CRITICAL() taskENTER_CRITICAL()
#endif
#ifndef portBASE_TYPE_EXIT_CRITICAL
#define portBASE_TYPE_EXIT_CRITICAL() taskEXIT_CRITICAL()
#endif
#ifndef configSTACK_DEPTH_TYPE #ifndef configSTACK_DEPTH_TYPE
#define configSTACK_DEPTH_TYPE StackType_t #define configSTACK_DEPTH_TYPE StackType_t
#endif #endif
@ -102,14 +94,14 @@
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 #define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
#endif #endif
#include "mpu_wrappers.h"
/* *INDENT-OFF* */ /* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */ /* *INDENT-ON* */
#include "mpu_wrappers.h"
/* /*
* Setup the stack of a new task so it is ready to be placed under the * Setup the stack of a new task so it is ready to be placed under the
* scheduler control. The registers have to be placed on the stack in * scheduler control. The registers have to be placed on the stack in
@ -193,7 +185,6 @@ void vPortFree( void * pv ) PRIVILEGED_FUNCTION;
void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION; void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION; size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION; size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
void xPortResetHeapMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
#if ( configSTACK_ALLOCATION_FROM_SEPARATE_HEAP == 1 ) #if ( configSTACK_ALLOCATION_FROM_SEPARATE_HEAP == 1 )
void * pvPortMallocStack( size_t xSize ) PRIVILEGED_FUNCTION; void * pvPortMallocStack( size_t xSize ) PRIVILEGED_FUNCTION;

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -34,14 +34,14 @@
#error "include FreeRTOS.h" must appear in source files before "include queue.h" #error "include FreeRTOS.h" must appear in source files before "include queue.h"
#endif #endif
#include "task.h"
/* *INDENT-OFF* */ /* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */ /* *INDENT-ON* */
#include "task.h"
/** /**
* Type by which queues are referenced. For example, a call to xQueueCreate() * Type by which queues are referenced. For example, a call to xQueueCreate()
* returns an QueueHandle_t variable that can then be used as a parameter to * returns an QueueHandle_t variable that can then be used as a parameter to
@ -71,11 +71,11 @@ typedef struct QueueDefinition * QueueSetMemberHandle_t;
/* For internal use only. These definitions *must* match those in queue.c. */ /* For internal use only. These definitions *must* match those in queue.c. */
#define queueQUEUE_TYPE_BASE ( ( uint8_t ) 0U ) #define queueQUEUE_TYPE_BASE ( ( uint8_t ) 0U )
#define queueQUEUE_TYPE_SET ( ( uint8_t ) 0U )
#define queueQUEUE_TYPE_MUTEX ( ( uint8_t ) 1U ) #define queueQUEUE_TYPE_MUTEX ( ( uint8_t ) 1U )
#define queueQUEUE_TYPE_COUNTING_SEMAPHORE ( ( uint8_t ) 2U ) #define queueQUEUE_TYPE_COUNTING_SEMAPHORE ( ( uint8_t ) 2U )
#define queueQUEUE_TYPE_BINARY_SEMAPHORE ( ( uint8_t ) 3U ) #define queueQUEUE_TYPE_BINARY_SEMAPHORE ( ( uint8_t ) 3U )
#define queueQUEUE_TYPE_RECURSIVE_MUTEX ( ( uint8_t ) 4U ) #define queueQUEUE_TYPE_RECURSIVE_MUTEX ( ( uint8_t ) 4U )
#define queueQUEUE_TYPE_SET ( ( uint8_t ) 5U )
/** /**
* queue. h * queue. h
@ -109,7 +109,7 @@ typedef struct QueueDefinition * QueueSetMemberHandle_t;
* the same size. * the same size.
* *
* @return If the queue is successfully create then a handle to the newly * @return If the queue is successfully create then a handle to the newly
* created queue is returned. If the queue cannot be created then NULL is * created queue is returned. If the queue cannot be created then 0 is
* returned. * returned.
* *
* Example usage: * Example usage:
@ -126,7 +126,7 @@ typedef struct QueueDefinition * QueueSetMemberHandle_t;
* *
* // Create a queue capable of containing 10 uint32_t values. * // Create a queue capable of containing 10 uint32_t values.
* xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) ); * xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
* if( xQueue1 == NULL ) * if( xQueue1 == 0 )
* { * {
* // Queue was not created and must not be used. * // Queue was not created and must not be used.
* } * }
@ -134,7 +134,7 @@ typedef struct QueueDefinition * QueueSetMemberHandle_t;
* // Create a queue capable of containing 10 pointers to AMessage structures. * // Create a queue capable of containing 10 pointers to AMessage structures.
* // These should be passed by pointer as they contain a lot of data. * // These should be passed by pointer as they contain a lot of data.
* xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) ); * xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
* if( xQueue2 == NULL ) * if( xQueue2 == 0 )
* { * {
* // Queue was not created and must not be used. * // Queue was not created and must not be used.
* } * }
@ -292,7 +292,7 @@ typedef struct QueueDefinition * QueueSetMemberHandle_t;
* queue is full. The time is defined in tick periods so the constant * queue is full. The time is defined in tick periods so the constant
* portTICK_PERIOD_MS should be used to convert to real time if this is required. * portTICK_PERIOD_MS should be used to convert to real time if this is required.
* *
* @return pdPASS if the item was successfully posted, otherwise errQUEUE_FULL. * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
* *
* Example usage: * Example usage:
* @code{c} * @code{c}
@ -375,7 +375,7 @@ typedef struct QueueDefinition * QueueSetMemberHandle_t;
* is full. The time is defined in tick periods so the constant * is full. The time is defined in tick periods so the constant
* portTICK_PERIOD_MS should be used to convert to real time if this is required. * portTICK_PERIOD_MS should be used to convert to real time if this is required.
* *
* @return pdPASS if the item was successfully posted, otherwise errQUEUE_FULL. * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
* *
* Example usage: * Example usage:
* @code{c} * @code{c}
@ -460,7 +460,7 @@ typedef struct QueueDefinition * QueueSetMemberHandle_t;
* queue is full. The time is defined in tick periods so the constant * queue is full. The time is defined in tick periods so the constant
* portTICK_PERIOD_MS should be used to convert to real time if this is required. * portTICK_PERIOD_MS should be used to convert to real time if this is required.
* *
* @return pdPASS if the item was successfully posted, otherwise errQUEUE_FULL. * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
* *
* Example usage: * Example usage:
* @code{c} * @code{c}
@ -633,7 +633,7 @@ typedef struct QueueDefinition * QueueSetMemberHandle_t;
* item at the back of the queue, or queueSEND_TO_FRONT to place the item * item at the back of the queue, or queueSEND_TO_FRONT to place the item
* at the front of the queue (for high priority messages). * at the front of the queue (for high priority messages).
* *
* @return pdPASS if the item was successfully posted, otherwise errQUEUE_FULL. * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
* *
* Example usage: * Example usage:
* @code{c} * @code{c}
@ -723,8 +723,8 @@ BaseType_t xQueueGenericSend( QueueHandle_t xQueue,
* xQueuePeek() will return immediately if xTicksToWait is 0 and the queue * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue
* is empty. * is empty.
* *
* @return pdPASS if an item was successfully received from the queue, * @return pdTRUE if an item was successfully received from the queue,
* otherwise errQUEUE_EMPTY. * otherwise pdFALSE.
* *
* Example usage: * Example usage:
* @code{c} * @code{c}
@ -811,8 +811,8 @@ BaseType_t xQueuePeek( QueueHandle_t xQueue,
* @param pvBuffer Pointer to the buffer into which the received item will * @param pvBuffer Pointer to the buffer into which the received item will
* be copied. * be copied.
* *
* @return pdPASS if an item was successfully received from the queue, * @return pdTRUE if an item was successfully received from the queue,
* otherwise pdFAIL. * otherwise pdFALSE.
* *
* \defgroup xQueuePeekFromISR xQueuePeekFromISR * \defgroup xQueuePeekFromISR xQueuePeekFromISR
* \ingroup QueueManagement * \ingroup QueueManagement
@ -852,8 +852,8 @@ BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
* constant portTICK_PERIOD_MS should be used to convert to real time if this is * constant portTICK_PERIOD_MS should be used to convert to real time if this is
* required. * required.
* *
* @return pdPASS if an item was successfully received from the queue, * @return pdTRUE if an item was successfully received from the queue,
* otherwise errQUEUE_EMPTY. * otherwise pdFALSE.
* *
* Example usage: * Example usage:
* @code{c} * @code{c}
@ -998,7 +998,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
* running task. If xQueueSendToFrontFromISR() sets this value to pdTRUE then * running task. If xQueueSendToFrontFromISR() sets this value to pdTRUE then
* a context switch should be requested before the interrupt is exited. * a context switch should be requested before the interrupt is exited.
* *
* @return pdPASS if the data was successfully sent to the queue, otherwise * @return pdTRUE if the data was successfully sent to the queue, otherwise
* errQUEUE_FULL. * errQUEUE_FULL.
* *
* Example usage for buffered IO (where the ISR can obtain more than one value * Example usage for buffered IO (where the ISR can obtain more than one value
@ -1070,7 +1070,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
* running task. If xQueueSendToBackFromISR() sets this value to pdTRUE then * running task. If xQueueSendToBackFromISR() sets this value to pdTRUE then
* a context switch should be requested before the interrupt is exited. * a context switch should be requested before the interrupt is exited.
* *
* @return pdPASS if the data was successfully sent to the queue, otherwise * @return pdTRUE if the data was successfully sent to the queue, otherwise
* errQUEUE_FULL. * errQUEUE_FULL.
* *
* Example usage for buffered IO (where the ISR can obtain more than one value * Example usage for buffered IO (where the ISR can obtain more than one value
@ -1235,7 +1235,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
* running task. If xQueueSendFromISR() sets this value to pdTRUE then * running task. If xQueueSendFromISR() sets this value to pdTRUE then
* a context switch should be requested before the interrupt is exited. * a context switch should be requested before the interrupt is exited.
* *
* @return pdPASS if the data was successfully sent to the queue, otherwise * @return pdTRUE if the data was successfully sent to the queue, otherwise
* errQUEUE_FULL. * errQUEUE_FULL.
* *
* Example usage for buffered IO (where the ISR can obtain more than one value * Example usage for buffered IO (where the ISR can obtain more than one value
@ -1318,7 +1318,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
* item at the back of the queue, or queueSEND_TO_FRONT to place the item * item at the back of the queue, or queueSEND_TO_FRONT to place the item
* at the front of the queue (for high priority messages). * at the front of the queue (for high priority messages).
* *
* @return pdPASS if the data was successfully sent to the queue, otherwise * @return pdTRUE if the data was successfully sent to the queue, otherwise
* errQUEUE_FULL. * errQUEUE_FULL.
* *
* Example usage for buffered IO (where the ISR can obtain more than one value * Example usage for buffered IO (where the ISR can obtain more than one value
@ -1389,8 +1389,8 @@ BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
* to unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will * to unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will
* remain unchanged. * remain unchanged.
* *
* @return pdPASS if an item was successfully received from the queue, * @return pdTRUE if an item was successfully received from the queue,
* otherwise pdFAIL. * otherwise pdFALSE.
* *
* Example usage: * Example usage:
* @code{c} * @code{c}
@ -1638,14 +1638,14 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
* See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
* function. * function.
* *
* A queue set must be explicitly created using a call to xQueueCreateSet() or * A queue set must be explicitly created using a call to xQueueCreateSet()
* xQueueCreateSetStatic() before it can be used. Once created, standard * before it can be used. Once created, standard FreeRTOS queues and semaphores
* FreeRTOS queues and semaphores can be added to the set using calls to * can be added to the set using calls to xQueueAddToSet().
* xQueueAddToSet(). xQueueSelectFromSet() is then used to determine which, if * xQueueSelectFromSet() is then used to determine which, if any, of the queues
* any, of the queues or semaphores contained in the set is in a state where a * or semaphores contained in the set is in a state where a queue read or
* queue read or semaphore take operation would be successful. * semaphore take operation would be successful.
* *
* Note 1: See the documentation on https://www.freertos.org/Documentation/02-Kernel/04-API-references/07-Queue-sets/00-RTOS-queue-sets * Note 1: See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html
* for reasons why queue sets are very rarely needed in practice as there are * for reasons why queue sets are very rarely needed in practice as there are
* simpler methods of blocking on multiple objects. * simpler methods of blocking on multiple objects.
* *
@ -1683,69 +1683,9 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION; QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
#endif #endif
/*
* Queue sets provide a mechanism to allow a task to block (pend) on a read
* operation from multiple queues or semaphores simultaneously.
*
* See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
* function.
*
* A queue set must be explicitly created using a call to xQueueCreateSet()
* or xQueueCreateSetStatic() before it can be used. Once created, standard
* FreeRTOS queues and semaphores can be added to the set using calls to
* xQueueAddToSet(). xQueueSelectFromSet() is then used to determine which, if
* any, of the queues or semaphores contained in the set is in a state where a
* queue read or semaphore take operation would be successful.
*
* Note 1: See the documentation on https://www.freertos.org/Documentation/02-Kernel/04-API-references/07-Queue-sets/00-RTOS-queue-sets
* for reasons why queue sets are very rarely needed in practice as there are
* simpler methods of blocking on multiple objects.
*
* Note 2: Blocking on a queue set that contains a mutex will not cause the
* mutex holder to inherit the priority of the blocked task.
*
* Note 3: An additional 4 bytes of RAM is required for each space in a every
* queue added to a queue set. Therefore counting semaphores that have a high
* maximum count value should not be added to a queue set.
*
* Note 4: A receive (in the case of a queue) or take (in the case of a
* semaphore) operation must not be performed on a member of a queue set unless
* a call to xQueueSelectFromSet() has first returned a handle to that set member.
*
* @param uxEventQueueLength Queue sets store events that occur on
* the queues and semaphores contained in the set. uxEventQueueLength specifies
* the maximum number of events that can be queued at once. To be absolutely
* certain that events are not lost uxEventQueueLength should be set to the
* total sum of the length of the queues added to the set, where binary
* semaphores and mutexes have a length of 1, and counting semaphores have a
* length set by their maximum count value. Examples:
* + If a queue set is to hold a queue of length 5, another queue of length 12,
* and a binary semaphore, then uxEventQueueLength should be set to
* (5 + 12 + 1), or 18.
* + If a queue set is to hold three binary semaphores then uxEventQueueLength
* should be set to (1 + 1 + 1 ), or 3.
* + If a queue set is to hold a counting semaphore that has a maximum count of
* 5, and a counting semaphore that has a maximum count of 3, then
* uxEventQueueLength should be set to (5 + 3), or 8.
*
* @param pucQueueStorage pucQueueStorage must point to a uint8_t array that is
* at least large enough to hold uxEventQueueLength events.
*
* @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which
* will be used to hold the queue's data structure.
*
* @return If the queue set is created successfully then a handle to the created
* queue set is returned. If pxQueueBuffer is NULL then NULL is returned.
*/
#if ( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
QueueSetHandle_t xQueueCreateSetStatic( const UBaseType_t uxEventQueueLength,
uint8_t * pucQueueStorage,
StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
#endif
/* /*
* Adds a queue or semaphore to a queue set that was previously created by a * Adds a queue or semaphore to a queue set that was previously created by a
* call to xQueueCreateSet() or xQueueCreateSetStatic(). * call to xQueueCreateSet().
* *
* See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
* function. * function.
@ -1802,7 +1742,7 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
* See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
* function. * function.
* *
* Note 1: See the documentation on https://www.freertos.org/Documentation/02-Kernel/04-API-references/07-Queue-sets/00-RTOS-queue-sets * Note 1: See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html
* for reasons why queue sets are very rarely needed in practice as there are * for reasons why queue sets are very rarely needed in practice as there are
* simpler methods of blocking on multiple objects. * simpler methods of blocking on multiple objects.
* *

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -53,23 +53,11 @@
#define portSTACK_LIMIT_PADDING 0 #define portSTACK_LIMIT_PADDING 0
#endif #endif
/* Stack overflow check is not straight forward to implement for MPU ports #if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
* because of the following reasons:
* 1. The context is stored in TCB and as a result, pxTopOfStack member points
* to the context location in TCB.
* 2. System calls are executed on a separate privileged only stack.
*
* It is still okay because an MPU region is used to protect task stack which
* means task stack overflow will trigger an MPU fault for unprivileged tasks.
* Additionally, architectures with hardware stack overflow checking support
* (such as Armv8-M) will trigger a fault when a task's stack overflows.
*/
#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) )
/* Only the current stack state is to be checked. */ /* Only the current stack state is to be checked. */
#define taskCHECK_FOR_STACK_OVERFLOW() \ #define taskCHECK_FOR_STACK_OVERFLOW() \
do \ do { \
{ \
/* Is the currently saved stack pointer within the stack limit? */ \ /* Is the currently saved stack pointer within the stack limit? */ \
if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack + portSTACK_LIMIT_PADDING ) \ if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack + portSTACK_LIMIT_PADDING ) \
{ \ { \
@ -81,12 +69,12 @@
#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) ) #if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
/* Only the current stack state is to be checked. */ /* Only the current stack state is to be checked. */
#define taskCHECK_FOR_STACK_OVERFLOW() \ #define taskCHECK_FOR_STACK_OVERFLOW() \
do \ do { \
{ \ \
/* Is the currently saved stack pointer within the stack limit? */ \ /* Is the currently saved stack pointer within the stack limit? */ \
if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack - portSTACK_LIMIT_PADDING ) \ if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack - portSTACK_LIMIT_PADDING ) \
{ \ { \
@ -98,16 +86,14 @@
#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) ) #if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
#define taskCHECK_FOR_STACK_OVERFLOW() \ #define taskCHECK_FOR_STACK_OVERFLOW() \
do \ do { \
{ \
const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \
const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5U; \ const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5U; \
\ \
if( ( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack + portSTACK_LIMIT_PADDING ) || \ if( ( pulStack[ 0 ] != ulCheckValue ) || \
( pulStack[ 0 ] != ulCheckValue ) || \
( pulStack[ 1 ] != ulCheckValue ) || \ ( pulStack[ 1 ] != ulCheckValue ) || \
( pulStack[ 2 ] != ulCheckValue ) || \ ( pulStack[ 2 ] != ulCheckValue ) || \
( pulStack[ 3 ] != ulCheckValue ) ) \ ( pulStack[ 3 ] != ulCheckValue ) ) \
@ -120,11 +106,10 @@
#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) ) #if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
#define taskCHECK_FOR_STACK_OVERFLOW() \ #define taskCHECK_FOR_STACK_OVERFLOW() \
do \ do { \
{ \
int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \
static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
@ -132,10 +117,11 @@
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
\ \
\
pcEndOfStack -= sizeof( ucExpectedStackBytes ); \ pcEndOfStack -= sizeof( ucExpectedStackBytes ); \
\ \
if( ( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack - portSTACK_LIMIT_PADDING ) || \ /* Has the extremity of the task stack ever been written over? */ \
( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) ) \ if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \
{ \ { \
char * pcOverflowTaskName = pxCurrentTCB->pcTaskName; \ char * pcOverflowTaskName = pxCurrentTCB->pcTaskName; \
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName ); \ vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName ); \

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -40,12 +40,12 @@
* writer and reader to be different tasks or interrupts, but, unlike other * writer and reader to be different tasks or interrupts, but, unlike other
* FreeRTOS objects, it is not safe to have multiple different writers or * FreeRTOS objects, it is not safe to have multiple different writers or
* multiple different readers. If there are to be multiple different writers * multiple different readers. If there are to be multiple different writers
* then the application writer must serialize calls to writing API functions * then the application writer must place each call to a writing API function
* (such as xStreamBufferSend()). Likewise, if there are to be multiple * (such as xStreamBufferSend()) inside a critical section and set the send
* different readers then the application writer must serialize calls to reading * block time to 0. Likewise, if there are to be multiple different readers
* API functions (such as xStreamBufferReceive()). One way to achieve such * then the application writer must place each call to a reading API function
* serialization in single core or SMP kernel is to place each API call inside a * (such as xStreamBufferReceive()) inside a critical section section and set the
* critical section and use a block time of 0. * receive block time to 0.
* *
*/ */
@ -514,12 +514,12 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
* writer and reader to be different tasks or interrupts, but, unlike other * writer and reader to be different tasks or interrupts, but, unlike other
* FreeRTOS objects, it is not safe to have multiple different writers or * FreeRTOS objects, it is not safe to have multiple different writers or
* multiple different readers. If there are to be multiple different writers * multiple different readers. If there are to be multiple different writers
* then the application writer must serialize calls to writing API functions * then the application writer must place each call to a writing API function
* (such as xStreamBufferSend()). Likewise, if there are to be multiple * (such as xStreamBufferSend()) inside a critical section and set the send
* different readers then the application writer must serialize calls to reading * block time to 0. Likewise, if there are to be multiple different readers
* API functions (such as xStreamBufferReceive()). One way to achieve such * then the application writer must place each call to a reading API function
* serialization in single core or SMP kernel is to place each API call inside a * (such as xStreamBufferReceive()) inside a critical section and set the receive
* critical section and use a block time of 0. * block time to 0.
* *
* Use xStreamBufferSend() to write to a stream buffer from a task. Use * Use xStreamBufferSend() to write to a stream buffer from a task. Use
* xStreamBufferSendFromISR() to write to a stream buffer from an interrupt * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
@ -615,12 +615,12 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
* writer and reader to be different tasks or interrupts, but, unlike other * writer and reader to be different tasks or interrupts, but, unlike other
* FreeRTOS objects, it is not safe to have multiple different writers or * FreeRTOS objects, it is not safe to have multiple different writers or
* multiple different readers. If there are to be multiple different writers * multiple different readers. If there are to be multiple different writers
* then the application writer must serialize calls to writing API functions * then the application writer must place each call to a writing API function
* (such as xStreamBufferSend()). Likewise, if there are to be multiple * (such as xStreamBufferSend()) inside a critical section and set the send
* different readers then the application writer must serialize calls to reading * block time to 0. Likewise, if there are to be multiple different readers
* API functions (such as xStreamBufferReceive()). One way to achieve such * then the application writer must place each call to a reading API function
* serialization in single core or SMP kernel is to place each API call inside a * (such as xStreamBufferReceive()) inside a critical section and set the receive
* critical section and use a block time of 0. * block time to 0.
* *
* Use xStreamBufferSend() to write to a stream buffer from a task. Use * Use xStreamBufferSend() to write to a stream buffer from a task. Use
* xStreamBufferSendFromISR() to write to a stream buffer from an interrupt * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
@ -718,12 +718,12 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
* writer and reader to be different tasks or interrupts, but, unlike other * writer and reader to be different tasks or interrupts, but, unlike other
* FreeRTOS objects, it is not safe to have multiple different writers or * FreeRTOS objects, it is not safe to have multiple different writers or
* multiple different readers. If there are to be multiple different writers * multiple different readers. If there are to be multiple different writers
* then the application writer must serialize calls to writing API functions * then the application writer must place each call to a writing API function
* (such as xStreamBufferSend()). Likewise, if there are to be multiple * (such as xStreamBufferSend()) inside a critical section and set the send
* different readers then the application writer must serialize calls to reading * block time to 0. Likewise, if there are to be multiple different readers
* API functions (such as xStreamBufferReceive()). One way to achieve such * then the application writer must place each call to a reading API function
* serialization in single core or SMP kernel is to place each API call inside a * (such as xStreamBufferReceive()) inside a critical section and set the receive
* critical section and use a block time of 0. * block time to 0.
* *
* Use xStreamBufferReceive() to read from a stream buffer from a task. Use * Use xStreamBufferReceive() to read from a stream buffer from a task. Use
* xStreamBufferReceiveFromISR() to read from a stream buffer from an * xStreamBufferReceiveFromISR() to read from a stream buffer from an

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -53,7 +53,7 @@
* The tskKERNEL_VERSION_MAJOR, tskKERNEL_VERSION_MINOR, tskKERNEL_VERSION_BUILD * The tskKERNEL_VERSION_MAJOR, tskKERNEL_VERSION_MINOR, tskKERNEL_VERSION_BUILD
* values will reflect the last released version number. * values will reflect the last released version number.
*/ */
#define tskKERNEL_VERSION_NUMBER "V11.1.0+" #define tskKERNEL_VERSION_NUMBER "V11.1.0"
#define tskKERNEL_VERSION_MAJOR 11 #define tskKERNEL_VERSION_MAJOR 11
#define tskKERNEL_VERSION_MINOR 1 #define tskKERNEL_VERSION_MINOR 1
#define tskKERNEL_VERSION_BUILD 0 #define tskKERNEL_VERSION_BUILD 0
@ -65,9 +65,6 @@
#define tskMPU_REGION_EXECUTE_NEVER ( 1U << 2U ) #define tskMPU_REGION_EXECUTE_NEVER ( 1U << 2U )
#define tskMPU_REGION_NORMAL_MEMORY ( 1U << 3U ) #define tskMPU_REGION_NORMAL_MEMORY ( 1U << 3U )
#define tskMPU_REGION_DEVICE_MEMORY ( 1U << 4U ) #define tskMPU_REGION_DEVICE_MEMORY ( 1U << 4U )
#if defined( portARMV8M_MINOR_VERSION ) && ( portARMV8M_MINOR_VERSION >= 1 )
#define tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ( 1U << 5U )
#endif /* portARMV8M_MINOR_VERSION >= 1 */
/* MPU region permissions stored in MPU settings to /* MPU region permissions stored in MPU settings to
* authorize access requests. */ * authorize access requests. */
@ -164,7 +161,7 @@ typedef struct xTASK_STATUS
{ {
TaskHandle_t xHandle; /* The handle of the task to which the rest of the information in the structure relates. */ TaskHandle_t xHandle; /* The handle of the task to which the rest of the information in the structure relates. */
const char * pcTaskName; /* A pointer to the task's name. This value will be invalid if the task was deleted since the structure was populated! */ const char * pcTaskName; /* A pointer to the task's name. This value will be invalid if the task was deleted since the structure was populated! */
UBaseType_t xTaskNumber; /* A number unique to the task. Note that this is not the task number that may be modified using vTaskSetTaskNumber() and uxTaskGetTaskNumber(), but a separate TCB-specific and unique identifier automatically assigned on task generation. */ UBaseType_t xTaskNumber; /* A number unique to the task. */
eTaskState eCurrentState; /* The state in which the task existed when the structure was populated. */ eTaskState eCurrentState; /* The state in which the task existed when the structure was populated. */
UBaseType_t uxCurrentPriority; /* The priority at which the task was running (may be inherited) when the structure was populated. */ UBaseType_t uxCurrentPriority; /* The priority at which the task was running (may be inherited) when the structure was populated. */
UBaseType_t uxBasePriority; /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex. Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */ UBaseType_t uxBasePriority; /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex. Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */
@ -2199,8 +2196,8 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
* Lists all the current tasks, along with their current state and stack * Lists all the current tasks, along with their current state and stack
* usage high water mark. * usage high water mark.
* *
* Tasks are reported as running ('X'), blocked ('B'), ready ('R'), deleted ('D') * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or
* or suspended ('S'). * suspended ('S').
* *
* PLEASE NOTE: * PLEASE NOTE:
* *
@ -2208,16 +2205,8 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
* demo applications. Do not consider it to be part of the scheduler. * demo applications. Do not consider it to be part of the scheduler.
* *
* vTaskListTasks() calls uxTaskGetSystemState(), then formats part of the * vTaskListTasks() calls uxTaskGetSystemState(), then formats part of the
* uxTaskGetSystemState() output into a human readable table that displays task * uxTaskGetSystemState() output into a human readable table that displays task:
* information in the following format: * names, states, priority, stack usage and task number.
* Task Name, Task State, Task Priority, Task Stack High Watermak, Task Number.
*
* The following is a sample output:
* Task A X 2 67 2
* Task B R 1 67 3
* IDLE R 0 67 5
* Tmr Svc B 6 137 6
*
* Stack usage specified as the number of unused StackType_t words stack can hold * Stack usage specified as the number of unused StackType_t words stack can hold
* on top of stack - not the number of bytes. * on top of stack - not the number of bytes.
* *
@ -2268,8 +2257,8 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
* Lists all the current tasks, along with their current state and stack * Lists all the current tasks, along with their current state and stack
* usage high water mark. * usage high water mark.
* *
* Tasks are reported as running ('X'), blocked ('B'), ready ('R'), deleted ('D') * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or
* or suspended ('S'). * suspended ('S').
* *
* PLEASE NOTE: * PLEASE NOTE:
* *
@ -2277,16 +2266,8 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
* demo applications. Do not consider it to be part of the scheduler. * demo applications. Do not consider it to be part of the scheduler.
* *
* vTaskList() calls uxTaskGetSystemState(), then formats part of the * vTaskList() calls uxTaskGetSystemState(), then formats part of the
* uxTaskGetSystemState() output into a human readable table that displays task * uxTaskGetSystemState() output into a human readable table that displays task:
* information in the following format: * names, states, priority, stack usage and task number.
* Task Name, Task State, Task Priority, Task Stack High Watermak, Task Number.
*
* The following is a sample output:
* Task A X 2 67 2
* Task B R 1 67 3
* IDLE R 0 67 5
* Tmr Svc B 6 137 6
*
* Stack usage specified as the number of unused StackType_t words stack can hold * Stack usage specified as the number of unused StackType_t words stack can hold
* on top of stack - not the number of bytes. * on top of stack - not the number of bytes.
* *
@ -2388,7 +2369,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
* *
* WARN: This function assumes that the pcWriteBuffer is of length * WARN: This function assumes that the pcWriteBuffer is of length
* configSTATS_BUFFER_MAX_LENGTH. This function is there only for * configSTATS_BUFFER_MAX_LENGTH. This function is there only for
* backward compatibility. New applications are recommended to use * backward compatiblity. New applications are recommended to use
* vTaskGetRunTimeStatistics and supply the length of the pcWriteBuffer * vTaskGetRunTimeStatistics and supply the length of the pcWriteBuffer
* explicitly. * explicitly.
* *

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -737,16 +737,12 @@ TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
* // The key press event handler. * // The key press event handler.
* void vKeyPressEventHandler( char cKey ) * void vKeyPressEventHandler( char cKey )
* { * {
* // Reset the timer that is responsible for turning the back-light off after * // Ensure the LCD back-light is on, then reset the timer that is
* // 5 seconds of key inactivity. Wait 10 ticks for the command to be * // responsible for turning the back-light off after 5 seconds of
* // successfully sent if it cannot be sent immediately. * // key inactivity. Wait 10 ticks for the command to be successfully sent
* if( xTimerReset( xBacklightTimer, 10 ) == pdPASS ) * // if it cannot be sent immediately.
* {
* // Turn on the LCD back-light. It will be turned off in the
* // vBacklightTimerCallback after 5 seconds of key inactivity.
* vSetBacklightState( BACKLIGHT_ON ); * vSetBacklightState( BACKLIGHT_ON );
* } * if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )
* else
* { * {
* // The reset command was not executed successfully. Take appropriate * // The reset command was not executed successfully. Take appropriate
* // action here. * // action here.
@ -757,11 +753,12 @@ TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
* *
* void main( void ) * void main( void )
* { * {
* int32_t x;
* *
* // Create then start the one-shot timer that is responsible for turning * // Create then start the one-shot timer that is responsible for turning
* // the back-light off if no keys are pressed within a 5 second period. * // the back-light off if no keys are pressed within a 5 second period.
* xBacklightTimer = xTimerCreate( "BacklightTimer", // Just a text name, not used by the kernel. * xBacklightTimer = xTimerCreate( "BacklightTimer", // Just a text name, not used by the kernel.
* pdMS_TO_TICKS( 5000 ), // The timer period in ticks. * ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks.
* pdFALSE, // The timer is a one-shot timer. * pdFALSE, // The timer is a one-shot timer.
* 0, // The id is not used by the callback so can take any value. * 0, // The id is not used by the callback so can take any value.
* vBacklightTimerCallback // The callback function that switches the LCD back-light off. * vBacklightTimerCallback // The callback function that switches the LCD back-light off.

8
list.c
View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -166,7 +166,7 @@ void vListInsert( List_t * const pxList,
{ {
/* *** NOTE *********************************************************** /* *** NOTE ***********************************************************
* If you find your application is crashing here then likely causes are * If you find your application is crashing here then likely causes are
* listed below. In addition see https://www.freertos.org/Why-FreeRTOS/FAQs for * listed below. In addition see https://www.FreeRTOS.org/FAQHelp.html for
* more tips, and ensure configASSERT() is defined! * more tips, and ensure configASSERT() is defined!
* https://www.FreeRTOS.org/a00110.html#configASSERT * https://www.FreeRTOS.org/a00110.html#configASSERT
* *
@ -192,9 +192,7 @@ void vListInsert( List_t * const pxList,
for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext )
{ {
/* There is nothing to do here, just iterating to the wanted /* There is nothing to do here, just iterating to the wanted
* insertion position. * insertion position. */
* IF YOU FIND YOUR CODE STUCK HERE, SEE THE NOTE JUST ABOVE.
*/
} }
} }

View file

@ -1,4 +1,4 @@
name : "FreeRTOS-Kernel" name : "FreeRTOS-Kernel"
version: "V11.0.1+" version: "v11.1.0"
description: "FreeRTOS Kernel." description: "FreeRTOS Kernel."
license: "MIT" license: "MIT"

View file

@ -1,5 +1,5 @@
#/* #/*
# * FreeRTOS Kernel <DEVELOPMENT BRANCH> # * FreeRTOS Kernel V11.1.0
# * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
# * # *
# * SPDX-License-Identifier: MIT # * SPDX-License-Identifier: MIT

View file

@ -1,8 +1,6 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* Copyright 2024 Arm Limited and/or its affiliates
* <open-source-office@arm.com>
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
@ -56,7 +54,7 @@
* The FreeRTOS Cortex M33 port can be configured to run on the Secure Side only * The FreeRTOS Cortex M33 port can be configured to run on the Secure Side only
* i.e. the processor boots as secure and never jumps to the non-secure side. * i.e. the processor boots as secure and never jumps to the non-secure side.
* The Trust Zone support in the port must be disabled in order to run FreeRTOS * The Trust Zone support in the port must be disabled in order to run FreeRTOS
* on the secure side. The following are the valid configuration settings: * on the secure side. The following are the valid configuration seetings:
* *
* 1. Run FreeRTOS on the Secure Side: * 1. Run FreeRTOS on the Secure Side:
* configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0 * configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0
@ -112,7 +110,6 @@ typedef void ( * portISR_t )( void );
#define portSCB_VTOR_REG ( *( ( portISR_t ** ) 0xe000ed08 ) ) #define portSCB_VTOR_REG ( *( ( portISR_t ** ) 0xe000ed08 ) )
#define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) )
#define portSCB_MEM_FAULT_ENABLE_BIT ( 1UL << 16UL ) #define portSCB_MEM_FAULT_ENABLE_BIT ( 1UL << 16UL )
#define portSCB_USG_FAULT_ENABLE_BIT ( 1UL << 18UL )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
@ -228,19 +225,15 @@ typedef void ( * portISR_t )( void );
#define portMPU_RLAR_REGION_ENABLE ( 1UL ) #define portMPU_RLAR_REGION_ENABLE ( 1UL )
#if ( portARMV8M_MINOR_VERSION >= 1 )
/* Enable Privileged eXecute Never MPU attribute for the selected memory
* region. */
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
#endif /* portARMV8M_MINOR_VERSION >= 1 */
/* Enable privileged access to unmapped region. */ /* Enable privileged access to unmapped region. */
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
/* Enable MPU. */ /* Enable MPU. */
#define portMPU_ENABLE_BIT ( 1UL << 0UL ) #define portMPU_ENABLE_BIT ( 1UL << 0UL )
/* Expected value of the portMPU_TYPE register. */
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
/* Extract first address of the MPU region as encoded in the /* Extract first address of the MPU region as encoded in the
* RBAR (Region Base Address Register) value. */ * RBAR (Region Base Address Register) value. */
#define portEXTRACT_FIRST_ADDRESS_FROM_RBAR( rbar ) \ #define portEXTRACT_FIRST_ADDRESS_FROM_RBAR( rbar ) \
@ -374,20 +367,6 @@ typedef void ( * portISR_t )( void );
* any secure calls. * any secure calls.
*/ */
#define portNO_SECURE_CONTEXT 0 #define portNO_SECURE_CONTEXT 0
/**
* @brief Constants required to check and configure PACBTI security feature implementation.
*/
#if ( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
#define portID_ISAR5_REG ( *( ( volatile uint32_t * ) 0xe000ed74 ) )
#define portCONTROL_UPAC_EN ( 1UL << 7UL )
#define portCONTROL_PAC_EN ( 1UL << 6UL )
#define portCONTROL_UBTI_EN ( 1UL << 5UL )
#define portCONTROL_BTI_EN ( 1UL << 4UL )
#endif /* configENABLE_PAC == 1 || configENABLE_BTI == 1 */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
@ -396,7 +375,7 @@ typedef void ( * portISR_t )( void );
*/ */
static void prvTaskExitError( void ); static void prvTaskExitError( void );
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) #if ( configENABLE_MPU == 1 )
/** /**
* @brief Extract MPU region's access permissions from the Region Base Address * @brief Extract MPU region's access permissions from the Region Base Address
@ -407,7 +386,7 @@ static void prvTaskExitError( void );
* @return uint32_t Access permissions. * @return uint32_t Access permissions.
*/ */
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) PRIVILEGED_FUNCTION; static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) PRIVILEGED_FUNCTION;
#endif /* configENABLE_MPU == 1 && configUSE_MPU_WRAPPERS_V1 == 0 */ #endif /* configENABLE_MPU */
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
@ -425,26 +404,6 @@ static void prvTaskExitError( void );
static void prvSetupFPU( void ) PRIVILEGED_FUNCTION; static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#if ( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
/**
* @brief Configures PACBTI features.
*
* This function configures the Pointer Authentication, and Branch Target
* Identification security features as per the user configuration. It returns
* the value of the special purpose CONTROL register accordingly, and optionally
* updates the CONTROL register value. Currently, only Cortex-M85 (ARMv8.1-M
* architecture based) target supports PACBTI security feature.
*
* @param xWriteControlRegister Used to control whether the special purpose
* CONTROL register should be updated or not.
*
* @return CONTROL register value according to the configured PACBTI option.
*/
static uint32_t prvConfigurePACBTI( BaseType_t xWriteControlRegister );
#endif /* configENABLE_PAC == 1 || configENABLE_BTI == 1 */
/** /**
* @brief Setup the timer to generate the tick interrupts. * @brief Setup the timer to generate the tick interrupts.
* *
@ -869,7 +828,7 @@ static void prvTaskExitError( void )
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) #if ( configENABLE_MPU == 1 )
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */ static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{ {
@ -888,7 +847,7 @@ static void prvTaskExitError( void )
return ulAccessPermissions; return ulAccessPermissions;
} }
#endif /* configENABLE_MPU == 1 && configUSE_MPU_WRAPPERS_V1 == 0 */ #endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
@ -922,6 +881,12 @@ static void prvTaskExitError( void )
/* The only permitted number of regions are 8 or 16. */ /* The only permitted number of regions are 8 or 16. */
configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) ); configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) );
/* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
/* Check that the MPU is present. */
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
{
/* MAIR0 - Index 0. */ /* MAIR0 - Index 0. */
portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK );
/* MAIR0 - Index 1. */ /* MAIR0 - Index 1. */
@ -974,6 +939,7 @@ static void prvTaskExitError( void )
* regions have privileged access. */ * regions have privileged access. */
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
} }
}
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -1203,7 +1169,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
uint32_t ulStackFrameSize, ulSystemCallLocation, i; uint32_t ulStackFrameSize, ulSystemCallLocation, i;
#if defined( __ARMCC_VERSION ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being /* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */ * exported from linker scripts. */
extern uint32_t * __syscalls_flash_start__; extern uint32_t * __syscalls_flash_start__;
@ -1274,7 +1239,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
* point (i.e. the caller of the MPU_<API>). We need to restore it * point (i.e. the caller of the MPU_<API>). We need to restore it
* when we exit from the system call. */ * when we exit from the system call. */
pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ];
/* Store the value of the PSPLIM register before the SVC was raised. /* Store the value of the PSPLIM register before the SVC was raised.
* We need to restore it when we exit from the system call. */ * We need to restore it when we exit from the system call. */
#if ( portUSE_PSPLIM_REGISTER == 1 ) #if ( portUSE_PSPLIM_REGISTER == 1 )
@ -1293,7 +1257,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
/* Start executing the system call upon returning from this handler. */ /* Start executing the system call upon returning from this handler. */
pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ];
/* Raise a request to exit from the system call upon finishing the /* Raise a request to exit from the system call upon finishing the
* system call. */ * system call. */
pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit;
@ -1353,7 +1316,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
uint32_t ulStackFrameSize, ulSystemCallLocation, i; uint32_t ulStackFrameSize, ulSystemCallLocation, i;
#if defined( __ARMCC_VERSION ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being /* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */ * exported from linker scripts. */
extern uint32_t * __privileged_functions_start__; extern uint32_t * __privileged_functions_start__;
@ -1489,7 +1451,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */
{ {
uint32_t ulIndex = 0; uint32_t ulIndex = 0;
uint32_t ulControl = 0x0;
xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */
ulIndex++; ulIndex++;
@ -1536,24 +1497,16 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */
ulIndex++; ulIndex++;
#if ( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
{
/* Check PACBTI security feature configuration before pushing the
* CONTROL register's value on task's TCB. */
ulControl = prvConfigurePACBTI( pdFALSE );
}
#endif /* configENABLE_PAC == 1 || configENABLE_BTI == 1 */
if( xRunPrivileged == pdTRUE ) if( xRunPrivileged == pdTRUE )
{ {
xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG;
xMPUSettings->ulContext[ ulIndex ] = ( ulControl | ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED ); /* CONTROL. */ xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */
ulIndex++; ulIndex++;
} }
else else
{ {
xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG );
xMPUSettings->ulContext[ ulIndex ] = ( ulControl | ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED ); /* CONTROL. */ xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */
ulIndex++; ulIndex++;
} }
@ -1577,20 +1530,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
} }
#endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */
#if ( configENABLE_PAC == 1 )
{
uint32_t ulTaskPacKey[ 4 ], i;
vApplicationGenerateTaskRandomPacKey( &( ulTaskPacKey[ 0 ] ) );
for( i = 0; i < 4; i++ )
{
xMPUSettings->ulContext[ ulIndex ] = ulTaskPacKey[ i ];
ulIndex++;
}
}
#endif /* configENABLE_PAC */
return &( xMPUSettings->ulContext[ ulIndex ] ); return &( xMPUSettings->ulContext[ ulIndex ] );
} }
@ -1673,20 +1612,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
} }
#endif /* portPRELOAD_REGISTERS */ #endif /* portPRELOAD_REGISTERS */
#if ( configENABLE_PAC == 1 )
{
uint32_t ulTaskPacKey[ 4 ], i;
vApplicationGenerateTaskRandomPacKey( &( ulTaskPacKey[ 0 ] ) );
for( i = 0; i < 4; i++ )
{
pxTopOfStack--;
*pxTopOfStack = ulTaskPacKey[ i ];
}
}
#endif /* configENABLE_PAC */
return pxTopOfStack; return pxTopOfStack;
} }
@ -1719,7 +1644,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
* *
* Assertion failures here indicate incorrect installation of the * Assertion failures here indicate incorrect installation of the
* FreeRTOS handlers. For help installing the FreeRTOS handlers, see * FreeRTOS handlers. For help installing the FreeRTOS handlers, see
* https://www.freertos.org/Why-FreeRTOS/FAQs. * https://www.FreeRTOS.org/FAQHelp.html.
* *
* Systems with a configurable address for the interrupt vector table * Systems with a configurable address for the interrupt vector table
* can also encounter assertion failures or even system faults here if * can also encounter assertion failures or even system faults here if
@ -1809,14 +1734,6 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI; portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
portNVIC_SHPR2_REG = 0; portNVIC_SHPR2_REG = 0;
#if ( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
{
/* Set the CONTROL register value based on PACBTI security feature
* configuration before starting the first task. */
( void ) prvConfigurePACBTI( pdTRUE );
}
#endif /* configENABLE_PAC == 1 || configENABLE_BTI == 1 */
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
{ {
/* Setup the Memory Protection Unit (MPU). */ /* Setup the Memory Protection Unit (MPU). */
@ -1963,16 +1880,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) | xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
( portMPU_RLAR_REGION_ENABLE ); ( portMPU_RLAR_REGION_ENABLE );
/* PXN. */
#if ( portARMV8M_MINOR_VERSION >= 1 )
{
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
{
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
}
}
#endif /* portARMV8M_MINOR_VERSION >= 1 */
/* Normal memory/ Device memory. */ /* Normal memory/ Device memory. */
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
{ {
@ -2118,7 +2025,7 @@ BaseType_t xPortIsInsideInterrupt( void )
* *
* The following links provide detailed information: * The following links provide detailed information:
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
* https://www.freertos.org/Why-FreeRTOS/FAQs */ * https://www.FreeRTOS.org/FAQHelp.html */
configASSERT( ucCurrentPriority >= ucMaxSysCallPriority ); configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
} }
@ -2235,38 +2142,3 @@ BaseType_t xPortIsInsideInterrupt( void )
#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ #endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
static uint32_t prvConfigurePACBTI( BaseType_t xWriteControlRegister )
{
uint32_t ulControl = 0x0;
/* Ensure that PACBTI is implemented. */
configASSERT( portID_ISAR5_REG != 0x0 );
/* Enable UsageFault exception. */
portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_USG_FAULT_ENABLE_BIT;
#if ( configENABLE_PAC == 1 )
{
ulControl |= ( portCONTROL_UPAC_EN | portCONTROL_PAC_EN );
}
#endif
#if ( configENABLE_BTI == 1 )
{
ulControl |= ( portCONTROL_UBTI_EN | portCONTROL_BTI_EN );
}
#endif
if( xWriteControlRegister == pdTRUE )
{
__asm volatile ( "msr control, %0" : : "r" ( ulControl ) );
}
return ulControl;
}
#endif /* configENABLE_PAC == 1 || configENABLE_BTI == 1 */
/*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -1546,10 +1546,10 @@
#if ( configUSE_TIMERS == 1 ) #if ( configUSE_TIMERS == 1 )
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
const BaseType_t xAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL;
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
const BaseType_t xAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */
{ {
__asm volatile __asm volatile
( (

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -50,7 +50,6 @@
*/ */
#define portARCH_NAME "Cortex-M23" #define portARCH_NAME "Cortex-M23"
#define portHAS_ARMV8M_MAIN_EXTENSION 0 #define portHAS_ARMV8M_MAIN_EXTENSION 0
#define portARMV8M_MINOR_VERSION 0
#define portDONT_DISCARD __attribute__( ( used ) ) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -1546,10 +1546,10 @@
#if ( configUSE_TIMERS == 1 ) #if ( configUSE_TIMERS == 1 )
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
const BaseType_t xAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL;
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
const BaseType_t xAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */
{ {
__asm volatile __asm volatile
( (

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -50,7 +50,6 @@
*/ */
#define portARCH_NAME "Cortex-M23" #define portARCH_NAME "Cortex-M23"
#define portHAS_ARMV8M_MAIN_EXTENSION 0 #define portHAS_ARMV8M_MAIN_EXTENSION 0
#define portARMV8M_MINOR_VERSION 0
#define portDONT_DISCARD __attribute__( ( used ) ) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -1495,10 +1495,10 @@
#if ( configUSE_TIMERS == 1 ) #if ( configUSE_TIMERS == 1 )
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
const BaseType_t xAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL;
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
const BaseType_t xAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */
{ {
__asm volatile __asm volatile
( (

View file

@ -1,8 +1,6 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* Copyright 2024 Arm Limited and/or its affiliates
* <open-source-office@arm.com>
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
@ -100,14 +98,6 @@
" ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */
" \n" " \n"
" restore_special_regs_first_task: \n" " restore_special_regs_first_task: \n"
#if ( configENABLE_PAC == 1 )
" ldmdb r2!, {r3-r6} \n" /* Read task's dedicated PAC key from the task's context. */
" msr PAC_KEY_P_0, r3 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
" msr PAC_KEY_P_1, r4 \n"
" msr PAC_KEY_P_2, r5 \n"
" msr PAC_KEY_P_3, r6 \n"
" clrm {r3-r6} \n" /* Clear r3-r6. */
#endif /* configENABLE_PAC */
" ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
" msr psp, r3 \n" " msr psp, r3 \n"
" msr psplim, r4 \n" " msr psplim, r4 \n"
@ -140,22 +130,12 @@
" ldr r3, [r2] \n" /* Read pxCurrentTCB. */ " ldr r3, [r2] \n" /* Read pxCurrentTCB. */
" ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
" \n" " \n"
#if ( configENABLE_PAC == 1 )
" ldmia r0!, {r1-r4} \n" /* Read task's dedicated PAC key from stack. */
" msr PAC_KEY_P_3, r1 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
" msr PAC_KEY_P_2, r2 \n"
" msr PAC_KEY_P_1, r3 \n"
" msr PAC_KEY_P_0, r4 \n"
" clrm {r1-r4} \n" /* Clear r1-r4. */
#endif /* configENABLE_PAC */
" \n"
" ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
" ldr r4, =xSecureContext \n" " ldr r4, =xSecureContext \n"
" str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */
" msr psplim, r2 \n" /* Set this task's PSPLIM value. */ " msr psplim, r2 \n" /* Set this task's PSPLIM value. */
" mrs r1, control \n" /* Obtain current control register value. */ " movs r1, #2 \n" /* r1 = 2. */
" orrs r1, r1, #2 \n" /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointer (PSP). */ " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */
" msr control, r1 \n" /* Write back the new control register value. */
" adds r0, #32 \n" /* Discard everything up to r0. */ " adds r0, #32 \n" /* Discard everything up to r0. */
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */
" isb \n" " isb \n"
@ -297,6 +277,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" \n" " \n"
" save_general_regs: \n" " save_general_regs: \n"
" mrs r3, psp \n" " mrs r3, psp \n"
" \n"
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
" add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */ " add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */
" tst lr, #0x10 \n" " tst lr, #0x10 \n"
@ -306,6 +287,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */ " vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */
" sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */ " sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */
#endif /* configENABLE_FPU || configENABLE_MVE */ #endif /* configENABLE_FPU || configENABLE_MVE */
" \n"
" stmia r2!, {r4-r11} \n" /* Store r4-r11. */ " stmia r2!, {r4-r11} \n" /* Store r4-r11. */
" ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ " ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */
" stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */ " stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */
@ -315,14 +297,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" mrs r4, psplim \n" /* r4 = PSPLIM. */ " mrs r4, psplim \n" /* r4 = PSPLIM. */
" mrs r5, control \n" /* r5 = CONTROL. */ " mrs r5, control \n" /* r5 = CONTROL. */
" stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ " stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
#if ( configENABLE_PAC == 1 )
" mrs r3, PAC_KEY_P_0 \n" /* Read task's dedicated PAC key from the PAC key registers. */
" mrs r4, PAC_KEY_P_1 \n"
" mrs r5, PAC_KEY_P_2 \n"
" mrs r6, PAC_KEY_P_3 \n"
" stmia r2!, {r3-r6} \n" /* Store the task's dedicated PAC key on the task's context. */
" clrm {r3-r6} \n" /* Clear r3-r6. */
#endif /* configENABLE_PAC */
" str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */
" \n" " \n"
" select_next_task: \n" " select_next_task: \n"
@ -381,14 +355,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */
" \n" " \n"
" restore_special_regs: \n" " restore_special_regs: \n"
#if ( configENABLE_PAC == 1 )
" ldmdb r2!, {r3-r6} \n" /* Read task's dedicated PAC key from the task's context. */
" msr PAC_KEY_P_0, r3 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
" msr PAC_KEY_P_1, r4 \n"
" msr PAC_KEY_P_2, r5 \n"
" msr PAC_KEY_P_3, r6 \n"
" clrm {r3-r6} \n" /* Clear r3-r6. */
#endif /* configENABLE_PAC */
" ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
" msr psp, r3 \n" " msr psp, r3 \n"
" msr psplim, r4 \n" " msr psplim, r4 \n"
@ -443,37 +409,38 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" mrs r2, psp \n" /* Read PSP in r2. */ " mrs r2, psp \n" /* Read PSP in r2. */
" \n" " \n"
" cbz r0, save_ns_context \n" /* No secure context to save. */ " cbz r0, save_ns_context \n" /* No secure context to save. */
" save_s_context: \n" " push {r0-r2, r14} \n"
" push {r0-r2, lr} \n"
" bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
" pop {r0-r2, lr} \n" " pop {r0-r3} \n" /* LR is now in r3. */
" mov lr, r3 \n" /* LR = r3. */
" lsls r1, r3, #25 \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
" bpl save_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
" \n"
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r1, [r3] \n" /* Read pxCurrentTCB.*/
" subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */
" str r2, [r1] \n" /* Save the new top of stack in TCB. */
" mrs r1, psplim \n" /* r1 = PSPLIM. */
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */
" stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
" b select_next_task \n"
" \n" " \n"
" save_ns_context: \n" " save_ns_context: \n"
" mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ " ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ " ldr r1, [r3] \n" /* Read pxCurrentTCB. */
" bmi save_special_regs \n" /* If r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used. */
" \n"
" save_general_regs: \n"
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
" it eq \n" " it eq \n"
" vstmdbeq r2!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */ " vstmdbeq r2!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */
#endif /* configENABLE_FPU || configENABLE_MVE */ #endif /* configENABLE_FPU || configENABLE_MVE */
" stmdb r2!, {r4-r11} \n" /* Store the registers that are not saved automatically. */ " subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
" \n"
" save_special_regs: \n"
" mrs r3, psplim \n" /* r3 = PSPLIM. */
" stmdb r2!, {r0, r3, lr} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
#if ( configENABLE_PAC == 1 )
" mrs r3, PAC_KEY_P_3 \n" /* Read task's dedicated PAC key from the PAC key registers. */
" mrs r4, PAC_KEY_P_2 \n"
" mrs r5, PAC_KEY_P_1 \n"
" mrs r6, PAC_KEY_P_0 \n"
" stmdb r2!, {r3-r6} \n" /* Store the task's dedicated PAC key on the stack. */
" clrm {r3-r6} \n" /* Clear r3-r6. */
#endif /* configENABLE_PAC */
" \n"
" str r2, [r1] \n" /* Save the new top of stack in TCB. */ " str r2, [r1] \n" /* Save the new top of stack in TCB. */
" adds r2, r2, #12 \n" /* r2 = r2 + 12. */
" stm r2, {r4-r11} \n" /* Store the registers that are not saved automatically. */
" mrs r1, psplim \n" /* r1 = PSPLIM. */
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */
" subs r2, r2, #12 \n" /* r2 = r2 - 12. */
" stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
" \n" " \n"
" select_next_task: \n" " select_next_task: \n"
" mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
@ -484,45 +451,34 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" mov r0, #0 \n" /* r0 = 0. */ " mov r0, #0 \n" /* r0 = 0. */
" msr basepri, r0 \n" /* Enable interrupts. */ " msr basepri, r0 \n" /* Enable interrupts. */
" \n" " \n"
" restore_context: \n"
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r1, [r3] \n" /* Read pxCurrentTCB. */ " ldr r1, [r3] \n" /* Read pxCurrentTCB. */
" ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ " ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
" \n" " \n"
" restore_special_regs: \n" " ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
#if ( configENABLE_PAC == 1 ) " msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */
" ldmia r2!, {r3-r6} \n" /* Read task's dedicated PAC key from stack. */ " mov lr, r4 \n" /* LR = r4. */
" msr PAC_KEY_P_3, r3 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
" msr PAC_KEY_P_2, r4 \n"
" msr PAC_KEY_P_1, r5 \n"
" msr PAC_KEY_P_0, r6 \n"
" clrm {r3-r6} \n" /* Clear r3-r6. */
#endif /* configENABLE_PAC */
" ldmia r2!, {r0, r3, lr} \n" /* Read from stack - r0 = xSecureContext, r3 = PSPLIM and LR restored. */
" msr psplim, r3 \n" /* Restore the PSPLIM register value for the task. */
" ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ " ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
" str r0, [r3] \n" /* Restore the task's xSecureContext. */ " str r0, [r3] \n" /* Restore the task's xSecureContext. */
" cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ " cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */
" \n" " ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" restore_s_context: \n" " ldr r1, [r3] \n" /* Read pxCurrentTCB. */
" push {r1-r3, lr} \n" " push {r2, r4} \n"
" bl SecureContext_LoadContext \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ " bl SecureContext_LoadContext \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
" pop {r1-r3, lr} \n" " pop {r2, r4} \n"
" mov lr, r4 \n" /* LR = r4. */
" lsls r1, r4, #25 \n" /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
" bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
" msr psp, r2 \n" /* Remember the new top of stack for the task. */
" bx lr \n"
" \n" " \n"
" restore_ns_context: \n" " restore_ns_context: \n"
" mov r0, lr \n" /* r0 = LR (EXC_RETURN). */
" lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
" bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
" \n"
" restore_general_regs: \n"
" ldmia r2!, {r4-r11} \n" /* Restore the registers that are not automatically restored. */ " ldmia r2!, {r4-r11} \n" /* Restore the registers that are not automatically restored. */
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
" it eq \n" " it eq \n"
" vldmiaeq r2!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */ " vldmiaeq r2!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */
#endif /* configENABLE_FPU || configENABLE_MVE */ #endif /* configENABLE_FPU || configENABLE_MVE */
" \n"
" restore_context_done: \n"
" msr psp, r2 \n" /* Remember the new top of stack for the task. */ " msr psp, r2 \n" /* Remember the new top of stack for the task. */
" bx lr \n" " bx lr \n"
::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -50,7 +50,6 @@
*/ */
#define portARCH_NAME "Cortex-M33" #define portARCH_NAME "Cortex-M33"
#define portHAS_ARMV8M_MAIN_EXTENSION 1 #define portHAS_ARMV8M_MAIN_EXTENSION 1
#define portARMV8M_MINOR_VERSION 0
#define portDONT_DISCARD __attribute__( ( used ) ) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -1495,10 +1495,10 @@
#if ( configUSE_TIMERS == 1 ) #if ( configUSE_TIMERS == 1 )
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
const BaseType_t xAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL;
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
const BaseType_t xAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */
{ {
__asm volatile __asm volatile
( (

View file

@ -1,8 +1,6 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* Copyright 2024 Arm Limited and/or its affiliates
* <open-source-office@arm.com>
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
@ -100,14 +98,6 @@
" ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */
" \n" " \n"
" restore_special_regs_first_task: \n" " restore_special_regs_first_task: \n"
#if ( configENABLE_PAC == 1 )
" ldmdb r1!, {r2-r5} \n" /* Read task's dedicated PAC key from the task's context. */
" msr PAC_KEY_P_0, r2 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
" msr PAC_KEY_P_1, r3 \n"
" msr PAC_KEY_P_2, r4 \n"
" msr PAC_KEY_P_3, r5 \n"
" clrm {r2-r5} \n" /* Clear r2-r5. */
#endif /* configENABLE_PAC */
" ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
" msr psp, r2 \n" " msr psp, r2 \n"
" msr psplim, r3 \n" " msr psplim, r3 \n"
@ -138,20 +128,10 @@
" ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " ldr r1, [r2] \n" /* Read pxCurrentTCB. */
" ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
" \n" " \n"
#if ( configENABLE_PAC == 1 )
" ldmia r0!, {r1-r4} \n" /* Read task's dedicated PAC key from stack. */
" msr PAC_KEY_P_3, r1 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
" msr PAC_KEY_P_2, r2 \n"
" msr PAC_KEY_P_1, r3 \n"
" msr PAC_KEY_P_0, r4 \n"
" clrm {r1-r4} \n" /* Clear r1-r4. */
#endif /* configENABLE_PAC */
" \n"
" ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ " ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
" msr psplim, r1 \n" /* Set this task's PSPLIM value. */ " msr psplim, r1 \n" /* Set this task's PSPLIM value. */
" mrs r1, control \n" /* Obtain current control register value. */ " movs r1, #2 \n" /* r1 = 2. */
" orrs r1, r1, #2 \n" /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointer (PSP). */ " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */
" msr control, r1 \n" /* Write back the new control register value. */
" adds r0, #32 \n" /* Discard everything up to r0. */ " adds r0, #32 \n" /* Discard everything up to r0. */
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */
" isb \n" " isb \n"
@ -287,6 +267,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */ " vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */
" sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */ " sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */
#endif /* configENABLE_FPU || configENABLE_MVE */ #endif /* configENABLE_FPU || configENABLE_MVE */
" \n"
" stmia r1!, {r4-r11} \n" /* Store r4-r11. */ " stmia r1!, {r4-r11} \n" /* Store r4-r11. */
" ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ " ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */
" stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */ " stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */
@ -295,14 +276,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" mrs r3, psplim \n" /* r3 = PSPLIM. */ " mrs r3, psplim \n" /* r3 = PSPLIM. */
" mrs r4, control \n" /* r4 = CONTROL. */ " mrs r4, control \n" /* r4 = CONTROL. */
" stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ " stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
#if ( configENABLE_PAC == 1 )
" mrs r2, PAC_KEY_P_0 \n" /* Read task's dedicated PAC key from the PAC key registers. */
" mrs r3, PAC_KEY_P_1 \n"
" mrs r4, PAC_KEY_P_2 \n"
" mrs r5, PAC_KEY_P_3 \n"
" stmia r1!, {r2-r5} \n" /* Store the task's dedicated PAC key on the task's context. */
" clrm {r2-r5} \n" /* Clear r2-r5. */
#endif /* configENABLE_PAC */
" str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */
" \n" " \n"
" select_next_task: \n" " select_next_task: \n"
@ -361,14 +334,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */
" \n" " \n"
" restore_special_regs: \n" " restore_special_regs: \n"
#if ( configENABLE_PAC == 1 )
" ldmdb r1!, {r2-r5} \n" /* Read task's dedicated PAC key from the task's context. */
" msr PAC_KEY_P_0, r2 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
" msr PAC_KEY_P_1, r3 \n"
" msr PAC_KEY_P_2, r4 \n"
" msr PAC_KEY_P_3, r5 \n"
" clrm {r2-r5} \n" /* Clear r2-r5. */
#endif /* configENABLE_PAC */
" ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
" msr psp, r2 \n" " msr psp, r2 \n"
" msr psplim, r3 \n" " msr psplim, r3 \n"
@ -413,15 +378,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */
" stmdb r0!, {r2-r11} \n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ " stmdb r0!, {r2-r11} \n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
" \n" " \n"
#if ( configENABLE_PAC == 1 )
" mrs r1, PAC_KEY_P_3 \n" /* Read task's dedicated PAC key from the PAC key registers. */
" mrs r2, PAC_KEY_P_2 \n"
" mrs r3, PAC_KEY_P_1 \n"
" mrs r4, PAC_KEY_P_0 \n"
" stmdb r0!, {r1-r4} \n" /* Store the task's dedicated PAC key on the stack. */
" clrm {r1-r4} \n" /* Clear r1-r4. */
#endif /* configENABLE_PAC */
" \n"
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " ldr r1, [r2] \n" /* Read pxCurrentTCB. */
" str r0, [r1] \n" /* Save the new top of stack in TCB. */ " str r0, [r1] \n" /* Save the new top of stack in TCB. */
@ -438,15 +394,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " ldr r1, [r2] \n" /* Read pxCurrentTCB. */
" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
" \n" " \n"
#if ( configENABLE_PAC == 1 )
" ldmia r0!, {r2-r5} \n" /* Read task's dedicated PAC key from stack. */
" msr PAC_KEY_P_3, r2 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
" msr PAC_KEY_P_2, r3 \n"
" msr PAC_KEY_P_1, r4 \n"
" msr PAC_KEY_P_0, r5 \n"
" clrm {r2-r5} \n" /* Clear r2-r5. */
#endif /* configENABLE_PAC */
" \n"
" ldmia r0!, {r2-r11} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ " ldmia r0!, {r2-r11} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
" \n" " \n"
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -50,7 +50,6 @@
*/ */
#define portARCH_NAME "Cortex-M33" #define portARCH_NAME "Cortex-M33"
#define portHAS_ARMV8M_MAIN_EXTENSION 1 #define portHAS_ARMV8M_MAIN_EXTENSION 1
#define portARMV8M_MINOR_VERSION 0
#define portDONT_DISCARD __attribute__( ( used ) ) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -50,7 +50,6 @@
*/ */
#define portARCH_NAME "Cortex-M35P" #define portARCH_NAME "Cortex-M35P"
#define portHAS_ARMV8M_MAIN_EXTENSION 1 #define portHAS_ARMV8M_MAIN_EXTENSION 1
#define portARMV8M_MINOR_VERSION 0
#define portDONT_DISCARD __attribute__( ( used ) ) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -55,7 +55,6 @@
*/ */
#define portARCH_NAME "Cortex-M55" #define portARCH_NAME "Cortex-M55"
#define portHAS_ARMV8M_MAIN_EXTENSION 1 #define portHAS_ARMV8M_MAIN_EXTENSION 1
#define portARMV8M_MINOR_VERSION 1
#define portDONT_DISCARD __attribute__( ( used ) ) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -55,7 +55,6 @@
*/ */
#define portARCH_NAME "Cortex-M85" #define portARCH_NAME "Cortex-M85"
#define portHAS_ARMV8M_MAIN_EXTENSION 1 #define portHAS_ARMV8M_MAIN_EXTENSION 1
#define portARMV8M_MINOR_VERSION 1
#define portDONT_DISCARD __attribute__( ( used ) ) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -50,7 +50,6 @@
*/ */
#define portARCH_NAME "Cortex-M23" #define portARCH_NAME "Cortex-M23"
#define portHAS_ARMV8M_MAIN_EXTENSION 0 #define portHAS_ARMV8M_MAIN_EXTENSION 0
#define portARMV8M_MINOR_VERSION 0
#define portDONT_DISCARD __root #define portDONT_DISCARD __root
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -50,7 +50,6 @@
*/ */
#define portARCH_NAME "Cortex-M23" #define portARCH_NAME "Cortex-M23"
#define portHAS_ARMV8M_MAIN_EXTENSION 0 #define portHAS_ARMV8M_MAIN_EXTENSION 0
#define portARMV8M_MINOR_VERSION 0
#define portDONT_DISCARD __root #define portDONT_DISCARD __root
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

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@ -1,8 +1,6 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* Copyright 2024 Arm Limited and/or its affiliates
* <open-source-office@arm.com>
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
@ -152,14 +150,6 @@ vRestoreContextOfFirstTask:
ldr r2, [r1] /* r2 = Location of saved context in TCB. */ ldr r2, [r1] /* r2 = Location of saved context in TCB. */
restore_special_regs_first_task: restore_special_regs_first_task:
#if ( configENABLE_PAC == 1 )
ldmdb r2!, {r3-r6} /* Read task's dedicated PAC key from the task's context. */
msr PAC_KEY_P_0, r3 /* Write the task's dedicated PAC key to the PAC key registers. */
msr PAC_KEY_P_1, r4
msr PAC_KEY_P_2, r5
msr PAC_KEY_P_3, r6
clrm {r3-r6} /* Clear r3-r6. */
#endif /* configENABLE_PAC */
ldmdb r2!, {r0, r3-r5, lr} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ ldmdb r2!, {r0, r3-r5, lr} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
msr psp, r3 msr psp, r3
msr psplim, r4 msr psplim, r4
@ -185,22 +175,12 @@ vRestoreContextOfFirstTask:
ldr r3, [r2] /* Read pxCurrentTCB. */ ldr r3, [r2] /* Read pxCurrentTCB. */
ldr r0, [r3] /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ ldr r0, [r3] /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
#if ( configENABLE_PAC == 1 )
ldmia r0!, {r1-r4} /* Read task's dedicated PAC key from stack. */
msr PAC_KEY_P_3, r1 /* Write the task's dedicated PAC key to the PAC key registers. */
msr PAC_KEY_P_2, r2
msr PAC_KEY_P_1, r3
msr PAC_KEY_P_0, r4
clrm {r1-r4} /* Clear r1-r4. */
#endif /* configENABLE_PAC */
ldm r0!, {r1-r3} /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ ldm r0!, {r1-r3} /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
ldr r4, =xSecureContext ldr r4, =xSecureContext
str r1, [r4] /* Set xSecureContext to this task's value for the same. */ str r1, [r4] /* Set xSecureContext to this task's value for the same. */
msr psplim, r2 /* Set this task's PSPLIM value. */ msr psplim, r2 /* Set this task's PSPLIM value. */
mrs r1, control /* Obtain current control register value. */ movs r1, #2 /* r1 = 2. */
orrs r1, r1, #2 /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointe (PSP). */ msr CONTROL, r1 /* Switch to use PSP in the thread mode. */
msr control, r1 /* Write back the new control register value. */
adds r0, #32 /* Discard everything up to r0. */ adds r0, #32 /* Discard everything up to r0. */
msr psp, r0 /* This is now the new top of stack to use in the task. */ msr psp, r0 /* This is now the new top of stack to use in the task. */
isb isb
@ -288,15 +268,6 @@ PendSV_Handler:
mrs r4, psplim /* r4 = PSPLIM. */ mrs r4, psplim /* r4 = PSPLIM. */
mrs r5, control /* r5 = CONTROL. */ mrs r5, control /* r5 = CONTROL. */
stmia r2!, {r0, r3-r5, lr} /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ stmia r2!, {r0, r3-r5, lr} /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
#if ( configENABLE_PAC == 1 )
mrs r3, PAC_KEY_P_0 /* Read task's dedicated PAC key from the PAC key registers. */
mrs r4, PAC_KEY_P_1
mrs r5, PAC_KEY_P_2
mrs r6, PAC_KEY_P_3
stmia r2!, {r3-r6} /* Store the task's dedicated PAC key on the task's context. */
clrm {r3-r6} /* Clear r3-r6. */
#endif /* configENABLE_PAC */
str r2, [r1] /* Save the location from where the context should be restored as the first member of TCB. */ str r2, [r1] /* Save the location from where the context should be restored as the first member of TCB. */
select_next_task: select_next_task:
@ -355,14 +326,6 @@ PendSV_Handler:
ldr r2, [r1] /* r2 = Location of saved context in TCB. */ ldr r2, [r1] /* r2 = Location of saved context in TCB. */
restore_special_regs: restore_special_regs:
#if ( configENABLE_PAC == 1 )
ldmdb r2!, {r3-r6} /* Read task's dedicated PAC key from the task's context. */
msr PAC_KEY_P_0, r3 /* Write the task's dedicated PAC key to the PAC key registers. */
msr PAC_KEY_P_1, r4
msr PAC_KEY_P_2, r5
msr PAC_KEY_P_3, r6
clrm {r3-r6} /* Clear r3-r6. */
#endif /* configENABLE_PAC */
ldmdb r2!, {r0, r3-r5, lr} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ ldmdb r2!, {r0, r3-r5, lr} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
msr psp, r3 msr psp, r3
msr psplim, r4 msr psplim, r4
@ -408,37 +371,38 @@ PendSV_Handler:
mrs r2, psp /* Read PSP in r2. */ mrs r2, psp /* Read PSP in r2. */
cbz r0, save_ns_context /* No secure context to save. */ cbz r0, save_ns_context /* No secure context to save. */
save_s_context: push {r0-r2, r14}
push {r0-r2, lr}
bl SecureContext_SaveContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ bl SecureContext_SaveContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
pop {r0-r2, lr} pop {r0-r3} /* LR is now in r3. */
mov lr, r3 /* LR = r3. */
lsls r1, r3, #25 /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
bpl save_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
ldr r1, [r3] /* Read pxCurrentTCB. */
subs r2, r2, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */
str r2, [r1] /* Save the new top of stack in TCB. */
mrs r1, psplim /* r1 = PSPLIM. */
mov r3, lr /* r3 = LR/EXC_RETURN. */
stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */
b select_next_task
save_ns_context: save_ns_context:
mov r3, lr /* r3 = LR. */ ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
lsls r3, r3, #25 /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ ldr r1, [r3] /* Read pxCurrentTCB. */
bmi save_special_regs /* If r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used. */
save_general_regs:
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
it eq it eq
vstmdbeq r2!, {s16-s31} /* Store the additional FP context registers which are not saved automatically. */ vstmdbeq r2!, {s16-s31} /* Store the additional FP context registers which are not saved automatically. */
#endif /* configENABLE_FPU || configENABLE_MVE */ #endif /* configENABLE_FPU || configENABLE_MVE */
stmdb r2!, {r4-r11} /* Store the registers that are not saved automatically. */ subs r2, r2, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
save_special_regs:
mrs r3, psplim /* r3 = PSPLIM. */
stmdb r2!, {r0, r3, lr} /* Store xSecureContext, PSPLIM and LR on the stack. */
#if ( configENABLE_PAC == 1 )
mrs r3, PAC_KEY_P_3 /* Read task's dedicated PAC key from the PAC key registers. */
mrs r4, PAC_KEY_P_2
mrs r5, PAC_KEY_P_1
mrs r6, PAC_KEY_P_0
stmdb r2!, {r3-r6} /* Store the task's dedicated PAC key on the stack. */
clrm {r3-r6} /* Clear r3-r6. */
#endif /* configENABLE_PAC */
str r2, [r1] /* Save the new top of stack in TCB. */ str r2, [r1] /* Save the new top of stack in TCB. */
adds r2, r2, #12 /* r2 = r2 + 12. */
stm r2, {r4-r11} /* Store the registers that are not saved automatically. */
mrs r1, psplim /* r1 = PSPLIM. */
mov r3, lr /* r3 = LR/EXC_RETURN. */
subs r2, r2, #12 /* r2 = r2 - 12. */
stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */
select_next_task: select_next_task:
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
@ -449,45 +413,34 @@ PendSV_Handler:
mov r0, #0 /* r0 = 0. */ mov r0, #0 /* r0 = 0. */
msr basepri, r0 /* Enable interrupts. */ msr basepri, r0 /* Enable interrupts. */
restore_context:
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
ldr r1, [r3] /* Read pxCurrentTCB. */ ldr r1, [r3] /* Read pxCurrentTCB. */
ldr r2, [r1] /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ ldr r2, [r1] /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
restore_special_regs: ldmia r2!, {r0, r1, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
#if ( configENABLE_PAC == 1 ) msr psplim, r1 /* Restore the PSPLIM register value for the task. */
ldmia r2!, {r3-r6} /* Read task's dedicated PAC key from stack. */ mov lr, r4 /* LR = r4. */
msr PAC_KEY_P_3, r3 /* Write the task's dedicated PAC key to the PAC key registers. */
msr PAC_KEY_P_2, r4
msr PAC_KEY_P_1, r5
msr PAC_KEY_P_0, r6
clrm {r3-r6} /* Clear r3-r6. */
#endif /* configENABLE_PAC */
ldmia r2!, {r0, r3, lr} http://files.iar.com/ftp/pub/box/bxarm-9.60.3.deb/* Read from stack - r0 = xSecureContext, r3 = PSPLIM and LR restored. */
msr psplim, r3 /* Restore the PSPLIM register value for the task. */
ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
str r0, [r3] /* Restore the task's xSecureContext. */ str r0, [r3] /* Restore the task's xSecureContext. */
cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */ cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
restore_s_context: ldr r1, [r3] /* Read pxCurrentTCB. */
push {r1-r3, lr} push {r2, r4}
bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
pop {r1-r3, lr} pop {r2, r4}
mov lr, r4 /* LR = r4. */
lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
msr psp, r2 /* Remember the new top of stack for the task. */
bx lr
restore_ns_context: restore_ns_context:
mov r0, lr /* r0 = LR (EXC_RETURN). */
lsls r0, r0, #25 /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
bmi restore_context_done /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
restore_general_regs:
ldmia r2!, {r4-r11} /* Restore the registers that are not automatically restored. */ ldmia r2!, {r4-r11} /* Restore the registers that are not automatically restored. */
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
it eq it eq
vldmiaeq r2!, {s16-s31} /* Restore the additional FP context registers which are not restored automatically. */ vldmiaeq r2!, {s16-s31} /* Restore the additional FP context registers which are not restored automatically. */
#endif /* configENABLE_FPU || configENABLE_MVE */ #endif /* configENABLE_FPU || configENABLE_MVE */
restore_context_done:
msr psp, r2 /* Remember the new top of stack for the task. */ msr psp, r2 /* Remember the new top of stack for the task. */
bx lr bx lr

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -50,10 +50,14 @@
*/ */
#define portARCH_NAME "Cortex-M33" #define portARCH_NAME "Cortex-M33"
#define portHAS_ARMV8M_MAIN_EXTENSION 1 #define portHAS_ARMV8M_MAIN_EXTENSION 1
#define portARMV8M_MINOR_VERSION 0
#define portDONT_DISCARD __root #define portDONT_DISCARD __root
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( configTOTAL_MPU_REGIONS == 16 )
#error 16 MPU regions are not yet supported for this port.
#endif
/*-----------------------------------------------------------*/
/* ARMv8-M common port configurations. */ /* ARMv8-M common port configurations. */
#include "portmacrocommon.h" #include "portmacrocommon.h"
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

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@ -1,8 +1,6 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* Copyright 2024 Arm Limited and/or its affiliates
* <open-source-office@arm.com>
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
@ -142,14 +140,6 @@ vRestoreContextOfFirstTask:
ldr r1, [r0] /* r1 = Location of saved context in TCB. */ ldr r1, [r0] /* r1 = Location of saved context in TCB. */
restore_special_regs_first_task: restore_special_regs_first_task:
#if ( configENABLE_PAC == 1 )
ldmdb r1!, {r2-r5} /* Read task's dedicated PAC key from the task's context. */
msr PAC_KEY_P_0, r2 /* Write the task's dedicated PAC key to the PAC key registers. */
msr PAC_KEY_P_1, r3
msr PAC_KEY_P_2, r4
msr PAC_KEY_P_3, r5
clrm {r2-r5} /* Clear r2-r5. */
#endif /* configENABLE_PAC */
ldmdb r1!, {r2-r4, lr} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ ldmdb r1!, {r2-r4, lr} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
msr psp, r2 msr psp, r2
msr psplim, r3 msr psplim, r3
@ -173,20 +163,10 @@ vRestoreContextOfFirstTask:
ldr r1, [r2] /* Read pxCurrentTCB. */ ldr r1, [r2] /* Read pxCurrentTCB. */
ldr r0, [r1] /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ ldr r0, [r1] /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
#if ( configENABLE_PAC == 1 )
ldmia r0!, {r1-r4} /* Read task's dedicated PAC key from stack. */
msr PAC_KEY_P_3, r1 /* Write the task's dedicated PAC key to the PAC key registers. */
msr PAC_KEY_P_2, r2
msr PAC_KEY_P_1, r3
msr PAC_KEY_P_0, r4
clrm {r1-r4} /* Clear r1-r4. */
#endif /* configENABLE_PAC */
ldm r0!, {r1-r2} /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ ldm r0!, {r1-r2} /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
msr psplim, r1 /* Set this task's PSPLIM value. */ msr psplim, r1 /* Set this task's PSPLIM value. */
mrs r1, control /* Obtain current control register value. */ movs r1, #2 /* r1 = 2. */
orrs r1, r1, #2 /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointe (PSP). */ msr CONTROL, r1 /* Switch to use PSP in the thread mode. */
msr control, r1 /* Write back the new control register value. */
adds r0, #32 /* Discard everything up to r0. */ adds r0, #32 /* Discard everything up to r0. */
msr psp, r0 /* This is now the new top of stack to use in the task. */ msr psp, r0 /* This is now the new top of stack to use in the task. */
isb isb
@ -250,6 +230,7 @@ PendSV_Handler:
vstmiaeq r1!, {s0-s16} /* Store hardware saved FP context. */ vstmiaeq r1!, {s0-s16} /* Store hardware saved FP context. */
sub r2, r2, #0x20 /* Set r2 back to the location of hardware saved context. */ sub r2, r2, #0x20 /* Set r2 back to the location of hardware saved context. */
#endif /* configENABLE_FPU || configENABLE_MVE */ #endif /* configENABLE_FPU || configENABLE_MVE */
stmia r1!, {r4-r11} /* Store r4-r11. */ stmia r1!, {r4-r11} /* Store r4-r11. */
ldmia r2, {r4-r11} /* Copy the hardware saved context into r4-r11. */ ldmia r2, {r4-r11} /* Copy the hardware saved context into r4-r11. */
stmia r1!, {r4-r11} /* Store the hardware saved context. */ stmia r1!, {r4-r11} /* Store the hardware saved context. */
@ -258,15 +239,6 @@ PendSV_Handler:
mrs r3, psplim /* r3 = PSPLIM. */ mrs r3, psplim /* r3 = PSPLIM. */
mrs r4, control /* r4 = CONTROL. */ mrs r4, control /* r4 = CONTROL. */
stmia r1!, {r2-r4, lr} /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ stmia r1!, {r2-r4, lr} /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
#if ( configENABLE_PAC == 1 )
mrs r2, PAC_KEY_P_0 /* Read task's dedicated PAC key from the PAC key registers. */
mrs r3, PAC_KEY_P_1
mrs r4, PAC_KEY_P_2
mrs r5, PAC_KEY_P_3
stmia r1!, {r2-r5} /* Store the task's dedicated PAC key on the task's context. */
clrm {r2-r5} /* Clear r2-r5. */
#endif /* configENABLE_PAC */
str r1, [r0] /* Save the location from where the context should be restored as the first member of TCB. */ str r1, [r0] /* Save the location from where the context should be restored as the first member of TCB. */
select_next_task: select_next_task:
@ -325,14 +297,6 @@ PendSV_Handler:
ldr r1, [r0] /* r1 = Location of saved context in TCB. */ ldr r1, [r0] /* r1 = Location of saved context in TCB. */
restore_special_regs: restore_special_regs:
#if ( configENABLE_PAC == 1 )
ldmdb r1!, {r2-r5} /* Read task's dedicated PAC key from the task's context. */
msr PAC_KEY_P_0, r2 /* Write the task's dedicated PAC key to the PAC key registers. */
msr PAC_KEY_P_1, r3
msr PAC_KEY_P_2, r4
msr PAC_KEY_P_3, r5
clrm {r2-r5} /* Clear r2-r5. */
#endif /* configENABLE_PAC */
ldmdb r1!, {r2-r4, lr} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ ldmdb r1!, {r2-r4, lr} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
msr psp, r2 msr psp, r2
msr psplim, r3 msr psplim, r3
@ -368,15 +332,6 @@ PendSV_Handler:
mov r3, lr /* r3 = LR/EXC_RETURN. */ mov r3, lr /* r3 = LR/EXC_RETURN. */
stmdb r0!, {r2-r11} /* Store on the stack - PSPLIM, LR and registers that are not automatically. */ stmdb r0!, {r2-r11} /* Store on the stack - PSPLIM, LR and registers that are not automatically. */
#if ( configENABLE_PAC == 1 )
mrs r1, PAC_KEY_P_3 /* Read task's dedicated PAC key from the PAC key registers. */
mrs r2, PAC_KEY_P_2
mrs r3, PAC_KEY_P_1
mrs r4, PAC_KEY_P_0
stmdb r0!, {r1-r4} /* Store the task's dedicated PAC key on the stack. */
clrm {r1-r4} /* Clear r1-r4. */
#endif /* configENABLE_PAC */
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
ldr r1, [r2] /* Read pxCurrentTCB. */ ldr r1, [r2] /* Read pxCurrentTCB. */
str r0, [r1] /* Save the new top of stack in TCB. */ str r0, [r1] /* Save the new top of stack in TCB. */
@ -393,15 +348,6 @@ PendSV_Handler:
ldr r1, [r2] /* Read pxCurrentTCB. */ ldr r1, [r2] /* Read pxCurrentTCB. */
ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
#if ( configENABLE_PAC == 1 )
ldmia r0!, {r2-r5} /* Read task's dedicated PAC key from stack. */
msr PAC_KEY_P_3, r2 /* Write the task's dedicated PAC key to the PAC key registers. */
msr PAC_KEY_P_2, r3
msr PAC_KEY_P_1, r4
msr PAC_KEY_P_0, r5
clrm {r2-r5} /* Clear r2-r5. */
#endif /* configENABLE_PAC */
ldmia r0!, {r2-r11} /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ ldmia r0!, {r2-r11} /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -50,7 +50,6 @@
*/ */
#define portARCH_NAME "Cortex-M33" #define portARCH_NAME "Cortex-M33"
#define portHAS_ARMV8M_MAIN_EXTENSION 1 #define portHAS_ARMV8M_MAIN_EXTENSION 1
#define portARMV8M_MINOR_VERSION 0
#define portDONT_DISCARD __root #define portDONT_DISCARD __root
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -58,11 +57,16 @@
#include "portmacrocommon.h" #include "portmacrocommon.h"
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( configTOTAL_MPU_REGIONS == 16 )
#error 16 MPU regions are not yet supported for this port.
#endif
#ifndef configENABLE_MVE #ifndef configENABLE_MVE
#define configENABLE_MVE 0 #define configENABLE_MVE 0
#elif( configENABLE_MVE != 0 ) #elif( configENABLE_MVE != 0 )
#error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M33. #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M33.
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -50,7 +50,6 @@
*/ */
#define portARCH_NAME "Cortex-M35P" #define portARCH_NAME "Cortex-M35P"
#define portHAS_ARMV8M_MAIN_EXTENSION 1 #define portHAS_ARMV8M_MAIN_EXTENSION 1
#define portARMV8M_MINOR_VERSION 0
#define portDONT_DISCARD __root #define portDONT_DISCARD __root
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -58,6 +57,10 @@
#include "portmacrocommon.h" #include "portmacrocommon.h"
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( configTOTAL_MPU_REGIONS == 16 )
#error 16 MPU regions are not yet supported for this port.
#endif
#ifndef configENABLE_MVE #ifndef configENABLE_MVE
#define configENABLE_MVE 0 #define configENABLE_MVE 0
#elif( configENABLE_MVE != 0 ) #elif( configENABLE_MVE != 0 )

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -55,7 +55,6 @@
*/ */
#define portARCH_NAME "Cortex-M55" #define portARCH_NAME "Cortex-M55"
#define portHAS_ARMV8M_MAIN_EXTENSION 1 #define portHAS_ARMV8M_MAIN_EXTENSION 1
#define portARMV8M_MINOR_VERSION 1
#define portDONT_DISCARD __root #define portDONT_DISCARD __root
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -63,6 +62,11 @@
#include "portmacrocommon.h" #include "portmacrocommon.h"
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( configTOTAL_MPU_REGIONS == 16 )
#error 16 MPU regions are not yet supported for this port.
#endif
/*-----------------------------------------------------------*/
/** /**
* @brief Critical section management. * @brief Critical section management.
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -55,7 +55,6 @@
*/ */
#define portARCH_NAME "Cortex-M85" #define portARCH_NAME "Cortex-M85"
#define portHAS_ARMV8M_MAIN_EXTENSION 1 #define portHAS_ARMV8M_MAIN_EXTENSION 1
#define portARMV8M_MINOR_VERSION 1
#define portDONT_DISCARD __root #define portDONT_DISCARD __root
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -63,6 +62,11 @@
#include "portmacrocommon.h" #include "portmacrocommon.h"
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( configTOTAL_MPU_REGIONS == 16 )
#error 16 MPU regions are not yet supported for this port.
#endif
/*-----------------------------------------------------------*/
/** /**
* @brief Critical section management. * @brief Critical section management.
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -52,7 +52,7 @@ BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
* @brief Raises the privilege level by clearing the bit 0 of the CONTROL * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
* register. * register.
* *
* @note This is a privileged function and should only be called from the kernel * @note This is a privileged function and should only be called from the kenrel
* code. * code.
* *
* Bit 0 of the CONTROL register defines the privilege level of Thread Mode. * Bit 0 of the CONTROL register defines the privilege level of Thread Mode.

View file

@ -1,8 +1,6 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* Copyright 2024 Arm Limited and/or its affiliates
* <open-source-office@arm.com>
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
@ -127,18 +125,6 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */; extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */; extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
#if ( configENABLE_PAC == 1 )
/**
* @brief Generates 128-bit task's random PAC key.
*
* @param[out] pulTaskPacKey Pointer to a 4-word (128-bits) array to be
* filled with a 128-bit random number.
*/
void vApplicationGenerateTaskRandomPacKey( uint32_t * pulTaskPacKey );
#endif /* configENABLE_PAC */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
@ -151,7 +137,7 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
#define portPRIVILEGE_BIT ( 0x0UL ) #define portPRIVILEGE_BIT ( 0x0UL )
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* MPU settings that can be overridden in FreeRTOSConfig.h. */ /* MPU settings that can be overriden in FreeRTOSConfig.h. */
#ifndef configTOTAL_MPU_REGIONS #ifndef configTOTAL_MPU_REGIONS
/* Define to 8 for backward compatibility. */ /* Define to 8 for backward compatibility. */
#define configTOTAL_MPU_REGIONS ( 8UL ) #define configTOTAL_MPU_REGIONS ( 8UL )
@ -237,20 +223,7 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
*/ */
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
#if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) #if ( configENABLE_TRUSTZONE == 1 )
/*
* +-----------+---------------+----------+-----------------+------------------------------+------------+-----+
* | s16-s31 | s0-s15, FPSCR | r4-r11 | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, | TaskPacKey | |
* | | | | PC, xPSR | CONTROL, EXC_RETURN | | |
* +-----------+---------------+----------+-----------------+------------------------------+------------+-----+
*
* <-----------><--------------><---------><----------------><-----------------------------><-----------><---->
* 16 17 8 8 5 16 1
*/
#define MAX_CONTEXT_SIZE 71
#elif ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 0 ) )
/* /*
* +-----------+---------------+----------+-----------------+------------------------------+-----+ * +-----------+---------------+----------+-----------------+------------------------------+-----+
@ -259,24 +232,11 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
* +-----------+---------------+----------+-----------------+------------------------------+-----+ * +-----------+---------------+----------+-----------------+------------------------------+-----+
* *
* <-----------><--------------><---------><----------------><-----------------------------><----> * <-----------><--------------><---------><----------------><-----------------------------><---->
* 16 17 8 8 5 1 * 16 16 8 8 5 1
*/ */
#define MAX_CONTEXT_SIZE 55 #define MAX_CONTEXT_SIZE 54
#elif ( ( configENABLE_TRUSTZONE == 0 ) && ( configENABLE_PAC == 1 ) ) #else /* #if( configENABLE_TRUSTZONE == 1 ) */
/*
* +-----------+---------------+----------+-----------------+----------------------+------------+-----+
* | s16-s31 | s0-s15, FPSCR | r4-r11 | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL | TaskPacKey | |
* | | | | PC, xPSR | EXC_RETURN | | |
* +-----------+---------------+----------+-----------------+----------------------+------------+-----+
*
* <-----------><--------------><---------><----------------><---------------------><-----------><---->
* 16 17 8 8 4 16 1
*/
#define MAX_CONTEXT_SIZE 70
#else /* if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) */
/* /*
* +-----------+---------------+----------+-----------------+----------------------+-----+ * +-----------+---------------+----------+-----------------+----------------------+-----+
@ -285,28 +245,15 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
* +-----------+---------------+----------+-----------------+----------------------+-----+ * +-----------+---------------+----------+-----------------+----------------------+-----+
* *
* <-----------><--------------><---------><----------------><---------------------><----> * <-----------><--------------><---------><----------------><---------------------><---->
* 16 17 8 8 4 1 * 16 16 8 8 4 1
*/ */
#define MAX_CONTEXT_SIZE 54 #define MAX_CONTEXT_SIZE 53
#endif /* #if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) */ #endif /* #if( configENABLE_TRUSTZONE == 1 ) */
#else /* #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ #else /* #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */
#if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) #if ( configENABLE_TRUSTZONE == 1 )
/*
* +----------+-----------------+------------------------------+------------+-----+
* | r4-r11 | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, | TaskPacKey | |
* | | PC, xPSR | CONTROL, EXC_RETURN | | |
* +----------+-----------------+------------------------------+------------+-----+
*
* <---------><----------------><------------------------------><-----------><---->
* 8 8 5 16 1
*/
#define MAX_CONTEXT_SIZE 38
#elif ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 0 ) )
/* /*
* +----------+-----------------+------------------------------+-----+ * +----------+-----------------+------------------------------+-----+
@ -319,19 +266,6 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
*/ */
#define MAX_CONTEXT_SIZE 22 #define MAX_CONTEXT_SIZE 22
#elif ( ( configENABLE_TRUSTZONE == 0 ) && ( configENABLE_PAC == 1 ) )
/*
* +----------+-----------------+----------------------+------------+-----+
* | r4-r11 | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL | TaskPacKey | |
* | | PC, xPSR | EXC_RETURN | | |
* +----------+-----------------+----------------------+------------+-----+
*
* <---------><----------------><----------------------><-----------><---->
* 8 8 4 16 1
*/
#define MAX_CONTEXT_SIZE 37
#else /* #if( configENABLE_TRUSTZONE == 1 ) */ #else /* #if( configENABLE_TRUSTZONE == 1 ) */
/* /*
@ -345,7 +279,7 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
*/ */
#define MAX_CONTEXT_SIZE 21 #define MAX_CONTEXT_SIZE 21
#endif /* #if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) */ #endif /* #if( configENABLE_TRUSTZONE == 1 ) */
#endif /* #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ #endif /* #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */
@ -378,7 +312,7 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
* @brief Validate priority of ISRs that are allowed to call FreeRTOS * @brief Validate priority of ISRs that are allowed to call FreeRTOS
* system calls. * system calls.
*/ */
#if ( configASSERT_DEFINED == 1 ) #ifdef configASSERT
#if ( portHAS_ARMV8M_MAIN_EXTENSION == 1 ) #if ( portHAS_ARMV8M_MAIN_EXTENSION == 1 )
void vPortValidateInterruptPriority( void ); void vPortValidateInterruptPriority( void );
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -207,7 +207,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
* securecontextNO_STACK when no secure context is loaded. */ * securecontextNO_STACK when no secure context is loaded. */
if( ( ulIPSR != 0 ) && ( pucStackLimit == securecontextNO_STACK ) ) if( ( ulIPSR != 0 ) && ( pucStackLimit == securecontextNO_STACK ) )
{ {
/* Obtain a free secure context. */ /* Ontain a free secure context. */
ulSecureContextIndex = ulGetSecureContext( pvTaskHandle ); ulSecureContextIndex = ulGetSecureContext( pvTaskHandle );
/* Were we able to get a free context? */ /* Were we able to get a free context? */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
@ -29,9 +29,6 @@
/* Standard includes. */ /* Standard includes. */
#include <stdint.h> #include <stdint.h>
/* Configuration includes. */
#include "FreeRTOSConfig.h"
/* Secure context heap includes. */ /* Secure context heap includes. */
#include "secure_heap.h" #include "secure_heap.h"
@ -237,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
} }
/* If the block being inserted plugged a gap, so was merged with the block /* If the block being inserted plugged a gab, so was merged with the block
* before and the block after, then it's pxNextFreeBlock pointer will have * before and the block after, then it's pxNextFreeBlock pointer will have
* already been set, and should not be set here as that would make it point * already been set, and should not be set here as that would make it point
* to itself. */ * to itself. */
@ -259,7 +256,6 @@ void * pvPortMalloc( size_t xWantedSize )
BlockLink_t * pxNewBlockLink; BlockLink_t * pxNewBlockLink;
void * pvReturn = NULL; void * pvReturn = NULL;
size_t xAdditionalRequiredSize; size_t xAdditionalRequiredSize;
size_t xAllocatedBlockSize = 0;
/* If this is the first call to malloc then the heap will require /* If this is the first call to malloc then the heap will require
* initialisation to setup the list of free blocks. */ * initialisation to setup the list of free blocks. */
@ -378,8 +374,6 @@ void * pvPortMalloc( size_t xWantedSize )
mtCOVERAGE_TEST_MARKER(); mtCOVERAGE_TEST_MARKER();
} }
xAllocatedBlockSize = pxBlock->xBlockSize;
/* The block is being returned - it is allocated and owned by /* The block is being returned - it is allocated and owned by
* the application and has no "next" block. */ * the application and has no "next" block. */
secureheapALLOCATE_BLOCK( pxBlock ); secureheapALLOCATE_BLOCK( pxBlock );
@ -400,10 +394,7 @@ void * pvPortMalloc( size_t xWantedSize )
mtCOVERAGE_TEST_MARKER(); mtCOVERAGE_TEST_MARKER();
} }
traceMALLOC( pvReturn, xAllocatedBlockSize ); traceMALLOC( pvReturn, xWantedSize );
/* Prevent compiler warnings when trace macros are not used. */
( void ) xAllocatedBlockSize;
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 ) #if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
{ {

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT

View file

@ -1,46 +0,0 @@
# RH850/F1K and F1Kx FreeRTOS Port with CC-RH Compiler
## Introduction
This repository contains the port of FreeRTOS for Renesas RH850/F1K and F1Kx microcontrollers using the CC-RH compiler. The following sections provide instructions on how to use this port, a link to the test project, and other relevant information.
## Prerequisites
- Compiler: CC-RH
- FreeRTOS version 11.1.0
| Device | FPU | SMP |
|----------|-----|-----|
| F1K | Yes | No |
| F1KM-S1 | Yes | No |
| F1KM-S2 | Yes | No |
| F1KM-S4 | Yes | No |
| F1KH-D8 | Yes | Yes |
## Link to Test Project
The test project can be found [here](https://github.com/FreeRTOS/FreeRTOS-Community-Supported-Demos) (`RH850_F1Kx_CCRH`). This project contains example tasks and configurations to help you get started with FreeRTOS on the RH850/F1K and F1Kx.
## Note
1. Configure IPIR Interrupt: Ensure that the bit specifying the destination for binding (requesting) an interrupt is enabled (e.g: IBDxxx register of F1KH-D8) (1)
2. `Channel 0` and address `0xFFFEEC00` are used as default configuration for configIPIR_CHANNEL and configEXCLUSIVE_ADDRESS, in case of resource confliction other channel/address can be used. (2)
3. The minimal stack size (configMINIMAL_STACK_SIZE) must be included the reserved memory for nested interrupt. This formula can be referred: `(task_context_size) * (2 + configMAX_INT_NESTING) + Stack_depth_of_taskcode`
In which, `task_context_size` is calculated as `36*4bytes = 144bytes` (when FPU enabled) or `34*4bytes = 136` (when FPU disabled), configMAX_INT_NESTING is `02` as default (Note that a value of `0` is not allowed).
4. `configTIMER_PRESCALE`: This value is required in order to correctly configure clock for `CPUCLK_L`. Refer to Hardware Manual at `Table 44.22` for `option byte`: If the user sets the option byte `CKDIVMD to 1`, then `configTIMER_PRESCALE = 4`. Otherwise, if `CKDIVMD is set to 0`, then `configTIMER_PRESCALE = 2`.
(1) This is applicable for F1KH-D8 with SMP only.
(2) This is optional and applicable for SMP only.
## Other Relevant Information
- **Documentation:**
- Refer to the official [FreeRTOS documentation](https://www.freertos.org/Documentation/RTOS_book.html) for detailed information on configuring and using FreeRTOS.
- Consult the [RH850 F1K group user manual hardware manual](https://www.renesas.com/us/en/document/mah/rh850f1k-group-users-manual-hardware?r=1170166) for specific details about the microcontroller.
- For more information about Renesas RH850/F1K and F1Kx, please visit [this website](https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rh850-automotive-mcus)
- The CC-RH compiler can be downloaded [here](https://www.renesas.com/us/en/software-tool/c-compiler-package-rh850-family#downloads)
- **Support:**
- If you encounter any issues or have questions about this port, please open an issue in this repository or contact the maintainer.
- **Contributing:**
- Contributions to improve this port are welcome. Please fork the repository, make your changes, and submit a pull request.

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/*
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* This port uses xTaskGetCurrentTaskHandle to get TCB stack, it is required to
* enable this API. */
#if ( ( INCLUDE_xTaskGetCurrentTaskHandle != 1 ) && ( configNUMBER_OF_CORES == 1 ) )
#error INCLUDE_xTaskGetCurrentTaskHandle must be set to 1 in single core.
#endif
/***********************************************************
* Macro definitions
***********************************************************/
/* Hardware specific macros */
#define portPSW_REGISTER_ID ( 5 )
#define portFPSR_REGISTER_ID ( 6 )
/* PSW.EBV and PSW.CUx bits are kept as current status */
#define portINITIAL_PSW_MASK ( 0x000f8000 )
#define portCURRENT_PSW_VALUE ( portSTSR( portPSW_REGISTER_ID ) )
#define portCURRENT_SR_ZERO_VALUE ( ( StackType_t ) 0x00000000 )
#define portCURRENT_FPSR_VALUE ( portSTSR( portFPSR_REGISTER_ID ) )
/* Mask for FPU configuration bits (FN, PEM, RM, FS) */
#define portINITIAL_FPSR_MASK ( 0x00ae0000 )
#define portPSW_ID_MASK ( 0x00000020 )
/* Define necessary hardware IO for OSTM timer. OSTM0 is used by default as
* it is common for almost device variants. If it conflicts with application,
* the application shall implement another timer.*/
#define portOSTM_EIC_ADDR ( 0xFFFFB0A8 )
#define portOSTM0CMP_ADDR ( 0xFFD70000 )
#define portOSTM0CTL_ADDR ( 0xFFD70020 )
#define portOSTM0TS_ADDR ( 0xFFD70014 )
#if ( configNUMBER_OF_CORES > 1 )
/* IPIR base address, the peripheral is used for Inter-Processor communication
* Hardware supports 4 channels which is offset by 0x0, 0x4, 0x8, 0xC bytes from
* base address. By default, channel 0 is selected. */
#ifdef configIPIR_CHANNEL
#define portIPIR_BASE_ADDR ( ( 0xFFFEEC80 ) + ( configIPIR_CHANNEL << 2 ) )
#else
#define portIPIR_BASE_ADDR ( 0xFFFEEC80 )
#endif
/* Address used for exclusive control for variable shared between PEs
* (common resources), each CPU cores have independent access path to
* this address. By default, G0MEV0 register is selected*/
#ifdef configEXCLUSIVE_ADDRESS
#define portMEV_BASE_ADDR configEXCLUSIVE_ADDRESS
#else
#define portMEV_BASE_ADDR ( 0xFFFEEC00 )
#endif
#endif /* if ( configNUMBER_OF_CORES > 1 ) */
/* Macros required to set up the initial stack. */
#define portSTACK_INITIAL_VALUE_R1 ( ( StackType_t ) 0x01010101 )
#define portSTACK_INITIAL_VALUE_R2 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x02 )
#define portSTACK_INITIAL_VALUE_R3 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x03 )
#define portSTACK_INITIAL_VALUE_R4 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x04 )
#define portSTACK_INITIAL_VALUE_R5 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x05 )
#define portSTACK_INITIAL_VALUE_R6 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x06 )
#define portSTACK_INITIAL_VALUE_R7 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x07 )
#define portSTACK_INITIAL_VALUE_R8 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x08 )
#define portSTACK_INITIAL_VALUE_R9 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x09 )
#define portSTACK_INITIAL_VALUE_R10 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x10 )
#define portSTACK_INITIAL_VALUE_R11 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x11 )
#define portSTACK_INITIAL_VALUE_R12 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x12 )
#define portSTACK_INITIAL_VALUE_R13 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x13 )
#define portSTACK_INITIAL_VALUE_R14 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x14 )
#define portSTACK_INITIAL_VALUE_R15 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x15 )
#define portSTACK_INITIAL_VALUE_R16 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x16 )
#define portSTACK_INITIAL_VALUE_R17 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x17 )
#define portSTACK_INITIAL_VALUE_R18 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x18 )
#define portSTACK_INITIAL_VALUE_R19 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x19 )
#define portSTACK_INITIAL_VALUE_R20 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x20 )
#define portSTACK_INITIAL_VALUE_R21 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x21 )
#define portSTACK_INITIAL_VALUE_R22 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x22 )
#define portSTACK_INITIAL_VALUE_R23 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x23 )
#define portSTACK_INITIAL_VALUE_R24 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x24 )
#define portSTACK_INITIAL_VALUE_R25 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x25 )
#define portSTACK_INITIAL_VALUE_R26 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x26 )
#define portSTACK_INITIAL_VALUE_R27 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x27 )
#define portSTACK_INITIAL_VALUE_R28 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x28 )
#define portSTACK_INITIAL_VALUE_R29 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x29 )
#define portSTACK_INITIAL_VALUE_R30 ( ( StackType_t ) portSTACK_INITIAL_VALUE_R1 * 0x30 )
/***********************************************************
* Typedef definitions
***********************************************************/
/* OSTM Count Start Trigger Register (OSTMnTS) */
#define portOSTM_COUNTER_START ( 0x01U ) /* Starts the counter */
/* OSTM Count Stop Trigger Register (OSTMnTT) */
#define portOSTM_COUNTER_STOP ( 0x01U ) /* Stops the counter */
/* OSTM Control Register (OSTMnCTL) */
#define portOSTM_MODE_INTERVAL_TIMER ( 0x00U )
#define portOSTM_MODE_FREE_RUNNING ( 0x02U )
/* Disables or Enable the interrupts when counting starts */
#define portOSTM_START_INTERRUPT_DISABLE ( 0x00U )
#define portOSTM_START_INTERRUPT_ENABLE ( 0x01U )
/* Interrupt vector method select (TBxxx) */
#define portINT_DIRECT_VECTOR ( 0x0U )
#define portINT_TABLE_VECTOR ( 0x1U )
/* Interrupt mask (MKxxx) */
#define portINT_PROCESSING_ENABLED ( 0x0U )
#define portINT_PROCESSING_DISABLED ( 0x1U )
/* Specify 16 interrupt priority levels */
#define portINT_PRIORITY_HIGHEST ( 0x0000U ) /* Level 0 (highest) */
#define portINT_PRIORITY_LEVEL1 ( 0x0001U ) /* Level 1 */
#define portINT_PRIORITY_LEVEL2 ( 0x0002U ) /* Level 2 */
#define portINT_PRIORITY_LEVEL3 ( 0x0003U ) /* Level 3 */
#define portINT_PRIORITY_LEVEL4 ( 0x0004U ) /* Level 4 */
#define portINT_PRIORITY_LEVEL5 ( 0x0005U ) /* Level 5 */
#define portINT_PRIORITY_LEVEL6 ( 0x0006U ) /* Level 6 */
#define portINT_PRIORITY_LEVEL7 ( 0x0007U ) /* Level 7 */
#define portINT_PRIORITY_LEVEL8 ( 0x0008U ) /* Level 8 */
#define portINT_PRIORITY_LEVEL9 ( 0x0009U ) /* Level 9 */
#define portINT_PRIORITY_LEVEL10 ( 0x000AU ) /* Level 10 */
#define portINT_PRIORITY_LEVEL11 ( 0x000BU ) /* Level 11 */
#define portINT_PRIORITY_LEVEL12 ( 0x000CU ) /* Level 12 */
#define portINT_PRIORITY_LEVEL13 ( 0x000DU ) /* Level 13 */
#define portINT_PRIORITY_LEVEL14 ( 0x000EU ) /* Level 14 */
#define portINT_PRIORITY_LOWEST ( 0x000FU ) /* Level 15 (lowest) */
/* Macros indicating status of scheduler request */
#define PORT_SCHEDULER_NOREQUEST 0UL
#define PORT_SCHEDULER_TASKSWITCH 1UL /* Do not modify */
#define PORT_SCHEDULER_STARTFIRSTTASK 2UL /* Do not modify */
#ifndef configSETUP_TICK_INTERRUPT
/* The user has not provided their own tick interrupt configuration so use
* the definition in this file (which uses the interval timer). */
#define configSETUP_TICK_INTERRUPT() prvSetupTimerInterrupt()
#endif /* configSETUP_TICK_INTERRUPT */
#if ( !defined( configMAX_INT_NESTING ) || ( configMAX_INT_NESTING == 0 ) )
/* Set the default value for depth of nested interrupt. In theory, the
* microcontroller have mechanism to limit number of nested level of interrupt
* by priority (maximum 16 levels). However, the large stack memory should be
* prepared for each task to save resource in interrupt handler. Therefore, it
* is necessary to limit depth of nesting interrupt to optimize memory usage.
* In addition, the execution time of interrupt handler should be very short
* (typically not exceed 20us), this constraint does not impact to system.
*/
#define configMAX_INT_NESTING 2UL
#endif
/*
* Used to catch tasks that attempt to return from their implementing function.
*/
static void prvTaskExitError( void );
/*
* Sets up the periodic ISR used for the RTOS tick using the OSTM.
* The application writer can define configSETUP_TICK_INTERRUPT() (in
* FreeRTOSConfig.h) such that their own tick interrupt configuration is used
* in place of prvSetupTimerInterrupt().
*/
static void prvSetupTimerInterrupt( void );
#if ( configNUMBER_OF_CORES > 1 )
/*
* Functions implement spin-lock between cores by atomic accesses to Exclusive
* Control Register (G0MEVm). There are separated access path between CPU cores,
* but they should wait if access to same register
*/
static void prvExclusiveLock( BaseType_t xFromIsr );
static void prvExclusiveRelease( BaseType_t xFromIsr );
#endif
/*
* Function to start the first task executing
*/
extern void vPortStartFirstTask( void );
/* Scheduler request on each cores which are starting first task and switching
* context */
volatile BaseType_t xPortScheduleStatus[ configNUMBER_OF_CORES ] = { 0 };
/* Counts the interrupt nesting depth. A context switch is only performed if
* the nesting depth is 0. In addition, the interrupt shares same stack
* allocated for each tasks. With supporting nesting interrupt, the stack
* may be overflowed.
* It is necessary to control maximum stack depth.
*/
volatile UBaseType_t uxInterruptNesting[ configNUMBER_OF_CORES ] = { 0 };
volatile const UBaseType_t uxPortMaxInterruptDepth = configMAX_INT_NESTING;
/* Count number of nested locks by same cores. The lock is completely released
* only if this count is decreased to 0, the lock is separated for task
* and isr */
UBaseType_t uxLockNesting[ configNUMBER_OF_CORES ][ 2 ] = { 0 };
#if ( configNUMBER_OF_CORES > 1 )
/* Pointer to exclusive access memory */
volatile BaseType_t * pxPortExclusiveReg = ( volatile BaseType_t * ) ( portMEV_BASE_ADDR );
#endif
/* Interrupt handler for OSTM timer which handling tick increment and resulting
* to switch context. */
void vPortTickISR( void );
#if ( configNUMBER_OF_CORES > 1 )
/* Yield specific cores by send inter-processor interrupt */
void vPortYieldCore( uint32_t xCoreID );
/*
* Inter-processor interrupt handler. The interrupt is triggered by
* portYIELD_CORE().
*/
void vPortIPIHander( void );
/* These functions below implement recursive spinlock for exclusive access among
* cores. The core will wait until lock will be available, whilst the core which
* already had lock can acquire lock without waiting. This function could be
* call from task and interrupt context, the critical section is called
* as in ISR */
void vPortRecursiveLockAcquire( BaseType_t xCoreID, BaseType_t xFromIsr );
void vPortRecursiveLockRelease( BaseType_t xCoreID, BaseType_t xFromIsr );
#endif /* (configNUMBER_OF_CORES > 1) */
/*-----------------------------------------------------------*/
/*
* These below functions implement interrupt mask from interrupt. They are not
* called in nesting, it is protected by FreeRTOS kernel.
*/
portLONG xPortSetInterruptMask( void )
{
portLONG ulPSWValue = portSTSR( portPSW_REGISTER_ID );
portDISABLE_INTERRUPTS();
/* It returns current value of Program Status Word register */
return ulPSWValue;
}
/*-----------------------------------------------------------*/
void vPortClearInterruptMask( portLONG uxSavedInterruptStatus )
{
portLONG ulPSWValue = portSTSR( portPSW_REGISTER_ID );
/* Interrupt Disable status is indicates by bit#5 of PSW
* (1: Interrupt is disabled; 0: Interrupt is enabled) */
/* Revert to the status before interrupt mask. */
ulPSWValue &= ( ~( portPSW_ID_MASK ) );
ulPSWValue |= ( portPSW_ID_MASK & uxSavedInterruptStatus );
portLDSR( portPSW_REGISTER_ID, ulPSWValue );
}
/*-----------------------------------------------------------*/
/*
* Using CC-RH intrinsic function to get HTCFG0 (regID, selID) = (0,2)
* Core ID is indicates by bit HTCFG0.PEID located at bit 18 to 16
* Bit 31 to 19 are read only and always be read as 0. HTCFG0.PEID is 1 and 2
* corresponding to core 0 (PE1) and core 1 (PE2). It is adjusted to 0 and 1.
*/
BaseType_t xPortGET_CORE_ID( void )
{
#if ( configNUMBER_OF_CORES > 1 )
return ( portSTSR_CCRH( 0, 2 ) >> 16 ) - 1;
#else
/* In single core, xPortGET_CORE_ID is used in this port only.
* The dummy core ID could be controlled inside this port. */
return 0;
#endif
}
/*-----------------------------------------------------------*/
/*
* This port supports both multi-cores and single-core, whilst TCB stack
* variables are different which are respectively pxCurrentTCB (single-core)
* and pxCurrentTCBs[] (multiple-cores). This function is defined to obtains
* TCBs of current cores. Also, the C function could switch to corresponding
* pointer by pre-compile conditions.
*/
void * pvPortGetCurrentTCB( void )
{
void * pvCurrentTCB = ( void * ) xTaskGetCurrentTaskHandle();
configASSERT( pvCurrentTCB != NULL );
return pvCurrentTCB;
}
/*-----------------------------------------------------------*/
/*
* This function checks if a context switch is required and, if so, updates
* the scheduler status for the core on which the function is called. The
* scheduler status is set to indicate that a task switch should occur.
*/
void vPortSetSwitch( BaseType_t xSwitchRequired )
{
if( xSwitchRequired != pdFALSE )
{
xPortScheduleStatus[ xPortGET_CORE_ID() ] = PORT_SCHEDULER_TASKSWITCH;
}
}
/*-----------------------------------------------------------*/
/*
* Setup the stack of a new task so it is ready to be placed under the
* scheduler control. The registers have to be placed on the stack in the
* order that the port expects to find them.
*
* @param[in] pxTopOfStack Pointer to top of this task's stack
* @param[in] pxCode Task function, stored as initial PC for the task
* @param[in] pvParameters Parameters for task
*/
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
{
/* Simulate the stack frame as it would be created by
* a context switch interrupt. */
*pxTopOfStack = ( StackType_t ) prvTaskExitError; /* R31 (LP) */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R5; /* R5 (TP) */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) pvParameters; /* R6 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R7; /* R7 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R8; /* R8 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R9; /* R9 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R10; /* R10 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R11; /* R11 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R12; /* R12 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R13; /* R13 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R14; /* R14 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R15; /* R15 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R16; /* R16 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R17; /* R17 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R18; /* R18 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R19; /* R19 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R20; /* R20 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R21; /* R21 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R22; /* R22 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R23; /* R23 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R24; /* R24 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R25; /* R25 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R26; /* R26 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R27; /* R27 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R28; /* R28 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R29; /* R29 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R30; /* R30 (EP) */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R1; /* R1 */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portSTACK_INITIAL_VALUE_R2; /* R2 */
pxTopOfStack--;
/* Keep System pre-configuration (HV, CUx, EBV) as current setting in
* PSW register */
*pxTopOfStack = ( StackType_t ) ( portCURRENT_PSW_VALUE & portINITIAL_PSW_MASK ); /* EIPSW */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) pxCode; /* EIPC */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portCURRENT_SR_ZERO_VALUE; /* EIIC */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) ( portCURRENT_PSW_VALUE & portINITIAL_PSW_MASK ); /* CTPSW */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portCURRENT_SR_ZERO_VALUE; /* CTPC */
/* __FPU is defined by CCRH compiler if FPU is enabled */
#if ( configENABLE_FPU == 1 )
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) ( portCURRENT_FPSR_VALUE & portINITIAL_FPSR_MASK ); /* FPSR */
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) portCURRENT_SR_ZERO_VALUE; /* FPEPC */
#endif /* (configENABLE_FPU == 1) */
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
/*
* Configures the tick frequency and starts the first task.
*/
BaseType_t xPortStartScheduler( void )
{
#if ( configNUMBER_OF_CORES > 1 )
BaseType_t xCurrentCore = xPortGET_CORE_ID();
#endif
/* Prevent interrupt by timer interrupt during starting first task.
* The interrupt shall be enabled automatically by being restored from
* task stack */
portDISABLE_INTERRUPTS();
/* Setup the tick interrupt */
configSETUP_TICK_INTERRUPT();
#if ( configNUMBER_OF_CORES > 1 )
/* Start scheduler on other cores */
for( uint16_t xCoreID = 0; xCoreID < configNUMBER_OF_CORES; xCoreID++ )
{
if( xCoreID != xCurrentCore )
{
/* Send yielding request to other cores with flag to start
* first task. TaskContextSwitch is not executed */
xPortScheduleStatus[ xCoreID ] = PORT_SCHEDULER_STARTFIRSTTASK;
vPortYieldCore( xCoreID );
}
else
{
/* Nothing to do. The first task is started in this call by
* below vPortStartFirstTask() */
xPortScheduleStatus[ xCoreID ] = PORT_SCHEDULER_NOREQUEST;
}
}
#endif /* if ( configNUMBER_OF_CORES > 1 ) */
/* Start first task in primary core */
vPortStartFirstTask();
/* Should never get here as the tasks will now be executing! */
prvTaskExitError();
/* To prevent compiler warnings in the case that the application writer
* overrides this functionality by defining configTASK_RETURN_ADDRESS.
* Call vTaskSwitchContext() so link time optimization does not remove
* the symbol. */
vTaskSwitchContext(
#if ( configNUMBER_OF_CORES > 1 )
xCurrentCore
#endif
);
return pdFALSE;
}
/*-----------------------------------------------------------*/
/*
* Used to catch tasks that attempt to return from their implementing function.
*/
static void prvTaskExitError( void )
{
/* A function that implements a task must not exit or attempt to return to
* its caller as there is nothing to return to. If a task wants to exit it
* should instead call vTaskDelete( NULL ).
*
* Artificially force an assert() to be triggered if configASSERT() is
* defined, then stop here so application writers can catch the error. */
/* This statement will always fail, triggering the assert */
configASSERT( pdFALSE );
/*
* The following statement may be unreachable because configASSERT(pdFALSE)
* always triggers an assertion failure, which typically halts program
* execution.
* The warning may be reported to indicate to indicate that the compiler
* detects the subsequent code will not be executed.
* The warning is acceptable to ensure program is halt regardless of
* configASSERT(pdFALSE) implementation
*/
portDISABLE_INTERRUPTS();
for( ; ; )
{
/* Infinite loop to ensure the function does not return. */
}
}
/*-----------------------------------------------------------*/
void vPortEndScheduler( void )
{
/* Not implemented in ports where there is nothing to return to.
* Artificially force an assert. */
configASSERT( pdFALSE );
}
/*-----------------------------------------------------------*/
#if ( configNUMBER_OF_CORES > 1 )
void vPortYieldCore( uint32_t xCoreID )
{
/* Check if we need to yield on a different core */
if( xCoreID != xPortGET_CORE_ID() )
{
volatile uint32_t * pulIPIRReg;
/* Determine the IPI register based on the target core ID */
pulIPIRReg = ( volatile uint32_t * ) ( portIPIR_BASE_ADDR );
/*Inter-processor interrupt generates an interrupt request by
* writing 1 to applicable bits of target cores. The interrupt
* should be enabled by application in corresponding cores
* including PSW.ID (EI instruction) and interrupt control setting
* for ICIPIRn channel (interrupt mask, vector method)
*/
*pulIPIRReg = ( 1 << xCoreID );
}
else
{
/* Yielding current core */
vPortYield();
}
}
/*-----------------------------------------------------------*/
/*
* Handler for inter-processor interrupt in second cores. The interrupt is
* triggered by portYIELD_CORE(). vTaskSwitchContext() is invoked to
* switch tasks
*/
void vPortIPIHander( void )
{
BaseType_t xCurrentCore = xPortGET_CORE_ID();
/* 1st execution starts 1st task, TaskSwitchContext is not executed */
if( PORT_SCHEDULER_STARTFIRSTTASK != xPortScheduleStatus[ xCurrentCore ] )
{
xPortScheduleStatus[ xCurrentCore ] = PORT_SCHEDULER_TASKSWITCH;
}
}
/*-----------------------------------------------------------*/
#endif /* (configNUMBER_OF_CORES > 1) */
void vPortTickISR( void )
{
/* In case of multicores with SMP, xTaskIncrementTick is required to
* called in critical section to avoid conflict resource as this function
* could be called by xTaskResumeAll() from any cores. */
#if ( configNUMBER_OF_CORES > 1 )
BaseType_t xSavedInterruptStatus;
xSavedInterruptStatus = portENTER_CRITICAL_FROM_ISR();
#endif
{
/* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE )
{
/* Pend a context switch. */
xPortScheduleStatus[ xPortGET_CORE_ID() ] = PORT_SCHEDULER_TASKSWITCH;
}
}
#if ( configNUMBER_OF_CORES > 1 )
portEXIT_CRITICAL_FROM_ISR( xSavedInterruptStatus );
#endif
}
/*-----------------------------------------------------------*/
static void prvSetupTimerInterrupt( void )
{
volatile uint32_t * pulOSTMIntReg;
/* Interrupt configuration for OSTM Timer
* By default, the second lowest priority is set for timer interrupt to
* avoid blocking other interrupt. Normally, user could set the lowest
* priority for non-critical event. It try to keep timer on time.
* In addition, direct vector table is used by default.
*/
pulOSTMIntReg = ( volatile uint32_t * ) portOSTM_EIC_ADDR;
*pulOSTMIntReg = ( portINT_PROCESSING_ENABLED | portINT_DIRECT_VECTOR | portINT_PRIORITY_LEVEL14 );
/* Set OSTM0 control setting */
*( ( volatile uint32_t * ) portOSTM0CTL_ADDR ) =
( portOSTM_MODE_INTERVAL_TIMER | portOSTM_START_INTERRUPT_DISABLE );
*( ( volatile uint32_t * ) portOSTM0CMP_ADDR ) =
( ( configCPU_CLOCK_HZ / configTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1;
/* Enable OSTM0 operation */
*( ( volatile uint32_t * ) portOSTM0TS_ADDR ) = portOSTM_COUNTER_START;
}
/*-----------------------------------------------------------*/
#if ( configNUMBER_OF_CORES > 1 )
/*
* These functions implement spin-lock mechanism among cores using hardware
* exclusive control with atomic access by CLR1 and SET1 instruction.
* Nesting calls to these APIs are possible.
*/
#pragma inline_asm prvExclusiveLock
static void prvExclusiveLock( BaseType_t xBitPosition )
{
/* No problem with r19, CCRH does not required to restore same value
* before and after function call. */
mov # _pxPortExclusiveReg, r19
ld.w 0[ r19 ], r19
prvExclusiveLock_Lock:
/* r6 is xBitPosition */
set1 r6, [ r19 ]
bz prvExclusiveLock_Lock_success
snooze
br prvExclusiveLock_Lock
prvExclusiveLock_Lock_success:
}
/*-----------------------------------------------------------*/
#pragma inline_asm prvExclusiveRelease
static void prvExclusiveRelease( BaseType_t xBitPosition )
{
mov # _pxPortExclusiveReg, r19
ld.w 0[ r19 ], r19
/* r6 is xBitPosition */
clr1 r6, [ r19 ]
}
/*-----------------------------------------------------------*/
void vPortRecursiveLockAcquire( BaseType_t xCoreID, BaseType_t xFromIsr )
{
BaseType_t xSavedInterruptStatus;
BaseType_t xBitPosition = ( xFromIsr == pdTRUE );
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
if( uxLockNesting[ xCoreID ][ xBitPosition ] == 0 )
{
prvExclusiveLock( xBitPosition );
}
uxLockNesting[ xCoreID ][ xBitPosition ]++;
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus );
}
void vPortRecursiveLockRelease( BaseType_t xCoreID, BaseType_t xFromIsr )
{
BaseType_t xSavedInterruptStatus;
BaseType_t xBitPosition = ( xFromIsr == pdTRUE );
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
/* Sync memory */
portSYNCM();
/* Error check whether vPortRecursiveLockRelease() is not called in
* pair with vPortRecursiveLockAcquire() */
configASSERT( ( uxLockNesting[ xCoreID ][ xBitPosition ] > 0 ) );
uxLockNesting[ xCoreID ][ xBitPosition ]--;
if( uxLockNesting[ xCoreID ][ xBitPosition ] == 0 )
{
prvExclusiveRelease( xBitPosition );
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus );
}
/*-----------------------------------------------------------*/
#endif /* (configNUMBER_OF_CORES > 1) */

View file

@ -1,331 +0,0 @@
;/*
; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * SPDX-License-Identifier: MIT
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
; * this software and associated documentation files (the "Software"), to deal in
; * the Software without restriction, including without limitation the rights to
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
; * the Software, and to permit persons to whom the Software is furnished to do so,
; * subject to the following conditions:
; *
; * The above copyright notice and this permission notice shall be included in all
; * copies or substantial portions of the Software.
; *
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
; *
; * https://www.FreeRTOS.org
; * https://github.com/FreeRTOS
; *
; */
;------------------------------------------------------------------------------
; Extern symbols
;------------------------------------------------------------------------------
.extern _uxInterruptNesting
.extern _uxPortMaxInterruptDepth
.extern _xPortScheduleStatus
.extern _vTaskSwitchContext
.extern _pvPortGetCurrentTCB
.extern _vCommonISRHandler
.extern _xPortGET_CORE_ID
.public _vIrq_Handler
.public _vPortStartFirstTask
.public _vPortYield
.public _vTRAP0_Handler
;------------------------------------------------------------------------------
; Macro definitions
;------------------------------------------------------------------------------
EIPC .set 0
EIPSW .set 1
PSW .set 5
FPSR .set 6
FPEPC .set 7
EIIC .set 13
CTPC .set 16
CTPSW .set 17
EIIC_MSK .set 0x00000FFF
FPU_MSK .set 0x00010000
;------------------------------------------------------------------------------
; portSAVE_CONTEXT
; Context saving
;------------------------------------------------------------------------------
portSAVE_CONTEXT .macro
prepare lp, 0
; Save general-purpose registers and EIPSW, EIPC, EIIC, CTPSW, CTPC into stack.
pushsp r5, r30
$nowarning
pushsp r1, r2
$warning
stsr EIPSW, r15
stsr EIPC, r16
stsr EIIC, r17
stsr CTPSW, r18
stsr CTPC, r19
pushsp r15, r19
; Save FPU registers to stack if FPU is enabled
mov FPU_MSK, r19
tst r15, r19
; Jump over next 3 instructions: stsr (4 bytes)*2 + pushsp (4 bytes)
bz 12
stsr FPSR, r18
stsr FPEPC, r19
pushsp r18, r19
; Save EIPSW register to stack
; Due to the syntax of the pushsp instruction, using r14 as dummy value
pushsp r14, r15
; Get current TCB, the return value is stored in r10 (CCRH compiler)
jarl _pvPortGetCurrentTCB, lp
st.w sp, 0[r10]
.endm
;------------------------------------------------------------------------------
; portRESTORE_CONTEXT
; Context restoring
;------------------------------------------------------------------------------
portRESTORE_CONTEXT .macro
; Current TCB is returned by r10 (CCRH compiler)
jarl _pvPortGetCurrentTCB, lp
ld.w 0[r10], sp ; Restore the stack pointer from the TCB
; Restore FPU registers if FPU is enabled
mov FPU_MSK, r19
; Restore EIPSW register to check FPU
; Due to the syntax of the popsp instruction, using r14 as dummy value
popsp r14, r15
tst r15, r19
; Jump over next 3 instructions: stsr (4 bytes)*2 + popsp (4 bytes)
bz 12
popsp r18, r19
ldsr r19, FPEPC
ldsr r18, FPSR
;Restore general-purpose registers and EIPSW, EIPC, EIIC, CTPSW, CTPC
popsp r15, r19
ldsr r19, CTPC
ldsr r18, CTPSW
ldsr r17, EIIC
ldsr r16, EIPC
ldsr r15, EIPSW
$nowarning
popsp r1, r2
$warning
popsp r5, r30
dispose 0, lp
.endm
;------------------------------------------------------------------------------
; Save used registers
;------------------------------------------------------------------------------
SAVE_REGISTER .macro
; Save general-purpose registers and EIPSW, EIPC, EIIC, CTPSW, CTPC into stack.
; Callee-Save registers (r20 to r30) are not used in interrupt handler and
; guaranteed no change after function call. So, don't need to save register
; to optimize the used stack memory.
pushsp r5, r19
$nowarning
pushsp r1, r2
$warning
stsr EIPSW, r19
stsr EIPC, r18
stsr EIIC, r17
mov lp, r16
mov ep, r15
stsr CTPSW, r14
stsr CTPC, r13
pushsp r13, r18
mov FPU_MSK, r16
tst r16, r19
bz 8
stsr FPSR, r17
stsr FPEPC, r18
pushsp r17, r19
.endm
;------------------------------------------------------------------------------
; Restore used registers
;------------------------------------------------------------------------------
RESTORE_REGISTER .macro
mov FPU_MSK, r15
popsp r17, r19
tst r19, r15
bz 8
ldsr r18, FPEPC
ldsr r17, FPSR
popsp r13, r18
ldsr r13, CTPC
ldsr r14, CTPSW
mov r15, ep
mov r16, lp
ldsr r17, EIIC
ldsr r18, EIPC
ldsr r19, EIPSW
$nowarning
popsp r1, r2
$warning
popsp r5, r19
.endm
;------------------------------------------------------------------------------
; Start the first task.
;------------------------------------------------------------------------------
_vPortStartFirstTask:
portRESTORE_CONTEXT
eiret
;------------------------------------------------------------------------------
; _vPortYield
;------------------------------------------------------------------------------
_vPortYield:
trap 0
jmp [lp] ; Return to caller function
;------------------------------------------------------------------------------
; PortYield handler. This is installed as the TRAP exception handler.
;------------------------------------------------------------------------------
_vTRAP0_Handler:
;Save the context of the current task.
portSAVE_CONTEXT
; The use case that portYield() is called from interrupt context as nested interrupt.
; Context switch should be executed at the most outer of interrupt tree.
; In that case, set xPortScheduleStatus to flag context switch in interrupt handler.
jarl _xPortGET_CORE_ID, lp ; return value is contained in r10 (CCRH compiler)
mov r10, r11
shl 2, r11
mov #_uxInterruptNesting, r19
add r11, r19
ld.w 0[r19], r18
cmp r0, r18
be _vTRAP0_Handler_ContextSwitch
mov #_xPortScheduleStatus, r19
add r11, r19
; Set xPortScheduleStatus[coreID]=PORT_SCHEDULER_TASKSWITCH
mov 1, r17
st.w r17, 0[r19]
br _vTRAP0_Handler_Exit
_vTRAP0_Handler_ContextSwitch:
; Pass coreID (r10) as parameter by r6 (CCRH compiler) in SMP support.
mov r10, r6
; Call the scheduler to select the next task.
; vPortYeild may be called to current core again at the end of vTaskSwitchContext.
; This may case nested interrupt, however, it is not necessary to set
; uxInterruptNesting (currently 0) for nested trap0 exception. The user interrupt
; (EI level interrupt) is not accepted inside of trap0 exception.
jarl _vTaskSwitchContext, lp
_vTRAP0_Handler_Exit:
; Restore the context of the next task to run.
portRESTORE_CONTEXT
eiret
;------------------------------------------------------------------------------
; _Irq_Handler
; Handler interrupt service routine (ISR).
;------------------------------------------------------------------------------
_vIrq_Handler:
; Save used registers.
SAVE_REGISTER
; Get core ID by HTCFG0, thread configuration register.
; Then, increase nesting count for current core.
jarl _xPortGET_CORE_ID, lp ; return value is contained in r10 (CCRH compiler)
shl 2, r10
mov r10, r17
mov #_uxInterruptNesting, r19
add r17, r19
ld.w 0[r19], r18
addi 0x1, r18, r16
st.w r16, 0[r19]
pushsp r17, r19
;Call the interrupt handler.
stsr EIIC, r6
andi EIIC_MSK, r6, r6
; Do not enable interrupt for nesting. Stackover flow may occurs if the
; depth of nesting interrupt is exceeded.
mov #_uxPortMaxInterruptDepth, r19
ld.w 0[r19], r15
cmp r15, r16
bge 4 ; Jump over ei instruction
ei
jarl _vCommonISRHandler, lp
di
synce
popsp r17, r19
st.w r18, 0[r19] ; Restore the old nesting count.
; A context switch if no nesting interrupt.
cmp 0x0, r18
bne _vIrq_Handler_NotSwitchContext
; Check if context switch is requested.
mov #_xPortScheduleStatus, r19
add r17, r19
ld.w 0[r19], r18
cmp r0, r18
bne _vIrq_Handler_SwitchContext
_vIrq_Handler_NotSwitchContext:
; No context switch. Restore used registers
RESTORE_REGISTER
eiret
;This sequence is executed for primary core only to switch context
_vIrq_Handler_SwitchContext:
; Clear the context switch pending flag.
st.w r0, 0[r19]
add -1, r18
bnz _vIrq_Handler_StartFirstTask
; Restore used registers before saving the context to the task stack.
RESTORE_REGISTER
portSAVE_CONTEXT
; Get Core ID and pass to vTaskSwitchContext as parameter (CCRH compiler)
; The parameter is unused in single core, no problem with this redudant setting
jarl _xPortGET_CORE_ID, lp ; return value is contained in r10 (CCRH compiler)
mov r10, r6
; vPortYeild may be called to current core again at the end of vTaskSwitchContext.
; This may case nested interrupt, however, it is not necessary to set
; uxInterruptNesting (currently 0) for trap0 exception. The user interrupt
; (EI level interrupt) is not accepted inside of trap0 exception.
jarl _vTaskSwitchContext, lp ;
portRESTORE_CONTEXT
eiret
_vIrq_Handler_StartFirstTask:
RESTORE_REGISTER
jr _vPortStartFirstTask

View file

@ -1,193 +0,0 @@
/*
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef PORTMACRO_H
#define PORTMACRO_H
#ifdef __cplusplus
extern "C"
{
#endif
/*-----------------------------------------------------------
* Port specific definitions.
*
* The settings in this file configure FreeRTOS correctly for the
* given hardware and compiler.
*
* These settings should not be altered.
*-----------------------------------------------------------
*/
/* Type definitions - These are a bit legacy and not really used now, other
* than portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
/* Defines the maximum time when using a wait command in a task */
#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#else
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
#endif
/*-----------------------------------------------------------*/
/* Architecture specifics */
#define portSTSR( reg ) __stsr( ( reg ) )
#define portLDSR( reg, val ) __ldsr( ( reg ), ( val ) )
#define portSTSR_CCRH( reg, sel ) __stsr_rh( ( reg ), ( sel ) )
#define portSYNCM() __syncm()
/* Determine the descending of the stack from high address to address */
#define portSTACK_GROWTH ( -1 )
/* Determine the time (in milliseconds) corresponding to each tick */
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
/* It is a multiple of 4 (the two lower-order bits of the address = 0),
* otherwise it will cause MAE (Misaligned Exception) according to the manual */
#define portBYTE_ALIGNMENT ( 4 )
/* Interrupt control macros. */
#define portENABLE_INTERRUPTS() __EI() /* Macro to enable all maskable interrupts. */
#define portDISABLE_INTERRUPTS() __DI() /* Macro to disable all maskable interrupts. */
#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS()
#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS()
/* SMP build which means configNUM_CORES is relevant */
#define portSUPPORT_SMP 1
#define portMAX_CORE_COUNT 2
#ifndef configNUMBER_OF_CORES
#define configNUMBER_OF_CORES 1
#endif
/*-----------------------------------------------------------*/
/* Scheduler utilities */
/* Called at the end of an ISR that can cause a context switch */
extern void vPortSetSwitch( BaseType_t xSwitchRequired );
#define portEND_SWITCHING_ISR( x ) vPortSetSwitch( x )
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/* Use to transfer control from one task to perform other tasks of
* higher priority */
extern void vPortYield( void );
#define portYIELD() vPortYield()
#if ( configNUMBER_OF_CORES > 1 )
/* Return the core ID on which the code is running. */
extern BaseType_t xPortGET_CORE_ID();
#define portGET_CORE_ID() xPortGET_CORE_ID()
#define coreid xPortGET_CORE_ID()
/* Request the core ID x to yield. */
extern void vPortYieldCore( uint32_t coreID );
#define portYIELD_CORE( x ) vPortYieldCore( x )
#define portENTER_CRITICAL_FROM_ISR() vTaskEnterCriticalFromISR()
#define portEXIT_CRITICAL_FROM_ISR( x ) vTaskExitCriticalFromISR( x )
#endif /* if ( configNUMBER_OF_CORES > 1 ) */
#if ( configNUMBER_OF_CORES == 1 )
#define portGET_ISR_LOCK( xCoreID )
#define portRELEASE_ISR_LOCK( xCoreID )
#define portGET_TASK_LOCK( xCoreID )
#define portRELEASE_TASK_LOCK( xCoreID )
#else
extern void vPortRecursiveLockAcquire( BaseType_t xCoreID, BaseType_t xFromIsr );
extern void vPortRecursiveLockRelease( BaseType_t xCoreID, BaseType_t xFromIsr );
#define portGET_ISR_LOCK( xCoreID ) vPortRecursiveLockAcquire( ( xCoreID ), pdTRUE )
#define portRELEASE_ISR_LOCK( xCoreID ) vPortRecursiveLockRelease( ( xCoreID ), pdTRUE )
#define portGET_TASK_LOCK( xCoreID ) vPortRecursiveLockAcquire( ( xCoreID ), pdFALSE )
#define portRELEASE_TASK_LOCK( xCoreID ) vPortRecursiveLockRelease( ( xCoreID ), pdFALSE )
#endif /* if ( configNUMBER_OF_CORES == 1 ) */
/*-----------------------------------------------------------*/
/* Critical section management. */
/* The critical nesting functions defined within tasks.c */
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
/* Macro to mark the start of a critical code region */
#define portENTER_CRITICAL() vTaskEnterCritical()
/* Macro to mark the end of a critical code region */
#define portEXIT_CRITICAL() vTaskExitCritical()
/*-----------------------------------------------------------*/
/* Macros to set and clear the interrupt mask. */
portLONG xPortSetInterruptMask();
void vPortClearInterruptMask( portLONG );
#define portSET_INTERRUPT_MASK() xPortSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK( x ) vPortClearInterruptMask( ( x ) )
#define portSET_INTERRUPT_MASK_FROM_ISR() xPortSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortClearInterruptMask( ( x ) )
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/
#ifdef __cplusplus
}
#endif
#endif /* PORTMACRO_H */

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