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V10.4.3-LT
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# Normalize line endings and whitespace
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ddd1e30018e74ad293cda0635018d636a6657f57
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# Convert tabs to spaces (4)
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8c77117c32e49a5070cd85e8920c36723997e465
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# Apply uncrustify rules
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1
.gitattributes
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.gitattributes
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* text=auto
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||||
999
.github/.cSpellWords.txt
vendored
999
.github/.cSpellWords.txt
vendored
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@ -1,999 +0,0 @@
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|||
AASR
|
||||
ABETRG
|
||||
ABSR
|
||||
ABTSZ
|
||||
ACCAH
|
||||
ACCAL
|
||||
ACCAU
|
||||
ACCBH
|
||||
ACCBL
|
||||
ACCBU
|
||||
ACLK
|
||||
acpa
|
||||
ACPA
|
||||
acpc
|
||||
ACPC
|
||||
addi
|
||||
addiu
|
||||
ADTRG
|
||||
aeevt
|
||||
AEEVT
|
||||
AERR
|
||||
AIRCR
|
||||
ALMIEN
|
||||
ALMV
|
||||
ANDC
|
||||
andi
|
||||
ANDCCR
|
||||
APIC
|
||||
APROCFREQ
|
||||
APSR
|
||||
ARMCM
|
||||
Armv
|
||||
ARMVFP
|
||||
ASTRINGZ
|
||||
aswtrg
|
||||
ASWTRG
|
||||
Ateml
|
||||
ATMEGA
|
||||
Atmel
|
||||
ATMEL
|
||||
atomatic
|
||||
ATPASTE
|
||||
AVRDX
|
||||
BANDL
|
||||
bcpb
|
||||
BCPB
|
||||
bcpc
|
||||
BCPC
|
||||
beevt
|
||||
BEEVT
|
||||
beqz
|
||||
BERR
|
||||
bfextu
|
||||
Biagioni
|
||||
bics
|
||||
BISR
|
||||
BODIEN
|
||||
BODSTS
|
||||
brealid
|
||||
BRGR
|
||||
brhi
|
||||
brne
|
||||
bswtrg
|
||||
BSWTRG
|
||||
Bytesto
|
||||
CANEN
|
||||
CANRX
|
||||
CANTX
|
||||
capitalisation
|
||||
cbmc
|
||||
CBMC
|
||||
cbor
|
||||
CBOR
|
||||
CCIE
|
||||
CCMP
|
||||
CCNT
|
||||
CCNTR
|
||||
CCPN
|
||||
CCPR
|
||||
CCRH
|
||||
CDTY
|
||||
CDTYR
|
||||
CFBS
|
||||
CFRC
|
||||
CHDIV
|
||||
CHDR
|
||||
CHRL
|
||||
CHSR
|
||||
CICR
|
||||
CISR
|
||||
CKDIV
|
||||
CKDIVMD
|
||||
CKEY
|
||||
CKGR
|
||||
CKLO
|
||||
CKPS
|
||||
CLDIV
|
||||
CLEARINTENA
|
||||
CLKA
|
||||
CLKB
|
||||
CLKDIS
|
||||
CLKEN
|
||||
clki
|
||||
CLKI
|
||||
CLKP
|
||||
CLKS
|
||||
CLKSOURCE
|
||||
CLKSTA
|
||||
CLRB
|
||||
CLRF
|
||||
clrm
|
||||
CLRPSW
|
||||
CMCNT
|
||||
CMCON
|
||||
CMCOR
|
||||
CMCR
|
||||
CMIE
|
||||
cmock
|
||||
Cmock
|
||||
CMock
|
||||
CMOCK
|
||||
cmpx
|
||||
CMSIS
|
||||
CMSTR
|
||||
CNTE
|
||||
coalescences
|
||||
CODAN
|
||||
codecov
|
||||
CODR
|
||||
comms
|
||||
COMPA
|
||||
CONFG
|
||||
coreid
|
||||
coremqtt
|
||||
CORTUS
|
||||
coverity
|
||||
Coverity
|
||||
covfs
|
||||
COVFS
|
||||
CPACR
|
||||
cpas
|
||||
CPAS
|
||||
cpbs
|
||||
CPBS
|
||||
cpcdis
|
||||
CPCDIS
|
||||
CPCS
|
||||
cpcstop
|
||||
CPCSTOP
|
||||
CPCTRG
|
||||
CPIV
|
||||
CPRD
|
||||
CPRDR
|
||||
CPRE
|
||||
cpsid
|
||||
cpsie
|
||||
CPSR
|
||||
CPUCLK
|
||||
CPUID
|
||||
CRCB
|
||||
crflash
|
||||
CRGFLG
|
||||
CRGINT
|
||||
crhook
|
||||
croutine
|
||||
CRTV
|
||||
CSAAT
|
||||
CSDK
|
||||
csrr
|
||||
csrs
|
||||
csrw
|
||||
CTCR
|
||||
ctest
|
||||
CTPC
|
||||
CTPSW
|
||||
CTRLA
|
||||
CTSIC
|
||||
CUPD
|
||||
CUPDR
|
||||
CWGR
|
||||
cxsf
|
||||
CYGNAL
|
||||
DADR
|
||||
daif
|
||||
DAIFCLR
|
||||
DAIFSET
|
||||
DATAR
|
||||
DATAW
|
||||
DATNB
|
||||
DATRDY
|
||||
DBGU
|
||||
DCDIC
|
||||
DCMOCK
|
||||
DCMR
|
||||
Dconfig
|
||||
DCOUNT
|
||||
decf
|
||||
decfsz
|
||||
decihours
|
||||
Decihours
|
||||
DECIHOURS
|
||||
DECNT
|
||||
DFPU
|
||||
DFREERTOS
|
||||
dicr
|
||||
DICR
|
||||
DIVB
|
||||
DLYBCS
|
||||
DLYBCT
|
||||
DLYBS
|
||||
DLYI
|
||||
DNDEBUG
|
||||
DOCOUNT
|
||||
DOENDH
|
||||
DOENDL
|
||||
DOHIGH
|
||||
DOLOW
|
||||
DOSTARTH
|
||||
DOSTARTL
|
||||
DPFPU
|
||||
DPLB
|
||||
DPOPM
|
||||
DPSW
|
||||
DPUSHM
|
||||
DRDY
|
||||
DRFCS
|
||||
DRPT
|
||||
DRXD
|
||||
DSLPE
|
||||
DSNACK
|
||||
DSPIC
|
||||
DSRIC
|
||||
DSWPAG
|
||||
DTGLE
|
||||
DTREN
|
||||
DTXD
|
||||
DUNITY
|
||||
DVAR
|
||||
Dxxx
|
||||
EABI
|
||||
ecall
|
||||
ECIT
|
||||
ECRS
|
||||
ECRSDV
|
||||
eevt
|
||||
EEVT
|
||||
eevtedg
|
||||
EEVTEDG
|
||||
EFRHD
|
||||
EIIC
|
||||
EINT
|
||||
EIPC
|
||||
EIPSW
|
||||
Elektronika
|
||||
EMACB
|
||||
EMDC
|
||||
EMDIO
|
||||
emption
|
||||
endm
|
||||
ENDRX
|
||||
ENDTX
|
||||
enetrg
|
||||
ENETRG
|
||||
ENMFILE
|
||||
EOICR
|
||||
epage
|
||||
EPEDS
|
||||
EPINT
|
||||
EPTYPE
|
||||
EQIC
|
||||
EQIF
|
||||
EQMK
|
||||
EREFCK
|
||||
eret
|
||||
ERRA
|
||||
ERSTL
|
||||
ERXCK
|
||||
ERXDV
|
||||
ERXER
|
||||
Espeche
|
||||
Espressif
|
||||
ESTATUS
|
||||
ETRCS
|
||||
ETRGEDG
|
||||
etrgs
|
||||
ETRGS
|
||||
ETXCK
|
||||
ETXEN
|
||||
ETXER
|
||||
evba
|
||||
EVBA
|
||||
EWARM
|
||||
EWAVR
|
||||
EWRL
|
||||
EWRX
|
||||
EXID
|
||||
expandnl
|
||||
EXTRSM
|
||||
FADD
|
||||
FCMD
|
||||
fcolor
|
||||
FCSE
|
||||
fcsr
|
||||
fdiagnostics
|
||||
fdiv
|
||||
FDIV
|
||||
FEDPICC
|
||||
FERR
|
||||
FFDR
|
||||
FFER
|
||||
FFSR
|
||||
FIDI
|
||||
FLASH
|
||||
Flsh
|
||||
FLSH
|
||||
FMCN
|
||||
FMRXNE
|
||||
FMXR
|
||||
fninit
|
||||
fnsave
|
||||
FNTR
|
||||
FOSC
|
||||
FPCCR
|
||||
FPCSR
|
||||
FPEPC
|
||||
FPSW
|
||||
FPUL
|
||||
FRDY
|
||||
Frieder
|
||||
FSDEN
|
||||
FSEDGE
|
||||
FSLEN
|
||||
FSOS
|
||||
FSR
|
||||
fwait
|
||||
GCACC
|
||||
GCTRL
|
||||
getpacketid
|
||||
getvect
|
||||
GIEH
|
||||
GIEL
|
||||
GIRQ
|
||||
GLBSTATE
|
||||
GMSK
|
||||
GNURX
|
||||
GOVRE
|
||||
gpio
|
||||
GPIO
|
||||
GPNVM
|
||||
GPTA
|
||||
HCLK
|
||||
Hitach
|
||||
HRESP
|
||||
HTCFG
|
||||
HWHSH
|
||||
HWORD
|
||||
HWRD
|
||||
IADR
|
||||
IADRSZ
|
||||
ICCAVR
|
||||
ICCBPR
|
||||
ICCEOIR
|
||||
ICCIAR
|
||||
ICCICAR
|
||||
ICCPMR
|
||||
ICCR
|
||||
ICCRPR
|
||||
ICCRX
|
||||
ICERST
|
||||
ICIPI
|
||||
ICSR
|
||||
IDCR
|
||||
IECR
|
||||
IFDR
|
||||
IFER
|
||||
IFLASH
|
||||
IFSR
|
||||
imajeff
|
||||
INACK
|
||||
INDF
|
||||
inpw
|
||||
INTE
|
||||
INTFRCH
|
||||
INTFRCL
|
||||
INTIT
|
||||
INTTM
|
||||
IODEFINE
|
||||
IORLW
|
||||
IPEN
|
||||
IPIR
|
||||
IPLB
|
||||
ipsr
|
||||
IPSR
|
||||
iret
|
||||
IRET
|
||||
IRXFCS
|
||||
ISRAM
|
||||
ISRR
|
||||
ISRS
|
||||
ISR's
|
||||
ISRTICK
|
||||
isystem
|
||||
ITIF
|
||||
ITMC
|
||||
ITMK
|
||||
ittt
|
||||
JFRAME
|
||||
JTAG
|
||||
JTVIC
|
||||
Kamil
|
||||
kbhit
|
||||
Kbyte
|
||||
Krutmann
|
||||
LAPIC
|
||||
LCDR
|
||||
LCOL
|
||||
lcov
|
||||
ldaa
|
||||
LDATA
|
||||
LDBDIS
|
||||
LDBSTOP
|
||||
ldmdb
|
||||
LDMFD
|
||||
ldmia
|
||||
LDRA
|
||||
ldras
|
||||
LDRAS
|
||||
ldrb
|
||||
ldrbs
|
||||
LDRBS
|
||||
LDRNE
|
||||
ldsr
|
||||
lidt
|
||||
LINKR
|
||||
LJMP
|
||||
LLIO
|
||||
lovrs
|
||||
LOVRS
|
||||
lpcount
|
||||
lpend
|
||||
lpstart
|
||||
LPTHREAD
|
||||
lsls
|
||||
LSPEN
|
||||
LSPENS
|
||||
ltorg
|
||||
LWRD
|
||||
MABT
|
||||
MACL
|
||||
MAINF
|
||||
MAINRDY
|
||||
MAIR
|
||||
Mang
|
||||
Mbits
|
||||
mbranch
|
||||
mcause
|
||||
MCFR
|
||||
MCKA
|
||||
MCKB
|
||||
MCKR
|
||||
MCKRDY
|
||||
MCLK
|
||||
MCU
|
||||
MDDR
|
||||
MDER
|
||||
MDIO
|
||||
MDLC
|
||||
MDSR
|
||||
mepc
|
||||
mevents
|
||||
MFCR
|
||||
mfear
|
||||
mfedr
|
||||
mfesr
|
||||
mffsr
|
||||
mfgpr
|
||||
mfhi
|
||||
MFID
|
||||
mflo
|
||||
mfloat
|
||||
mfmsr
|
||||
mfpu
|
||||
mhartid
|
||||
MIDE
|
||||
Mikro
|
||||
MIKROC
|
||||
misra
|
||||
Misra
|
||||
MISRA
|
||||
MMCR
|
||||
MMSYSERR
|
||||
MOSC
|
||||
MOSCS
|
||||
MOSI
|
||||
movem
|
||||
moveq
|
||||
MOVF
|
||||
MOVFF
|
||||
movhi
|
||||
movia
|
||||
movlb
|
||||
movlw
|
||||
movne
|
||||
movs
|
||||
movw
|
||||
MOVWF
|
||||
movx
|
||||
MPLAB
|
||||
MPUCTRL
|
||||
MQTT
|
||||
MRDY
|
||||
MREAD
|
||||
mret
|
||||
mrseq
|
||||
mrsne
|
||||
MRTR
|
||||
MSBF
|
||||
MSDIS
|
||||
MSEN
|
||||
mspgcc
|
||||
msreq
|
||||
mstatus
|
||||
MSTATUS
|
||||
MSTP
|
||||
MSTPA
|
||||
MSTPCR
|
||||
MSTPCRA
|
||||
MSTPCRC
|
||||
MSTR
|
||||
MTCR
|
||||
mthi
|
||||
MTIOA
|
||||
MTIOB
|
||||
mtlo
|
||||
mtsr
|
||||
MVFACGU
|
||||
MVFACHI
|
||||
MVFACLO
|
||||
MVFACMI
|
||||
MVFC
|
||||
MVTACGU
|
||||
MVTACHI
|
||||
MVTACLO
|
||||
MVTC
|
||||
MVTIPL
|
||||
mypy
|
||||
NCFGR
|
||||
NCPHA
|
||||
NEBP
|
||||
NFIQ
|
||||
Nios
|
||||
NIOSII
|
||||
NIRQ
|
||||
NOGIC
|
||||
noheap
|
||||
nondet
|
||||
Nondet
|
||||
NONDET
|
||||
nostdint
|
||||
NPCS
|
||||
NRSTL
|
||||
NSACR
|
||||
NSFPU
|
||||
NSSR
|
||||
NTRST
|
||||
NVIC
|
||||
ODAT
|
||||
ODSR
|
||||
OINC
|
||||
OIWBNOWA
|
||||
OIWBWA
|
||||
OIWTNOWA
|
||||
OPMOD
|
||||
optimisations
|
||||
OPTIMISED
|
||||
optimiser
|
||||
ORCCR
|
||||
orrs
|
||||
OSCBYPASS
|
||||
OSCEN
|
||||
OSCOFF
|
||||
OSCOUNT
|
||||
OSMC
|
||||
OSTM
|
||||
outpw
|
||||
OVLY
|
||||
OVRE
|
||||
OVRES
|
||||
OVRUN
|
||||
OWATCOM
|
||||
OWDR
|
||||
OWER
|
||||
OWSR
|
||||
pacbti
|
||||
PACBTI
|
||||
PAGEN
|
||||
PCDR
|
||||
PCER
|
||||
PCKR
|
||||
PCLATH
|
||||
PCLATU
|
||||
PCLK
|
||||
PCLKSEL
|
||||
PCSR
|
||||
PCXI
|
||||
PDSR
|
||||
PEID
|
||||
PEIE
|
||||
PENDSV
|
||||
PENDSVCLEAR
|
||||
PENDSVSET
|
||||
PENSVCLEAR
|
||||
PERIODH
|
||||
PERIODL
|
||||
periph
|
||||
PERIPH
|
||||
PFRE
|
||||
phelter
|
||||
PHYA
|
||||
PICNT
|
||||
pico
|
||||
picolibc
|
||||
Picolibc
|
||||
PICOLIBC
|
||||
PIEN
|
||||
PIIR
|
||||
PIMR
|
||||
PIOA
|
||||
PIOB
|
||||
PISR
|
||||
PITC
|
||||
PITEN
|
||||
PITIEN
|
||||
PIVR
|
||||
PLLB
|
||||
PLLR
|
||||
popa
|
||||
popm
|
||||
POPNE
|
||||
POPW
|
||||
popx
|
||||
portcomn
|
||||
PORTEN
|
||||
portex
|
||||
portisr
|
||||
POWERUP
|
||||
ppuc
|
||||
PPUDR
|
||||
PPUER
|
||||
PPUSR
|
||||
ppux
|
||||
PRCR
|
||||
PREA
|
||||
PREB
|
||||
PRIA
|
||||
Prioritised
|
||||
PRIS
|
||||
PRIVDEFENA
|
||||
PROCDLY
|
||||
PRODH
|
||||
PRODL
|
||||
PROGE
|
||||
Prokic
|
||||
prtmacro
|
||||
psha
|
||||
psplim
|
||||
PSPLIM
|
||||
PSTDBY
|
||||
PSVPAG
|
||||
PTCR
|
||||
PTSR
|
||||
Pulpino
|
||||
PUON
|
||||
pusha
|
||||
pushf
|
||||
pushm
|
||||
PUSHNE
|
||||
PUSHW
|
||||
pushx
|
||||
PWMC
|
||||
pylint
|
||||
pytest
|
||||
pyyaml
|
||||
RAMPZ
|
||||
randomisation
|
||||
RASR
|
||||
Rationalised
|
||||
Raynald
|
||||
RBAR
|
||||
RBOF
|
||||
RBQP
|
||||
RBSY
|
||||
RCALL
|
||||
RCAP
|
||||
RCIF
|
||||
RCMR
|
||||
RCOMP
|
||||
RCOUNT
|
||||
rddsp
|
||||
RDRF
|
||||
reent
|
||||
REENT
|
||||
REGA
|
||||
RELD
|
||||
Renesas
|
||||
reta
|
||||
reti
|
||||
RETP
|
||||
RETTO
|
||||
RFEIA
|
||||
RFMR
|
||||
RIIC
|
||||
RIPL
|
||||
riscv
|
||||
RLAR
|
||||
RLCE
|
||||
RLES
|
||||
RLEX
|
||||
RMII
|
||||
RMWUPE
|
||||
RNCR
|
||||
RNPR
|
||||
ROUSSET
|
||||
ROVR
|
||||
RSHR
|
||||
rslcx
|
||||
RSLCX
|
||||
RSMINPR
|
||||
RSTC
|
||||
RSTEP
|
||||
RSTIT
|
||||
RSTNACK
|
||||
RSTRX
|
||||
RSTSTA
|
||||
RSTTX
|
||||
Rsvd
|
||||
RTAR
|
||||
RTCEN
|
||||
RTCSC
|
||||
RTICTL
|
||||
RTIE
|
||||
RTIF
|
||||
RTIFRC
|
||||
RTMR
|
||||
RTOR
|
||||
RTSEN
|
||||
RTSR
|
||||
RTTC
|
||||
RTVR
|
||||
RVDS
|
||||
RXBRK
|
||||
RXBUFF
|
||||
RXBYTECNT
|
||||
RXDIS
|
||||
Rxed
|
||||
RXEN
|
||||
RXENA
|
||||
RXOVERWRITE
|
||||
RXRDY
|
||||
RXRSM
|
||||
RXSETUP
|
||||
RXSUSP
|
||||
RXSYN
|
||||
RXTDIS
|
||||
RXTEN
|
||||
RXUBR
|
||||
SBYCR
|
||||
SCALL
|
||||
SCBR
|
||||
SCDR
|
||||
SCER
|
||||
SCSR
|
||||
SDCC
|
||||
SECU
|
||||
SENDA
|
||||
SETB
|
||||
SETEN
|
||||
SETINTENA
|
||||
SETPSW
|
||||
SETR
|
||||
setvect
|
||||
SFRC
|
||||
SHLL
|
||||
SHLR
|
||||
SHPR
|
||||
SHTIM
|
||||
SIFIVE
|
||||
sinclude
|
||||
slli
|
||||
SODR
|
||||
SOFTIRQ
|
||||
SPCK
|
||||
SPIEN
|
||||
SPSR
|
||||
SRCMP
|
||||
SREG
|
||||
SRSDB
|
||||
SSBY
|
||||
SSIR
|
||||
SSKEY
|
||||
staa
|
||||
Stellaris
|
||||
STILM
|
||||
STKPTR
|
||||
stmdb
|
||||
stmia
|
||||
stsr
|
||||
STTBRK
|
||||
STTDLY
|
||||
STTOUT
|
||||
STTTO
|
||||
SVACC
|
||||
svcne
|
||||
SVDIS
|
||||
svlcx
|
||||
SVMST
|
||||
SWAPW
|
||||
SWHSH
|
||||
SWINR
|
||||
SWINT
|
||||
SWINTR
|
||||
SWRST
|
||||
SWTRG
|
||||
synchronise
|
||||
SYNCM
|
||||
syncm
|
||||
SYSC
|
||||
sysclk
|
||||
Sysclk
|
||||
SysClk
|
||||
SYSClk
|
||||
SYSCLK
|
||||
sysclock
|
||||
Sysclock
|
||||
SysClock
|
||||
SYSCLOCK
|
||||
TACCR
|
||||
TACCTL
|
||||
TACLR
|
||||
TACTL
|
||||
TBCTRL
|
||||
TBLPTRH
|
||||
TBLPTRL
|
||||
TBLPTRU
|
||||
TBLPTRUH
|
||||
TBLPTRUL
|
||||
TBQP
|
||||
TBSY
|
||||
tcclks
|
||||
TCCR
|
||||
TCKPS
|
||||
TCLK
|
||||
TCMR
|
||||
TCOMP
|
||||
TDES
|
||||
TDESMOD
|
||||
TDMI
|
||||
TDRE
|
||||
TEOF
|
||||
TFLG
|
||||
TFMR
|
||||
TGRA
|
||||
THALT
|
||||
TIAO
|
||||
TICKISR
|
||||
TIMFRZ
|
||||
TIMSK
|
||||
TIOA
|
||||
TIOB
|
||||
tmcsr
|
||||
TMCSR
|
||||
TMIF
|
||||
TMKAEN
|
||||
TMKAIF
|
||||
TMKAMK
|
||||
TMMK
|
||||
TMPR
|
||||
TMRLR
|
||||
TNCR
|
||||
TNPR
|
||||
TOSU
|
||||
TOVF
|
||||
TPCS
|
||||
TPFR
|
||||
TRAPA
|
||||
TRGEN
|
||||
TRGSEL
|
||||
TSHR
|
||||
tstfsz
|
||||
TSTP
|
||||
TSTR
|
||||
TTGR
|
||||
TUND
|
||||
TUNDR
|
||||
TWCK
|
||||
TXBUFE
|
||||
TXCOMP
|
||||
TXDIS
|
||||
TXEMPTY
|
||||
TXEN
|
||||
TXENA
|
||||
TXERR
|
||||
TXIE
|
||||
TXIF
|
||||
TXPKTRDY
|
||||
TXRDY
|
||||
TXSYN
|
||||
TXTEN
|
||||
TXUBR
|
||||
TXVC
|
||||
TXVDIS
|
||||
UBTI
|
||||
UDCP
|
||||
UNACKED
|
||||
uncrustify
|
||||
UNDADD
|
||||
unpadded
|
||||
Unpadded
|
||||
UNPADDED
|
||||
unprotect
|
||||
Unprotect
|
||||
Unprotected
|
||||
UNRE
|
||||
UNSUB
|
||||
UNSUBACK
|
||||
unsubscriptions
|
||||
unsuspended
|
||||
UPAC
|
||||
URAD
|
||||
URAT
|
||||
URSTEN
|
||||
URSTIEN
|
||||
URSTS
|
||||
Usart
|
||||
USART
|
||||
USPRG
|
||||
USRIO
|
||||
utest
|
||||
utilises
|
||||
utilising
|
||||
vcsr
|
||||
VDDCORE
|
||||
vect
|
||||
Vect
|
||||
VECT
|
||||
VECTACTIVE
|
||||
VECTKEY
|
||||
visualisation
|
||||
vldmdbeq
|
||||
vldmia
|
||||
vldmiaeq
|
||||
vlenb
|
||||
VMSRNE
|
||||
vpop
|
||||
VPOPNE
|
||||
vpush
|
||||
VPUSHNE
|
||||
VRPM
|
||||
Vrtc
|
||||
vsetvl
|
||||
vstmdbeq
|
||||
vstmiaeq
|
||||
VTOR
|
||||
W
|
||||
WAVESEL
|
||||
wavsel
|
||||
Wcolor
|
||||
Wconversion
|
||||
WDCR
|
||||
WDDBGHLT
|
||||
WDDIS
|
||||
WDERR
|
||||
WDFIEN
|
||||
WDIDLEHLT
|
||||
WDMR
|
||||
WDRPROC
|
||||
WDRSTEN
|
||||
WDRSTT
|
||||
WDSR
|
||||
WDTC
|
||||
wdtcon
|
||||
WDUNF
|
||||
Werror
|
||||
WESTAT
|
||||
Weverything
|
||||
Wextra
|
||||
winmm
|
||||
WIZC
|
||||
Wpedantic
|
||||
wrdsp
|
||||
WREG
|
||||
Wunused
|
||||
XEXC
|
||||
XPAR
|
||||
xparameters
|
||||
XPSR
|
||||
XRAM
|
||||
xtal
|
||||
XTENSA
|
||||
4
.github/CODEOWNERS
vendored
4
.github/CODEOWNERS
vendored
|
|
@ -4,7 +4,7 @@
|
|||
# the repo. Unless a later match takes precedence,
|
||||
# @global-owner1 and @global-owner2 will be requested for
|
||||
# review when someone opens a pull request.
|
||||
* @FreeRTOS/pr-bar-raisers
|
||||
* @FreeRTOS/pr-bar-raiser
|
||||
|
||||
# Order is important; the last matching pattern takes the most
|
||||
# precedence. When someone opens a pull request that only
|
||||
|
|
@ -35,3 +35,5 @@
|
|||
# directory in the root of your repository and any of its
|
||||
# subdirectories.
|
||||
# /docs/ @doctocat
|
||||
|
||||
|
||||
|
|
|
|||
8
.github/CONTRIBUTING.md
vendored
8
.github/CONTRIBUTING.md
vendored
|
|
@ -23,7 +23,7 @@ Have a bug to report or feature to request? Follow these steps:
|
|||
|
||||
When creating a new topic on the forums or filing an issue, please include as many relevant details as possible. Examples include:
|
||||
|
||||
* A clear description of the situation - what you observe, what you expect, and your view on how the two differ.
|
||||
* A clear description of the situation — what you observe, what you expect, and your view on how the two differ.
|
||||
* A reproducible test case or sequence of steps.
|
||||
* The version of our code being used.
|
||||
* Any modifications you've made relevant to the bug.
|
||||
|
|
@ -33,7 +33,7 @@ When creating a new topic on the forums or filing an issue, please include as ma
|
|||
## Contributing via pull request
|
||||
Contributions via pull requests are much appreciated. Before sending us a pull request, please ensure that:
|
||||
|
||||
1. You are working against the latest source on the *main* branch.
|
||||
1. You are working against the latest source on the *master* branch.
|
||||
2. You check existing open, and recently merged, pull requests to make sure someone else hasn't addressed the problem already.
|
||||
3. You open an issue to discuss any significant work - we would hate for your time to be wasted.
|
||||
|
||||
|
|
@ -55,7 +55,7 @@ GitHub provides additional document on [forking a repository](https://help.githu
|
|||
|
||||
|
||||
## Getting your pull request merged
|
||||
All pull requests must be approved by our review team before it can be merged in. We appreciate your patience while pull requests are reviewed. The time it takes to review will depend on complexity and consideration of wider implications. For more information on the pull request process, please see the documentation [here](pull_request_process.md).
|
||||
All pull requests must be approved by our review team before it can be merged in. We appreciate your patience while pull requests are reviewed. The time it takes to review will depend on complexity and consideration of wider implications.
|
||||
|
||||
|
||||
## Finding contributions to work on
|
||||
|
|
@ -63,7 +63,7 @@ Looking at the existing issues is a great way to find something to contribute on
|
|||
|
||||
|
||||
## Licensing
|
||||
The FreeRTOS kernel is released under the MIT open source license, the text of which can be found [here](https://github.com/FreeRTOS/FreeRTOS/blob/main/FreeRTOS/License/license.txt)
|
||||
The FreeRTOS kernel is released under the MIT open source license, the text of which can be found [here](https://github.com/FreeRTOS/FreeRTOS/blob/master/FreeRTOS/License/license.txt)
|
||||
|
||||
Additional license files can be found in the folders containing any supplementary libraries licensed by their respective copyright owners where applicable.
|
||||
|
||||
|
|
|
|||
1
.github/ISSUE_TEMPLATE/config.yml
vendored
1
.github/ISSUE_TEMPLATE/config.yml
vendored
|
|
@ -3,3 +3,4 @@ contact_links:
|
|||
- name: FreeRTOS Community Support Forum
|
||||
url: https://forums.freertos.org/
|
||||
about: Please ask and answer questions about FreeRTOS here.
|
||||
|
||||
|
|
|
|||
30
.github/ISSUE_TEMPLATE/feature_request.md
vendored
30
.github/ISSUE_TEMPLATE/feature_request.md
vendored
|
|
@ -1,30 +0,0 @@
|
|||
---
|
||||
name: Feature request
|
||||
about: Suggest a new feature for this project
|
||||
title: "[Feature Request] <replace with your title>"
|
||||
labels: enhancement
|
||||
assignees: ''
|
||||
|
||||
---
|
||||
|
||||
**Is your feature request related to a problem? Please describe.**
|
||||
A clear and concise description of what the problem is. Ex. I'm always frustrated when [...]
|
||||
|
||||
**Describe the solution you'd like**
|
||||
A clear and concise description of what you want to happen.
|
||||
|
||||
**Describe alternatives you've considered**
|
||||
A clear and concise description of any alternative solutions or features you've considered.
|
||||
|
||||
**How many devices will this feature impact?**
|
||||
Expected volume for your product.
|
||||
|
||||
**What are your project timelines?**
|
||||
Timeline for milestones such as design completion, testing and validation, and production.
|
||||
|
||||
**Additional context**
|
||||
Add any other context or screenshots about the feature request here.
|
||||
|
||||
|
||||
If you have the same (or similar) feature request, please upvote this issue with thumbs up 👍
|
||||
and use the comments section to provide answers to the questions above.
|
||||
59
.github/actions/url_verifier.sh
vendored
Executable file
59
.github/actions/url_verifier.sh
vendored
Executable file
|
|
@ -0,0 +1,59 @@
|
|||
#!/bin/bash -
|
||||
|
||||
PROJECT=$1
|
||||
echo "Verifying url links of: ${PROJECT}"
|
||||
if [ ! -d "$PROJECT" ]
|
||||
then
|
||||
echo "Directory passed does not exist"
|
||||
exit 2
|
||||
fi
|
||||
|
||||
SCRIPT_RET=0
|
||||
|
||||
set -o nounset # Treat unset variables as an error
|
||||
|
||||
declare -A dict
|
||||
|
||||
function test {
|
||||
while IFS= read -r LINE; do
|
||||
FILE=$(echo $LINE | cut -f 1 -d ':')
|
||||
URL=$(echo $LINE | grep -IoE '\b(https?|ftp|file)://[-A-Za-z0-9+&@#/%?=~_|!:,.;]*[-A-Za-z0-9+&@#/%=~_|]')
|
||||
|
||||
# remove trailing / if it exists curl diferenciate between links with
|
||||
# and without / at the end
|
||||
# URL=`echo "$URL" | sed 's,/$,,'`
|
||||
dict+=(["$URL"]="$FILE ")
|
||||
done < <(grep -e 'https\?://' ${PROJECT} -RIa --exclude='*.exe' --exclude-dir=.git | tr '*' ' ')
|
||||
|
||||
for UNIQ_URL in ${!dict[@]} # loop urls
|
||||
do
|
||||
CURL_RES=$(curl -I ${UNIQ_URL} 2>/dev/null| head -n 1 | cut -f 2 -d ' ')
|
||||
RES=$?
|
||||
|
||||
if [ "${CURL_RES}" == '' -o "${CURL_RES}" != '200' ]
|
||||
then
|
||||
echo "URL is: ${UNIQ_URL}"
|
||||
echo "File names: ${dict[$UNIQ_URL]}"
|
||||
if [ "${CURL_RES}" == '' ] # curl returned an error
|
||||
then
|
||||
CURL_RES=$RES
|
||||
SCRIPT_RET=1
|
||||
elif [ "${CURL_RES}" == '403' ]
|
||||
then
|
||||
SCRIPT_RET=1
|
||||
fi
|
||||
echo Result is: "${CURL_RES}"
|
||||
echo "================================="
|
||||
fi
|
||||
done
|
||||
|
||||
if [ "${SCRIPT_RET}" -eq 0 ]
|
||||
then
|
||||
exit 0
|
||||
else
|
||||
exit 1
|
||||
fi
|
||||
}
|
||||
|
||||
test
|
||||
|
||||
3
.github/allowed_urls.txt
vendored
3
.github/allowed_urls.txt
vendored
|
|
@ -1,3 +0,0 @@
|
|||
https://www.renesas.com/us/en/document/mah/rh850f1k-group-users-manual-hardware?r=1170166
|
||||
https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rh850-automotive-mcus
|
||||
https://www.renesas.com/us/en/software-tool/c-compiler-package-rh850-family#downloads
|
||||
3082
.github/lexicon.txt
vendored
Normal file
3082
.github/lexicon.txt
vendored
Normal file
File diff suppressed because it is too large
Load diff
BIN
.github/media/pr_process.png
vendored
BIN
.github/media/pr_process.png
vendored
Binary file not shown.
|
Before Width: | Height: | Size: 179 KiB |
115
.github/pull_request_process.md
vendored
115
.github/pull_request_process.md
vendored
|
|
@ -1,115 +0,0 @@
|
|||
# Pull Request Process
|
||||
|
||||
This document explains the stages that a Pull Request (PR) goes through when a pull request is submitted to a git repository in the FreeRTOS organization in Github. Before you start a PR, please read and familiarize yourself with [CONTRIBUTING.md](CONTRIBUTING.md)
|
||||
|
||||
## ****Terminologies****
|
||||
|
||||
**FreeRTOS Partner Contributors**: These are selected developers and experts from community.
|
||||
|
||||
**FreeRTOS Team**: The FreeRTOS team consists of “AWS employees”.
|
||||
|
||||
**CODEOWNERS**: For all the FreeRTOS repositories, “FreeRTOS Team” and/or “FreeRTOS Partner contributors” will be CODEOWNER.
|
||||
|
||||
**Contributor**: The Contributor is the person who submitted the pull request.
|
||||
|
||||
**Assignee**: The Assignee is an AWS Employee who is responsible for identifying reviewers and managing the PR. They track the progress of pull requests and ensure that they are reviewed and merged in a timely manner.
|
||||
|
||||
**Reviewer**: Reviewers are responsible for reviewing pull requests and providing feedback to the contributor. Two approving reviews, one of which must be from the CODEOWNER of the reposiroty, are required for a PR to be merged.
|
||||
|
||||
|
||||
## ****Pull Request Life-Cycle****
|
||||
|
||||
Once a pull request (PR) is submitted, it goes through the following stages:
|
||||
|
||||
1. Open
|
||||
1. The PR is created.
|
||||
2. All the GitHub Actions pass and the PR is ready to be reviewed.
|
||||
2. Triage
|
||||
1. The PR is assigned to an assignee.
|
||||
2. The assignee assigns a reviewer from the FreeRTOS Team to the PR.
|
||||
3. Review
|
||||
1. The reviewer provides feedback and discusses open questions with the contributor, if needed.
|
||||
2. If the contributor and the reviewer conclude, after discussion, that the PR will not be merged, then the PR is closed.
|
||||
3. The PR contributor addresses the feedback and makes changes to the PR, if needed.
|
||||
4. The reviewer approves the PR and assigns a second reviewer.
|
||||
4. Second Review
|
||||
1. The second reviewer reviews the PR and provides feedback, if needed.
|
||||
2. The PR contributor addresses the feedback and makes changes to the PR, if needed.
|
||||
3. The second reviewer approves the PR.
|
||||
5. Testing
|
||||
1. One of the reviewers tests the PR to ensure that it works correctly.
|
||||
6. Ready to Merge
|
||||
A PR becomes Ready to Merge when all the branch protection rules are satisfied. We have branch protection rules which require the following:
|
||||
1. At least 2 reviews.
|
||||
2. One review from the CODEOWNER of the given repository.
|
||||
3. All PR checks must pass.
|
||||
7. Merge
|
||||
1. The PR is merged.
|
||||
|
||||
</br>
|
||||
|
||||
The status of a PR is indicated through GitHub labels added by Reviewers/Assignees. The following are the most common status indicators: Triaged, Reviewer Assigned, Concept ACK/NACK, First Code Review In Progress, First Code Review Complete, Second Code Review In Progress, Second Code Review Complete, Testing In Progress and Testing Complete.
|
||||
|
||||
Please note that we may decide to skip some stages depending on the type of PR. For example, a PR with a simple doc update will likely not go through all the above stages, however every PR is required to get approvals from 2 reviewers.
|
||||
|
||||
The pictorial representation of our PR process is shown below.
|
||||
|
||||
|
||||
|
||||
|
||||
</br>
|
||||
|
||||
## **Turnaround Times**
|
||||
|
||||
The length of time required to review a PR is unpredictable and varies from PR to PR since it depends on the complexity of the changes, availability of reviewers, and overall workload of the team. We generally attempt to resolve each PR in accordance with the timeframes below, excluding weekends and public holidays:
|
||||
|
||||
* Triage: < 24 hours
|
||||
* Concept ACK/NACK: 1-2 weeks
|
||||
* Code Review: 1-2 weeks
|
||||
* Testing: 1-2 weeks
|
||||
|
||||
|
||||
## **Addressing the changes requested by reviewers**
|
||||
|
||||
The author should address any review comments in 4 weeks or less. If the author is unable to address the comments in that time, we will do one of the following:
|
||||
|
||||
* Make the required changes ourselves and merge the pull request.
|
||||
* Close the pull request.
|
||||
|
||||
</br>
|
||||
|
||||
### **Best Practices for Faster Reviews**
|
||||
|
||||
Here are some best practices to follow so that your PR gets reviewed quickly.
|
||||
|
||||
1. If you plan to contribute a new feature to FreeRTOS, please get confirmation beforehand that the FreeRTOS team and community want, and will accept, this feature. This is true especially when you plan to make large or significant changes. To get confirmation and feedback from FreeRTOS Team and community, create a post in the FreeRTOS forums.
|
||||
2. Smaller is better. Small, focused PR’s are reviewed more quickly and thoroughly, are simpler to rollback, and involve less wasted effort if rejected. Avoid opening pull requests that span the whole repository.
|
||||
3. Don’t mix refactoring, bug fixes and feature development into a single PR. Lets say you are developing feature-x and you come across poorly named variables or incomplete/incorrect comments. You should consider fixing those, but in a separate PR, not in the same PR as feature-x.
|
||||
4. Comments matter. The code you develop will need to be maintained for a long time. Well placed comments provide context to your reviewers, maintainers and users, and also prevent them from misunderstanding the purpose of the code. However, DO NOT add comments to explain things which are obvious by just glancing at the code. [Good Read: https://stackoverflow.blog/2021/12/23/best-practices-for-writing-code-comments/]
|
||||
5. Test your PR. In your PR, please accompany your changes with suitable unit tests and any other tests that will be helpful, and include descriptions of how to perform any manual tests. Instructions for unit tests can be found at [freertos.org](https://freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html#Testing) and [Github](https://github.com/FreeRTOS/FreeRTOS/blob/main/FreeRTOS/Test/CMock/Readme.md)
|
||||
|
||||
|
||||
**Push Back its ok:**
|
||||
Sometimes reviewers make mistakes. If a reviewer has requested you to make changes and you feel strongly about doing it a certain way, you are free to debate the merits of the requested change with the reviewer, while still following the code of conduct. You might be overruled, but you might also prevail.
|
||||
|
||||
**Be Pragmatic**
|
||||
Put a bit of thought into how your PR can be made easier to review and merge. No document can replace common sense and good taste. The best practices shared here and the contribution guidelines, if followed, will help you get your code reviewed and merged with less friction.
|
||||
|
||||
</br>
|
||||
|
||||
### **Why is my PR closed?**
|
||||
|
||||
Pull requests older than 120 days or not in-line with scope of the project will be closed. Exceptions can be made for pull requests that have active review comments, or that are awaiting other dependent pull requests. Closed pull requests are easy to recreate, and little work is lost by closing a pull request that is subsequently reopened. We want to limit the total number of pull requests in flight to:
|
||||
|
||||
* Maintain a clean project
|
||||
* Remove old pull requests that would be difficult to rebase since the underlying code has changed over time
|
||||
* Encourage code velocity
|
||||
|
||||
### **Why is my PR not getting reviewed/merged?**
|
||||
|
||||
* It may be because of a feature freeze due to an upcoming release. During this time, only bug fixes are taken into consideration. If your pull request is a new feature, it will not be prioritised until after the release. Wait for the release.
|
||||
* It could be related to best practices (see contributing.md) not being followed. One common issue is that the pull request is too big to review. Let’s say you’ve touched 21 files and have 9347 insertions. When your would-be reviewers pull up the diffs, they run away - this pull request is going to take a few hours to review and they don’t have a few hours right now. They’ll get to it later, just as soon as they have more free time (ha!).
|
||||
* If you think the above two situations are not the reason, and you are not getting some pull request love, please drop a couple of reminders on the PR comments. If everything else fails, please create a post on FreeRTOS forums with link to PR.
|
||||
|
||||
|
||||
|
||||
7
.github/pull_request_template.md
vendored
7
.github/pull_request_template.md
vendored
|
|
@ -8,13 +8,6 @@ Test Steps
|
|||
-----------
|
||||
<!-- Describe the steps to reproduce. -->
|
||||
|
||||
Checklist:
|
||||
----------
|
||||
<!--- Go over all the following points, and put an `x` in all the boxes that apply. -->
|
||||
<!--- If you're unsure about any of these, don't hesitate to ask. We're here to help! -->
|
||||
- [ ] I have tested my changes. No regression in existing tests.
|
||||
- [ ] I have modified and/or added unit-tests to cover the code changes in this Pull Request.
|
||||
|
||||
Related Issue
|
||||
-----------
|
||||
<!-- If any, please provide issue ID. -->
|
||||
|
|
|
|||
6
.github/scripts/find_replace.sh
vendored
6
.github/scripts/find_replace.sh
vendored
|
|
@ -1,6 +0,0 @@
|
|||
#!/bin/bash
|
||||
old_text=$1
|
||||
new_text=$2
|
||||
echo "Old text: ${old_text}"
|
||||
echo "New text: ${new_text}"
|
||||
grep -rl "${old_text}" . | xargs gsed -i -e '1h;2,$H;$!d;g' -e "s/${old_text}/${new_text}/g"
|
||||
247
.github/scripts/kernel_checker.py
vendored
247
.github/scripts/kernel_checker.py
vendored
|
|
@ -1,247 +0,0 @@
|
|||
#!/usr/bin/env python3
|
||||
#/*
|
||||
# * FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
# * Copyright (C) 2024 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
# *
|
||||
# * SPDX-License-Identifier: MIT
|
||||
# *
|
||||
# * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
# * this software and associated documentation files (the "Software"), to deal in
|
||||
# * the Software without restriction, including without limitation the rights to
|
||||
# * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
# * the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
# * subject to the following conditions:
|
||||
# *
|
||||
# * The above copyright notice and this permission notice shall be included in all
|
||||
# * copies or substantial portions of the Software.
|
||||
# *
|
||||
# * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
# * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
# * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
# * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
# * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
# * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
# *
|
||||
# * https://www.FreeRTOS.org
|
||||
# * https://github.com/FreeRTOS
|
||||
# *
|
||||
# */
|
||||
|
||||
import os
|
||||
import re
|
||||
from common.header_checker import HeaderChecker
|
||||
|
||||
#--------------------------------------------------------------------------------------------------
|
||||
# CONFIG
|
||||
#--------------------------------------------------------------------------------------------------
|
||||
KERNEL_IGNORED_FILES = [
|
||||
'FreeRTOS-openocd.c',
|
||||
'Makefile',
|
||||
'.DS_Store',
|
||||
'cspell.config.yaml',
|
||||
'.clang-format'
|
||||
]
|
||||
|
||||
KERNEL_IGNORED_EXTENSIONS = [
|
||||
'.yml',
|
||||
'.css',
|
||||
'.idx',
|
||||
'.md',
|
||||
'.url',
|
||||
'.sty',
|
||||
'.0-rc2',
|
||||
'.s82',
|
||||
'.js',
|
||||
'.out',
|
||||
'.pack',
|
||||
'.2',
|
||||
'.1-kernel-only',
|
||||
'.0-kernel-only',
|
||||
'.0-rc1',
|
||||
'.readme',
|
||||
'.tex',
|
||||
'.png',
|
||||
'.bat',
|
||||
'.sh',
|
||||
'.txt',
|
||||
'.cmake',
|
||||
'.config'
|
||||
]
|
||||
|
||||
KERNEL_ASM_EXTENSIONS = [
|
||||
'.s',
|
||||
'.S',
|
||||
'.src',
|
||||
'.inc',
|
||||
'.s26',
|
||||
'.s43',
|
||||
'.s79',
|
||||
'.s85',
|
||||
'.s87',
|
||||
'.s90',
|
||||
'.asm',
|
||||
'.h'
|
||||
]
|
||||
|
||||
KERNEL_PY_EXTENSIONS = [
|
||||
'.py'
|
||||
]
|
||||
|
||||
KERNEL_IGNORED_PATTERNS = [
|
||||
r'.*\.git.*',
|
||||
r'.*portable/IAR/AtmelSAM7S64/.*AT91SAM7.*',
|
||||
r'.*portable/GCC/ARM7_AT91SAM7S/.*',
|
||||
r'.*portable/MPLAB/PIC18F/stdio.h',
|
||||
r'.*portable/ThirdParty/xClang/XCOREAI/*',
|
||||
r'.*IAR/ARM_C*',
|
||||
r'.*IAR/78K0R/*',
|
||||
r'.*CCS/MSP430X/*',
|
||||
r'.*portable/template/*',
|
||||
r'.*template_configuration/*'
|
||||
]
|
||||
|
||||
KERNEL_THIRD_PARTY_PATTERNS = [
|
||||
r'.*portable/ThirdParty/GCC/Posix/port*',
|
||||
r'.*portable/ThirdParty/*',
|
||||
r'.*portable/IAR/AVR32_UC3/.*',
|
||||
r'.*portable/GCC/AVR32_UC3/.*',
|
||||
]
|
||||
|
||||
KERNEL_ARM_COLLAB_FILES_PATTERNS = [
|
||||
r'.*portable/ARMv8M/*',
|
||||
r'.*portable/.*/ARM_CM23*',
|
||||
r'.*portable/.*/ARM_CM33*',
|
||||
r'.*portable/.*/ARM_CM35*',
|
||||
r'.*portable/.*/ARM_CM55*',
|
||||
r'.*portable/.*/ARM_CM85*',
|
||||
]
|
||||
|
||||
KERNEL_HEADER = [
|
||||
'/*\n',
|
||||
' * FreeRTOS Kernel <DEVELOPMENT BRANCH>\n',
|
||||
' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n',
|
||||
' *\n',
|
||||
' * SPDX-License-Identifier: MIT\n',
|
||||
' *\n',
|
||||
' * Permission is hereby granted, free of charge, to any person obtaining a copy of\n',
|
||||
' * this software and associated documentation files (the "Software"), to deal in\n',
|
||||
' * the Software without restriction, including without limitation the rights to\n',
|
||||
' * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n',
|
||||
' * the Software, and to permit persons to whom the Software is furnished to do so,\n',
|
||||
' * subject to the following conditions:\n',
|
||||
' *\n',
|
||||
' * The above copyright notice and this permission notice shall be included in all\n',
|
||||
' * copies or substantial portions of the Software.\n',
|
||||
' *\n',
|
||||
' * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n',
|
||||
' * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n',
|
||||
' * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n',
|
||||
' * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n',
|
||||
' * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n',
|
||||
' * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n',
|
||||
' *\n',
|
||||
' * https://www.FreeRTOS.org\n',
|
||||
' * https://github.com/FreeRTOS\n',
|
||||
' *\n',
|
||||
' */\n',
|
||||
]
|
||||
|
||||
|
||||
FREERTOS_COPYRIGHT_REGEX = r"^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright \(C\) 20\d\d Amazon.com, Inc. or its affiliates. All Rights Reserved\.( \*\/)?$"
|
||||
|
||||
FREERTOS_ARM_COLLAB_COPYRIGHT_REGEX = r"(^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright \(C\) 20\d\d Amazon.com, Inc. or its affiliates. All Rights Reserved\.( \*\/)?$)|" + \
|
||||
r"(^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright 20\d\d Arm Limited and/or its affiliates( \*\/)?$)|" + \
|
||||
r"(^(;|#)?( *(\/\*|\*|#|\/\/))? <open-source-office@arm.com>( \*\/)?$)"
|
||||
|
||||
|
||||
class KernelHeaderChecker(HeaderChecker):
|
||||
def __init__(
|
||||
self,
|
||||
header,
|
||||
padding=1000,
|
||||
ignored_files=None,
|
||||
ignored_ext=None,
|
||||
ignored_patterns=None,
|
||||
py_ext=None,
|
||||
asm_ext=None,
|
||||
third_party_patterns=None,
|
||||
copyright_regex = None
|
||||
):
|
||||
super().__init__(header, padding, ignored_files, ignored_ext, ignored_patterns,
|
||||
py_ext, asm_ext, third_party_patterns, copyright_regex)
|
||||
|
||||
self.armCollabRegex = re.compile(FREERTOS_ARM_COLLAB_COPYRIGHT_REGEX)
|
||||
|
||||
self.armCollabFilesPatternList = []
|
||||
for pattern in KERNEL_ARM_COLLAB_FILES_PATTERNS:
|
||||
self.armCollabFilesPatternList.append(re.compile(pattern))
|
||||
|
||||
def isArmCollabFile(self, path):
|
||||
for pattern in self.armCollabFilesPatternList:
|
||||
if pattern.match(path):
|
||||
return True
|
||||
return False
|
||||
|
||||
def checkArmCollabFile(self, path):
|
||||
isValid = False
|
||||
file_ext = os.path.splitext(path)[-1]
|
||||
|
||||
with open(path, encoding="utf-8", errors="ignore") as file:
|
||||
chunk = file.read(len("".join(self.header)) + self.padding)
|
||||
lines = [("%s\n" % line) for line in chunk.strip().splitlines()][
|
||||
: len(self.header) + 2
|
||||
]
|
||||
if (len(lines) > 0) and (lines[0].find("#!") == 0):
|
||||
lines.remove(lines[0])
|
||||
|
||||
# Split lines in sections.
|
||||
headers = dict()
|
||||
headers["text"] = []
|
||||
headers["copyright"] = []
|
||||
headers["spdx"] = []
|
||||
for line in lines:
|
||||
if self.armCollabRegex.match(line):
|
||||
headers["copyright"].append(line)
|
||||
elif "SPDX-License-Identifier:" in line:
|
||||
headers["spdx"].append(line)
|
||||
else:
|
||||
headers["text"].append(line)
|
||||
|
||||
text_equal = self.isValidHeaderSection(file_ext, "text", headers["text"])
|
||||
spdx_equal = self.isValidHeaderSection(file_ext, "spdx", headers["spdx"])
|
||||
|
||||
if text_equal and spdx_equal and len(headers["copyright"]) == 3:
|
||||
isValid = True
|
||||
|
||||
return isValid
|
||||
|
||||
def customCheck(self, path):
|
||||
isValid = False
|
||||
if self.isArmCollabFile(path):
|
||||
isValid = self.checkArmCollabFile(path)
|
||||
return isValid
|
||||
|
||||
|
||||
def main():
|
||||
parser = HeaderChecker.configArgParser()
|
||||
args = parser.parse_args()
|
||||
|
||||
# Configure the checks then run
|
||||
checker = KernelHeaderChecker(KERNEL_HEADER,
|
||||
copyright_regex=FREERTOS_COPYRIGHT_REGEX,
|
||||
ignored_files=KERNEL_IGNORED_FILES,
|
||||
ignored_ext=KERNEL_IGNORED_EXTENSIONS,
|
||||
ignored_patterns=KERNEL_IGNORED_PATTERNS,
|
||||
third_party_patterns=KERNEL_THIRD_PARTY_PATTERNS,
|
||||
py_ext=KERNEL_PY_EXTENSIONS,
|
||||
asm_ext=KERNEL_ASM_EXTENSIONS)
|
||||
checker.ignoreFile(os.path.split(__file__)[-1])
|
||||
|
||||
rc = checker.processArgs(args)
|
||||
if rc:
|
||||
checker.showHelp(__file__)
|
||||
|
||||
return rc
|
||||
|
||||
if __name__ == '__main__':
|
||||
exit(main())
|
||||
32
.github/scripts/manifest_updater.py
vendored
32
.github/scripts/manifest_updater.py
vendored
|
|
@ -1,32 +0,0 @@
|
|||
#!/usr/bin/env python3
|
||||
import os
|
||||
import argparse
|
||||
|
||||
THIS_FILE_PATH = os.path.dirname(os.path.abspath(__file__))
|
||||
MANIFEST_FILE = os.path.join(THIS_FILE_PATH, '..', '..', 'manifest.yml')
|
||||
|
||||
def update_manifest_file(new_version_number):
|
||||
updated_lines = []
|
||||
with open(MANIFEST_FILE, 'r') as f:
|
||||
for line in f:
|
||||
line = line.strip()
|
||||
if line.startswith('version'):
|
||||
updated_lines.append(f'version: "V{new_version_number}"\n')
|
||||
else:
|
||||
updated_lines.append(f'{line}\n')
|
||||
|
||||
with open(MANIFEST_FILE, 'w') as f:
|
||||
f.writelines(updated_lines)
|
||||
|
||||
def parse_args():
|
||||
parser = argparse.ArgumentParser()
|
||||
parser.add_argument('-v', '--version', required=True, help='New version number.')
|
||||
args = parser.parse_args()
|
||||
return args
|
||||
|
||||
def main():
|
||||
args = parse_args()
|
||||
update_manifest_file(args.version)
|
||||
|
||||
if __name__ == '__main__':
|
||||
main()
|
||||
14
.github/third_party_tools.md
vendored
14
.github/third_party_tools.md
vendored
|
|
@ -1,14 +0,0 @@
|
|||
Note that these tools are provided by different vendors and not by the FreeRTOS
|
||||
team.
|
||||
|
||||
## Tracing Tools
|
||||
| Tool | Website | Getting Started |
|
||||
|------|---------|-----------------|
|
||||
| Tracelyzer | [Link](https://percepio.com/tracealyzer/freertostrace/) | [Link](https://percepio.com/getstarted/latest/html/freertos.html) |
|
||||
| SystemView | [Link](https://www.segger.com/products/development-tools/systemview/) | [Link](https://wiki.segger.com/FreeRTOS_with_SystemView) |
|
||||
|
||||
## Static Code Analysis Tools
|
||||
| Tool | Website | Getting Started |
|
||||
|------|---------|-----------------|
|
||||
| Code Sonar | [Link](https://codesecure.com/our-products/codesonar/) | [Link](https://github.com/CodeSecure-SE/FreeRTOS-Kernel/blob/main/examples/codesonar/README.md) |
|
||||
| Coverity | [Link](https://www.blackduck.com/static-analysis-tools-sast/coverity.html) | [Link](../examples/coverity/README.md) |
|
||||
673
.github/uncrustify.cfg
vendored
673
.github/uncrustify.cfg
vendored
|
|
@ -1,673 +0,0 @@
|
|||
# Uncrustify-0.69.0
|
||||
|
||||
newlines = auto # lf/crlf/cr/auto
|
||||
input_tab_size = 4 # unsigned number
|
||||
output_tab_size = 4 # unsigned number
|
||||
string_escape_char = 92 # unsigned number
|
||||
string_escape_char2 = 0 # unsigned number
|
||||
string_replace_tab_chars = false # true/false
|
||||
tok_split_gte = false # true/false
|
||||
disable_processing_cmt = " *INDENT-OFF*" # string
|
||||
enable_processing_cmt = " *INDENT-ON*" # string
|
||||
enable_digraphs = false # true/false
|
||||
utf8_bom = ignore # ignore/add/remove/force
|
||||
utf8_byte = false # true/false
|
||||
utf8_force = false # true/false
|
||||
sp_arith = force # ignore/add/remove/force
|
||||
sp_arith_additive = ignore # ignore/add/remove/force
|
||||
sp_assign = force # ignore/add/remove/force
|
||||
sp_cpp_lambda_assign = ignore # ignore/add/remove/force
|
||||
sp_cpp_lambda_paren = ignore # ignore/add/remove/force
|
||||
sp_assign_default = force # ignore/add/remove/force
|
||||
sp_before_assign = force # ignore/add/remove/force
|
||||
sp_after_assign = force # ignore/add/remove/force
|
||||
sp_enum_paren = ignore # ignore/add/remove/force
|
||||
sp_enum_assign = force # ignore/add/remove/force
|
||||
sp_enum_before_assign = force # ignore/add/remove/force
|
||||
sp_enum_after_assign = force # ignore/add/remove/force
|
||||
sp_enum_colon = ignore # ignore/add/remove/force
|
||||
sp_pp_concat = add # ignore/add/remove/force
|
||||
sp_pp_stringify = add # ignore/add/remove/force
|
||||
sp_before_pp_stringify = ignore # ignore/add/remove/force
|
||||
sp_bool = force # ignore/add/remove/force
|
||||
sp_compare = force # ignore/add/remove/force
|
||||
sp_inside_paren = force # ignore/add/remove/force
|
||||
sp_paren_paren = force # ignore/add/remove/force
|
||||
sp_cparen_oparen = ignore # ignore/add/remove/force
|
||||
sp_balance_nested_parens = false # true/false
|
||||
sp_paren_brace = force # ignore/add/remove/force
|
||||
sp_brace_brace = ignore # ignore/add/remove/force
|
||||
sp_before_ptr_star = force # ignore/add/remove/force
|
||||
sp_before_unnamed_ptr_star = force # ignore/add/remove/force
|
||||
sp_between_ptr_star = remove # ignore/add/remove/force
|
||||
sp_after_ptr_star = force # ignore/add/remove/force
|
||||
sp_after_ptr_block_caret = ignore # ignore/add/remove/force
|
||||
sp_after_ptr_star_qualifier = ignore # ignore/add/remove/force
|
||||
sp_after_ptr_star_func = ignore # ignore/add/remove/force
|
||||
sp_ptr_star_paren = ignore # ignore/add/remove/force
|
||||
sp_before_ptr_star_func = ignore # ignore/add/remove/force
|
||||
sp_before_byref = force # ignore/add/remove/force
|
||||
sp_before_unnamed_byref = ignore # ignore/add/remove/force
|
||||
sp_after_byref = remove # ignore/add/remove/force
|
||||
sp_after_byref_func = remove # ignore/add/remove/force
|
||||
sp_before_byref_func = ignore # ignore/add/remove/force
|
||||
sp_after_type = force # ignore/add/remove/force
|
||||
sp_after_decltype = ignore # ignore/add/remove/force
|
||||
sp_before_template_paren = ignore # ignore/add/remove/force
|
||||
sp_template_angle = ignore # ignore/add/remove/force
|
||||
sp_before_angle = remove # ignore/add/remove/force
|
||||
sp_inside_angle = remove # ignore/add/remove/force
|
||||
sp_inside_angle_empty = ignore # ignore/add/remove/force
|
||||
sp_angle_colon = ignore # ignore/add/remove/force
|
||||
sp_after_angle = force # ignore/add/remove/force
|
||||
sp_angle_paren = ignore # ignore/add/remove/force
|
||||
sp_angle_paren_empty = ignore # ignore/add/remove/force
|
||||
sp_angle_word = ignore # ignore/add/remove/force
|
||||
sp_angle_shift = add # ignore/add/remove/force
|
||||
sp_permit_cpp11_shift = false # true/false
|
||||
sp_before_sparen = remove # ignore/add/remove/force
|
||||
sp_inside_sparen = force # ignore/add/remove/force
|
||||
sp_inside_sparen_open = ignore # ignore/add/remove/force
|
||||
sp_inside_sparen_close = ignore # ignore/add/remove/force
|
||||
sp_after_sparen = force # ignore/add/remove/force
|
||||
sp_sparen_brace = force # ignore/add/remove/force
|
||||
sp_invariant_paren = ignore # ignore/add/remove/force
|
||||
sp_after_invariant_paren = ignore # ignore/add/remove/force
|
||||
sp_special_semi = ignore # ignore/add/remove/force
|
||||
sp_before_semi = remove # ignore/add/remove/force
|
||||
sp_before_semi_for = remove # ignore/add/remove/force
|
||||
sp_before_semi_for_empty = add # ignore/add/remove/force
|
||||
sp_after_semi = add # ignore/add/remove/force
|
||||
sp_after_semi_for = force # ignore/add/remove/force
|
||||
sp_after_semi_for_empty = force # ignore/add/remove/force
|
||||
sp_before_square = remove # ignore/add/remove/force
|
||||
sp_before_squares = remove # ignore/add/remove/force
|
||||
sp_cpp_before_struct_binding = ignore # ignore/add/remove/force
|
||||
sp_inside_square = force # ignore/add/remove/force
|
||||
sp_inside_square_oc_array = ignore # ignore/add/remove/force
|
||||
sp_after_comma = force # ignore/add/remove/force
|
||||
sp_before_comma = remove # ignore/add/remove/force
|
||||
sp_after_mdatype_commas = ignore # ignore/add/remove/force
|
||||
sp_before_mdatype_commas = ignore # ignore/add/remove/force
|
||||
sp_between_mdatype_commas = ignore # ignore/add/remove/force
|
||||
sp_paren_comma = force # ignore/add/remove/force
|
||||
sp_before_ellipsis = ignore # ignore/add/remove/force
|
||||
sp_type_ellipsis = ignore # ignore/add/remove/force
|
||||
sp_type_question = ignore # ignore/add/remove/force
|
||||
sp_paren_ellipsis = ignore # ignore/add/remove/force
|
||||
sp_paren_qualifier = ignore # ignore/add/remove/force
|
||||
sp_paren_noexcept = ignore # ignore/add/remove/force
|
||||
sp_after_class_colon = ignore # ignore/add/remove/force
|
||||
sp_before_class_colon = ignore # ignore/add/remove/force
|
||||
sp_after_constr_colon = ignore # ignore/add/remove/force
|
||||
sp_before_constr_colon = ignore # ignore/add/remove/force
|
||||
sp_before_case_colon = remove # ignore/add/remove/force
|
||||
sp_after_operator = ignore # ignore/add/remove/force
|
||||
sp_after_operator_sym = ignore # ignore/add/remove/force
|
||||
sp_after_operator_sym_empty = ignore # ignore/add/remove/force
|
||||
sp_after_cast = force # ignore/add/remove/force
|
||||
sp_inside_paren_cast = force # ignore/add/remove/force
|
||||
sp_cpp_cast_paren = ignore # ignore/add/remove/force
|
||||
sp_sizeof_paren = remove # ignore/add/remove/force
|
||||
sp_sizeof_ellipsis = ignore # ignore/add/remove/force
|
||||
sp_sizeof_ellipsis_paren = ignore # ignore/add/remove/force
|
||||
sp_decltype_paren = ignore # ignore/add/remove/force
|
||||
sp_after_tag = ignore # ignore/add/remove/force
|
||||
sp_inside_braces_enum = force # ignore/add/remove/force
|
||||
sp_inside_braces_struct = force # ignore/add/remove/force
|
||||
sp_inside_braces_oc_dict = ignore # ignore/add/remove/force
|
||||
sp_after_type_brace_init_lst_open = ignore # ignore/add/remove/force
|
||||
sp_before_type_brace_init_lst_close = ignore # ignore/add/remove/force
|
||||
sp_inside_type_brace_init_lst = ignore # ignore/add/remove/force
|
||||
sp_inside_braces = force # ignore/add/remove/force
|
||||
sp_inside_braces_empty = remove # ignore/add/remove/force
|
||||
sp_type_func = force # ignore/add/remove/force
|
||||
sp_type_brace_init_lst = ignore # ignore/add/remove/force
|
||||
sp_func_proto_paren = remove # ignore/add/remove/force
|
||||
sp_func_proto_paren_empty = ignore # ignore/add/remove/force
|
||||
sp_func_def_paren = remove # ignore/add/remove/force
|
||||
sp_func_def_paren_empty = ignore # ignore/add/remove/force
|
||||
sp_inside_fparens = remove # ignore/add/remove/force
|
||||
sp_inside_fparen = force # ignore/add/remove/force
|
||||
sp_inside_tparen = ignore # ignore/add/remove/force
|
||||
sp_after_tparen_close = ignore # ignore/add/remove/force
|
||||
sp_square_fparen = ignore # ignore/add/remove/force
|
||||
sp_fparen_brace = add # ignore/add/remove/force
|
||||
sp_fparen_brace_initializer = ignore # ignore/add/remove/force
|
||||
sp_fparen_dbrace = ignore # ignore/add/remove/force
|
||||
sp_func_call_paren = remove # ignore/add/remove/force
|
||||
sp_func_call_paren_empty = ignore # ignore/add/remove/force
|
||||
sp_func_call_user_paren = ignore # ignore/add/remove/force
|
||||
sp_func_call_user_inside_fparen = ignore # ignore/add/remove/force
|
||||
sp_func_call_user_paren_paren = ignore # ignore/add/remove/force
|
||||
sp_func_class_paren = remove # ignore/add/remove/force
|
||||
sp_func_class_paren_empty = ignore # ignore/add/remove/force
|
||||
sp_return_paren = remove # ignore/add/remove/force
|
||||
sp_return_brace = ignore # ignore/add/remove/force
|
||||
sp_attribute_paren = remove # ignore/add/remove/force
|
||||
sp_defined_paren = remove # ignore/add/remove/force
|
||||
sp_throw_paren = ignore # ignore/add/remove/force
|
||||
sp_after_throw = ignore # ignore/add/remove/force
|
||||
sp_catch_paren = ignore # ignore/add/remove/force
|
||||
sp_oc_catch_paren = ignore # ignore/add/remove/force
|
||||
sp_oc_classname_paren = ignore # ignore/add/remove/force
|
||||
sp_version_paren = ignore # ignore/add/remove/force
|
||||
sp_scope_paren = ignore # ignore/add/remove/force
|
||||
sp_super_paren = remove # ignore/add/remove/force
|
||||
sp_this_paren = remove # ignore/add/remove/force
|
||||
sp_macro = force # ignore/add/remove/force
|
||||
sp_macro_func = force # ignore/add/remove/force
|
||||
sp_else_brace = ignore # ignore/add/remove/force
|
||||
sp_brace_else = ignore # ignore/add/remove/force
|
||||
sp_brace_typedef = force # ignore/add/remove/force
|
||||
sp_catch_brace = ignore # ignore/add/remove/force
|
||||
sp_oc_catch_brace = ignore # ignore/add/remove/force
|
||||
sp_brace_catch = ignore # ignore/add/remove/force
|
||||
sp_oc_brace_catch = ignore # ignore/add/remove/force
|
||||
sp_finally_brace = ignore # ignore/add/remove/force
|
||||
sp_brace_finally = ignore # ignore/add/remove/force
|
||||
sp_try_brace = ignore # ignore/add/remove/force
|
||||
sp_getset_brace = ignore # ignore/add/remove/force
|
||||
sp_word_brace = add # ignore/add/remove/force
|
||||
sp_word_brace_ns = add # ignore/add/remove/force
|
||||
sp_before_dc = remove # ignore/add/remove/force
|
||||
sp_after_dc = remove # ignore/add/remove/force
|
||||
sp_d_array_colon = ignore # ignore/add/remove/force
|
||||
sp_not = remove # ignore/add/remove/force
|
||||
sp_inv = remove # ignore/add/remove/force
|
||||
sp_addr = remove # ignore/add/remove/force
|
||||
sp_member = remove # ignore/add/remove/force
|
||||
sp_deref = remove # ignore/add/remove/force
|
||||
sp_sign = remove # ignore/add/remove/force
|
||||
sp_incdec = remove # ignore/add/remove/force
|
||||
sp_before_nl_cont = add # ignore/add/remove/force
|
||||
sp_after_oc_scope = ignore # ignore/add/remove/force
|
||||
sp_after_oc_colon = ignore # ignore/add/remove/force
|
||||
sp_before_oc_colon = ignore # ignore/add/remove/force
|
||||
sp_after_oc_dict_colon = ignore # ignore/add/remove/force
|
||||
sp_before_oc_dict_colon = ignore # ignore/add/remove/force
|
||||
sp_after_send_oc_colon = ignore # ignore/add/remove/force
|
||||
sp_before_send_oc_colon = ignore # ignore/add/remove/force
|
||||
sp_after_oc_type = ignore # ignore/add/remove/force
|
||||
sp_after_oc_return_type = ignore # ignore/add/remove/force
|
||||
sp_after_oc_at_sel = ignore # ignore/add/remove/force
|
||||
sp_after_oc_at_sel_parens = ignore # ignore/add/remove/force
|
||||
sp_inside_oc_at_sel_parens = ignore # ignore/add/remove/force
|
||||
sp_before_oc_block_caret = ignore # ignore/add/remove/force
|
||||
sp_after_oc_block_caret = ignore # ignore/add/remove/force
|
||||
sp_after_oc_msg_receiver = ignore # ignore/add/remove/force
|
||||
sp_after_oc_property = ignore # ignore/add/remove/force
|
||||
sp_after_oc_synchronized = ignore # ignore/add/remove/force
|
||||
sp_cond_colon = force # ignore/add/remove/force
|
||||
sp_cond_colon_before = ignore # ignore/add/remove/force
|
||||
sp_cond_colon_after = ignore # ignore/add/remove/force
|
||||
sp_cond_question = force # ignore/add/remove/force
|
||||
sp_cond_question_before = ignore # ignore/add/remove/force
|
||||
sp_cond_question_after = ignore # ignore/add/remove/force
|
||||
sp_cond_ternary_short = ignore # ignore/add/remove/force
|
||||
sp_case_label = force # ignore/add/remove/force
|
||||
sp_range = ignore # ignore/add/remove/force
|
||||
sp_after_for_colon = ignore # ignore/add/remove/force
|
||||
sp_before_for_colon = ignore # ignore/add/remove/force
|
||||
sp_extern_paren = ignore # ignore/add/remove/force
|
||||
sp_cmt_cpp_start = ignore # ignore/add/remove/force
|
||||
sp_cmt_cpp_doxygen = false # true/false
|
||||
sp_cmt_cpp_qttr = false # true/false
|
||||
sp_endif_cmt = force # ignore/add/remove/force
|
||||
sp_after_new = ignore # ignore/add/remove/force
|
||||
sp_between_new_paren = ignore # ignore/add/remove/force
|
||||
sp_after_newop_paren = ignore # ignore/add/remove/force
|
||||
sp_inside_newop_paren = ignore # ignore/add/remove/force
|
||||
sp_inside_newop_paren_open = ignore # ignore/add/remove/force
|
||||
sp_inside_newop_paren_close = ignore # ignore/add/remove/force
|
||||
sp_before_tr_emb_cmt = force # ignore/add/remove/force
|
||||
sp_num_before_tr_emb_cmt = 1 # unsigned number
|
||||
sp_annotation_paren = ignore # ignore/add/remove/force
|
||||
sp_skip_vbrace_tokens = false # true/false
|
||||
sp_after_noexcept = ignore # ignore/add/remove/force
|
||||
sp_vala_after_translation = ignore # ignore/add/remove/force
|
||||
force_tab_after_define = false # true/false
|
||||
indent_columns = 4 # unsigned number
|
||||
indent_continue = 0 # number
|
||||
indent_continue_class_head = 0 # unsigned number
|
||||
indent_single_newlines = false # true/false
|
||||
indent_param = 0 # unsigned number
|
||||
indent_with_tabs = 0 # unsigned number
|
||||
indent_cmt_with_tabs = false # true/false
|
||||
indent_align_string = true # true/false
|
||||
indent_xml_string = 0 # unsigned number
|
||||
indent_brace = 0 # unsigned number
|
||||
indent_braces = false # true/false
|
||||
indent_braces_no_func = false # true/false
|
||||
indent_braces_no_class = false # true/false
|
||||
indent_braces_no_struct = false # true/false
|
||||
indent_brace_parent = false # true/false
|
||||
indent_paren_open_brace = false # true/false
|
||||
indent_cs_delegate_brace = false # true/false
|
||||
indent_cs_delegate_body = false # true/false
|
||||
indent_namespace = false # true/false
|
||||
indent_namespace_single_indent = false # true/false
|
||||
indent_namespace_level = 0 # unsigned number
|
||||
indent_namespace_limit = 0 # unsigned number
|
||||
indent_extern = false # true/false
|
||||
indent_class = true # true/false
|
||||
indent_class_colon = true # true/false
|
||||
indent_class_on_colon = false # true/false
|
||||
indent_constr_colon = false # true/false
|
||||
indent_ctor_init_leading = 2 # unsigned number
|
||||
indent_ctor_init = 0 # number
|
||||
indent_else_if = false # true/false
|
||||
indent_var_def_blk = 0 # number
|
||||
indent_var_def_cont = false # true/false
|
||||
indent_shift = false # true/false
|
||||
indent_func_def_force_col1 = false # true/false
|
||||
indent_func_call_param = false # true/false
|
||||
indent_func_def_param = false # true/false
|
||||
indent_func_proto_param = false # true/false
|
||||
indent_func_class_param = false # true/false
|
||||
indent_func_ctor_var_param = false # true/false
|
||||
indent_template_param = false # true/false
|
||||
indent_func_param_double = false # true/false
|
||||
indent_func_const = 0 # unsigned number
|
||||
indent_func_throw = 0 # unsigned number
|
||||
indent_member = 3 # unsigned number
|
||||
indent_member_single = false # true/false
|
||||
indent_sing_line_comments = 0 # unsigned number
|
||||
indent_relative_single_line_comments = false # true/false
|
||||
indent_switch_case = 4 # unsigned number
|
||||
indent_switch_pp = true # true/false
|
||||
indent_case_shift = 0 # unsigned number
|
||||
indent_case_brace = 3 # number
|
||||
indent_col1_comment = false # true/false
|
||||
indent_col1_multi_string_literal = false # true/false
|
||||
indent_label = 1 # number
|
||||
indent_access_spec = 1 # number
|
||||
indent_access_spec_body = false # true/false
|
||||
indent_paren_nl = false # true/false
|
||||
indent_paren_close = 0 # unsigned number
|
||||
indent_paren_after_func_def = false # true/false
|
||||
indent_paren_after_func_decl = false # true/false
|
||||
indent_paren_after_func_call = false # true/false
|
||||
indent_comma_paren = false # true/false
|
||||
indent_bool_paren = false # true/false
|
||||
indent_semicolon_for_paren = false # true/false
|
||||
indent_first_bool_expr = false # true/false
|
||||
indent_first_for_expr = false # true/false
|
||||
indent_square_nl = false # true/false
|
||||
indent_preserve_sql = false # true/false
|
||||
indent_align_assign = true # true/false
|
||||
indent_align_paren = true # true/false
|
||||
indent_oc_block = false # true/false
|
||||
indent_oc_block_msg = 0 # unsigned number
|
||||
indent_oc_msg_colon = 0 # unsigned number
|
||||
indent_oc_msg_prioritize_first_colon = true # true/false
|
||||
indent_oc_block_msg_xcode_style = false # true/false
|
||||
indent_oc_block_msg_from_keyword = false # true/false
|
||||
indent_oc_block_msg_from_colon = false # true/false
|
||||
indent_oc_block_msg_from_caret = false # true/false
|
||||
indent_oc_block_msg_from_brace = false # true/false
|
||||
indent_min_vbrace_open = 0 # unsigned number
|
||||
indent_vbrace_open_on_tabstop = false # true/false
|
||||
indent_token_after_brace = true # true/false
|
||||
indent_cpp_lambda_body = false # true/false
|
||||
indent_using_block = true # true/false
|
||||
indent_ternary_operator = 0 # unsigned number
|
||||
indent_off_after_return_new = false # true/false
|
||||
indent_single_after_return = false # true/false
|
||||
indent_ignore_asm_block = false # true/false
|
||||
nl_collapse_empty_body = false # true/false
|
||||
nl_assign_leave_one_liners = true # true/false
|
||||
nl_class_leave_one_liners = true # true/false
|
||||
nl_enum_leave_one_liners = false # true/false
|
||||
nl_getset_leave_one_liners = false # true/false
|
||||
nl_cs_property_leave_one_liners = false # true/false
|
||||
nl_func_leave_one_liners = false # true/false
|
||||
nl_cpp_lambda_leave_one_liners = false # true/false
|
||||
nl_if_leave_one_liners = false # true/false
|
||||
nl_while_leave_one_liners = false # true/false
|
||||
nl_for_leave_one_liners = false # true/false
|
||||
nl_oc_msg_leave_one_liner = false # true/false
|
||||
nl_oc_mdef_brace = ignore # ignore/add/remove/force
|
||||
nl_oc_block_brace = ignore # ignore/add/remove/force
|
||||
nl_oc_interface_brace = ignore # ignore/add/remove/force
|
||||
nl_oc_implementation_brace = ignore # ignore/add/remove/force
|
||||
nl_start_of_file = remove # ignore/add/remove/force
|
||||
nl_start_of_file_min = 0 # unsigned number
|
||||
nl_end_of_file = force # ignore/add/remove/force
|
||||
nl_end_of_file_min = 1 # unsigned number
|
||||
nl_assign_brace = add # ignore/add/remove/force
|
||||
nl_assign_square = ignore # ignore/add/remove/force
|
||||
nl_tsquare_brace = ignore # ignore/add/remove/force
|
||||
nl_after_square_assign = ignore # ignore/add/remove/force
|
||||
nl_fcall_brace = add # ignore/add/remove/force
|
||||
nl_enum_brace = force # ignore/add/remove/force
|
||||
nl_enum_class = ignore # ignore/add/remove/force
|
||||
nl_enum_class_identifier = ignore # ignore/add/remove/force
|
||||
nl_enum_identifier_colon = ignore # ignore/add/remove/force
|
||||
nl_enum_colon_type = ignore # ignore/add/remove/force
|
||||
nl_struct_brace = force # ignore/add/remove/force
|
||||
nl_union_brace = force # ignore/add/remove/force
|
||||
nl_if_brace = add # ignore/add/remove/force
|
||||
nl_brace_else = add # ignore/add/remove/force
|
||||
nl_elseif_brace = ignore # ignore/add/remove/force
|
||||
nl_else_brace = add # ignore/add/remove/force
|
||||
nl_else_if = ignore # ignore/add/remove/force
|
||||
nl_before_if_closing_paren = ignore # ignore/add/remove/force
|
||||
nl_brace_finally = ignore # ignore/add/remove/force
|
||||
nl_finally_brace = ignore # ignore/add/remove/force
|
||||
nl_try_brace = ignore # ignore/add/remove/force
|
||||
nl_getset_brace = force # ignore/add/remove/force
|
||||
nl_for_brace = add # ignore/add/remove/force
|
||||
nl_catch_brace = ignore # ignore/add/remove/force
|
||||
nl_oc_catch_brace = ignore # ignore/add/remove/force
|
||||
nl_brace_catch = ignore # ignore/add/remove/force
|
||||
nl_oc_brace_catch = ignore # ignore/add/remove/force
|
||||
nl_brace_square = ignore # ignore/add/remove/force
|
||||
nl_brace_fparen = ignore # ignore/add/remove/force
|
||||
nl_while_brace = add # ignore/add/remove/force
|
||||
nl_scope_brace = ignore # ignore/add/remove/force
|
||||
nl_unittest_brace = ignore # ignore/add/remove/force
|
||||
nl_version_brace = ignore # ignore/add/remove/force
|
||||
nl_using_brace = ignore # ignore/add/remove/force
|
||||
nl_brace_brace = ignore # ignore/add/remove/force
|
||||
nl_do_brace = add # ignore/add/remove/force
|
||||
nl_brace_while = ignore # ignore/add/remove/force
|
||||
nl_switch_brace = add # ignore/add/remove/force
|
||||
nl_synchronized_brace = ignore # ignore/add/remove/force
|
||||
nl_multi_line_cond = false # true/false
|
||||
nl_multi_line_define = true # true/false
|
||||
nl_before_case = true # true/false
|
||||
nl_after_case = true # true/false
|
||||
nl_case_colon_brace = ignore # ignore/add/remove/force
|
||||
nl_before_throw = ignore # ignore/add/remove/force
|
||||
nl_namespace_brace = ignore # ignore/add/remove/force
|
||||
nl_template_class = ignore # ignore/add/remove/force
|
||||
nl_class_brace = ignore # ignore/add/remove/force
|
||||
nl_class_init_args = ignore # ignore/add/remove/force
|
||||
nl_constr_init_args = ignore # ignore/add/remove/force
|
||||
nl_enum_own_lines = ignore # ignore/add/remove/force
|
||||
nl_func_type_name = remove # ignore/add/remove/force
|
||||
nl_func_type_name_class = ignore # ignore/add/remove/force
|
||||
nl_func_class_scope = ignore # ignore/add/remove/force
|
||||
nl_func_scope_name = ignore # ignore/add/remove/force
|
||||
nl_func_proto_type_name = remove # ignore/add/remove/force
|
||||
nl_func_paren = remove # ignore/add/remove/force
|
||||
nl_func_paren_empty = ignore # ignore/add/remove/force
|
||||
nl_func_def_paren = remove # ignore/add/remove/force
|
||||
nl_func_def_paren_empty = ignore # ignore/add/remove/force
|
||||
nl_func_call_paren = ignore # ignore/add/remove/force
|
||||
nl_func_call_paren_empty = ignore # ignore/add/remove/force
|
||||
nl_func_decl_start = remove # ignore/add/remove/force
|
||||
nl_func_def_start = remove # ignore/add/remove/force
|
||||
nl_func_decl_start_single = ignore # ignore/add/remove/force
|
||||
nl_func_def_start_single = ignore # ignore/add/remove/force
|
||||
nl_func_decl_start_multi_line = false # true/false
|
||||
nl_func_def_start_multi_line = false # true/false
|
||||
nl_func_decl_args = add # ignore/add/remove/force
|
||||
nl_func_def_args = add # ignore/add/remove/force
|
||||
nl_func_decl_args_multi_line = false # true/false
|
||||
nl_func_def_args_multi_line = false # true/false
|
||||
nl_func_decl_end = remove # ignore/add/remove/force
|
||||
nl_func_def_end = remove # ignore/add/remove/force
|
||||
nl_func_decl_end_single = ignore # ignore/add/remove/force
|
||||
nl_func_def_end_single = ignore # ignore/add/remove/force
|
||||
nl_func_decl_end_multi_line = false # true/false
|
||||
nl_func_def_end_multi_line = false # true/false
|
||||
nl_func_decl_empty = ignore # ignore/add/remove/force
|
||||
nl_func_def_empty = ignore # ignore/add/remove/force
|
||||
nl_func_call_empty = ignore # ignore/add/remove/force
|
||||
nl_func_call_start = ignore # ignore/add/remove/force
|
||||
nl_func_call_start_multi_line = false # true/false
|
||||
nl_func_call_args_multi_line = false # true/false
|
||||
nl_func_call_end_multi_line = false # true/false
|
||||
nl_oc_msg_args = false # true/false
|
||||
nl_fdef_brace = add # ignore/add/remove/force
|
||||
nl_fdef_brace_cond = ignore # ignore/add/remove/force
|
||||
nl_cpp_ldef_brace = ignore # ignore/add/remove/force
|
||||
nl_return_expr = ignore # ignore/add/remove/force
|
||||
nl_after_semicolon = true # true/false
|
||||
nl_paren_dbrace_open = ignore # ignore/add/remove/force
|
||||
nl_type_brace_init_lst = ignore # ignore/add/remove/force
|
||||
nl_type_brace_init_lst_open = ignore # ignore/add/remove/force
|
||||
nl_type_brace_init_lst_close = ignore # ignore/add/remove/force
|
||||
nl_after_brace_open = true # true/false
|
||||
nl_after_brace_open_cmt = false # true/false
|
||||
nl_after_vbrace_open = false # true/false
|
||||
nl_after_vbrace_open_empty = false # true/false
|
||||
nl_after_brace_close = true # true/false
|
||||
nl_after_vbrace_close = false # true/false
|
||||
nl_brace_struct_var = ignore # ignore/add/remove/force
|
||||
nl_define_macro = false # true/false
|
||||
nl_squeeze_paren_close = false # true/false
|
||||
nl_squeeze_ifdef = true # true/false
|
||||
nl_squeeze_ifdef_top_level = false # true/false
|
||||
nl_before_if = force # ignore/add/remove/force
|
||||
nl_after_if = force # ignore/add/remove/force
|
||||
nl_before_for = force # ignore/add/remove/force
|
||||
nl_after_for = force # ignore/add/remove/force
|
||||
nl_before_while = force # ignore/add/remove/force
|
||||
nl_after_while = force # ignore/add/remove/force
|
||||
nl_before_switch = force # ignore/add/remove/force
|
||||
nl_after_switch = force # ignore/add/remove/force
|
||||
nl_before_synchronized = ignore # ignore/add/remove/force
|
||||
nl_after_synchronized = ignore # ignore/add/remove/force
|
||||
nl_before_do = force # ignore/add/remove/force
|
||||
nl_after_do = force # ignore/add/remove/force
|
||||
nl_before_return = false # true/false
|
||||
nl_after_return = true # true/false
|
||||
nl_ds_struct_enum_cmt = false # true/false
|
||||
nl_ds_struct_enum_close_brace = false # true/false
|
||||
nl_class_colon = ignore # ignore/add/remove/force
|
||||
nl_constr_colon = ignore # ignore/add/remove/force
|
||||
nl_namespace_two_to_one_liner = false # true/false
|
||||
nl_create_if_one_liner = false # true/false
|
||||
nl_create_for_one_liner = false # true/false
|
||||
nl_create_while_one_liner = false # true/false
|
||||
nl_create_func_def_one_liner = false # true/false
|
||||
nl_split_if_one_liner = false # true/false
|
||||
nl_split_for_one_liner = false # true/false
|
||||
nl_split_while_one_liner = false # true/false
|
||||
nl_max = 4 # unsigned number
|
||||
nl_max_blank_in_func = 0 # unsigned number
|
||||
nl_before_func_body_proto = 0 # unsigned number
|
||||
nl_before_func_body_def = 0 # unsigned number
|
||||
nl_before_func_class_proto = 0 # unsigned number
|
||||
nl_before_func_class_def = 0 # unsigned number
|
||||
nl_after_func_proto = 0 # unsigned number
|
||||
nl_after_func_proto_group = 1 # unsigned number
|
||||
nl_after_func_class_proto = 0 # unsigned number
|
||||
nl_after_func_class_proto_group = 0 # unsigned number
|
||||
nl_class_leave_one_liner_groups = false # true/false
|
||||
nl_after_func_body = 0 # unsigned number
|
||||
nl_after_func_body_class = 2 # unsigned number
|
||||
nl_after_func_body_one_liner = 0 # unsigned number
|
||||
nl_func_var_def_blk = 1 # unsigned number
|
||||
nl_typedef_blk_start = 0 # unsigned number
|
||||
nl_typedef_blk_end = 0 # unsigned number
|
||||
nl_typedef_blk_in = 0 # unsigned number
|
||||
nl_var_def_blk_start = 0 # unsigned number
|
||||
nl_var_def_blk_end = 0 # unsigned number
|
||||
nl_var_def_blk_in = 0 # unsigned number
|
||||
nl_before_block_comment = 2 # unsigned number
|
||||
nl_before_c_comment = 0 # unsigned number
|
||||
nl_before_cpp_comment = 0 # unsigned number
|
||||
nl_after_multiline_comment = false # true/false
|
||||
nl_after_label_colon = false # true/false
|
||||
nl_after_struct = 0 # unsigned number
|
||||
nl_before_class = 0 # unsigned number
|
||||
nl_after_class = 0 # unsigned number
|
||||
nl_before_access_spec = 0 # unsigned number
|
||||
nl_after_access_spec = 0 # unsigned number
|
||||
nl_comment_func_def = 0 # unsigned number
|
||||
nl_after_try_catch_finally = 0 # unsigned number
|
||||
nl_around_cs_property = 0 # unsigned number
|
||||
nl_between_get_set = 0 # unsigned number
|
||||
nl_property_brace = ignore # ignore/add/remove/force
|
||||
nl_inside_namespace = 0 # unsigned number
|
||||
eat_blanks_after_open_brace = true # true/false
|
||||
eat_blanks_before_close_brace = true # true/false
|
||||
nl_remove_extra_newlines = 0 # unsigned number
|
||||
nl_after_annotation = ignore # ignore/add/remove/force
|
||||
nl_between_annotation = ignore # ignore/add/remove/force
|
||||
pos_arith = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
|
||||
pos_assign = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
|
||||
pos_bool = trail # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
|
||||
pos_compare = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
|
||||
pos_conditional = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
|
||||
pos_comma = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
|
||||
pos_enum_comma = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
|
||||
pos_class_comma = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
|
||||
pos_constr_comma = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
|
||||
pos_class_colon = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
|
||||
pos_constr_colon = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
|
||||
code_width = 0 # unsigned number
|
||||
ls_for_split_full = false # true/false
|
||||
ls_func_split_full = false # true/false
|
||||
ls_code_width = false # true/false
|
||||
align_keep_tabs = false # true/false
|
||||
align_with_tabs = false # true/false
|
||||
align_on_tabstop = false # true/false
|
||||
align_number_right = false # true/false
|
||||
align_keep_extra_space = false # true/false
|
||||
align_func_params = false # true/false
|
||||
align_func_params_span = 0 # unsigned number
|
||||
align_func_params_thresh = 0 # number
|
||||
align_func_params_gap = 0 # unsigned number
|
||||
align_constr_value_span = 0 # unsigned number
|
||||
align_constr_value_thresh = 0 # number
|
||||
align_constr_value_gap = 0 # unsigned number
|
||||
align_same_func_call_params = false # true/false
|
||||
align_same_func_call_params_span = 0 # unsigned number
|
||||
align_same_func_call_params_thresh = 0 # number
|
||||
align_var_def_span = 0 # unsigned number
|
||||
align_var_def_star_style = 0 # unsigned number
|
||||
align_var_def_amp_style = 1 # unsigned number
|
||||
align_var_def_thresh = 16 # number
|
||||
align_var_def_gap = 0 # unsigned number
|
||||
align_var_def_colon = false # true/false
|
||||
align_var_def_colon_gap = 0 # unsigned number
|
||||
align_var_def_attribute = false # true/false
|
||||
align_var_def_inline = false # true/false
|
||||
align_assign_span = 0 # unsigned number
|
||||
align_assign_func_proto_span = 0 # unsigned number
|
||||
align_assign_thresh = 12 # number
|
||||
align_assign_decl_func = 0 # unsigned number
|
||||
align_enum_equ_span = 0 # unsigned number
|
||||
align_enum_equ_thresh = 0 # number
|
||||
align_var_class_span = 0 # unsigned number
|
||||
align_var_class_thresh = 0 # number
|
||||
align_var_class_gap = 0 # unsigned number
|
||||
align_var_struct_span = 0 # unsigned number
|
||||
align_var_struct_thresh = 0 # number
|
||||
align_var_struct_gap = 0 # unsigned number
|
||||
align_struct_init_span = 3 # unsigned number
|
||||
align_typedef_span = 5 # unsigned number
|
||||
align_typedef_gap = 3 # unsigned number
|
||||
align_typedef_func = 0 # unsigned number
|
||||
align_typedef_star_style = 1 # unsigned number
|
||||
align_typedef_amp_style = 1 # unsigned number
|
||||
align_right_cmt_span = 3 # unsigned number
|
||||
align_right_cmt_gap = 0 # unsigned number
|
||||
align_right_cmt_mix = false # true/false
|
||||
align_right_cmt_same_level = false # true/false
|
||||
align_right_cmt_at_col = 0 # unsigned number
|
||||
align_func_proto_span = 0 # unsigned number
|
||||
align_func_proto_thresh = 0 # number
|
||||
align_func_proto_gap = 0 # unsigned number
|
||||
align_on_operator = false # true/false
|
||||
align_mix_var_proto = false # true/false
|
||||
align_single_line_func = false # true/false
|
||||
align_single_line_brace = false # true/false
|
||||
align_single_line_brace_gap = 0 # unsigned number
|
||||
align_oc_msg_spec_span = 0 # unsigned number
|
||||
align_nl_cont = true # true/false
|
||||
align_pp_define_together = false # true/false
|
||||
align_pp_define_span = 3 # unsigned number
|
||||
align_pp_define_gap = 4 # unsigned number
|
||||
align_left_shift = true # true/false
|
||||
align_asm_colon = false # true/false
|
||||
align_oc_msg_colon_span = 0 # unsigned number
|
||||
align_oc_msg_colon_first = false # true/false
|
||||
align_oc_decl_colon = false # true/false
|
||||
cmt_width = 0 # unsigned number
|
||||
cmt_reflow_mode = 0 # unsigned number
|
||||
cmt_convert_tab_to_spaces = false # true/false
|
||||
cmt_indent_multi = true # true/false
|
||||
cmt_c_group = false # true/false
|
||||
cmt_c_nl_start = false # true/false
|
||||
cmt_c_nl_end = false # true/false
|
||||
cmt_cpp_to_c = true # true/false
|
||||
cmt_cpp_group = false # true/false
|
||||
cmt_cpp_nl_start = false # true/false
|
||||
cmt_cpp_nl_end = false # true/false
|
||||
cmt_star_cont = true # true/false
|
||||
cmt_sp_before_star_cont = 0 # unsigned number
|
||||
cmt_sp_after_star_cont = 0 # unsigned number
|
||||
cmt_multi_check_last = true # true/false
|
||||
cmt_multi_first_len_minimum = 4 # unsigned number
|
||||
cmt_insert_file_header = "" # string
|
||||
cmt_insert_file_footer = "" # string
|
||||
cmt_insert_func_header = "" # string
|
||||
cmt_insert_class_header = "" # string
|
||||
cmt_insert_oc_msg_header = "" # string
|
||||
cmt_insert_before_preproc = false # true/false
|
||||
cmt_insert_before_inlines = true # true/false
|
||||
cmt_insert_before_ctor_dtor = false # true/false
|
||||
mod_full_brace_do = add # ignore/add/remove/force
|
||||
mod_full_brace_for = add # ignore/add/remove/force
|
||||
mod_full_brace_function = ignore # ignore/add/remove/force
|
||||
mod_full_brace_if = add # ignore/add/remove/force
|
||||
mod_full_brace_if_chain = false # true/false
|
||||
mod_full_brace_if_chain_only = false # true/false
|
||||
mod_full_brace_while = add # ignore/add/remove/force
|
||||
mod_full_brace_using = ignore # ignore/add/remove/force
|
||||
mod_full_brace_nl = 0 # unsigned number
|
||||
mod_full_brace_nl_block_rem_mlcond = false # true/false
|
||||
mod_paren_on_return = ignore # ignore/add/remove/force
|
||||
mod_pawn_semicolon = false # true/false
|
||||
mod_full_paren_if_bool = true # true/false
|
||||
mod_remove_extra_semicolon = true # true/false
|
||||
mod_add_long_function_closebrace_comment = 0 # unsigned number
|
||||
mod_add_long_namespace_closebrace_comment = 0 # unsigned number
|
||||
mod_add_long_class_closebrace_comment = 0 # unsigned number
|
||||
mod_add_long_switch_closebrace_comment = 0 # unsigned number
|
||||
mod_add_long_ifdef_endif_comment = 10 # unsigned number
|
||||
mod_add_long_ifdef_else_comment = 10 # unsigned number
|
||||
mod_sort_import = false # true/false
|
||||
mod_sort_using = false # true/false
|
||||
mod_sort_include = false # true/false
|
||||
mod_move_case_break = false # true/false
|
||||
mod_case_brace = remove # ignore/add/remove/force
|
||||
mod_remove_empty_return = true # true/false
|
||||
mod_enum_last_comma = ignore # ignore/add/remove/force
|
||||
mod_sort_oc_properties = false # true/false
|
||||
mod_sort_oc_property_class_weight = 0 # number
|
||||
mod_sort_oc_property_thread_safe_weight = 0 # number
|
||||
mod_sort_oc_property_readwrite_weight = 0 # number
|
||||
mod_sort_oc_property_reference_weight = 0 # number
|
||||
mod_sort_oc_property_getter_weight = 0 # number
|
||||
mod_sort_oc_property_setter_weight = 0 # number
|
||||
mod_sort_oc_property_nullability_weight = 0 # number
|
||||
pp_indent = force # ignore/add/remove/force
|
||||
pp_indent_at_level = true # true/false
|
||||
pp_indent_count = 4 # unsigned number
|
||||
pp_space = remove # ignore/add/remove/force
|
||||
pp_space_count = 0 # unsigned number
|
||||
pp_indent_region = 0 # number
|
||||
pp_region_indent_code = false # true/false
|
||||
pp_indent_if = 0 # number
|
||||
pp_if_indent_code = true # true/false
|
||||
pp_define_at_level = false # true/false
|
||||
pp_ignore_define_body = false # true/false
|
||||
pp_indent_case = true # true/false
|
||||
pp_indent_func_def = true # true/false
|
||||
pp_indent_extern = true # true/false
|
||||
pp_indent_brace = false # true/false
|
||||
include_category_0 = "" # string
|
||||
include_category_1 = "" # string
|
||||
include_category_2 = "" # string
|
||||
use_indent_func_call_param = true # true/false
|
||||
use_indent_continue_only_once = false # true/false
|
||||
indent_cpp_lambda_only_once = false # true/false
|
||||
use_options_overriding_for_qt_macros = true # true/false
|
||||
warn_level_tabs_found_in_verbatim_string_literals = 2 # unsigned number
|
||||
126
.github/workflows/auto-release.yml
vendored
126
.github/workflows/auto-release.yml
vendored
|
|
@ -1,126 +0,0 @@
|
|||
name: Kernel-Auto-Release
|
||||
|
||||
on:
|
||||
workflow_dispatch:
|
||||
inputs:
|
||||
commit_id:
|
||||
description: 'Commit ID'
|
||||
required: true
|
||||
default: 'HEAD'
|
||||
version_number:
|
||||
description: 'Version Number (Ex. 10.4.4)'
|
||||
required: true
|
||||
default: '10.4.4'
|
||||
main_br_version:
|
||||
description: "Version String for task.h on main branch (leave empty to leave as-is)."
|
||||
required: false
|
||||
default: ''
|
||||
|
||||
jobs:
|
||||
release-packager:
|
||||
name: Release Packager
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
# Install python 3
|
||||
- name: Tool Setup
|
||||
uses: actions/setup-python@v2
|
||||
with:
|
||||
architecture: x64
|
||||
env:
|
||||
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
|
||||
|
||||
# Currently FreeRTOS/.github/scripts houses the release script. Download it for upcoming usage
|
||||
- name: Checkout FreeRTOS Release Tools
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
repository: FreeRTOS/FreeRTOS
|
||||
path: tools
|
||||
|
||||
# Simpler git auth if we use checkout action and forward the repo to release script
|
||||
- name: Checkout FreeRTOS Kernel
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
path: local_kernel
|
||||
fetch-depth: 0
|
||||
|
||||
- name: Configure git identity
|
||||
env:
|
||||
ACTOR: ${{ github.actor }}
|
||||
run: |
|
||||
git config --global user.name "$ACTOR"
|
||||
git config --global user.email "$ACTOR"@users.noreply.github.com
|
||||
|
||||
- name: create a new branch that references commit id
|
||||
env:
|
||||
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
|
||||
COMMIT_ID: ${{ github.event.inputs.commit_id }}
|
||||
working-directory: ./local_kernel
|
||||
run: |
|
||||
git checkout -b "$VERSION_NUMBER" "$COMMIT_ID"
|
||||
echo "COMMIT_SHA_1=$(git rev-parse HEAD)" >> $GITHUB_ENV
|
||||
|
||||
- name: Update source files with version info
|
||||
env:
|
||||
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
|
||||
MAIN_BR_VERSION_NUMBER: ${{ github.event.inputs.main_br_version }}
|
||||
COMMIT_SHA_1: ${{ env.COMMIT_SHA_1 }}
|
||||
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
|
||||
run: |
|
||||
# Install deps and run
|
||||
pip install -r ./tools/.github/scripts/release-requirements.txt
|
||||
./tools/.github/scripts/update_src_version.py FreeRTOS --kernel-repo-path=local_kernel --kernel-commit="$COMMIT_SHA_1" --new-kernel-version="$VERSION_NUMBER" --new-kernel-main-br-version="$MAIN_BR_VERSION_NUMBER"
|
||||
exit $?
|
||||
|
||||
- name : Update version number in manifest.yml
|
||||
env:
|
||||
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
|
||||
working-directory: ./local_kernel
|
||||
run: |
|
||||
./.github/scripts/manifest_updater.py -v "$VERSION_NUMBER"
|
||||
exit $?
|
||||
|
||||
- name : Commit version number change in manifest.yml
|
||||
env:
|
||||
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
|
||||
working-directory: ./local_kernel
|
||||
run: |
|
||||
git add .
|
||||
git commit -m '[AUTO][RELEASE]: Update version number in manifest.yml'
|
||||
git push -u origin "$VERSION_NUMBER"
|
||||
|
||||
- name: Generate SBOM
|
||||
uses: FreeRTOS/CI-CD-Github-Actions/sbom-generator@main
|
||||
with:
|
||||
repo_path: ./local_kernel
|
||||
source_path: ./
|
||||
|
||||
- name: commit SBOM file
|
||||
env:
|
||||
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
|
||||
working-directory: ./local_kernel
|
||||
run: |
|
||||
git add .
|
||||
git commit -m '[AUTO][RELEASE]: Update SBOM'
|
||||
git push -u origin "$VERSION_NUMBER"
|
||||
echo "COMMIT_SHA_2=$(git rev-parse HEAD)" >> $GITHUB_ENV
|
||||
|
||||
- name: Release
|
||||
env:
|
||||
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
|
||||
MAIN_BR_VERSION_NUMBER: ${{ github.event.inputs.main_br_version }}
|
||||
COMMIT_SHA_2: ${{ env.COMMIT_SHA_2 }}
|
||||
REPO_OWNER: ${{ github.repository_owner }}
|
||||
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
|
||||
run: |
|
||||
# Install deps and run
|
||||
pip install -r ./tools/.github/scripts/release-requirements.txt
|
||||
./tools/.github/scripts/release.py "$REPO_OWNER" --kernel-repo-path=local_kernel --kernel-commit="$COMMIT_SHA_2" --new-kernel-version="$VERSION_NUMBER" --new-kernel-main-br-version="$MAIN_BR_VERSION_NUMBER"
|
||||
exit $?
|
||||
|
||||
- name: Cleanup
|
||||
env:
|
||||
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
|
||||
working-directory: ./local_kernel
|
||||
run: |
|
||||
# Delete the branch created for Tag by SBOM generator
|
||||
git push -u origin --delete "$VERSION_NUMBER"
|
||||
67
.github/workflows/ci.yml
vendored
67
.github/workflows/ci.yml
vendored
|
|
@ -3,49 +3,44 @@ on:
|
|||
push:
|
||||
branches: ["**"]
|
||||
pull_request:
|
||||
branches: [main]
|
||||
branches: [master]
|
||||
workflow_dispatch:
|
||||
jobs:
|
||||
formatting:
|
||||
runs-on: ubuntu-20.04
|
||||
steps:
|
||||
- uses: actions/checkout@v4.1.1
|
||||
- name: Check Formatting of FreeRTOS-Kernel Files
|
||||
uses: FreeRTOS/CI-CD-Github-Actions/formatting@main
|
||||
with:
|
||||
exclude-dirs: portable
|
||||
|
||||
spell-check:
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
- name: Clone This Repo
|
||||
uses: actions/checkout@v4.1.1
|
||||
- name: Run spellings check
|
||||
uses: FreeRTOS/CI-CD-Github-Actions/spellings@main
|
||||
- name: Checkout Parent Repo
|
||||
uses: actions/checkout@v2
|
||||
with:
|
||||
path: ./
|
||||
exclude-files: History.txt
|
||||
|
||||
link-verifier:
|
||||
ref: main
|
||||
repository: aws/aws-iot-device-sdk-embedded-C
|
||||
path: main
|
||||
- name: Clone This Repo
|
||||
uses: actions/checkout@v2
|
||||
with:
|
||||
path: ./kernel
|
||||
- name: Install spell
|
||||
run: |
|
||||
sudo apt-get install spell
|
||||
sudo apt-get install util-linux
|
||||
- name: Check spelling
|
||||
run: |
|
||||
PATH=$PATH:main/tools/spell
|
||||
# Make sure that the portable directory is not included in the spellcheck.
|
||||
sed -i 's/find $DIRNAME/find $DIRNAME -not -path '*portable*'/g' main/tools/spell/find-unknown-comment-words
|
||||
find-unknown-comment-words --directory kernel/ --lexicon ./kernel/.github/lexicon.txt
|
||||
if [ "$?" = "0" ]; then
|
||||
exit 0
|
||||
else
|
||||
exit 1
|
||||
fi
|
||||
url-check:
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
- name: Clone This Repo
|
||||
uses: actions/checkout@v4.1.1
|
||||
- name: Link Verification
|
||||
uses: FreeRTOS/CI-CD-Github-Actions/link-verifier@main
|
||||
uses: actions/checkout@v2
|
||||
with:
|
||||
allowlist-file: '.github/allowed_urls.txt'
|
||||
|
||||
verify-manifest:
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
- uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
submodules: true
|
||||
fetch-depth: 0
|
||||
|
||||
- name: Run manifest verifier
|
||||
uses: FreeRTOS/CI-CD-GitHub-Actions/manifest-verifier@main
|
||||
with:
|
||||
path: ./
|
||||
fail-on-incorrect-version: true
|
||||
path: ./kernel
|
||||
- name: URL Checker
|
||||
run: |
|
||||
bash kernel/.github/actions/url_verifier.sh kernel
|
||||
|
|
|
|||
127
.github/workflows/coverity_scan.yml
vendored
127
.github/workflows/coverity_scan.yml
vendored
|
|
@ -1,127 +0,0 @@
|
|||
name: Coverity Scan
|
||||
on:
|
||||
# Run on every commit to mainline
|
||||
push:
|
||||
branches: main
|
||||
# Allow manual running of the scan
|
||||
workflow_dispatch:
|
||||
|
||||
env:
|
||||
bashPass: \033[32;1mPASSED -
|
||||
bashInfo: \033[33;1mINFO -
|
||||
bashFail: \033[31;1mFAILED -
|
||||
bashEnd: \033[0m
|
||||
|
||||
jobs:
|
||||
Coverity-Scan:
|
||||
if: ( github.repository == 'FreeRTOS/FreeRTOS-Kernel' )
|
||||
name: Coverity Scan
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
- name: Checkout the Repository
|
||||
uses: actions/checkout@v4.1.1
|
||||
|
||||
- env:
|
||||
stepName: Install Build Essentials
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
sudo apt-get -y update
|
||||
sudo apt-get -y install build-essential
|
||||
|
||||
echo "::endgroup::"
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
- env:
|
||||
stepName: Install Coverity Build
|
||||
COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
wget -nv -qO- https://scan.coverity.com/download/linux64 --post-data "token=${COVERITY_TOKEN}&project=FreeRTOS-Kernel" | tar -zx --one-top-level=cov_scan --strip-components 1
|
||||
echo "cov_scan_path=$(pwd)/cov_scan/bin" >> $GITHUB_ENV
|
||||
|
||||
echo "::endgroup::"
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
|
||||
|
||||
- env:
|
||||
stepName: Coverity Build
|
||||
COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
|
||||
COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
export PATH="$PATH:${{env.cov_scan_path}}"
|
||||
cmake -S ./examples/cmake_example/ -B build
|
||||
cd build
|
||||
cov-build --dir cov-int make -j
|
||||
# Move the report out of the build directory
|
||||
tar czvf ../gcc_freertos_kernel_sample_build.tgz cov-int
|
||||
|
||||
echo "::endgroup::"
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
|
||||
|
||||
- env:
|
||||
stepName: Upload Coverity Report for Scan
|
||||
COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
|
||||
COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
COV_SCAN_UPLOAD_STATUS=$(curl --form token=${COVERITY_TOKEN} \
|
||||
--form email=${COVERITY_EMAIL} \
|
||||
--form file=@gcc_freertos_kernel_sample_build.tgz \
|
||||
--form version="Mainline" \
|
||||
--form description="FreeRTOS Kernel Commit Scan" \
|
||||
https://scan.coverity.com/builds?project=FreeRTOS-Kernel)
|
||||
|
||||
echo "::endgroup::"
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
|
||||
echo "${COV_SCAN_UPLOAD_STATUS}" | grep -q -e 'Build successfully submitted' || echo >&2 "Error submitting build for analysis: ${COV_SCAN_UPLOAD_STATUS}"
|
||||
|
||||
- env:
|
||||
stepName: Coverity Build for SMP FreeRTOS
|
||||
COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
|
||||
COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
export PATH="$PATH:${{env.cov_scan_path}}"
|
||||
cmake -S ./examples/cmake_example/ -B build -DFREERTOS_SMP_EXAMPLE=1
|
||||
cd build
|
||||
cov-build --dir cov-int make -j
|
||||
# Move the report out of the build directory
|
||||
tar czvf ../gcc_freertos_kernel_smp_sample_build.tgz cov-int
|
||||
|
||||
echo "::endgroup::"
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
|
||||
|
||||
- env:
|
||||
stepName: Upload FreeRTOS SMP Coverity Report for Scan
|
||||
COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
|
||||
COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
COV_SCAN_UPLOAD_STATUS=$(curl --form token=${COVERITY_TOKEN} \
|
||||
--form email=${COVERITY_EMAIL} \
|
||||
--form file=@gcc_freertos_kernel_smp_sample_build.tgz \
|
||||
--form version="Mainline" \
|
||||
--form description="FreeRTOS Kernel SMP Commit Scan" \
|
||||
https://scan.coverity.com/builds?project=FreeRTOS-Kernel)
|
||||
|
||||
echo "::endgroup::"
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
|
||||
echo "${COV_SCAN_UPLOAD_STATUS}" | grep -q -e 'Build successfully submitted' || echo >&2 "Error submitting build for analysis: ${COV_SCAN_UPLOAD_STATUS}"
|
||||
25
.github/workflows/formatting.yml
vendored
25
.github/workflows/formatting.yml
vendored
|
|
@ -1,25 +0,0 @@
|
|||
name: Format Pull Request Files
|
||||
|
||||
on:
|
||||
issue_comment:
|
||||
types: [created]
|
||||
|
||||
env:
|
||||
bashPass: \033[32;1mPASSED -
|
||||
bashInfo: \033[33;1mINFO -
|
||||
bashFail: \033[31;1mFAILED -
|
||||
bashEnd: \033[0m
|
||||
|
||||
jobs:
|
||||
Formatting:
|
||||
name: Run Formatting Check
|
||||
if: ${{ github.event.issue.pull_request &&
|
||||
( ( github.event.comment.body == '/bot run uncrustify' ) ||
|
||||
( github.event.comment.body == '/bot run formatting' ) ) }}
|
||||
runs-on: ubuntu-20.04
|
||||
steps:
|
||||
- name: Apply Formatting Fix
|
||||
id: check-formatting
|
||||
uses: FreeRTOS/CI-CD-Github-Actions/formatting-bot@main
|
||||
with:
|
||||
exclude-dirs: portable
|
||||
24
.github/workflows/git-secrets.yml
vendored
24
.github/workflows/git-secrets.yml
vendored
|
|
@ -1,24 +0,0 @@
|
|||
name: git-secrets Check
|
||||
on:
|
||||
push:
|
||||
pull_request:
|
||||
workflow_dispatch:
|
||||
jobs:
|
||||
git-secrets:
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
- uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
submodules: recursive
|
||||
- name: Checkout awslabs/git-secrets
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
repository: awslabs/git-secrets
|
||||
ref: master
|
||||
path: git-secrets
|
||||
- name: Install git-secrets
|
||||
run: cd git-secrets && sudo make install && cd ..
|
||||
- name: Run git-secrets
|
||||
run: |
|
||||
git-secrets --register-aws
|
||||
git-secrets --scan
|
||||
46
.github/workflows/header-checks.yml
vendored
Normal file
46
.github/workflows/header-checks.yml
vendored
Normal file
|
|
@ -0,0 +1,46 @@
|
|||
name: FreeRTOS-Header-Checker
|
||||
|
||||
on: [pull_request]
|
||||
|
||||
jobs:
|
||||
header-checker:
|
||||
name: File Header Checks
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
# Install python 3
|
||||
- name: Tool Setup
|
||||
uses: actions/setup-python@v2
|
||||
with:
|
||||
python-version: 3.8.5
|
||||
architecture: x64
|
||||
env:
|
||||
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
|
||||
|
||||
# Get latest checks from main
|
||||
- name: Checkout FreeRTOS Tools
|
||||
uses: actions/checkout@v2
|
||||
with:
|
||||
repository: FreeRTOS/FreeRTOS
|
||||
ref: main
|
||||
path: tools
|
||||
|
||||
# Checkout user pull request changes
|
||||
- name: Checkout Pull Request
|
||||
uses: actions/checkout@v2
|
||||
with:
|
||||
ref: ${{ github.event.pull_request.head.sha }}
|
||||
path: inspect
|
||||
|
||||
# Collect all affected files
|
||||
- name: Collecting changed files
|
||||
uses: lots0logs/gh-action-get-changed-files@2.1.4
|
||||
with:
|
||||
token: ${{ secrets.GITHUB_TOKEN }}
|
||||
|
||||
# Run checks
|
||||
- name: Check File Headers
|
||||
run: |
|
||||
cd inspect
|
||||
../tools/.github/scripts/check-header.py --kernel --json ${HOME}/files.json
|
||||
exit $?
|
||||
|
||||
69
.github/workflows/kernel-checks.yml
vendored
69
.github/workflows/kernel-checks.yml
vendored
|
|
@ -1,69 +0,0 @@
|
|||
name: Kernel-Checker
|
||||
|
||||
on: [push, pull_request]
|
||||
|
||||
jobs:
|
||||
kernel-checker:
|
||||
name: FreeRTOS Kernel Header Checks
|
||||
runs-on: ubuntu-20.04
|
||||
steps:
|
||||
# Install python 3
|
||||
- name: Tool Setup
|
||||
uses: actions/setup-python@v3
|
||||
env:
|
||||
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
|
||||
|
||||
# There is shared code, hosted by FreeRTOS/FreeRTOS, with deps needed by header checker
|
||||
- name: Checkout FreeRTOS Tools
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
repository: FreeRTOS/FreeRTOS
|
||||
sparse-checkout: '.github'
|
||||
ref: main
|
||||
path: tools
|
||||
|
||||
# Checkout user pull request changes
|
||||
- name: Checkout Pull Request
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
path: inspect
|
||||
|
||||
# Collect all affected files
|
||||
- name: Collecting changed files
|
||||
uses: lots0logs/gh-action-get-changed-files@2.2.2
|
||||
with:
|
||||
token: ${{ secrets.GITHUB_TOKEN }}
|
||||
|
||||
# Run checks
|
||||
- env:
|
||||
bashPass: \033[32;1mPASSED -
|
||||
bashInfo: \033[33;1mINFO -
|
||||
bashFail: \033[31;1mFAILED -
|
||||
bashEnd: \033[0m
|
||||
stepName: Check File Headers
|
||||
name: ${{ env.stepName }}
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} Install Dependencies ${{ env.bashEnd }}"
|
||||
|
||||
# Copy the common tools from the FreeRTOS/FreeRTOS repo.
|
||||
mv tools/.github/scripts/common inspect/.github/scripts
|
||||
|
||||
# Install the necessary python dependencies
|
||||
pip install -r inspect/.github/scripts/common/requirements.txt
|
||||
cd inspect
|
||||
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
# Use the python script to check the copyright header of modified files.
|
||||
.github/scripts/kernel_checker.py --json ${HOME}/files_modified.json ${HOME}/files_added.json ${HOME}/files_renamed.json
|
||||
exitStatus=$?
|
||||
echo -e "::endgroup::"
|
||||
|
||||
if [ $exitStatus -eq 0 ]; then
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
else
|
||||
echo -e "${{ env.bashFail }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
fi
|
||||
exit $exitStatus
|
||||
327
.github/workflows/kernel-demos.yml
vendored
327
.github/workflows/kernel-demos.yml
vendored
|
|
@ -1,327 +0,0 @@
|
|||
name: FreeRTOS-Kernel Demos
|
||||
on: [push, pull_request]
|
||||
|
||||
env:
|
||||
# The bash escape character is \033
|
||||
bashPass: \033[32;1mPASSED -
|
||||
bashInfo: \033[33;1mINFO -
|
||||
bashFail: \033[31;1mFAILED -
|
||||
bashEnd: \033[0m
|
||||
|
||||
jobs:
|
||||
WIN32-MSVC:
|
||||
name: WIN32 MSVC
|
||||
runs-on: windows-latest
|
||||
steps:
|
||||
- name: Checkout the FreeRTOS/FreeRTOS Repository
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
ref: main
|
||||
repository: FreeRTOS/FreeRTOS
|
||||
submodules: 'recursive'
|
||||
fetch-depth: 1
|
||||
|
||||
# Checkout user pull request changes
|
||||
- name: Checkout Pull Request
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
path: ./FreeRTOS/Source
|
||||
|
||||
- name: Add msbuild to PATH
|
||||
uses: microsoft/setup-msbuild@v1.1
|
||||
|
||||
- name: Build WIN32-MSVC Demo
|
||||
working-directory: FreeRTOS/Demo/WIN32-MSVC
|
||||
run: msbuild WIN32.sln -t:rebuild
|
||||
|
||||
- name: Build WIN32-MSVC-Static-Allocation-Only Demo
|
||||
working-directory: FreeRTOS/Demo/WIN32-MSVC-Static-Allocation-Only
|
||||
run: msbuild WIN32.sln -t:rebuild
|
||||
|
||||
WIN32-MingW:
|
||||
name: WIN32 MingW
|
||||
runs-on: windows-latest
|
||||
steps:
|
||||
- name: Checkout the FreeRTOS/FreeRTOS Repository
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
ref: main
|
||||
repository: FreeRTOS/FreeRTOS
|
||||
submodules: 'recursive'
|
||||
fetch-depth: 1
|
||||
|
||||
# Checkout user pull request changes
|
||||
- name: Checkout Pull Request
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
path: ./FreeRTOS/Source
|
||||
|
||||
- name: Build WIN32-MingW Demo
|
||||
working-directory: FreeRTOS/Demo/WIN32-MingW
|
||||
run: |
|
||||
gcc --version
|
||||
make --version
|
||||
make
|
||||
|
||||
POSIX-GCC:
|
||||
name: Native GCC
|
||||
strategy:
|
||||
fail-fast: false
|
||||
matrix:
|
||||
os:
|
||||
- macos-latest
|
||||
- ubuntu-latest
|
||||
runs-on: ${{ matrix.os }}
|
||||
steps:
|
||||
- name: Checkout the FreeRTOS/FreeRTOS Repository
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
ref: main
|
||||
repository: FreeRTOS/FreeRTOS
|
||||
submodules: 'recursive'
|
||||
fetch-depth: 1
|
||||
|
||||
# Checkout user pull request changes
|
||||
- name: Checkout Pull Request
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
path: ./FreeRTOS/Source
|
||||
|
||||
- name: Install GCC
|
||||
shell: bash
|
||||
if: matrix.os == 'ubuntu-latest'
|
||||
run: |
|
||||
sudo apt-get -y update
|
||||
sudo apt-get -y install build-essential
|
||||
|
||||
- name: Build Posix_GCC Demo
|
||||
shell: bash
|
||||
working-directory: FreeRTOS/Demo/Posix_GCC
|
||||
run: make -j
|
||||
|
||||
- name: Build Posix_GCC Demo for Coverage Test
|
||||
shell: bash
|
||||
working-directory: FreeRTOS/Demo/Posix_GCC
|
||||
run: make -j COVERAGE_TEST=1
|
||||
|
||||
CMake-Example:
|
||||
name: CMake Example with Native GCC
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
# Checkout user pull request changes
|
||||
- name: Checkout Repository
|
||||
uses: actions/checkout@v4.1.1
|
||||
|
||||
- name: Install GCC
|
||||
shell: bash
|
||||
run: |
|
||||
sudo apt-get -y update
|
||||
sudo apt-get -y install build-essential
|
||||
|
||||
- name: Build CMake Example Demo
|
||||
shell: bash
|
||||
working-directory: examples/cmake_example
|
||||
run: |
|
||||
cmake -S . -B build
|
||||
cmake --build build
|
||||
|
||||
- name: Build CMake SMP Example Demo
|
||||
shell: bash
|
||||
working-directory: examples/cmake_example
|
||||
run: |
|
||||
cmake -S . -B build -DFREERTOS_SMP_EXAMPLE=1
|
||||
cmake --build build
|
||||
|
||||
MSP430-GCC:
|
||||
name: GNU MSP430 Toolchain
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
- name: Checkout the FreeRTOS/FreeRTOS Repository
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
ref: main
|
||||
repository: FreeRTOS/FreeRTOS
|
||||
submodules: 'recursive'
|
||||
fetch-depth: 1
|
||||
|
||||
# Checkout user pull request changes
|
||||
- name: Checkout Pull Request
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
path: ./FreeRTOS/Source
|
||||
|
||||
- env:
|
||||
stepName: Install MSP430 Toolchain
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
curl -L -O https://dr-download.ti.com/software-development/ide-configuration-compiler-or-debugger/MD-LlCjWuAbzH/9.3.1.2/msp430-gcc-full-linux-x64-installer-9.3.1.2.7z
|
||||
sudo apt update -y
|
||||
sudo apt install -y p7zip-full
|
||||
7z x ./msp430-gcc-full-linux-x64-installer-9.3.1.2.7z
|
||||
chmod +x ./msp430-gcc-full-linux-x64-installer-9.3.1.2.run
|
||||
sudo ./msp430-gcc-full-linux-x64-installer-9.3.1.2.run --prefix /usr/bin/msp430-gcc --mode unattended
|
||||
echo "::endgroup::"
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
- name: Build msp430_GCC Demo
|
||||
shell: bash
|
||||
working-directory: FreeRTOS/Demo/msp430_GCC
|
||||
run: make -j CC=/usr/bin/msp430-gcc/bin/msp430-elf-gcc OPT="-Os -I/usr/bin/msp430-gcc/include -L/usr/bin/msp430-gcc/include"
|
||||
|
||||
MicroBlaze-GCC:
|
||||
name: GCC MicroBlaze Toolchain
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
- name: Checkout the FreeRTOS/FreeRTOS Repository
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
ref: main
|
||||
repository: FreeRTOS/FreeRTOS
|
||||
fetch-depth: 1
|
||||
|
||||
- env:
|
||||
stepName: Fetch Community-Supported-Demos Submodule
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos
|
||||
# This repository contains the microblaze_instructions.h header file
|
||||
git clone https://github.com/Xilinx/embeddedsw.git --branch xilinx_v2023.1
|
||||
echo "::endgroup::"
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
# Checkout user pull request changes
|
||||
- name: Checkout Pull Request
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
path: ./FreeRTOS/Source
|
||||
|
||||
- env:
|
||||
stepName: Install Dependancies
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
sudo apt update -y
|
||||
sudo apt upgrade -y
|
||||
sudo apt install -y build-essential m4 debhelper bison texinfo dejagnu flex
|
||||
sudo apt install -y autogen gawk libgmp-dev libmpc-dev libmpfr-dev
|
||||
sudo apt install -y patchutils sharutils zlib1g-dev autoconf2.64
|
||||
|
||||
# Download the mb-gcc toolchain from github
|
||||
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/binutils-microblaze_2.35-2021-0623+1_amd64.deb;
|
||||
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/gcc-microblaze_10.2.0-2021-0623+2_amd64.deb;
|
||||
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/libnewlib-microblaze-dev_3.3.0-2021-0623+3_all.deb;
|
||||
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/libnewlib-microblaze-doc_3.3.0-2021-0623+3_all.deb;
|
||||
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/libnewlib-microblaze_3.3.0-2021-0623+3_all.deb;
|
||||
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/newlib-source_3.3.0-2021-0623+3_all.deb;
|
||||
|
||||
# Install the packages for the toolchain
|
||||
sudo apt install -y ./binutils-microblaze*.deb;
|
||||
sudo apt install -y ./gcc-microblaze*.deb;
|
||||
sudo apt install -y ./libnewlib-microblaze-dev*.deb;
|
||||
sudo apt install -y ./libnewlib-microblaze-doc*.deb;
|
||||
sudo apt install -y ./libnewlib-microblaze*.deb;
|
||||
sudo apt install -y ./newlib-source*.deb;
|
||||
|
||||
# Validate that the toolchain is in the path and can be called
|
||||
which mb-gcc
|
||||
mb-gcc --version
|
||||
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
- env:
|
||||
stepName: Compile Microblaze Port
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
# Compile MicroBlazeV9 Port files to validate they build
|
||||
mb-gcc -mcpu=v9.5 -c \
|
||||
FreeRTOS/Source/portable/GCC/MicroBlazeV9/port.c \
|
||||
FreeRTOS/Source/portable/GCC/MicroBlazeV9/portasm.S \
|
||||
FreeRTOS/Source/portable/GCC/MicroBlazeV9/port_exceptions.c \
|
||||
FreeRTOS/Source/tasks.c \
|
||||
FreeRTOS/Source/list.c \
|
||||
-I embeddedsw/lib/bsp/standalone/src/microblaze \
|
||||
-I FreeRTOS/Source/portable/GCC/MicroBlazeV9/ \
|
||||
-I FreeRTOS/Source/include \
|
||||
-I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src \
|
||||
-I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/standalone_v5_4/src \
|
||||
-I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/include \
|
||||
-I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/intc_v3_5/src
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
|
||||
ARM-GCC:
|
||||
name: GNU ARM Toolchain
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
- name: Checkout the FreeRTOS/FreeRTOS Repository
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
ref: main
|
||||
repository: FreeRTOS/FreeRTOS
|
||||
fetch-depth: 1
|
||||
|
||||
- env:
|
||||
stepName: Fetch Dependencies
|
||||
shell: bash
|
||||
run: |
|
||||
# ${{ env.stepName }}
|
||||
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos FreeRTOS-Plus/Source/FreeRTOS-Plus-Trace
|
||||
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
|
||||
|
||||
# Checkout user pull request changes
|
||||
- name: Checkout Pull Request
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
path: ./FreeRTOS/Source
|
||||
|
||||
- name: Install GNU ARM Toolchain
|
||||
shell: bash
|
||||
run: |
|
||||
sudo apt-get -y update
|
||||
sudo apt-get -y install gcc-arm-none-eabi build-essential cmake git ninja-build python3-minimal
|
||||
|
||||
- name: Build CORTEX_MPU_M3_MPS2_QEMU_GCC Demo
|
||||
shell: bash
|
||||
working-directory: FreeRTOS/Demo/CORTEX_MPU_M3_MPS2_QEMU_GCC
|
||||
run: make -j
|
||||
|
||||
- name: Build CORTEX_MPU_R4F_TI_RM46_HERCULES_GCC Demo
|
||||
shell: bash
|
||||
working-directory: FreeRTOS/Demo/CORTEX_MPU_R4F_TI_RM46_HERCULES_GCC
|
||||
run: cmake -S . -B build && make -j -C build all
|
||||
|
||||
- name: Build CORTEX_MPU_R5F_TI_RM57_HERCULES_GCC Demo
|
||||
shell: bash
|
||||
working-directory: FreeRTOS/Demo/CORTEX_MPU_R5F_TI_RM57_HERCULES_GCC
|
||||
run: cmake -S . -B build && make -j -C build all
|
||||
|
||||
- name: Build CORTEX_LM3S102_GCC Demo
|
||||
shell: bash
|
||||
working-directory: FreeRTOS/Demo/CORTEX_LM3S102_GCC
|
||||
run: make -j
|
||||
|
||||
- name: Build CORTEX_LM3S811_GCC Demo
|
||||
shell: bash
|
||||
working-directory: FreeRTOS/Demo/CORTEX_LM3S811_GCC
|
||||
run: make -j
|
||||
|
||||
- name: Build CORTEX_M0+_RP2040 Demos
|
||||
shell: bash
|
||||
working-directory: FreeRTOS/Demo/ThirdParty/Community-Supported-Demos/CORTEX_M0+_RP2040
|
||||
run: |
|
||||
git clone https://github.com/raspberrypi/pico-sdk.git
|
||||
cmake -B build -DPICO_SDK_PATH=pico-sdk -GNinja
|
||||
ninja -C build --verbose
|
||||
|
||||
- name: Build CORTEX_MPS2_QEMU_IAR_GCC Demo
|
||||
shell: bash
|
||||
working-directory: FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC
|
||||
run: make -C build/gcc -j
|
||||
56
.github/workflows/unit-tests.yml
vendored
56
.github/workflows/unit-tests.yml
vendored
|
|
@ -1,56 +0,0 @@
|
|||
name: CMock Unit Tests
|
||||
on: [push, pull_request]
|
||||
|
||||
jobs:
|
||||
run:
|
||||
runs-on: ubuntu-20.04
|
||||
steps:
|
||||
- name: Checkout Parent Repository
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
ref: main
|
||||
repository: FreeRTOS/FreeRTOS
|
||||
submodules: 'recursive'
|
||||
fetch-depth: 1
|
||||
|
||||
# Checkout user pull request changes
|
||||
- name: Checkout Pull Request
|
||||
uses: actions/checkout@v4.1.1
|
||||
with:
|
||||
path: ./FreeRTOS/Source
|
||||
|
||||
- name: Setup Python
|
||||
uses: actions/setup-python@master
|
||||
with:
|
||||
python-version: 3.8
|
||||
|
||||
- name: Install packages
|
||||
run: |
|
||||
sudo apt-get install lcov cflow ruby doxygen build-essential unifdef
|
||||
- name: Run Unit Tests with ENABLE_SANITIZER=1
|
||||
run: |
|
||||
make -C FreeRTOS/Test/CMock clean
|
||||
make -C FreeRTOS/Test/CMock ENABLE_SANITIZER=1 run_col_formatted
|
||||
- name: Run Unit Tests for coverage
|
||||
run: |
|
||||
make -C FreeRTOS/Test/CMock clean
|
||||
make -C FreeRTOS/Test/CMock lcovhtml
|
||||
lcov --config-file FreeRTOS/Test/CMock/lcovrc --summary FreeRTOS/Test/CMock/build/cmock_test.info > FreeRTOS/Test/CMock/build/cmock_test_summary.txt
|
||||
- name: Upload coverage to Codecov
|
||||
uses: codecov/codecov-action@v3.1.0
|
||||
with:
|
||||
files: ${{ github.workspace }}/FreeRTOS/Test/CMock/build/cmock_test.info
|
||||
root_dir: ${{ github.workspace }}/FreeRTOS/Source
|
||||
flags: unittests
|
||||
fail_ci_if_error: false
|
||||
verbose: false
|
||||
- name: Archive code coverage data
|
||||
uses: actions/upload-artifact@v4
|
||||
with:
|
||||
name: coverage-data
|
||||
path: FreeRTOS/Test/CMock/build/cmock_test*
|
||||
- name: Archive code coverage html report
|
||||
uses: actions/upload-artifact@v4
|
||||
with:
|
||||
name: coverage-report
|
||||
path: FreeRTOS/Test/CMock/build/coverage
|
||||
6
.gitmodules
vendored
6
.gitmodules
vendored
|
|
@ -1,6 +0,0 @@
|
|||
[submodule "ThirdParty/FreeRTOS-Kernel-Partner-Supported-Ports"]
|
||||
path = portable/ThirdParty/Partner-Supported-Ports
|
||||
url = https://github.com/FreeRTOS/FreeRTOS-Kernel-Partner-Supported-Ports
|
||||
[submodule "ThirdParty/FreeRTOS-Kernel-Community-Supported-Ports"]
|
||||
path = portable/ThirdParty/Community-Supported-Ports
|
||||
url = https://github.com/FreeRTOS/FreeRTOS-Kernel-Community-Supported-Ports
|
||||
272
CMakeLists.txt
272
CMakeLists.txt
|
|
@ -1,272 +0,0 @@
|
|||
cmake_minimum_required(VERSION 3.15)
|
||||
|
||||
# User is responsible to one mandatory option:
|
||||
# FREERTOS_PORT, if not specified and native port detected, uses the native compile.
|
||||
#
|
||||
# User is responsible for one library target:
|
||||
# freertos_config ,typically an INTERFACE library
|
||||
#
|
||||
# DEPRECATED: FREERTOS_CONFIG_FILE_DIRECTORY - but still supported if no freertos_config defined for now.
|
||||
# May be removed at some point in the future.
|
||||
#
|
||||
# User can choose which heap implementation to use (either the implementations
|
||||
# included with FreeRTOS [1..5] or a custom implementation) by providing the
|
||||
# option FREERTOS_HEAP. When dynamic allocation is used, the user must specify a
|
||||
# heap implementation. If the option is not set, the cmake will use no heap
|
||||
# implementation (e.g. when only static allocation is used).
|
||||
|
||||
# `freertos_config` target defines the path to FreeRTOSConfig.h and optionally other freertos based config files
|
||||
if(NOT TARGET freertos_config )
|
||||
if (NOT DEFINED FREERTOS_CONFIG_FILE_DIRECTORY )
|
||||
|
||||
message(FATAL_ERROR " freertos_config target not specified. Please specify a cmake target that defines the include directory for FreeRTOSConfig.h:\n"
|
||||
" add_library(freertos_config INTERFACE)\n"
|
||||
" target_include_directories(freertos_config SYSTEM\n"
|
||||
" INTERFACE\n"
|
||||
" include) # The config file directory\n"
|
||||
" target_compile_definitions(freertos_config\n"
|
||||
" PUBLIC\n"
|
||||
" projCOVERAGE_TEST=0)\n")
|
||||
else()
|
||||
message(WARNING " Using deprecated 'FREERTOS_CONFIG_FILE_DIRECTORY' - please update your project CMakeLists.txt file:\n"
|
||||
" add_library(freertos_config INTERFACE)\n"
|
||||
" target_include_directories(freertos_config SYSTEM\n"
|
||||
" INTERFACE\n"
|
||||
" include) # The config file directory\n"
|
||||
" target_compile_definitions(freertos_config\n"
|
||||
" PUBLIC\n"
|
||||
" projCOVERAGE_TEST=0)\n")
|
||||
endif()
|
||||
endif()
|
||||
|
||||
# FreeRTOS port option
|
||||
if(NOT FREERTOS_PORT)
|
||||
message(WARNING " FREERTOS_PORT is not set. Please specify it from top-level CMake file (example):\n"
|
||||
" set(FREERTOS_PORT GCC_ARM_CM4F CACHE STRING \"\")\n"
|
||||
" or from CMake command line option:\n"
|
||||
" -DFREERTOS_PORT=GCC_ARM_CM4F\n"
|
||||
" \n"
|
||||
" Available port options:\n"
|
||||
" A_CUSTOM_PORT - Compiler: User Defined Target: User Defined\n"
|
||||
" BCC_16BIT_DOS_FLSH186 - Compiler: BCC Target: 16 bit DOS Flsh186\n"
|
||||
" BCC_16BIT_DOS_PC - Compiler: BCC Target: 16 bit DOS PC\n"
|
||||
" CCS_ARM_CM3 - Compiler: CCS Target: ARM Cortex-M3\n"
|
||||
" CCS_ARM_CM4F - Compiler: CCS Target: ARM Cortex-M4 with FPU\n"
|
||||
" CCS_ARM_CR4 - Compiler: CCS Target: ARM Cortex-R4\n"
|
||||
" CCS_MSP430X - Compiler: CCS Target: MSP430X\n"
|
||||
" CODEWARRIOR_COLDFIRE_V1 - Compiler: CoreWarrior Target: ColdFire V1\n"
|
||||
" CODEWARRIOR_COLDFIRE_V2 - Compiler: CoreWarrior Target: ColdFire V2\n"
|
||||
" CODEWARRIOR_HCS12 - Compiler: CoreWarrior Target: HCS12\n"
|
||||
" GCC_ARM_CA9 - Compiler: GCC Target: ARM Cortex-A9\n"
|
||||
" GCC_ARM_AARCH64 - Compiler: GCC Target: ARM v8-A\n"
|
||||
" GCC_ARM_AARCH64_SRE - Compiler: GCC Target: ARM v8-A SRE\n"
|
||||
" GCC_ARM_CM0 - Compiler: GCC Target: ARM Cortex-M0\n"
|
||||
" GCC_ARM_CM3 - Compiler: GCC Target: ARM Cortex-M3\n"
|
||||
" GCC_ARM_CM3_MPU - Compiler: GCC Target: ARM Cortex-M3 with MPU\n"
|
||||
" GCC_ARM_CM4_MPU - Compiler: GCC Target: ARM Cortex-M4 with MPU\n"
|
||||
" GCC_ARM_CM4F - Compiler: GCC Target: ARM Cortex-M4 with FPU\n"
|
||||
" GCC_ARM_CM7 - Compiler: GCC Target: ARM Cortex-M7\n"
|
||||
" GCC_ARM_CM23_NONSECURE - Compiler: GCC Target: ARM Cortex-M23 non-secure\n"
|
||||
" GCC_ARM_CM23_SECURE - Compiler: GCC Target: ARM Cortex-M23 secure\n"
|
||||
" GCC_ARM_CM23_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M23 non-trustzone non-secure\n"
|
||||
" GCC_ARM_CM33_NONSECURE - Compiler: GCC Target: ARM Cortex-M33 non-secure\n"
|
||||
" GCC_ARM_CM33_SECURE - Compiler: GCC Target: ARM Cortex-M33 secure\n"
|
||||
" GCC_ARM_CM33_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M33 non-trustzone non-secure\n"
|
||||
" GCC_ARM_CM33_TFM - Compiler: GCC Target: ARM Cortex-M33 non-secure for TF-M\n"
|
||||
" GCC_ARM_CM35P_NONSECURE - Compiler: GCC Target: ARM Cortex-M35P non-secure\n"
|
||||
" GCC_ARM_CM35P_SECURE - Compiler: GCC Target: ARM Cortex-M35P secure\n"
|
||||
" GCC_ARM_CM35P_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M35P non-trustzone non-secure\n"
|
||||
" GCC_ARM_CM55_NONSECURE - Compiler: GCC Target: ARM Cortex-M55 non-secure\n"
|
||||
" GCC_ARM_CM55_SECURE - Compiler: GCC Target: ARM Cortex-M55 secure\n"
|
||||
" GCC_ARM_CM55_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M55 non-trustzone non-secure\n"
|
||||
" GCC_ARM_CM55_TFM - Compiler: GCC Target: ARM Cortex-M55 non-secure for TF-M\n"
|
||||
" GCC_ARM_CM85_NONSECURE - Compiler: GCC Target: ARM Cortex-M85 non-secure\n"
|
||||
" GCC_ARM_CM85_SECURE - Compiler: GCC Target: ARM Cortex-M85 secure\n"
|
||||
" GCC_ARM_CM85_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M85 non-trustzone non-secure\n"
|
||||
" GCC_ARM_CM85_TFM - Compiler: GCC Target: ARM Cortex-M85 non-secure for TF-M\n"
|
||||
" GCC_ARM_CR5 - Compiler: GCC Target: ARM Cortex-R5\n"
|
||||
" GCC_ARM_CRX_MPU - Compiler: GCC Target: ARM Cortex-Rx with MPU\n"
|
||||
" GCC_ARM_CRX_NOGIC - Compiler: GCC Target: ARM Cortex-Rx no GIC\n"
|
||||
" GCC_ARM7_AT91FR40008 - Compiler: GCC Target: ARM7 Atmel AT91R40008\n"
|
||||
" GCC_ARM7_AT91SAM7S - Compiler: GCC Target: ARM7 Atmel AT91SAM7S\n"
|
||||
" GCC_ARM7_LPC2000 - Compiler: GCC Target: ARM7 LPC2000\n"
|
||||
" GCC_ARM7_LPC23XX - Compiler: GCC Target: ARM7 LPC23xx\n"
|
||||
" GCC_ATMEGA323 - Compiler: GCC Target: ATMega323\n"
|
||||
" GCC_AVR32_UC3 - Compiler: GCC Target: AVR32 UC3\n"
|
||||
" GCC_COLDFIRE_V2 - Compiler: GCC Target: ColdFire V2\n"
|
||||
" GCC_CORTUS_APS3 - Compiler: GCC Target: CORTUS APS3\n"
|
||||
" GCC_H8S2329 - Compiler: GCC Target: H8S2329\n"
|
||||
" GCC_HCS12 - Compiler: GCC Target: HCS12\n"
|
||||
" GCC_IA32_FLAT - Compiler: GCC Target: IA32 flat\n"
|
||||
" GCC_MICROBLAZE - Compiler: GCC Target: MicroBlaze\n"
|
||||
" GCC_MICROBLAZE_V8 - Compiler: GCC Target: MicroBlaze V8\n"
|
||||
" GCC_MICROBLAZE_V9 - Compiler: GCC Target: MicroBlaze V9\n"
|
||||
" GCC_MSP430F449 - Compiler: GCC Target: MSP430F449\n"
|
||||
" GCC_NIOSII - Compiler: GCC Target: NiosII\n"
|
||||
" GCC_PPC405_XILINX - Compiler: GCC Target: Xilinx PPC405\n"
|
||||
" GCC_PPC440_XILINX - Compiler: GCC Target: Xilinx PPC440\n"
|
||||
" GCC_RISC_V - Compiler: GCC Target: RISC-V\n"
|
||||
" GCC_RISC_V_PULPINO_VEGA_RV32M1RM - Compiler: GCC Target: RISC-V Pulpino Vega RV32M1RM\n"
|
||||
" GCC_RISC_V_GENERIC - Compiler: GCC Target: RISC-V with FREERTOS_RISCV_EXTENSION\n"
|
||||
" GCC_RL78 - Compiler: GCC Target: Renesas RL78\n"
|
||||
" GCC_RX100 - Compiler: GCC Target: Renesas RX100\n"
|
||||
" GCC_RX200 - Compiler: GCC Target: Renesas RX200\n"
|
||||
" GCC_RX600 - Compiler: GCC Target: Renesas RX600\n"
|
||||
" GCC_RX600_V2 - Compiler: GCC Target: Renesas RX600 v2\n"
|
||||
" GCC_RX700_V3_DPFPU - Compiler: GCC Target: Renesas RX700 v3 with DPFPU\n"
|
||||
" GCC_STR75X - Compiler: GCC Target: STR75x\n"
|
||||
" GCC_TRICORE_1782 - Compiler: GCC Target: TriCore 1782\n"
|
||||
" GCC_ARC_EM_HS - Compiler: GCC Target: DesignWare ARC EM HS\n"
|
||||
" GCC_ARC_V1 - Compiler: GCC Target: DesignWare ARC v1\n"
|
||||
" GCC_ATMEGA - Compiler: GCC Target: ATmega\n"
|
||||
" GCC_POSIX - Compiler: GCC Target: Posix\n"
|
||||
" GCC_RP2040 - Compiler: GCC Target: RP2040 ARM Cortex-M0+\n"
|
||||
" GCC_XTENSA_ESP32 - Compiler: GCC Target: Xtensa ESP32\n"
|
||||
" GCC_AVRDX - Compiler: GCC Target: AVRDx\n"
|
||||
" GCC_AVR_MEGA0 - Compiler: GCC Target: AVR Mega0\n"
|
||||
" IAR_78K0K - Compiler: IAR Target: Renesas 78K0K\n"
|
||||
" IAR_ARM_CA5_NOGIC - Compiler: IAR Target: ARM Cortex-A5 no GIC\n"
|
||||
" IAR_ARM_CA9 - Compiler: IAR Target: ARM Cortex-A9\n"
|
||||
" IAR_ARM_CM0 - Compiler: IAR Target: ARM Cortex-M0\n"
|
||||
" IAR_ARM_CM3 - Compiler: IAR Target: ARM Cortex-M3\n"
|
||||
" IAR_ARM_CM4F - Compiler: IAR Target: ARM Cortex-M4 with FPU\n"
|
||||
" IAR_ARM_CM4F_MPU - Compiler: IAR Target: ARM Cortex-M4 with FPU and MPU\n"
|
||||
" IAR_ARM_CM7 - Compiler: IAR Target: ARM Cortex-M7\n"
|
||||
" IAR_ARM_CM23_NONSECURE - Compiler: IAR Target: ARM Cortex-M23 non-secure\n"
|
||||
" IAR_ARM_CM23_SECURE - Compiler: IAR Target: ARM Cortex-M23 secure\n"
|
||||
" IAR_ARM_CM23_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M23 non-trustzone non-secure\n"
|
||||
" IAR_ARM_CM33_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-secure\n"
|
||||
" IAR_ARM_CM33_SECURE - Compiler: IAR Target: ARM Cortex-M33 secure\n"
|
||||
" IAR_ARM_CM33_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-trustzone non-secure\n"
|
||||
" IAR_ARM_CM33_TFM - Compiler: IAR Target: ARM Cortex-M33 non-secure for TF-M\n"
|
||||
" IAR_ARM_CM35P_NONSECURE - Compiler: IAR Target: ARM Cortex-M35P non-secure\n"
|
||||
" IAR_ARM_CM35P_SECURE - Compiler: IAR Target: ARM Cortex-M35P secure\n"
|
||||
" IAR_ARM_CM35P_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M35P non-trustzone non-secure\n"
|
||||
" IAR_ARM_CM55_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-secure\n"
|
||||
" IAR_ARM_CM55_SECURE - Compiler: IAR Target: ARM Cortex-M55 secure\n"
|
||||
" IAR_ARM_CM55_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-trustzone non-secure\n"
|
||||
" IAR_ARM_CM55_TFM - Compiler: IAR Target: ARM Cortex-M55 non-secure for TF-M\n"
|
||||
" IAR_ARM_CM85_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-secure\n"
|
||||
" IAR_ARM_CM85_SECURE - Compiler: IAR Target: ARM Cortex-M85 secure\n"
|
||||
" IAR_ARM_CM85_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-trustzone non-secure\n"
|
||||
" IAR_ARM_CM85_TFM - Compiler: IAR Target: ARM Cortex-M85 non-secure for TF-M\n"
|
||||
" IAR_ARM_CRX_NOGIC - Compiler: IAR Target: ARM Cortex-Rx no GIC\n"
|
||||
" IAR_ATMEGA323 - Compiler: IAR Target: ATMega323\n"
|
||||
" IAR_ATMEL_SAM7S64 - Compiler: IAR Target: Atmel SAM7S64\n"
|
||||
" IAR_ATMEL_SAM9XE - Compiler: IAR Target: Atmel SAM9XE\n"
|
||||
" IAR_AVR_AVRDX - Compiler: IAR Target: AVRDx\n"
|
||||
" IAR_AVR_MEGA0 - Compiler: IAR Target: AVR Mega0\n"
|
||||
" IAR_AVR32_UC3 - Compiler: IAR Target: AVR32 UC3\n"
|
||||
" IAR_LPC2000 - Compiler: IAR Target: LPC2000\n"
|
||||
" IAR_MSP430 - Compiler: IAR Target: MSP430\n"
|
||||
" IAR_MSP430X - Compiler: IAR Target: MSP430X\n"
|
||||
" IAR_RISC_V - Compiler: IAR Target: RISC-V\n"
|
||||
" IAR_RISC_V_GENERIC - Compiler: IAR Target: RISC-V with FREERTOS_RISCV_EXTENSION\n"
|
||||
" IAR_RL78 - Compiler: IAR Target: Renesas RL78\n"
|
||||
" IAR_RX100 - Compiler: IAR Target: Renesas RX100\n"
|
||||
" IAR_RX600 - Compiler: IAR Target: Renesas RX600\n"
|
||||
" IAR_RX700_V3_DPFPU - Compiler: IAR Target: Renesas RX700 v3 with DPFPU\n"
|
||||
" IAR_RX_V2 - Compiler: IAR Target: Renesas RX v2\n"
|
||||
" IAR_STR71X - Compiler: IAR Target: STR71x\n"
|
||||
" IAR_STR75X - Compiler: IAR Target: STR75x\n"
|
||||
" IAR_STR91X - Compiler: IAR Target: STR91x\n"
|
||||
" IAR_V850ES_FX3 - Compiler: IAR Target: Renesas V850ES/Fx3\n"
|
||||
" IAR_V850ES_HX3 - Compiler: IAR Target: Renesas V850ES/Hx3\n"
|
||||
" MIKROC_ARM_CM4F - Compiler: MikroC Target: ARM Cortex-M4 with FPU\n"
|
||||
" MPLAB_PIC18F - Compiler: MPLAB Target: PIC18F\n"
|
||||
" MPLAB_PIC24 - Compiler: MPLAB Target: PIC24\n"
|
||||
" MPLAB_PIC32MEC14XX - Compiler: MPLAB Target: PIC32MEC14xx\n"
|
||||
" MPLAB_PIC32MX - Compiler: MPLAB Target: PIC32MX\n"
|
||||
" MPLAB_PIC32MZ - Compiler: MPLAB Target: PIC32MZ\n"
|
||||
" MSVC_MINGW - Compiler: MSVC or MinGW Target: x86\n"
|
||||
" OWATCOM_16BIT_DOS_FLSH186 - Compiler: Open Watcom Target: 16 bit DOS Flsh186\n"
|
||||
" OWATCOM_16BIT_DOS_PC - Compiler: Open Watcom Target: 16 bit DOS PC\n"
|
||||
" PARADIGM_TERN_EE_LARGE - Compiler: Paradigm Target: Tern EE large\n"
|
||||
" PARADIGM_TERN_EE_SMALL - Compiler: Paradigm Target: Tern EE small\n"
|
||||
" RENESAS_RX100 - Compiler: Renesas Target: RX100\n"
|
||||
" RENESAS_RX200 - Compiler: Renesas Target: RX200\n"
|
||||
" RENESAS_RX600 - Compiler: Renesas Target: RX600\n"
|
||||
" RENESAS_RX600_V2 - Compiler: Renesas Target: RX600 v2\n"
|
||||
" RENESAS_RX700_V3_DPFPU - Compiler: Renesas Target: RX700 v3 with DPFPU\n"
|
||||
" RENESAS_SH2A_FPU - Compiler: Renesas Target: SH2A with FPU\n"
|
||||
" ROWLEY_MSP430F449 - Compiler: Rowley Target: MSP430F449\n"
|
||||
" RVDS_ARM_CA9 - Compiler: RVDS Target: ARM Cortex-A9\n"
|
||||
" RVDS_ARM_CM0 - Compiler: RVDS Target: ARM Cortex-M0\n"
|
||||
" RVDS_ARM_CM3 - Compiler: RVDS Target: ARM Cortex-M3\n"
|
||||
" RVDS_ARM_CM4_MPU - Compiler: RVDS Target: ARM Cortex-M4 with MPU\n"
|
||||
" RVDS_ARM_CM4F - Compiler: RVDS Target: ARM Cortex-M4 with FPU\n"
|
||||
" RVDS_ARM_CM7 - Compiler: RVDS Target: ARM Cortex-M7\n"
|
||||
" RVDS_ARM7_LPC21XX - Compiler: RVDS Target: ARM7 LPC21xx\n"
|
||||
" SDCC_CYGNAL - Compiler: SDCC Target: Cygnal\n"
|
||||
" SOFTUNE_MB91460 - Compiler: Softune Target: MB91460\n"
|
||||
" SOFTUNE_MB96340 - Compiler: Softune Target: MB96340\n"
|
||||
" TASKING_ARM_CM4F - Compiler: Tasking Target: ARM Cortex-M4 with FPU\n"
|
||||
" TEMPLATE - Compiler: HOST Target: None\n"
|
||||
" CDK_THEAD_CK802 - Compiler: CDK Target: T-head CK802\n"
|
||||
" XCC_XTENSA - Compiler: XCC Target: Xtensa\n"
|
||||
" WIZC_PIC18 - Compiler: WizC Target: PIC18")
|
||||
# Native FREERTOS_PORT for Linux and Windows MINGW builds
|
||||
if(UNIX)
|
||||
message(STATUS " Auto-Detected Unix, setting FREERTOS_PORT=GCC_POSIX")
|
||||
set(FREERTOS_PORT GCC_POSIX CACHE STRING "FreeRTOS port name")
|
||||
elseif(MINGW)
|
||||
message(STATUS " Auto-Detected MINGW, setting FREERTOS_PORT=MSVC_MINGW")
|
||||
set(FREERTOS_PORT MSVC_MINGW CACHE STRING "FreeRTOS port name")
|
||||
endif()
|
||||
elseif((FREERTOS_PORT STREQUAL "A_CUSTOM_PORT") AND (NOT TARGET freertos_kernel_port) )
|
||||
message(FATAL_ERROR " FREERTOS_PORT is set to A_CUSTOM_PORT. Please specify the custom port target with all necessary files. For example:\n"
|
||||
" Assuming a directory of:\n"
|
||||
" FreeRTOSCustomPort/\n"
|
||||
" CMakeLists.txt\n"
|
||||
" port.c\n"
|
||||
" portmacro.h\n"
|
||||
" Where FreeRTOSCustomPort/CMakeLists.txt is a modified version of:\n"
|
||||
" add_library(freertos_kernel_port OBJECT)\n"
|
||||
" target_sources(freertos_kernel_port\n"
|
||||
" PRIVATE\n"
|
||||
" port.c\n"
|
||||
" portmacro.h)\n"
|
||||
" add_library(freertos_kernel_port_headers INTERFACE)\n"
|
||||
" target_include_directories(freertos_kernel_port_headers INTERFACE \n"
|
||||
" .)\n"
|
||||
" target_link_libraries(freertos_kernel_port\n"
|
||||
" PRIVATE\n"
|
||||
" freertos_kernel_port_headers\n"
|
||||
" freertos_kernel_include)")
|
||||
endif()
|
||||
|
||||
add_library(freertos_kernel STATIC)
|
||||
|
||||
########################################################################
|
||||
add_subdirectory(include)
|
||||
add_subdirectory(portable)
|
||||
|
||||
target_sources(freertos_kernel PRIVATE
|
||||
croutine.c
|
||||
event_groups.c
|
||||
list.c
|
||||
queue.c
|
||||
stream_buffer.c
|
||||
tasks.c
|
||||
timers.c
|
||||
)
|
||||
|
||||
if (DEFINED FREERTOS_HEAP )
|
||||
# User specified a heap implementation add heap implementation to freertos_kernel.
|
||||
target_sources(freertos_kernel PRIVATE
|
||||
# If FREERTOS_HEAP is digit between 1 .. 5 - it is heap number, otherwise - it is path to custom heap source file
|
||||
$<IF:$<BOOL:$<FILTER:${FREERTOS_HEAP},EXCLUDE,^[1-5]$>>,${FREERTOS_HEAP},portable/MemMang/heap_${FREERTOS_HEAP}.c>
|
||||
)
|
||||
endif()
|
||||
|
||||
|
||||
target_link_libraries(freertos_kernel
|
||||
PUBLIC
|
||||
freertos_kernel_include
|
||||
freertos_kernel_port_headers
|
||||
PRIVATE
|
||||
freertos_kernel_port
|
||||
|
||||
)
|
||||
|
||||
########################################################################
|
||||
|
|
@ -5,3 +5,4 @@ URL=https://github.com/FreeRTOS/FreeRTOS-Kernel
|
|||
IconIndex=0
|
||||
IDList=
|
||||
HotKey=0
|
||||
|
||||
|
|
|
|||
625
History.txt
625
History.txt
|
|
@ -1,450 +1,6 @@
|
|||
Documentation and download available at https://www.FreeRTOS.org/
|
||||
|
||||
Changes between FreeRTOS V11.1.0 and FreeRTOS V11.2.0 released March 04, 2025
|
||||
|
||||
+ Add CC-RH port for Renesas F1Kx devices. We thank @TrongNguyenR for their
|
||||
contribution.
|
||||
+ Add Pointer Authentication (PAC) and Branch Target Identification (BTI)
|
||||
support to the ARMv8-M ports. We thank @AhmedIsmail02 for their
|
||||
contribution.
|
||||
+ Add Floating Point Unit (FPU) support to the ARM_AARCH64 port. We thank
|
||||
@StefanBalt for their contribution.
|
||||
+ Add FPU Safe Application IRQ Handler suport to the ARM_AARCH64_SRE port.
|
||||
We thank @GhMarwen for their contribution.
|
||||
+ Add Privileged eXecute Never MPU attribute support to the ARMv8-M ports.
|
||||
We thank @AhmedIsmail02 for their contribution.
|
||||
+ Update XMOS xcore.ai port to be compatible with FreeRTOS Kernel version
|
||||
11. We thank @ACascarino for their contribution.
|
||||
+ ARM_CRx_No_GIC port updates:
|
||||
- Remove inline assembly and move assembly code to separate portASM.S
|
||||
file.
|
||||
- Add support for Floating Point Unit (FPU).
|
||||
- Add support to allow the application writer to handle SVC calls raised
|
||||
from the application code.
|
||||
- Add support for vApplicationFPUSafeIRQHandler.
|
||||
+ POSIX port updates:
|
||||
- Set PTHREAD_MUTEX_ROBUST attribute on the mutex to prevent application
|
||||
hangs when a thread dies while holding a mutex.
|
||||
- Avoid calling pthread_sigmask on non-FreeROS threads when
|
||||
vPortEndScheduler is called from a non-FreeRTOS thread. We thank
|
||||
@johnboiles for their contribution.
|
||||
- Remove unnecessary call to pthread_attr_setstacksize. We thank
|
||||
@hollinsky for their contribution.
|
||||
- Add an assert to catch if vPortYield is called from a non-FreeRTOS
|
||||
thread. We thank @johnboiles for their contribution.
|
||||
- Fix Posix port compilation on FreeBSD. We thank @tymmej for their
|
||||
contribution.
|
||||
+ Update the Xtensa port and move it to the Partner-Supported-Ports
|
||||
repository. We thank @ianstcdns for their contribution.
|
||||
+ Add vPortGenerateSimulatedInterruptFromWindowsThread API in the MSVC-MingW
|
||||
port to enable native windows thread to synchronize with FreeRTOS task
|
||||
through simulated interrupt.
|
||||
+ Update Windows port to use Waitable Timer instead of Sleep to improve tick
|
||||
accuracy. We thank @bknicholls and @leegeth for their contribution.
|
||||
+ Update the value of queueQUEUE_TYPE_SET to a unique value (5) to allow
|
||||
tracers to differentiate between queues and queue sets. We thank @schilkp
|
||||
for their contribution.
|
||||
+ Add traceSTARTING_SCHEDULER tracing hook to enable tracers to run code on
|
||||
startup. We thank @schilkp for their contribution.
|
||||
+ Define vApplicationGetTimerTaskMemory only when configUSE_TIMERS is set to
|
||||
1. We thank @HazardyKnusperkeks for their contribution.
|
||||
+ Reset xNextTaskUnblockTime in task notify FromISR APIs to allow the core
|
||||
to enter sleep mode at the earliest possible time when using tickless
|
||||
idle.
|
||||
+ Optimize xTaskIncrementTick for SMP by removing xYieldRequiredForCore. We
|
||||
thank @cymizer for their contribution.
|
||||
+ Update the SMP scheduler to re-select a core to yield when the core
|
||||
affinity of a ready task is changed.
|
||||
+ Update xEventGroupSetBits to read the event bits value to be returned to
|
||||
the caller while the scheduler is suspended. This fixes dereference after
|
||||
the event group is deleted by higher priority task. We thank @skotopes for
|
||||
their contribution.
|
||||
+ Optimize certain getter APIs by removing unnecessary calls to
|
||||
task{ENTER|EXIT}_CRITICAL() when the data access is atomic. We thank
|
||||
@GuilhermeGiacomoSimoes for their contribution.
|
||||
+ Optimize xTaskNotifyWait and ulTaskNotifyTake APIs to suspend the
|
||||
scheduler only if the task is not already notified, and the caller is
|
||||
willing to wait for the notification. We thank @jefftenney for
|
||||
their contribution.
|
||||
+ Fix error checking of prvCreateIdleTasks. We thank @kakkoko for their
|
||||
contribution.
|
||||
+ Update SMP lock macros and critical nesting macros to pass core ID as an
|
||||
argument. This reduces the number of accesses to a peripheral register to
|
||||
query core ID. We thank @felixvanoost for their contribution.
|
||||
+ Add stack pointer bounds check when configCHECK_FOR_STACK_OVERFLOW is set
|
||||
to 2 to improve reliability of stack overflow detection. We thank
|
||||
@jiladahe1997 for their contribution.
|
||||
+ Update run-time stats to include time elapsed since the last context
|
||||
switch for the currently running task.
|
||||
+ Add xQueueCreateSetStatic API for static creation of Queue Sets. We thank
|
||||
@kzorer for their contribution.
|
||||
+ Update the traceMALLOC() macro to pass the actual size of the allocated
|
||||
block for secure_heap, heap_2, heap_4 and heap_5. We thank @DazzlingOkami
|
||||
for their contribution.
|
||||
+ Update heap_1 to use heapADD_WILL_OVERFLOW macro to improve readability.
|
||||
We thank @wdfk-prog for their contribution.
|
||||
+ Add pointer protection to the pxNextFreeBlock member of the allocated
|
||||
block's metadata in heap_4 and heap_5 when configENABLE_HEAP_PROTECTOR is
|
||||
set to 1. We thank @Saiiijchan for their contribution.
|
||||
+ Allow the application writer to override pointer validation for heap_5
|
||||
when configENABLE_HEAP_PROTECTOR is used. We thank @Saiiijchan for their
|
||||
contribution.
|
||||
+ Add xPortResetHeapMinimumEverFreeHeapSize to heap_4.c and heap_5.c.
|
||||
We thank @TomasGalbickaNXP for their contribution.
|
||||
+ Add NULL check in the event_create function in the POSIX port. We thank
|
||||
@laroche for their contribution.
|
||||
+ Use _GNU_SOURCE macro instead of __USE_GNU in the Posix port. We thank
|
||||
@maxiaogood for their contribution.
|
||||
+ Use the new __ARM_FP macro instead of the deprectred __VFP_FP__ macro in
|
||||
GCC/ARM_CM7, GCC/ARM_CM4_MPU, and GCC/ARM_CM4F ports. We thank @haydenridd
|
||||
for their contribution.
|
||||
+ Add portMEMORY_BARRIER definition to the Xtensa port. We thank @superroc
|
||||
for their contribution.
|
||||
+ Move the hardware include msp430.h to port.c from portmacro.h. We thank
|
||||
@mayl for their contribution.
|
||||
+ Update ARM assembly syntax for Cortex-M ports. We thank @laroche for their
|
||||
contribution.
|
||||
+ Update the Windows port to records a pending yield in
|
||||
vPortCloseRunningThread to ensure that the next tick interrupt schedules
|
||||
the next task regardless of the value of configUSE_PREEMPTION.
|
||||
+ Fix the context switch issue in the RL78 port. We thank @KeitaKashima for
|
||||
their contribution.
|
||||
+ Fix compilation issue in ARM CM0 port when using Keil MDK. We thank
|
||||
@TomasGalbickaNXP for their contribution.
|
||||
+ Fix IA32 port compilation when configUSE_COMMON_INTERRUPT_ENTRY_POINT is
|
||||
set to 0. We thank @Ryzee119 for their contribution.
|
||||
+ Store configMTIMECMP_BASE_ADDRESS in a 64-bit integer for the RISC-V port.
|
||||
We thank @vishwamartur for their contribution.
|
||||
+ Fix nested interrupt handling and optimize FPU related context switching
|
||||
for the F1Kx port. We thank @TrongNguyenR for their contribution.
|
||||
+ Update the RP2040 port to add support for Raspberry Pi Pico SDK 2.0.0.
|
||||
We thank @kilograham for their contribution.
|
||||
+ Fix the return value of portYIELD_FROM_ISR macro for the MSVC-MingW port.
|
||||
We thank @wwhheerree for their contribution.
|
||||
+ Optimize vApplicationFPUSafeIRQHandler for the Coretex-A9 port by
|
||||
removing the unnecessarily preserved callee saved registers. We thank
|
||||
@Saiiijchan for their contribution.
|
||||
+ Fix the context array size for MPU ports to ensure the saved context
|
||||
location falls within the reserved context area rather than overlapping
|
||||
with the next MPU_SETTINGS structure member.
|
||||
+ Update CMake files for RP2040 port to fetch the port from the
|
||||
Community-Supported-Ports repo. We thank @kilograham for their
|
||||
contribution.
|
||||
+ Fix CMake file for the GCC ARM_CM0 port to include MPU files. We thank
|
||||
@0mhu for their contribution.
|
||||
+ Add an example of human readable table generated by vTaskListTasks() in
|
||||
the function documentation. We thank @wwhheerree for their contribution.
|
||||
|
||||
Changes between FreeRTOS V11.0.1 and FreeRTOS V11.1.0 released April 22, 2024
|
||||
|
||||
+ Add ARMv7-R port with Memory Protection Unit (MPU) support.
|
||||
+ Add Memory Protection Unit (MPU) support to the Cortex-M0 port.
|
||||
+ Add stream batching buffer. A stream batching buffer differs from a stream
|
||||
buffer when a task reads from a non-empty buffer:
|
||||
- The task reading from a non-empty stream buffer returns immediately
|
||||
regardless of the amount of data in the buffer.
|
||||
- The task reading from a non-empty steam batching buffer blocks until the
|
||||
amount of data in the buffer exceeds the trigger level or the block time
|
||||
expires.
|
||||
We thank @cperkulator for their contribution.
|
||||
+ Add the ability to change task notification index for stream buffers. We
|
||||
thank @glemco for their contribution.
|
||||
+ Add xStreamBufferResetFromISR and xMessageBufferResetFromISR APIs to reset
|
||||
stream buffer and message buffer from an Interrupt Service Routine (ISR).
|
||||
We thank @HagaiMoshe for their contribution.
|
||||
+ Update all the FreeRTOS APIs to use configSTACK_DEPTH_TYPE for stack type.
|
||||
We thank @feilipu for their contribution.
|
||||
+ Update vTaskEndScheduler to delete the timer and idle tasks,
|
||||
once the scheduler is stopped.
|
||||
+ Make xTaskGetCurrentTaskHandleForCore() available to the single core
|
||||
scheduler. We thank @Dazza0 for their contribution.
|
||||
+ Update uxTaskGetSystemState to not use the pxIndex member of the List_t
|
||||
structure while iterating ready tasks list. The reason is that pxIndex
|
||||
member must only used to select next ready task to run. We thank
|
||||
@gemarcano for their inputs.
|
||||
+ Add a config option to the FreeRTOS SMP Kernel to set the default core
|
||||
affinity mask for tasks created without an affinity mask. We thank @go2sh
|
||||
for their contribution.
|
||||
+ Add configUSE_EVENT_GROUPS and configUSE_STREAM_BUFFERS configuration
|
||||
constants to control the inclusion of event group and stream buffer
|
||||
functionalities.
|
||||
+ Code changes to comply with MISRA C 2012.
|
||||
+ Add 64-bit support to the FreeRTOS Windows Simulator port. We thank @watsk
|
||||
and @josesimoes for their contributions.
|
||||
+ Add support for 64-bit Microblaze processor to the MicroblazeV9 port. We
|
||||
thank @mubinsyed for their contribution.
|
||||
+ Add support for MSP430 Embedded Application Binary Interface (EABI) to
|
||||
the MSP430F449 port to make it work with both MSP430 GCC and MSPGCC
|
||||
compilers. We thank @Forty-Bot for their contribution.
|
||||
+ Update xPortIsAuthorizedToAccessBuffer() on FreeRTOS ports with MPU
|
||||
support to grant an unprivileged task access to all the memory before the
|
||||
scheduler is started.
|
||||
+ Update the POSIX port to pass the FreeRTOS task name to pthread for
|
||||
readable output in debuggers. We thank @Mixaill for their contribution.
|
||||
+ Update the POSIX port to ignore the user specified stack memory and only
|
||||
pass the stack size to the pthread API to avoid errors caused when stack size
|
||||
is smaller than the minimum. We thank @cmorgnaBE for their
|
||||
contribution.
|
||||
+ Update the POSIX port to use a timer thread for tick interrupts instead of
|
||||
POSIX timers to address issues with signal handling in non-FreeRTOS
|
||||
pthreads. We thank @cmorgnaBE for their contribution.
|
||||
+ Update ARM_TFM port to support TF-Mv2.0.0 release of trusted-firmware-m.
|
||||
We thanks @urutva for their contribution.
|
||||
+ Remove redundant constant pools in ARMv8 ports. We thank @urutva for their
|
||||
contribution.
|
||||
+ Add APIs to reset the internal state of kernel modules. These APIs are
|
||||
primarily intended to be used in the testing frameworks that restart the
|
||||
scheduler.
|
||||
+ Use kernel provided implementations of vApplicationGetIdleTaskMemory() and
|
||||
vApplicationGetTimerTaskMemory() in the RP2040 port. We thank @dpslwk for
|
||||
their contribution.
|
||||
+ Fix atomic enter/exit critical section macro definitions in atomic.h for
|
||||
ports that support nested interrupts. We thank @sebunger for their
|
||||
contribution.
|
||||
+ Fix compiler warnings in the MSP430F449 port when compiled with the
|
||||
MSP430 GCC compiler. We thank @Forty-Bot for their contribution.
|
||||
+ Update the scheduler suspension usage in ulTaskGenericNotifyTake and
|
||||
xTaskGenericNotifyWait() to enhance code readability. We thank @Dazza0 for
|
||||
their contribution.
|
||||
+ Add support for latest version of MPU wrappers( mpu_wrappers_v2) in CMake.
|
||||
We thank @IsaacDynamo for their contribution.
|
||||
+ Update CMake support to create only one static library containing both the
|
||||
kernel common code and the kernel port code. We thank @barnatahmed for
|
||||
their contribution.
|
||||
|
||||
Changes between FreeRTOS V11.0.0 and FreeRTOS V11.0.1 released December 21, 2023
|
||||
|
||||
+ Updated the SBOM file.
|
||||
|
||||
Changes between FreeRTOS V10.6.2 and FreeRTOS V11.0.0 released December 18, 2023
|
||||
|
||||
+ SMP merged into the mainline: While FreeRTOS introduced Asymmetric
|
||||
Multiprocessing (AMP) support in 2017, FreeRTOS Version 11.0.0 is the
|
||||
first to merge Symmetric Multiprocessing (SMP) support into the mainline
|
||||
release. SMP enables one instance of the FreeRTOS Kernel to schedule tasks
|
||||
across multiple identical processor cores. We thank Mike Bruno and Jerry
|
||||
McCarthy of XMOS and, Darian Liang, Sudeep Mohanty and Zim Kalinowski of
|
||||
Espressif Systems for their contributions.
|
||||
+ Switch MISRA compliance checking from PC Lint to Coverity, and update from
|
||||
MISRA C:2004 to MISRA C:2012.
|
||||
+ Add a template FreeRTOSConfig.h, inclusive of an abbreviated explanation of
|
||||
each configuration item. Application writers can use this template as a
|
||||
starting point to create the FreeRTOSConfig.h file for their application.
|
||||
+ Add a template FreeRTOS port which can be used as a starting point for
|
||||
developing a new FreeRTOS port.
|
||||
+ Add bounds checking and obfuscation to internal heap block pointers in
|
||||
heap_4.c and heap_5.c to help catch pointer corruptions. The application can
|
||||
enable these checks by setting configENABLE_HEAP_PROTECTOR to 1 in their
|
||||
FreeRTOSConfig.h. We thank @oliverlavery for their contribution.
|
||||
+ Update vTaskList and vTaskGetRunTimeStats APIs to replace the use of sprintf
|
||||
with snprintf.
|
||||
+ Add trace macros to ports that enable tracing the interaction of ISRs with
|
||||
scheduler events. We thank @conara for their contribution.
|
||||
+ Add trace macros that enable tracing of entering and exiting all APIs. We
|
||||
thank @Techcore123 for their contribution.
|
||||
+ Add uxTaskBasePriorityGet and uxTaskBasePriorityGetFromISR APIs to get the
|
||||
base priority of a task. The base priority of a task is the priority that
|
||||
was last assigned to the task - which due to priority inheritance, may not
|
||||
be the current priority of the task.
|
||||
+ Add pdTICKS_TO_MS macro to convert time in FreeRTOS ticks to time in
|
||||
milliseconds. We thank @Dazza0 for their contribution.
|
||||
+ Add default implementations of vApplicationGetIdleTaskMemory and
|
||||
vApplicationGetTimerTaskMemory. The application can enable these default
|
||||
implementations by setting configKERNEL_PROVIDED_STATIC_MEMORY to 1 in their
|
||||
FreeRTOSConfig.h. We thank @mdnr-g for their contribution.
|
||||
+ Update vTaskGetInfo to include start and end of the stack whenever both
|
||||
values are available. We thank @vinceburns for their contribution.
|
||||
+ Prevent tasks waiting for a notification from being resumed by calls to
|
||||
vTaskResume or vTaskResumeFromISR. We thank @Moral-Hao for their
|
||||
contribution.
|
||||
+ Add asserts to validate that the application has correctly installed
|
||||
FreeRTOS handlers for PendSV and SVCall interrupts on Cortex-M devices.
|
||||
We thank @jefftenney for their contribution.
|
||||
+ Rename ARM_CA53_64_BIT and ARM_CA53_64_BIT_SRE ports to Arm_AARCH64 and
|
||||
Arm_AARCH64_SRE respectively as these ports are applicable to all AArch64
|
||||
architecture. We thank @urutva for their contribution.
|
||||
+ Add CMake support to allow the application writer to select the RISC-V
|
||||
chip extension. We thank @JoeBenczarski for their contribution.
|
||||
+ Add CMake support to allow the application writer to build an application
|
||||
with static allocation only. We thank @conara for their contribution.
|
||||
+ Make taskYIELD available to unprivileged tasks for ARMv8-M ports.
|
||||
+ Update Cortex-M23 ports to not use PSPLIM_NS. We thank @urutva for their
|
||||
contribution.
|
||||
+ Update the SysTick setup code for ARMv8-M ports to first configure the clock
|
||||
source and then enable SysTick. This is needed to address a bug in QEMU
|
||||
versions older than 7.0.0, which causes an emulation error if SysTick is
|
||||
enabled without first selecting a valid clock source. We thank @jefftenney
|
||||
for their contribution.
|
||||
+ Add the port-optimized task selection algorithm optionally available for
|
||||
ARMv7-M ports to the ARMv8-M ports. We thank @jefftenney for their
|
||||
contribution.
|
||||
+ Improve the speed of pvPortMalloc in heap_4.c and heap_5.c by removing
|
||||
unnecessary steps while splitting a large memory block into two. We thank
|
||||
@Moral-Hao for their contribution.
|
||||
+ Shorten the critical section in pvPortMalloc in heap_2.c, heap_4.c and
|
||||
heap_5.c by moving the size calculation out of the critical section. We thank
|
||||
@Moral-Hao for their contribution.
|
||||
+ Update xTaskNotifyWait and ulTaskNotifyTake to remove the non-deterministic
|
||||
operation of traversing a linked link from a critical section. We thank
|
||||
@karver8 for their contribution.
|
||||
+ Fix stack end and stack size computation in POSIX port to meet the stack
|
||||
alignment requirements on MacOS. We thank @tegimeki for their contribution.
|
||||
+ Update the vTaskPrioritySet implementation to use the new priority when the
|
||||
task has inherited priority from a mutex it is holding, and the new priority
|
||||
is bigger than the inherited priority. We thank @Moral-Hao for their
|
||||
contribution.
|
||||
+ Add stack alignment adjustment if stack grows upwards. We thank @ivq for
|
||||
their contribution.
|
||||
+ Fix pxTopOfStack calculation in configINIT_TLS_BLOCK when picolib C is
|
||||
selected as the C library implementation to ensure that
|
||||
pxPortInitialiseStack does not overwrite the data in the TLS block portion
|
||||
of the stack. We thank @bebebib-rs for their contribution.
|
||||
+ Fix vPortEndScheduler() for the MSVC port so that the function
|
||||
prvProcessSimulatedInterrupts is not stuck in an infinite loop when the
|
||||
scheduler is stopped. We thank @Ju1He1 for their contribution.
|
||||
+ Add the Pull Request (PR) Process explaining the stages a PR goes through.
|
||||
|
||||
Changes between FreeRTOS V10.6.1 and FreeRTOS V10.6.2 released November 29, 2023
|
||||
|
||||
+ Add the following improvements to the new MPU wrapper (mpu_wrappers_v2.c)
|
||||
introduced in version 10.6.0:
|
||||
- Introduce Access Control List (ACL) feature to allow the application
|
||||
writer to control an unprivileged task’s access to kernel objects.
|
||||
- Update the system call entry mechanism to only require one Supervisor
|
||||
Call (SVC) instruction.
|
||||
- Wrap parameters for system calls with more than four parameters in a
|
||||
struct to avoid special handling during system call entry.
|
||||
- Fix 2 possible integer overflows.
|
||||
- Convert some asserts to run time parameter checks.
|
||||
|
||||
Changes between FreeRTOS V10.6.0 and FreeRTOS V10.6.1 released August 17, 2023
|
||||
|
||||
+ Add runtime parameter checks to functions in mpu_wrappers_v2.c file.
|
||||
The same checks are already performed in API implementations using
|
||||
asserts.
|
||||
We thank the following people for their inputs in these changes:
|
||||
- Lan Luo, Zixia Liu of School of Computer Science and Technology,
|
||||
Anhui University of Technology, China.
|
||||
- Xinwen Fu of Department of Computer Science, University of
|
||||
Massachusetts Lowell, USA.
|
||||
- Xinhui Shao, Yumeng Wei, Huaiyu Yan, Zhen Ling of School of
|
||||
Computer Science and Engineering, Southeast University, China.
|
||||
|
||||
Changes between FreeRTOS V10.5.1 and FreeRTOS 10.6.0 released July 13, 2023
|
||||
|
||||
+ Add a new MPU wrapper that places additional restrictions on unprivileged
|
||||
tasks. The following is the list of changes introduced with the new MPU
|
||||
wrapper:
|
||||
|
||||
1. Opaque and indirectly verifiable integers for kernel object handles:
|
||||
All the kernel object handles (for example, queue handles) are now
|
||||
opaque integers. Previously object handles were raw pointers.
|
||||
2. Save the task context in Task Control Block (TCB): When a task is
|
||||
swapped out by the scheduler, the task's context is now saved in its
|
||||
TCB. Previously the task's context was saved on its stack.
|
||||
3. Execute system calls on a separate privileged only stack: FreeRTOS
|
||||
system calls, which execute with elevated privilege, now use a
|
||||
separate privileged only stack. Previously system calls used the
|
||||
calling task's stack. The application writer can control the size of
|
||||
the system call stack using new configSYSTEM_CALL_STACK_SIZE config
|
||||
macro.
|
||||
4. Memory bounds checks: FreeRTOS system calls which accept a pointer
|
||||
and de-reference it, now verify that the calling task has required
|
||||
permissions to access the memory location referenced by the pointer.
|
||||
5. System calls restrictions: The following system calls are no longer
|
||||
available to unprivileged tasks:
|
||||
- vQueueDelete
|
||||
- xQueueCreateMutex
|
||||
- xQueueCreateMutexStatic
|
||||
- xQueueCreateCountingSemaphore
|
||||
- xQueueCreateCountingSemaphoreStatic
|
||||
- xQueueGenericCreate
|
||||
- xQueueGenericCreateStatic
|
||||
- xQueueCreateSet
|
||||
- xQueueRemoveFromSet
|
||||
- xQueueGenericReset
|
||||
- xTaskCreate
|
||||
- xTaskCreateStatic
|
||||
- vTaskDelete
|
||||
- vTaskPrioritySet
|
||||
- vTaskSuspendAll
|
||||
- xTaskResumeAll
|
||||
- xTaskGetHandle
|
||||
- xTaskCallApplicationTaskHook
|
||||
- vTaskList
|
||||
- vTaskGetRunTimeStats
|
||||
- xTaskCatchUpTicks
|
||||
- xEventGroupCreate
|
||||
- xEventGroupCreateStatic
|
||||
- vEventGroupDelete
|
||||
- xStreamBufferGenericCreate
|
||||
- xStreamBufferGenericCreateStatic
|
||||
- vStreamBufferDelete
|
||||
- xStreamBufferReset
|
||||
Also, an unprivileged task can no longer use vTaskSuspend to suspend
|
||||
any task other than itself.
|
||||
|
||||
We thank the following people for their inputs in these enhancements:
|
||||
- David Reiss of Meta Platforms, Inc.
|
||||
- Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling
|
||||
of School of Computer Science and Engineering, Southeast University,
|
||||
China.
|
||||
- Xinwen Fu of Department of Computer Science, University of
|
||||
Massachusetts Lowell, USA.
|
||||
- Yueqi Chen, Zicheng Wang, Minghao Lin, Jiahe Wang of University of
|
||||
Colorado Boulder, USA.
|
||||
+ Add Cortex-M35P port. Contributed by @urutva.
|
||||
+ Add embedded extension (RV32E) support to the IAR RISC-V port.
|
||||
+ Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent APIs. Contributed by
|
||||
@chrisnc.
|
||||
+ Add APIs to get the application supplied buffers from statically
|
||||
created kernel objects. The following new APIs are added:
|
||||
- xTaskGetStaticBuffers
|
||||
- xQueueGetStaticBuffers
|
||||
- xQueueGenericGetStaticBuffers
|
||||
- xSemaphoreGetStaticBuffer
|
||||
- xEventGroupGetStaticBuffer
|
||||
- xStreamBufferGetStaticBuffers
|
||||
- xMessageBufferGetStaticBuffers
|
||||
These APIs enable the application writer to obtain static buffers from
|
||||
the kernel object and free/reuse them at the time of deletion. Earlier
|
||||
the application writer had to maintain the association of static buffers
|
||||
and the kernel object in the application. Contributed by @Dazza0.
|
||||
+ Add Thread Local Storage (TLS) support using picolibc function. Contributed
|
||||
by @keith-packard.
|
||||
+ Add configTICK_TYPE_WIDTH_IN_BITS to configure TickType_t data type. As a result,
|
||||
the number of bits in an event group also increases with big data type. Contributed
|
||||
by @Hadatko.
|
||||
+ Update eTaskGetState and uxTaskGetSystemState to return eReady for pending ready
|
||||
tasks. Contributed by @Dazza0.
|
||||
+ Update heap_4 and heap_5 to add padding only if the resulting block is not
|
||||
already aligned.
|
||||
+ Fix the scheduler logic in a couple of places to not preempt a task when an
|
||||
equal priority task becomes ready.
|
||||
+ Add macros used in FreeRTOS-Plus libraries. Contributed by @Holden.
|
||||
+ Fix clang compiler warnings. Contributed by @phelter.
|
||||
+ Add assertions to ARMv8-M ports to detect when FreeRTOS APIs are called from
|
||||
interrupts with priority higher than the configMAX_SYSCALL_INTERRUPT_PRIORITY.
|
||||
Contributed by @urutva.
|
||||
+ Add xPortIsInsideInterrupt API to ARM_CM0 ports.
|
||||
+ Fix build warning in MSP430X port when large data model is used.
|
||||
+ Add the ability to use Cortex-R5 port on the parts without FPU.
|
||||
+ Fix build warning in heap implementations on PIC24/dsPIC.
|
||||
+ Update interrupt priority asserts for Cortex-M ports so that these do not fire
|
||||
on QEMU which does not implement PRIO bits.
|
||||
+ Update ARMv7-M ports to ensure that kernel interrupts run at the lowest priority.
|
||||
configKERNEL_INTERRUPT_PRIORITY is now obsolete for ARMv7-M ports and brings
|
||||
these ports inline with the newer ARMv8-M ports. Contributed by @chrisnc.
|
||||
+ Fix build issue in POSIX GCC port on Windows Subsystem for Linux (WSL). Contributed
|
||||
by @jacky309.
|
||||
+ Add portMEMORY_BARRIER to Microblaze port. Contributed by @bbain.
|
||||
+ Add portPOINTER_SIZE_TYPE definition for ATmega port. Contributed by @jputcu.
|
||||
+ Multiple improvements in the CMake support. Contributed by @phelte and @cookpate.
|
||||
|
||||
Changes between FreeRTOS V10.5.0 and FreeRTOS V10.5.1 released November 16 2022
|
||||
+ Updated the kernel version in manifest and SBOM
|
||||
|
||||
Changes between FreeRTOS V10.4.6 and FreeRTOS V10.5.0 released September 16 2022
|
||||
Changes between FreeRTOS V10.4.3 LTS Patch 2 and FreeRTOS V10.4.3 LTS Patch 3 released September 16 2022
|
||||
|
||||
+ ARMv7-M and ARMv8-M MPU ports: It was possible for a third party that
|
||||
already independently gained the ability to execute injected code to
|
||||
|
|
@ -479,144 +35,20 @@ Changes between FreeRTOS V10.4.6 and FreeRTOS V10.5.0 released September 16 2022
|
|||
kernel protections to prevent such MPU configurations.
|
||||
We thank the SecLab team at Northeastern University for reporting this
|
||||
issue.
|
||||
+ Add support for ARM Cortex-M55.
|
||||
+ Add support for ARM Cortex-M85. Contributed by @gbrtth.
|
||||
+ Add vectored mode interrupt support to the RISC-V port.
|
||||
+ Add support for RV32E extension (Embedded Profile) in RISC-V GCC port.
|
||||
Contributed by @Limoto.
|
||||
+ Heap improvements:
|
||||
- Add a check to heap_2 to track if a memory block is allocated to
|
||||
the application or not. The MSB of the size field is used for this
|
||||
purpose. The same check already exists in heap_4 and heap_5. This
|
||||
check prevents double free errors.
|
||||
- Add a new flag configHEAP_CLEAR_MEMORY_ON_FREE to heap_2, heap_4
|
||||
and heap_5. If the flag is set in FreeRTOSConfig.h then memory freed using
|
||||
vPortFree() is automatically cleared to zero.
|
||||
- Add a new API pvPortCalloc to heap_2, heap_4 and heap_5 which has the same
|
||||
signature as the standard library calloc function.
|
||||
- Update the pointer types to portPOINTER_SIZE_TYPE. Contributed by
|
||||
@Octaviarius.
|
||||
+ Add the ability to override send and receive completed callbacks for each
|
||||
instance of a stream buffer or message buffer. Earlier there could be
|
||||
one send and one receive callback for all instances of stream and message
|
||||
buffers. Having separate callbacks per instance allows different message
|
||||
and stream buffers to be used differently - for example, some for inter core
|
||||
communication and others for same core communication.
|
||||
The feature can be controlled by setting the configuration option
|
||||
configUSE_SB_COMPLETED_CALLBACK in FreeRTOSConfig.h. When the option is set to 1,
|
||||
APIs xStreamBufferCreateWithCallback() or xStreamBufferCreateStaticWithCallback()
|
||||
(and likewise APIs for message buffer) can be used to create a stream buffer
|
||||
or message buffer instance with application provided callback overrides. When
|
||||
the option is set to 0, then the default callbacks as defined by
|
||||
sbSEND_COMPLETED() and sbRECEIVE_COMPLETED() macros are invoked. To maintain
|
||||
backwards compatibility, configUSE_SB_COMPLETED_CALLBACK defaults to 0. The
|
||||
functionality is currently not supported for MPU enabled ports.
|
||||
+ Generalize the FreeRTOS's Thread Local Storage (TLS) support so that it
|
||||
is not tied to newlib and can be used with other c-runtime libraries also.
|
||||
The default behavior for newlib support is kept same for backward
|
||||
compatibility.
|
||||
+ Add support to build and link FreeRTOS using CMake build system. Contributed
|
||||
by @yhsb2k.
|
||||
+ Add support to generate Software Bill of Materials (SBOM) for every release.
|
||||
+ Add support for 16 MPU regions to the GCC Cortex-M33 ports.
|
||||
+ Add ARM Cortex-M7 r0p0/r0p1 Errata 837070 workaround to ARM CM4 MPU ports.
|
||||
The application writer needs to define configENABLE_ERRATA_837070_WORKAROUND
|
||||
when using CM4 MPU ports on a Cortex-M7 r0p0/r0p1 core.
|
||||
+ Add configSYSTICK_CLOCK_HZ to Cortex-M0 ports. This is needed to support
|
||||
the case when the SysTick timer is not clocked from the same source as the CPU.
|
||||
+ Add hardware stack protection support to MicroBlazeV9 port. This ensures that
|
||||
the CPU immediately raises Stack Protection Violation exception as soon as any
|
||||
task violates its stack limits. Contributed by @uecasm.
|
||||
+ Introduce the configUSE_MINI_LIST_ITEM configuration option. When this
|
||||
option is set to 1, ListItem_t and MiniLitItem_t remain separate types.
|
||||
However, when configUSE_MINI_LIST_ITEM == 0, MiniLitItem_t and ListItem_t
|
||||
are both typedefs of the same struct xLIST_ITEM. This addresses some issues
|
||||
observed when strict-aliasing and link time optimization are enabled.
|
||||
To maintain backwards compatibility, configUSE_MINI_LIST_ITEM defaults to 1.
|
||||
+ Simplify prvInitialiseNewTask to memset newly allocated TCB structures
|
||||
to zero, and remove code that set individual structure members to zero.
|
||||
+ Add prototype for prvPortYieldFromISR to the POSIX port so that it builds
|
||||
without any warning with -Wmissing-prototypes compiler option.
|
||||
+ Add top of stack and end of stack to the task info report obtained using
|
||||
vTaskGetInfo(). Contributed by @shreyasbharath.
|
||||
+ Add a cap to the cRxLock and cTxLock members of the queue data structure.
|
||||
These locks count the number items received and sent to the queue while
|
||||
the queue was locked. These are later used to unblock tasks waiting on
|
||||
the queue when the queue is unlocked. This PR caps the values of the
|
||||
cRxLock and cTxLock to the number of tasks in the system because we cannot
|
||||
unblock more tasks than there are in the system. Note that the same assert
|
||||
could still be triggered is the application creates more than 127 tasks.
|
||||
+ Changed uxAutoReload parameter in timer functions to xAutoReload. The
|
||||
type is now BaseType_t. This matches the type of pdTRUE and pdFALSE.
|
||||
The new function xTimerGetAutoReload() provides the auto-reload state as
|
||||
a BaseType_t. The legacy function uxTimerGetAutoReload is retained with the
|
||||
original UBaseType_t return value.
|
||||
+ Fix support for user implementations of tickless idle that call
|
||||
vTaskStepTick() with xExpectedIdleTime ticks to step. The new code
|
||||
ensures xTickCount reaches xNextTaskUnblockTime inside xTaskIncrementTick()
|
||||
instead of inside vTaskStepTick(). This fixes the typical case where a task
|
||||
wakes up one tick late and a rare case assertion failure when xTickCount\
|
||||
rolls over. Contributed by @jefftenney.
|
||||
+ Fix deadlock in event groups when pvPortMalloc and vPortFree functions
|
||||
are protected with a mutex. Contributed by @clemenskresser.
|
||||
+ Fix a warning in tasks.c when compiled with -Wduplicated-branches
|
||||
GCC option. Contributed by @pierrenoel-bouteville-act.
|
||||
+ Fix compilation error in tasks.c when configSUPPORT_DYNAMIC_ALLOCATION
|
||||
is set to zero. Contributed by @rdpoor.
|
||||
+ Fix prvWriteMessageToBuffer() function in stream_buffer.c so that it correctly
|
||||
copies length on big endian platforms too.
|
||||
+ Remove the need for INCLUDE_vTaskSuspend to be set to 1
|
||||
when configUSE_TICKLESS_IDLE is enabled. Contributed by @pramithkv.
|
||||
+ Update the RL78 IAR port to the latest version of IAR which uses the
|
||||
industry standard ELF format as opposed to earlier UBROF object format.
|
||||
Contributed by @felipe-iar.
|
||||
+ Add tick type is atomic flag when tick count is 16-bit to PIC24 port. This
|
||||
allows the PIC24 family of 16 bit processors to read the tick count without
|
||||
a critical section when the tick count is also 16 bits.
|
||||
+ Fix offset-out-of-range errors for GCC CM3/CM4 mpu ports when
|
||||
Link Time Optimization is enabled. Contributed by @niniemann.
|
||||
+ Remove #error when RISC-V port is compiled on a 64-bit RISC-V platform.
|
||||
Contributed by @cmdrf.
|
||||
+ Fix ullPortInterruptNesting alignment in Cortex-A53 port so that it is
|
||||
8-byte aligned. This fixes the unaligned access exception. Contributed
|
||||
by @Atomar25.
|
||||
+ Fix Interrupt Handler Register Function and Exception Process in NiosII
|
||||
Port. Contributed by @ghost.
|
||||
+ Change FreeRTOS IRQ Handler for Cortex-A53 SRE port to store and restore
|
||||
interrupt acknowledge register. This ensures that the SRE port behavior
|
||||
matches the Memory Mapped IO port. Contributed by @sviaunxp.
|
||||
+ Update the uncrustify config file to match the version of the uncrustify
|
||||
used in the CI Action. Also, pin the version of uncrustify in CI. Contributed
|
||||
by @swaldhoer.
|
||||
|
||||
Changes between FreeRTOS V10.4.5 and FreeRTOS V10.4.6 released November 12 2021
|
||||
Changes between FreeRTOS V10.4.3 LTS Patch 1 and FreeRTOS V10.4.3 LTS Patch 2 released November 12 2021
|
||||
|
||||
+ ARMv7-M and ARMv8-M MPU ports – prevent non-kernel code from calling the
|
||||
internal functions xPortRaisePrivilege and vPortResetPrivilege by changing
|
||||
them to macros.
|
||||
+ Introduce a new config configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS which
|
||||
enables developers to prevent critical sections from unprivileged tasks.
|
||||
It defaults to 1 for backward compatibility. Application should set it to
|
||||
0 to disable critical sections from unprivileged tasks.
|
||||
|
||||
Changes between FreeRTOS V10.4.4 and FreeRTOS V10.4.5 released September 10 2021
|
||||
Changes between FreeRTOS V10.4.3 and FreeRTOS V10.4.3 LTS Patch 1 released September 10 2021
|
||||
|
||||
See https://www.FreeRTOS.org/FreeRTOS-V10.4.5.html
|
||||
|
||||
+ Introduce configRUN_TIME_COUNTER_TYPE which enables developers to define
|
||||
the type used to hold run time statistic counters. Defaults to uint32_t
|
||||
for backward compatibility. #define configRUN_TIME_COUNTER_TYPE to a type
|
||||
(for example, uint64_t) in FreeRTOSConfig.h to override the default.
|
||||
+ Introduce ulTaskGetIdleRunTimePercent() to complement the pre-existing
|
||||
ulTaskGetIdleRunTimeCounter(). Whereas the pre-existing function returns
|
||||
the raw run time counter value, the new function returns the percentage of
|
||||
the entire run time consumed by the idle task. Note the amount of idle
|
||||
time is only a good measure of the slack time in a system if there are no
|
||||
other tasks executing at the idle priority, tickless idle is not used, and
|
||||
configIDLE_SHOULD_YIELD is set to 0.
|
||||
+ ARMv8-M secure-side port: Tasks that call secure functions from the
|
||||
non-secure side of an ARMv8-M MCU (ARM Cortex-M23 and Cortex-M33) have two
|
||||
contexts - one on the non-secure side and one on the secure-side. Previous
|
||||
contexts – one on the non-secure side and one on the secure-side. Previous
|
||||
versions of the FreeRTOS ARMv8-M secure-side ports allocated the structures
|
||||
that reference secure-side contexts at run time. Now the structures are
|
||||
allocated statically at compile time. The change necessitates the
|
||||
|
|
@ -627,44 +59,6 @@ Changes between FreeRTOS V10.4.4 and FreeRTOS V10.4.5 released September 10 2021
|
|||
those running third-party code on the secure side, are not affected by
|
||||
this change.
|
||||
|
||||
Changes between FreeRTOS V10.4.3 and FreeRTOS V10.4.4 released May 28 2021
|
||||
+ Minor performance improvements to xTaskIncrementTick() achieved by providing
|
||||
macro versions of uxListRemove() and vListInsertEnd().
|
||||
+ Minor refactor of timers.c that obsoletes the need for the
|
||||
tmrCOMMAND_START_DONT_TRACE macro and removes the need for timers.c to
|
||||
post to its own event queue. A consequence of this change is that auto-
|
||||
reload timers that miss their intended next execution time will execute
|
||||
again immediately rather than executing again the next time the command
|
||||
queue is processed. (thanks Jeff Tenney).
|
||||
+ Fix a race condition in the message buffer implementation. The
|
||||
underlying cause was that length and data bytes are written and read as
|
||||
two distinct operations, which both modify the size of the buffer. If a
|
||||
context switch occurs after adding or removing the length bytes, but
|
||||
before adding or removing the data bytes, then another task may observe
|
||||
the message buffer in an invalid state.
|
||||
+ The xTaskCreate() and xTaskCreateStatic() functions accept a task priority
|
||||
as an input parameter. The priority has always been silently capped to
|
||||
(configMAX_PRIORITIES - 1) should it be set to a value above that priority.
|
||||
Now values above that priority will also trigger a configASSERT() failure.
|
||||
+ Replace configASSERT( pcQueueName ) in vQueueAddToRegistry with a NULL
|
||||
pointer check.
|
||||
+ Introduce the configSTACK_ALLOCATION_FROM_SEPARATE_HEAP configuration
|
||||
constant that enables the stack allocated to tasks to come from a heap other
|
||||
than the heap used by other memory allocations. This enables stacks to be
|
||||
placed within special regions, such as fast tightly coupled memory.
|
||||
+ If there is an attempt to add the same queue or semaphore handle to the
|
||||
queue registry more than once then prior versions would create two separate
|
||||
entries. Now if this is done the first entry is overwritten rather than
|
||||
duplicated.
|
||||
+ Update the ESP32 port and TF-M (Trusted Firmware M)code to the latest from
|
||||
their respective repositories.
|
||||
+ Correct a build error in the POSIX port.
|
||||
+ Additional minor formatting updates, including replacing tabs with spaces
|
||||
in more files.
|
||||
+ Other minor updates include adding additional configASSERT() checks and
|
||||
correcting and improving code comments.
|
||||
+ Go look at the smp branch to see the progress towards the Symmetric
|
||||
Multiprocessing Kernel. https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/smp
|
||||
|
||||
Changes between FreeRTOS V10.4.2 and FreeRTOS V10.4.3 released December 14 2020
|
||||
|
||||
|
|
@ -745,7 +139,7 @@ Changes between FreeRTOS V10.3.1 and FreeRTOS V10.4.0 released September 10 2020
|
|||
the same way the Windows port layer enables FreeRTOS to run on Windows
|
||||
hosts.
|
||||
+ Many other minor optimisations and enhancements. For full details
|
||||
see https://github.com/FreeRTOS/FreeRTOS-Kernel/commits/main
|
||||
see https://github.com/FreeRTOS/FreeRTOS-Kernel/commits/master
|
||||
|
||||
|
||||
Changes between FreeRTOS V10.3.0 and FreeRTOS V10.3.1 released February 18 2020
|
||||
|
|
@ -2150,7 +1544,7 @@ Changes between V6.1.0 and V6.1.1 released January 14 2011
|
|||
Embedded Workbench.
|
||||
+ Added a new port for the MSP430X core using the IAR Embedded Workbench.
|
||||
+ Updated all the RX62N demo projects that target the Renesas Demonstration
|
||||
Kit (RDK) to take into account the reversed LED wiring on later hardware
|
||||
Kit (RDK) to take into account the revered LED wiring on later hardware
|
||||
revisions, and the new J-Link debug interface DLL.
|
||||
+ Updated all the RX62N demo projects so the IO page served by the example
|
||||
embedded web server works with all web browsers.
|
||||
|
|
@ -3309,7 +2703,7 @@ Changes between V1.2.3 and V1.2.4
|
|||
xSerialPortInitMinimal() and the function xPortInit() has been renamed
|
||||
to xSerialPortInit().
|
||||
+ The function sSerialPutChar() has been renamed cSerialPutChar() and
|
||||
the function return type changed to portCHAR.
|
||||
the function return type chaned to portCHAR.
|
||||
+ The integer and flop tasks now include calls to tskYIELD(), allowing
|
||||
them to be used with the cooperative scheduler.
|
||||
+ All the demo applications now use the integer and comtest tasks when the
|
||||
|
|
@ -3443,7 +2837,7 @@ Changes between V1.01 and V1.2.0
|
|||
ports to allocate a different maximum number of priorities.
|
||||
+ By default the trace facility is off, previously USE_TRACE_FACILITY
|
||||
was defined.
|
||||
+ comtest.c now uses a pseudo random delay between sends. This allows for
|
||||
+ comtest.c now uses a psuedo random delay between sends. This allows for
|
||||
better testing as the interrupts do not arrive at regular intervals.
|
||||
+ Minor change to the Flashlite serial port driver. The driver is written
|
||||
to demonstrate the scheduler and is not written to be efficient.
|
||||
|
|
@ -3492,3 +2886,6 @@ Changes between V1.00 and V1.01
|
|||
+ Prevent the call to kbhit() in main.c for debug builds as the debugger
|
||||
seems to have problems stepping over the call. This if for the PC port
|
||||
only.
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
145
MISRA.md
145
MISRA.md
|
|
@ -1,145 +0,0 @@
|
|||
# MISRA Compliance
|
||||
|
||||
FreeRTOS-Kernel conforms to [MISRA C:2012](https://www.misra.org.uk/misra-c)
|
||||
guidelines, with the deviations listed below. Compliance is checked with
|
||||
Coverity static analysis version 2023.6.1. Since the FreeRTOS kernel is
|
||||
designed for small-embedded devices, it needs to have a very small memory
|
||||
footprint and has to be efficient. To achieve that and to increase the
|
||||
performance, it deviates from some MISRA rules. The specific deviations,
|
||||
suppressed inline, are listed below.
|
||||
|
||||
Additionally, [MISRA configuration file](examples/coverity/coverity_misra.config)
|
||||
contains project wide deviations.
|
||||
|
||||
### Suppressed with Coverity Comments
|
||||
To find the violation references in the source files run grep on the source code
|
||||
with ( Assuming rule 8.4 violation; with justification in point 1 ):
|
||||
```
|
||||
grep 'MISRA Ref 8.4.1' . -rI
|
||||
```
|
||||
|
||||
#### Dir 4.7
|
||||
MISRA C:2012 Dir 4.7: If a function returns error information, then that error
|
||||
information shall be tested.
|
||||
|
||||
_Ref 4.7.1_
|
||||
- `taskENTER_CRITICAL_FROM_ISR` returns the interrupt mask and not any error
|
||||
information. Therefore, there is no need test the return value.
|
||||
|
||||
#### Rule 8.4
|
||||
|
||||
MISRA C:2012 Rule 8.4: A compatible declaration shall be visible when an
|
||||
object or function with external linkage is defined.
|
||||
|
||||
_Ref 8.4.1_
|
||||
- pxCurrentTCB(s) is defined with external linkage but it is only referenced
|
||||
from the assembly code in the port files. Therefore, adding a declaration in
|
||||
header file is not useful as the assembly code will still need to declare it
|
||||
separately.
|
||||
|
||||
_Ref 8.4.2_
|
||||
- xQueueRegistry is defined with external linkage because it is accessed by the
|
||||
kernel unit tests. It is not meant to be directly accessed by the application
|
||||
and therefore, not declared in a header file.
|
||||
|
||||
#### Rule 8.6
|
||||
|
||||
MISRA C:2012 Rule 8.6: An identifier with external linkage shall have exactly
|
||||
one external definition.
|
||||
|
||||
_Ref 8.6.1_
|
||||
- This rule prohibits an identifier with external linkage to have multiple
|
||||
definitions or no definition. FreeRTOS hook functions are implemented in
|
||||
the application and therefore, have no definition in the Kernel code.
|
||||
|
||||
#### Rule 11.1
|
||||
MISRA C:2012 Rule 11.1: Conversions shall not be performed between a pointer to
|
||||
function and any other type.
|
||||
|
||||
_Ref 11.1.1_
|
||||
- The pointer to function is casted into void to avoid unused parameter
|
||||
compiler warning when Stream Buffer's Tx and Rx Completed callback feature is
|
||||
not used.
|
||||
|
||||
#### Rule 11.3
|
||||
|
||||
MISRA C:2012 Rule 11.3: A cast shall not be performed between a pointer to
|
||||
object type and a pointer to a different object type.
|
||||
|
||||
_Ref 11.3.1_
|
||||
- This rule prohibits casting a pointer to object into a pointer to a
|
||||
different object because it may result in an incorrectly aligned pointer,
|
||||
leading to undefined behavior. Even if the casting produces a correctly
|
||||
aligned pointer, the behavior may be still undefined if the pointer is
|
||||
used to access an object. FreeRTOS deliberately creates external aliases
|
||||
for all the kernel object types (StaticEventGroup_t, StaticQueue_t,
|
||||
StaticStreamBuffer_t, StaticTimer_t and StaticTask_t) for data hiding
|
||||
purposes. The internal object types and the corresponding external
|
||||
aliases are guaranteed to have the same size and alignment which is
|
||||
checked using configASSERT.
|
||||
|
||||
|
||||
#### Rule 11.5
|
||||
|
||||
MISRA C:2012 Rule 11.5: A conversion should not be performed from pointer to
|
||||
void into pointer to object.
|
||||
This rule prohibits conversion of a pointer to void into a pointer to
|
||||
object because it may result in an incorrectly aligned pointer leading
|
||||
to undefined behavior.
|
||||
|
||||
_Ref 11.5.1_
|
||||
- The memory blocks returned by pvPortMalloc() are guaranteed to meet the
|
||||
architecture alignment requirements specified by portBYTE_ALIGNMENT.
|
||||
The casting of the pointer to void returned by pvPortMalloc() is,
|
||||
therefore, safe because it is guaranteed to be aligned.
|
||||
|
||||
_Ref 11.5.2_
|
||||
- The conversion from a pointer to void into a pointer to EventGroup_t is
|
||||
safe because it is a pointer to EventGroup_t, which is returned to the
|
||||
application at the time of event group creation for data hiding
|
||||
purposes.
|
||||
|
||||
_Ref 11.5.3_
|
||||
- The conversion from a pointer to void in list macros for list item owner
|
||||
is safe because the type of the pointer stored and retrieved is the
|
||||
same.
|
||||
|
||||
_Ref 11.5.4_
|
||||
- The conversion from a pointer to void into a pointer to EventGroup_t is
|
||||
safe because it is a pointer to EventGroup_t, which is passed as a
|
||||
parameter to the xTimerPendFunctionCallFromISR API when the callback is
|
||||
pended.
|
||||
|
||||
_Ref 11.5.5_
|
||||
- The conversion from a pointer to void into a pointer to uint8_t is safe
|
||||
because data storage buffers are implemented as uint8_t arrays for the
|
||||
ease of sizing, alignment and access.
|
||||
|
||||
#### Rule 14.3
|
||||
|
||||
MISRA C-2012 Rule 14.3: Controlling expressions shall not be invariant.
|
||||
|
||||
_Ref 14.3_
|
||||
- The `configMAX_TASK_NAME_LEN` , `taskRESERVED_TASK_NAME_LENGTH` and `SIZE_MAX`
|
||||
are evaluated to constants at compile time and may vary based on the build
|
||||
configuration.
|
||||
|
||||
#### Rule 18.1
|
||||
|
||||
MISRA C-2012 Rule 18.1: A pointer resulting from arithmetic on a pointer operand
|
||||
shall address an element of the same array as that pointer operand.
|
||||
|
||||
_Ref 18.1_
|
||||
- Array access remains within bounds since either the null terminator in
|
||||
the IDLE task name will break the loop, or the loop will break normally
|
||||
if the array size is smaller than the IDLE task name length.
|
||||
|
||||
#### Rule 21.6
|
||||
|
||||
MISRA C-2012 Rule 21.6: The Standard Library input/output functions shall not
|
||||
be used.
|
||||
|
||||
_Ref 21.6.1_
|
||||
- The Standard Library function snprintf is used in vTaskListTasks and
|
||||
vTaskGetRunTimeStatistics APIs, both of which are utility functions only and
|
||||
are not considered part of core kernel implementation.
|
||||
171
README.md
171
README.md
|
|
@ -1,125 +1,25 @@
|
|||
[](https://github.com/FreeRTOS/FreeRTOS-Kernel/actions/workflows/unit-tests.yml?query=branch%3Amain+event%3Apush+workflow%3A%22CMock+Unit+Tests%22++)
|
||||
[](https://codecov.io/gh/FreeRTOS/FreeRTOS-Kernel)
|
||||
|
||||
## Getting started
|
||||
This repository contains FreeRTOS kernel source/header files and kernel ports only. This repository is referenced as a submodule in [FreeRTOS/FreeRTOS](https://github.com/FreeRTOS/FreeRTOS) repository, which contains pre-configured demo application projects under ```FreeRTOS/Demo``` directory.
|
||||
|
||||
This repository contains FreeRTOS kernel source/header files and kernel
|
||||
ports only. This repository is referenced as a submodule in
|
||||
[FreeRTOS/FreeRTOS](https://github.com/FreeRTOS/FreeRTOS)
|
||||
repository, which contains pre-configured demo application projects under
|
||||
```FreeRTOS/Demo``` directory.
|
||||
The easiest way to use FreeRTOS is to start with one of the pre-configured demo application projects. That way you will have the correct FreeRTOS source files included, and the correct include paths configured. Once a demo application is building and executing you can remove the demo application files, and start to add in your own application source files. See the [FreeRTOS Kernel Quick Start Guide](https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html) for detailed instructions and other useful links.
|
||||
|
||||
The easiest way to use FreeRTOS is to start with one of the pre-configured demo
|
||||
application projects. That way you will have the correct FreeRTOS source files
|
||||
included, and the correct include paths configured. Once a demo application is
|
||||
building and executing you can remove the demo application files, and start to
|
||||
add in your own application source files. See the
|
||||
[FreeRTOS Kernel Quick Start Guide](https://www.freertos.org/Documentation/01-FreeRTOS-quick-start/01-Beginners-guide/02-Quick-start-guide)
|
||||
for detailed instructions and other useful links.
|
||||
|
||||
Additionally, for FreeRTOS kernel feature information refer to the
|
||||
[Developer Documentation](https://www.freertos.org/Documentation/02-Kernel/02-Kernel-features/00-Developer-docs),
|
||||
and [API Reference](https://www.freertos.org/Documentation/02-Kernel/04-API-references/01-Task-creation/00-TaskHandle).
|
||||
|
||||
Also for contributing and creating a Pull Request please refer to
|
||||
[the instructions here](.github/CONTRIBUTING.md#contributing-via-pull-request).
|
||||
|
||||
**FreeRTOS-Kernel V11.1.0
|
||||
[source code](https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/V11.1.0) is part
|
||||
of the
|
||||
[FreeRTOS 202406.00 LTS](https://github.com/FreeRTOS/FreeRTOS-LTS/tree/202406-LTS)
|
||||
release.**
|
||||
Additionally, for FreeRTOS kernel feature information refer to the [Developer Documentation](https://www.FreeRTOS.org/features.html), and [API Reference](https://www.FreeRTOS.org/a00106.html).
|
||||
|
||||
### Getting help
|
||||
If you have any questions or need assistance troubleshooting your FreeRTOS project, we have an active community that can help on the [FreeRTOS Community Support Forum](https://forums.freertos.org).
|
||||
|
||||
If you have any questions or need assistance troubleshooting your FreeRTOS project,
|
||||
we have an active community that can help on the
|
||||
[FreeRTOS Community Support Forum](https://forums.freertos.org).
|
||||
|
||||
## To consume FreeRTOS-Kernel
|
||||
|
||||
### Consume with CMake
|
||||
|
||||
If using CMake, it is recommended to use this repository using FetchContent.
|
||||
Add the following into your project's main or a subdirectory's `CMakeLists.txt`:
|
||||
|
||||
- Define the source and version/tag you want to use:
|
||||
|
||||
```cmake
|
||||
FetchContent_Declare( freertos_kernel
|
||||
GIT_REPOSITORY https://github.com/FreeRTOS/FreeRTOS-Kernel.git
|
||||
GIT_TAG main #Note: Best practice to use specific git-hash or tagged version
|
||||
)
|
||||
```
|
||||
|
||||
In case you prefer to add it as a git submodule, do:
|
||||
|
||||
```bash
|
||||
git submodule add https://github.com/FreeRTOS/FreeRTOS-Kernel.git <path of the submodule>
|
||||
git submodule update --init
|
||||
```
|
||||
|
||||
- Add a freertos_config library (typically an INTERFACE library) The following assumes the directory structure:
|
||||
- `include/FreeRTOSConfig.h`
|
||||
|
||||
```cmake
|
||||
add_library(freertos_config INTERFACE)
|
||||
|
||||
target_include_directories(freertos_config SYSTEM
|
||||
INTERFACE
|
||||
include
|
||||
)
|
||||
|
||||
target_compile_definitions(freertos_config
|
||||
INTERFACE
|
||||
projCOVERAGE_TEST=0
|
||||
)
|
||||
```
|
||||
|
||||
In case you installed FreeRTOS-Kernel as a submodule, you will have to add it as a subdirectory:
|
||||
|
||||
```cmake
|
||||
add_subdirectory(${FREERTOS_PATH})
|
||||
```
|
||||
|
||||
- Configure the FreeRTOS-Kernel and make it available
|
||||
- this particular example supports a native and cross-compiled build option.
|
||||
|
||||
```cmake
|
||||
set( FREERTOS_HEAP "4" CACHE STRING "" FORCE)
|
||||
# Select the native compile PORT
|
||||
set( FREERTOS_PORT "GCC_POSIX" CACHE STRING "" FORCE)
|
||||
# Select the cross-compile PORT
|
||||
if (CMAKE_CROSSCOMPILING)
|
||||
set(FREERTOS_PORT "GCC_ARM_CA9" CACHE STRING "" FORCE)
|
||||
endif()
|
||||
|
||||
FetchContent_MakeAvailable(freertos_kernel)
|
||||
```
|
||||
|
||||
- In case of cross compilation, you should also add the following to `freertos_config`:
|
||||
|
||||
```cmake
|
||||
target_compile_definitions(freertos_config INTERFACE ${definitions})
|
||||
target_compile_options(freertos_config INTERFACE ${options})
|
||||
```
|
||||
|
||||
### Consuming stand-alone - Cloning this repository
|
||||
## Cloning this repository
|
||||
|
||||
To clone using HTTPS:
|
||||
|
||||
```
|
||||
git clone https://github.com/FreeRTOS/FreeRTOS-Kernel.git
|
||||
```
|
||||
|
||||
Using SSH:
|
||||
|
||||
```
|
||||
git clone git@github.com:FreeRTOS/FreeRTOS-Kernel.git
|
||||
```
|
||||
|
||||
## Repository structure
|
||||
|
||||
- The root of this repository contains the three files that are common to
|
||||
every port - list.c, queue.c and tasks.c. The kernel is contained within these
|
||||
three files. croutine.c implements the optional co-routine functionality - which
|
||||
|
|
@ -130,63 +30,10 @@ See the readme file in the ```./portable``` directory for more information.
|
|||
|
||||
- The ```./include``` directory contains the real time kernel header files.
|
||||
|
||||
- The ```./template_configuration``` directory contains a sample `FreeRTOSConfig.h` to help jumpstart a new project.
|
||||
See the [FreeRTOSConfig.h](examples/template_configuration/FreeRTOSConfig.h) file for instructions.
|
||||
|
||||
### Code Formatting
|
||||
FreeRTOS files are formatted using the "uncrustify" tool. The configuration file used by uncrustify can be found in the [FreeRTOS/FreeRTOS repository](https://github.com/FreeRTOS/FreeRTOS/blob/master/tools/uncrustify.cfg).
|
||||
|
||||
FreeRTOS files are formatted using the
|
||||
"[uncrustify](https://github.com/uncrustify/uncrustify)" tool.
|
||||
The configuration file used by uncrustify can be found in the
|
||||
[FreeRTOS/CI-CD-GitHub-Actions's](https://github.com/FreeRTOS/CI-CD-Github-Actions)
|
||||
[uncrustify.cfg](https://github.com/FreeRTOS/CI-CD-Github-Actions/tree/main/formatting)
|
||||
file.
|
||||
### Spelling
|
||||
*lexicon.txt* contains words that are not traditionally found in an English dictionary. It is used by the spellchecker to verify the various jargon, variable names, and other odd words used in the FreeRTOS code base. If your pull request fails to pass the spelling and you believe this is a mistake, then add the word to *lexicon.txt*.
|
||||
Note that only the FreeRTOS Kernel source files are checked for proper spelling, the portable section is ignored.
|
||||
|
||||
### Line Endings
|
||||
|
||||
File checked into the FreeRTOS-Kernel repository use unix-style LF line endings
|
||||
for the best compatibility with git.
|
||||
|
||||
For optimal compatibility with Microsoft Windows tools, it is best to enable
|
||||
the git autocrlf feature. You can enable this setting for the current
|
||||
repository using the following command:
|
||||
|
||||
```
|
||||
git config core.autocrlf true
|
||||
```
|
||||
|
||||
### Git History Optimizations
|
||||
|
||||
Some commits in this repository perform large refactors which touch many lines
|
||||
and lead to unwanted behavior when using the `git blame` command. You can
|
||||
configure git to ignore the list of large refactor commits in this repository
|
||||
with the following command:
|
||||
|
||||
```
|
||||
git config blame.ignoreRevsFile .git-blame-ignore-revs
|
||||
```
|
||||
|
||||
### Spelling and Formatting
|
||||
|
||||
We recommend using [Visual Studio Code](https://code.visualstudio.com),
|
||||
commonly referred to as VSCode, when working on the FreeRTOS-Kernel.
|
||||
The FreeRTOS-Kernel also uses [cSpell](https://cspell.org/) as part of its
|
||||
spelling check. The config file for which can be found at [cspell.config.yaml](cspell.config.yaml)
|
||||
There is additionally a
|
||||
[cSpell plugin for VSCode](https://marketplace.visualstudio.com/items?itemName=streetsidesoftware.code-spell-checker)
|
||||
that can be used as well.
|
||||
*[.cSpellWords.txt](.github/.cSpellWords.txt)* contains words that are not
|
||||
traditionally found in an English dictionary. It is used by the spellchecker
|
||||
to verify the various jargon, variable names, and other odd words used in the
|
||||
FreeRTOS code base are correct. If your pull request fails to pass the spelling
|
||||
and you believe this is a mistake, then add the word to
|
||||
*[.cSpellWords.txt](.github/.cSpellWords.txt)*. When adding a word please
|
||||
then sort the list, which can be done by running the bash command:
|
||||
`sort -u .cSpellWords.txt -o .cSpellWords.txt`
|
||||
Note that only the FreeRTOS-Kernel Source Files, [include](include),
|
||||
[portable/MemMang](portable/MemMang), and [portable/Common](portable/Common)
|
||||
files are checked for proper spelling, and formatting at this time.
|
||||
|
||||
## Third Party Tools
|
||||
Visit [this link](.github/third_party_tools.md) for detailed information about
|
||||
third-party tools with FreeRTOS support.
|
||||
|
|
|
|||
76
croutine.c
76
croutine.c
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -30,7 +28,7 @@
|
|||
#include "task.h"
|
||||
#include "croutine.h"
|
||||
|
||||
/* Remove the whole file if co-routines are not being used. */
|
||||
/* Remove the whole file is co-routines are not being used. */
|
||||
#if ( configUSE_CO_ROUTINES != 0 )
|
||||
|
||||
/*
|
||||
|
|
@ -43,19 +41,17 @@
|
|||
|
||||
|
||||
/* Lists for ready and blocked co-routines. --------------------*/
|
||||
static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /**< Prioritised ready co-routines. */
|
||||
static List_t xDelayedCoRoutineList1; /**< Delayed co-routines. */
|
||||
static List_t xDelayedCoRoutineList2; /**< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */
|
||||
static List_t * pxDelayedCoRoutineList = NULL; /**< Points to the delayed co-routine list currently being used. */
|
||||
static List_t * pxOverflowDelayedCoRoutineList = NULL; /**< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */
|
||||
static List_t xPendingReadyCoRoutineList; /**< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */
|
||||
static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */
|
||||
static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */
|
||||
static List_t xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */
|
||||
static List_t * pxDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used. */
|
||||
static List_t * pxOverflowDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */
|
||||
static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */
|
||||
|
||||
/* Other file private variables. --------------------------------*/
|
||||
CRCB_t * pxCurrentCoRoutine = NULL;
|
||||
static UBaseType_t uxTopCoRoutineReadyPriority = ( UBaseType_t ) 0U;
|
||||
static TickType_t xCoRoutineTickCount = ( TickType_t ) 0U;
|
||||
static TickType_t xLastTickCount = ( TickType_t ) 0U;
|
||||
static TickType_t xPassedTicks = ( TickType_t ) 0U;
|
||||
static UBaseType_t uxTopCoRoutineReadyPriority = 0;
|
||||
static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;
|
||||
|
||||
/* The initial state of the co-routine when it is created. */
|
||||
#define corINITIAL_STATE ( 0 )
|
||||
|
|
@ -68,13 +64,13 @@
|
|||
* used from within an ISR.
|
||||
*/
|
||||
#define prvAddCoRoutineToReadyQueue( pxCRCB ) \
|
||||
do { \
|
||||
if( ( pxCRCB )->uxPriority > uxTopCoRoutineReadyPriority ) \
|
||||
{ \
|
||||
uxTopCoRoutineReadyPriority = ( pxCRCB )->uxPriority; \
|
||||
if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \
|
||||
{ \
|
||||
uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \
|
||||
} \
|
||||
vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ ( pxCRCB )->uxPriority ] ), &( ( pxCRCB )->xGenericListItem ) ); \
|
||||
} while( 0 )
|
||||
vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \
|
||||
}
|
||||
|
||||
/*
|
||||
* Utility to ready all the lists used by the scheduler. This is called
|
||||
|
|
@ -109,12 +105,7 @@
|
|||
BaseType_t xReturn;
|
||||
CRCB_t * pxCoRoutine;
|
||||
|
||||
traceENTER_xCoRoutineCreate( pxCoRoutineCode, uxPriority, uxIndex );
|
||||
|
||||
/* Allocate the memory that will store the co-routine control block. */
|
||||
/* MISRA Ref 11.5.1 [Malloc memory assignment] */
|
||||
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
|
||||
/* coverity[misra_c_2012_rule_11_5_violation] */
|
||||
pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) );
|
||||
|
||||
if( pxCoRoutine )
|
||||
|
|
@ -163,8 +154,6 @@
|
|||
xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
|
||||
}
|
||||
|
||||
traceRETURN_xCoRoutineCreate( xReturn );
|
||||
|
||||
return xReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -174,8 +163,6 @@
|
|||
{
|
||||
TickType_t xTimeToWake;
|
||||
|
||||
traceENTER_vCoRoutineAddToDelayedList( xTicksToDelay, pxEventList );
|
||||
|
||||
/* Calculate the time to wake - this may overflow but this is
|
||||
* not a problem. */
|
||||
xTimeToWake = xCoRoutineTickCount + xTicksToDelay;
|
||||
|
|
@ -207,8 +194,6 @@
|
|||
* function must be called with interrupts disabled. */
|
||||
vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) );
|
||||
}
|
||||
|
||||
traceRETURN_vCoRoutineAddToDelayedList();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -296,8 +281,6 @@
|
|||
|
||||
void vCoRoutineSchedule( void )
|
||||
{
|
||||
traceENTER_vCoRoutineSchedule();
|
||||
|
||||
/* Only run a co-routine after prvInitialiseCoRoutineLists() has been
|
||||
* called. prvInitialiseCoRoutineLists() is called automatically when a
|
||||
* co-routine is created. */
|
||||
|
|
@ -328,8 +311,6 @@
|
|||
/* Call the co-routine. */
|
||||
( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex );
|
||||
}
|
||||
|
||||
traceRETURN_vCoRoutineSchedule();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -358,8 +339,6 @@
|
|||
CRCB_t * pxUnblockedCRCB;
|
||||
BaseType_t xReturn;
|
||||
|
||||
traceENTER_xCoRoutineRemoveFromEventList( pxEventList );
|
||||
|
||||
/* This function is called from within an interrupt. It can only access
|
||||
* event lists and the pending ready list. This function assumes that a
|
||||
* check has already been made to ensure pxEventList is not empty. */
|
||||
|
|
@ -376,30 +355,7 @@
|
|||
xReturn = pdFALSE;
|
||||
}
|
||||
|
||||
traceRETURN_xCoRoutineRemoveFromEventList( xReturn );
|
||||
|
||||
return xReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Reset state in this file. This state is normally initialized at start up.
|
||||
* This function must be called by the application before restarting the
|
||||
* scheduler.
|
||||
*/
|
||||
void vCoRoutineResetState( void )
|
||||
{
|
||||
/* Lists for ready and blocked co-routines. */
|
||||
pxDelayedCoRoutineList = NULL;
|
||||
pxOverflowDelayedCoRoutineList = NULL;
|
||||
|
||||
/* Other file private variables. */
|
||||
pxCurrentCoRoutine = NULL;
|
||||
uxTopCoRoutineReadyPriority = ( UBaseType_t ) 0U;
|
||||
xCoRoutineTickCount = ( TickType_t ) 0U;
|
||||
xLastTickCount = ( TickType_t ) 0U;
|
||||
xPassedTicks = ( TickType_t ) 0U;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#endif /* configUSE_CO_ROUTINES == 0 */
|
||||
|
|
|
|||
|
|
@ -1,31 +0,0 @@
|
|||
---
|
||||
$schema: https://raw.githubusercontent.com/streetsidesoftware/cspell/main/cspell.schema.json
|
||||
version: '0.2'
|
||||
# Allows things like stringLength
|
||||
allowCompoundWords: true
|
||||
|
||||
# Read files not to spell check from the git ignore
|
||||
useGitignore: true
|
||||
|
||||
# Language settings for C
|
||||
languageSettings:
|
||||
- caseSensitive: false
|
||||
enabled: true
|
||||
languageId: c
|
||||
locale: "*"
|
||||
|
||||
# Add a dictionary, and the path to the word list
|
||||
dictionaryDefinitions:
|
||||
- name: freertos-words
|
||||
path: '.github/.cSpellWords.txt'
|
||||
addWords: true
|
||||
|
||||
dictionaries:
|
||||
- freertos-words
|
||||
|
||||
# Paths and files to ignore
|
||||
ignorePaths:
|
||||
- 'dependency'
|
||||
- 'docs'
|
||||
- 'ThirdParty'
|
||||
- 'History.txt'
|
||||
230
event_groups.c
230
event_groups.c
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -40,28 +38,38 @@
|
|||
#include "timers.h"
|
||||
#include "event_groups.h"
|
||||
|
||||
/* The MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
|
||||
/* Lint e961, e750 and e9021 are suppressed as a MISRA exception justified
|
||||
* because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
|
||||
* for the header files above, but not in this file, in order to generate the
|
||||
* correct privileged Vs unprivileged linkage and placement. */
|
||||
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
|
||||
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021 See comment above. */
|
||||
|
||||
/* This entire source file will be skipped if the application is not configured
|
||||
* to include event groups functionality. This #if is closed at the very bottom
|
||||
* of this file. If you want to include event groups then ensure
|
||||
* configUSE_EVENT_GROUPS is set to 1 in FreeRTOSConfig.h. */
|
||||
#if ( configUSE_EVENT_GROUPS == 1 )
|
||||
/* The following bit fields convey control information in a task's event list
|
||||
* item value. It is important they don't clash with the
|
||||
* taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */
|
||||
#if configUSE_16_BIT_TICKS == 1
|
||||
#define eventCLEAR_EVENTS_ON_EXIT_BIT 0x0100U
|
||||
#define eventUNBLOCKED_DUE_TO_BIT_SET 0x0200U
|
||||
#define eventWAIT_FOR_ALL_BITS 0x0400U
|
||||
#define eventEVENT_BITS_CONTROL_BYTES 0xff00U
|
||||
#else
|
||||
#define eventCLEAR_EVENTS_ON_EXIT_BIT 0x01000000UL
|
||||
#define eventUNBLOCKED_DUE_TO_BIT_SET 0x02000000UL
|
||||
#define eventWAIT_FOR_ALL_BITS 0x04000000UL
|
||||
#define eventEVENT_BITS_CONTROL_BYTES 0xff000000UL
|
||||
#endif
|
||||
|
||||
typedef struct EventGroupDef_t
|
||||
{
|
||||
EventBits_t uxEventBits;
|
||||
List_t xTasksWaitingForBits; /**< List of tasks waiting for a bit to be set. */
|
||||
List_t xTasksWaitingForBits; /*< List of tasks waiting for a bit to be set. */
|
||||
|
||||
#if ( configUSE_TRACE_FACILITY == 1 )
|
||||
UBaseType_t uxEventGroupNumber;
|
||||
#endif
|
||||
|
||||
#if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
|
||||
uint8_t ucStaticallyAllocated; /**< Set to pdTRUE if the event group is statically allocated to ensure no attempt is made to free the memory. */
|
||||
uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the event group is statically allocated to ensure no attempt is made to free the memory. */
|
||||
#endif
|
||||
} EventGroup_t;
|
||||
|
||||
|
|
@ -87,8 +95,6 @@
|
|||
{
|
||||
EventGroup_t * pxEventBits;
|
||||
|
||||
traceENTER_xEventGroupCreateStatic( pxEventGroupBuffer );
|
||||
|
||||
/* A StaticEventGroup_t object must be provided. */
|
||||
configASSERT( pxEventGroupBuffer );
|
||||
|
||||
|
|
@ -99,14 +105,11 @@
|
|||
* event group structure. */
|
||||
volatile size_t xSize = sizeof( StaticEventGroup_t );
|
||||
configASSERT( xSize == sizeof( EventGroup_t ) );
|
||||
}
|
||||
} /*lint !e529 xSize is referenced if configASSERT() is defined. */
|
||||
#endif /* configASSERT_DEFINED */
|
||||
|
||||
/* The user has provided a statically allocated event group - use it. */
|
||||
/* MISRA Ref 11.3.1 [Misaligned access] */
|
||||
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
|
||||
/* coverity[misra_c_2012_rule_11_3_violation] */
|
||||
pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer;
|
||||
pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 !e9087 EventGroup_t and StaticEventGroup_t are deliberately aliased for data hiding purposes and guaranteed to have the same size and alignment requirement - checked by configASSERT(). */
|
||||
|
||||
if( pxEventBits != NULL )
|
||||
{
|
||||
|
|
@ -132,8 +135,6 @@
|
|||
traceEVENT_GROUP_CREATE_FAILED();
|
||||
}
|
||||
|
||||
traceRETURN_xEventGroupCreateStatic( pxEventBits );
|
||||
|
||||
return pxEventBits;
|
||||
}
|
||||
|
||||
|
|
@ -146,12 +147,20 @@
|
|||
{
|
||||
EventGroup_t * pxEventBits;
|
||||
|
||||
traceENTER_xEventGroupCreate();
|
||||
|
||||
/* MISRA Ref 11.5.1 [Malloc memory assignment] */
|
||||
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
|
||||
/* coverity[misra_c_2012_rule_11_5_violation] */
|
||||
pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) );
|
||||
/* Allocate the event group. Justification for MISRA deviation as
|
||||
* follows: pvPortMalloc() always ensures returned memory blocks are
|
||||
* aligned per the requirements of the MCU stack. In this case
|
||||
* pvPortMalloc() must return a pointer that is guaranteed to meet the
|
||||
* alignment requirements of the EventGroup_t structure - which (if you
|
||||
* follow it through) is the alignment requirements of the TickType_t type
|
||||
* (EventBits_t being of TickType_t itself). Therefore, whenever the
|
||||
* stack alignment requirements are greater than or equal to the
|
||||
* TickType_t alignment requirements the cast is safe. In other cases,
|
||||
* where the natural word size of the architecture is less than
|
||||
* sizeof( TickType_t ), the TickType_t variables will be accessed in two
|
||||
* or more reads operations, and the alignment requirements is only that
|
||||
* of each individual read. */
|
||||
pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) ); /*lint !e9087 !e9079 see comment above. */
|
||||
|
||||
if( pxEventBits != NULL )
|
||||
{
|
||||
|
|
@ -171,11 +180,9 @@
|
|||
}
|
||||
else
|
||||
{
|
||||
traceEVENT_GROUP_CREATE_FAILED();
|
||||
traceEVENT_GROUP_CREATE_FAILED(); /*lint !e9063 Else branch only exists to allow tracing and does not generate code if trace macros are not defined. */
|
||||
}
|
||||
|
||||
traceRETURN_xEventGroupCreate( pxEventBits );
|
||||
|
||||
return pxEventBits;
|
||||
}
|
||||
|
||||
|
|
@ -192,8 +199,6 @@
|
|||
BaseType_t xAlreadyYielded;
|
||||
BaseType_t xTimeoutOccurred = pdFALSE;
|
||||
|
||||
traceENTER_xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait );
|
||||
|
||||
configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
|
||||
configASSERT( uxBitsToWaitFor != 0 );
|
||||
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
|
||||
|
|
@ -251,7 +256,7 @@
|
|||
{
|
||||
if( xAlreadyYielded == pdFALSE )
|
||||
{
|
||||
taskYIELD_WITHIN_API();
|
||||
portYIELD_WITHIN_API();
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -303,8 +308,6 @@
|
|||
/* Prevent compiler warnings when trace macros are not used. */
|
||||
( void ) xTimeoutOccurred;
|
||||
|
||||
traceRETURN_xEventGroupSync( uxReturn );
|
||||
|
||||
return uxReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -320,8 +323,6 @@
|
|||
BaseType_t xWaitConditionMet, xAlreadyYielded;
|
||||
BaseType_t xTimeoutOccurred = pdFALSE;
|
||||
|
||||
traceENTER_xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait );
|
||||
|
||||
/* Check the user is not attempting to wait on the bits used by the kernel
|
||||
* itself, and that at least one bit is being requested. */
|
||||
configASSERT( xEventGroup );
|
||||
|
|
@ -407,7 +408,7 @@
|
|||
{
|
||||
if( xAlreadyYielded == pdFALSE )
|
||||
{
|
||||
taskYIELD_WITHIN_API();
|
||||
portYIELD_WITHIN_API();
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -463,8 +464,6 @@
|
|||
/* Prevent compiler warnings when trace macros are not used. */
|
||||
( void ) xTimeoutOccurred;
|
||||
|
||||
traceRETURN_xEventGroupWaitBits( uxReturn );
|
||||
|
||||
return uxReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -475,8 +474,6 @@
|
|||
EventGroup_t * pxEventBits = xEventGroup;
|
||||
EventBits_t uxReturn;
|
||||
|
||||
traceENTER_xEventGroupClearBits( xEventGroup, uxBitsToClear );
|
||||
|
||||
/* Check the user is not attempting to clear the bits used by the kernel
|
||||
* itself. */
|
||||
configASSERT( xEventGroup );
|
||||
|
|
@ -495,8 +492,6 @@
|
|||
}
|
||||
taskEXIT_CRITICAL();
|
||||
|
||||
traceRETURN_xEventGroupClearBits( uxReturn );
|
||||
|
||||
return uxReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -508,12 +503,8 @@
|
|||
{
|
||||
BaseType_t xReturn;
|
||||
|
||||
traceENTER_xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear );
|
||||
|
||||
traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear );
|
||||
xReturn = xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL );
|
||||
|
||||
traceRETURN_xEventGroupClearBitsFromISR( xReturn );
|
||||
xReturn = xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */
|
||||
|
||||
return xReturn;
|
||||
}
|
||||
|
|
@ -527,43 +518,33 @@
|
|||
EventGroup_t const * const pxEventBits = xEventGroup;
|
||||
EventBits_t uxReturn;
|
||||
|
||||
traceENTER_xEventGroupGetBitsFromISR( xEventGroup );
|
||||
|
||||
/* MISRA Ref 4.7.1 [Return value shall be checked] */
|
||||
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
|
||||
/* coverity[misra_c_2012_directive_4_7_violation] */
|
||||
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
|
||||
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
{
|
||||
uxReturn = pxEventBits->uxEventBits;
|
||||
}
|
||||
taskEXIT_CRITICAL_FROM_ISR( uxSavedInterruptStatus );
|
||||
|
||||
traceRETURN_xEventGroupGetBitsFromISR( uxReturn );
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
|
||||
|
||||
return uxReturn;
|
||||
}
|
||||
} /*lint !e818 EventGroupHandle_t is a typedef used in other functions to so can't be pointer to const. */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
|
||||
const EventBits_t uxBitsToSet )
|
||||
{
|
||||
ListItem_t * pxListItem;
|
||||
ListItem_t * pxNext;
|
||||
ListItem_t * pxListItem, * pxNext;
|
||||
ListItem_t const * pxListEnd;
|
||||
List_t const * pxList;
|
||||
EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits, uxReturnBits;
|
||||
EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits;
|
||||
EventGroup_t * pxEventBits = xEventGroup;
|
||||
BaseType_t xMatchFound = pdFALSE;
|
||||
|
||||
traceENTER_xEventGroupSetBits( xEventGroup, uxBitsToSet );
|
||||
|
||||
/* Check the user is not attempting to set the bits used by the kernel
|
||||
* itself. */
|
||||
configASSERT( xEventGroup );
|
||||
configASSERT( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
|
||||
|
||||
pxList = &( pxEventBits->xTasksWaitingForBits );
|
||||
pxListEnd = listGET_END_MARKER( pxList );
|
||||
pxListEnd = listGET_END_MARKER( pxList ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
|
||||
vTaskSuspendAll();
|
||||
{
|
||||
traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet );
|
||||
|
|
@ -635,28 +616,17 @@
|
|||
/* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT
|
||||
* bit was set in the control word. */
|
||||
pxEventBits->uxEventBits &= ~uxBitsToClear;
|
||||
|
||||
/* Snapshot resulting bits. */
|
||||
uxReturnBits = pxEventBits->uxEventBits;
|
||||
}
|
||||
( void ) xTaskResumeAll();
|
||||
|
||||
traceRETURN_xEventGroupSetBits( uxReturnBits );
|
||||
|
||||
return uxReturnBits;
|
||||
return pxEventBits->uxEventBits;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vEventGroupDelete( EventGroupHandle_t xEventGroup )
|
||||
{
|
||||
EventGroup_t * pxEventBits = xEventGroup;
|
||||
const List_t * pxTasksWaitingForBits;
|
||||
|
||||
traceENTER_vEventGroupDelete( xEventGroup );
|
||||
|
||||
configASSERT( pxEventBits );
|
||||
|
||||
pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits );
|
||||
const List_t * pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits );
|
||||
|
||||
vTaskSuspendAll();
|
||||
{
|
||||
|
|
@ -669,8 +639,6 @@
|
|||
configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( const ListItem_t * ) &( pxTasksWaitingForBits->xListEnd ) );
|
||||
vTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET );
|
||||
}
|
||||
}
|
||||
( void ) xTaskResumeAll();
|
||||
|
||||
#if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
|
||||
{
|
||||
|
|
@ -692,86 +660,26 @@
|
|||
}
|
||||
}
|
||||
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
|
||||
|
||||
traceRETURN_vEventGroupDelete();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
|
||||
BaseType_t xEventGroupGetStaticBuffer( EventGroupHandle_t xEventGroup,
|
||||
StaticEventGroup_t ** ppxEventGroupBuffer )
|
||||
{
|
||||
BaseType_t xReturn;
|
||||
EventGroup_t * pxEventBits = xEventGroup;
|
||||
|
||||
traceENTER_xEventGroupGetStaticBuffer( xEventGroup, ppxEventGroupBuffer );
|
||||
|
||||
configASSERT( pxEventBits );
|
||||
configASSERT( ppxEventGroupBuffer );
|
||||
|
||||
#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
|
||||
{
|
||||
/* Check if the event group was statically allocated. */
|
||||
if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdTRUE )
|
||||
{
|
||||
/* MISRA Ref 11.3.1 [Misaligned access] */
|
||||
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
|
||||
/* coverity[misra_c_2012_rule_11_3_violation] */
|
||||
*ppxEventGroupBuffer = ( StaticEventGroup_t * ) pxEventBits;
|
||||
xReturn = pdTRUE;
|
||||
( void ) xTaskResumeAll();
|
||||
}
|
||||
else
|
||||
{
|
||||
xReturn = pdFALSE;
|
||||
}
|
||||
}
|
||||
#else /* configSUPPORT_DYNAMIC_ALLOCATION */
|
||||
{
|
||||
/* Event group must have been statically allocated. */
|
||||
/* MISRA Ref 11.3.1 [Misaligned access] */
|
||||
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
|
||||
/* coverity[misra_c_2012_rule_11_3_violation] */
|
||||
*ppxEventGroupBuffer = ( StaticEventGroup_t * ) pxEventBits;
|
||||
xReturn = pdTRUE;
|
||||
}
|
||||
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
|
||||
|
||||
traceRETURN_xEventGroupGetStaticBuffer( xReturn );
|
||||
|
||||
return xReturn;
|
||||
}
|
||||
#endif /* configSUPPORT_STATIC_ALLOCATION */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* For internal use only - execute a 'set bits' command that was pended from
|
||||
* an interrupt. */
|
||||
void vEventGroupSetBitsCallback( void * pvEventGroup,
|
||||
uint32_t ulBitsToSet )
|
||||
const uint32_t ulBitsToSet )
|
||||
{
|
||||
traceENTER_vEventGroupSetBitsCallback( pvEventGroup, ulBitsToSet );
|
||||
|
||||
/* MISRA Ref 11.5.4 [Callback function parameter] */
|
||||
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
|
||||
/* coverity[misra_c_2012_rule_11_5_violation] */
|
||||
( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet );
|
||||
|
||||
traceRETURN_vEventGroupSetBitsCallback();
|
||||
( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* For internal use only - execute a 'clear bits' command that was pended from
|
||||
* an interrupt. */
|
||||
void vEventGroupClearBitsCallback( void * pvEventGroup,
|
||||
uint32_t ulBitsToClear )
|
||||
const uint32_t ulBitsToClear )
|
||||
{
|
||||
traceENTER_vEventGroupClearBitsCallback( pvEventGroup, ulBitsToClear );
|
||||
|
||||
/* MISRA Ref 11.5.4 [Callback function parameter] */
|
||||
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
|
||||
/* coverity[misra_c_2012_rule_11_5_violation] */
|
||||
( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear );
|
||||
|
||||
traceRETURN_vEventGroupClearBitsCallback();
|
||||
( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -820,12 +728,8 @@
|
|||
{
|
||||
BaseType_t xReturn;
|
||||
|
||||
traceENTER_xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken );
|
||||
|
||||
traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet );
|
||||
xReturn = xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken );
|
||||
|
||||
traceRETURN_xEventGroupSetBitsFromISR( xReturn );
|
||||
xReturn = xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */
|
||||
|
||||
return xReturn;
|
||||
}
|
||||
|
|
@ -838,13 +742,7 @@
|
|||
UBaseType_t uxEventGroupGetNumber( void * xEventGroup )
|
||||
{
|
||||
UBaseType_t xReturn;
|
||||
|
||||
/* MISRA Ref 11.5.2 [Opaque pointer] */
|
||||
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
|
||||
/* coverity[misra_c_2012_rule_11_5_violation] */
|
||||
EventGroup_t const * pxEventBits = ( EventGroup_t * ) xEventGroup;
|
||||
|
||||
traceENTER_uxEventGroupGetNumber( xEventGroup );
|
||||
EventGroup_t const * pxEventBits = ( EventGroup_t * ) xEventGroup; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */
|
||||
|
||||
if( xEventGroup == NULL )
|
||||
{
|
||||
|
|
@ -855,8 +753,6 @@
|
|||
xReturn = pxEventBits->uxEventGroupNumber;
|
||||
}
|
||||
|
||||
traceRETURN_uxEventGroupGetNumber( xReturn );
|
||||
|
||||
return xReturn;
|
||||
}
|
||||
|
||||
|
|
@ -868,20 +764,8 @@
|
|||
void vEventGroupSetNumber( void * xEventGroup,
|
||||
UBaseType_t uxEventGroupNumber )
|
||||
{
|
||||
traceENTER_vEventGroupSetNumber( xEventGroup, uxEventGroupNumber );
|
||||
|
||||
/* MISRA Ref 11.5.2 [Opaque pointer] */
|
||||
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
|
||||
/* coverity[misra_c_2012_rule_11_5_violation] */
|
||||
( ( EventGroup_t * ) xEventGroup )->uxEventGroupNumber = uxEventGroupNumber;
|
||||
|
||||
traceRETURN_vEventGroupSetNumber();
|
||||
( ( EventGroup_t * ) xEventGroup )->uxEventGroupNumber = uxEventGroupNumber; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */
|
||||
}
|
||||
|
||||
#endif /* configUSE_TRACE_FACILITY */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* This entire source file will be skipped if the application is not configured
|
||||
* to include event groups functionality. If you want to include event groups
|
||||
* then ensure configUSE_EVENT_GROUPS is set to 1 in FreeRTOSConfig.h. */
|
||||
#endif /* configUSE_EVENT_GROUPS == 1 */
|
||||
|
|
|
|||
|
|
@ -1,17 +0,0 @@
|
|||
# README for FreeRTOS-Kernel/examples
|
||||
|
||||
The easiest way to use FreeRTOS is to start with one of the pre-configured demo application projects.
|
||||
See [FreeRTOS/FreeRTOS/Demo](https://github.com/FreeRTOS/FreeRTOS/tree/main/FreeRTOS/Demo) to find a list of pre-configured demos on multiple platforms which demonstrate the working of the FreeRTOS-Kernel.
|
||||
This directory aims to further facilitate the beginners in building their first FreeRTOS project.
|
||||
|
||||
|
||||
## Directory Structure:
|
||||
|
||||
* The [cmake_example](./cmake_example) directory contains a minimal FreeRTOS example project, which uses the configuration file in the template_configuration directory listed below. This will provide you with a starting point for building your applications using FreeRTOS-Kernel.
|
||||
* The [coverity](./coverity) directory contains a project to run [Synopsys Coverity](https://www.synopsys.com/software-integrity/static-analysis-tools-sast/coverity.html) for checking MISRA compliance. This directory contains further readme files and links to documentation.
|
||||
* The [template_configuration](./template_configuration) directory contains a sample configuration file FreeRTOSConfig.h which helps you in preparing your application configuration
|
||||
|
||||
|
||||
## Additional examples
|
||||
|
||||
Additional examples of the kernel being used in real life applications in tandem with many other libraries (i.e. FreeRTOS+TCP, coreMQTT, coreHTTP etc.) can be found [here](https://github.com/FreeRTOS/FreeRTOS/tree/main/FreeRTOS-Plus/Demo).
|
||||
|
|
@ -1,74 +0,0 @@
|
|||
cmake_minimum_required(VERSION 3.15)
|
||||
project(example)
|
||||
|
||||
set(FREERTOS_KERNEL_PATH "../../")
|
||||
|
||||
# Add the freertos_config for FreeRTOS-Kernel
|
||||
add_library(freertos_config INTERFACE)
|
||||
|
||||
target_include_directories(freertos_config
|
||||
INTERFACE
|
||||
"../template_configuration"
|
||||
)
|
||||
|
||||
if (DEFINED FREERTOS_SMP_EXAMPLE AND FREERTOS_SMP_EXAMPLE STREQUAL "1")
|
||||
message(STATUS "Build FreeRTOS SMP example")
|
||||
# Adding the following configurations to build SMP template port
|
||||
add_compile_options( -DconfigNUMBER_OF_CORES=2 -DconfigUSE_PASSIVE_IDLE_HOOK=0 )
|
||||
endif()
|
||||
|
||||
# Select the heap port. values between 1-4 will pick a heap.
|
||||
set(FREERTOS_HEAP "4" CACHE STRING "" FORCE)
|
||||
|
||||
# Select the native compile PORT
|
||||
set(FREERTOS_PORT "TEMPLATE" CACHE STRING "" FORCE)
|
||||
|
||||
# Adding the FreeRTOS-Kernel subdirectory
|
||||
add_subdirectory(${FREERTOS_KERNEL_PATH} FreeRTOS-Kernel)
|
||||
|
||||
########################################################################
|
||||
# Overall Compile Options
|
||||
# Note the compile option strategy is to error on everything and then
|
||||
# Per library opt-out of things that are warnings/errors.
|
||||
# This ensures that no matter what strategy for compilation you take, the
|
||||
# builds will still occur.
|
||||
#
|
||||
# Only tested with GNU and Clang.
|
||||
# Other options are https://cmake.org/cmake/help/latest/variable/CMAKE_LANG_COMPILER_ID.html#variable:CMAKE_%3CLANG%3E_COMPILER_ID
|
||||
# Naming of compilers translation map:
|
||||
#
|
||||
# FreeRTOS | CMake
|
||||
# -------------------
|
||||
# CCS | ?TBD?
|
||||
# GCC | GNU, Clang, *Clang Others?
|
||||
# IAR | IAR
|
||||
# Keil | ARMCC
|
||||
# MSVC | MSVC # Note only for MinGW?
|
||||
# Renesas | ?TBD?
|
||||
|
||||
target_compile_options(freertos_kernel PRIVATE
|
||||
### Gnu/Clang C Options
|
||||
$<$<COMPILE_LANG_AND_ID:C,GNU>:-fdiagnostics-color=always>
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang>:-fcolor-diagnostics>
|
||||
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang,GNU>:-Wall>
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang,GNU>:-Wextra>
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang,GNU>:-Wpedantic>
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang,GNU>:-Werror>
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang,GNU>:-Wconversion>
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang>:-Weverything>
|
||||
|
||||
# Suppressions required to build clean with clang.
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang>:-Wno-unused-macros>
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang>:-Wno-padded>
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang>:-Wno-missing-variable-declarations>
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang>:-Wno-covered-switch-default>
|
||||
$<$<COMPILE_LANG_AND_ID:C,Clang>:-Wno-cast-align> )
|
||||
|
||||
add_executable(${PROJECT_NAME}
|
||||
main.c
|
||||
)
|
||||
|
||||
target_link_libraries(${PROJECT_NAME} freertos_kernel freertos_config)
|
||||
|
||||
set_property(TARGET freertos_kernel PROPERTY C_STANDARD 90)
|
||||
|
|
@ -1,104 +0,0 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* This is a simple main that will start the FreeRTOS-Kernel and run a periodic task
|
||||
* that only delays if compiled with the template port, this project will do nothing.
|
||||
* For more information on getting started please look here:
|
||||
* https://www.freertos.org/Documentation/01-FreeRTOS-quick-start/01-Beginners-guide/02-Quick-start-guide
|
||||
*/
|
||||
|
||||
/* FreeRTOS includes. */
|
||||
#include <FreeRTOS.h>
|
||||
#include <task.h>
|
||||
#include <queue.h>
|
||||
#include <timers.h>
|
||||
#include <semphr.h>
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdio.h>
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void exampleTask( void * parameters ) __attribute__( ( noreturn ) );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void exampleTask( void * parameters )
|
||||
{
|
||||
/* Unused parameters. */
|
||||
( void ) parameters;
|
||||
|
||||
for( ; ; )
|
||||
{
|
||||
/* Example Task Code */
|
||||
vTaskDelay( 100 ); /* delay 100 ticks */
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
int main( void )
|
||||
{
|
||||
static StaticTask_t exampleTaskTCB;
|
||||
static StackType_t exampleTaskStack[ configMINIMAL_STACK_SIZE ];
|
||||
|
||||
( void ) printf( "Example FreeRTOS Project\n" );
|
||||
|
||||
( void ) xTaskCreateStatic( exampleTask,
|
||||
"example",
|
||||
configMINIMAL_STACK_SIZE,
|
||||
NULL,
|
||||
configMAX_PRIORITIES - 1U,
|
||||
&( exampleTaskStack[ 0 ] ),
|
||||
&( exampleTaskTCB ) );
|
||||
|
||||
/* Start the scheduler. */
|
||||
vTaskStartScheduler();
|
||||
|
||||
for( ; ; )
|
||||
{
|
||||
/* Should not reach here. */
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configCHECK_FOR_STACK_OVERFLOW > 0 )
|
||||
|
||||
void vApplicationStackOverflowHook( TaskHandle_t xTask,
|
||||
char * pcTaskName )
|
||||
{
|
||||
/* Check pcTaskName for the name of the offending task,
|
||||
* or pxCurrentTCB if pcTaskName has itself been corrupted. */
|
||||
( void ) xTask;
|
||||
( void ) pcTaskName;
|
||||
}
|
||||
|
||||
#endif /* #if ( configCHECK_FOR_STACK_OVERFLOW > 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -1,46 +0,0 @@
|
|||
cmake_minimum_required(VERSION 3.15)
|
||||
|
||||
project(coverity)
|
||||
|
||||
set(FREERTOS_KERNEL_PATH "../..")
|
||||
FILE(GLOB FREERTOS_KERNEL_SOURCE ${FREERTOS_KERNEL_PATH}/*.c)
|
||||
FILE(GLOB FREERTOS_PORT_CODE ${FREERTOS_KERNEL_PATH}/portable/template/*.c)
|
||||
|
||||
# Coverity incorrectly infers the type of pdTRUE and pdFALSE as boolean because
|
||||
# of their names. This generates multiple false positive warnings about type
|
||||
# mismatch. Replace pdTRUE with pdPASS and pdFALSE with pdFAIL to avoid these
|
||||
# false positive warnings. This workaround will not be needed after Coverity
|
||||
# fixes the issue of incorrectly inferring the type of pdTRUE and pdFALSE as
|
||||
# boolean.
|
||||
add_custom_target(fix_source ALL
|
||||
COMMAND sed -i -b -e 's/pdFALSE/pdFAIL/g' -e 's/pdTRUE/pdPASS/g' ${FREERTOS_KERNEL_SOURCE} ${FREERTOS_PORT_CODE}
|
||||
DEPENDS ${FREERTOS_KERNEL_SOURCE} ${FREERTOS_PORT_CODE})
|
||||
|
||||
# Add the freertos_config for FreeRTOS-Kernel.
|
||||
add_library(freertos_config INTERFACE)
|
||||
|
||||
target_include_directories(freertos_config
|
||||
INTERFACE
|
||||
./)
|
||||
|
||||
if (DEFINED FREERTOS_SMP_EXAMPLE AND FREERTOS_SMP_EXAMPLE STREQUAL "1")
|
||||
message(STATUS "Build FreeRTOS SMP example")
|
||||
# Adding the following configurations to build SMP template port
|
||||
add_compile_options( -DconfigNUMBER_OF_CORES=2 -DconfigUSE_PASSIVE_IDLE_HOOK=0 )
|
||||
endif()
|
||||
|
||||
# Select the heap. Values between 1-5 will pick a heap.
|
||||
set(FREERTOS_HEAP "3" CACHE STRING "" FORCE)
|
||||
|
||||
# Select the FreeRTOS port.
|
||||
set(FREERTOS_PORT "TEMPLATE" CACHE STRING "" FORCE)
|
||||
|
||||
# Add the FreeRTOS-Kernel subdirectory.
|
||||
add_subdirectory(${FREERTOS_KERNEL_PATH} FreeRTOS-Kernel)
|
||||
|
||||
add_executable(${PROJECT_NAME}
|
||||
../cmake_example/main.c)
|
||||
|
||||
add_dependencies(${PROJECT_NAME} fix_source)
|
||||
|
||||
target_link_libraries(${PROJECT_NAME} freertos_kernel freertos_config)
|
||||
|
|
@ -1,133 +0,0 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/******************************************************************************/
|
||||
/* Hardware description related definitions. **********************************/
|
||||
/******************************************************************************/
|
||||
|
||||
#define configCPU_CLOCK_HZ ( ( unsigned long ) 20000000 )
|
||||
|
||||
/******************************************************************************/
|
||||
/* Scheduling behaviour related definitions. **********************************/
|
||||
/******************************************************************************/
|
||||
|
||||
#define configTICK_RATE_HZ ( 100U )
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_TIME_SLICING 1
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#define configUSE_TICKLESS_IDLE 1
|
||||
#define configMAX_PRIORITIES 5U
|
||||
#define configMINIMAL_STACK_SIZE 128U
|
||||
#define configMAX_TASK_NAME_LEN 4U
|
||||
#define configTICK_TYPE_WIDTH_IN_BITS TICK_TYPE_WIDTH_64_BITS
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configTASK_NOTIFICATION_ARRAY_ENTRIES 1U
|
||||
#define configQUEUE_REGISTRY_SIZE 0U
|
||||
#define configENABLE_BACKWARD_COMPATIBILITY 1
|
||||
#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0
|
||||
#define configSTACK_DEPTH_TYPE size_t
|
||||
#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
|
||||
#define configUSE_NEWLIB_REENTRANT 0
|
||||
|
||||
/******************************************************************************/
|
||||
/* Software timer related definitions. ****************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1U )
|
||||
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
|
||||
#define configTIMER_QUEUE_LENGTH 10U
|
||||
|
||||
/******************************************************************************/
|
||||
/* Memory allocation related definitions. *************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
#define configSUPPORT_DYNAMIC_ALLOCATION 1
|
||||
#define configTOTAL_HEAP_SIZE 4096U
|
||||
#define configAPPLICATION_ALLOCATED_HEAP 1
|
||||
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
|
||||
#define configUSE_MINI_LIST_ITEM 0
|
||||
|
||||
/******************************************************************************/
|
||||
/* Interrupt nesting behaviour configuration. *********************************/
|
||||
/******************************************************************************/
|
||||
|
||||
#define configKERNEL_INTERRUPT_PRIORITY 0U
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 0U
|
||||
#define configMAX_API_CALL_INTERRUPT_PRIORITY 0U
|
||||
|
||||
/******************************************************************************/
|
||||
/* Hook and callback function related definitions. ****************************/
|
||||
/******************************************************************************/
|
||||
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 0
|
||||
#define configUSE_DAEMON_TASK_STARTUP_HOOK 0
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 0
|
||||
|
||||
/******************************************************************************/
|
||||
/* Run time and task stats gathering related definitions. *********************/
|
||||
/******************************************************************************/
|
||||
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
#define configUSE_TRACE_FACILITY 0
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
|
||||
#define configKERNEL_PROVIDED_STATIC_MEMORY 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* Definitions that include or exclude functionality. *************************/
|
||||
/******************************************************************************/
|
||||
|
||||
#define configUSE_TASK_NOTIFICATIONS 1
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_QUEUE_SETS 1
|
||||
#define configUSE_APPLICATION_TASK_TAG 1
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 1
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 1
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 1
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
#define INCLUDE_xTaskAbortDelay 1
|
||||
#define INCLUDE_xTaskGetHandle 1
|
||||
#define INCLUDE_xTaskResumeFromISR 1
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
|
@ -1,64 +0,0 @@
|
|||
# MISRA Compliance for FreeRTOS-Kernel
|
||||
FreeRTOS-Kernel is MISRA C:2012 compliant. This directory contains a project to
|
||||
run [Synopsys Coverity](https://www.blackduck.com/static-analysis-tools-sast/coverity.html)
|
||||
for checking MISRA compliance.
|
||||
|
||||
> **Note**
|
||||
Coverity version 2023.6.1 incorrectly infers the type of `pdTRUE` and `pdFALSE`
|
||||
as boolean because of their names, resulting in multiple false positive warnings
|
||||
about type mismatch. We replace `pdTRUE` with `pdPASS` and `pdFALSE` with
|
||||
`pdFAIL` to avoid these false positive warnings. This workaround will not be
|
||||
needed after Coverity fixes the issue of incorrectly inferring the type of
|
||||
`pdTRUE` and `pdFALSE` as boolean.
|
||||
|
||||
Deviations from the MISRA C:2012 guidelines are documented in
|
||||
[MISRA.md](../../MISRA.md) and [coverity_misra.config](coverity_misra.config)
|
||||
files.
|
||||
|
||||
## Getting Started
|
||||
### Prerequisites
|
||||
Coverity can be run on any platform mentioned [here](https://documentation.blackduck.com/bundle/coverity-docs/page/deploy-install-guide/topics/supported_platforms_for_coverity_analysis.html).
|
||||
The following are the prerequisites to generate coverity report:
|
||||
|
||||
1. CMake version > 3.13.0 (You can check whether you have this by typing `cmake --version`).
|
||||
2. GCC compiler.
|
||||
- See download and installation instructions [here](https://gcc.gnu.org/install/).
|
||||
3. Clone the repo using the following command:
|
||||
- `git clone https://github.com/FreeRTOS/FreeRTOS-Kernel.git ./FreeRTOS-Kernel`
|
||||
|
||||
### Generating Report
|
||||
Go to the root directory of the FreeRTOS-Kernel repo and run the following
|
||||
commands in a terminal:
|
||||
1. Update the compiler configuration in Coverity:
|
||||
~~~
|
||||
cov-configure --force --compiler cc --comptype gcc
|
||||
~~~
|
||||
2. Create the build files using CMake in a `build` directory:
|
||||
|
||||
Single core FreeRTOS:
|
||||
~~~
|
||||
cmake -B build -S examples/coverity
|
||||
~~~
|
||||
|
||||
SMP FreeRTOS:
|
||||
~~~
|
||||
cmake -B build -S examples/coverity -DFREERTOS_SMP_EXAMPLE=1
|
||||
~~~
|
||||
3. Build the (pseudo) application:
|
||||
~~~
|
||||
cd build/
|
||||
cov-build --emit-complementary-info --dir cov-out make coverity
|
||||
~~~
|
||||
4. Go to the Coverity output directory (`cov-out`) and begin Coverity static
|
||||
analysis:
|
||||
~~~
|
||||
cov-analyze --dir ./cov-out \
|
||||
--coding-standard-config ../examples/coverity/coverity_misra.config \
|
||||
--tu-pattern "file('[A-Za-z_]+\.c') && ( ! file('main.c') ) && ( ! file('port.c') )"
|
||||
~~~
|
||||
5. Generate the HTML report:
|
||||
~~~
|
||||
cov-format-errors --dir ./cov-out --html-output html-output
|
||||
~~~
|
||||
|
||||
HTML report should now be generated in a directory named `html-output`.
|
||||
|
|
@ -1,95 +0,0 @@
|
|||
{
|
||||
"version" : "2.0",
|
||||
"standard" : "c2012",
|
||||
"title": "Coverity MISRA Configuration",
|
||||
"deviations" : [
|
||||
{
|
||||
"deviation": "Rule 1.2",
|
||||
"reason": "Allow use of __attribute__ for necessary functions placement in specific memory regions."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 3.1",
|
||||
"reason": "We post HTTP links in code comments which contain // inside comments blocks."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 14.4",
|
||||
"reason": "do while( 0 ) pattern is used in macros to prevent extra semi-colon."
|
||||
},
|
||||
{
|
||||
"deviation": "Directive 4.4",
|
||||
"reason": "Code snippet is used in comment to help explanation."
|
||||
},
|
||||
{
|
||||
"deviation": "Directive 4.5",
|
||||
"reason": "Allow names that MISRA considers ambiguous."
|
||||
},
|
||||
{
|
||||
"deviation": "Directive 4.6",
|
||||
"reason": "Allow port to use primitive type with typedefs."
|
||||
},
|
||||
{
|
||||
"deviation": "Directive 4.8",
|
||||
"reason": "HeapRegion_t and HeapStats_t are used only in heap files but declared in portable.h which is included in multiple source files. As a result, these definitions appear in multiple source files where they are not used."
|
||||
},
|
||||
{
|
||||
"deviation": "Directive 4.9",
|
||||
"reason": "FreeRTOS-Kernel is optimised to work on small micro-controllers. To achieve that, function-like macros are used."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 2.3",
|
||||
"reason": "FreeRTOS defines types which is used in application."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 2.4",
|
||||
"reason": "Allow to define unused tag."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 2.5",
|
||||
"reason": "Allow to define unused macro."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 5.9",
|
||||
"reason": "Allow to define identifier with the same name in structure and global variable."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 8.7",
|
||||
"reason": "API functions are not used by the library outside of the files they are defined; however, they must be externally visible in order to be used by an application."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 8.9",
|
||||
"reason": "Allow to object to be defined in wider scope for debug purpose."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 8.13",
|
||||
"reason": "Allow to not to use const-qualified type for callback function."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 11.4",
|
||||
"reason": "Allow to convert between a pointer to object and an interger type for stack alignment."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 15.4",
|
||||
"reason": "Allow to use multiple break statements in a loop."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 15.5",
|
||||
"reason": "Allow to use multiple points of exit."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 17.8",
|
||||
"reason": "Allow to update the parameters of a function."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 18.4",
|
||||
"reason": "Allow to use pointer arithmetic."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 19.2",
|
||||
"reason": "Allow to use union."
|
||||
},
|
||||
{
|
||||
"deviation": "Rule 20.5",
|
||||
"reason": "Allow to use #undef for MPU wrappers."
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -1,665 +0,0 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* This file provides an example FreeRTOSConfig.h header file, inclusive of an
|
||||
* abbreviated explanation of each configuration item. Online and reference
|
||||
* documentation provides more information.
|
||||
* https://www.freertos.org/a00110.html
|
||||
*
|
||||
* Constant values enclosed in square brackets ('[' and ']') must be completed
|
||||
* before this file will build.
|
||||
*
|
||||
* Use the FreeRTOSConfig.h supplied with the RTOS port in use rather than this
|
||||
* generic file, if one is available.
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/******************************************************************************/
|
||||
/* Hardware description related definitions. **********************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* In most cases, configCPU_CLOCK_HZ must be set to the frequency of the clock
|
||||
* that drives the peripheral used to generate the kernels periodic tick
|
||||
* interrupt. The default value is set to 20MHz and matches the QEMU demo
|
||||
* settings. Your application will certainly need a different value so set this
|
||||
* correctly. This is very often, but not always, equal to the main system clock
|
||||
* frequency. */
|
||||
#define configCPU_CLOCK_HZ ( ( unsigned long ) 20000000 )
|
||||
|
||||
/* configSYSTICK_CLOCK_HZ is an optional parameter for ARM Cortex-M ports only.
|
||||
*
|
||||
* By default ARM Cortex-M ports generate the RTOS tick interrupt from the
|
||||
* Cortex-M SysTick timer. Most Cortex-M MCUs run the SysTick timer at the same
|
||||
* frequency as the MCU itself - when that is the case configSYSTICK_CLOCK_HZ is
|
||||
* not needed and should be left undefined. If the SysTick timer is clocked at a
|
||||
* different frequency to the MCU core then set configCPU_CLOCK_HZ to the MCU
|
||||
* clock frequency, as normal, and configSYSTICK_CLOCK_HZ to the SysTick clock
|
||||
* frequency. Not used if left undefined.
|
||||
* The default value is undefined (commented out). If you need this value bring
|
||||
* it back and set it to a suitable value. */
|
||||
|
||||
/*
|
||||
#define configSYSTICK_CLOCK_HZ [Platform specific]
|
||||
*/
|
||||
|
||||
/******************************************************************************/
|
||||
/* Scheduling behaviour related definitions. **********************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* configTICK_RATE_HZ sets frequency of the tick interrupt in Hz, normally
|
||||
* calculated from the configCPU_CLOCK_HZ value. */
|
||||
#define configTICK_RATE_HZ 100
|
||||
|
||||
/* Set configUSE_PREEMPTION to 1 to use pre-emptive scheduling. Set
|
||||
* configUSE_PREEMPTION to 0 to use co-operative scheduling.
|
||||
* See https://www.freertos.org/single-core-amp-smp-rtos-scheduling.html. */
|
||||
#define configUSE_PREEMPTION 1
|
||||
|
||||
/* Set configUSE_TIME_SLICING to 1 to have the scheduler switch between Ready
|
||||
* state tasks of equal priority on every tick interrupt. Set
|
||||
* configUSE_TIME_SLICING to 0 to prevent the scheduler switching between Ready
|
||||
* state tasks just because there was a tick interrupt. See
|
||||
* https://freertos.org/single-core-amp-smp-rtos-scheduling.html. */
|
||||
#define configUSE_TIME_SLICING 0
|
||||
|
||||
/* Set configUSE_PORT_OPTIMISED_TASK_SELECTION to 1 to select the next task to
|
||||
* run using an algorithm optimised to the instruction set of the target
|
||||
* hardware - normally using a count leading zeros assembly instruction. Set to
|
||||
* 0 to select the next task to run using a generic C algorithm that works for
|
||||
* all FreeRTOS ports. Not all FreeRTOS ports have this option. Defaults to 0
|
||||
* if left undefined. */
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
|
||||
/* Set configUSE_TICKLESS_IDLE to 1 to use the low power tickless mode. Set to
|
||||
* 0 to keep the tick interrupt running at all times. Not all FreeRTOS ports
|
||||
* support tickless mode. See
|
||||
* https://www.freertos.org/low-power-tickless-rtos.html Defaults to 0 if left
|
||||
* undefined. */
|
||||
#define configUSE_TICKLESS_IDLE 0
|
||||
|
||||
/* configMAX_PRIORITIES Sets the number of available task priorities. Tasks can
|
||||
* be assigned priorities of 0 to (configMAX_PRIORITIES - 1). Zero is the
|
||||
* lowest priority. */
|
||||
#define configMAX_PRIORITIES 5
|
||||
|
||||
/* configMINIMAL_STACK_SIZE defines the size of the stack used by the Idle task
|
||||
* (in words, not in bytes!). The kernel does not use this constant for any
|
||||
* other purpose. Demo applications use the constant to make the demos somewhat
|
||||
* portable across hardware architectures. */
|
||||
#define configMINIMAL_STACK_SIZE 128
|
||||
|
||||
/* configMAX_TASK_NAME_LEN sets the maximum length (in characters) of a task's
|
||||
* human readable name. Includes the NULL terminator. */
|
||||
#define configMAX_TASK_NAME_LEN 16
|
||||
|
||||
/* Time is measured in 'ticks' - which is the number of times the tick interrupt
|
||||
* has executed since the RTOS kernel was started.
|
||||
* The tick count is held in a variable of type TickType_t.
|
||||
*
|
||||
* configTICK_TYPE_WIDTH_IN_BITS controls the type (and therefore bit-width) of
|
||||
* TickType_t:
|
||||
*
|
||||
* Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_16_BITS causes
|
||||
* TickType_t to be defined (typedef'ed) as an unsigned 16-bit type.
|
||||
*
|
||||
* Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_32_BITS causes
|
||||
* TickType_t to be defined (typedef'ed) as an unsigned 32-bit type.
|
||||
*
|
||||
* Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_64_BITS causes
|
||||
* TickType_t to be defined (typedef'ed) as an unsigned 64-bit type. */
|
||||
#define configTICK_TYPE_WIDTH_IN_BITS TICK_TYPE_WIDTH_64_BITS
|
||||
|
||||
/* Set configIDLE_SHOULD_YIELD to 1 to have the Idle task yield to an
|
||||
* application task if there is an Idle priority (priority 0) application task
|
||||
* that can run. Set to 0 to have the Idle task use all of its timeslice.
|
||||
* Default to 1 if left undefined. */
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
|
||||
/* Each task has an array of task notifications.
|
||||
* configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
|
||||
* array. See https://www.freertos.org/RTOS-task-notifications.html Defaults to
|
||||
* 1 if left undefined. */
|
||||
#define configTASK_NOTIFICATION_ARRAY_ENTRIES 1
|
||||
|
||||
/* configQUEUE_REGISTRY_SIZE sets the maximum number of queues and semaphores
|
||||
* that can be referenced from the queue registry. Only required when using a
|
||||
* kernel aware debugger. Defaults to 0 if left undefined. */
|
||||
#define configQUEUE_REGISTRY_SIZE 0
|
||||
|
||||
/* Set configENABLE_BACKWARD_COMPATIBILITY to 1 to map function names and
|
||||
* datatypes from old version of FreeRTOS to their latest equivalent. Defaults
|
||||
* to 1 if left undefined. */
|
||||
#define configENABLE_BACKWARD_COMPATIBILITY 0
|
||||
|
||||
/* Each task has its own array of pointers that can be used as thread local
|
||||
* storage. configNUM_THREAD_LOCAL_STORAGE_POINTERS set the number of indexes
|
||||
* in the array. See
|
||||
* https://www.freertos.org/thread-local-storage-pointers.html Defaults to 0 if
|
||||
* left undefined. */
|
||||
#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0
|
||||
|
||||
/* When configUSE_MINI_LIST_ITEM is set to 0, MiniListItem_t and ListItem_t are
|
||||
* both the same. When configUSE_MINI_LIST_ITEM is set to 1, MiniListItem_t
|
||||
* contains 3 fewer fields than ListItem_t which saves some RAM at the cost of
|
||||
* violating strict aliasing rules which some compilers depend on for
|
||||
* optimization. Defaults to 1 if left undefined. */
|
||||
#define configUSE_MINI_LIST_ITEM 1
|
||||
|
||||
/* Sets the type used by the parameter to xTaskCreate() that specifies the stack
|
||||
* size of the task being created. The same type is used to return information
|
||||
* about stack usage in various other API calls. Defaults to size_t if left
|
||||
* undefined. */
|
||||
#define configSTACK_DEPTH_TYPE size_t
|
||||
|
||||
/* configMESSAGE_BUFFER_LENGTH_TYPE sets the type used to store the length of
|
||||
* each message written to a FreeRTOS message buffer (the length is also written
|
||||
* to the message buffer. Defaults to size_t if left undefined - but that may
|
||||
* waste space if messages never go above a length that could be held in a
|
||||
* uint8_t. */
|
||||
#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
|
||||
|
||||
/* If configHEAP_CLEAR_MEMORY_ON_FREE is set to 1, then blocks of memory
|
||||
* allocated using pvPortMalloc() will be cleared (i.e. set to zero) when freed
|
||||
* using vPortFree(). Defaults to 0 if left undefined. */
|
||||
#define configHEAP_CLEAR_MEMORY_ON_FREE 1
|
||||
|
||||
/* vTaskList and vTaskGetRunTimeStats APIs take a buffer as a parameter and
|
||||
* assume that the length of the buffer is configSTATS_BUFFER_MAX_LENGTH.
|
||||
* Defaults to 0xFFFF if left undefined. New applications are recommended to use
|
||||
* vTaskListTasks and vTaskGetRunTimeStatistics APIs instead and supply the
|
||||
* length of the buffer explicitly to avoid memory corruption. */
|
||||
#define configSTATS_BUFFER_MAX_LENGTH 0xFFFF
|
||||
|
||||
/* Set configUSE_NEWLIB_REENTRANT to 1 to have a newlib reent structure
|
||||
* allocated for each task. Set to 0 to not support newlib reent structures.
|
||||
* Default to 0 if left undefined.
|
||||
*
|
||||
* Note Newlib support has been included by popular demand, but is not used or
|
||||
* tested by the FreeRTOS maintainers themselves. FreeRTOS is not responsible
|
||||
* for resulting newlib operation. User must be familiar with newlib and must
|
||||
* provide system-wide implementations of the necessary stubs. Note that (at the
|
||||
* time of writing) the current newlib design implements a system-wide malloc()
|
||||
* that must be provided with locks. */
|
||||
#define configUSE_NEWLIB_REENTRANT 0
|
||||
|
||||
/******************************************************************************/
|
||||
/* Software timer related definitions. ****************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configUSE_TIMERS to 1 to include software timer functionality in the
|
||||
* build. Set to 0 to exclude software timer functionality from the build. The
|
||||
* FreeRTOS/source/timers.c source file must be included in the build if
|
||||
* configUSE_TIMERS is set to 1. Default to 0 if left undefined. See
|
||||
* https://www.freertos.org/RTOS-software-timer.html. */
|
||||
#define configUSE_TIMERS 1
|
||||
|
||||
/* configTIMER_TASK_PRIORITY sets the priority used by the timer task. Only
|
||||
* used if configUSE_TIMERS is set to 1. The timer task is a standard FreeRTOS
|
||||
* task, so its priority is set like any other task. See
|
||||
* https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only
|
||||
* used if configUSE_TIMERS is set to 1. */
|
||||
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
|
||||
|
||||
/* configTIMER_TASK_STACK_DEPTH sets the size of the stack allocated to the
|
||||
* timer task (in words, not in bytes!). The timer task is a standard FreeRTOS
|
||||
* task. See
|
||||
* https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only
|
||||
* used if configUSE_TIMERS is set to 1. */
|
||||
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
|
||||
|
||||
/* configTIMER_QUEUE_LENGTH sets the length of the queue (the number of discrete
|
||||
* items the queue can hold) used to send commands to the timer task. See
|
||||
* https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only
|
||||
* used if configUSE_TIMERS is set to 1. */
|
||||
#define configTIMER_QUEUE_LENGTH 10
|
||||
|
||||
/******************************************************************************/
|
||||
/* Event Group related definitions. *******************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configUSE_EVENT_GROUPS to 1 to include event group functionality in the
|
||||
* build. Set to 0 to exclude event group functionality from the build. The
|
||||
* FreeRTOS/source/event_groups.c source file must be included in the build if
|
||||
* configUSE_EVENT_GROUPS is set to 1. Defaults to 1 if left undefined. */
|
||||
|
||||
#define configUSE_EVENT_GROUPS 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* Stream Buffer related definitions. *****************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configUSE_STREAM_BUFFERS to 1 to include stream buffer functionality in
|
||||
* the build. Set to 0 to exclude event group functionality from the build. The
|
||||
* FreeRTOS/source/stream_buffer.c source file must be included in the build if
|
||||
* configUSE_STREAM_BUFFERS is set to 1. Defaults to 1 if left undefined. */
|
||||
|
||||
#define configUSE_STREAM_BUFFERS 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* Memory allocation related definitions. *************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configSUPPORT_STATIC_ALLOCATION to 1 to include FreeRTOS API functions
|
||||
* that create FreeRTOS objects (tasks, queues, etc.) using statically allocated
|
||||
* memory in the build. Set to 0 to exclude the ability to create statically
|
||||
* allocated objects from the build. Defaults to 0 if left undefined. See
|
||||
* https://www.freertos.org/Static_Vs_Dynamic_Memory_Allocation.html. */
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
|
||||
/* Set configSUPPORT_DYNAMIC_ALLOCATION to 1 to include FreeRTOS API functions
|
||||
* that create FreeRTOS objects (tasks, queues, etc.) using dynamically
|
||||
* allocated memory in the build. Set to 0 to exclude the ability to create
|
||||
* dynamically allocated objects from the build. Defaults to 1 if left
|
||||
* undefined. See
|
||||
* https://www.freertos.org/Static_Vs_Dynamic_Memory_Allocation.html. */
|
||||
#define configSUPPORT_DYNAMIC_ALLOCATION 1
|
||||
|
||||
/* Sets the total size of the FreeRTOS heap, in bytes, when heap_1.c, heap_2.c
|
||||
* or heap_4.c are included in the build. This value is defaulted to 4096 bytes
|
||||
* but it must be tailored to each application. Note the heap will appear in
|
||||
* the .bss section. See https://www.freertos.org/a00111.html. */
|
||||
#define configTOTAL_HEAP_SIZE 4096
|
||||
|
||||
/* Set configAPPLICATION_ALLOCATED_HEAP to 1 to have the application allocate
|
||||
* the array used as the FreeRTOS heap. Set to 0 to have the linker allocate
|
||||
* the array used as the FreeRTOS heap. Defaults to 0 if left undefined. */
|
||||
#define configAPPLICATION_ALLOCATED_HEAP 0
|
||||
|
||||
/* Set configSTACK_ALLOCATION_FROM_SEPARATE_HEAP to 1 to have task stacks
|
||||
* allocated from somewhere other than the FreeRTOS heap. This is useful if you
|
||||
* want to ensure stacks are held in fast memory. Set to 0 to have task stacks
|
||||
* come from the standard FreeRTOS heap. The application writer must provide
|
||||
* implementations for pvPortMallocStack() and vPortFreeStack() if set to 1.
|
||||
* Defaults to 0 if left undefined. */
|
||||
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
|
||||
|
||||
/* Set configENABLE_HEAP_PROTECTOR to 1 to enable bounds checking and
|
||||
* obfuscation to internal heap block pointers in heap_4.c and heap_5.c to help
|
||||
* catch pointer corruptions. Defaults to 0 if left undefined. */
|
||||
#define configENABLE_HEAP_PROTECTOR 0
|
||||
|
||||
/******************************************************************************/
|
||||
/* Interrupt nesting behaviour configuration. *********************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* configKERNEL_INTERRUPT_PRIORITY sets the priority of the tick and context
|
||||
* switch performing interrupts. Not supported by all FreeRTOS ports. See
|
||||
* https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific to
|
||||
* ARM Cortex-M devices. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY 0
|
||||
|
||||
/* configMAX_SYSCALL_INTERRUPT_PRIORITY sets the interrupt priority above which
|
||||
* FreeRTOS API calls must not be made. Interrupts above this priority are
|
||||
* never disabled, so never delayed by RTOS activity. The default value is set
|
||||
* to the highest interrupt priority (0). Not supported by all FreeRTOS ports.
|
||||
* See https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific
|
||||
* to ARM Cortex-M devices. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 0
|
||||
|
||||
/* Another name for configMAX_SYSCALL_INTERRUPT_PRIORITY - the name used depends
|
||||
* on the FreeRTOS port. */
|
||||
#define configMAX_API_CALL_INTERRUPT_PRIORITY 0
|
||||
|
||||
/******************************************************************************/
|
||||
/* Hook and callback function related definitions. ****************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set the following configUSE_* constants to 1 to include the named hook
|
||||
* functionality in the build. Set to 0 to exclude the hook functionality from
|
||||
* the build. The application writer is responsible for providing the hook
|
||||
* function for any set to 1. See https://www.freertos.org/a00016.html. */
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 0
|
||||
#define configUSE_DAEMON_TASK_STARTUP_HOOK 0
|
||||
|
||||
/* Set configUSE_SB_COMPLETED_CALLBACK to 1 to have send and receive completed
|
||||
* callbacks for each instance of a stream buffer or message buffer. When the
|
||||
* option is set to 1, APIs xStreamBufferCreateWithCallback() and
|
||||
* xStreamBufferCreateStaticWithCallback() (and likewise APIs for message
|
||||
* buffer) can be used to create a stream buffer or message buffer instance
|
||||
* with application provided callbacks. Defaults to 0 if left undefined. */
|
||||
#define configUSE_SB_COMPLETED_CALLBACK 0
|
||||
|
||||
/* Set configCHECK_FOR_STACK_OVERFLOW to 1 or 2 for FreeRTOS to check for a
|
||||
* stack overflow at the time of a context switch. Set to 0 to not look for a
|
||||
* stack overflow. If configCHECK_FOR_STACK_OVERFLOW is 1 then the check only
|
||||
* looks for the stack pointer being out of bounds when a task's context is
|
||||
* saved to its stack - this is fast but somewhat ineffective. If
|
||||
* configCHECK_FOR_STACK_OVERFLOW is 2 then the check looks for a pattern
|
||||
* written to the end of a task's stack having been overwritten. This is
|
||||
* slower, but will catch most (but not all) stack overflows. The application
|
||||
* writer must provide the stack overflow callback when
|
||||
* configCHECK_FOR_STACK_OVERFLOW is set to 1. See
|
||||
* https://www.freertos.org/Stacks-and-stack-overflow-checking.html Defaults to
|
||||
* 0 if left undefined. */
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
|
||||
/******************************************************************************/
|
||||
/* Run time and task stats gathering related definitions. *********************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configGENERATE_RUN_TIME_STATS to 1 to have FreeRTOS collect data on the
|
||||
* processing time used by each task. Set to 0 to not collect the data. The
|
||||
* application writer needs to provide a clock source if set to 1. Defaults to
|
||||
* 0 if left undefined. See https://www.freertos.org/rtos-run-time-stats.html.
|
||||
*/
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
|
||||
/* Set configUSE_TRACE_FACILITY to include additional task structure members
|
||||
* are used by trace and visualisation functions and tools. Set to 0 to exclude
|
||||
* the additional information from the structures. Defaults to 0 if left
|
||||
* undefined. */
|
||||
#define configUSE_TRACE_FACILITY 0
|
||||
|
||||
/* Set to 1 to include the vTaskList() and vTaskGetRunTimeStats() functions in
|
||||
* the build. Set to 0 to exclude these functions from the build. These two
|
||||
* functions introduce a dependency on string formatting functions that would
|
||||
* otherwise not exist - hence they are kept separate. Defaults to 0 if left
|
||||
* undefined. */
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
|
||||
|
||||
/******************************************************************************/
|
||||
/* Co-routine related definitions. ********************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configUSE_CO_ROUTINES to 1 to include co-routine functionality in the
|
||||
* build, or 0 to omit co-routine functionality from the build. To include
|
||||
* co-routines, croutine.c must be included in the project. Defaults to 0 if
|
||||
* left undefined. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
|
||||
/* configMAX_CO_ROUTINE_PRIORITIES defines the number of priorities available
|
||||
* to the application co-routines. Any number of co-routines can share the same
|
||||
* priority. Defaults to 0 if left undefined. */
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* Debugging assistance. ******************************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* configASSERT() has the same semantics as the standard C assert(). It can
|
||||
* either be defined to take an action when the assertion fails, or not defined
|
||||
* at all (i.e. comment out or delete the definitions) to completely remove
|
||||
* assertions. configASSERT() can be defined to anything you want, for example
|
||||
* you can call a function if an assert fails that passes the filename and line
|
||||
* number of the failing assert (for example, "vAssertCalled( __FILE__, __LINE__
|
||||
* )" or it can simple disable interrupts and sit in a loop to halt all
|
||||
* execution on the failing line for viewing in a debugger. */
|
||||
#define configASSERT( x ) \
|
||||
if( ( x ) == 0 ) \
|
||||
{ \
|
||||
taskDISABLE_INTERRUPTS(); \
|
||||
for( ; ; ) \
|
||||
; \
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* FreeRTOS MPU specific definitions. *****************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* If configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS is set to 1 then
|
||||
* the application writer can provide functions that execute in privileged mode.
|
||||
* See:
|
||||
* https://www.freertos.org/a00110.html#configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
|
||||
* Defaults to 0 if left undefined. Only used by the FreeRTOS Cortex-M MPU
|
||||
* ports, not the standard ARMv7-M Cortex-M port. */
|
||||
#define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0
|
||||
|
||||
/* Set configTOTAL_MPU_REGIONS to the number of MPU regions implemented on your
|
||||
* target hardware. Normally 8 or 16. Only used by the FreeRTOS Cortex-M MPU
|
||||
* ports, not the standard ARMv7-M Cortex-M port. Defaults to 8 if left
|
||||
* undefined. */
|
||||
#define configTOTAL_MPU_REGIONS 8
|
||||
|
||||
/* configTEX_S_C_B_FLASH allows application writers to override the default
|
||||
* values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits
|
||||
* for the MPU region covering Flash. Defaults to 0x07UL (which means TEX=000,
|
||||
* S=1, C=1, B=1) if left undefined. Only used by the FreeRTOS Cortex-M MPU
|
||||
* ports, not the standard ARMv7-M Cortex-M port. */
|
||||
#define configTEX_S_C_B_FLASH 0x07UL
|
||||
|
||||
/* configTEX_S_C_B_SRAM allows application writers to override the default
|
||||
* values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits
|
||||
* for the MPU region covering RAM. Defaults to 0x07UL (which means TEX=000,
|
||||
* S=1, C=1, B=1) if left undefined. Only used by the FreeRTOS Cortex-M MPU
|
||||
* ports, not the standard ARMv7-M Cortex-M port. */
|
||||
#define configTEX_S_C_B_SRAM 0x07UL
|
||||
|
||||
/* Set configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY to 0 to prevent any privilege
|
||||
* escalations originating from outside of the kernel code itself. Set to 1 to
|
||||
* allow application tasks to raise privilege. Defaults to 1 if left undefined.
|
||||
* Only used by the FreeRTOS Cortex-M MPU ports, not the standard ARMv7-M
|
||||
* Cortex-M port. */
|
||||
#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 1
|
||||
|
||||
/* Set configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS to 1 to allow unprivileged
|
||||
* tasks enter critical sections (effectively mask interrupts). Set to 0 to
|
||||
* prevent unprivileged tasks entering critical sections. Defaults to 1 if left
|
||||
* undefined. Only used by the FreeRTOS Cortex-M MPU ports, not the standard
|
||||
* ARMv7-M Cortex-M port. */
|
||||
#define configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS 0
|
||||
|
||||
/* FreeRTOS Kernel version 10.6.0 introduced a new v2 MPU wrapper, namely
|
||||
* mpu_wrappers_v2.c. Set configUSE_MPU_WRAPPERS_V1 to 0 to use the new v2 MPU
|
||||
* wrapper. Set configUSE_MPU_WRAPPERS_V1 to 1 to use the old v1 MPU wrapper
|
||||
* (mpu_wrappers.c). Defaults to 0 if left undefined. */
|
||||
#define configUSE_MPU_WRAPPERS_V1 0
|
||||
|
||||
/* When using the v2 MPU wrapper, set configPROTECTED_KERNEL_OBJECT_POOL_SIZE to
|
||||
* the total number of kernel objects, which includes tasks, queues, semaphores,
|
||||
* mutexes, event groups, timers, stream buffers and message buffers, in your
|
||||
* application. The application will not be able to have more than
|
||||
* configPROTECTED_KERNEL_OBJECT_POOL_SIZE kernel objects at any point of
|
||||
* time. */
|
||||
#define configPROTECTED_KERNEL_OBJECT_POOL_SIZE 10
|
||||
|
||||
/* When using the v2 MPU wrapper, set configSYSTEM_CALL_STACK_SIZE to the size
|
||||
* of the system call stack in words. Each task has a statically allocated
|
||||
* memory buffer of this size which is used as the stack to execute system
|
||||
* calls. For example, if configSYSTEM_CALL_STACK_SIZE is defined as 128 and
|
||||
* there are 10 tasks in the application, the total amount of memory used for
|
||||
* system call stacks is 128 * 10 = 1280 words. */
|
||||
#define configSYSTEM_CALL_STACK_SIZE 128
|
||||
|
||||
/* When using the v2 MPU wrapper, set configENABLE_ACCESS_CONTROL_LIST to 1 to
|
||||
* enable Access Control List (ACL) feature. When ACL is enabled, an
|
||||
* unprivileged task by default does not have access to any kernel object other
|
||||
* than itself. The application writer needs to explicitly grant the
|
||||
* unprivileged task access to the kernel objects it needs using the APIs
|
||||
* provided for the same. Defaults to 0 if left undefined. */
|
||||
#define configENABLE_ACCESS_CONTROL_LIST 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* SMP( Symmetric MultiProcessing ) Specific Configuration definitions. *******/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configNUMBER_OF_CORES to the number of available processor cores.
|
||||
* Defaults to 1 if left undefined. */
|
||||
|
||||
/*
|
||||
#define configNUMBER_OF_CORES [Num of available cores]
|
||||
*/
|
||||
|
||||
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
|
||||
* configRUN_MULTIPLE_PRIORITIES to 0 to allow multiple tasks to run
|
||||
* simultaneously only if they do not have equal priority, thereby maintaining
|
||||
* the paradigm of a lower priority task never running if a higher priority task
|
||||
* is able to run. If configRUN_MULTIPLE_PRIORITIES is set to 1, multiple tasks
|
||||
* with different priorities may run simultaneously - so a higher and lower
|
||||
* priority task may run on different cores at the same time. */
|
||||
#define configRUN_MULTIPLE_PRIORITIES 0
|
||||
|
||||
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
|
||||
* configUSE_CORE_AFFINITY to 1 to enable core affinity feature. When core
|
||||
* affinity feature is enabled, the vTaskCoreAffinitySet and
|
||||
* vTaskCoreAffinityGet APIs can be used to set and retrieve which cores a task
|
||||
* can run on. If configUSE_CORE_AFFINITY is set to 0 then the FreeRTOS
|
||||
* scheduler is free to run any task on any available core. */
|
||||
#define configUSE_CORE_AFFINITY 0
|
||||
|
||||
/* When using SMP with core affinity feature enabled, set
|
||||
* configTASK_DEFAULT_CORE_AFFINITY to change the default core affinity mask for
|
||||
* tasks created without an affinity mask specified. Setting the define to 1
|
||||
* would make such tasks run on core 0 and setting it to (1 <<
|
||||
* portGET_CORE_ID()) would make such tasks run on the current core. This config
|
||||
* value is useful, if swapping tasks between cores is not supported (e.g.
|
||||
* Tricore) or if legacy code should be controlled. Defaults to tskNO_AFFINITY
|
||||
* if left undefined. */
|
||||
#define configTASK_DEFAULT_CORE_AFFINITY tskNO_AFFINITY
|
||||
|
||||
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), if
|
||||
* configUSE_TASK_PREEMPTION_DISABLE is set to 1, individual tasks can be set to
|
||||
* either pre-emptive or co-operative mode using the vTaskPreemptionDisable and
|
||||
* vTaskPreemptionEnable APIs. */
|
||||
#define configUSE_TASK_PREEMPTION_DISABLE 0
|
||||
|
||||
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
|
||||
* configUSE_PASSIVE_IDLE_HOOK to 1 to allow the application writer to use
|
||||
* the passive idle task hook to add background functionality without the
|
||||
* overhead of a separate task. Defaults to 0 if left undefined. */
|
||||
#define configUSE_PASSIVE_IDLE_HOOK 0
|
||||
|
||||
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one),
|
||||
* configTIMER_SERVICE_TASK_CORE_AFFINITY allows the application writer to set
|
||||
* the core affinity of the RTOS Daemon/Timer Service task. Defaults to
|
||||
* tskNO_AFFINITY if left undefined. */
|
||||
#define configTIMER_SERVICE_TASK_CORE_AFFINITY tskNO_AFFINITY
|
||||
|
||||
/******************************************************************************/
|
||||
/* ARMv8-M secure side port related definitions. ******************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* secureconfigMAX_SECURE_CONTEXTS define the maximum number of tasks that can
|
||||
* call into the secure side of an ARMv8-M chip. Not used by any other ports.
|
||||
*/
|
||||
#define secureconfigMAX_SECURE_CONTEXTS 5
|
||||
|
||||
/* Defines the kernel provided implementation of
|
||||
* vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory()
|
||||
* to provide the memory that is used by the Idle task and Timer task
|
||||
* respectively. The application can provide it's own implementation of
|
||||
* vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory() by
|
||||
* setting configKERNEL_PROVIDED_STATIC_MEMORY to 0 or leaving it undefined. */
|
||||
#define configKERNEL_PROVIDED_STATIC_MEMORY 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* ARMv8-M port Specific Configuration definitions. ***************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configENABLE_TRUSTZONE to 1 when running FreeRTOS on the non-secure side
|
||||
* to enable the TrustZone support in FreeRTOS ARMv8-M ports which allows the
|
||||
* non-secure FreeRTOS tasks to call the (non-secure callable) functions
|
||||
* exported from secure side. */
|
||||
#define configENABLE_TRUSTZONE 1
|
||||
|
||||
/* If the application writer does not want to use TrustZone, but the hardware
|
||||
* does not support disabling TrustZone then the entire application (including
|
||||
* the FreeRTOS scheduler) can run on the secure side without ever branching to
|
||||
* the non-secure side. To do that, in addition to setting
|
||||
* configENABLE_TRUSTZONE to 0, also set configRUN_FREERTOS_SECURE_ONLY to 1. */
|
||||
#define configRUN_FREERTOS_SECURE_ONLY 1
|
||||
|
||||
/* Set configENABLE_MPU to 1 to enable the Memory Protection Unit (MPU), or 0
|
||||
* to leave the Memory Protection Unit disabled. */
|
||||
#define configENABLE_MPU 1
|
||||
|
||||
/* Set configENABLE_FPU to 1 to enable the Floating Point Unit (FPU), or 0
|
||||
* to leave the Floating Point Unit disabled. */
|
||||
#define configENABLE_FPU 1
|
||||
|
||||
/* Set configENABLE_MVE to 1 to enable the M-Profile Vector Extension (MVE)
|
||||
* support, or 0 to leave the MVE support disabled. This option is only
|
||||
* applicable to Cortex-M55 and Cortex-M85 ports as M-Profile Vector Extension
|
||||
* (MVE) is available only on these architectures. configENABLE_MVE must be left
|
||||
* undefined, or defined to 0 for the Cortex-M23,Cortex-M33 and Cortex-M35P
|
||||
* ports. */
|
||||
#define configENABLE_MVE 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* ARMv7-M and ARMv8-M port Specific Configuration definitions. ***************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configCHECK_HANDLER_INSTALLATION to 1 to enable additional asserts to
|
||||
* verify that the application has correctly installed FreeRTOS interrupt
|
||||
* handlers.
|
||||
*
|
||||
* An application can install FreeRTOS interrupt handlers in one of the
|
||||
* following ways:
|
||||
* 1. Direct Routing - Install the functions vPortSVCHandler and
|
||||
* xPortPendSVHandler for SVC call and PendSV interrupts respectively.
|
||||
* 2. Indirect Routing - Install separate handlers for SVC call and PendSV
|
||||
* interrupts and route program control from those
|
||||
* handlers to vPortSVCHandler and xPortPendSVHandler functions. The
|
||||
* applications that use Indirect Routing must set
|
||||
* configCHECK_HANDLER_INSTALLATION to 0.
|
||||
*
|
||||
* Defaults to 1 if left undefined. */
|
||||
#define configCHECK_HANDLER_INSTALLATION 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* Definitions that include or exclude functionality. *************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set the following configUSE_* constants to 1 to include the named feature in
|
||||
* the build, or 0 to exclude the named feature from the build. */
|
||||
#define configUSE_TASK_NOTIFICATIONS 1
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_QUEUE_SETS 0
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
|
||||
/* USE_POSIX_ERRNO enables the task global FreeRTOS_errno variable which will
|
||||
* contain the most recent error for that task. */
|
||||
#define configUSE_POSIX_ERRNO 0
|
||||
|
||||
/* Set the following INCLUDE_* constants to 1 to include the named API function,
|
||||
* or 0 to exclude the named API function. Most linkers will remove unused
|
||||
* functions even when the constant is 1. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 1
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 0
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 0
|
||||
#define INCLUDE_eTaskGetState 0
|
||||
#define INCLUDE_xTimerPendFunctionCall 0
|
||||
#define INCLUDE_xTaskAbortDelay 0
|
||||
#define INCLUDE_xTaskGetHandle 0
|
||||
#define INCLUDE_xTaskResumeFromISR 1
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
|
@ -1,7 +0,0 @@
|
|||
# Configuration support for FreeRTOS
|
||||
|
||||
## Overview
|
||||
|
||||
Every FreeRTOS project requires FreeRTOSConfig.h located in their include path. In this folder you will find a sample FreeRTOSConfig.h that will assist you in preparing the configuration for your application.
|
||||
|
||||
The FreeRTOSConfig.h in this folder is used in the minimal_freertos_example project provided and it not guaranteed to have the same configuration between updates.
|
||||
|
|
@ -1,15 +0,0 @@
|
|||
# FreeRTOS internal cmake file. Do not use it in user top-level project
|
||||
|
||||
add_library(freertos_kernel_include INTERFACE)
|
||||
|
||||
target_include_directories(freertos_kernel_include
|
||||
INTERFACE
|
||||
.
|
||||
# Note: DEPRECATED but still supported, may be removed in a future release.
|
||||
$<$<NOT:$<TARGET_EXISTS:freertos_config>>:${FREERTOS_CONFIG_FILE_DIRECTORY}>
|
||||
)
|
||||
|
||||
target_link_libraries(freertos_kernel_include
|
||||
INTERFACE
|
||||
$<$<TARGET_EXISTS:freertos_config>:freertos_config>
|
||||
)
|
||||
2130
include/FreeRTOS.h
2130
include/FreeRTOS.h
File diff suppressed because it is too large
Load diff
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -28,7 +26,7 @@
|
|||
|
||||
|
||||
#ifndef _MSC_VER /* Visual Studio doesn't support #warning. */
|
||||
#warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in a future release.
|
||||
#warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in future released.
|
||||
#endif
|
||||
|
||||
#include "stack_macros.h"
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -33,14 +31,6 @@
|
|||
* This file implements atomic functions by disabling interrupts globally.
|
||||
* Implementations with architecture specific atomic instructions can be
|
||||
* provided under each compiler directory.
|
||||
*
|
||||
* The atomic interface can be used in FreeRTOS tasks on all FreeRTOS ports. It
|
||||
* can also be used in Interrupt Service Routines (ISRs) on FreeRTOS ports that
|
||||
* support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 1). The
|
||||
* atomic interface must not be used in ISRs on FreeRTOS ports that do not
|
||||
* support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 0)
|
||||
* because ISRs on these ports cannot be interrupted and therefore, do not need
|
||||
* atomics in ISRs.
|
||||
*/
|
||||
|
||||
#ifndef ATOMIC_H
|
||||
|
|
@ -67,7 +57,7 @@
|
|||
* ATOMIC_ENTER_CRITICAL().
|
||||
*
|
||||
*/
|
||||
#if ( portHAS_NESTED_INTERRUPTS == 1 )
|
||||
#if defined( portSET_INTERRUPT_MASK_FROM_ISR )
|
||||
|
||||
/* Nested interrupt scheme is supported in this port. */
|
||||
#define ATOMIC_ENTER_CRITICAL() \
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -47,28 +45,28 @@
|
|||
typedef void * CoRoutineHandle_t;
|
||||
|
||||
/* Defines the prototype to which co-routine functions must conform. */
|
||||
typedef void (* crCOROUTINE_CODE)( CoRoutineHandle_t xHandle,
|
||||
UBaseType_t uxIndex );
|
||||
typedef void (* crCOROUTINE_CODE)( CoRoutineHandle_t,
|
||||
UBaseType_t );
|
||||
|
||||
typedef struct corCoRoutineControlBlock
|
||||
{
|
||||
crCOROUTINE_CODE pxCoRoutineFunction;
|
||||
ListItem_t xGenericListItem; /**< List item used to place the CRCB in ready and blocked queues. */
|
||||
ListItem_t xEventListItem; /**< List item used to place the CRCB in event lists. */
|
||||
UBaseType_t uxPriority; /**< The priority of the co-routine in relation to other co-routines. */
|
||||
UBaseType_t uxIndex; /**< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */
|
||||
uint16_t uxState; /**< Used internally by the co-routine implementation. */
|
||||
ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */
|
||||
ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */
|
||||
UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */
|
||||
UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */
|
||||
uint16_t uxState; /*< Used internally by the co-routine implementation. */
|
||||
} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */
|
||||
|
||||
/**
|
||||
* croutine. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* BaseType_t xCoRoutineCreate(
|
||||
* crCOROUTINE_CODE pxCoRoutineCode,
|
||||
* UBaseType_t uxPriority,
|
||||
* UBaseType_t uxIndex
|
||||
* );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Create a new co-routine and add it to the list of co-routines that are
|
||||
* ready to run.
|
||||
|
|
@ -88,7 +86,7 @@ typedef struct corCoRoutineControlBlock
|
|||
* list, otherwise an error code defined with ProjDefs.h.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // Co-routine to be created.
|
||||
* void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
|
||||
* {
|
||||
|
|
@ -129,7 +127,7 @@ typedef struct corCoRoutineControlBlock
|
|||
* xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xCoRoutineCreate xCoRoutineCreate
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
|
|
@ -140,9 +138,9 @@ BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
|
|||
|
||||
/**
|
||||
* croutine. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* void vCoRoutineSchedule( void );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Run a co-routine.
|
||||
*
|
||||
|
|
@ -156,7 +154,7 @@ BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
|
|||
* hook).
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // This idle task hook will schedule a co-routine each time it is called.
|
||||
* // The rest of the idle task will execute between co-routine calls.
|
||||
* void vApplicationIdleHook( void )
|
||||
|
|
@ -174,7 +172,7 @@ BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
|
|||
* vCoRoutineSchedule();
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup vCoRoutineSchedule vCoRoutineSchedule
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
|
|
@ -182,14 +180,14 @@ void vCoRoutineSchedule( void );
|
|||
|
||||
/**
|
||||
* croutine. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* crSTART( CoRoutineHandle_t xHandle );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* This macro MUST always be called at the start of a co-routine function.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // Co-routine to be created.
|
||||
* void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
|
||||
* {
|
||||
|
|
@ -207,7 +205,7 @@ void vCoRoutineSchedule( void );
|
|||
* // Must end every co-routine with a call to crEND();
|
||||
* crEND();
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup crSTART crSTART
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
|
|
@ -217,14 +215,14 @@ void vCoRoutineSchedule( void );
|
|||
|
||||
/**
|
||||
* croutine. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* crEND();
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* This macro MUST always be called at the end of a co-routine function.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // Co-routine to be created.
|
||||
* void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
|
||||
* {
|
||||
|
|
@ -242,7 +240,7 @@ void vCoRoutineSchedule( void );
|
|||
* // Must end every co-routine with a call to crEND();
|
||||
* crEND();
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup crSTART crSTART
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
|
|
@ -261,9 +259,9 @@ void vCoRoutineSchedule( void );
|
|||
|
||||
/**
|
||||
* croutine. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Delay a co-routine for a fixed period of time.
|
||||
*
|
||||
|
|
@ -280,7 +278,7 @@ void vCoRoutineSchedule( void );
|
|||
* can be used to convert ticks to milliseconds.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // Co-routine to be created.
|
||||
* void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
|
||||
* {
|
||||
|
|
@ -303,21 +301,19 @@ void vCoRoutineSchedule( void );
|
|||
* // Must end every co-routine with a call to crEND();
|
||||
* crEND();
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup crDELAY crDELAY
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
#define crDELAY( xHandle, xTicksToDelay ) \
|
||||
do { \
|
||||
if( ( xTicksToDelay ) > 0 ) \
|
||||
{ \
|
||||
vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \
|
||||
} \
|
||||
crSET_STATE0( ( xHandle ) ); \
|
||||
} while( 0 )
|
||||
crSET_STATE0( ( xHandle ) );
|
||||
|
||||
/**
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* crQUEUE_SEND(
|
||||
* CoRoutineHandle_t xHandle,
|
||||
* QueueHandle_t pxQueue,
|
||||
|
|
@ -325,7 +321,7 @@ void vCoRoutineSchedule( void );
|
|||
* TickType_t xTicksToWait,
|
||||
* BaseType_t *pxResult
|
||||
* )
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
|
||||
* equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
|
||||
|
|
@ -365,7 +361,7 @@ void vCoRoutineSchedule( void );
|
|||
* error defined within ProjDefs.h.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // Co-routine function that blocks for a fixed period then posts a number onto
|
||||
* // a queue.
|
||||
* static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
|
||||
|
|
@ -397,12 +393,12 @@ void vCoRoutineSchedule( void );
|
|||
* // Co-routines must end with a call to crEND().
|
||||
* crEND();
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup crQUEUE_SEND crQUEUE_SEND
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \
|
||||
do { \
|
||||
{ \
|
||||
*( pxResult ) = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), ( xTicksToWait ) ); \
|
||||
if( *( pxResult ) == errQUEUE_BLOCKED ) \
|
||||
{ \
|
||||
|
|
@ -414,11 +410,11 @@ void vCoRoutineSchedule( void );
|
|||
crSET_STATE1( ( xHandle ) ); \
|
||||
*pxResult = pdPASS; \
|
||||
} \
|
||||
} while( 0 )
|
||||
}
|
||||
|
||||
/**
|
||||
* croutine. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* crQUEUE_RECEIVE(
|
||||
* CoRoutineHandle_t xHandle,
|
||||
* QueueHandle_t pxQueue,
|
||||
|
|
@ -426,7 +422,7 @@ void vCoRoutineSchedule( void );
|
|||
* TickType_t xTicksToWait,
|
||||
* BaseType_t *pxResult
|
||||
* )
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
|
||||
* equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
|
||||
|
|
@ -465,7 +461,7 @@ void vCoRoutineSchedule( void );
|
|||
* an error code as defined within ProjDefs.h.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // A co-routine receives the number of an LED to flash from a queue. It
|
||||
* // blocks on the queue until the number is received.
|
||||
* static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
|
||||
|
|
@ -491,12 +487,12 @@ void vCoRoutineSchedule( void );
|
|||
*
|
||||
* crEND();
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \
|
||||
do { \
|
||||
{ \
|
||||
*( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), ( xTicksToWait ) ); \
|
||||
if( *( pxResult ) == errQUEUE_BLOCKED ) \
|
||||
{ \
|
||||
|
|
@ -508,17 +504,17 @@ void vCoRoutineSchedule( void );
|
|||
crSET_STATE1( ( xHandle ) ); \
|
||||
*( pxResult ) = pdPASS; \
|
||||
} \
|
||||
} while( 0 )
|
||||
}
|
||||
|
||||
/**
|
||||
* croutine. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* crQUEUE_SEND_FROM_ISR(
|
||||
* QueueHandle_t pxQueue,
|
||||
* void *pvItemToQueue,
|
||||
* BaseType_t xCoRoutinePreviouslyWoken
|
||||
* )
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
|
||||
* co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
|
||||
|
|
@ -553,7 +549,7 @@ void vCoRoutineSchedule( void );
|
|||
* the ISR.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // A co-routine that blocks on a queue waiting for characters to be received.
|
||||
* static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
|
||||
* {
|
||||
|
|
@ -602,7 +598,7 @@ void vCoRoutineSchedule( void );
|
|||
* xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
|
|
@ -612,13 +608,13 @@ void vCoRoutineSchedule( void );
|
|||
|
||||
/**
|
||||
* croutine. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* crQUEUE_SEND_FROM_ISR(
|
||||
* QueueHandle_t pxQueue,
|
||||
* void *pvBuffer,
|
||||
* BaseType_t * pxCoRoutineWoken
|
||||
* )
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
|
||||
* co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
|
||||
|
|
@ -653,7 +649,7 @@ void vCoRoutineSchedule( void );
|
|||
* pdFALSE.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // A co-routine that posts a character to a queue then blocks for a fixed
|
||||
* // period. The character is incremented each time.
|
||||
* static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
|
||||
|
|
@ -718,7 +714,7 @@ void vCoRoutineSchedule( void );
|
|||
* }
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
|
|
@ -746,13 +742,6 @@ void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay,
|
|||
*/
|
||||
BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList );
|
||||
|
||||
|
||||
/*
|
||||
* This function resets the internal state of the coroutine module. It must be
|
||||
* called by the application before restarting the scheduler.
|
||||
*/
|
||||
void vCoRoutineResetState( void ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -36,26 +34,6 @@
|
|||
/* FreeRTOS includes. */
|
||||
#include "timers.h"
|
||||
|
||||
/* The following bit fields convey control information in a task's event list
|
||||
* item value. It is important they don't clash with the
|
||||
* taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */
|
||||
#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
|
||||
#define eventCLEAR_EVENTS_ON_EXIT_BIT ( ( uint16_t ) 0x0100U )
|
||||
#define eventUNBLOCKED_DUE_TO_BIT_SET ( ( uint16_t ) 0x0200U )
|
||||
#define eventWAIT_FOR_ALL_BITS ( ( uint16_t ) 0x0400U )
|
||||
#define eventEVENT_BITS_CONTROL_BYTES ( ( uint16_t ) 0xff00U )
|
||||
#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
|
||||
#define eventCLEAR_EVENTS_ON_EXIT_BIT ( ( uint32_t ) 0x01000000U )
|
||||
#define eventUNBLOCKED_DUE_TO_BIT_SET ( ( uint32_t ) 0x02000000U )
|
||||
#define eventWAIT_FOR_ALL_BITS ( ( uint32_t ) 0x04000000U )
|
||||
#define eventEVENT_BITS_CONTROL_BYTES ( ( uint32_t ) 0xff000000U )
|
||||
#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_64_BITS )
|
||||
#define eventCLEAR_EVENTS_ON_EXIT_BIT ( ( uint64_t ) 0x0100000000000000U )
|
||||
#define eventUNBLOCKED_DUE_TO_BIT_SET ( ( uint64_t ) 0x0200000000000000U )
|
||||
#define eventWAIT_FOR_ALL_BITS ( ( uint64_t ) 0x0400000000000000U )
|
||||
#define eventEVENT_BITS_CONTROL_BYTES ( ( uint64_t ) 0xff00000000000000U )
|
||||
#endif /* if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) */
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
|
@ -85,6 +63,8 @@
|
|||
* be set and then tested atomically - as is the case where event groups are
|
||||
* used to create a synchronisation point between multiple tasks (a
|
||||
* 'rendezvous').
|
||||
*
|
||||
* \defgroup EventGroup
|
||||
*/
|
||||
|
||||
|
||||
|
|
@ -104,8 +84,8 @@ typedef struct EventGroupDef_t * EventGroupHandle_t;
|
|||
|
||||
/*
|
||||
* The type that holds event bits always matches TickType_t - therefore the
|
||||
* number of bits it holds is set by configTICK_TYPE_WIDTH_IN_BITS (16 bits if set to 0,
|
||||
* 32 bits if set to 1, 64 bits if set to 2.
|
||||
* number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1,
|
||||
* 32 bits if set to 0.
|
||||
*
|
||||
* \defgroup EventBits_t EventBits_t
|
||||
* \ingroup EventGroup
|
||||
|
|
@ -114,40 +94,36 @@ typedef TickType_t EventBits_t;
|
|||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* EventGroupHandle_t xEventGroupCreate( void );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Create a new event group.
|
||||
*
|
||||
* Internally, within the FreeRTOS implementation, event groups use a [small]
|
||||
* block of memory, in which the event group's structure is stored. If an event
|
||||
* groups is created using xEventGroupCreate() then the required memory is
|
||||
* groups is created using xEventGropuCreate() then the required memory is
|
||||
* automatically dynamically allocated inside the xEventGroupCreate() function.
|
||||
* (see https://www.FreeRTOS.org/a00111.html). If an event group is created
|
||||
* using xEventGroupCreateStatic() then the application writer must instead
|
||||
* using xEventGropuCreateStatic() then the application writer must instead
|
||||
* provide the memory that will get used by the event group.
|
||||
* xEventGroupCreateStatic() therefore allows an event group to be created
|
||||
* without using any dynamic memory allocation.
|
||||
*
|
||||
* Although event groups are not related to ticks, for internal implementation
|
||||
* reasons the number of bits available for use in an event group is dependent
|
||||
* on the configTICK_TYPE_WIDTH_IN_BITS setting in FreeRTOSConfig.h. If
|
||||
* configTICK_TYPE_WIDTH_IN_BITS is 0 then each event group contains 8 usable bits (bit
|
||||
* 0 to bit 7). If configTICK_TYPE_WIDTH_IN_BITS is set to 1 then each event group has
|
||||
* 24 usable bits (bit 0 to bit 23). If configTICK_TYPE_WIDTH_IN_BITS is set to 2 then
|
||||
* each event group has 56 usable bits (bit 0 to bit 53). The EventBits_t type
|
||||
* is used to store event bits within an event group.
|
||||
*
|
||||
* The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupCreate()
|
||||
* to be available.
|
||||
* on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If
|
||||
* configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit
|
||||
* 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has
|
||||
* 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store
|
||||
* event bits within an event group.
|
||||
*
|
||||
* @return If the event group was created then a handle to the event group is
|
||||
* returned. If there was insufficient FreeRTOS heap available to create the
|
||||
* event group then NULL is returned. See https://www.FreeRTOS.org/a00111.html
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // Declare a variable to hold the created event group.
|
||||
* EventGroupHandle_t xCreatedEventGroup;
|
||||
*
|
||||
|
|
@ -164,7 +140,7 @@ typedef TickType_t EventBits_t;
|
|||
* {
|
||||
* // The event group was created.
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xEventGroupCreate xEventGroupCreate
|
||||
* \ingroup EventGroup
|
||||
*/
|
||||
|
|
@ -174,33 +150,29 @@ typedef TickType_t EventBits_t;
|
|||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Create a new event group.
|
||||
*
|
||||
* Internally, within the FreeRTOS implementation, event groups use a [small]
|
||||
* block of memory, in which the event group's structure is stored. If an event
|
||||
* groups is created using xEventGroupCreate() then the required memory is
|
||||
* groups is created using xEventGropuCreate() then the required memory is
|
||||
* automatically dynamically allocated inside the xEventGroupCreate() function.
|
||||
* (see https://www.FreeRTOS.org/a00111.html). If an event group is created
|
||||
* using xEventGroupCreateStatic() then the application writer must instead
|
||||
* using xEventGropuCreateStatic() then the application writer must instead
|
||||
* provide the memory that will get used by the event group.
|
||||
* xEventGroupCreateStatic() therefore allows an event group to be created
|
||||
* without using any dynamic memory allocation.
|
||||
*
|
||||
* Although event groups are not related to ticks, for internal implementation
|
||||
* reasons the number of bits available for use in an event group is dependent
|
||||
* on the configTICK_TYPE_WIDTH_IN_BITS setting in FreeRTOSConfig.h. If
|
||||
* configTICK_TYPE_WIDTH_IN_BITS is 0 then each event group contains 8 usable bits (bit
|
||||
* 0 to bit 7). If configTICK_TYPE_WIDTH_IN_BITS is set to 1 then each event group has
|
||||
* 24 usable bits (bit 0 to bit 23). If configTICK_TYPE_WIDTH_IN_BITS is set to 2 then
|
||||
* each event group has 56 usable bits (bit 0 to bit 53). The EventBits_t type
|
||||
* is used to store event bits within an event group.
|
||||
*
|
||||
* The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupCreateStatic()
|
||||
* to be available.
|
||||
* on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If
|
||||
* configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit
|
||||
* 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has
|
||||
* 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store
|
||||
* event bits within an event group.
|
||||
*
|
||||
* @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type
|
||||
* StaticEventGroup_t, which will be then be used to hold the event group's data
|
||||
|
|
@ -210,7 +182,7 @@ typedef TickType_t EventBits_t;
|
|||
* returned. If pxEventGroupBuffer was NULL then NULL is returned.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // StaticEventGroup_t is a publicly accessible structure that has the same
|
||||
* // size and alignment requirements as the real event group structure. It is
|
||||
* // provided as a mechanism for applications to know the size of the event
|
||||
|
|
@ -223,7 +195,7 @@ typedef TickType_t EventBits_t;
|
|||
*
|
||||
* // Create the event group without dynamically allocating any memory.
|
||||
* xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*/
|
||||
#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
|
||||
EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
|
@ -231,22 +203,19 @@ typedef TickType_t EventBits_t;
|
|||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
|
||||
* const EventBits_t uxBitsToWaitFor,
|
||||
* const BaseType_t xClearOnExit,
|
||||
* const BaseType_t xWaitForAllBits,
|
||||
* const TickType_t xTicksToWait );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* [Potentially] block to wait for one or more bits to be set within a
|
||||
* previously created event group.
|
||||
*
|
||||
* This function cannot be called from an interrupt.
|
||||
*
|
||||
* The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupWaitBits()
|
||||
* to be available.
|
||||
*
|
||||
* @param xEventGroup The event group in which the bits are being tested. The
|
||||
* event group must have previously been created using a call to
|
||||
* xEventGroupCreate().
|
||||
|
|
@ -272,8 +241,7 @@ typedef TickType_t EventBits_t;
|
|||
*
|
||||
* @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait
|
||||
* for one/all (depending on the xWaitForAllBits value) of the bits specified by
|
||||
* uxBitsToWaitFor to become set. A value of portMAX_DELAY can be used to block
|
||||
* indefinitely (provided INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h).
|
||||
* uxBitsToWaitFor to become set.
|
||||
*
|
||||
* @return The value of the event group at the time either the bits being waited
|
||||
* for became set, or the block time expired. Test the return value to know
|
||||
|
|
@ -285,9 +253,9 @@ typedef TickType_t EventBits_t;
|
|||
* pdTRUE.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* #define BIT_0 ( 1 << 0 )
|
||||
* #define BIT_4 ( 1 << 4 )
|
||||
* <pre>
|
||||
#define BIT_0 ( 1 << 0 )
|
||||
#define BIT_4 ( 1 << 4 )
|
||||
*
|
||||
* void aFunction( EventGroupHandle_t xEventGroup )
|
||||
* {
|
||||
|
|
@ -321,7 +289,7 @@ typedef TickType_t EventBits_t;
|
|||
* // without either BIT_0 or BIT_4 becoming set.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xEventGroupWaitBits xEventGroupWaitBits
|
||||
* \ingroup EventGroup
|
||||
*/
|
||||
|
|
@ -333,16 +301,13 @@ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
|
|||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Clear bits within an event group. This function cannot be called from an
|
||||
* interrupt.
|
||||
*
|
||||
* The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupClearBits()
|
||||
* to be available.
|
||||
*
|
||||
* @param xEventGroup The event group in which the bits are to be cleared.
|
||||
*
|
||||
* @param uxBitsToClear A bitwise value that indicates the bit or bits to clear
|
||||
|
|
@ -352,9 +317,9 @@ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
|
|||
* @return The value of the event group before the specified bits were cleared.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* #define BIT_0 ( 1 << 0 )
|
||||
* #define BIT_4 ( 1 << 4 )
|
||||
* <pre>
|
||||
#define BIT_0 ( 1 << 0 )
|
||||
#define BIT_4 ( 1 << 4 )
|
||||
*
|
||||
* void aFunction( EventGroupHandle_t xEventGroup )
|
||||
* {
|
||||
|
|
@ -385,7 +350,7 @@ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
|
|||
* // Neither bit 0 nor bit 4 were set in the first place.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xEventGroupClearBits xEventGroupClearBits
|
||||
* \ingroup EventGroup
|
||||
*/
|
||||
|
|
@ -394,9 +359,9 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
|
|||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* A version of xEventGroupClearBits() that can be called from an interrupt.
|
||||
*
|
||||
|
|
@ -410,12 +375,6 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
|
|||
* timer task to have the clear operation performed in the context of the timer
|
||||
* task.
|
||||
*
|
||||
* @note If this function returns pdPASS then the timer task is ready to run
|
||||
* and a portYIELD_FROM_ISR(pdTRUE) should be executed to perform the needed
|
||||
* clear on the event group. This behavior is different from
|
||||
* xEventGroupSetBitsFromISR because the parameter xHigherPriorityTaskWoken is
|
||||
* not present.
|
||||
*
|
||||
* @param xEventGroup The event group in which the bits are to be cleared.
|
||||
*
|
||||
* @param uxBitsToClear A bitwise value that indicates the bit or bits to clear.
|
||||
|
|
@ -427,9 +386,9 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
|
|||
* if the timer service queue was full.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* #define BIT_0 ( 1 << 0 )
|
||||
* #define BIT_4 ( 1 << 4 )
|
||||
* <pre>
|
||||
#define BIT_0 ( 1 << 0 )
|
||||
#define BIT_4 ( 1 << 4 )
|
||||
*
|
||||
* // An event group which it is assumed has already been created by a call to
|
||||
* // xEventGroupCreate().
|
||||
|
|
@ -445,10 +404,9 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
|
|||
* if( xResult == pdPASS )
|
||||
* {
|
||||
* // The message was posted successfully.
|
||||
* portYIELD_FROM_ISR(pdTRUE);
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR
|
||||
* \ingroup EventGroup
|
||||
*/
|
||||
|
|
@ -457,14 +415,14 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
|
|||
const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
|
||||
#else
|
||||
#define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) \
|
||||
xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) ( xEventGroup ), ( uint32_t ) ( uxBitsToClear ), NULL )
|
||||
xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Set bits within an event group.
|
||||
* This function cannot be called from an interrupt. xEventGroupSetBitsFromISR()
|
||||
|
|
@ -473,9 +431,6 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
|
|||
* Setting bits in an event group will automatically unblock tasks that are
|
||||
* blocked waiting for the bits.
|
||||
*
|
||||
* The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupSetBits()
|
||||
* to be available.
|
||||
*
|
||||
* @param xEventGroup The event group in which the bits are to be set.
|
||||
*
|
||||
* @param uxBitsToSet A bitwise value that indicates the bit or bits to set.
|
||||
|
|
@ -483,16 +438,19 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
|
|||
* and bit 0 set uxBitsToSet to 0x09.
|
||||
*
|
||||
* @return The value of the event group at the time the call to
|
||||
* xEventGroupSetBits() returns. Returned value might have the bits specified
|
||||
* by the uxBitsToSet parameter cleared if setting a bit results in a task
|
||||
* that was waiting for the bit leaving the blocked state then it is possible
|
||||
* the bit will be cleared automatically (see the xClearBitOnExit parameter
|
||||
* of xEventGroupWaitBits()).
|
||||
* xEventGroupSetBits() returns. There are two reasons why the returned value
|
||||
* might have the bits specified by the uxBitsToSet parameter cleared. First,
|
||||
* if setting a bit results in a task that was waiting for the bit leaving the
|
||||
* blocked state then it is possible the bit will be cleared automatically
|
||||
* (see the xClearBitOnExit parameter of xEventGroupWaitBits()). Second, any
|
||||
* unblocked (or otherwise Ready state) task that has a priority above that of
|
||||
* the task that called xEventGroupSetBits() will execute and may change the
|
||||
* event group value before the call to xEventGroupSetBits() returns.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* #define BIT_0 ( 1 << 0 )
|
||||
* #define BIT_4 ( 1 << 4 )
|
||||
* <pre>
|
||||
#define BIT_0 ( 1 << 0 )
|
||||
#define BIT_4 ( 1 << 4 )
|
||||
*
|
||||
* void aFunction( EventGroupHandle_t xEventGroup )
|
||||
* {
|
||||
|
|
@ -528,7 +486,7 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
|
|||
* // cleared as the task left the Blocked state.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xEventGroupSetBits xEventGroupSetBits
|
||||
* \ingroup EventGroup
|
||||
*/
|
||||
|
|
@ -537,9 +495,9 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
|
|||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* A version of xEventGroupSetBits() that can be called from an interrupt.
|
||||
*
|
||||
|
|
@ -572,9 +530,9 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
|
|||
* if the timer service queue was full.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* #define BIT_0 ( 1 << 0 )
|
||||
* #define BIT_4 ( 1 << 4 )
|
||||
* <pre>
|
||||
#define BIT_0 ( 1 << 0 )
|
||||
#define BIT_4 ( 1 << 4 )
|
||||
*
|
||||
* // An event group which it is assumed has already been created by a call to
|
||||
* // xEventGroupCreate().
|
||||
|
|
@ -603,7 +561,7 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
|
|||
* portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR
|
||||
* \ingroup EventGroup
|
||||
*/
|
||||
|
|
@ -613,17 +571,17 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
|
|||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
#else
|
||||
#define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) \
|
||||
xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) ( xEventGroup ), ( uint32_t ) ( uxBitsToSet ), ( pxHigherPriorityTaskWoken ) )
|
||||
xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
|
||||
* const EventBits_t uxBitsToSet,
|
||||
* const EventBits_t uxBitsToWaitFor,
|
||||
* TickType_t xTicksToWait );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Atomically set bits within an event group, then wait for a combination of
|
||||
* bits to be set within the same event group. This functionality is typically
|
||||
|
|
@ -637,9 +595,6 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
|
|||
* this case all the bits specified by uxBitsToWait will be automatically
|
||||
* cleared before the function returns.
|
||||
*
|
||||
* The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupSync()
|
||||
* to be available.
|
||||
*
|
||||
* @param xEventGroup The event group in which the bits are being tested. The
|
||||
* event group must have previously been created using a call to
|
||||
* xEventGroupCreate().
|
||||
|
|
@ -665,13 +620,13 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
|
|||
* automatically cleared.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // Bits used by the three tasks.
|
||||
* #define TASK_0_BIT ( 1 << 0 )
|
||||
* #define TASK_1_BIT ( 1 << 1 )
|
||||
* #define TASK_2_BIT ( 1 << 2 )
|
||||
#define TASK_0_BIT ( 1 << 0 )
|
||||
#define TASK_1_BIT ( 1 << 1 )
|
||||
#define TASK_2_BIT ( 1 << 2 )
|
||||
*
|
||||
* #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )
|
||||
#define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )
|
||||
*
|
||||
* // Use an event group to synchronise three tasks. It is assumed this event
|
||||
* // group has already been created elsewhere.
|
||||
|
|
@ -739,7 +694,7 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
|
|||
* }
|
||||
* }
|
||||
*
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xEventGroupSync xEventGroupSync
|
||||
* \ingroup EventGroup
|
||||
*/
|
||||
|
|
@ -751,16 +706,13 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
|
|||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Returns the current value of the bits in an event group. This function
|
||||
* cannot be used from an interrupt.
|
||||
*
|
||||
* The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupGetBits()
|
||||
* to be available.
|
||||
*
|
||||
* @param xEventGroup The event group being queried.
|
||||
*
|
||||
* @return The event group bits at the time xEventGroupGetBits() was called.
|
||||
|
|
@ -768,19 +720,16 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
|
|||
* \defgroup xEventGroupGetBits xEventGroupGetBits
|
||||
* \ingroup EventGroup
|
||||
*/
|
||||
#define xEventGroupGetBits( xEventGroup ) xEventGroupClearBits( ( xEventGroup ), 0 )
|
||||
#define xEventGroupGetBits( xEventGroup ) xEventGroupClearBits( xEventGroup, 0 )
|
||||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* A version of xEventGroupGetBits() that can be called from an ISR.
|
||||
*
|
||||
* The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupGetBitsFromISR()
|
||||
* to be available.
|
||||
*
|
||||
* @param xEventGroup The event group being queried.
|
||||
*
|
||||
* @return The event group bits at the time xEventGroupGetBitsFromISR() was called.
|
||||
|
|
@ -792,51 +741,23 @@ EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEG
|
|||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* void xEventGroupDelete( EventGroupHandle_t xEventGroup );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Delete an event group that was previously created by a call to
|
||||
* xEventGroupCreate(). Tasks that are blocked on the event group will be
|
||||
* unblocked and obtain 0 as the event group's value.
|
||||
*
|
||||
* The configUSE_EVENT_GROUPS configuration constant must be set to 1 for vEventGroupDelete()
|
||||
* to be available.
|
||||
*
|
||||
* @param xEventGroup The event group being deleted.
|
||||
*/
|
||||
void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* event_groups.h
|
||||
* @code{c}
|
||||
* BaseType_t xEventGroupGetStaticBuffer( EventGroupHandle_t xEventGroup,
|
||||
* StaticEventGroup_t ** ppxEventGroupBuffer );
|
||||
* @endcode
|
||||
*
|
||||
* Retrieve a pointer to a statically created event groups's data structure
|
||||
* buffer. It is the same buffer that is supplied at the time of creation.
|
||||
*
|
||||
* The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupGetStaticBuffer()
|
||||
* to be available.
|
||||
*
|
||||
* @param xEventGroup The event group for which to retrieve the buffer.
|
||||
*
|
||||
* @param ppxEventGroupBuffer Used to return a pointer to the event groups's
|
||||
* data structure buffer.
|
||||
*
|
||||
* @return pdTRUE if the buffer was retrieved, pdFALSE otherwise.
|
||||
*/
|
||||
#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
|
||||
BaseType_t xEventGroupGetStaticBuffer( EventGroupHandle_t xEventGroup,
|
||||
StaticEventGroup_t ** ppxEventGroupBuffer ) PRIVILEGED_FUNCTION;
|
||||
#endif /* configSUPPORT_STATIC_ALLOCATION */
|
||||
|
||||
/* For internal use only. */
|
||||
void vEventGroupSetBitsCallback( void * pvEventGroup,
|
||||
uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION;
|
||||
const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION;
|
||||
void vEventGroupClearBitsCallback( void * pvEventGroup,
|
||||
uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;
|
||||
const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;
|
||||
|
||||
|
||||
#if ( configUSE_TRACE_FACILITY == 1 )
|
||||
|
|
|
|||
138
include/list.h
138
include/list.h
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -33,7 +31,7 @@
|
|||
*
|
||||
* list_ts can only store pointers to list_item_ts. Each ListItem_t contains a
|
||||
* numeric value (xItemValue). Most of the time the lists are sorted in
|
||||
* ascending item value order.
|
||||
* descending item value order.
|
||||
*
|
||||
* Lists are created already containing one list item. The value of this
|
||||
* item is the maximum possible that can be stored, it is therefore always at
|
||||
|
|
@ -143,39 +141,35 @@
|
|||
struct xLIST;
|
||||
struct xLIST_ITEM
|
||||
{
|
||||
listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
configLIST_VOLATILE TickType_t xItemValue; /**< The value being listed. In most cases this is used to sort the list in ascending order. */
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxNext; /**< Pointer to the next ListItem_t in the list. */
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /**< Pointer to the previous ListItem_t in the list. */
|
||||
void * pvOwner; /**< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */
|
||||
struct xLIST * configLIST_VOLATILE pxContainer; /**< Pointer to the list in which this list item is placed (if any). */
|
||||
listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */
|
||||
void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */
|
||||
struct xLIST * configLIST_VOLATILE pxContainer; /*< Pointer to the list in which this list item is placed (if any). */
|
||||
listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
};
|
||||
typedef struct xLIST_ITEM ListItem_t;
|
||||
typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */
|
||||
|
||||
#if ( configUSE_MINI_LIST_ITEM == 1 )
|
||||
struct xMINI_LIST_ITEM
|
||||
{
|
||||
listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
configLIST_VOLATILE TickType_t xItemValue;
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxNext;
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
|
||||
};
|
||||
typedef struct xMINI_LIST_ITEM MiniListItem_t;
|
||||
#else
|
||||
typedef struct xLIST_ITEM MiniListItem_t;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Definition of the type of queue used by the scheduler.
|
||||
*/
|
||||
typedef struct xLIST
|
||||
{
|
||||
listFIRST_LIST_INTEGRITY_CHECK_VALUE /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
configLIST_VOLATILE UBaseType_t uxNumberOfItems;
|
||||
ListItem_t * configLIST_VOLATILE pxIndex; /**< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
|
||||
MiniListItem_t xListEnd; /**< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
|
||||
listSECOND_LIST_INTEGRITY_CHECK_VALUE /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
volatile UBaseType_t uxNumberOfItems;
|
||||
ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
|
||||
MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
|
||||
listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
} List_t;
|
||||
|
||||
/*
|
||||
|
|
@ -198,7 +192,7 @@ typedef struct xLIST
|
|||
|
||||
/*
|
||||
* Access macro to set the value of the list item. In most cases the value is
|
||||
* used to sort the list in ascending order.
|
||||
* used to sort the list in descending order.
|
||||
*
|
||||
* \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE
|
||||
* \ingroup LinkedList
|
||||
|
|
@ -282,107 +276,19 @@ typedef struct xLIST
|
|||
* \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#if ( configNUMBER_OF_CORES == 1 )
|
||||
#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \
|
||||
do { \
|
||||
{ \
|
||||
List_t * const pxConstList = ( pxList ); \
|
||||
/* Increment the index to the next item and return the item, ensuring */ \
|
||||
/* we don't return the marker used at the end of the list. */ \
|
||||
( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \
|
||||
if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \
|
||||
{ \
|
||||
( pxConstList )->pxIndex = ( pxConstList )->xListEnd.pxNext; \
|
||||
( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \
|
||||
} \
|
||||
( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \
|
||||
} while( 0 )
|
||||
#else /* #if ( configNUMBER_OF_CORES == 1 ) */
|
||||
}
|
||||
|
||||
/* This function is not required in SMP. FreeRTOS SMP scheduler doesn't use
|
||||
* pxIndex and it should always point to the xListEnd. Not defining this macro
|
||||
* here to prevent updating pxIndex.
|
||||
*/
|
||||
#endif /* #if ( configNUMBER_OF_CORES == 1 ) */
|
||||
|
||||
/*
|
||||
* Version of uxListRemove() that does not return a value. Provided as a slight
|
||||
* optimisation for xTaskIncrementTick() by being inline.
|
||||
*
|
||||
* Remove an item from a list. The list item has a pointer to the list that
|
||||
* it is in, so only the list item need be passed into the function.
|
||||
*
|
||||
* @param uxListRemove The item to be removed. The item will remove itself from
|
||||
* the list pointed to by it's pxContainer parameter.
|
||||
*
|
||||
* @return The number of items that remain in the list after the list item has
|
||||
* been removed.
|
||||
*
|
||||
* \page listREMOVE_ITEM listREMOVE_ITEM
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listREMOVE_ITEM( pxItemToRemove ) \
|
||||
do { \
|
||||
/* The list item knows which list it is in. Obtain the list from the list \
|
||||
* item. */ \
|
||||
List_t * const pxList = ( pxItemToRemove )->pxContainer; \
|
||||
\
|
||||
( pxItemToRemove )->pxNext->pxPrevious = ( pxItemToRemove )->pxPrevious; \
|
||||
( pxItemToRemove )->pxPrevious->pxNext = ( pxItemToRemove )->pxNext; \
|
||||
/* Make sure the index is left pointing to a valid item. */ \
|
||||
if( pxList->pxIndex == ( pxItemToRemove ) ) \
|
||||
{ \
|
||||
pxList->pxIndex = ( pxItemToRemove )->pxPrevious; \
|
||||
} \
|
||||
\
|
||||
( pxItemToRemove )->pxContainer = NULL; \
|
||||
( ( pxList )->uxNumberOfItems ) = ( UBaseType_t ) ( ( ( pxList )->uxNumberOfItems ) - 1U ); \
|
||||
} while( 0 )
|
||||
|
||||
/*
|
||||
* Inline version of vListInsertEnd() to provide slight optimisation for
|
||||
* xTaskIncrementTick().
|
||||
*
|
||||
* Insert a list item into a list. The item will be inserted in a position
|
||||
* such that it will be the last item within the list returned by multiple
|
||||
* calls to listGET_OWNER_OF_NEXT_ENTRY.
|
||||
*
|
||||
* The list member pxIndex is used to walk through a list. Calling
|
||||
* listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list.
|
||||
* Placing an item in a list using vListInsertEnd effectively places the item
|
||||
* in the list position pointed to by pxIndex. This means that every other
|
||||
* item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before
|
||||
* the pxIndex parameter again points to the item being inserted.
|
||||
*
|
||||
* @param pxList The list into which the item is to be inserted.
|
||||
*
|
||||
* @param pxNewListItem The list item to be inserted into the list.
|
||||
*
|
||||
* \page listINSERT_END listINSERT_END
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listINSERT_END( pxList, pxNewListItem ) \
|
||||
do { \
|
||||
ListItem_t * const pxIndex = ( pxList )->pxIndex; \
|
||||
\
|
||||
/* Only effective when configASSERT() is also defined, these tests may catch \
|
||||
* the list data structures being overwritten in memory. They will not catch \
|
||||
* data errors caused by incorrect configuration or use of FreeRTOS. */ \
|
||||
listTEST_LIST_INTEGRITY( ( pxList ) ); \
|
||||
listTEST_LIST_ITEM_INTEGRITY( ( pxNewListItem ) ); \
|
||||
\
|
||||
/* Insert a new list item into ( pxList ), but rather than sort the list, \
|
||||
* makes the new list item the last item to be removed by a call to \
|
||||
* listGET_OWNER_OF_NEXT_ENTRY(). */ \
|
||||
( pxNewListItem )->pxNext = pxIndex; \
|
||||
( pxNewListItem )->pxPrevious = pxIndex->pxPrevious; \
|
||||
\
|
||||
pxIndex->pxPrevious->pxNext = ( pxNewListItem ); \
|
||||
pxIndex->pxPrevious = ( pxNewListItem ); \
|
||||
\
|
||||
/* Remember which list the item is in. */ \
|
||||
( pxNewListItem )->pxContainer = ( pxList ); \
|
||||
\
|
||||
( ( pxList )->uxNumberOfItems ) = ( UBaseType_t ) ( ( ( pxList )->uxNumberOfItems ) + 1U ); \
|
||||
} while( 0 )
|
||||
|
||||
/*
|
||||
* Access function to obtain the owner of the first entry in a list. Lists
|
||||
|
|
@ -453,7 +359,7 @@ void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;
|
|||
|
||||
/*
|
||||
* Insert a list item into a list. The item will be inserted into the list in
|
||||
* a position determined by its item value (ascending item value order).
|
||||
* a position determined by its item value (descending item value order).
|
||||
*
|
||||
* @param pxList The list into which the item is to be inserted.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -43,12 +41,12 @@
|
|||
* writer and reader to be different tasks or interrupts, but, unlike other
|
||||
* FreeRTOS objects, it is not safe to have multiple different writers or
|
||||
* multiple different readers. If there are to be multiple different writers
|
||||
* then the application writer must serialize calls to writing API functions
|
||||
* (such as xStreamBufferSend()). Likewise, if there are to be multiple
|
||||
* different readers then the application writer must serialize calls to reading
|
||||
* API functions (such as xStreamBufferReceive()). One way to achieve such
|
||||
* serialization in single core or SMP kernel is to place each API call inside a
|
||||
* critical section and use a block time of 0.
|
||||
* then the application writer must place each call to a writing API function
|
||||
* (such as xMessageBufferSend()) inside a critical section and set the send
|
||||
* block time to 0. Likewise, if there are to be multiple different readers
|
||||
* then the application writer must place each call to a reading API function
|
||||
* (such as xMessageBufferRead()) inside a critical section and set the receive
|
||||
* timeout to 0.
|
||||
*
|
||||
* Message buffers hold variable length messages. To enable that, when a
|
||||
* message is written to the message buffer an additional sizeof( size_t ) bytes
|
||||
|
|
@ -80,19 +78,18 @@
|
|||
* Type by which message buffers are referenced. For example, a call to
|
||||
* xMessageBufferCreate() returns an MessageBufferHandle_t variable that can
|
||||
* then be used as a parameter to xMessageBufferSend(), xMessageBufferReceive(),
|
||||
* etc. Message buffer is essentially built as a stream buffer hence its handle
|
||||
* is also set to same type as a stream buffer handle.
|
||||
* etc.
|
||||
*/
|
||||
typedef StreamBufferHandle_t MessageBufferHandle_t;
|
||||
typedef void * MessageBufferHandle_t;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new message buffer using dynamically allocated memory. See
|
||||
* xMessageBufferCreateStatic() for a version that uses statically allocated
|
||||
|
|
@ -100,8 +97,6 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
*
|
||||
* configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
|
||||
* FreeRTOSConfig.h for xMessageBufferCreate() to be available.
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferCreate() to be available.
|
||||
*
|
||||
* @param xBufferSizeBytes The total number of bytes (not messages) the message
|
||||
* buffer will be able to hold at any one time. When a message is written to
|
||||
|
|
@ -110,18 +105,6 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* 32-bit architecture, so on most 32-bit architectures a 10 byte message will
|
||||
* take up 14 bytes of message buffer space.
|
||||
*
|
||||
* @param pxSendCompletedCallback Callback invoked when a send operation to the
|
||||
* message buffer is complete. If the parameter is NULL or xMessageBufferCreate()
|
||||
* is called without the parameter, then it will use the default implementation
|
||||
* provided by sbSEND_COMPLETED macro. To enable the callback,
|
||||
* configUSE_SB_COMPLETED_CALLBACK must be set to 1 in FreeRTOSConfig.h.
|
||||
*
|
||||
* @param pxReceiveCompletedCallback Callback invoked when a receive operation from
|
||||
* the message buffer is complete. If the parameter is NULL or xMessageBufferCreate()
|
||||
* is called without the parameter, it will use the default implementation provided
|
||||
* by sbRECEIVE_COMPLETED macro. To enable the callback,
|
||||
* configUSE_SB_COMPLETED_CALLBACK must be set to 1 in FreeRTOSConfig.h.
|
||||
*
|
||||
* @return If NULL is returned, then the message buffer cannot be created
|
||||
* because there is insufficient heap memory available for FreeRTOS to allocate
|
||||
* the message buffer data structures and storage area. A non-NULL value being
|
||||
|
|
@ -130,7 +113,7 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* buffer.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
*
|
||||
* void vAFunction( void )
|
||||
* {
|
||||
|
|
@ -140,7 +123,7 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* // Create a message buffer that can hold 100 bytes. The memory used to hold
|
||||
* // both the message buffer structure and the messages themselves is allocated
|
||||
* // dynamically. Each message added to the buffer consumes an additional 4
|
||||
* // bytes which are used to hold the length of the message.
|
||||
* // bytes which are used to hold the lengh of the message.
|
||||
* xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes );
|
||||
*
|
||||
* if( xMessageBuffer == NULL )
|
||||
|
|
@ -153,32 +136,24 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* // The message buffer was created successfully and can now be used.
|
||||
* }
|
||||
*
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xMessageBufferCreate xMessageBufferCreate
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferCreate( xBufferSizeBytes ) \
|
||||
xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( size_t ) 0, sbTYPE_MESSAGE_BUFFER, NULL, NULL )
|
||||
|
||||
#if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
|
||||
#define xMessageBufferCreateWithCallback( xBufferSizeBytes, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
|
||||
xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( size_t ) 0, sbTYPE_MESSAGE_BUFFER, ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
|
||||
#endif
|
||||
( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes,
|
||||
* uint8_t *pucMessageBufferStorageArea,
|
||||
* StaticMessageBuffer_t *pxStaticMessageBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
* Creates a new message buffer using statically allocated memory. See
|
||||
* xMessageBufferCreate() for a version that uses dynamically allocated memory.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferCreateStatic() to be available.
|
||||
*
|
||||
* @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
|
||||
* pucMessageBufferStorageArea parameter. When a message is written to the
|
||||
* message buffer an additional sizeof( size_t ) bytes are also written to store
|
||||
|
|
@ -188,29 +163,19 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* stored in the message buffer is actually (xBufferSizeBytes - 1).
|
||||
*
|
||||
* @param pucMessageBufferStorageArea Must point to a uint8_t array that is at
|
||||
* least xBufferSizeBytes big. This is the array to which messages are
|
||||
* least xBufferSizeBytes + 1 big. This is the array to which messages are
|
||||
* copied when they are written to the message buffer.
|
||||
*
|
||||
* @param pxStaticMessageBuffer Must point to a variable of type
|
||||
* StaticMessageBuffer_t, which will be used to hold the message buffer's data
|
||||
* structure.
|
||||
*
|
||||
* @param pxSendCompletedCallback Callback invoked when a new message is sent to the message buffer.
|
||||
* If the parameter is NULL or xMessageBufferCreate() is called without the parameter, then it will use the default
|
||||
* implementation provided by sbSEND_COMPLETED macro. To enable the callback,
|
||||
* configUSE_SB_COMPLETED_CALLBACK must be set to 1 in FreeRTOSConfig.h.
|
||||
*
|
||||
* @param pxReceiveCompletedCallback Callback invoked when a message is read from a
|
||||
* message buffer. If the parameter is NULL or xMessageBufferCreate() is called without the parameter, it will
|
||||
* use the default implementation provided by sbRECEIVE_COMPLETED macro. To enable the callback,
|
||||
* configUSE_SB_COMPLETED_CALLBACK must be set to 1 in FreeRTOSConfig.h.
|
||||
*
|
||||
* @return If the message buffer is created successfully then a handle to the
|
||||
* created message buffer is returned. If either pucMessageBufferStorageArea or
|
||||
* pxStaticmessageBuffer are NULL then NULL is returned.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
*
|
||||
* // Used to dimension the array used to hold the messages. The available space
|
||||
* // will actually be one less than this, so 999.
|
||||
|
|
@ -227,8 +192,8 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* {
|
||||
* MessageBufferHandle_t xMessageBuffer;
|
||||
*
|
||||
* xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucStorageBuffer ),
|
||||
* ucStorageBuffer,
|
||||
* xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ),
|
||||
* ucBufferStorage,
|
||||
* &xMessageBufferStruct );
|
||||
*
|
||||
* // As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer
|
||||
|
|
@ -238,61 +203,22 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* // Other code that uses the message buffer can go here.
|
||||
* }
|
||||
*
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) \
|
||||
xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), 0, sbTYPE_MESSAGE_BUFFER, ( pucMessageBufferStorageArea ), ( pxStaticMessageBuffer ), NULL, NULL )
|
||||
|
||||
#if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
|
||||
#define xMessageBufferCreateStaticWithCallback( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
|
||||
xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), 0, sbTYPE_MESSAGE_BUFFER, ( pucMessageBufferStorageArea ), ( pxStaticMessageBuffer ), ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
|
||||
#endif
|
||||
( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* BaseType_t xMessageBufferGetStaticBuffers( MessageBufferHandle_t xMessageBuffer,
|
||||
* uint8_t ** ppucMessageBufferStorageArea,
|
||||
* StaticMessageBuffer_t ** ppxStaticMessageBuffer );
|
||||
* @endcode
|
||||
*
|
||||
* Retrieve pointers to a statically created message buffer's data structure
|
||||
* buffer and storage area buffer. These are the same buffers that are supplied
|
||||
* at the time of creation.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferGetStaticBuffers() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The message buffer for which to retrieve the buffers.
|
||||
*
|
||||
* @param ppucMessageBufferStorageArea Used to return a pointer to the
|
||||
* message buffer's storage area buffer.
|
||||
*
|
||||
* @param ppxStaticMessageBuffer Used to return a pointer to the message
|
||||
* buffer's data structure buffer.
|
||||
*
|
||||
* @return pdTRUE if buffers were retrieved, pdFALSE otherwise..
|
||||
*
|
||||
* \defgroup xMessageBufferGetStaticBuffers xMessageBufferGetStaticBuffers
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
|
||||
#define xMessageBufferGetStaticBuffers( xMessageBuffer, ppucMessageBufferStorageArea, ppxStaticMessageBuffer ) \
|
||||
xStreamBufferGetStaticBuffers( ( xMessageBuffer ), ( ppucMessageBufferStorageArea ), ( ppxStaticMessageBuffer ) )
|
||||
#endif /* configSUPPORT_STATIC_ALLOCATION */
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,
|
||||
* const void *pvTxData,
|
||||
* size_t xDataLengthBytes,
|
||||
* TickType_t xTicksToWait );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Sends a discrete message to the message buffer. The message can be any
|
||||
* length that fits within the buffer's free space, and is copied into the
|
||||
|
|
@ -306,20 +232,17 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* writer and reader to be different tasks or interrupts, but, unlike other
|
||||
* FreeRTOS objects, it is not safe to have multiple different writers or
|
||||
* multiple different readers. If there are to be multiple different writers
|
||||
* then the application writer must serialize calls to writing API functions
|
||||
* (such as xStreamBufferSend()). Likewise, if there are to be multiple
|
||||
* different readers then the application writer must serialize calls to reading
|
||||
* API functions (such as xStreamBufferReceive()). One way to achieve such
|
||||
* serialization in single core or SMP kernel is to place each API call inside a
|
||||
* critical section and use a block time of 0.
|
||||
* then the application writer must place each call to a writing API function
|
||||
* (such as xMessageBufferSend()) inside a critical section and set the send
|
||||
* block time to 0. Likewise, if there are to be multiple different readers
|
||||
* then the application writer must place each call to a reading API function
|
||||
* (such as xMessageBufferRead()) inside a critical section and set the receive
|
||||
* block time to 0.
|
||||
*
|
||||
* Use xMessageBufferSend() to write to a message buffer from a task. Use
|
||||
* xMessageBufferSendFromISR() to write to a message buffer from an interrupt
|
||||
* service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferSend() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the message buffer to which a message is
|
||||
* being sent.
|
||||
*
|
||||
|
|
@ -352,7 +275,7 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* time out then xDataLengthBytes is returned.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* void vAFunction( MessageBufferHandle_t xMessageBuffer )
|
||||
* {
|
||||
* size_t xBytesSent;
|
||||
|
|
@ -380,22 +303,22 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* // not enough free space in the buffer.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xMessageBufferSend xMessageBufferSend
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) \
|
||||
xStreamBufferSend( ( xMessageBuffer ), ( pvTxData ), ( xDataLengthBytes ), ( xTicksToWait ) )
|
||||
xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,
|
||||
* const void *pvTxData,
|
||||
* size_t xDataLengthBytes,
|
||||
* BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Interrupt safe version of the API function that sends a discrete message to
|
||||
* the message buffer. The message can be any length that fits within the
|
||||
|
|
@ -409,20 +332,17 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* writer and reader to be different tasks or interrupts, but, unlike other
|
||||
* FreeRTOS objects, it is not safe to have multiple different writers or
|
||||
* multiple different readers. If there are to be multiple different writers
|
||||
* then the application writer must serialize calls to writing API functions
|
||||
* (such as xStreamBufferSend()). Likewise, if there are to be multiple
|
||||
* different readers then the application writer must serialize calls to reading
|
||||
* API functions (such as xStreamBufferReceive()). One way to achieve such
|
||||
* serialization in single core or SMP kernel is to place each API call inside a
|
||||
* critical section and use a block time of 0.
|
||||
* then the application writer must place each call to a writing API function
|
||||
* (such as xMessageBufferSend()) inside a critical section and set the send
|
||||
* block time to 0. Likewise, if there are to be multiple different readers
|
||||
* then the application writer must place each call to a reading API function
|
||||
* (such as xMessageBufferRead()) inside a critical section and set the receive
|
||||
* block time to 0.
|
||||
*
|
||||
* Use xMessageBufferSend() to write to a message buffer from a task. Use
|
||||
* xMessageBufferSendFromISR() to write to a message buffer from an interrupt
|
||||
* service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferSendFromISR() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the message buffer to which a message is
|
||||
* being sent.
|
||||
*
|
||||
|
|
@ -456,7 +376,7 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* then 0 is returned, otherwise xDataLengthBytes is returned.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // A message buffer that has already been created.
|
||||
* MessageBufferHandle_t xMessageBuffer;
|
||||
*
|
||||
|
|
@ -488,22 +408,22 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* // documentation for the port in use for port specific instructions.
|
||||
* portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) \
|
||||
xStreamBufferSendFromISR( ( xMessageBuffer ), ( pvTxData ), ( xDataLengthBytes ), ( pxHigherPriorityTaskWoken ) )
|
||||
xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,
|
||||
* void *pvRxData,
|
||||
* size_t xBufferLengthBytes,
|
||||
* TickType_t xTicksToWait );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Receives a discrete message from a message buffer. Messages can be of
|
||||
* variable length and are copied out of the buffer.
|
||||
|
|
@ -516,20 +436,17 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* writer and reader to be different tasks or interrupts, but, unlike other
|
||||
* FreeRTOS objects, it is not safe to have multiple different writers or
|
||||
* multiple different readers. If there are to be multiple different writers
|
||||
* then the application writer must serialize calls to writing API functions
|
||||
* (such as xStreamBufferSend()). Likewise, if there are to be multiple
|
||||
* different readers then the application writer must serialize calls to reading
|
||||
* API functions (such as xStreamBufferReceive()). One way to achieve such
|
||||
* serialization in single core or SMP kernel is to place each API call inside a
|
||||
* critical section and use a block time of 0.
|
||||
* then the application writer must place each call to a writing API function
|
||||
* (such as xMessageBufferSend()) inside a critical section and set the send
|
||||
* block time to 0. Likewise, if there are to be multiple different readers
|
||||
* then the application writer must place each call to a reading API function
|
||||
* (such as xMessageBufferRead()) inside a critical section and set the receive
|
||||
* block time to 0.
|
||||
*
|
||||
* Use xMessageBufferReceive() to read from a message buffer from a task. Use
|
||||
* xMessageBufferReceiveFromISR() to read from a message buffer from an
|
||||
* interrupt service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferReceive() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the message buffer from which a message
|
||||
* is being received.
|
||||
*
|
||||
|
|
@ -559,7 +476,7 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* zero is returned.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* void vAFunction( MessageBuffer_t xMessageBuffer )
|
||||
* {
|
||||
* uint8_t ucRxData[ 20 ];
|
||||
|
|
@ -580,23 +497,23 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* // the message here....
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xMessageBufferReceive xMessageBufferReceive
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) \
|
||||
xStreamBufferReceive( ( xMessageBuffer ), ( pvRxData ), ( xBufferLengthBytes ), ( xTicksToWait ) )
|
||||
xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
|
||||
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,
|
||||
* void *pvRxData,
|
||||
* size_t xBufferLengthBytes,
|
||||
* BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* An interrupt safe version of the API function that receives a discrete
|
||||
* message from a message buffer. Messages can be of variable length and are
|
||||
|
|
@ -610,20 +527,17 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* writer and reader to be different tasks or interrupts, but, unlike other
|
||||
* FreeRTOS objects, it is not safe to have multiple different writers or
|
||||
* multiple different readers. If there are to be multiple different writers
|
||||
* then the application writer must serialize calls to writing API functions
|
||||
* (such as xStreamBufferSend()). Likewise, if there are to be multiple
|
||||
* different readers then the application writer must serialize calls to reading
|
||||
* API functions (such as xStreamBufferReceive()). One way to achieve such
|
||||
* serialization in single core or SMP kernel is to place each API call inside a
|
||||
* critical section and use a block time of 0.
|
||||
* then the application writer must place each call to a writing API function
|
||||
* (such as xMessageBufferSend()) inside a critical section and set the send
|
||||
* block time to 0. Likewise, if there are to be multiple different readers
|
||||
* then the application writer must place each call to a reading API function
|
||||
* (such as xMessageBufferRead()) inside a critical section and set the receive
|
||||
* block time to 0.
|
||||
*
|
||||
* Use xMessageBufferReceive() to read from a message buffer from a task. Use
|
||||
* xMessageBufferReceiveFromISR() to read from a message buffer from an
|
||||
* interrupt service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferReceiveFromISR() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the message buffer from which a message
|
||||
* is being received.
|
||||
*
|
||||
|
|
@ -653,7 +567,7 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* any.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // A message buffer that has already been created.
|
||||
* MessageBuffer_t xMessageBuffer;
|
||||
*
|
||||
|
|
@ -685,19 +599,19 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* // documentation for the port in use for port specific instructions.
|
||||
* portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) \
|
||||
xStreamBufferReceiveFromISR( ( xMessageBuffer ), ( pvRxData ), ( xBufferLengthBytes ), ( pxHigherPriorityTaskWoken ) )
|
||||
xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Deletes a message buffer that was previously created using a call to
|
||||
* xMessageBufferCreate() or xMessageBufferCreateStatic(). If the message
|
||||
|
|
@ -707,47 +621,38 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* A message buffer handle must not be used after the message buffer has been
|
||||
* deleted.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* vMessageBufferDelete() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the message buffer to be deleted.
|
||||
*
|
||||
*/
|
||||
#define vMessageBufferDelete( xMessageBuffer ) \
|
||||
vStreamBufferDelete( xMessageBuffer )
|
||||
vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
* @code{c}
|
||||
* BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer );
|
||||
* @endcode
|
||||
* <pre>
|
||||
* BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );
|
||||
* </pre>
|
||||
*
|
||||
* Tests to see if a message buffer is full. A message buffer is full if it
|
||||
* cannot accept any more messages, of any size, until space is made available
|
||||
* by a message being removed from the message buffer.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferIsFull() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the message buffer being queried.
|
||||
*
|
||||
* @return If the message buffer referenced by xMessageBuffer is full then
|
||||
* pdTRUE is returned. Otherwise pdFALSE is returned.
|
||||
*/
|
||||
#define xMessageBufferIsFull( xMessageBuffer ) \
|
||||
xStreamBufferIsFull( xMessageBuffer )
|
||||
xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
* @code{c}
|
||||
* BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer );
|
||||
* @endcode
|
||||
* <pre>
|
||||
* BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );
|
||||
* </pre>
|
||||
*
|
||||
* Tests to see if a message buffer is empty (does not contain any messages).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferIsEmpty() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the message buffer being queried.
|
||||
*
|
||||
* @return If the message buffer referenced by xMessageBuffer is empty then
|
||||
|
|
@ -755,26 +660,19 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
*
|
||||
*/
|
||||
#define xMessageBufferIsEmpty( xMessageBuffer ) \
|
||||
xStreamBufferIsEmpty( xMessageBuffer )
|
||||
xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Resets a message buffer to its initial empty state, discarding any message it
|
||||
* contained.
|
||||
*
|
||||
* A message buffer can only be reset if there are no tasks blocked on it.
|
||||
*
|
||||
* Use xMessageBufferReset() to reset a message buffer from a task.
|
||||
* Use xMessageBufferResetFromISR() to reset a message buffer from an
|
||||
* interrupt service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferReset() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the message buffer being reset.
|
||||
*
|
||||
* @return If the message buffer was reset then pdPASS is returned. If the
|
||||
|
|
@ -786,51 +684,16 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferReset( xMessageBuffer ) \
|
||||
xStreamBufferReset( xMessageBuffer )
|
||||
xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
* @code{c}
|
||||
* BaseType_t xMessageBufferResetFromISR( MessageBufferHandle_t xMessageBuffer );
|
||||
* @endcode
|
||||
*
|
||||
* An interrupt safe version of the API function that resets the message buffer.
|
||||
* Resets a message buffer to its initial empty state, discarding any message it
|
||||
* contained.
|
||||
*
|
||||
* A message buffer can only be reset if there are no tasks blocked on it.
|
||||
*
|
||||
* Use xMessageBufferReset() to reset a message buffer from a task.
|
||||
* Use xMessageBufferResetFromISR() to reset a message buffer from an
|
||||
* interrupt service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferResetFromISR() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the message buffer being reset.
|
||||
*
|
||||
* @return If the message buffer was reset then pdPASS is returned. If the
|
||||
* message buffer could not be reset because either there was a task blocked on
|
||||
* the message queue to wait for space to become available, or to wait for a
|
||||
* a message to be available, then pdFAIL is returned.
|
||||
*
|
||||
* \defgroup xMessageBufferResetFromISR xMessageBufferResetFromISR
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferResetFromISR( xMessageBuffer ) \
|
||||
xStreamBufferResetFromISR( xMessageBuffer )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
* @code{c}
|
||||
* size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer );
|
||||
* @endcode
|
||||
* <pre>
|
||||
* size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
|
||||
* </pre>
|
||||
* Returns the number of bytes of free space in the message buffer.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferSpaceAvailable() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the message buffer being queried.
|
||||
*
|
||||
* @return The number of bytes that can be written to the message buffer before
|
||||
|
|
@ -844,22 +707,19 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferSpaceAvailable( xMessageBuffer ) \
|
||||
xStreamBufferSpacesAvailable( xMessageBuffer )
|
||||
xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
#define xMessageBufferSpacesAvailable( xMessageBuffer ) \
|
||||
xStreamBufferSpacesAvailable( xMessageBuffer ) /* Corrects typo in original macro name. */
|
||||
xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
* @code{c}
|
||||
* size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer );
|
||||
* @endcode
|
||||
* <pre>
|
||||
* size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ) );
|
||||
* </pre>
|
||||
* Returns the length (in bytes) of the next message in a message buffer.
|
||||
* Useful if xMessageBufferReceive() returned 0 because the size of the buffer
|
||||
* passed into xMessageBufferReceive() was too small to hold the next message.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferNextLengthBytes() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the message buffer being queried.
|
||||
*
|
||||
* @return The length (in bytes) of the next message in the message buffer, or 0
|
||||
|
|
@ -869,14 +729,14 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferNextLengthBytes( xMessageBuffer ) \
|
||||
xStreamBufferNextMessageLengthBytes( xMessageBuffer )
|
||||
xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xMessageBuffer, BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* @endcode
|
||||
* <pre>
|
||||
* BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* </pre>
|
||||
*
|
||||
* For advanced users only.
|
||||
*
|
||||
|
|
@ -891,10 +751,7 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
|
||||
* additional information.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferSendCompletedFromISR() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the stream buffer to which data was
|
||||
* @param xStreamBuffer The handle of the stream buffer to which data was
|
||||
* written.
|
||||
*
|
||||
* @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
|
||||
|
|
@ -912,14 +769,14 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
|
||||
xStreamBufferSendCompletedFromISR( ( xMessageBuffer ), ( pxHigherPriorityTaskWoken ) )
|
||||
xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xMessageBuffer, BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* @endcode
|
||||
* <pre>
|
||||
* BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* </pre>
|
||||
*
|
||||
* For advanced users only.
|
||||
*
|
||||
|
|
@ -935,10 +792,7 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
|
||||
* additional information.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xMessageBufferReceiveCompletedFromISR() to be available.
|
||||
*
|
||||
* @param xMessageBuffer The handle of the stream buffer from which data was
|
||||
* @param xStreamBuffer The handle of the stream buffer from which data was
|
||||
* read.
|
||||
*
|
||||
* @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
|
||||
|
|
@ -956,7 +810,7 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
|
|||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
|
||||
xStreamBufferReceiveCompletedFromISR( ( xMessageBuffer ), ( pxHigherPriorityTaskWoken ) )
|
||||
xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#if defined( __cplusplus )
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -38,43 +36,21 @@
|
|||
#ifndef MPU_PROTOTYPES_H
|
||||
#define MPU_PROTOTYPES_H
|
||||
|
||||
typedef struct xTaskGenericNotifyParams
|
||||
{
|
||||
TaskHandle_t xTaskToNotify;
|
||||
UBaseType_t uxIndexToNotify;
|
||||
uint32_t ulValue;
|
||||
eNotifyAction eAction;
|
||||
uint32_t * pulPreviousNotificationValue;
|
||||
} xTaskGenericNotifyParams_t;
|
||||
|
||||
typedef struct xTaskGenericNotifyWaitParams
|
||||
{
|
||||
UBaseType_t uxIndexToWaitOn;
|
||||
uint32_t ulBitsToClearOnEntry;
|
||||
uint32_t ulBitsToClearOnExit;
|
||||
uint32_t * pulNotificationValue;
|
||||
TickType_t xTicksToWait;
|
||||
} xTaskGenericNotifyWaitParams_t;
|
||||
|
||||
typedef struct xTimerGenericCommandFromTaskParams
|
||||
{
|
||||
TimerHandle_t xTimer;
|
||||
BaseType_t xCommandID;
|
||||
TickType_t xOptionalValue;
|
||||
BaseType_t * pxHigherPriorityTaskWoken;
|
||||
TickType_t xTicksToWait;
|
||||
} xTimerGenericCommandFromTaskParams_t;
|
||||
|
||||
typedef struct xEventGroupWaitBitsParams
|
||||
{
|
||||
EventGroupHandle_t xEventGroup;
|
||||
EventBits_t uxBitsToWaitFor;
|
||||
BaseType_t xClearOnExit;
|
||||
BaseType_t xWaitForAllBits;
|
||||
TickType_t xTicksToWait;
|
||||
} xEventGroupWaitBitsParams_t;
|
||||
|
||||
/* MPU versions of task.h API functions. */
|
||||
/* MPU versions of tasks.h API functions. */
|
||||
BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
|
||||
const char * const pcName,
|
||||
const uint16_t usStackDepth,
|
||||
void * const pvParameters,
|
||||
UBaseType_t uxPriority,
|
||||
TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
|
||||
TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
|
||||
const char * const pcName,
|
||||
const uint32_t ulStackDepth,
|
||||
void * const pvParameters,
|
||||
UBaseType_t uxPriority,
|
||||
StackType_t * const puxStackBuffer,
|
||||
StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
|
||||
const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
|
||||
|
|
@ -85,10 +61,17 @@ void MPU_vTaskGetInfo( TaskHandle_t xTask,
|
|||
TaskStatus_t * pxTaskStatus,
|
||||
BaseType_t xGetFreeStackSpace,
|
||||
eTaskState eState ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskPrioritySet( TaskHandle_t xTask,
|
||||
UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskResume( TaskHandle_t xTaskToResume ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskStartScheduler( void ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskSuspendAll( void ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL;
|
||||
TickType_t MPU_xTaskGetTickCount( void ) FREERTOS_SYSTEM_CALL;
|
||||
UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) FREERTOS_SYSTEM_CALL;
|
||||
char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) FREERTOS_SYSTEM_CALL;
|
||||
TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) FREERTOS_SYSTEM_CALL;
|
||||
UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
|
||||
configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask,
|
||||
|
|
@ -99,26 +82,25 @@ void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
|
|||
void * pvValue ) FREERTOS_SYSTEM_CALL;
|
||||
void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
|
||||
BaseType_t xIndex ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
|
||||
void * pvParameter ) FREERTOS_SYSTEM_CALL;
|
||||
TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL;
|
||||
UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
|
||||
const UBaseType_t uxArraySize,
|
||||
configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
|
||||
configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
|
||||
configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
|
||||
configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
|
||||
configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) FREERTOS_SYSTEM_CALL;
|
||||
uint32_t * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
|
||||
uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskList( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskGetRunTimeStats( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify,
|
||||
UBaseType_t uxIndexToNotify,
|
||||
uint32_t ulValue,
|
||||
eNotifyAction eAction,
|
||||
uint32_t * pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
|
||||
uint32_t ulBitsToClearOnEntry,
|
||||
uint32_t ulBitsToClearOnExit,
|
||||
uint32_t * pulNotificationValue,
|
||||
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
|
||||
uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
|
||||
BaseType_t xClearCountOnExit,
|
||||
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
|
|
@ -127,92 +109,14 @@ BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask,
|
|||
uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
|
||||
UBaseType_t uxIndexToClear,
|
||||
uint32_t ulBitsToClear ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskIncrementTick( void ) FREERTOS_SYSTEM_CALL;
|
||||
TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
|
||||
TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskMissedYield( void ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
|
||||
|
||||
/* Privileged only wrappers for Task APIs. These are needed so that
|
||||
* the application can use opaque handles maintained in mpu_wrappers.c
|
||||
* with all the APIs. */
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
|
||||
|
||||
BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
|
||||
const char * const pcName,
|
||||
const configSTACK_DEPTH_TYPE uxStackDepth,
|
||||
void * const pvParameters,
|
||||
UBaseType_t uxPriority,
|
||||
TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
|
||||
TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
|
||||
const char * const pcName,
|
||||
const configSTACK_DEPTH_TYPE uxStackDepth,
|
||||
void * const pvParameters,
|
||||
UBaseType_t uxPriority,
|
||||
StackType_t * const puxStackBuffer,
|
||||
StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskPrioritySet( TaskHandle_t xTask,
|
||||
UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
|
||||
TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
|
||||
void * pvParameter ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskGetRunTimeStatistics( char * pcWriteBuffer,
|
||||
size_t uxBufferLength ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskListTasks( char * pcWriteBuffer,
|
||||
size_t uxBufferLength ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTaskSuspendAll( void ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL;
|
||||
|
||||
#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
|
||||
|
||||
BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
|
||||
const char * const pcName,
|
||||
const configSTACK_DEPTH_TYPE uxStackDepth,
|
||||
void * const pvParameters,
|
||||
UBaseType_t uxPriority,
|
||||
TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION;
|
||||
TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
|
||||
const char * const pcName,
|
||||
const configSTACK_DEPTH_TYPE uxStackDepth,
|
||||
void * const pvParameters,
|
||||
UBaseType_t uxPriority,
|
||||
StackType_t * const puxStackBuffer,
|
||||
StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION;
|
||||
void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
|
||||
void MPU_vTaskPrioritySet( TaskHandle_t xTask,
|
||||
UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;
|
||||
TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
|
||||
void * pvParameter ) PRIVILEGED_FUNCTION;
|
||||
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
|
||||
|
||||
char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
|
||||
TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
|
||||
TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
|
||||
void MPU_vTaskAllocateMPURegions( TaskHandle_t xTaskToModify,
|
||||
const MemoryRegion_t * const xRegions ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xTaskGetStaticBuffers( TaskHandle_t xTask,
|
||||
StackType_t ** ppuxStackBuffer,
|
||||
StaticTask_t ** ppxTaskBuffer ) PRIVILEGED_FUNCTION;
|
||||
UBaseType_t MPU_uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
|
||||
UBaseType_t MPU_uxTaskBasePriorityGet( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
|
||||
UBaseType_t MPU_uxTaskBasePriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
|
||||
TaskHookFunction_t MPU_xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
|
||||
UBaseType_t uxIndexToNotify,
|
||||
uint32_t ulValue,
|
||||
eNotifyAction eAction,
|
||||
uint32_t * pulPreviousNotificationValue,
|
||||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
void MPU_vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
|
||||
UBaseType_t uxIndexToNotify,
|
||||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/* MPU versions of queue.h API functions. */
|
||||
BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue,
|
||||
|
|
@ -229,28 +133,6 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue,
|
|||
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
||||
UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
||||
TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex,
|
||||
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vQueueAddToRegistry( QueueHandle_t xQueue,
|
||||
const char * pcName ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
||||
const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
|
||||
QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
|
||||
QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
|
||||
const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue,
|
||||
UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL;
|
||||
UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
||||
uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
||||
|
||||
/* Privileged only wrappers for Queue APIs. These are needed so that
|
||||
* the application can use opaque handles maintained in mpu_wrappers.c
|
||||
* with all the APIs. */
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
|
||||
|
||||
void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
||||
QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
|
||||
QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
|
||||
|
|
@ -260,6 +142,14 @@ uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
|||
QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
|
||||
const UBaseType_t uxInitialCount,
|
||||
StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
|
||||
TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex,
|
||||
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vQueueAddToRegistry( QueueHandle_t xQueue,
|
||||
const char * pcName ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
||||
const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
||||
QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength,
|
||||
const UBaseType_t uxItemSize,
|
||||
const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
|
||||
|
|
@ -269,113 +159,61 @@ uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
|||
StaticQueue_t * pxStaticQueue,
|
||||
const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
|
||||
QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL;
|
||||
QueueSetHandle_t MPU_xQueueCreateSetStatic( const UBaseType_t uxEventQueueLength,
|
||||
uint8_t * pucQueueStorage,
|
||||
StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
|
||||
QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
|
||||
QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
|
||||
QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
|
||||
const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
|
||||
BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL;
|
||||
|
||||
#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
|
||||
|
||||
void MPU_vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
|
||||
QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
|
||||
QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
|
||||
StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
|
||||
QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
|
||||
const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;
|
||||
QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
|
||||
const UBaseType_t uxInitialCount,
|
||||
StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
|
||||
QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength,
|
||||
const UBaseType_t uxItemSize,
|
||||
const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
|
||||
QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
|
||||
const UBaseType_t uxItemSize,
|
||||
uint8_t * pucQueueStorage,
|
||||
StaticQueue_t * pxStaticQueue,
|
||||
const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
|
||||
QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
|
||||
QueueSetHandle_t MPU_xQueueCreateSetStatic( const UBaseType_t uxEventQueueLength,
|
||||
uint8_t * pucQueueStorage,
|
||||
StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
|
||||
QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
|
||||
BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;
|
||||
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
|
||||
|
||||
BaseType_t MPU_xQueueGenericGetStaticBuffers( QueueHandle_t xQueue,
|
||||
uint8_t ** ppucQueueStorage,
|
||||
StaticQueue_t ** ppxStaticQueue ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xQueueGenericSendFromISR( QueueHandle_t xQueue,
|
||||
const void * const pvItemToQueue,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken,
|
||||
const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xQueueGiveFromISR( QueueHandle_t xQueue,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t xQueue,
|
||||
void * const pvBuffer ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xQueueReceiveFromISR( QueueHandle_t xQueue,
|
||||
void * const pvBuffer,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
|
||||
UBaseType_t MPU_uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
|
||||
TaskHandle_t MPU_xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
|
||||
QueueSetMemberHandle_t MPU_xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
|
||||
void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue,
|
||||
UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL;
|
||||
UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
||||
uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
|
||||
|
||||
/* MPU versions of timers.h API functions. */
|
||||
TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName,
|
||||
const TickType_t xTimerPeriodInTicks,
|
||||
const UBaseType_t uxAutoReload,
|
||||
void * const pvTimerID,
|
||||
TimerCallbackFunction_t pxCallbackFunction ) FREERTOS_SYSTEM_CALL;
|
||||
TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName,
|
||||
const TickType_t xTimerPeriodInTicks,
|
||||
const UBaseType_t uxAutoReload,
|
||||
void * const pvTimerID,
|
||||
TimerCallbackFunction_t pxCallbackFunction,
|
||||
StaticTimer_t * pxTimerBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTimerSetTimerID( TimerHandle_t xTimer,
|
||||
void * pvNewID ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
|
||||
TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTimerGenericCommandFromTask( TimerHandle_t xTimer,
|
||||
BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
|
||||
void * pvParameter1,
|
||||
uint32_t ulParameter2,
|
||||
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
|
||||
const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
|
||||
UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
|
||||
TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
|
||||
TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTimerCreateTimerTask( void ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer,
|
||||
const BaseType_t xCommandID,
|
||||
const TickType_t xOptionalValue,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken,
|
||||
const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTimerGenericCommandFromTaskEntry( const xTimerGenericCommandFromTaskParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
|
||||
const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
|
||||
const BaseType_t xAutoReload ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
|
||||
UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
|
||||
TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
|
||||
TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
|
||||
|
||||
/* Privileged only wrappers for Timer APIs. These are needed so that
|
||||
* the application can use opaque handles maintained in mpu_wrappers.c
|
||||
* with all the APIs. */
|
||||
TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName,
|
||||
const TickType_t xTimerPeriodInTicks,
|
||||
const BaseType_t xAutoReload,
|
||||
void * const pvTimerID,
|
||||
TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION;
|
||||
TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName,
|
||||
const TickType_t xTimerPeriodInTicks,
|
||||
const BaseType_t xAutoReload,
|
||||
void * const pvTimerID,
|
||||
TimerCallbackFunction_t pxCallbackFunction,
|
||||
StaticTimer_t * pxTimerBuffer ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xTimerGetStaticBuffer( TimerHandle_t xTimer,
|
||||
StaticTimer_t ** ppxTimerBuffer ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xTimerGenericCommandFromISR( TimerHandle_t xTimer,
|
||||
const BaseType_t xCommandID,
|
||||
const TickType_t xOptionalValue,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken,
|
||||
const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/* MPU versions of event_group.h API functions. */
|
||||
EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL;
|
||||
EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
|
||||
const EventBits_t uxBitsToWaitFor,
|
||||
const BaseType_t xClearOnExit,
|
||||
const BaseType_t xWaitForAllBits,
|
||||
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
|
||||
EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup,
|
||||
const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL;
|
||||
EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup,
|
||||
|
|
@ -384,37 +222,8 @@ EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup,
|
|||
const EventBits_t uxBitsToSet,
|
||||
const EventBits_t uxBitsToWaitFor,
|
||||
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
#if ( configUSE_TRACE_FACILITY == 1 )
|
||||
UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vEventGroupSetNumber( void * xEventGroup,
|
||||
UBaseType_t uxEventGroupNumber ) FREERTOS_SYSTEM_CALL;
|
||||
#endif /* #if ( configUSE_TRACE_FACILITY == 1 ) */
|
||||
|
||||
/* Privileged only wrappers for Event Group APIs. These are needed so that
|
||||
* the application can use opaque handles maintained in mpu_wrappers.c
|
||||
* with all the APIs. */
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
|
||||
|
||||
EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL;
|
||||
EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL;
|
||||
|
||||
#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
|
||||
|
||||
EventGroupHandle_t MPU_xEventGroupCreate( void ) PRIVILEGED_FUNCTION;
|
||||
EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) PRIVILEGED_FUNCTION;
|
||||
void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
|
||||
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
|
||||
|
||||
BaseType_t MPU_xEventGroupGetStaticBuffer( EventGroupHandle_t xEventGroup,
|
||||
StaticEventGroup_t ** ppxEventGroupBuffer ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup,
|
||||
const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup,
|
||||
const EventBits_t uxBitsToSet,
|
||||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
EventBits_t MPU_xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
|
||||
UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) FREERTOS_SYSTEM_CALL;
|
||||
|
||||
/* MPU versions of message/stream_buffer.h API functions. */
|
||||
size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
|
||||
|
|
@ -425,68 +234,24 @@ size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
|
|||
void * pvRxData,
|
||||
size_t xBufferLengthBytes,
|
||||
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
|
||||
size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
|
||||
size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL;
|
||||
size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
|
||||
/* Privileged only wrappers for Stream Buffer APIs. These are needed so that
|
||||
* the application can use opaque handles maintained in mpu_wrappers.c
|
||||
* with all the APIs. */
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
|
||||
|
||||
StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
|
||||
size_t xTriggerLevelBytes,
|
||||
BaseType_t xStreamBufferType,
|
||||
StreamBufferCallbackFunction_t pxSendCompletedCallback,
|
||||
StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t xIsMessageBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
|
||||
size_t xTriggerLevelBytes,
|
||||
BaseType_t xStreamBufferType,
|
||||
BaseType_t xIsMessageBuffer,
|
||||
uint8_t * const pucStreamBufferStorageArea,
|
||||
StaticStreamBuffer_t * const pxStaticStreamBuffer,
|
||||
StreamBufferCallbackFunction_t pxSendCompletedCallback,
|
||||
StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) FREERTOS_SYSTEM_CALL;
|
||||
void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
StaticStreamBuffer_t * const pxStaticStreamBuffer ) FREERTOS_SYSTEM_CALL;
|
||||
|
||||
#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
|
||||
|
||||
StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
|
||||
size_t xTriggerLevelBytes,
|
||||
BaseType_t xStreamBufferType,
|
||||
StreamBufferCallbackFunction_t pxSendCompletedCallback,
|
||||
StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
|
||||
StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
|
||||
size_t xTriggerLevelBytes,
|
||||
BaseType_t xStreamBufferType,
|
||||
uint8_t * const pucStreamBufferStorageArea,
|
||||
StaticStreamBuffer_t * const pxStaticStreamBuffer,
|
||||
StreamBufferCallbackFunction_t pxSendCompletedCallback,
|
||||
StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
|
||||
void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
|
||||
|
||||
BaseType_t MPU_xStreamBufferGetStaticBuffers( StreamBufferHandle_t xStreamBuffers,
|
||||
uint8_t * ppucStreamBufferStorageArea,
|
||||
StaticStreamBuffer_t * ppxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
size_t MPU_xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
const void * pvTxData,
|
||||
size_t xDataLengthBytes,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
size_t MPU_xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
void * pvRxData,
|
||||
size_t xBufferLengthBytes,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t MPU_xStreamBufferResetFromISR( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
#endif /* MPU_PROTOTYPES_H */
|
||||
|
|
|
|||
|
|
@ -1,105 +0,0 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef MPU_SYSCALL_NUMBERS_H
|
||||
#define MPU_SYSCALL_NUMBERS_H
|
||||
|
||||
/* Numbers assigned to various system calls. */
|
||||
#define SYSTEM_CALL_xTaskGenericNotify 0
|
||||
#define SYSTEM_CALL_xTaskGenericNotifyWait 1
|
||||
#define SYSTEM_CALL_xTimerGenericCommandFromTask 2
|
||||
#define SYSTEM_CALL_xEventGroupWaitBits 3
|
||||
#define SYSTEM_CALL_xTaskDelayUntil 4
|
||||
#define SYSTEM_CALL_xTaskAbortDelay 5
|
||||
#define SYSTEM_CALL_vTaskDelay 6
|
||||
#define SYSTEM_CALL_uxTaskPriorityGet 7
|
||||
#define SYSTEM_CALL_eTaskGetState 8
|
||||
#define SYSTEM_CALL_vTaskGetInfo 9
|
||||
#define SYSTEM_CALL_xTaskGetIdleTaskHandle 10
|
||||
#define SYSTEM_CALL_vTaskSuspend 11
|
||||
#define SYSTEM_CALL_vTaskResume 12
|
||||
#define SYSTEM_CALL_xTaskGetTickCount 13
|
||||
#define SYSTEM_CALL_uxTaskGetNumberOfTasks 14
|
||||
#define SYSTEM_CALL_ulTaskGetRunTimeCounter 15
|
||||
#define SYSTEM_CALL_ulTaskGetRunTimePercent 16
|
||||
#define SYSTEM_CALL_ulTaskGetIdleRunTimePercent 17
|
||||
#define SYSTEM_CALL_ulTaskGetIdleRunTimeCounter 18
|
||||
#define SYSTEM_CALL_vTaskSetApplicationTaskTag 19
|
||||
#define SYSTEM_CALL_xTaskGetApplicationTaskTag 20
|
||||
#define SYSTEM_CALL_vTaskSetThreadLocalStoragePointer 21
|
||||
#define SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer 22
|
||||
#define SYSTEM_CALL_uxTaskGetSystemState 23
|
||||
#define SYSTEM_CALL_uxTaskGetStackHighWaterMark 24
|
||||
#define SYSTEM_CALL_uxTaskGetStackHighWaterMark2 25
|
||||
#define SYSTEM_CALL_xTaskGetCurrentTaskHandle 26
|
||||
#define SYSTEM_CALL_xTaskGetSchedulerState 27
|
||||
#define SYSTEM_CALL_vTaskSetTimeOutState 28
|
||||
#define SYSTEM_CALL_xTaskCheckForTimeOut 29
|
||||
#define SYSTEM_CALL_ulTaskGenericNotifyTake 30
|
||||
#define SYSTEM_CALL_xTaskGenericNotifyStateClear 31
|
||||
#define SYSTEM_CALL_ulTaskGenericNotifyValueClear 32
|
||||
#define SYSTEM_CALL_xQueueGenericSend 33
|
||||
#define SYSTEM_CALL_uxQueueMessagesWaiting 34
|
||||
#define SYSTEM_CALL_uxQueueSpacesAvailable 35
|
||||
#define SYSTEM_CALL_xQueueReceive 36
|
||||
#define SYSTEM_CALL_xQueuePeek 37
|
||||
#define SYSTEM_CALL_xQueueSemaphoreTake 38
|
||||
#define SYSTEM_CALL_xQueueGetMutexHolder 39
|
||||
#define SYSTEM_CALL_xQueueTakeMutexRecursive 40
|
||||
#define SYSTEM_CALL_xQueueGiveMutexRecursive 41
|
||||
#define SYSTEM_CALL_xQueueSelectFromSet 42
|
||||
#define SYSTEM_CALL_xQueueAddToSet 43
|
||||
#define SYSTEM_CALL_vQueueAddToRegistry 44
|
||||
#define SYSTEM_CALL_vQueueUnregisterQueue 45
|
||||
#define SYSTEM_CALL_pcQueueGetName 46
|
||||
#define SYSTEM_CALL_pvTimerGetTimerID 47
|
||||
#define SYSTEM_CALL_vTimerSetTimerID 48
|
||||
#define SYSTEM_CALL_xTimerIsTimerActive 49
|
||||
#define SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle 50
|
||||
#define SYSTEM_CALL_pcTimerGetName 51
|
||||
#define SYSTEM_CALL_vTimerSetReloadMode 52
|
||||
#define SYSTEM_CALL_xTimerGetReloadMode 53
|
||||
#define SYSTEM_CALL_uxTimerGetReloadMode 54
|
||||
#define SYSTEM_CALL_xTimerGetPeriod 55
|
||||
#define SYSTEM_CALL_xTimerGetExpiryTime 56
|
||||
#define SYSTEM_CALL_xEventGroupClearBits 57
|
||||
#define SYSTEM_CALL_xEventGroupSetBits 58
|
||||
#define SYSTEM_CALL_xEventGroupSync 59
|
||||
#define SYSTEM_CALL_uxEventGroupGetNumber 60
|
||||
#define SYSTEM_CALL_vEventGroupSetNumber 61
|
||||
#define SYSTEM_CALL_xStreamBufferSend 62
|
||||
#define SYSTEM_CALL_xStreamBufferReceive 63
|
||||
#define SYSTEM_CALL_xStreamBufferIsFull 64
|
||||
#define SYSTEM_CALL_xStreamBufferIsEmpty 65
|
||||
#define SYSTEM_CALL_xStreamBufferSpacesAvailable 66
|
||||
#define SYSTEM_CALL_xStreamBufferBytesAvailable 67
|
||||
#define SYSTEM_CALL_xStreamBufferSetTriggerLevel 68
|
||||
#define SYSTEM_CALL_xStreamBufferNextMessageLengthBytes 69
|
||||
#define NUM_SYSTEM_CALLS 70 /* Total number of system calls. */
|
||||
|
||||
#endif /* MPU_SYSCALL_NUMBERS_H */
|
||||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -31,7 +29,7 @@
|
|||
|
||||
/* This file redefines API functions to be called through a wrapper macro, but
|
||||
* only for ports that are using the MPU. */
|
||||
#if ( portUSING_MPU_WRAPPERS == 1 )
|
||||
#ifdef portUSING_MPU_WRAPPERS
|
||||
|
||||
/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
|
||||
* included from queue.c or task.c to prevent it from having an effect within
|
||||
|
|
@ -46,79 +44,49 @@
|
|||
* privileges.
|
||||
*/
|
||||
|
||||
/* Map standard task.h API functions to the MPU equivalents. */
|
||||
/* Map standard tasks.h API functions to the MPU equivalents. */
|
||||
#define xTaskCreate MPU_xTaskCreate
|
||||
#define xTaskCreateStatic MPU_xTaskCreateStatic
|
||||
#define vTaskDelete MPU_vTaskDelete
|
||||
#define vTaskDelay MPU_vTaskDelay
|
||||
#define xTaskDelayUntil MPU_xTaskDelayUntil
|
||||
#define xTaskAbortDelay MPU_xTaskAbortDelay
|
||||
#define uxTaskPriorityGet MPU_uxTaskPriorityGet
|
||||
#define eTaskGetState MPU_eTaskGetState
|
||||
#define vTaskGetInfo MPU_vTaskGetInfo
|
||||
#define vTaskPrioritySet MPU_vTaskPrioritySet
|
||||
#define vTaskSuspend MPU_vTaskSuspend
|
||||
#define vTaskResume MPU_vTaskResume
|
||||
#define vTaskSuspendAll MPU_vTaskSuspendAll
|
||||
#define xTaskResumeAll MPU_xTaskResumeAll
|
||||
#define xTaskGetTickCount MPU_xTaskGetTickCount
|
||||
#define uxTaskGetNumberOfTasks MPU_uxTaskGetNumberOfTasks
|
||||
#define pcTaskGetName MPU_pcTaskGetName
|
||||
#define xTaskGetHandle MPU_xTaskGetHandle
|
||||
#define uxTaskGetStackHighWaterMark MPU_uxTaskGetStackHighWaterMark
|
||||
#define uxTaskGetStackHighWaterMark2 MPU_uxTaskGetStackHighWaterMark2
|
||||
#define vTaskSetApplicationTaskTag MPU_vTaskSetApplicationTaskTag
|
||||
#define xTaskGetApplicationTaskTag MPU_xTaskGetApplicationTaskTag
|
||||
#define vTaskSetThreadLocalStoragePointer MPU_vTaskSetThreadLocalStoragePointer
|
||||
#define pvTaskGetThreadLocalStoragePointer MPU_pvTaskGetThreadLocalStoragePointer
|
||||
#define xTaskCallApplicationTaskHook MPU_xTaskCallApplicationTaskHook
|
||||
#define xTaskGetIdleTaskHandle MPU_xTaskGetIdleTaskHandle
|
||||
#define uxTaskGetSystemState MPU_uxTaskGetSystemState
|
||||
#define vTaskList MPU_vTaskList
|
||||
#define vTaskGetRunTimeStats MPU_vTaskGetRunTimeStats
|
||||
#define ulTaskGetIdleRunTimeCounter MPU_ulTaskGetIdleRunTimeCounter
|
||||
#define ulTaskGetIdleRunTimePercent MPU_ulTaskGetIdleRunTimePercent
|
||||
#define xTaskGenericNotify MPU_xTaskGenericNotify
|
||||
#define xTaskGenericNotifyWait MPU_xTaskGenericNotifyWait
|
||||
#define ulTaskGenericNotifyTake MPU_ulTaskGenericNotifyTake
|
||||
#define xTaskGenericNotifyStateClear MPU_xTaskGenericNotifyStateClear
|
||||
#define ulTaskGenericNotifyValueClear MPU_ulTaskGenericNotifyValueClear
|
||||
#define xTaskCatchUpTicks MPU_xTaskCatchUpTicks
|
||||
|
||||
#define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle
|
||||
#define vTaskSetTimeOutState MPU_vTaskSetTimeOutState
|
||||
#define xTaskCheckForTimeOut MPU_xTaskCheckForTimeOut
|
||||
#define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle
|
||||
#define xTaskGetSchedulerState MPU_xTaskGetSchedulerState
|
||||
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||
#define ulTaskGetRunTimeCounter MPU_ulTaskGetRunTimeCounter
|
||||
#define ulTaskGetRunTimePercent MPU_ulTaskGetRunTimePercent
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
/* Privileged only wrappers for Task APIs. These are needed so that
|
||||
* the application can use opaque handles maintained in mpu_wrappers.c
|
||||
* with all the APIs. */
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
|
||||
|
||||
/* These are not needed in v2 because they do not take a task
|
||||
* handle and therefore, no lookup is needed. Needed in v1 because
|
||||
* these are available as system calls in v1. */
|
||||
#define vTaskGetRunTimeStatistics MPU_vTaskGetRunTimeStatistics
|
||||
#define vTaskListTasks MPU_vTaskListTasks
|
||||
#define vTaskSuspendAll MPU_vTaskSuspendAll
|
||||
#define xTaskCatchUpTicks MPU_xTaskCatchUpTicks
|
||||
#define xTaskResumeAll MPU_xTaskResumeAll
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
|
||||
|
||||
#define xTaskCreate MPU_xTaskCreate
|
||||
#define xTaskCreateStatic MPU_xTaskCreateStatic
|
||||
#define vTaskDelete MPU_vTaskDelete
|
||||
#define vTaskPrioritySet MPU_vTaskPrioritySet
|
||||
#define xTaskGetHandle MPU_xTaskGetHandle
|
||||
#define xTaskCallApplicationTaskHook MPU_xTaskCallApplicationTaskHook
|
||||
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||
#define pcTaskGetName MPU_pcTaskGetName
|
||||
#define xTaskCreateRestricted MPU_xTaskCreateRestricted
|
||||
#define xTaskCreateRestrictedStatic MPU_xTaskCreateRestrictedStatic
|
||||
#define vTaskAllocateMPURegions MPU_vTaskAllocateMPURegions
|
||||
#define xTaskGetStaticBuffers MPU_xTaskGetStaticBuffers
|
||||
#define uxTaskPriorityGetFromISR MPU_uxTaskPriorityGetFromISR
|
||||
#define uxTaskBasePriorityGet MPU_uxTaskBasePriorityGet
|
||||
#define uxTaskBasePriorityGetFromISR MPU_uxTaskBasePriorityGetFromISR
|
||||
#define xTaskResumeFromISR MPU_xTaskResumeFromISR
|
||||
#define xTaskGetApplicationTaskTagFromISR MPU_xTaskGetApplicationTaskTagFromISR
|
||||
#define xTaskGenericNotifyFromISR MPU_xTaskGenericNotifyFromISR
|
||||
#define vTaskGenericNotifyGiveFromISR MPU_vTaskGenericNotifyGiveFromISR
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
/* Map standard queue.h API functions to the MPU equivalents. */
|
||||
#define xQueueGenericSend MPU_xQueueGenericSend
|
||||
#define xQueueReceive MPU_xQueueReceive
|
||||
|
|
@ -126,165 +94,87 @@
|
|||
#define xQueueSemaphoreTake MPU_xQueueSemaphoreTake
|
||||
#define uxQueueMessagesWaiting MPU_uxQueueMessagesWaiting
|
||||
#define uxQueueSpacesAvailable MPU_uxQueueSpacesAvailable
|
||||
#define xQueueGetMutexHolder MPU_xQueueGetMutexHolder
|
||||
#define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive
|
||||
#define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive
|
||||
#define xQueueAddToSet MPU_xQueueAddToSet
|
||||
#define xQueueSelectFromSet MPU_xQueueSelectFromSet
|
||||
|
||||
#if ( configQUEUE_REGISTRY_SIZE > 0 )
|
||||
#define vQueueAddToRegistry MPU_vQueueAddToRegistry
|
||||
#define vQueueUnregisterQueue MPU_vQueueUnregisterQueue
|
||||
#define pcQueueGetName MPU_pcQueueGetName
|
||||
#endif /* #if ( configQUEUE_REGISTRY_SIZE > 0 ) */
|
||||
|
||||
/* Privileged only wrappers for Queue APIs. These are needed so that
|
||||
* the application can use opaque handles maintained in mpu_wrappers.c
|
||||
* with all the APIs. */
|
||||
#define vQueueDelete MPU_vQueueDelete
|
||||
#define xQueueCreateMutex MPU_xQueueCreateMutex
|
||||
#define xQueueCreateMutexStatic MPU_xQueueCreateMutexStatic
|
||||
#define xQueueCreateCountingSemaphore MPU_xQueueCreateCountingSemaphore
|
||||
#define xQueueCreateCountingSemaphoreStatic MPU_xQueueCreateCountingSemaphoreStatic
|
||||
#define xQueueGetMutexHolder MPU_xQueueGetMutexHolder
|
||||
#define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive
|
||||
#define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive
|
||||
#define xQueueGenericCreate MPU_xQueueGenericCreate
|
||||
#define xQueueGenericCreateStatic MPU_xQueueGenericCreateStatic
|
||||
#define xQueueGenericReset MPU_xQueueGenericReset
|
||||
#define xQueueCreateSet MPU_xQueueCreateSet
|
||||
#define xQueueCreateSetStatic MPU_xQueueCreateSetStatic
|
||||
#define xQueueAddToSet MPU_xQueueAddToSet
|
||||
#define xQueueRemoveFromSet MPU_xQueueRemoveFromSet
|
||||
#define xQueueSelectFromSet MPU_xQueueSelectFromSet
|
||||
#define xQueueGenericReset MPU_xQueueGenericReset
|
||||
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||
#define xQueueGenericGetStaticBuffers MPU_xQueueGenericGetStaticBuffers
|
||||
#define xQueueGenericSendFromISR MPU_xQueueGenericSendFromISR
|
||||
#define xQueueGiveFromISR MPU_xQueueGiveFromISR
|
||||
#define xQueuePeekFromISR MPU_xQueuePeekFromISR
|
||||
#define xQueueReceiveFromISR MPU_xQueueReceiveFromISR
|
||||
#define xQueueIsQueueEmptyFromISR MPU_xQueueIsQueueEmptyFromISR
|
||||
#define xQueueIsQueueFullFromISR MPU_xQueueIsQueueFullFromISR
|
||||
#define uxQueueMessagesWaitingFromISR MPU_uxQueueMessagesWaitingFromISR
|
||||
#define xQueueGetMutexHolderFromISR MPU_xQueueGetMutexHolderFromISR
|
||||
#define xQueueSelectFromSetFromISR MPU_xQueueSelectFromSetFromISR
|
||||
#endif /* if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
#if ( configQUEUE_REGISTRY_SIZE > 0 )
|
||||
#define vQueueAddToRegistry MPU_vQueueAddToRegistry
|
||||
#define vQueueUnregisterQueue MPU_vQueueUnregisterQueue
|
||||
#define pcQueueGetName MPU_pcQueueGetName
|
||||
#endif
|
||||
|
||||
/* Map standard timer.h API functions to the MPU equivalents. */
|
||||
#define pvTimerGetTimerID MPU_pvTimerGetTimerID
|
||||
#define vTimerSetTimerID MPU_vTimerSetTimerID
|
||||
#define xTimerIsTimerActive MPU_xTimerIsTimerActive
|
||||
#define xTimerGetTimerDaemonTaskHandle MPU_xTimerGetTimerDaemonTaskHandle
|
||||
#define xTimerGenericCommandFromTask MPU_xTimerGenericCommandFromTask
|
||||
#define pcTimerGetName MPU_pcTimerGetName
|
||||
#define vTimerSetReloadMode MPU_vTimerSetReloadMode
|
||||
#define uxTimerGetReloadMode MPU_uxTimerGetReloadMode
|
||||
#define xTimerGetPeriod MPU_xTimerGetPeriod
|
||||
#define xTimerGetExpiryTime MPU_xTimerGetExpiryTime
|
||||
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||
#define xTimerGetReloadMode MPU_xTimerGetReloadMode
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
/* Privileged only wrappers for Timer APIs. These are needed so that
|
||||
* the application can use opaque handles maintained in mpu_wrappers.c
|
||||
* with all the APIs. */
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||
#define xTimerCreate MPU_xTimerCreate
|
||||
#define xTimerCreateStatic MPU_xTimerCreateStatic
|
||||
#define xTimerGetStaticBuffer MPU_xTimerGetStaticBuffer
|
||||
#define xTimerGenericCommandFromISR MPU_xTimerGenericCommandFromISR
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
#define xTimerGenericCommand MPU_xTimerGenericCommand
|
||||
|
||||
/* Map standard event_group.h API functions to the MPU equivalents. */
|
||||
#define xEventGroupCreate MPU_xEventGroupCreate
|
||||
#define xEventGroupCreateStatic MPU_xEventGroupCreateStatic
|
||||
#define xEventGroupWaitBits MPU_xEventGroupWaitBits
|
||||
#define xEventGroupClearBits MPU_xEventGroupClearBits
|
||||
#define xEventGroupSetBits MPU_xEventGroupSetBits
|
||||
#define xEventGroupSync MPU_xEventGroupSync
|
||||
|
||||
#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
#define uxEventGroupGetNumber MPU_uxEventGroupGetNumber
|
||||
#define vEventGroupSetNumber MPU_vEventGroupSetNumber
|
||||
#endif /* #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
|
||||
|
||||
/* Privileged only wrappers for Event Group APIs. These are needed so that
|
||||
* the application can use opaque handles maintained in mpu_wrappers.c
|
||||
* with all the APIs. */
|
||||
#define xEventGroupCreate MPU_xEventGroupCreate
|
||||
#define xEventGroupCreateStatic MPU_xEventGroupCreateStatic
|
||||
#define vEventGroupDelete MPU_vEventGroupDelete
|
||||
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||
#define xEventGroupGetStaticBuffer MPU_xEventGroupGetStaticBuffer
|
||||
#define xEventGroupClearBitsFromISR MPU_xEventGroupClearBitsFromISR
|
||||
#define xEventGroupSetBitsFromISR MPU_xEventGroupSetBitsFromISR
|
||||
#define xEventGroupGetBitsFromISR MPU_xEventGroupGetBitsFromISR
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
/* Map standard message/stream_buffer.h API functions to the MPU
|
||||
* equivalents. */
|
||||
#define xStreamBufferSend MPU_xStreamBufferSend
|
||||
#define xStreamBufferReceive MPU_xStreamBufferReceive
|
||||
#define xStreamBufferNextMessageLengthBytes MPU_xStreamBufferNextMessageLengthBytes
|
||||
#define vStreamBufferDelete MPU_vStreamBufferDelete
|
||||
#define xStreamBufferIsFull MPU_xStreamBufferIsFull
|
||||
#define xStreamBufferIsEmpty MPU_xStreamBufferIsEmpty
|
||||
#define xStreamBufferReset MPU_xStreamBufferReset
|
||||
#define xStreamBufferSpacesAvailable MPU_xStreamBufferSpacesAvailable
|
||||
#define xStreamBufferBytesAvailable MPU_xStreamBufferBytesAvailable
|
||||
#define xStreamBufferSetTriggerLevel MPU_xStreamBufferSetTriggerLevel
|
||||
#define xStreamBufferNextMessageLengthBytes MPU_xStreamBufferNextMessageLengthBytes
|
||||
|
||||
/* Privileged only wrappers for Stream Buffer APIs. These are needed so that
|
||||
* the application can use opaque handles maintained in mpu_wrappers.c
|
||||
* with all the APIs. */
|
||||
|
||||
#define xStreamBufferGenericCreate MPU_xStreamBufferGenericCreate
|
||||
#define xStreamBufferGenericCreateStatic MPU_xStreamBufferGenericCreateStatic
|
||||
#define vStreamBufferDelete MPU_vStreamBufferDelete
|
||||
#define xStreamBufferReset MPU_xStreamBufferReset
|
||||
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||
#define xStreamBufferGetStaticBuffers MPU_xStreamBufferGetStaticBuffers
|
||||
#define xStreamBufferSendFromISR MPU_xStreamBufferSendFromISR
|
||||
#define xStreamBufferReceiveFromISR MPU_xStreamBufferReceiveFromISR
|
||||
#define xStreamBufferSendCompletedFromISR MPU_xStreamBufferSendCompletedFromISR
|
||||
#define xStreamBufferReceiveCompletedFromISR MPU_xStreamBufferReceiveCompletedFromISR
|
||||
#define xStreamBufferResetFromISR MPU_xStreamBufferResetFromISR
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
|
||||
/* Remove the privileged function macro, but keep the PRIVILEGED_DATA
|
||||
* macro so applications can place data in privileged access sections
|
||||
* (useful when using statically allocated objects). */
|
||||
#define PRIVILEGED_FUNCTION
|
||||
#define PRIVILEGED_DATA __attribute__( ( section( "privileged_data" ) ) )
|
||||
#define FREERTOS_SYSTEM_CALL
|
||||
|
||||
#define vGrantAccessToTask( xTask, xTaskToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xTaskToGrantAccess ) )
|
||||
#define vRevokeAccessToTask( xTask, xTaskToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xTaskToRevokeAccess ) )
|
||||
|
||||
#define vGrantAccessToSemaphore( xTask, xSemaphoreToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xSemaphoreToGrantAccess ) )
|
||||
#define vRevokeAccessToSemaphore( xTask, xSemaphoreToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xSemaphoreToRevokeAccess ) )
|
||||
|
||||
#define vGrantAccessToQueue( xTask, xQueueToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueToGrantAccess ) )
|
||||
#define vRevokeAccessToQueue( xTask, xQueueToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueToRevokeAccess ) )
|
||||
|
||||
#define vGrantAccessToQueueSet( xTask, xQueueSetToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueSetToGrantAccess ) )
|
||||
#define vRevokeAccessToQueueSet( xTask, xQueueSetToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueSetToRevokeAccess ) )
|
||||
|
||||
#define vGrantAccessToEventGroup( xTask, xEventGroupToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xEventGroupToGrantAccess ) )
|
||||
#define vRevokeAccessToEventGroup( xTask, xEventGroupToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xEventGroupToRevokeAccess ) )
|
||||
|
||||
#define vGrantAccessToStreamBuffer( xTask, xStreamBufferToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xStreamBufferToGrantAccess ) )
|
||||
#define vRevokeAccessToStreamBuffer( xTask, xStreamBufferToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xStreamBufferToRevokeAccess ) )
|
||||
|
||||
#define vGrantAccessToMessageBuffer( xTask, xMessageBufferToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xMessageBufferToGrantAccess ) )
|
||||
#define vRevokeAccessToMessageBuffer( xTask, xMessageBufferToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xMessageBufferToRevokeAccess ) )
|
||||
|
||||
#define vGrantAccessToTimer( xTask, xTimerToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xTimerToGrantAccess ) )
|
||||
#define vRevokeAccessToTimer( xTask, xTimerToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xTimerToRevokeAccess ) )
|
||||
|
||||
#endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */
|
||||
|
||||
#endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
|
||||
#else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
|
||||
|
||||
/* Ensure API functions go in the privileged execution section. */
|
||||
#define PRIVILEGED_FUNCTION __attribute__( ( section( "privileged_functions" ) ) )
|
||||
#define PRIVILEGED_DATA __attribute__( ( section( "privileged_data" ) ) )
|
||||
#define FREERTOS_SYSTEM_CALL __attribute__( ( section( "freertos_system_calls" ) ) )
|
||||
|
||||
#endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
|
||||
|
||||
#else /* portUSING_MPU_WRAPPERS */
|
||||
|
||||
#define PRIVILEGED_FUNCTION
|
||||
#define PRIVILEGED_DATA
|
||||
#define FREERTOS_SYSTEM_CALL
|
||||
#define portUSING_MPU_WRAPPERS 0
|
||||
|
||||
#endif /* portUSING_MPU_WRAPPERS */
|
||||
|
||||
|
|
|
|||
|
|
@ -1,62 +0,0 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef INC_NEWLIB_FREERTOS_H
|
||||
#define INC_NEWLIB_FREERTOS_H
|
||||
|
||||
/* Note Newlib support has been included by popular demand, but is not
|
||||
* used by the FreeRTOS maintainers themselves. FreeRTOS is not
|
||||
* responsible for resulting newlib operation. User must be familiar with
|
||||
* newlib and must provide system-wide implementations of the necessary
|
||||
* stubs. Be warned that (at the time of writing) the current newlib design
|
||||
* implements a system-wide malloc() that must be provided with locks.
|
||||
*
|
||||
* See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
|
||||
* for additional information. */
|
||||
|
||||
#include <reent.h>
|
||||
|
||||
#define configUSE_C_RUNTIME_TLS_SUPPORT 1
|
||||
|
||||
#ifndef configTLS_BLOCK_TYPE
|
||||
#define configTLS_BLOCK_TYPE struct _reent
|
||||
#endif
|
||||
|
||||
#ifndef configINIT_TLS_BLOCK
|
||||
#define configINIT_TLS_BLOCK( xTLSBlock, pxTopOfStack ) _REENT_INIT_PTR( &( xTLSBlock ) )
|
||||
#endif
|
||||
|
||||
#ifndef configSET_TLS_BLOCK
|
||||
#define configSET_TLS_BLOCK( xTLSBlock ) ( _impure_ptr = &( xTLSBlock ) )
|
||||
#endif
|
||||
|
||||
#ifndef configDEINIT_TLS_BLOCK
|
||||
#define configDEINIT_TLS_BLOCK( xTLSBlock ) _reclaim_reent( &( xTLSBlock ) )
|
||||
#endif
|
||||
|
||||
#endif /* INC_NEWLIB_FREERTOS_H */
|
||||
|
|
@ -1,91 +0,0 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef INC_PICOLIBC_FREERTOS_H
|
||||
#define INC_PICOLIBC_FREERTOS_H
|
||||
|
||||
/* Use picolibc TLS support to allocate space for __thread variables,
|
||||
* initialize them at thread creation and set the TLS context at
|
||||
* thread switch time.
|
||||
*
|
||||
* See the picolibc TLS docs:
|
||||
* https://github.com/picolibc/picolibc/blob/main/doc/tls.md
|
||||
* for additional information. */
|
||||
|
||||
#include <picotls.h>
|
||||
|
||||
#define configUSE_C_RUNTIME_TLS_SUPPORT 1
|
||||
|
||||
#define configTLS_BLOCK_TYPE void *
|
||||
|
||||
#define picolibcTLS_SIZE ( ( portPOINTER_SIZE_TYPE ) _tls_size() )
|
||||
#define picolibcSTACK_ALIGNMENT_MASK ( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK )
|
||||
|
||||
#if __PICOLIBC_MAJOR__ > 1 || __PICOLIBC_MINOR__ >= 8
|
||||
|
||||
/* Picolibc 1.8 and newer have explicit alignment values provided
|
||||
* by the _tls_align() inline */
|
||||
#define picolibcTLS_ALIGNMENT_MASK ( ( portPOINTER_SIZE_TYPE ) ( _tls_align() - 1 ) )
|
||||
#else
|
||||
|
||||
/* For older Picolibc versions, use the general port alignment value */
|
||||
#define picolibcTLS_ALIGNMENT_MASK ( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK )
|
||||
#endif
|
||||
|
||||
/* Allocate thread local storage block off the end of the
|
||||
* stack. The picolibcTLS_SIZE macro returns the size (in
|
||||
* bytes) of the total TLS area used by the application.
|
||||
* Calculate the top of stack address. */
|
||||
#if ( portSTACK_GROWTH < 0 )
|
||||
|
||||
#define configINIT_TLS_BLOCK( xTLSBlock, pxTopOfStack ) \
|
||||
do { \
|
||||
xTLSBlock = ( void * ) ( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) - \
|
||||
picolibcTLS_SIZE ) & \
|
||||
~picolibcTLS_ALIGNMENT_MASK ); \
|
||||
pxTopOfStack = ( StackType_t * ) ( ( ( ( portPOINTER_SIZE_TYPE ) xTLSBlock ) - 1 ) & \
|
||||
~picolibcSTACK_ALIGNMENT_MASK ); \
|
||||
_init_tls( xTLSBlock ); \
|
||||
} while( 0 )
|
||||
#else /* portSTACK_GROWTH */
|
||||
#define configINIT_TLS_BLOCK( xTLSBlock, pxTopOfStack ) \
|
||||
do { \
|
||||
xTLSBlock = ( void * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack + \
|
||||
picolibcTLS_ALIGNMENT_MASK ) & ~picolibcTLS_ALIGNMENT_MASK ); \
|
||||
pxTopOfStack = ( StackType_t * ) ( ( ( ( ( portPOINTER_SIZE_TYPE ) xTLSBlock ) + \
|
||||
picolibcTLS_SIZE ) + picolibcSTACK_ALIGNMENT_MASK ) & \
|
||||
~picolibcSTACK_ALIGNMENT_MASK ); \
|
||||
_init_tls( xTLSBlock ); \
|
||||
} while( 0 )
|
||||
#endif /* portSTACK_GROWTH */
|
||||
|
||||
#define configSET_TLS_BLOCK( xTLSBlock ) _set_tls( xTLSBlock )
|
||||
|
||||
#define configDEINIT_TLS_BLOCK( xTLSBlock )
|
||||
|
||||
#endif /* INC_PICOLIBC_FREERTOS_H */
|
||||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -55,22 +53,30 @@
|
|||
|
||||
#if portBYTE_ALIGNMENT == 32
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x001f )
|
||||
#elif portBYTE_ALIGNMENT == 16
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x000f )
|
||||
#elif portBYTE_ALIGNMENT == 8
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0007 )
|
||||
#elif portBYTE_ALIGNMENT == 4
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0003 )
|
||||
#elif portBYTE_ALIGNMENT == 2
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0001 )
|
||||
#elif portBYTE_ALIGNMENT == 1
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0000 )
|
||||
#else /* if portBYTE_ALIGNMENT == 32 */
|
||||
#error "Invalid portBYTE_ALIGNMENT definition"
|
||||
#endif /* if portBYTE_ALIGNMENT == 32 */
|
||||
#endif
|
||||
|
||||
#ifndef portUSING_MPU_WRAPPERS
|
||||
#define portUSING_MPU_WRAPPERS 0
|
||||
#if portBYTE_ALIGNMENT == 16
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x000f )
|
||||
#endif
|
||||
|
||||
#if portBYTE_ALIGNMENT == 8
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0007 )
|
||||
#endif
|
||||
|
||||
#if portBYTE_ALIGNMENT == 4
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0003 )
|
||||
#endif
|
||||
|
||||
#if portBYTE_ALIGNMENT == 2
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0001 )
|
||||
#endif
|
||||
|
||||
#if portBYTE_ALIGNMENT == 1
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0000 )
|
||||
#endif
|
||||
|
||||
#ifndef portBYTE_ALIGNMENT_MASK
|
||||
#error "Invalid portBYTE_ALIGNMENT definition"
|
||||
#endif
|
||||
|
||||
#ifndef portNUM_CONFIGURABLE_REGIONS
|
||||
|
|
@ -85,31 +91,14 @@
|
|||
#define portARCH_NAME NULL
|
||||
#endif
|
||||
|
||||
#ifndef portBASE_TYPE_ENTER_CRITICAL
|
||||
#define portBASE_TYPE_ENTER_CRITICAL() taskENTER_CRITICAL()
|
||||
#endif
|
||||
|
||||
#ifndef portBASE_TYPE_EXIT_CRITICAL
|
||||
#define portBASE_TYPE_EXIT_CRITICAL() taskEXIT_CRITICAL()
|
||||
#endif
|
||||
|
||||
#ifndef configSTACK_DEPTH_TYPE
|
||||
#define configSTACK_DEPTH_TYPE StackType_t
|
||||
#endif
|
||||
|
||||
#ifndef configSTACK_ALLOCATION_FROM_SEPARATE_HEAP
|
||||
/* Defaults to 0 for backward compatibility. */
|
||||
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
|
||||
#endif
|
||||
|
||||
#include "mpu_wrappers.h"
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#include "mpu_wrappers.h"
|
||||
|
||||
/*
|
||||
* Setup the stack of a new task so it is ready to be placed under the
|
||||
* scheduler control. The registers have to be placed on the stack in
|
||||
|
|
@ -122,15 +111,13 @@
|
|||
StackType_t * pxEndOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters,
|
||||
BaseType_t xRunPrivileged,
|
||||
xMPU_SETTINGS * xMPUSettings ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
|
||||
#else
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters,
|
||||
BaseType_t xRunPrivileged,
|
||||
xMPU_SETTINGS * xMPUSettings ) PRIVILEGED_FUNCTION;
|
||||
#endif /* if ( portHAS_STACK_OVERFLOW_CHECKING == 1 ) */
|
||||
BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
#else /* if ( portUSING_MPU_WRAPPERS == 1 ) */
|
||||
#if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
|
|
@ -186,41 +173,11 @@ void vPortGetHeapStats( HeapStats_t * pxHeapStats );
|
|||
/*
|
||||
* Map to the memory management routines required for the port.
|
||||
*/
|
||||
void * pvPortMalloc( size_t xWantedSize ) PRIVILEGED_FUNCTION;
|
||||
void * pvPortCalloc( size_t xNum,
|
||||
size_t xSize ) PRIVILEGED_FUNCTION;
|
||||
void * pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
|
||||
void vPortFree( void * pv ) PRIVILEGED_FUNCTION;
|
||||
void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
|
||||
size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
|
||||
size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
|
||||
void xPortResetHeapMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
|
||||
|
||||
#if ( configSTACK_ALLOCATION_FROM_SEPARATE_HEAP == 1 )
|
||||
void * pvPortMallocStack( size_t xSize ) PRIVILEGED_FUNCTION;
|
||||
void vPortFreeStack( void * pv ) PRIVILEGED_FUNCTION;
|
||||
#else
|
||||
#define pvPortMallocStack pvPortMalloc
|
||||
#define vPortFreeStack vPortFree
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This function resets the internal state of the heap module. It must be called
|
||||
* by the application before restarting the scheduler.
|
||||
*/
|
||||
void vPortHeapResetState( void ) PRIVILEGED_FUNCTION;
|
||||
|
||||
#if ( configUSE_MALLOC_FAILED_HOOK == 1 )
|
||||
|
||||
/**
|
||||
* task.h
|
||||
* @code{c}
|
||||
* void vApplicationMallocFailedHook( void )
|
||||
* @endcode
|
||||
*
|
||||
* This hook function is called when allocation failed.
|
||||
*/
|
||||
void vApplicationMallocFailedHook( void );
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the hardware ready for the scheduler to take control. This generally
|
||||
|
|
@ -247,38 +204,7 @@ void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
|
|||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||
const struct xMEMORY_REGION * const xRegions,
|
||||
StackType_t * pxBottomOfStack,
|
||||
configSTACK_DEPTH_TYPE uxStackDepth ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Checks if the calling task is authorized to access the given buffer.
|
||||
*
|
||||
* @param pvBuffer The buffer which the calling task wants to access.
|
||||
* @param ulBufferLength The length of the pvBuffer.
|
||||
* @param ulAccessRequested The permissions that the calling task wants.
|
||||
*
|
||||
* @return pdTRUE if the calling task is authorized to access the buffer,
|
||||
* pdFALSE otherwise.
|
||||
*/
|
||||
#if ( portUSING_MPU_WRAPPERS == 1 )
|
||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||
uint32_t ulBufferLength,
|
||||
uint32_t ulAccessRequested ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Checks if the calling task is authorized to access the given kernel object.
|
||||
*
|
||||
* @param lInternalIndexOfKernelObject The index of the kernel object in the kernel
|
||||
* object handle pool.
|
||||
*
|
||||
* @return pdTRUE if the calling task is authorized to access the kernel object,
|
||||
* pdFALSE otherwise.
|
||||
*/
|
||||
#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
|
||||
BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) PRIVILEGED_FUNCTION;
|
||||
|
||||
uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -33,28 +31,17 @@
|
|||
* Defines the prototype to which task functions must conform. Defined in this
|
||||
* file to ensure the type is known before portable.h is included.
|
||||
*/
|
||||
typedef void (* TaskFunction_t)( void * arg );
|
||||
typedef void (* TaskFunction_t)( void * );
|
||||
|
||||
/* Converts a time in milliseconds to a time in ticks. This macro can be
|
||||
* overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
|
||||
* definition here is not suitable for your application. */
|
||||
#ifndef pdMS_TO_TICKS
|
||||
#define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( uint64_t ) ( xTimeInMs ) * ( uint64_t ) configTICK_RATE_HZ ) / ( uint64_t ) 1000U ) )
|
||||
#endif
|
||||
|
||||
/* Converts a time in ticks to a time in milliseconds. This macro can be
|
||||
* overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
|
||||
* definition here is not suitable for your application. */
|
||||
#ifndef pdTICKS_TO_MS
|
||||
#define pdTICKS_TO_MS( xTimeInTicks ) ( ( TickType_t ) ( ( ( uint64_t ) ( xTimeInTicks ) * ( uint64_t ) 1000U ) / ( uint64_t ) configTICK_RATE_HZ ) )
|
||||
#define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000U ) )
|
||||
#endif
|
||||
|
||||
#define pdFALSE ( ( BaseType_t ) 0 )
|
||||
#define pdTRUE ( ( BaseType_t ) 1 )
|
||||
#define pdFALSE_SIGNED ( ( BaseType_t ) 0 )
|
||||
#define pdTRUE_SIGNED ( ( BaseType_t ) 1 )
|
||||
#define pdFALSE_UNSIGNED ( ( UBaseType_t ) 0 )
|
||||
#define pdTRUE_UNSIGNED ( ( UBaseType_t ) 1 )
|
||||
|
||||
#define pdPASS ( pdTRUE )
|
||||
#define pdFAIL ( pdFALSE )
|
||||
|
|
@ -71,14 +58,10 @@ typedef void (* TaskFunction_t)( void * arg );
|
|||
#define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0
|
||||
#endif
|
||||
|
||||
#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
#define pdINTEGRITY_CHECK_VALUE 0x5a5a
|
||||
#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
|
||||
#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL
|
||||
#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_64_BITS )
|
||||
#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5a5a5a5a5aULL
|
||||
#else
|
||||
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
|
||||
#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL
|
||||
#endif
|
||||
|
||||
/* The following errno values are used by FreeRTOS+ components, not FreeRTOS
|
||||
|
|
@ -111,7 +94,6 @@ typedef void (* TaskFunction_t)( void * arg );
|
|||
#define pdFREERTOS_ERRNO_ENOTEMPTY 90 /* Directory not empty */
|
||||
#define pdFREERTOS_ERRNO_ENAMETOOLONG 91 /* File or path name too long */
|
||||
#define pdFREERTOS_ERRNO_EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
|
||||
#define pdFREERTOS_ERRNO_EAFNOSUPPORT 97 /* Address family not supported by protocol */
|
||||
#define pdFREERTOS_ERRNO_ENOBUFS 105 /* No buffer space available */
|
||||
#define pdFREERTOS_ERRNO_ENOPROTOOPT 109 /* Protocol not available */
|
||||
#define pdFREERTOS_ERRNO_EADDRINUSE 112 /* Address already in use */
|
||||
|
|
|
|||
416
include/queue.h
416
include/queue.h
File diff suppressed because it is too large
Load diff
196
include/semphr.h
196
include/semphr.h
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -44,9 +42,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* In many usage scenarios it is faster and more memory efficient to use a
|
||||
* direct to task notification in place of a binary semaphore!
|
||||
|
|
@ -74,7 +72,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* @param xSemaphore Handle to the created semaphore. Should be of type SemaphoreHandle_t.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphore = NULL;
|
||||
*
|
||||
* void vATask( void * pvParameters )
|
||||
|
|
@ -89,26 +87,26 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* // The semaphore can now be used.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
|
||||
#define vSemaphoreCreateBinary( xSemaphore ) \
|
||||
do { \
|
||||
{ \
|
||||
( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \
|
||||
if( ( xSemaphore ) != NULL ) \
|
||||
{ \
|
||||
( void ) xSemaphoreGive( ( xSemaphore ) ); \
|
||||
} \
|
||||
} while( 0 )
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateBinary( void );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new binary semaphore instance, and returns a handle by which the
|
||||
* new semaphore can be referenced.
|
||||
|
|
@ -144,7 +142,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* hold the semaphore's data structures could not be allocated.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphore = NULL;
|
||||
*
|
||||
* void vATask( void * pvParameters )
|
||||
|
|
@ -159,7 +157,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* // The semaphore can now be used.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
|
|
@ -169,9 +167,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new binary semaphore instance, and returns a handle by which the
|
||||
* new semaphore can be referenced.
|
||||
|
|
@ -204,7 +202,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* returned. If pxSemaphoreBuffer is NULL then NULL is returned.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphore = NULL;
|
||||
* StaticSemaphore_t xSemaphoreBuffer;
|
||||
*
|
||||
|
|
@ -220,22 +218,22 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
*
|
||||
* // Rest of task code goes here.
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreCreateBinaryStatic xSemaphoreCreateBinaryStatic
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
|
||||
#define xSemaphoreCreateBinaryStatic( pxStaticSemaphore ) xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, ( pxStaticSemaphore ), queueQUEUE_TYPE_BINARY_SEMAPHORE )
|
||||
#define xSemaphoreCreateBinaryStatic( pxStaticSemaphore ) xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE )
|
||||
#endif /* configSUPPORT_STATIC_ALLOCATION */
|
||||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* xSemaphoreTake(
|
||||
* SemaphoreHandle_t xSemaphore,
|
||||
* TickType_t xBlockTime
|
||||
* );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to obtain a semaphore. The semaphore must have previously been
|
||||
* created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
|
||||
|
|
@ -254,7 +252,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* if xBlockTime expired without the semaphore becoming available.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphore = NULL;
|
||||
*
|
||||
* // A task that creates a semaphore.
|
||||
|
|
@ -291,7 +289,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* }
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreTake xSemaphoreTake
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
|
|
@ -299,12 +297,12 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* xSemaphoreTakeRecursive(
|
||||
* SemaphoreHandle_t xMutex,
|
||||
* TickType_t xBlockTime
|
||||
* );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to recursively obtain, or 'take', a mutex type semaphore.
|
||||
* The mutex must have previously been created using a call to
|
||||
|
|
@ -335,7 +333,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* expired without the semaphore becoming available.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xMutex = NULL;
|
||||
*
|
||||
* // A task that creates a mutex.
|
||||
|
|
@ -386,7 +384,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* }
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
|
|
@ -396,9 +394,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* xSemaphoreGive( SemaphoreHandle_t xSemaphore );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to release a semaphore. The semaphore must have previously been
|
||||
* created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
|
||||
|
|
@ -419,7 +417,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* semaphore was not first obtained correctly.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphore = NULL;
|
||||
*
|
||||
* void vATask( void * pvParameters )
|
||||
|
|
@ -453,7 +451,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* }
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreGive xSemaphoreGive
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
|
|
@ -461,9 +459,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to recursively release, or 'give', a mutex type semaphore.
|
||||
* The mutex must have previously been created using a call to
|
||||
|
|
@ -487,7 +485,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* @return pdTRUE if the semaphore was given.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xMutex = NULL;
|
||||
*
|
||||
* // A task that creates a mutex.
|
||||
|
|
@ -539,7 +537,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* }
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
|
|
@ -549,12 +547,12 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* xSemaphoreGiveFromISR(
|
||||
* SemaphoreHandle_t xSemaphore,
|
||||
* BaseType_t *pxHigherPriorityTaskWoken
|
||||
* );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to release a semaphore. The semaphore must have previously been
|
||||
* created with a call to xSemaphoreCreateBinary() or xSemaphoreCreateCounting().
|
||||
|
|
@ -576,7 +574,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
\#define LONG_TIME 0xffff
|
||||
\#define TICKS_TO_WAIT 10
|
||||
* SemaphoreHandle_t xSemaphore = NULL;
|
||||
|
|
@ -633,7 +631,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* // to find the syntax required.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
|
|
@ -641,12 +639,12 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* xSemaphoreTakeFromISR(
|
||||
* SemaphoreHandle_t xSemaphore,
|
||||
* BaseType_t *pxHigherPriorityTaskWoken
|
||||
* );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to take a semaphore from an ISR. The semaphore must have
|
||||
* previously been created with a call to xSemaphoreCreateBinary() or
|
||||
|
|
@ -676,9 +674,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateMutex( void );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new mutex type semaphore instance, and returns a handle by which
|
||||
* the new mutex can be referenced.
|
||||
|
|
@ -712,7 +710,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* data structures then NULL is returned.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphore;
|
||||
*
|
||||
* void vATask( void * pvParameters )
|
||||
|
|
@ -727,19 +725,19 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* // The semaphore can now be used.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
#if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_MUTEXES == 1 ) )
|
||||
#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
|
||||
#define xSemaphoreCreateMutex() xQueueCreateMutex( queueQUEUE_TYPE_MUTEX )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new mutex type semaphore instance, and returns a handle by which
|
||||
* the new mutex can be referenced.
|
||||
|
|
@ -776,7 +774,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* mutex is returned. If pxMutexBuffer was NULL then NULL is returned.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphore;
|
||||
* StaticSemaphore_t xMutexBuffer;
|
||||
*
|
||||
|
|
@ -790,25 +788,25 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
|
||||
* // so there is no need to check it.
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreCreateMutexStatic xSemaphoreCreateMutexStatic
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
#if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_MUTEXES == 1 ) )
|
||||
#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
|
||||
#define xSemaphoreCreateMutexStatic( pxMutexBuffer ) xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) )
|
||||
#endif
|
||||
#endif /* configSUPPORT_STATIC_ALLOCATION */
|
||||
|
||||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new recursive mutex type semaphore instance, and returns a handle
|
||||
* by which the new recursive mutex can be referenced.
|
||||
*
|
||||
* Internally, within the FreeRTOS implementation, recursive mutexes use a block
|
||||
* Internally, within the FreeRTOS implementation, recursive mutexs use a block
|
||||
* of memory, in which the mutex structure is stored. If a recursive mutex is
|
||||
* created using xSemaphoreCreateRecursiveMutex() then the required memory is
|
||||
* automatically dynamically allocated inside the
|
||||
|
|
@ -845,7 +843,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* SemaphoreHandle_t.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphore;
|
||||
*
|
||||
* void vATask( void * pvParameters )
|
||||
|
|
@ -860,7 +858,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* // The semaphore can now be used.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreCreateRecursiveMutex xSemaphoreCreateRecursiveMutex
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
|
|
@ -870,14 +868,14 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new recursive mutex type semaphore instance, and returns a handle
|
||||
* by which the new recursive mutex can be referenced.
|
||||
*
|
||||
* Internally, within the FreeRTOS implementation, recursive mutexes use a block
|
||||
* Internally, within the FreeRTOS implementation, recursive mutexs use a block
|
||||
* of memory, in which the mutex structure is stored. If a recursive mutex is
|
||||
* created using xSemaphoreCreateRecursiveMutex() then the required memory is
|
||||
* automatically dynamically allocated inside the
|
||||
|
|
@ -919,7 +917,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* returned.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphore;
|
||||
* StaticSemaphore_t xMutexBuffer;
|
||||
*
|
||||
|
|
@ -935,19 +933,19 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
|
||||
* // so there is no need to check it.
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreCreateRecursiveMutexStatic xSemaphoreCreateRecursiveMutexStatic
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
#if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )
|
||||
#define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore ) xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, ( pxStaticSemaphore ) )
|
||||
#define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore ) xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore )
|
||||
#endif /* configSUPPORT_STATIC_ALLOCATION */
|
||||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new counting semaphore instance, and returns a handle by which the
|
||||
* new counting semaphore can be referenced.
|
||||
|
|
@ -999,7 +997,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* created.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphore;
|
||||
*
|
||||
* void vATask( void * pvParameters )
|
||||
|
|
@ -1017,7 +1015,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* // The semaphore can now be used.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
|
|
@ -1027,9 +1025,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new counting semaphore instance, and returns a handle by which the
|
||||
* new counting semaphore can be referenced.
|
||||
|
|
@ -1085,7 +1083,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* then NULL is returned.
|
||||
*
|
||||
* Example usage:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphore;
|
||||
* StaticSemaphore_t xSemaphoreBuffer;
|
||||
*
|
||||
|
|
@ -1104,7 +1102,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* // No memory allocation was attempted so xSemaphore cannot be NULL, so there
|
||||
* // is no need to check its value.
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xSemaphoreCreateCountingStatic xSemaphoreCreateCountingStatic
|
||||
* \ingroup Semaphores
|
||||
*/
|
||||
|
|
@ -1114,9 +1112,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Delete a semaphore. This function must be used with care. For example,
|
||||
* do not delete a mutex type semaphore if the mutex is held by a task.
|
||||
|
|
@ -1130,9 +1128,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* If xMutex is indeed a mutex type semaphore, return the current mutex holder.
|
||||
* If xMutex is not a mutex type semaphore, or the mutex is available (not held
|
||||
|
|
@ -1143,30 +1141,26 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* the holder may change between the function exiting and the returned value
|
||||
* being tested.
|
||||
*/
|
||||
#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )
|
||||
#define xSemaphoreGetMutexHolder( xSemaphore ) xQueueGetMutexHolder( ( xSemaphore ) )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* semphr.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* If xMutex is indeed a mutex type semaphore, return the current mutex holder.
|
||||
* If xMutex is not a mutex type semaphore, or the mutex is available (not held
|
||||
* by a task), return NULL.
|
||||
*
|
||||
*/
|
||||
#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )
|
||||
#define xSemaphoreGetMutexHolderFromISR( xSemaphore ) xQueueGetMutexHolderFromISR( ( xSemaphore ) )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* semphr.h
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* If the semaphore is a counting semaphore then uxSemaphoreGetCount() returns
|
||||
* its current count value. If the semaphore is a binary semaphore then
|
||||
|
|
@ -1176,40 +1170,4 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
*/
|
||||
#define uxSemaphoreGetCount( xSemaphore ) uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) )
|
||||
|
||||
/**
|
||||
* semphr.h
|
||||
* @code{c}
|
||||
* UBaseType_t uxSemaphoreGetCountFromISR( SemaphoreHandle_t xSemaphore );
|
||||
* @endcode
|
||||
*
|
||||
* If the semaphore is a counting semaphore then uxSemaphoreGetCountFromISR() returns
|
||||
* its current count value. If the semaphore is a binary semaphore then
|
||||
* uxSemaphoreGetCountFromISR() returns 1 if the semaphore is available, and 0 if the
|
||||
* semaphore is not available.
|
||||
*
|
||||
*/
|
||||
#define uxSemaphoreGetCountFromISR( xSemaphore ) uxQueueMessagesWaitingFromISR( ( QueueHandle_t ) ( xSemaphore ) )
|
||||
|
||||
/**
|
||||
* semphr.h
|
||||
* @code{c}
|
||||
* BaseType_t xSemaphoreGetStaticBuffer( SemaphoreHandle_t xSemaphore,
|
||||
* StaticSemaphore_t ** ppxSemaphoreBuffer );
|
||||
* @endcode
|
||||
*
|
||||
* Retrieve pointer to a statically created binary semaphore, counting semaphore,
|
||||
* or mutex semaphore's data structure buffer. This is the same buffer that is
|
||||
* supplied at the time of creation.
|
||||
*
|
||||
* @param xSemaphore The semaphore for which to retrieve the buffer.
|
||||
*
|
||||
* @param ppxSemaphoreBuffer Used to return a pointer to the semaphore's
|
||||
* data structure buffer.
|
||||
*
|
||||
* @return pdTRUE if buffer was retrieved, pdFALSE otherwise.
|
||||
*/
|
||||
#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
|
||||
#define xSemaphoreGetStaticBuffer( xSemaphore, ppxSemaphoreBuffer ) xQueueGenericGetStaticBuffers( ( QueueHandle_t ) ( xSemaphore ), NULL, ( ppxSemaphoreBuffer ) )
|
||||
#endif /* configSUPPORT_STATIC_ALLOCATION */
|
||||
|
||||
#endif /* SEMAPHORE_H */
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -45,85 +43,59 @@
|
|||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* portSTACK_LIMIT_PADDING is a number of extra words to consider to be in
|
||||
* use on the stack.
|
||||
*/
|
||||
#ifndef portSTACK_LIMIT_PADDING
|
||||
#define portSTACK_LIMIT_PADDING 0
|
||||
#endif
|
||||
|
||||
/* Stack overflow check is not straight forward to implement for MPU ports
|
||||
* because of the following reasons:
|
||||
* 1. The context is stored in TCB and as a result, pxTopOfStack member points
|
||||
* to the context location in TCB.
|
||||
* 2. System calls are executed on a separate privileged only stack.
|
||||
*
|
||||
* It is still okay because an MPU region is used to protect task stack which
|
||||
* means task stack overflow will trigger an MPU fault for unprivileged tasks.
|
||||
* Additionally, architectures with hardware stack overflow checking support
|
||||
* (such as Armv8-M) will trigger a fault when a task's stack overflows.
|
||||
*/
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) )
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
|
||||
|
||||
/* Only the current stack state is to be checked. */
|
||||
#define taskCHECK_FOR_STACK_OVERFLOW() \
|
||||
do \
|
||||
{ \
|
||||
/* Is the currently saved stack pointer within the stack limit? */ \
|
||||
if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack + portSTACK_LIMIT_PADDING ) \
|
||||
if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \
|
||||
{ \
|
||||
char * pcOverflowTaskName = pxCurrentTCB->pcTaskName; \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName ); \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
|
||||
} \
|
||||
} while( 0 )
|
||||
}
|
||||
|
||||
#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) )
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
|
||||
|
||||
/* Only the current stack state is to be checked. */
|
||||
#define taskCHECK_FOR_STACK_OVERFLOW() \
|
||||
do \
|
||||
{ \
|
||||
\
|
||||
/* Is the currently saved stack pointer within the stack limit? */ \
|
||||
if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack - portSTACK_LIMIT_PADDING ) \
|
||||
if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \
|
||||
{ \
|
||||
char * pcOverflowTaskName = pxCurrentTCB->pcTaskName; \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName ); \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
|
||||
} \
|
||||
} while( 0 )
|
||||
}
|
||||
|
||||
#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) )
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
|
||||
|
||||
#define taskCHECK_FOR_STACK_OVERFLOW() \
|
||||
do \
|
||||
{ \
|
||||
const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \
|
||||
const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5U; \
|
||||
const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \
|
||||
\
|
||||
if( ( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack + portSTACK_LIMIT_PADDING ) || \
|
||||
( pulStack[ 0 ] != ulCheckValue ) || \
|
||||
if( ( pulStack[ 0 ] != ulCheckValue ) || \
|
||||
( pulStack[ 1 ] != ulCheckValue ) || \
|
||||
( pulStack[ 2 ] != ulCheckValue ) || \
|
||||
( pulStack[ 3 ] != ulCheckValue ) ) \
|
||||
{ \
|
||||
char * pcOverflowTaskName = pxCurrentTCB->pcTaskName; \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName ); \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
|
||||
} \
|
||||
} while( 0 )
|
||||
}
|
||||
|
||||
#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) )
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
|
||||
|
||||
#define taskCHECK_FOR_STACK_OVERFLOW() \
|
||||
do \
|
||||
{ \
|
||||
int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \
|
||||
static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
|
||||
|
|
@ -132,15 +104,15 @@
|
|||
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
|
||||
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
|
||||
\
|
||||
\
|
||||
pcEndOfStack -= sizeof( ucExpectedStackBytes ); \
|
||||
\
|
||||
if( ( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack - portSTACK_LIMIT_PADDING ) || \
|
||||
( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) ) \
|
||||
/* Has the extremity of the task stack ever been written over? */ \
|
||||
if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \
|
||||
{ \
|
||||
char * pcOverflowTaskName = pxCurrentTCB->pcTaskName; \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName ); \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
|
||||
} \
|
||||
} while( 0 )
|
||||
}
|
||||
|
||||
#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -51,8 +49,4 @@ typedef unsigned short uint16_t;
|
|||
typedef long int32_t;
|
||||
typedef unsigned long uint32_t;
|
||||
|
||||
#ifndef SIZE_MAX
|
||||
#define SIZE_MAX ( ( size_t ) -1 )
|
||||
#endif
|
||||
|
||||
#endif /* FREERTOS_STDINT */
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -40,12 +38,12 @@
|
|||
* writer and reader to be different tasks or interrupts, but, unlike other
|
||||
* FreeRTOS objects, it is not safe to have multiple different writers or
|
||||
* multiple different readers. If there are to be multiple different writers
|
||||
* then the application writer must serialize calls to writing API functions
|
||||
* (such as xStreamBufferSend()). Likewise, if there are to be multiple
|
||||
* different readers then the application writer must serialize calls to reading
|
||||
* API functions (such as xStreamBufferReceive()). One way to achieve such
|
||||
* serialization in single core or SMP kernel is to place each API call inside a
|
||||
* critical section and use a block time of 0.
|
||||
* then the application writer must place each call to a writing API function
|
||||
* (such as xStreamBufferSend()) inside a critical section and set the send
|
||||
* block time to 0. Likewise, if there are to be multiple different readers
|
||||
* then the application writer must place each call to a reading API function
|
||||
* (such as xStreamBufferReceive()) inside a critical section section and set the
|
||||
* receive block time to 0.
|
||||
*
|
||||
*/
|
||||
|
||||
|
|
@ -62,13 +60,6 @@
|
|||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/**
|
||||
* Type of stream buffer. For internal use only.
|
||||
*/
|
||||
#define sbTYPE_STREAM_BUFFER ( ( BaseType_t ) 0 )
|
||||
#define sbTYPE_MESSAGE_BUFFER ( ( BaseType_t ) 1 )
|
||||
#define sbTYPE_STREAM_BATCHING_BUFFER ( ( BaseType_t ) 2 )
|
||||
|
||||
/**
|
||||
* Type by which stream buffers are referenced. For example, a call to
|
||||
* xStreamBufferCreate() returns an StreamBufferHandle_t variable that can
|
||||
|
|
@ -78,19 +69,13 @@
|
|||
struct StreamBufferDef_t;
|
||||
typedef struct StreamBufferDef_t * StreamBufferHandle_t;
|
||||
|
||||
/**
|
||||
* Type used as a stream buffer's optional callback.
|
||||
*/
|
||||
typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuffer,
|
||||
BaseType_t xIsInsideISR,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken );
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
* message_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new stream buffer using dynamically allocated memory. See
|
||||
* xStreamBufferCreateStatic() for a version that uses statically allocated
|
||||
|
|
@ -98,8 +83,6 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
|
|||
*
|
||||
* configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
|
||||
* FreeRTOSConfig.h for xStreamBufferCreate() to be available.
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferCreate() to be available.
|
||||
*
|
||||
* @param xBufferSizeBytes The total number of bytes the stream buffer will be
|
||||
* able to hold at any one time.
|
||||
|
|
@ -118,16 +101,6 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
|
|||
* trigger level of 1 being used. It is not valid to specify a trigger level
|
||||
* that is greater than the buffer size.
|
||||
*
|
||||
* @param pxSendCompletedCallback Callback invoked when number of bytes at least equal to
|
||||
* trigger level is sent to the stream buffer. If the parameter is NULL, it will use the default
|
||||
* implementation provided by sbSEND_COMPLETED macro. To enable the callback,
|
||||
* configUSE_SB_COMPLETED_CALLBACK must be set to 1 in FreeRTOSConfig.h.
|
||||
*
|
||||
* @param pxReceiveCompletedCallback Callback invoked when more than zero bytes are read from a
|
||||
* stream buffer. If the parameter is NULL, it will use the default
|
||||
* implementation provided by sbRECEIVE_COMPLETED macro. To enable the callback,
|
||||
* configUSE_SB_COMPLETED_CALLBACK must be set to 1 in FreeRTOSConfig.h.
|
||||
*
|
||||
* @return If NULL is returned, then the stream buffer cannot be created
|
||||
* because there is insufficient heap memory available for FreeRTOS to allocate
|
||||
* the stream buffer data structures and storage area. A non-NULL value being
|
||||
|
|
@ -136,7 +109,7 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
|
|||
* buffer.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
*
|
||||
* void vAFunction( void )
|
||||
* {
|
||||
|
|
@ -158,35 +131,26 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
|
|||
* // The stream buffer was created successfully and can now be used.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xStreamBufferCreate xStreamBufferCreate
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
|
||||
#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) \
|
||||
xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BUFFER, NULL, NULL )
|
||||
|
||||
#if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
|
||||
#define xStreamBufferCreateWithCallback( xBufferSizeBytes, xTriggerLevelBytes, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
|
||||
xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BUFFER, ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
|
||||
#endif
|
||||
#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,
|
||||
* size_t xTriggerLevelBytes,
|
||||
* uint8_t *pucStreamBufferStorageArea,
|
||||
* StaticStreamBuffer_t *pxStaticStreamBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
* Creates a new stream buffer using statically allocated memory. See
|
||||
* xStreamBufferCreate() for a version that uses dynamically allocated memory.
|
||||
*
|
||||
* configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h for
|
||||
* xStreamBufferCreateStatic() to be available. configUSE_STREAM_BUFFERS must be
|
||||
* set to 1 in for FreeRTOSConfig.h for xStreamBufferCreateStatic() to be
|
||||
* available.
|
||||
* xStreamBufferCreateStatic() to be available.
|
||||
*
|
||||
* @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
|
||||
* pucStreamBufferStorageArea parameter.
|
||||
|
|
@ -206,29 +170,19 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
|
|||
* that is greater than the buffer size.
|
||||
*
|
||||
* @param pucStreamBufferStorageArea Must point to a uint8_t array that is at
|
||||
* least xBufferSizeBytes big. This is the array to which streams are
|
||||
* least xBufferSizeBytes + 1 big. This is the array to which streams are
|
||||
* copied when they are written to the stream buffer.
|
||||
*
|
||||
* @param pxStaticStreamBuffer Must point to a variable of type
|
||||
* StaticStreamBuffer_t, which will be used to hold the stream buffer's data
|
||||
* structure.
|
||||
*
|
||||
* @param pxSendCompletedCallback Callback invoked when number of bytes at least equal to
|
||||
* trigger level is sent to the stream buffer. If the parameter is NULL, it will use the default
|
||||
* implementation provided by sbSEND_COMPLETED macro. To enable the callback,
|
||||
* configUSE_SB_COMPLETED_CALLBACK must be set to 1 in FreeRTOSConfig.h.
|
||||
*
|
||||
* @param pxReceiveCompletedCallback Callback invoked when more than zero bytes are read from a
|
||||
* stream buffer. If the parameter is NULL, it will use the default
|
||||
* implementation provided by sbRECEIVE_COMPLETED macro. To enable the callback,
|
||||
* configUSE_SB_COMPLETED_CALLBACK must be set to 1 in FreeRTOSConfig.h.
|
||||
*
|
||||
* @return If the stream buffer is created successfully then a handle to the
|
||||
* created stream buffer is returned. If either pucStreamBufferStorageArea or
|
||||
* pxStaticstreamBuffer are NULL then NULL is returned.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
*
|
||||
* // Used to dimension the array used to hold the streams. The available space
|
||||
* // will actually be one less than this, so 999.
|
||||
|
|
@ -246,9 +200,9 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
|
|||
* StreamBufferHandle_t xStreamBuffer;
|
||||
* const size_t xTriggerLevel = 1;
|
||||
*
|
||||
* xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucStorageBuffer ),
|
||||
* xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ),
|
||||
* xTriggerLevel,
|
||||
* ucStorageBuffer,
|
||||
* ucBufferStorage,
|
||||
* &xStreamBufferStruct );
|
||||
*
|
||||
* // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer
|
||||
|
|
@ -258,251 +212,22 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
|
|||
* // Other code that uses the stream buffer can go here.
|
||||
* }
|
||||
*
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
|
||||
#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) \
|
||||
xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BUFFER, ( pucStreamBufferStorageArea ), ( pxStaticStreamBuffer ), NULL, NULL )
|
||||
|
||||
#if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
|
||||
#define xStreamBufferCreateStaticWithCallback( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
|
||||
xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BUFFER, ( pucStreamBufferStorageArea ), ( pxStaticStreamBuffer ), ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
|
||||
#endif
|
||||
xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* StreamBufferHandle_t xStreamBatchingBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes );
|
||||
* @endcode
|
||||
*
|
||||
* Creates a new stream batching buffer using dynamically allocated memory. See
|
||||
* xStreamBatchingBufferCreateStatic() for a version that uses statically
|
||||
* allocated memory (memory that is allocated at compile time).
|
||||
*
|
||||
* configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
|
||||
* FreeRTOSConfig.h for xStreamBatchingBufferCreate() to be available.
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBatchingBufferCreate() to be available.
|
||||
*
|
||||
* The difference between a stream buffer and a stream batching buffer is when
|
||||
* a task performs read on a non-empty buffer:
|
||||
* - The task reading from a non-empty stream buffer returns immediately
|
||||
* regardless of the amount of data in the buffer.
|
||||
* - The task reading from a non-empty steam batching buffer blocks until the
|
||||
* amount of data in the buffer exceeds the trigger level or the block time
|
||||
* expires.
|
||||
*
|
||||
* @param xBufferSizeBytes The total number of bytes the stream batching buffer
|
||||
* will be able to hold at any one time.
|
||||
*
|
||||
* @param xTriggerLevelBytes The number of bytes that must be in the stream
|
||||
* batching buffer to unblock a task calling xStreamBufferReceive before the
|
||||
* block time expires.
|
||||
*
|
||||
* @param pxSendCompletedCallback Callback invoked when number of bytes at least
|
||||
* equal to trigger level is sent to the stream batching buffer. If the
|
||||
* parameter is NULL, it will use the default implementation provided by
|
||||
* sbSEND_COMPLETED macro. To enable the callback, configUSE_SB_COMPLETED_CALLBACK
|
||||
* must be set to 1 in FreeRTOSConfig.h.
|
||||
*
|
||||
* @param pxReceiveCompletedCallback Callback invoked when more than zero bytes
|
||||
* are read from a stream batching buffer. If the parameter is NULL, it will use
|
||||
* the default implementation provided by sbRECEIVE_COMPLETED macro. To enable
|
||||
* the callback, configUSE_SB_COMPLETED_CALLBACK must be set to 1 in
|
||||
* FreeRTOSConfig.h.
|
||||
*
|
||||
* @return If NULL is returned, then the stream batching buffer cannot be created
|
||||
* because there is insufficient heap memory available for FreeRTOS to allocate
|
||||
* the stream batching buffer data structures and storage area. A non-NULL value
|
||||
* being returned indicates that the stream batching buffer has been created
|
||||
* successfully - the returned value should be stored as the handle to the
|
||||
* created stream batching buffer.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
*
|
||||
* void vAFunction( void )
|
||||
* {
|
||||
* StreamBufferHandle_t xStreamBatchingBuffer;
|
||||
* const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10;
|
||||
*
|
||||
* // Create a stream batching buffer that can hold 100 bytes. The memory used
|
||||
* // to hold both the stream batching buffer structure and the data in the stream
|
||||
* // batching buffer is allocated dynamically.
|
||||
* xStreamBatchingBuffer = xStreamBatchingBufferCreate( xStreamBufferSizeBytes, xTriggerLevel );
|
||||
*
|
||||
* if( xStreamBatchingBuffer == NULL )
|
||||
* {
|
||||
* // There was not enough heap memory space available to create the
|
||||
* // stream batching buffer.
|
||||
* }
|
||||
* else
|
||||
* {
|
||||
* // The stream batching buffer was created successfully and can now be used.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* \defgroup xStreamBatchingBufferCreate xStreamBatchingBufferCreate
|
||||
* \ingroup StreamBatchingBufferManagement
|
||||
*/
|
||||
|
||||
#define xStreamBatchingBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) \
|
||||
xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BATCHING_BUFFER, NULL, NULL )
|
||||
|
||||
#if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
|
||||
#define xStreamBatchingBufferCreateWithCallback( xBufferSizeBytes, xTriggerLevelBytes, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
|
||||
xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BATCHING_BUFFER, ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* StreamBufferHandle_t xStreamBatchingBufferCreateStatic( size_t xBufferSizeBytes,
|
||||
* size_t xTriggerLevelBytes,
|
||||
* uint8_t *pucStreamBufferStorageArea,
|
||||
* StaticStreamBuffer_t *pxStaticStreamBuffer );
|
||||
* @endcode
|
||||
* Creates a new stream batching buffer using statically allocated memory. See
|
||||
* xStreamBatchingBufferCreate() for a version that uses dynamically allocated
|
||||
* memory.
|
||||
*
|
||||
* configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h for
|
||||
* xStreamBatchingBufferCreateStatic() to be available. configUSE_STREAM_BUFFERS
|
||||
* must be set to 1 in for FreeRTOSConfig.h for xStreamBatchingBufferCreateStatic()
|
||||
* to be available.
|
||||
*
|
||||
* The difference between a stream buffer and a stream batching buffer is when
|
||||
* a task performs read on a non-empty buffer:
|
||||
* - The task reading from a non-empty stream buffer returns immediately
|
||||
* regardless of the amount of data in the buffer.
|
||||
* - The task reading from a non-empty steam batching buffer blocks until the
|
||||
* amount of data in the buffer exceeds the trigger level or the block time
|
||||
* expires.
|
||||
*
|
||||
* @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
|
||||
* pucStreamBufferStorageArea parameter.
|
||||
*
|
||||
* @param xTriggerLevelBytes The number of bytes that must be in the stream
|
||||
* batching buffer to unblock a task calling xStreamBufferReceive before the
|
||||
* block time expires.
|
||||
*
|
||||
* @param pucStreamBufferStorageArea Must point to a uint8_t array that is at
|
||||
* least xBufferSizeBytes big. This is the array to which streams are
|
||||
* copied when they are written to the stream batching buffer.
|
||||
*
|
||||
* @param pxStaticStreamBuffer Must point to a variable of type
|
||||
* StaticStreamBuffer_t, which will be used to hold the stream batching buffer's
|
||||
* data structure.
|
||||
*
|
||||
* @param pxSendCompletedCallback Callback invoked when number of bytes at least
|
||||
* equal to trigger level is sent to the stream batching buffer. If the parameter
|
||||
* is NULL, it will use the default implementation provided by sbSEND_COMPLETED
|
||||
* macro. To enable the callback, configUSE_SB_COMPLETED_CALLBACK must be set to
|
||||
* 1 in FreeRTOSConfig.h.
|
||||
*
|
||||
* @param pxReceiveCompletedCallback Callback invoked when more than zero bytes
|
||||
* are read from a stream batching buffer. If the parameter is NULL, it will use
|
||||
* the default implementation provided by sbRECEIVE_COMPLETED macro. To enable
|
||||
* the callback, configUSE_SB_COMPLETED_CALLBACK must be set to 1 in
|
||||
* FreeRTOSConfig.h.
|
||||
*
|
||||
* @return If the stream batching buffer is created successfully then a handle
|
||||
* to the created stream batching buffer is returned. If either pucStreamBufferStorageArea
|
||||
* or pxStaticstreamBuffer are NULL then NULL is returned.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
*
|
||||
* // Used to dimension the array used to hold the streams. The available space
|
||||
* // will actually be one less than this, so 999.
|
||||
* #define STORAGE_SIZE_BYTES 1000
|
||||
*
|
||||
* // Defines the memory that will actually hold the streams within the stream
|
||||
* // batching buffer.
|
||||
* static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
|
||||
*
|
||||
* // The variable used to hold the stream batching buffer structure.
|
||||
* StaticStreamBuffer_t xStreamBufferStruct;
|
||||
*
|
||||
* void MyFunction( void )
|
||||
* {
|
||||
* StreamBufferHandle_t xStreamBatchingBuffer;
|
||||
* const size_t xTriggerLevel = 1;
|
||||
*
|
||||
* xStreamBatchingBuffer = xStreamBatchingBufferCreateStatic( sizeof( ucStorageBuffer ),
|
||||
* xTriggerLevel,
|
||||
* ucStorageBuffer,
|
||||
* &xStreamBufferStruct );
|
||||
*
|
||||
* // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer
|
||||
* // parameters were NULL, xStreamBatchingBuffer will not be NULL, and can be
|
||||
* // used to reference the created stream batching buffer in other stream
|
||||
* // buffer API calls.
|
||||
*
|
||||
* // Other code that uses the stream batching buffer can go here.
|
||||
* }
|
||||
*
|
||||
* @endcode
|
||||
* \defgroup xStreamBatchingBufferCreateStatic xStreamBatchingBufferCreateStatic
|
||||
* \ingroup StreamBatchingBufferManagement
|
||||
*/
|
||||
|
||||
#define xStreamBatchingBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) \
|
||||
xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BATCHING_BUFFER, ( pucStreamBufferStorageArea ), ( pxStaticStreamBuffer ), NULL, NULL )
|
||||
|
||||
#if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
|
||||
#define xStreamBatchingBufferCreateStaticWithCallback( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
|
||||
xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BATCHING_BUFFER, ( pucStreamBufferStorageArea ), ( pxStaticStreamBuffer ), ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* BaseType_t xStreamBufferGetStaticBuffers( StreamBufferHandle_t xStreamBuffer,
|
||||
* uint8_t ** ppucStreamBufferStorageArea,
|
||||
* StaticStreamBuffer_t ** ppxStaticStreamBuffer );
|
||||
* @endcode
|
||||
*
|
||||
* Retrieve pointers to a statically created stream buffer's data structure
|
||||
* buffer and storage area buffer. These are the same buffers that are supplied
|
||||
* at the time of creation.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferGetStaticBuffers() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The stream buffer for which to retrieve the buffers.
|
||||
*
|
||||
* @param ppucStreamBufferStorageArea Used to return a pointer to the stream
|
||||
* buffer's storage area buffer.
|
||||
*
|
||||
* @param ppxStaticStreamBuffer Used to return a pointer to the stream
|
||||
* buffer's data structure buffer.
|
||||
*
|
||||
* @return pdTRUE if buffers were retrieved, pdFALSE otherwise.
|
||||
*
|
||||
* \defgroup xStreamBufferGetStaticBuffers xStreamBufferGetStaticBuffers
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
|
||||
BaseType_t xStreamBufferGetStaticBuffers( StreamBufferHandle_t xStreamBuffer,
|
||||
uint8_t ** ppucStreamBufferStorageArea,
|
||||
StaticStreamBuffer_t ** ppxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
#endif /* configSUPPORT_STATIC_ALLOCATION */
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
|
||||
* const void *pvTxData,
|
||||
* size_t xDataLengthBytes,
|
||||
* TickType_t xTicksToWait );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Sends bytes to a stream buffer. The bytes are copied into the stream buffer.
|
||||
*
|
||||
|
|
@ -514,20 +239,17 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
|
|||
* writer and reader to be different tasks or interrupts, but, unlike other
|
||||
* FreeRTOS objects, it is not safe to have multiple different writers or
|
||||
* multiple different readers. If there are to be multiple different writers
|
||||
* then the application writer must serialize calls to writing API functions
|
||||
* (such as xStreamBufferSend()). Likewise, if there are to be multiple
|
||||
* different readers then the application writer must serialize calls to reading
|
||||
* API functions (such as xStreamBufferReceive()). One way to achieve such
|
||||
* serialization in single core or SMP kernel is to place each API call inside a
|
||||
* critical section and use a block time of 0.
|
||||
* then the application writer must place each call to a writing API function
|
||||
* (such as xStreamBufferSend()) inside a critical section and set the send
|
||||
* block time to 0. Likewise, if there are to be multiple different readers
|
||||
* then the application writer must place each call to a reading API function
|
||||
* (such as xStreamBufferReceive()) inside a critical section and set the receive
|
||||
* block time to 0.
|
||||
*
|
||||
* Use xStreamBufferSend() to write to a stream buffer from a task. Use
|
||||
* xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
|
||||
* service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferSend() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer to which a stream is
|
||||
* being sent.
|
||||
*
|
||||
|
|
@ -555,7 +277,7 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
|
|||
* write as many bytes as possible.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* void vAFunction( StreamBufferHandle_t xStreamBuffer )
|
||||
* {
|
||||
* size_t xBytesSent;
|
||||
|
|
@ -585,7 +307,7 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
|
|||
* // were sent. Could try again to send the remaining bytes.
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xStreamBufferSend xStreamBufferSend
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
|
|
@ -597,12 +319,12 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
* const void *pvTxData,
|
||||
* size_t xDataLengthBytes,
|
||||
* BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Interrupt safe version of the API function that sends a stream of bytes to
|
||||
* the stream buffer.
|
||||
|
|
@ -615,20 +337,17 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
|
|||
* writer and reader to be different tasks or interrupts, but, unlike other
|
||||
* FreeRTOS objects, it is not safe to have multiple different writers or
|
||||
* multiple different readers. If there are to be multiple different writers
|
||||
* then the application writer must serialize calls to writing API functions
|
||||
* (such as xStreamBufferSend()). Likewise, if there are to be multiple
|
||||
* different readers then the application writer must serialize calls to reading
|
||||
* API functions (such as xStreamBufferReceive()). One way to achieve such
|
||||
* serialization in single core or SMP kernel is to place each API call inside a
|
||||
* critical section and use a block time of 0.
|
||||
* then the application writer must place each call to a writing API function
|
||||
* (such as xStreamBufferSend()) inside a critical section and set the send
|
||||
* block time to 0. Likewise, if there are to be multiple different readers
|
||||
* then the application writer must place each call to a reading API function
|
||||
* (such as xStreamBufferReceive()) inside a critical section and set the receive
|
||||
* block time to 0.
|
||||
*
|
||||
* Use xStreamBufferSend() to write to a stream buffer from a task. Use
|
||||
* xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
|
||||
* service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferSendFromISR() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer to which a stream is
|
||||
* being sent.
|
||||
*
|
||||
|
|
@ -657,7 +376,7 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
|
|||
* space for all the bytes to be written.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // A stream buffer that has already been created.
|
||||
* StreamBufferHandle_t xStreamBuffer;
|
||||
*
|
||||
|
|
@ -684,12 +403,12 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
|
|||
* // priority of the currently executing task was unblocked and a context
|
||||
* // switch should be performed to ensure the ISR returns to the unblocked
|
||||
* // task. In most FreeRTOS ports this is done by simply passing
|
||||
* // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
|
||||
* // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
|
||||
* // variables value, and perform the context switch if necessary. Check the
|
||||
* // documentation for the port in use for port specific instructions.
|
||||
* portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
|
||||
* taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
|
|
@ -701,12 +420,12 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
|
||||
* void *pvRxData,
|
||||
* size_t xBufferLengthBytes,
|
||||
* TickType_t xTicksToWait );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Receives bytes from a stream buffer.
|
||||
*
|
||||
|
|
@ -718,20 +437,17 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
|
|||
* writer and reader to be different tasks or interrupts, but, unlike other
|
||||
* FreeRTOS objects, it is not safe to have multiple different writers or
|
||||
* multiple different readers. If there are to be multiple different writers
|
||||
* then the application writer must serialize calls to writing API functions
|
||||
* (such as xStreamBufferSend()). Likewise, if there are to be multiple
|
||||
* different readers then the application writer must serialize calls to reading
|
||||
* API functions (such as xStreamBufferReceive()). One way to achieve such
|
||||
* serialization in single core or SMP kernel is to place each API call inside a
|
||||
* critical section and use a block time of 0.
|
||||
* then the application writer must place each call to a writing API function
|
||||
* (such as xStreamBufferSend()) inside a critical section and set the send
|
||||
* block time to 0. Likewise, if there are to be multiple different readers
|
||||
* then the application writer must place each call to a reading API function
|
||||
* (such as xStreamBufferReceive()) inside a critical section and set the receive
|
||||
* block time to 0.
|
||||
*
|
||||
* Use xStreamBufferReceive() to read from a stream buffer from a task. Use
|
||||
* xStreamBufferReceiveFromISR() to read from a stream buffer from an
|
||||
* interrupt service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferReceive() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer from which bytes are to
|
||||
* be received.
|
||||
*
|
||||
|
|
@ -759,7 +475,7 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
|
|||
* out before xBufferLengthBytes were available.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* void vAFunction( StreamBuffer_t xStreamBuffer )
|
||||
* {
|
||||
* uint8_t ucRxData[ 20 ];
|
||||
|
|
@ -777,11 +493,11 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
|
|||
*
|
||||
* if( xReceivedBytes > 0 )
|
||||
* {
|
||||
* // A ucRxData contains another xReceivedBytes bytes of data, which can
|
||||
* // A ucRxData contains another xRecievedBytes bytes of data, which can
|
||||
* // be processed here....
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xStreamBufferReceive xStreamBufferReceive
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
|
|
@ -793,12 +509,12 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
* void *pvRxData,
|
||||
* size_t xBufferLengthBytes,
|
||||
* BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* An interrupt safe version of the API function that receives bytes from a
|
||||
* stream buffer.
|
||||
|
|
@ -807,9 +523,6 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
|
|||
* Use xStreamBufferReceiveFromISR() to read bytes from a stream buffer from an
|
||||
* interrupt service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferReceiveFromISR() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer from which a stream
|
||||
* is being received.
|
||||
*
|
||||
|
|
@ -838,7 +551,7 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
|
|||
* @return The number of bytes read from the stream buffer, if any.
|
||||
*
|
||||
* Example use:
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* // A stream buffer that has already been created.
|
||||
* StreamBuffer_t xStreamBuffer;
|
||||
*
|
||||
|
|
@ -865,12 +578,12 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
|
|||
* // priority of the currently executing task was unblocked and a context
|
||||
* // switch should be performed to ensure the ISR returns to the unblocked
|
||||
* // task. In most FreeRTOS ports this is done by simply passing
|
||||
* // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
|
||||
* // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
|
||||
* // variables value, and perform the context switch if necessary. Check the
|
||||
* // documentation for the port in use for port specific instructions.
|
||||
* portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
|
||||
* taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
|
||||
* }
|
||||
* @endcode
|
||||
* </pre>
|
||||
* \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
|
|
@ -882,9 +595,9 @@ size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Deletes a stream buffer that was previously created using a call to
|
||||
* xStreamBufferCreate() or xStreamBufferCreateStatic(). If the stream
|
||||
|
|
@ -894,9 +607,6 @@ size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
|
|||
* A stream buffer handle must not be used after the stream buffer has been
|
||||
* deleted.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* vStreamBufferDelete() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer to be deleted.
|
||||
*
|
||||
* \defgroup vStreamBufferDelete vStreamBufferDelete
|
||||
|
|
@ -907,16 +617,13 @@ void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTI
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Queries a stream buffer to see if it is full. A stream buffer is full if it
|
||||
* does not have any free space, and therefore cannot accept any more data.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferIsFull() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer being queried.
|
||||
*
|
||||
* @return If the stream buffer is full then pdTRUE is returned. Otherwise
|
||||
|
|
@ -930,16 +637,13 @@ BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Queries a stream buffer to see if it is empty. A stream buffer is empty if
|
||||
* it does not contain any data.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferIsEmpty() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer being queried.
|
||||
*
|
||||
* @return If the stream buffer is empty then pdTRUE is returned. Otherwise
|
||||
|
|
@ -953,22 +657,15 @@ BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Resets a stream buffer to its initial, empty, state. Any data that was in
|
||||
* the stream buffer is discarded. A stream buffer can only be reset if there
|
||||
* are no tasks blocked waiting to either send to or receive from the stream
|
||||
* buffer.
|
||||
*
|
||||
* Use xStreamBufferReset() to reset a stream buffer from a task.
|
||||
* Use xStreamBufferResetFromISR() to reset a stream buffer from an
|
||||
* interrupt service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferReset() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer being reset.
|
||||
*
|
||||
* @return If the stream buffer is reset then pdPASS is returned. If there was
|
||||
|
|
@ -983,49 +680,14 @@ BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_F
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* BaseType_t xStreamBufferResetFromISR( StreamBufferHandle_t xStreamBuffer );
|
||||
* @endcode
|
||||
*
|
||||
* An interrupt safe version of the API function that resets the stream buffer.
|
||||
*
|
||||
* Resets a stream buffer to its initial, empty, state. Any data that was in
|
||||
* the stream buffer is discarded. A stream buffer can only be reset if there
|
||||
* are no tasks blocked waiting to either send to or receive from the stream
|
||||
* buffer.
|
||||
*
|
||||
* Use xStreamBufferReset() to reset a stream buffer from a task.
|
||||
* Use xStreamBufferResetFromISR() to reset a stream buffer from an
|
||||
* interrupt service routine (ISR).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferResetFromISR() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer being reset.
|
||||
*
|
||||
* @return If the stream buffer is reset then pdPASS is returned. If there was
|
||||
* a task blocked waiting to send to or read from the stream buffer then the
|
||||
* stream buffer is not reset and pdFAIL is returned.
|
||||
*
|
||||
* \defgroup xStreamBufferResetFromISR xStreamBufferResetFromISR
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
BaseType_t xStreamBufferResetFromISR( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Queries a stream buffer to see how much free space it contains, which is
|
||||
* equal to the amount of data that can be sent to the stream buffer before it
|
||||
* is full.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferSpacesAvailable() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer being queried.
|
||||
*
|
||||
* @return The number of bytes that can be written to the stream buffer before
|
||||
|
|
@ -1039,17 +701,14 @@ size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVIL
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* Queries a stream buffer to see how much data it contains, which is equal to
|
||||
* the number of bytes that can be read from the stream buffer before the stream
|
||||
* buffer would be empty.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferBytesAvailable() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer being queried.
|
||||
*
|
||||
* @return The number of bytes that can be read from the stream buffer before
|
||||
|
|
@ -1063,9 +722,9 @@ size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILE
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* A stream buffer's trigger level is the number of bytes that must be in the
|
||||
* stream buffer before a task that is blocked on the stream buffer to
|
||||
|
|
@ -1084,9 +743,6 @@ size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILE
|
|||
* A trigger level is set when the stream buffer is created, and can be modified
|
||||
* using xStreamBufferSetTriggerLevel().
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferSetTriggerLevel() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer being updated.
|
||||
*
|
||||
* @param xTriggerLevel The new trigger level for the stream buffer.
|
||||
|
|
@ -1104,9 +760,9 @@ BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* For advanced users only.
|
||||
*
|
||||
|
|
@ -1121,9 +777,6 @@ BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
|
|||
* See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
|
||||
* additional information.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferSendCompletedFromISR() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer to which data was
|
||||
* written.
|
||||
*
|
||||
|
|
@ -1147,9 +800,9 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
|
|||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* <pre>
|
||||
* BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* @endcode
|
||||
* </pre>
|
||||
*
|
||||
* For advanced users only.
|
||||
*
|
||||
|
|
@ -1165,9 +818,6 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
|
|||
* See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
|
||||
* additional information.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* xStreamBufferReceiveCompletedFromISR() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer from which data was
|
||||
* read.
|
||||
*
|
||||
|
|
@ -1188,79 +838,16 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
|
|||
BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* UBaseType_t uxStreamBufferGetStreamBufferNotificationIndex( StreamBufferHandle_t xStreamBuffer );
|
||||
* @endcode
|
||||
*
|
||||
* Get the task notification index used for the supplied stream buffer which can
|
||||
* be set using vStreamBufferSetStreamBufferNotificationIndex. If the task
|
||||
* notification index for the stream buffer is not changed using
|
||||
* vStreamBufferSetStreamBufferNotificationIndex, this function returns the
|
||||
* default value (tskDEFAULT_INDEX_TO_NOTIFY).
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* uxStreamBufferGetStreamBufferNotificationIndex() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer for which the task
|
||||
* notification index is retrieved.
|
||||
*
|
||||
* @return The task notification index for the stream buffer.
|
||||
*
|
||||
* \defgroup uxStreamBufferGetStreamBufferNotificationIndex uxStreamBufferGetStreamBufferNotificationIndex
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
UBaseType_t uxStreamBufferGetStreamBufferNotificationIndex( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
*
|
||||
* @code{c}
|
||||
* void vStreamBufferSetStreamBufferNotificationIndex ( StreamBuffer_t xStreamBuffer, UBaseType_t uxNotificationIndex );
|
||||
* @endcode
|
||||
*
|
||||
* Set the task notification index used for the supplied stream buffer.
|
||||
* Successive calls to stream buffer APIs (like xStreamBufferSend or
|
||||
* xStreamBufferReceive) for this stream buffer will use this new index for
|
||||
* their task notifications.
|
||||
*
|
||||
* If this function is not called, the default index (tskDEFAULT_INDEX_TO_NOTIFY)
|
||||
* is used for task notifications. It is recommended to call this function
|
||||
* before attempting to send or receive data from the stream buffer to avoid
|
||||
* inconsistencies.
|
||||
*
|
||||
* configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
|
||||
* vStreamBufferSetStreamBufferNotificationIndex() to be available.
|
||||
*
|
||||
* @param xStreamBuffer The handle of the stream buffer for which the task
|
||||
* notification index is set.
|
||||
*
|
||||
* @param uxNotificationIndex The task notification index to set.
|
||||
*
|
||||
* \defgroup vStreamBufferSetStreamBufferNotificationIndex vStreamBufferSetStreamBufferNotificationIndex
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
void vStreamBufferSetStreamBufferNotificationIndex( StreamBufferHandle_t xStreamBuffer,
|
||||
UBaseType_t uxNotificationIndex ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/* Functions below here are not part of the public API. */
|
||||
StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
|
||||
size_t xTriggerLevelBytes,
|
||||
BaseType_t xStreamBufferType,
|
||||
StreamBufferCallbackFunction_t pxSendCompletedCallback,
|
||||
StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
|
||||
StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
|
||||
size_t xTriggerLevelBytes,
|
||||
BaseType_t xStreamBufferType,
|
||||
BaseType_t xIsMessageBuffer,
|
||||
uint8_t * const pucStreamBufferStorageArea,
|
||||
StaticStreamBuffer_t * const pxStaticStreamBuffer,
|
||||
StreamBufferCallbackFunction_t pxSendCompletedCallback,
|
||||
StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
|
|
|
|||
1210
include/task.h
1210
include/task.h
File diff suppressed because it is too large
Load diff
153
include/timers.h
153
include/timers.h
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -34,8 +32,10 @@
|
|||
#error "include FreeRTOS.h must appear in source files before include timers.h"
|
||||
#endif
|
||||
|
||||
/*lint -save -e537 This headers are only multiply included if the application code
|
||||
* happens to also be including task.h. */
|
||||
#include "task.h"
|
||||
|
||||
/*lint -restore */
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
|
|
@ -86,13 +86,13 @@ typedef void (* TimerCallbackFunction_t)( TimerHandle_t xTimer );
|
|||
* Defines the prototype to which functions used with the
|
||||
* xTimerPendFunctionCallFromISR() function must conform.
|
||||
*/
|
||||
typedef void (* PendedFunction_t)( void * arg1,
|
||||
uint32_t arg2 );
|
||||
typedef void (* PendedFunction_t)( void *,
|
||||
uint32_t );
|
||||
|
||||
/**
|
||||
* TimerHandle_t xTimerCreate( const char * const pcTimerName,
|
||||
* TickType_t xTimerPeriodInTicks,
|
||||
* BaseType_t xAutoReload,
|
||||
* UBaseType_t uxAutoReload,
|
||||
* void * pvTimerID,
|
||||
* TimerCallbackFunction_t pxCallbackFunction );
|
||||
*
|
||||
|
|
@ -125,9 +125,9 @@ typedef void (* PendedFunction_t)( void * arg1,
|
|||
* to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
|
||||
* equal to 1000. Time timer period must be greater than 0.
|
||||
*
|
||||
* @param xAutoReload If xAutoReload is set to pdTRUE then the timer will
|
||||
* @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
|
||||
* expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
|
||||
* If xAutoReload is set to pdFALSE then the timer will be a one-shot timer and
|
||||
* If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
|
||||
* enter the dormant state after it expires.
|
||||
*
|
||||
* @param pvTimerID An identifier that is assigned to the timer being created.
|
||||
|
|
@ -191,7 +191,7 @@ typedef void (* PendedFunction_t)( void * arg1,
|
|||
* for( x = 0; x < NUM_TIMERS; x++ )
|
||||
* {
|
||||
* xTimers[ x ] = xTimerCreate( "Timer", // Just a text name, not used by the kernel.
|
||||
* ( 100 * ( x + 1 ) ), // The timer period in ticks.
|
||||
* ( 100 * x ), // The timer period in ticks.
|
||||
* pdTRUE, // The timers will auto-reload themselves when they expire.
|
||||
* ( void * ) x, // Assign each timer a unique id equal to its array index.
|
||||
* vTimerCallback // Each timer calls the same callback when it expires.
|
||||
|
|
@ -227,9 +227,9 @@ typedef void (* PendedFunction_t)( void * arg1,
|
|||
* @endverbatim
|
||||
*/
|
||||
#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
|
||||
TimerHandle_t xTimerCreate( const char * const pcTimerName,
|
||||
TimerHandle_t xTimerCreate( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
|
||||
const TickType_t xTimerPeriodInTicks,
|
||||
const BaseType_t xAutoReload,
|
||||
const UBaseType_t uxAutoReload,
|
||||
void * const pvTimerID,
|
||||
TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
|
|
@ -237,7 +237,7 @@ typedef void (* PendedFunction_t)( void * arg1,
|
|||
/**
|
||||
* TimerHandle_t xTimerCreateStatic(const char * const pcTimerName,
|
||||
* TickType_t xTimerPeriodInTicks,
|
||||
* BaseType_t xAutoReload,
|
||||
* UBaseType_t uxAutoReload,
|
||||
* void * pvTimerID,
|
||||
* TimerCallbackFunction_t pxCallbackFunction,
|
||||
* StaticTimer_t *pxTimerBuffer );
|
||||
|
|
@ -271,9 +271,9 @@ typedef void (* PendedFunction_t)( void * arg1,
|
|||
* to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
|
||||
* equal to 1000. The timer period must be greater than 0.
|
||||
*
|
||||
* @param xAutoReload If xAutoReload is set to pdTRUE then the timer will
|
||||
* @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
|
||||
* expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
|
||||
* If xAutoReload is set to pdFALSE then the timer will be a one-shot timer and
|
||||
* If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
|
||||
* enter the dormant state after it expires.
|
||||
*
|
||||
* @param pvTimerID An identifier that is assigned to the timer being created.
|
||||
|
|
@ -357,9 +357,9 @@ typedef void (* PendedFunction_t)( void * arg1,
|
|||
* @endverbatim
|
||||
*/
|
||||
#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
|
||||
TimerHandle_t xTimerCreateStatic( const char * const pcTimerName,
|
||||
TimerHandle_t xTimerCreateStatic( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
|
||||
const TickType_t xTimerPeriodInTicks,
|
||||
const BaseType_t xAutoReload,
|
||||
const UBaseType_t uxAutoReload,
|
||||
void * const pvTimerID,
|
||||
TimerCallbackFunction_t pxCallbackFunction,
|
||||
StaticTimer_t * pxTimerBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
|
@ -737,16 +737,12 @@ TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
|
|||
* // The key press event handler.
|
||||
* void vKeyPressEventHandler( char cKey )
|
||||
* {
|
||||
* // Reset the timer that is responsible for turning the back-light off after
|
||||
* // 5 seconds of key inactivity. Wait 10 ticks for the command to be
|
||||
* // successfully sent if it cannot be sent immediately.
|
||||
* if( xTimerReset( xBacklightTimer, 10 ) == pdPASS )
|
||||
* {
|
||||
* // Turn on the LCD back-light. It will be turned off in the
|
||||
* // vBacklightTimerCallback after 5 seconds of key inactivity.
|
||||
* // Ensure the LCD back-light is on, then reset the timer that is
|
||||
* // responsible for turning the back-light off after 5 seconds of
|
||||
* // key inactivity. Wait 10 ticks for the command to be successfully sent
|
||||
* // if it cannot be sent immediately.
|
||||
* vSetBacklightState( BACKLIGHT_ON );
|
||||
* }
|
||||
* else
|
||||
* if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )
|
||||
* {
|
||||
* // The reset command was not executed successfully. Take appropriate
|
||||
* // action here.
|
||||
|
|
@ -757,11 +753,12 @@ TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
|
|||
*
|
||||
* void main( void )
|
||||
* {
|
||||
* int32_t x;
|
||||
*
|
||||
* // Create then start the one-shot timer that is responsible for turning
|
||||
* // the back-light off if no keys are pressed within a 5 second period.
|
||||
* xBacklightTimer = xTimerCreate( "BacklightTimer", // Just a text name, not used by the kernel.
|
||||
* pdMS_TO_TICKS( 5000 ), // The timer period in ticks.
|
||||
* ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks.
|
||||
* pdFALSE, // The timer is a one-shot timer.
|
||||
* 0, // The id is not used by the callback so can take any value.
|
||||
* vBacklightTimerCallback // The callback function that switches the LCD back-light off.
|
||||
|
|
@ -1199,12 +1196,10 @@ TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
|
|||
* }
|
||||
* @endverbatim
|
||||
*/
|
||||
#if ( INCLUDE_xTimerPendFunctionCall == 1 )
|
||||
BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
|
||||
void * pvParameter1,
|
||||
uint32_t ulParameter2,
|
||||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
|
||||
|
|
@ -1238,12 +1233,10 @@ TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
|
|||
* timer daemon task, otherwise pdFALSE is returned.
|
||||
*
|
||||
*/
|
||||
#if ( INCLUDE_xTimerPendFunctionCall == 1 )
|
||||
BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
|
||||
void * pvParameter1,
|
||||
uint32_t ulParameter2,
|
||||
TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* const char * const pcTimerGetName( TimerHandle_t xTimer );
|
||||
|
|
@ -1254,10 +1247,10 @@ TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
|
|||
*
|
||||
* @return The name assigned to the timer specified by the xTimer parameter.
|
||||
*/
|
||||
const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
|
||||
const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
|
||||
|
||||
/**
|
||||
* void vTimerSetReloadMode( TimerHandle_t xTimer, const BaseType_t xAutoReload );
|
||||
* void vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload );
|
||||
*
|
||||
* Updates a timer to be either an auto-reload timer, in which case the timer
|
||||
* automatically resets itself each time it expires, or a one-shot timer, in
|
||||
|
|
@ -1265,28 +1258,14 @@ const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
|
|||
*
|
||||
* @param xTimer The handle of the timer being updated.
|
||||
*
|
||||
* @param xAutoReload If xAutoReload is set to pdTRUE then the timer will
|
||||
* @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
|
||||
* expire repeatedly with a frequency set by the timer's period (see the
|
||||
* xTimerPeriodInTicks parameter of the xTimerCreate() API function). If
|
||||
* xAutoReload is set to pdFALSE then the timer will be a one-shot timer and
|
||||
* uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
|
||||
* enter the dormant state after it expires.
|
||||
*/
|
||||
void vTimerSetReloadMode( TimerHandle_t xTimer,
|
||||
const BaseType_t xAutoReload ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* BaseType_t xTimerGetReloadMode( TimerHandle_t xTimer );
|
||||
*
|
||||
* Queries a timer to determine if it is an auto-reload timer, in which case the timer
|
||||
* automatically resets itself each time it expires, or a one-shot timer, in
|
||||
* which case the timer will only expire once unless it is manually restarted.
|
||||
*
|
||||
* @param xTimer The handle of the timer being queried.
|
||||
*
|
||||
* @return If the timer is an auto-reload timer then pdTRUE is returned, otherwise
|
||||
* pdFALSE is returned.
|
||||
*/
|
||||
BaseType_t xTimerGetReloadMode( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
|
||||
const UBaseType_t uxAutoReload ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer );
|
||||
|
|
@ -1328,54 +1307,17 @@ TickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
|
|||
*/
|
||||
TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* BaseType_t xTimerGetStaticBuffer( TimerHandle_t xTimer,
|
||||
* StaticTimer_t ** ppxTimerBuffer );
|
||||
*
|
||||
* Retrieve pointer to a statically created timer's data structure
|
||||
* buffer. This is the same buffer that is supplied at the time of
|
||||
* creation.
|
||||
*
|
||||
* @param xTimer The timer for which to retrieve the buffer.
|
||||
*
|
||||
* @param ppxTaskBuffer Used to return a pointer to the timers's data
|
||||
* structure buffer.
|
||||
*
|
||||
* @return pdTRUE if the buffer was retrieved, pdFALSE otherwise.
|
||||
*/
|
||||
#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
|
||||
BaseType_t xTimerGetStaticBuffer( TimerHandle_t xTimer,
|
||||
StaticTimer_t ** ppxTimerBuffer ) PRIVILEGED_FUNCTION;
|
||||
#endif /* configSUPPORT_STATIC_ALLOCATION */
|
||||
|
||||
/*
|
||||
* Functions beyond this part are not part of the public API and are intended
|
||||
* for use by the kernel only.
|
||||
*/
|
||||
BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/*
|
||||
* Splitting the xTimerGenericCommand into two sub functions and making it a macro
|
||||
* removes a recursion path when called from ISRs. This is primarily for the XCore
|
||||
* XCC port which detects the recursion path and throws an error during compilation
|
||||
* when this is not split.
|
||||
*/
|
||||
BaseType_t xTimerGenericCommandFromTask( TimerHandle_t xTimer,
|
||||
BaseType_t xTimerGenericCommand( TimerHandle_t xTimer,
|
||||
const BaseType_t xCommandID,
|
||||
const TickType_t xOptionalValue,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken,
|
||||
const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
|
||||
|
||||
BaseType_t xTimerGenericCommandFromISR( TimerHandle_t xTimer,
|
||||
const BaseType_t xCommandID,
|
||||
const TickType_t xOptionalValue,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken,
|
||||
const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
|
||||
|
||||
#define xTimerGenericCommand( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait ) \
|
||||
( ( xCommandID ) < tmrFIRST_FROM_ISR_COMMAND ? \
|
||||
xTimerGenericCommandFromTask( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait ) : \
|
||||
xTimerGenericCommandFromISR( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait ) )
|
||||
#if ( configUSE_TRACE_FACILITY == 1 )
|
||||
void vTimerSetTimerNumber( TimerHandle_t xTimer,
|
||||
UBaseType_t uxTimerNumber ) PRIVILEGED_FUNCTION;
|
||||
|
|
@ -1386,46 +1328,21 @@ BaseType_t xTimerGenericCommandFromISR( TimerHandle_t xTimer,
|
|||
|
||||
/**
|
||||
* task.h
|
||||
* @code{c}
|
||||
* void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, configSTACK_DEPTH_TYPE * puxTimerTaskStackSize )
|
||||
* @endcode
|
||||
* <pre>void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize ) </pre>
|
||||
*
|
||||
* This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Timer Task TCB. This function is required when
|
||||
* configSUPPORT_STATIC_ALLOCATION is set. For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
|
||||
*
|
||||
* @param ppxTimerTaskTCBBuffer A handle to a statically allocated TCB buffer
|
||||
* @param ppxTimerTaskStackBuffer A handle to a statically allocated Stack buffer for the idle task
|
||||
* @param puxTimerTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
|
||||
* @param ppxTimerTaskStackBuffer A handle to a statically allocated Stack buffer for thie idle task
|
||||
* @param pulTimerTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
|
||||
*/
|
||||
void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer,
|
||||
StackType_t ** ppxTimerTaskStackBuffer,
|
||||
configSTACK_DEPTH_TYPE * puxTimerTaskStackSize );
|
||||
uint32_t * pulTimerTaskStackSize );
|
||||
|
||||
#endif
|
||||
|
||||
#if ( configUSE_DAEMON_TASK_STARTUP_HOOK != 0 )
|
||||
|
||||
/**
|
||||
* timers.h
|
||||
* @code{c}
|
||||
* void vApplicationDaemonTaskStartupHook( void );
|
||||
* @endcode
|
||||
*
|
||||
* This hook function is called form the timer task once when the task starts running.
|
||||
*/
|
||||
/* MISRA Ref 8.6.1 [External linkage] */
|
||||
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-86 */
|
||||
/* coverity[misra_c_2012_rule_8_6_violation] */
|
||||
void vApplicationDaemonTaskStartupHook( void );
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This function resets the internal state of the timer module. It must be called
|
||||
* by the application before restarting the scheduler.
|
||||
*/
|
||||
void vTimerResetState( void ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
|||
66
list.c
66
list.c
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -37,10 +35,11 @@
|
|||
#include "FreeRTOS.h"
|
||||
#include "list.h"
|
||||
|
||||
/* The MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be
|
||||
/* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
|
||||
* because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be
|
||||
* defined for the header files above, but not in this file, in order to
|
||||
* generate the correct privileged Vs unprivileged linkage and placement. */
|
||||
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
|
||||
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* PUBLIC LIST API documented in list.h
|
||||
|
|
@ -48,14 +47,10 @@
|
|||
|
||||
void vListInitialise( List_t * const pxList )
|
||||
{
|
||||
traceENTER_vListInitialise( pxList );
|
||||
|
||||
/* The list structure contains a list item which is used to mark the
|
||||
* end of the list. To initialise the list the list end is inserted
|
||||
* as the only list entry. */
|
||||
pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );
|
||||
|
||||
listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( &( pxList->xListEnd ) );
|
||||
pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
|
||||
|
||||
/* The list end value is the highest possible value in the list to
|
||||
* ensure it remains at the end of the list. */
|
||||
|
|
@ -63,17 +58,8 @@ void vListInitialise( List_t * const pxList )
|
|||
|
||||
/* The list end next and previous pointers point to itself so we know
|
||||
* when the list is empty. */
|
||||
pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );
|
||||
pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );
|
||||
|
||||
/* Initialize the remaining fields of xListEnd when it is a proper ListItem_t */
|
||||
#if ( configUSE_MINI_LIST_ITEM == 0 )
|
||||
{
|
||||
pxList->xListEnd.pvOwner = NULL;
|
||||
pxList->xListEnd.pxContainer = NULL;
|
||||
listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( &( pxList->xListEnd ) );
|
||||
}
|
||||
#endif
|
||||
pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
|
||||
pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
|
||||
|
||||
pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
|
||||
|
||||
|
|
@ -81,15 +67,11 @@ void vListInitialise( List_t * const pxList )
|
|||
* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
|
||||
listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
|
||||
|
||||
traceRETURN_vListInitialise();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vListInitialiseItem( ListItem_t * const pxItem )
|
||||
{
|
||||
traceENTER_vListInitialiseItem( pxItem );
|
||||
|
||||
/* Make sure the list item is not recorded as being on a list. */
|
||||
pxItem->pxContainer = NULL;
|
||||
|
||||
|
|
@ -97,8 +79,6 @@ void vListInitialiseItem( ListItem_t * const pxItem )
|
|||
* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
|
||||
listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
|
||||
|
||||
traceRETURN_vListInitialiseItem();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -107,8 +87,6 @@ void vListInsertEnd( List_t * const pxList,
|
|||
{
|
||||
ListItem_t * const pxIndex = pxList->pxIndex;
|
||||
|
||||
traceENTER_vListInsertEnd( pxList, pxNewListItem );
|
||||
|
||||
/* Only effective when configASSERT() is also defined, these tests may catch
|
||||
* the list data structures being overwritten in memory. They will not catch
|
||||
* data errors caused by incorrect configuration or use of FreeRTOS. */
|
||||
|
|
@ -130,9 +108,7 @@ void vListInsertEnd( List_t * const pxList,
|
|||
/* Remember which list the item is in. */
|
||||
pxNewListItem->pxContainer = pxList;
|
||||
|
||||
( pxList->uxNumberOfItems ) = ( UBaseType_t ) ( pxList->uxNumberOfItems + 1U );
|
||||
|
||||
traceRETURN_vListInsertEnd();
|
||||
( pxList->uxNumberOfItems )++;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -142,8 +118,6 @@ void vListInsert( List_t * const pxList,
|
|||
ListItem_t * pxIterator;
|
||||
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
|
||||
|
||||
traceENTER_vListInsert( pxList, pxNewListItem );
|
||||
|
||||
/* Only effective when configASSERT() is also defined, these tests may catch
|
||||
* the list data structures being overwritten in memory. They will not catch
|
||||
* data errors caused by incorrect configuration or use of FreeRTOS. */
|
||||
|
|
@ -166,7 +140,7 @@ void vListInsert( List_t * const pxList,
|
|||
{
|
||||
/* *** NOTE ***********************************************************
|
||||
* If you find your application is crashing here then likely causes are
|
||||
* listed below. In addition see https://www.freertos.org/Why-FreeRTOS/FAQs for
|
||||
* listed below. In addition see https://www.FreeRTOS.org/FAQHelp.html for
|
||||
* more tips, and ensure configASSERT() is defined!
|
||||
* https://www.FreeRTOS.org/a00110.html#configASSERT
|
||||
*
|
||||
|
|
@ -184,17 +158,12 @@ void vListInsert( List_t * const pxList,
|
|||
* 4) Using a queue or semaphore before it has been initialised or
|
||||
* before the scheduler has been started (are interrupts firing
|
||||
* before vTaskStartScheduler() has been called?).
|
||||
* 5) If the FreeRTOS port supports interrupt nesting then ensure that
|
||||
* the priority of the tick interrupt is at or below
|
||||
* configMAX_SYSCALL_INTERRUPT_PRIORITY.
|
||||
**********************************************************************/
|
||||
|
||||
for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext )
|
||||
for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
|
||||
{
|
||||
/* There is nothing to do here, just iterating to the wanted
|
||||
* insertion position.
|
||||
* IF YOU FIND YOUR CODE STUCK HERE, SEE THE NOTE JUST ABOVE.
|
||||
*/
|
||||
* insertion position. */
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -207,21 +176,16 @@ void vListInsert( List_t * const pxList,
|
|||
* item later. */
|
||||
pxNewListItem->pxContainer = pxList;
|
||||
|
||||
( pxList->uxNumberOfItems ) = ( UBaseType_t ) ( pxList->uxNumberOfItems + 1U );
|
||||
|
||||
traceRETURN_vListInsert();
|
||||
( pxList->uxNumberOfItems )++;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
|
||||
{
|
||||
/* The list item knows which list it is in. Obtain the list from the list
|
||||
* item. */
|
||||
List_t * const pxList = pxItemToRemove->pxContainer;
|
||||
|
||||
traceENTER_uxListRemove( pxItemToRemove );
|
||||
|
||||
pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
|
||||
pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
|
||||
|
||||
|
|
@ -239,9 +203,7 @@ UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
|
|||
}
|
||||
|
||||
pxItemToRemove->pxContainer = NULL;
|
||||
( pxList->uxNumberOfItems ) = ( UBaseType_t ) ( pxList->uxNumberOfItems - 1U );
|
||||
|
||||
traceRETURN_uxListRemove( pxList->uxNumberOfItems );
|
||||
( pxList->uxNumberOfItems )--;
|
||||
|
||||
return pxList->uxNumberOfItems;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +0,0 @@
|
|||
name : "FreeRTOS-Kernel"
|
||||
version: "V11.0.1+"
|
||||
description: "FreeRTOS Kernel."
|
||||
license: "MIT"
|
||||
|
|
@ -1,11 +1,10 @@
|
|||
This directory tree contains the master copy of the FreeRTOS Armv8-M and
|
||||
Armv8.1-M ports.
|
||||
This directory tree contains the master copy of the FreeeRTOS Cortex-M33 port.
|
||||
Do not use the files located here! These file are copied into separate
|
||||
FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NNN directories prior to each
|
||||
FreeRTOS/Source/portable/[compiler]/ARM_CM33_NNN directories prior to each
|
||||
FreeRTOS release.
|
||||
|
||||
If your Armv8-M and Armv8.1-M application uses TrustZone then use the files from the
|
||||
FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85] directories.
|
||||
If your Cortex-M33 application uses TrustZone then use the files from the
|
||||
FreeRTOS/Source/portable/[compiler]/ARM_CM33 directories.
|
||||
|
||||
If your Armv8-M and Armv8.1-M application does not use TrustZone then use the files from
|
||||
the FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NTZ directories.
|
||||
If your Cortex-M33 application does not use TrustZone then use the files from
|
||||
the FreeRTOS/Source/portable/[compiler]/ARM_CM33_NTZ directories.
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
#/*
|
||||
# * FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
# * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
# *
|
||||
# * SPDX-License-Identifier: MIT
|
||||
# * FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
# * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
# *
|
||||
# * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
# * this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,6 +22,7 @@
|
|||
# * https://www.FreeRTOS.org
|
||||
# * https://github.com/FreeRTOS
|
||||
# *
|
||||
# * 1 tab == 4 spaces!
|
||||
# */
|
||||
|
||||
import os
|
||||
|
|
@ -33,121 +32,51 @@ _THIS_FILE_DIRECTORY_ = os.path.dirname(os.path.realpath(__file__))
|
|||
_FREERTOS_PORTABLE_DIRECTORY_ = os.path.dirname(_THIS_FILE_DIRECTORY_)
|
||||
|
||||
_COMPILERS_ = ['GCC', 'IAR']
|
||||
_ARCH_NS_ = ['ARM_CM85', 'ARM_CM85_NTZ', 'ARM_CM55', 'ARM_CM55_NTZ', 'ARM_CM35P', 'ARM_CM35P_NTZ', 'ARM_CM33', 'ARM_CM33_NTZ', 'ARM_CM23', 'ARM_CM23_NTZ']
|
||||
_ARCH_S_ = ['ARM_CM85', 'ARM_CM55', 'ARM_CM35P', 'ARM_CM33', 'ARM_CM23']
|
||||
_ARCH_NS_ = ['ARM_CM33', 'ARM_CM33_NTZ', 'ARM_CM23', 'ARM_CM23_NTZ']
|
||||
_ARCH_S_ = ['ARM_CM33', 'ARM_CM23']
|
||||
|
||||
# Files to be compiled in the Secure Project
|
||||
_SECURE_COMMON_FILE_PATHS_ = [
|
||||
_SUPPORTED_CONFIGS_ = {
|
||||
'GCC' : ['ARM_CM33', 'ARM_CM33_NTZ', 'ARM_CM23', 'ARM_CM23_NTZ'],
|
||||
'IAR' : ['ARM_CM33', 'ARM_CM33_NTZ', 'ARM_CM23', 'ARM_CM23_NTZ']
|
||||
}
|
||||
|
||||
# Files to be complied in the Secure Project
|
||||
_SECURE_FILE_PATHS_ = [
|
||||
os.path.join('secure', 'context'),
|
||||
os.path.join('secure', 'context', 'portable', '_COMPILER_ARCH_'),
|
||||
os.path.join('secure', 'heap'),
|
||||
os.path.join('secure', 'init'),
|
||||
os.path.join('secure', 'macros')
|
||||
]
|
||||
|
||||
_SECURE_PORTABLE_FILE_PATHS_ = {
|
||||
'GCC':{
|
||||
'ARM_CM23' :[os.path.join('secure', 'context', 'portable', 'GCC', 'ARM_CM23')],
|
||||
'ARM_CM33' :[os.path.join('secure', 'context', 'portable', 'GCC', 'ARM_CM33')],
|
||||
'ARM_CM35P':[os.path.join('secure', 'context', 'portable', 'GCC', 'ARM_CM33')],
|
||||
'ARM_CM55' :[os.path.join('secure', 'context', 'portable', 'GCC', 'ARM_CM33')],
|
||||
'ARM_CM85' :[os.path.join('secure', 'context', 'portable', 'GCC', 'ARM_CM33')]
|
||||
},
|
||||
'IAR':{
|
||||
'ARM_CM23' :[os.path.join('secure', 'context', 'portable', 'IAR', 'ARM_CM23')],
|
||||
'ARM_CM33' :[os.path.join('secure', 'context', 'portable', 'IAR', 'ARM_CM33')],
|
||||
'ARM_CM35P':[os.path.join('secure', 'context', 'portable', 'IAR', 'ARM_CM33')],
|
||||
'ARM_CM55' :[os.path.join('secure', 'context', 'portable', 'IAR', 'ARM_CM33')],
|
||||
'ARM_CM85' :[os.path.join('secure', 'context', 'portable', 'IAR', 'ARM_CM33')]
|
||||
}
|
||||
}
|
||||
|
||||
# Files to be compiled in the Non-Secure Project
|
||||
_NONSECURE_COMMON_FILE_PATHS_ = [
|
||||
'non_secure'
|
||||
# Files to be complied in the Non-Secure Project
|
||||
_NONSECURE_FILE_PATHS_ = [
|
||||
'non_secure',
|
||||
os.path.join('non_secure', 'portable', '_COMPILER_ARCH_')
|
||||
]
|
||||
|
||||
_NONSECURE_PORTABLE_FILE_PATHS_ = {
|
||||
'GCC':{
|
||||
'ARM_CM23' : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM23')],
|
||||
'ARM_CM23_NTZ' : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM23_NTZ')],
|
||||
'ARM_CM33' : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33')],
|
||||
'ARM_CM33_NTZ' : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ')],
|
||||
'ARM_CM35P' : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'portasm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'mpu_wrappers_v2_asm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM35P', 'portmacro.h')],
|
||||
'ARM_CM35P_NTZ' : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'portasm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM35P', 'portmacro.h')],
|
||||
'ARM_CM55' : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'portasm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'mpu_wrappers_v2_asm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM55', 'portmacro.h')],
|
||||
'ARM_CM55_NTZ' : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'portasm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM55', 'portmacro.h')],
|
||||
'ARM_CM85' : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'portasm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'mpu_wrappers_v2_asm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM85', 'portmacro.h')],
|
||||
'ARM_CM85_NTZ' : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'portasm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.c'),
|
||||
os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM85', 'portmacro.h')]
|
||||
},
|
||||
'IAR':{
|
||||
'ARM_CM23' : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM23')],
|
||||
'ARM_CM23_NTZ' : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM23_NTZ')],
|
||||
'ARM_CM33' : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33')],
|
||||
'ARM_CM33_NTZ' : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ')],
|
||||
'ARM_CM35P' : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'portasm.s'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'mpu_wrappers_v2_asm.S'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM35P', 'portmacro.h')],
|
||||
'ARM_CM35P_NTZ' : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'portasm.s'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.S'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM35P', 'portmacro.h')],
|
||||
'ARM_CM55' : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'portasm.s'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'mpu_wrappers_v2_asm.S'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM55', 'portmacro.h')],
|
||||
'ARM_CM55_NTZ' : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'portasm.s'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.S'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM55', 'portmacro.h')],
|
||||
'ARM_CM85' : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'portasm.s'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'mpu_wrappers_v2_asm.S'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM85', 'portmacro.h')],
|
||||
'ARM_CM85_NTZ' : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'portasm.s'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.S'),
|
||||
os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM85', 'portmacro.h')]
|
||||
},
|
||||
}
|
||||
|
||||
def is_supported_config(compiler, arch):
|
||||
return arch in _SUPPORTED_CONFIGS_[compiler]
|
||||
|
||||
|
||||
def copy_files_in_dir(src_abs_path, dst_abs_path):
|
||||
if os.path.isfile(src_abs_path):
|
||||
print('Src: {}'.format(src_abs_path))
|
||||
print('Dst: {}\n'.format(dst_abs_path))
|
||||
shutil.copy2(src_abs_path, dst_abs_path)
|
||||
else:
|
||||
for src_file in os.listdir(src_abs_path):
|
||||
src_file_abs_path = os.path.join(src_abs_path, src_file)
|
||||
if os.path.isfile(src_file_abs_path) and src_file != 'ReadMe.txt':
|
||||
if not os.path.exists(dst_abs_path):
|
||||
os.makedirs(dst_abs_path)
|
||||
print('Src: {}'.format(src_file_abs_path))
|
||||
print('Dst: {}\n'.format(dst_abs_path))
|
||||
print('Copying {}...'.format(os.path.basename(src_file_abs_path)))
|
||||
shutil.copy2(src_file_abs_path, dst_abs_path)
|
||||
|
||||
|
||||
def copy_common_files_for_compiler_and_arch(compiler, arch, src_paths, dst_path):
|
||||
def copy_files_for_compiler_and_arch(compiler, arch, src_paths, dst_path):
|
||||
_COMPILER_ARCH_ = os.path.join(compiler, arch)
|
||||
for src_path in src_paths:
|
||||
src_path_sanitized = src_path.replace('_COMPILER_ARCH_', _COMPILER_ARCH_ )
|
||||
|
||||
src_abs_path = os.path.join(_THIS_FILE_DIRECTORY_, src_path)
|
||||
dst_abs_path = os.path.join(_FREERTOS_PORTABLE_DIRECTORY_, compiler, arch, dst_path)
|
||||
|
||||
copy_files_in_dir(src_abs_path, dst_abs_path)
|
||||
|
||||
|
||||
def copy_portable_files_for_compiler_and_arch(compiler, arch, src_paths, dst_path):
|
||||
for src_path in src_paths[compiler][arch]:
|
||||
|
||||
src_abs_path = os.path.join(_THIS_FILE_DIRECTORY_, src_path)
|
||||
dst_abs_path = os.path.join(_FREERTOS_PORTABLE_DIRECTORY_, compiler, arch, dst_path)
|
||||
src_abs_path = os.path.join(_THIS_FILE_DIRECTORY_, src_path_sanitized)
|
||||
dst_abs_path = os.path.join(_FREERTOS_PORTABLE_DIRECTORY_, _COMPILER_ARCH_, dst_path)
|
||||
|
||||
copy_files_in_dir(src_abs_path, dst_abs_path)
|
||||
|
||||
|
|
@ -156,14 +85,14 @@ def copy_files():
|
|||
# Copy Secure Files
|
||||
for compiler in _COMPILERS_:
|
||||
for arch in _ARCH_S_:
|
||||
copy_common_files_for_compiler_and_arch(compiler, arch, _SECURE_COMMON_FILE_PATHS_, 'secure')
|
||||
copy_portable_files_for_compiler_and_arch(compiler, arch, _SECURE_PORTABLE_FILE_PATHS_, 'secure')
|
||||
if is_supported_config(compiler, arch):
|
||||
copy_files_for_compiler_and_arch(compiler, arch, _SECURE_FILE_PATHS_, 'secure')
|
||||
|
||||
# Copy Non-Secure Files
|
||||
for compiler in _COMPILERS_:
|
||||
for arch in _ARCH_NS_:
|
||||
copy_common_files_for_compiler_and_arch(compiler, arch, _NONSECURE_COMMON_FILE_PATHS_, 'non_secure')
|
||||
copy_portable_files_for_compiler_and_arch(compiler, arch, _NONSECURE_PORTABLE_FILE_PATHS_, 'non_secure')
|
||||
if is_supported_config(compiler, arch):
|
||||
copy_files_for_compiler_and_arch(compiler, arch, _NONSECURE_FILE_PATHS_, 'non_secure')
|
||||
|
||||
|
||||
def main():
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
This directory tree contains the master copy of the FreeRTOS Armv8-M and
|
||||
Armv8.1-M ports.
|
||||
This directory tree contains the master copy of the FreeeRTOS Cortex-M33 port.
|
||||
Do not use the files located here! These file are copied into separate
|
||||
FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NNN directories prior to
|
||||
each FreeRTOS release.
|
||||
FreeRTOS/Source/portable/[compiler]/ARM_CM33_NNN directories prior to each
|
||||
FreeRTOS release.
|
||||
|
||||
If your Armv8-M/Armv8.1-M application uses TrustZone then use the files from the
|
||||
FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85] directories.
|
||||
If your Cortex-M33 application uses TrustZone then use the files from the
|
||||
FreeRTOS/Source/portable/[compiler]/ARM_CM33 directories.
|
||||
|
||||
If your Cortex-M33 application does not use TrustZone then use the files from
|
||||
the FreeRTOS/Source/portable/[compiler]/ARM_CM33_NTZ directories.
|
||||
|
||||
If your Armv8-M/Armv8.1-M application does not use TrustZone then use the files from
|
||||
the FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NTZ directories.
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,6 +22,7 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
|
|
@ -36,9 +35,6 @@
|
|||
/* Portasm includes. */
|
||||
#include "portasm.h"
|
||||
|
||||
/* System call numbers includes. */
|
||||
#include "mpu_syscall_numbers.h"
|
||||
|
||||
/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the
|
||||
* header files. */
|
||||
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
|
||||
|
|
@ -47,131 +43,99 @@
|
|||
#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
|
||||
#endif
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" program_mpu_first_task: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/
|
||||
" \n"
|
||||
" dmb \n" /* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" movs r3, #1 \n" /* r3 = 1. */
|
||||
" bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Disable MPU. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
" ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
" ldr r2, =0xe000edc0 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r1, [r2] \n" /* Program MAIR0. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
" ldr r1, =0xe000ed98 \n" /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
" \n"
|
||||
" movs r3, #4 \n" /* r3 = 4. */
|
||||
" str r3, [r1] \n" /* Program RNR = 4. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */
|
||||
" movs r3, #5 \n" /* r3 = 5. */
|
||||
" str r3, [r1] \n" /* Program RNR = 5. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */
|
||||
" movs r3, #6 \n" /* r3 = 6. */
|
||||
" str r3, [r1] \n" /* Program RNR = 6. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */
|
||||
" movs r3, #7 \n" /* r3 = 6. */
|
||||
" str r3, [r1] \n" /* Program RNR = 7. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */
|
||||
" \n"
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" movs r3, #1 \n" /* r3 = 1. */
|
||||
" orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Enable MPU. */
|
||||
" dsb \n" /* Force memory writes before continuing. */
|
||||
" \n"
|
||||
" restore_context_first_task: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/
|
||||
" ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */
|
||||
" \n"
|
||||
" restore_special_regs_first_task: \n"
|
||||
" subs r2, #20 \n"
|
||||
" ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */
|
||||
" subs r2, #20 \n"
|
||||
" msr psp, r3 \n"
|
||||
" msr control, r5 \n"
|
||||
" mov lr, r6 \n"
|
||||
" ldr r4, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" str r0, [r4] \n" /* Restore xSecureContext. */
|
||||
" \n"
|
||||
" restore_general_regs_first_task: \n"
|
||||
" subs r2, #32 \n"
|
||||
" ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */
|
||||
" stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */
|
||||
" ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */
|
||||
" stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */
|
||||
" subs r2, #48 \n"
|
||||
" ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */
|
||||
" mov r8, r4 \n" /* r8 = r4. */
|
||||
" mov r9, r5 \n" /* r9 = r5. */
|
||||
" mov r10, r6 \n" /* r10 = r6. */
|
||||
" mov r11, r7 \n" /* r11 = r7. */
|
||||
" subs r2, #32 \n"
|
||||
" ldmia r2!, {r4-r7} \n" /* Restore r4-r7. */
|
||||
" subs r2, #16 \n"
|
||||
" \n"
|
||||
" restore_context_done_first_task: \n"
|
||||
" str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
" bx lr \n"
|
||||
);
|
||||
}
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r3, [r2] \n"/* Read pxCurrentTCB. */
|
||||
" ldr r0, [r3] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
|
||||
" \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" dmb \n"/* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" movs r5, #1 \n"/* r5 = 1. */
|
||||
" bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
|
||||
" str r4, [r2] \n"/* Disable MPU. */
|
||||
" \n"
|
||||
" adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
|
||||
" ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */
|
||||
" ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r4, [r2] \n"/* Program MAIR0. */
|
||||
" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
" adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
|
||||
" movs r5, #4 \n"/* r5 = 4. */
|
||||
" str r5, [r2] \n"/* Program RNR = 4. */
|
||||
" ldmia r3!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */
|
||||
" ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r4!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */
|
||||
" movs r5, #5 \n"/* r5 = 5. */
|
||||
" str r5, [r2] \n"/* Program RNR = 5. */
|
||||
" ldmia r3!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */
|
||||
" ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r4!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */
|
||||
" movs r5, #6 \n"/* r5 = 6. */
|
||||
" str r5, [r2] \n"/* Program RNR = 6. */
|
||||
" ldmia r3!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */
|
||||
" ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r4!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */
|
||||
" movs r5, #7 \n"/* r5 = 7. */
|
||||
" str r5, [r2] \n"/* Program RNR = 7. */
|
||||
" ldmia r3!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */
|
||||
" ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r4!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */
|
||||
" \n"
|
||||
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" movs r5, #1 \n"/* r5 = 1. */
|
||||
" orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
|
||||
" str r4, [r2] \n"/* Enable MPU. */
|
||||
" dsb \n"/* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
|
||||
" ldr r5, xSecureContextConst2 \n"
|
||||
" str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */
|
||||
" msr psplim, r2 \n"/* Set this task's PSPLIM value. */
|
||||
" msr control, r3 \n"/* Set this task's CONTROL value. */
|
||||
" adds r0, #32 \n"/* Discard everything up to r0. */
|
||||
" msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
|
||||
" isb \n"
|
||||
" bx r4 \n"/* Finally, branch to EXC_RETURN. */
|
||||
#else /* configENABLE_MPU */
|
||||
" ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
|
||||
" ldr r4, =xSecureContext \n"
|
||||
" ldr r4, xSecureContextConst2 \n"
|
||||
" str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */
|
||||
" msr psplim, r2 \n"/* Set this task's PSPLIM value. */
|
||||
" movs r1, #2 \n"/* r1 = 2. */
|
||||
" msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */
|
||||
" adds r0, #32 \n"/* Discard everything up to r0. */
|
||||
" msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
|
||||
" isb \n"
|
||||
" bx r3 \n"/* Finally, branch to EXC_RETURN. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"pxCurrentTCBConst2: .word pxCurrentTCB \n"
|
||||
"xSecureContextConst2: .word xSecureContext \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
"xMPUCTRLConst2: .word 0xe000ed94 \n"
|
||||
"xMAIR0Const2: .word 0xe000edc0 \n"
|
||||
"xRNRConst2: .word 0xe000ed98 \n"
|
||||
"xRBARConst2: .word 0xe000ed9c \n"
|
||||
#endif /* configENABLE_MPU */
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* r0 = CONTROL. */
|
||||
" movs r1, #1 \n"/* r1 = 1. */
|
||||
" tst r0, r1 \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
|
||||
|
|
@ -181,6 +145,8 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
|
|||
" running_privileged: \n"
|
||||
" movs r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
|
||||
" bx lr \n"/* Return. */
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
::: "r0", "r1", "memory"
|
||||
);
|
||||
}
|
||||
|
|
@ -190,8 +156,6 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* Read the CONTROL register. */
|
||||
" movs r1, #1 \n"/* r1 = 1. */
|
||||
" bics r0, r1 \n"/* Clear the bit 0. */
|
||||
|
|
@ -206,8 +170,6 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* r0 = CONTROL. */
|
||||
" movs r1, #1 \n"/* r1 = 1. */
|
||||
" orrs r0, r1 \n"/* r0 = r0 | r1. */
|
||||
|
|
@ -222,9 +184,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r0, =0xe000ed08 \n" /* Use the NVIC offset register to locate the stack. */
|
||||
" ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
|
||||
" ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
|
||||
" ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
|
||||
" msr msp, r0 \n"/* Set the MSP back to the start of the stack. */
|
||||
|
|
@ -233,6 +193,9 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
" isb \n"
|
||||
" svc %0 \n"/* System call to start the first task. */
|
||||
" nop \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"xVTORConst: .word 0xe000ed08 \n"
|
||||
::"i" ( portSVC_START_SCHEDULER ) : "memory"
|
||||
);
|
||||
}
|
||||
|
|
@ -242,8 +205,6 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, PRIMASK \n"
|
||||
" cpsid i \n"
|
||||
" bx lr \n"
|
||||
|
|
@ -256,8 +217,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" msr PRIMASK, r0 \n"
|
||||
" bx lr \n"
|
||||
::: "memory"
|
||||
|
|
@ -265,8 +224,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
|
|
@ -275,159 +232,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" .extern SecureContext_SaveContext \n"
|
||||
" .extern SecureContext_LoadContext \n"
|
||||
" \n"
|
||||
" ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/
|
||||
" ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */
|
||||
" \n"
|
||||
" cbz r0, save_ns_context \n" /* No secure context to save. */
|
||||
" save_s_context: \n"
|
||||
" push {r0-r2, lr} \n"
|
||||
" bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
" pop {r0-r3} \n" /* LR is now in r3. */
|
||||
" mov lr, r3 \n" /* Restore LR. */
|
||||
" \n"
|
||||
" save_ns_context: \n"
|
||||
" mov r3, lr \n" /* r3 = LR (EXC_RETURN). */
|
||||
" lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
|
||||
" \n"
|
||||
" save_general_regs: \n"
|
||||
" mrs r3, psp \n"
|
||||
" stmia r2!, {r4-r7} \n" /* Store r4-r7. */
|
||||
" mov r4, r8 \n" /* r4 = r8. */
|
||||
" mov r5, r9 \n" /* r5 = r9. */
|
||||
" mov r6, r10 \n" /* r6 = r10. */
|
||||
" mov r7, r11 \n" /* r7 = r11. */
|
||||
" stmia r2!, {r4-r7} \n" /* Store r8-r11. */
|
||||
" ldmia r3!, {r4-r7} \n" /* Copy half of the hardware saved context into r4-r7. */
|
||||
" stmia r2!, {r4-r7} \n" /* Store the hardware saved context. */
|
||||
" ldmia r3!, {r4-r7} \n" /* Copy rest half of the hardware saved context into r4-r7. */
|
||||
" stmia r2!, {r4-r7} \n" /* Store the hardware saved context. */
|
||||
" \n"
|
||||
" save_special_regs: \n"
|
||||
" mrs r3, psp \n" /* r3 = PSP. */
|
||||
" movs r4, #0 \n" /* r4 = 0. 0 is stored in the PSPLIM slot. */
|
||||
" mrs r5, control \n" /* r5 = CONTROL. */
|
||||
" mov r6, lr \n" /* r6 = LR. */
|
||||
" stmia r2!, {r0, r3-r6} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
|
||||
" str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */
|
||||
" \n"
|
||||
" select_next_task: \n"
|
||||
" cpsid i \n"
|
||||
" bl vTaskSwitchContext \n"
|
||||
" cpsie i \n"
|
||||
" \n"
|
||||
" program_mpu: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/
|
||||
" \n"
|
||||
" dmb \n" /* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" movs r3, #1 \n" /* r3 = 1. */
|
||||
" bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Disable MPU. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
" ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
" ldr r2, =0xe000edc0 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r1, [r2] \n" /* Program MAIR0. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
" ldr r1, =0xe000ed98 \n" /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
" \n"
|
||||
" movs r3, #4 \n" /* r3 = 4. */
|
||||
" str r3, [r1] \n" /* Program RNR = 4. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */
|
||||
" movs r3, #5 \n" /* r3 = 5. */
|
||||
" str r3, [r1] \n" /* Program RNR = 5. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */
|
||||
" movs r3, #6 \n" /* r3 = 6. */
|
||||
" str r3, [r1] \n" /* Program RNR = 6. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */
|
||||
" movs r3, #7 \n" /* r3 = 6. */
|
||||
" str r3, [r1] \n" /* Program RNR = 7. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */
|
||||
" \n"
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" movs r3, #1 \n" /* r3 = 1. */
|
||||
" orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Enable MPU. */
|
||||
" dsb \n" /* Force memory writes before continuing. */
|
||||
" \n"
|
||||
" restore_context: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/
|
||||
" ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */
|
||||
" \n"
|
||||
" restore_special_regs: \n"
|
||||
" subs r2, #20 \n"
|
||||
" ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */
|
||||
" subs r2, #20 \n"
|
||||
" msr psp, r3 \n"
|
||||
" msr control, r5 \n"
|
||||
" mov lr, r6 \n"
|
||||
" ldr r4, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" str r0, [r4] \n" /* Restore xSecureContext. */
|
||||
" cbz r0, restore_ns_context \n" /* No secure context to restore. */
|
||||
" \n"
|
||||
" restore_s_context: \n"
|
||||
" push {r1-r3, lr} \n"
|
||||
" bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
" pop {r1-r4} \n" /* LR is now in r4. */
|
||||
" mov lr, r4 \n"
|
||||
" \n"
|
||||
" restore_ns_context: \n"
|
||||
" mov r0, lr \n" /* r0 = LR (EXC_RETURN). */
|
||||
" lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
|
||||
" \n"
|
||||
" restore_general_regs: \n"
|
||||
" subs r2, #32 \n"
|
||||
" ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */
|
||||
" stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */
|
||||
" ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */
|
||||
" stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */
|
||||
" subs r2, #48 \n"
|
||||
" ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */
|
||||
" mov r8, r4 \n" /* r8 = r4. */
|
||||
" mov r9, r5 \n" /* r9 = r5. */
|
||||
" mov r10, r6 \n" /* r10 = r6. */
|
||||
" mov r11, r7 \n" /* r11 = r7. */
|
||||
" subs r2, #32 \n"
|
||||
" ldmia r2!, {r4-r7} \n" /* Restore r4-r7. */
|
||||
" subs r2, #16 \n"
|
||||
" \n"
|
||||
" restore_context_done: \n"
|
||||
" str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
" bx lr \n"
|
||||
);
|
||||
}
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" .extern SecureContext_SaveContext \n"
|
||||
" .extern SecureContext_LoadContext \n"
|
||||
" \n"
|
||||
" ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/
|
||||
" mrs r2, psp \n"/* Read PSP in r2. */
|
||||
" \n"
|
||||
|
|
@ -438,21 +245,46 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" mov lr, r3 \n"/* LR = r3. */
|
||||
" lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB. */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" subs r2, r2, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
" str r2, [r1] \n"/* Save the new top of stack in TCB. */
|
||||
" mrs r1, psplim \n"/* r1 = PSPLIM. */
|
||||
" mrs r3, control \n"/* r3 = CONTROL. */
|
||||
" mov r4, lr \n"/* r4 = LR/EXC_RETURN. */
|
||||
" stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
#else /* configENABLE_MPU */
|
||||
" subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
|
||||
" str r2, [r1] \n"/* Save the new top of stack in TCB. */
|
||||
" movs r1, #0 \n" /* r1 = 0. 0 is stored in the PSPLIM slot. */
|
||||
" mrs r1, psplim \n"/* r1 = PSPLIM. */
|
||||
" mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
|
||||
" stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" b select_next_task \n"
|
||||
" \n"
|
||||
" save_ns_context: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB. */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" subs r2, r2, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
|
||||
" str r2, [r1] \n"/* Save the new top of stack in TCB. */
|
||||
" adds r2, r2, #16 \n"/* r2 = r2 + 16. */
|
||||
" stmia r2!, {r4-r7} \n"/* Store the low registers that are not saved automatically. */
|
||||
" mov r4, r8 \n"/* r4 = r8. */
|
||||
" mov r5, r9 \n"/* r5 = r9. */
|
||||
" mov r6, r10 \n"/* r6 = r10. */
|
||||
" mov r7, r11 \n"/* r7 = r11. */
|
||||
" stmia r2!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */
|
||||
" mrs r1, psplim \n"/* r1 = PSPLIM. */
|
||||
" mrs r3, control \n"/* r3 = CONTROL. */
|
||||
" mov r4, lr \n"/* r4 = LR/EXC_RETURN. */
|
||||
" subs r2, r2, #48 \n"/* r2 = r2 - 48. */
|
||||
" stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
#else /* configENABLE_MPU */
|
||||
" subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
|
||||
" str r2, [r1] \n"/* Save the new top of stack in TCB. */
|
||||
" movs r1, #0 \n" /* r1 = 0. 0 is stored in the PSPLIM slot. */
|
||||
" mrs r1, psplim \n"/* r1 = PSPLIM. */
|
||||
" mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
|
||||
" stmia r2!, {r0, r1, r3-r7} \n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
|
||||
" mov r4, r8 \n"/* r4 = r8. */
|
||||
|
|
@ -460,22 +292,69 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" mov r6, r10 \n"/* r6 = r10. */
|
||||
" mov r7, r11 \n"/* r7 = r11. */
|
||||
" stmia r2!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
" select_next_task: \n"
|
||||
" cpsid i \n"
|
||||
" bl vTaskSwitchContext \n"
|
||||
" cpsie i \n"
|
||||
" \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB. */
|
||||
" ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
|
||||
" \n"
|
||||
" ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" dmb \n"/* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */
|
||||
" movs r5, #1 \n"/* r5 = 1. */
|
||||
" bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
|
||||
" str r4, [r3] \n"/* Disable MPU. */
|
||||
" \n"
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
" ldr r4, [r1] \n"/* r4 = *r1 i.e. r4 = MAIR0. */
|
||||
" ldr r3, xMAIR0Const \n"/* r3 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r4, [r3] \n"/* Program MAIR0. */
|
||||
" ldr r4, xRNRConst \n"/* r4 = 0xe000ed98 [Location of RNR]. */
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
" movs r5, #4 \n"/* r5 = 4. */
|
||||
" str r5, [r4] \n"/* Program RNR = 4. */
|
||||
" ldmia r1!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */
|
||||
" movs r5, #5 \n"/* r5 = 5. */
|
||||
" str r5, [r4] \n"/* Program RNR = 5. */
|
||||
" ldmia r1!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */
|
||||
" movs r5, #6 \n"/* r5 = 6. */
|
||||
" str r5, [r4] \n"/* Program RNR = 6. */
|
||||
" ldmia r1!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */
|
||||
" movs r5, #7 \n"/* r5 = 7. */
|
||||
" str r5, [r4] \n"/* Program RNR = 7. */
|
||||
" ldmia r1!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */
|
||||
" \n"
|
||||
" ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */
|
||||
" movs r5, #1 \n"/* r5 = 1. */
|
||||
" orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
|
||||
" str r4, [r3] \n"/* Enable MPU. */
|
||||
" dsb \n"/* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" ldmia r2!, {r0, r1, r3, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */
|
||||
" msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */
|
||||
" msr control, r3 \n"/* Restore the CONTROL register value for the task. */
|
||||
" mov lr, r4 \n"/* LR = r4. */
|
||||
" ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" str r0, [r3] \n"/* Restore the task's xSecureContext. */
|
||||
" cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB. */
|
||||
" push {r2, r4} \n"
|
||||
" bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
|
|
@ -485,6 +364,24 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
" msr psp, r2 \n"/* Remember the new top of stack for the task. */
|
||||
" bx lr \n"
|
||||
#else /* configENABLE_MPU */
|
||||
" ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
|
||||
" msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */
|
||||
" mov lr, r4 \n"/* LR = r4. */
|
||||
" ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" str r0, [r3] \n"/* Restore the task's xSecureContext. */
|
||||
" cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB. */
|
||||
" push {r2, r4} \n"
|
||||
" bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
" pop {r2, r4} \n"
|
||||
" mov lr, r4 \n"/* LR = r4. */
|
||||
" lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
" msr psp, r2 \n"/* Remember the new top of stack for the task. */
|
||||
" bx lr \n"
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
" restore_ns_context: \n"
|
||||
" adds r2, r2, #16 \n"/* Move to the high registers. */
|
||||
|
|
@ -497,86 +394,46 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" subs r2, r2, #32 \n"/* Go back to the low registers. */
|
||||
" ldmia r2!, {r4-r7} \n"/* Restore the low registers that are not automatically restored. */
|
||||
" bx lr \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"pxCurrentTCBConst: .word pxCurrentTCB \n"
|
||||
"xSecureContextConst: .word xSecureContext \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
"xMPUCTRLConst: .word 0xe000ed94 \n"
|
||||
"xMAIR0Const: .word 0xe000edc0 \n"
|
||||
"xRNRConst: .word 0xe000ed98 \n"
|
||||
"xRBARConst: .word 0xe000ed9c \n"
|
||||
#endif /* configENABLE_MPU */
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
|
||||
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
".syntax unified \n"
|
||||
".extern vPortSVCHandler_C \n"
|
||||
".extern vSystemCallEnter \n"
|
||||
".extern vSystemCallExit \n"
|
||||
" \n"
|
||||
"movs r0, #4 \n"
|
||||
"mov r1, lr \n"
|
||||
"tst r0, r1 \n"
|
||||
"beq stack_on_msp \n"
|
||||
"stack_on_psp: \n"
|
||||
" mrs r0, psp \n"
|
||||
" b route_svc \n"
|
||||
"stack_on_msp: \n"
|
||||
" mrs r0, msp \n"
|
||||
" b route_svc \n"
|
||||
" \n"
|
||||
"route_svc: \n"
|
||||
" ldr r3, [r0, #24] \n"
|
||||
" subs r3, #2 \n"
|
||||
" ldrb r2, [r3, #0] \n"
|
||||
" cmp r2, %0 \n"
|
||||
" blt system_call_enter \n"
|
||||
" cmp r2, %1 \n"
|
||||
" beq system_call_exit \n"
|
||||
" b vPortSVCHandler_C \n"
|
||||
" \n"
|
||||
"system_call_enter: \n"
|
||||
" b vSystemCallEnter \n"
|
||||
"system_call_exit: \n"
|
||||
" b vSystemCallExit \n"
|
||||
" \n"
|
||||
: /* No outputs. */
|
||||
: "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT )
|
||||
: "r0", "r1", "r2", "r3", "memory"
|
||||
);
|
||||
}
|
||||
|
||||
#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" movs r0, #4 \n"
|
||||
" mov r1, lr \n"
|
||||
" tst r0, r1 \n"
|
||||
" beq stacking_used_msp \n"
|
||||
" mrs r0, psp \n"
|
||||
" ldr r2, =vPortSVCHandler_C \n"
|
||||
" ldr r2, svchandler_address_const \n"
|
||||
" bx r2 \n"
|
||||
" stacking_used_msp: \n"
|
||||
" mrs r0, msp \n"
|
||||
" ldr r2, =vPortSVCHandler_C \n"
|
||||
" ldr r2, svchandler_address_const \n"
|
||||
" bx r2 \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"svchandler_address_const: .word vPortSVCHandler_C \n"
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (( naked )) */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" svc %0 \n"/* Secure context is allocated in the supervisor call. */
|
||||
" bx lr \n"/* Return. */
|
||||
::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
|
||||
|
|
@ -588,8 +445,6 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */
|
||||
" ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */
|
||||
" cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,16 +22,15 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
|
@ -45,41 +42,271 @@
|
|||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef configENABLE_FPU
|
||||
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
|
||||
#endif /* configENABLE_FPU */
|
||||
|
||||
#ifndef configENABLE_MPU
|
||||
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#ifndef configENABLE_TRUSTZONE
|
||||
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Type definitions.
|
||||
*/
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* Architecture specifics.
|
||||
*/
|
||||
#define portARCH_NAME "Cortex-M23"
|
||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||
#define portARMV8M_MINOR_VERSION 0
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portNOP()
|
||||
#define portINLINE __inline
|
||||
#ifndef portFORCE_INLINE
|
||||
#define portFORCE_INLINE inline __attribute__( ( always_inline ) )
|
||||
#endif
|
||||
#define portHAS_STACK_OVERFLOW_CHECKING 1
|
||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ARMv8-M common port configurations. */
|
||||
#include "portmacrocommon.h"
|
||||
/**
|
||||
* @brief Extern declarations.
|
||||
*/
|
||||
extern BaseType_t xPortIsInsideInterrupt( void );
|
||||
|
||||
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
|
||||
extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
|
||||
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
#error 16 MPU regions are not yet supported for this port.
|
||||
#endif
|
||||
/**
|
||||
* @brief MPU specific constants.
|
||||
*/
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
#define portUSING_MPU_WRAPPERS 1
|
||||
#define portPRIVILEGE_BIT ( 0x80000000UL )
|
||||
#else
|
||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#ifndef configENABLE_MVE
|
||||
#define configENABLE_MVE 0
|
||||
#elif ( configENABLE_MVE != 0 )
|
||||
#error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M23.
|
||||
#endif
|
||||
|
||||
/* MPU regions. */
|
||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||
#define portUNPRIVILEGED_FLASH_REGION ( 1UL )
|
||||
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
|
||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||
#define portSTACK_REGION ( 4UL )
|
||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||
|
||||
/* Device memory attributes used in MPU_MAIR registers.
|
||||
*
|
||||
* 8-bit values encoded as follows:
|
||||
* Bit[7:4] - 0000 - Device Memory
|
||||
* Bit[3:2] - 00 --> Device-nGnRnE
|
||||
* 01 --> Device-nGnRE
|
||||
* 10 --> Device-nGRE
|
||||
* 11 --> Device-GRE
|
||||
* Bit[1:0] - 00, Reserved.
|
||||
*/
|
||||
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
|
||||
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
|
||||
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
|
||||
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
|
||||
|
||||
/* Normal memory attributes used in MPU_MAIR registers. */
|
||||
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
|
||||
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
|
||||
|
||||
/* Attributes used in MPU_RBAR registers. */
|
||||
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
|
||||
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
|
||||
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
|
||||
|
||||
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
|
||||
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
|
||||
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
|
||||
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
|
||||
|
||||
#define portMPU_REGION_EXECUTE_NEVER ( 1UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Settings to define an MPU region.
|
||||
*/
|
||||
typedef struct MPURegionSettings
|
||||
{
|
||||
uint32_t ulRBAR; /**< RBAR for the region. */
|
||||
uint32_t ulRLAR; /**< RLAR for the region. */
|
||||
} MPURegionSettings_t;
|
||||
|
||||
/**
|
||||
* @brief MPU settings as stored in the TCB.
|
||||
*/
|
||||
typedef struct MPU_SETTINGS
|
||||
{
|
||||
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
|
||||
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
|
||||
} xMPU_SETTINGS;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief SVC numbers.
|
||||
*/
|
||||
#define portSVC_ALLOCATE_SECURE_CONTEXT 0
|
||||
#define portSVC_FREE_SECURE_CONTEXT 1
|
||||
#define portSVC_START_SCHEDULER 2
|
||||
#define portSVC_RAISE_PRIVILEGE 3
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Scheduler utilities.
|
||||
*/
|
||||
#define portYIELD() vPortYield()
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Critical section management.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
|
||||
#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
|
||||
#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Tickless idle/low power functionality.
|
||||
*/
|
||||
#ifndef portSUPPRESS_TICKS_AND_SLEEP
|
||||
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Task function macros as described on the FreeRTOS.org WEB site.
|
||||
*/
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
|
||||
/**
|
||||
* @brief Allocate a secure context for the task.
|
||||
*
|
||||
* Tasks are not created with a secure context. Any task that is going to call
|
||||
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
|
||||
* secure context before it calls any secure function.
|
||||
*
|
||||
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
|
||||
*/
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
|
||||
|
||||
/**
|
||||
* @brief Called when a task is deleted to delete the task's secure context,
|
||||
* if it has one.
|
||||
*
|
||||
* @param[in] pxTCB The TCB of the task being deleted.
|
||||
*/
|
||||
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
|
||||
#else
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
|
||||
#define portCLEAN_UP_TCB( pxTCB )
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
/**
|
||||
* @brief Checks whether or not the processor is privileged.
|
||||
*
|
||||
* @return 1 if the processor is already privileged, 0 otherwise.
|
||||
*/
|
||||
#define portIS_PRIVILEGED() xIsPrivileged()
|
||||
|
||||
/**
|
||||
* @brief Raise an SVC request to raise privilege.
|
||||
*
|
||||
* The SVC handler checks that the SVC was raised from a system call and only
|
||||
* then it raises the privilege. If this is called from any other place,
|
||||
* the privilege is not raised.
|
||||
*/
|
||||
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
|
||||
|
||||
/**
|
||||
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
|
||||
* register.
|
||||
*/
|
||||
#define portRESET_PRIVILEGE() vResetPrivilege()
|
||||
#else
|
||||
#define portIS_PRIVILEGED()
|
||||
#define portRAISE_PRIVILEGE()
|
||||
#define portRESET_PRIVILEGE()
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Barriers.
|
||||
*/
|
||||
#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,6 +22,7 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
|
|
@ -36,9 +35,6 @@
|
|||
/* Portasm includes. */
|
||||
#include "portasm.h"
|
||||
|
||||
/* System call numbers includes. */
|
||||
#include "mpu_syscall_numbers.h"
|
||||
|
||||
/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the
|
||||
* header files. */
|
||||
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
|
||||
|
|
@ -47,133 +43,94 @@
|
|||
#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
|
||||
#endif
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" program_mpu_first_task: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/
|
||||
" \n"
|
||||
" dmb \n" /* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" movs r3, #1 \n" /* r3 = 1. */
|
||||
" bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Disable MPU. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
" ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
" ldr r2, =0xe000edc0 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r1, [r2] \n" /* Program MAIR0. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
" ldr r1, =0xe000ed98 \n" /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
" \n"
|
||||
" movs r3, #4 \n" /* r3 = 4. */
|
||||
" str r3, [r1] \n" /* Program RNR = 4. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */
|
||||
" movs r3, #5 \n" /* r3 = 5. */
|
||||
" str r3, [r1] \n" /* Program RNR = 5. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */
|
||||
" movs r3, #6 \n" /* r3 = 6. */
|
||||
" str r3, [r1] \n" /* Program RNR = 6. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */
|
||||
" movs r3, #7 \n" /* r3 = 6. */
|
||||
" str r3, [r1] \n" /* Program RNR = 7. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */
|
||||
" \n"
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" movs r3, #1 \n" /* r3 = 1. */
|
||||
" orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Enable MPU. */
|
||||
" dsb \n" /* Force memory writes before continuing. */
|
||||
" \n"
|
||||
" restore_context_first_task: \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/
|
||||
" ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */
|
||||
" \n"
|
||||
" restore_special_regs_first_task: \n"
|
||||
" subs r1, #16 \n"
|
||||
" ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
|
||||
" subs r1, #16 \n"
|
||||
" msr psp, r2 \n"
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
" msr psplim, r3 \n"
|
||||
#endif
|
||||
" msr control, r4 \n"
|
||||
" mov lr, r5 \n"
|
||||
" \n"
|
||||
" restore_general_regs_first_task: \n"
|
||||
" subs r1, #32 \n"
|
||||
" ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */
|
||||
" stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */
|
||||
" ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */
|
||||
" stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */
|
||||
" subs r1, #48 \n"
|
||||
" ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */
|
||||
" mov r8, r4 \n" /* r8 = r4. */
|
||||
" mov r9, r5 \n" /* r9 = r5. */
|
||||
" mov r10, r6 \n" /* r10 = r6. */
|
||||
" mov r11, r7 \n" /* r11 = r7. */
|
||||
" subs r1, #32 \n"
|
||||
" ldmia r1!, {r4-r7} \n" /* Restore r4-r7. */
|
||||
" subs r1, #16 \n"
|
||||
" \n"
|
||||
" restore_context_done_first_task: \n"
|
||||
" str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
" bx lr \n"
|
||||
);
|
||||
}
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r2] \n"/* Read pxCurrentTCB. */
|
||||
" ldr r0, [r1] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
|
||||
" \n"
|
||||
" ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" dmb \n"/* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r3, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" movs r4, #1 \n"/* r4 = 1. */
|
||||
" bics r3, r4 \n"/* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
|
||||
" str r3, [r2] \n"/* Disable MPU. */
|
||||
" \n"
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
" ldr r4, [r1] \n"/* r4 = *r1 i.e. r4 = MAIR0. */
|
||||
" ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r4, [r2] \n"/* Program MAIR0. */
|
||||
" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
" movs r4, #4 \n"/* r4 = 4. */
|
||||
" str r4, [r2] \n"/* Program RNR = 4. */
|
||||
" ldmia r1!, {r5,r6} \n"/* Read first set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst2 \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r5,r6} \n"/* Write first set of RBAR/RLAR registers. */
|
||||
" movs r4, #5 \n"/* r4 = 5. */
|
||||
" str r4, [r2] \n"/* Program RNR = 5. */
|
||||
" ldmia r1!, {r5,r6} \n"/* Read second set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst2 \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r5,r6} \n"/* Write second set of RBAR/RLAR registers. */
|
||||
" movs r4, #6 \n"/* r4 = 6. */
|
||||
" str r4, [r2] \n"/* Program RNR = 6. */
|
||||
" ldmia r1!, {r5,r6} \n"/* Read third set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst2 \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r5,r6} \n"/* Write third set of RBAR/RLAR registers. */
|
||||
" movs r4, #7 \n"/* r4 = 7. */
|
||||
" str r4, [r2] \n"/* Program RNR = 7. */
|
||||
" ldmia r1!, {r5,r6} \n"/* Read fourth set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst2 \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r5,r6} \n"/* Write fourth set of RBAR/RLAR registers. */
|
||||
" \n"
|
||||
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r3, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" movs r4, #1 \n"/* r4 = 1. */
|
||||
" orrs r3, r4 \n"/* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
|
||||
" str r3, [r2] \n"/* Enable MPU. */
|
||||
" dsb \n"/* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" ldm r0!, {r1-r3} \n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
|
||||
" msr psplim, r1 \n"/* Set this task's PSPLIM value. */
|
||||
" msr control, r2 \n"/* Set this task's CONTROL value. */
|
||||
" adds r0, #32 \n"/* Discard everything up to r0. */
|
||||
" msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
|
||||
" isb \n"
|
||||
" bx r3 \n"/* Finally, branch to EXC_RETURN. */
|
||||
#else /* configENABLE_MPU */
|
||||
" ldm r0!, {r1-r2} \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
|
||||
" msr psplim, r1 \n"/* Set this task's PSPLIM value. */
|
||||
#endif
|
||||
" movs r1, #2 \n"/* r1 = 2. */
|
||||
" msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */
|
||||
" adds r0, #32 \n"/* Discard everything up to r0. */
|
||||
" msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
|
||||
" isb \n"
|
||||
" bx r2 \n"/* Finally, branch to EXC_RETURN. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"pxCurrentTCBConst2: .word pxCurrentTCB \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
"xMPUCTRLConst2: .word 0xe000ed94 \n"
|
||||
"xMAIR0Const2: .word 0xe000edc0 \n"
|
||||
"xRNRConst2: .word 0xe000ed98 \n"
|
||||
"xRBARConst2: .word 0xe000ed9c \n"
|
||||
#endif /* configENABLE_MPU */
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* r0 = CONTROL. */
|
||||
" movs r1, #1 \n"/* r1 = 1. */
|
||||
" tst r0, r1 \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
|
||||
|
|
@ -183,6 +140,8 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
|
|||
" running_privileged: \n"
|
||||
" movs r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
|
||||
" bx lr \n"/* Return. */
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
::: "r0", "r1", "memory"
|
||||
);
|
||||
}
|
||||
|
|
@ -192,8 +151,6 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* Read the CONTROL register. */
|
||||
" movs r1, #1 \n"/* r1 = 1. */
|
||||
" bics r0, r1 \n"/* Clear the bit 0. */
|
||||
|
|
@ -208,8 +165,6 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* r0 = CONTROL. */
|
||||
" movs r1, #1 \n"/* r1 = 1. */
|
||||
" orrs r0, r1 \n"/* r0 = r0 | r1. */
|
||||
|
|
@ -224,9 +179,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r0, =0xe000ed08 \n" /* Use the NVIC offset register to locate the stack. */
|
||||
" ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
|
||||
" ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
|
||||
" ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
|
||||
" msr msp, r0 \n"/* Set the MSP back to the start of the stack. */
|
||||
|
|
@ -235,6 +188,9 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
" isb \n"
|
||||
" svc %0 \n"/* System call to start the first task. */
|
||||
" nop \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"xVTORConst: .word 0xe000ed08 \n"
|
||||
::"i" ( portSVC_START_SCHEDULER ) : "memory"
|
||||
);
|
||||
}
|
||||
|
|
@ -244,8 +200,6 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, PRIMASK \n"
|
||||
" cpsid i \n"
|
||||
" bx lr \n"
|
||||
|
|
@ -258,8 +212,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" msr PRIMASK, r0 \n"
|
||||
" bx lr \n"
|
||||
::: "memory"
|
||||
|
|
@ -267,135 +219,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */
|
||||
" ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */
|
||||
" mrs r2, psp \n" /* r2 = PSP. */
|
||||
" \n"
|
||||
" save_general_regs: \n"
|
||||
" stmia r1!, {r4-r7} \n" /* Store r4-r7. */
|
||||
" mov r4, r8 \n" /* r4 = r8. */
|
||||
" mov r5, r9 \n" /* r5 = r9. */
|
||||
" mov r6, r10 \n" /* r6 = r10. */
|
||||
" mov r7, r11 \n" /* r7 = r11. */
|
||||
" stmia r1!, {r4-r7} \n" /* Store r8-r11. */
|
||||
" ldmia r2!, {r4-r7} \n" /* Copy half of the hardware saved context into r4-r7. */
|
||||
" stmia r1!, {r4-r7} \n" /* Store the hardware saved context. */
|
||||
" ldmia r2!, {r4-r7} \n" /* Copy rest half of the hardware saved context into r4-r7. */
|
||||
" stmia r1!, {r4-r7} \n" /* Store the hardware saved context. */
|
||||
" \n"
|
||||
" save_special_regs: \n"
|
||||
" mrs r2, psp \n" /* r2 = PSP. */
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
" mrs r3, psplim \n" /* r3 = PSPLIM. */
|
||||
#else
|
||||
" movs r3, #0 \n" /* r3 = 0. 0 is stored in the PSPLIM slot. */
|
||||
#endif
|
||||
" mrs r4, control \n" /* r4 = CONTROL. */
|
||||
" mov r5, lr \n" /* r5 = LR. */
|
||||
" stmia r1!, {r2-r5} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
|
||||
" str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */
|
||||
" \n"
|
||||
" select_next_task: \n"
|
||||
" cpsid i \n"
|
||||
" bl vTaskSwitchContext \n"
|
||||
" cpsie i \n"
|
||||
" \n"
|
||||
" program_mpu: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/
|
||||
" \n"
|
||||
" dmb \n" /* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" movs r3, #1 \n" /* r3 = 1. */
|
||||
" bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Disable MPU. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
" ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
" ldr r2, =0xe000edc0 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r1, [r2] \n" /* Program MAIR0. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
" ldr r1, =0xe000ed98 \n" /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
" \n"
|
||||
" movs r3, #4 \n" /* r3 = 4. */
|
||||
" str r3, [r1] \n" /* Program RNR = 4. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */
|
||||
" movs r3, #5 \n" /* r3 = 5. */
|
||||
" str r3, [r1] \n" /* Program RNR = 5. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */
|
||||
" movs r3, #6 \n" /* r3 = 6. */
|
||||
" str r3, [r1] \n" /* Program RNR = 6. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */
|
||||
" movs r3, #7 \n" /* r3 = 6. */
|
||||
" str r3, [r1] \n" /* Program RNR = 7. */
|
||||
" ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */
|
||||
" \n"
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" movs r3, #1 \n" /* r3 = 1. */
|
||||
" orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Enable MPU. */
|
||||
" dsb \n" /* Force memory writes before continuing. */
|
||||
" \n"
|
||||
" restore_context: \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/
|
||||
" ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */
|
||||
" \n"
|
||||
" restore_special_regs: \n"
|
||||
" subs r1, #16 \n"
|
||||
" ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
|
||||
" subs r1, #16 \n"
|
||||
" msr psp, r2 \n"
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
" msr psplim, r3 \n"
|
||||
#endif
|
||||
" msr control, r4 \n"
|
||||
" mov lr, r5 \n"
|
||||
" \n"
|
||||
" restore_general_regs: \n"
|
||||
" subs r1, #32 \n"
|
||||
" ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */
|
||||
" stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */
|
||||
" ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */
|
||||
" stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */
|
||||
" subs r1, #48 \n"
|
||||
" ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */
|
||||
" mov r8, r4 \n" /* r8 = r4. */
|
||||
" mov r9, r5 \n" /* r9 = r5. */
|
||||
" mov r10, r6 \n" /* r10 = r6. */
|
||||
" mov r11, r7 \n" /* r11 = r7. */
|
||||
" subs r1, #32 \n"
|
||||
" ldmia r1!, {r4-r7} \n" /* Restore r4-r7. */
|
||||
" subs r1, #16 \n"
|
||||
" \n"
|
||||
" restore_context_done: \n"
|
||||
" str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
" bx lr \n"
|
||||
);
|
||||
}
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
|
|
@ -403,15 +226,24 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, psp \n"/* Read PSP in r0. */
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r2] \n"/* Read pxCurrentTCB. */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" subs r0, r0, #44 \n"/* Make space for PSPLIM, CONTROL, LR and the remaining registers on the stack. */
|
||||
" str r0, [r1] \n"/* Save the new top of stack in TCB. */
|
||||
" mrs r1, psplim \n"/* r1 = PSPLIM. */
|
||||
" mrs r2, control \n"/* r2 = CONTROL. */
|
||||
" mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
|
||||
" stmia r0!, {r1-r7} \n"/* Store on the stack - PSPLIM, CONTROL, LR and low registers that are not automatically saved. */
|
||||
" mov r4, r8 \n"/* r4 = r8. */
|
||||
" mov r5, r9 \n"/* r5 = r9. */
|
||||
" mov r6, r10 \n"/* r6 = r10. */
|
||||
" mov r7, r11 \n"/* r7 = r11. */
|
||||
" stmia r0!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */
|
||||
#else /* configENABLE_MPU */
|
||||
" subs r0, r0, #40 \n"/* Make space for PSPLIM, LR and the remaining registers on the stack. */
|
||||
" str r0, [r1] \n"/* Save the new top of stack in TCB. */
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
" mrs r2, psplim \n"/* r2 = PSPLIM. */
|
||||
#else
|
||||
" movs r2, #0 \n" /* r2 = 0. 0 is stored in the PSPLIM slot. */
|
||||
#endif
|
||||
" mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
|
||||
" stmia r0!, {r2-r7} \n"/* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
|
||||
" mov r4, r8 \n"/* r4 = r8. */
|
||||
|
|
@ -419,15 +251,73 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" mov r6, r10 \n"/* r6 = r10. */
|
||||
" mov r7, r11 \n"/* r7 = r11. */
|
||||
" stmia r0!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
" cpsid i \n"
|
||||
" bl vTaskSwitchContext \n"
|
||||
" cpsie i \n"
|
||||
" \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r2] \n"/* Read pxCurrentTCB. */
|
||||
" ldr r0, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
|
||||
" \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" dmb \n"/* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r3, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" movs r4, #1 \n"/* r4 = 1. */
|
||||
" bics r3, r4 \n"/* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
|
||||
" str r3, [r2] \n"/* Disable MPU. */
|
||||
" \n"
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
" ldr r4, [r1] \n"/* r4 = *r1 i.e. r4 = MAIR0. */
|
||||
" ldr r2, xMAIR0Const \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r4, [r2] \n"/* Program MAIR0. */
|
||||
" ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
" movs r4, #4 \n"/* r4 = 4. */
|
||||
" str r4, [r2] \n"/* Program RNR = 4. */
|
||||
" ldmia r1!, {r5,r6} \n"/* Read first set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r5,r6} \n"/* Write first set of RBAR/RLAR registers. */
|
||||
" movs r4, #5 \n"/* r4 = 5. */
|
||||
" str r4, [r2] \n"/* Program RNR = 5. */
|
||||
" ldmia r1!, {r5,r6} \n"/* Read second set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r5,r6} \n"/* Write second set of RBAR/RLAR registers. */
|
||||
" movs r4, #6 \n"/* r4 = 6. */
|
||||
" str r4, [r2] \n"/* Program RNR = 6. */
|
||||
" ldmia r1!, {r5,r6} \n"/* Read third set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r5,r6} \n"/* Write third set of RBAR/RLAR registers. */
|
||||
" movs r4, #7 \n"/* r4 = 7. */
|
||||
" str r4, [r2] \n"/* Program RNR = 7. */
|
||||
" ldmia r1!, {r5,r6} \n"/* Read fourth set of RBAR/RLAR from TCB. */
|
||||
" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" stmia r3!, {r5,r6} \n"/* Write fourth set of RBAR/RLAR registers. */
|
||||
" \n"
|
||||
" ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r3, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" movs r4, #1 \n"/* r4 = 1. */
|
||||
" orrs r3, r4 \n"/* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
|
||||
" str r3, [r2] \n"/* Enable MPU. */
|
||||
" dsb \n"/* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" adds r0, r0, #28 \n"/* Move to the high registers. */
|
||||
" ldmia r0!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */
|
||||
" mov r8, r4 \n"/* r8 = r4. */
|
||||
" mov r9, r5 \n"/* r9 = r5. */
|
||||
" mov r10, r6 \n"/* r10 = r6. */
|
||||
" mov r11, r7 \n"/* r11 = r7. */
|
||||
" msr psp, r0 \n"/* Remember the new top of stack for the task. */
|
||||
" subs r0, r0, #44 \n"/* Move to the starting of the saved context. */
|
||||
" ldmia r0!, {r1-r7} \n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r7 restored. */
|
||||
" msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */
|
||||
" msr control, r2 \n"/* Restore the CONTROL register value for the task. */
|
||||
" bx r3 \n"
|
||||
#else /* configENABLE_MPU */
|
||||
" adds r0, r0, #24 \n"/* Move to the high registers. */
|
||||
" ldmia r0!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */
|
||||
" mov r8, r4 \n"/* r8 = r4. */
|
||||
|
|
@ -437,80 +327,40 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" msr psp, r0 \n"/* Remember the new top of stack for the task. */
|
||||
" subs r0, r0, #40 \n"/* Move to the starting of the saved context. */
|
||||
" ldmia r0!, {r2-r7} \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
" msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */
|
||||
#endif
|
||||
" bx r3 \n"
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"pxCurrentTCBConst: .word pxCurrentTCB \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
"xMPUCTRLConst: .word 0xe000ed94 \n"
|
||||
"xMAIR0Const: .word 0xe000edc0 \n"
|
||||
"xRNRConst: .word 0xe000ed98 \n"
|
||||
"xRBARConst: .word 0xe000ed9c \n"
|
||||
#endif /* configENABLE_MPU */
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
|
||||
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
".syntax unified \n"
|
||||
".extern vPortSVCHandler_C \n"
|
||||
".extern vSystemCallEnter \n"
|
||||
".extern vSystemCallExit \n"
|
||||
" \n"
|
||||
"movs r0, #4 \n"
|
||||
"mov r1, lr \n"
|
||||
"tst r0, r1 \n"
|
||||
"beq stack_on_msp \n"
|
||||
"stack_on_psp: \n"
|
||||
" mrs r0, psp \n"
|
||||
" b route_svc \n"
|
||||
"stack_on_msp: \n"
|
||||
" mrs r0, msp \n"
|
||||
" b route_svc \n"
|
||||
" \n"
|
||||
"route_svc: \n"
|
||||
" ldr r3, [r0, #24] \n"
|
||||
" subs r3, #2 \n"
|
||||
" ldrb r2, [r3, #0] \n"
|
||||
" cmp r2, %0 \n"
|
||||
" blt system_call_enter \n"
|
||||
" cmp r2, %1 \n"
|
||||
" beq system_call_exit \n"
|
||||
" b vPortSVCHandler_C \n"
|
||||
" \n"
|
||||
"system_call_enter: \n"
|
||||
" b vSystemCallEnter \n"
|
||||
"system_call_exit: \n"
|
||||
" b vSystemCallExit \n"
|
||||
" \n"
|
||||
: /* No outputs. */
|
||||
: "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT )
|
||||
: "r0", "r1", "r2", "r3", "memory"
|
||||
);
|
||||
}
|
||||
|
||||
#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" movs r0, #4 \n"
|
||||
" mov r1, lr \n"
|
||||
" tst r0, r1 \n"
|
||||
" beq stacking_used_msp \n"
|
||||
" mrs r0, psp \n"
|
||||
" ldr r2, =vPortSVCHandler_C \n"
|
||||
" ldr r2, svchandler_address_const \n"
|
||||
" bx r2 \n"
|
||||
" stacking_used_msp: \n"
|
||||
" mrs r0, msp \n"
|
||||
" ldr r2, =vPortSVCHandler_C \n"
|
||||
" ldr r2, svchandler_address_const \n"
|
||||
" bx r2 \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"svchandler_address_const: .word vPortSVCHandler_C \n"
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,16 +22,15 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
|
@ -45,41 +42,271 @@
|
|||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef configENABLE_FPU
|
||||
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
|
||||
#endif /* configENABLE_FPU */
|
||||
|
||||
#ifndef configENABLE_MPU
|
||||
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#ifndef configENABLE_TRUSTZONE
|
||||
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Type definitions.
|
||||
*/
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* Architecture specifics.
|
||||
*/
|
||||
#define portARCH_NAME "Cortex-M23"
|
||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||
#define portARMV8M_MINOR_VERSION 0
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portNOP()
|
||||
#define portINLINE __inline
|
||||
#ifndef portFORCE_INLINE
|
||||
#define portFORCE_INLINE inline __attribute__( ( always_inline ) )
|
||||
#endif
|
||||
#define portHAS_STACK_OVERFLOW_CHECKING 1
|
||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ARMv8-M common port configurations. */
|
||||
#include "portmacrocommon.h"
|
||||
/**
|
||||
* @brief Extern declarations.
|
||||
*/
|
||||
extern BaseType_t xPortIsInsideInterrupt( void );
|
||||
|
||||
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
|
||||
extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
|
||||
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
#error 16 MPU regions are not yet supported for this port.
|
||||
#endif
|
||||
/**
|
||||
* @brief MPU specific constants.
|
||||
*/
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
#define portUSING_MPU_WRAPPERS 1
|
||||
#define portPRIVILEGE_BIT ( 0x80000000UL )
|
||||
#else
|
||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#ifndef configENABLE_MVE
|
||||
#define configENABLE_MVE 0
|
||||
#elif ( configENABLE_MVE != 0 )
|
||||
#error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M23.
|
||||
#endif
|
||||
|
||||
/* MPU regions. */
|
||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||
#define portUNPRIVILEGED_FLASH_REGION ( 1UL )
|
||||
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
|
||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||
#define portSTACK_REGION ( 4UL )
|
||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||
|
||||
/* Device memory attributes used in MPU_MAIR registers.
|
||||
*
|
||||
* 8-bit values encoded as follows:
|
||||
* Bit[7:4] - 0000 - Device Memory
|
||||
* Bit[3:2] - 00 --> Device-nGnRnE
|
||||
* 01 --> Device-nGnRE
|
||||
* 10 --> Device-nGRE
|
||||
* 11 --> Device-GRE
|
||||
* Bit[1:0] - 00, Reserved.
|
||||
*/
|
||||
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
|
||||
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
|
||||
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
|
||||
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
|
||||
|
||||
/* Normal memory attributes used in MPU_MAIR registers. */
|
||||
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
|
||||
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
|
||||
|
||||
/* Attributes used in MPU_RBAR registers. */
|
||||
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
|
||||
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
|
||||
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
|
||||
|
||||
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
|
||||
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
|
||||
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
|
||||
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
|
||||
|
||||
#define portMPU_REGION_EXECUTE_NEVER ( 1UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Settings to define an MPU region.
|
||||
*/
|
||||
typedef struct MPURegionSettings
|
||||
{
|
||||
uint32_t ulRBAR; /**< RBAR for the region. */
|
||||
uint32_t ulRLAR; /**< RLAR for the region. */
|
||||
} MPURegionSettings_t;
|
||||
|
||||
/**
|
||||
* @brief MPU settings as stored in the TCB.
|
||||
*/
|
||||
typedef struct MPU_SETTINGS
|
||||
{
|
||||
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
|
||||
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
|
||||
} xMPU_SETTINGS;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief SVC numbers.
|
||||
*/
|
||||
#define portSVC_ALLOCATE_SECURE_CONTEXT 0
|
||||
#define portSVC_FREE_SECURE_CONTEXT 1
|
||||
#define portSVC_START_SCHEDULER 2
|
||||
#define portSVC_RAISE_PRIVILEGE 3
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Scheduler utilities.
|
||||
*/
|
||||
#define portYIELD() vPortYield()
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Critical section management.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
|
||||
#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
|
||||
#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Tickless idle/low power functionality.
|
||||
*/
|
||||
#ifndef portSUPPRESS_TICKS_AND_SLEEP
|
||||
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Task function macros as described on the FreeRTOS.org WEB site.
|
||||
*/
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
|
||||
/**
|
||||
* @brief Allocate a secure context for the task.
|
||||
*
|
||||
* Tasks are not created with a secure context. Any task that is going to call
|
||||
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
|
||||
* secure context before it calls any secure function.
|
||||
*
|
||||
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
|
||||
*/
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
|
||||
|
||||
/**
|
||||
* @brief Called when a task is deleted to delete the task's secure context,
|
||||
* if it has one.
|
||||
*
|
||||
* @param[in] pxTCB The TCB of the task being deleted.
|
||||
*/
|
||||
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
|
||||
#else
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
|
||||
#define portCLEAN_UP_TCB( pxTCB )
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
/**
|
||||
* @brief Checks whether or not the processor is privileged.
|
||||
*
|
||||
* @return 1 if the processor is already privileged, 0 otherwise.
|
||||
*/
|
||||
#define portIS_PRIVILEGED() xIsPrivileged()
|
||||
|
||||
/**
|
||||
* @brief Raise an SVC request to raise privilege.
|
||||
*
|
||||
* The SVC handler checks that the SVC was raised from a system call and only
|
||||
* then it raises the privilege. If this is called from any other place,
|
||||
* the privilege is not raised.
|
||||
*/
|
||||
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
|
||||
|
||||
/**
|
||||
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
|
||||
* register.
|
||||
*/
|
||||
#define portRESET_PRIVILEGE() vResetPrivilege()
|
||||
#else
|
||||
#define portIS_PRIVILEGED()
|
||||
#define portRAISE_PRIVILEGE()
|
||||
#define portRESET_PRIVILEGE()
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Barriers.
|
||||
*/
|
||||
#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,10 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
* Copyright 2024 Arm Limited and/or its affiliates
|
||||
* <open-source-office@arm.com>
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -26,6 +22,7 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
|
|
@ -38,148 +35,98 @@
|
|||
/* Portasm includes. */
|
||||
#include "portasm.h"
|
||||
|
||||
/* System call numbers includes. */
|
||||
#include "mpu_syscall_numbers.h"
|
||||
|
||||
/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the
|
||||
* header files. */
|
||||
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" program_mpu_first_task: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r3] \n" /* r0 = pxCurrentTCB. */
|
||||
" \n"
|
||||
" dmb \n" /* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Disable MPU. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
" ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
" ldr r2, =0xe000edc0 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r1, [r2] \n" /* Program MAIR0. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
" ldr r1, =0xe000ed98 \n" /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" \n"
|
||||
" movs r3, #4 \n" /* r3 = 4. */
|
||||
" str r3, [r1] \n" /* Program RNR = 4. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" \n"
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
" movs r3, #8 \n" /* r3 = 8. */
|
||||
" str r3, [r1] \n" /* Program RNR = 8. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" movs r3, #12 \n" /* r3 = 12. */
|
||||
" str r3, [r1] \n" /* Program RNR = 12. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||
" \n"
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" orr r2, #1 \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Enable MPU. */
|
||||
" dsb \n" /* Force memory writes before continuing. */
|
||||
" \n"
|
||||
" restore_context_first_task: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/
|
||||
" ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */
|
||||
" \n"
|
||||
" restore_special_regs_first_task: \n"
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" ldmdb r2!, {r3-r6} \n" /* Read task's dedicated PAC key from the task's context. */
|
||||
" msr PAC_KEY_P_0, r3 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
" msr PAC_KEY_P_1, r4 \n"
|
||||
" msr PAC_KEY_P_2, r5 \n"
|
||||
" msr PAC_KEY_P_3, r6 \n"
|
||||
" clrm {r3-r6} \n" /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
" ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
|
||||
" msr psp, r3 \n"
|
||||
" msr psplim, r4 \n"
|
||||
" msr control, r5 \n"
|
||||
" ldr r4, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" str r0, [r4] \n" /* Restore xSecureContext. */
|
||||
" \n"
|
||||
" restore_general_regs_first_task: \n"
|
||||
" ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */
|
||||
" stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */
|
||||
" ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */
|
||||
" \n"
|
||||
" restore_context_done_first_task: \n"
|
||||
" str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
" mov r0, #0 \n"
|
||||
" msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */
|
||||
" bx lr \n"
|
||||
);
|
||||
}
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r3, [r2] \n"/* Read pxCurrentTCB. */
|
||||
" ldr r0, [r3] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
|
||||
" \n"
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" ldmia r0!, {r1-r4} \n" /* Read task's dedicated PAC key from stack. */
|
||||
" msr PAC_KEY_P_3, r1 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
" msr PAC_KEY_P_2, r2 \n"
|
||||
" msr PAC_KEY_P_1, r3 \n"
|
||||
" msr PAC_KEY_P_0, r4 \n"
|
||||
" clrm {r1-r4} \n" /* Clear r1-r4. */
|
||||
#endif /* configENABLE_PAC */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" dmb \n"/* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
|
||||
" str r4, [r2] \n"/* Disable MPU. */
|
||||
" \n"
|
||||
" adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
|
||||
" ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */
|
||||
" ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r4, [r2] \n"/* Program MAIR0. */
|
||||
" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
" movs r4, #4 \n"/* r4 = 4. */
|
||||
" str r4, [r2] \n"/* Program RNR = 4. */
|
||||
" adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
|
||||
" ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" \n"
|
||||
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||
" str r4, [r2] \n"/* Enable MPU. */
|
||||
" dsb \n"/* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
|
||||
" ldr r5, xSecureContextConst2 \n"
|
||||
" str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */
|
||||
" msr psplim, r2 \n"/* Set this task's PSPLIM value. */
|
||||
" msr control, r3 \n"/* Set this task's CONTROL value. */
|
||||
" adds r0, #32 \n"/* Discard everything up to r0. */
|
||||
" msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
|
||||
" isb \n"
|
||||
" mov r0, #0 \n"
|
||||
" msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */
|
||||
" bx r4 \n"/* Finally, branch to EXC_RETURN. */
|
||||
#else /* configENABLE_MPU */
|
||||
" ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
|
||||
" ldr r4, =xSecureContext \n"
|
||||
" ldr r4, xSecureContextConst2 \n"
|
||||
" str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */
|
||||
" msr psplim, r2 \n"/* Set this task's PSPLIM value. */
|
||||
" mrs r1, control \n" /* Obtain current control register value. */
|
||||
" orrs r1, r1, #2 \n" /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointer (PSP). */
|
||||
" msr control, r1 \n" /* Write back the new control register value. */
|
||||
" movs r1, #2 \n"/* r1 = 2. */
|
||||
" msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */
|
||||
" adds r0, #32 \n"/* Discard everything up to r0. */
|
||||
" msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
|
||||
" isb \n"
|
||||
" mov r0, #0 \n"
|
||||
" msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */
|
||||
" bx r3 \n"/* Finally, branch to EXC_RETURN. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"pxCurrentTCBConst2: .word pxCurrentTCB \n"
|
||||
"xSecureContextConst2: .word xSecureContext \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
"xMPUCTRLConst2: .word 0xe000ed94 \n"
|
||||
"xMAIR0Const2: .word 0xe000edc0 \n"
|
||||
"xRNRConst2: .word 0xe000ed98 \n"
|
||||
"xRBARConst2: .word 0xe000ed9c \n"
|
||||
#endif /* configENABLE_MPU */
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* r0 = CONTROL. */
|
||||
" tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
|
||||
" ite ne \n"
|
||||
" movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
|
||||
" moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
|
||||
" bx lr \n"/* Return. */
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
::: "r0", "memory"
|
||||
);
|
||||
}
|
||||
|
|
@ -189,8 +136,6 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* Read the CONTROL register. */
|
||||
" bic r0, #1 \n"/* Clear the bit 0. */
|
||||
" msr control, r0 \n"/* Write back the new CONTROL value. */
|
||||
|
|
@ -204,8 +149,6 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* r0 = CONTROL. */
|
||||
" orr r0, #1 \n"/* r0 = r0 | 1. */
|
||||
" msr control, r0 \n"/* CONTROL = r0. */
|
||||
|
|
@ -219,9 +162,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r0, =0xe000ed08 \n" /* Use the NVIC offset register to locate the stack. */
|
||||
" ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
|
||||
" ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
|
||||
" ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
|
||||
" msr msp, r0 \n"/* Set the MSP back to the start of the stack. */
|
||||
|
|
@ -231,6 +172,9 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
" isb \n"
|
||||
" svc %0 \n"/* System call to start the first task. */
|
||||
" nop \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"xVTORConst: .word 0xe000ed08 \n"
|
||||
::"i" ( portSVC_START_SCHEDULER ) : "memory"
|
||||
);
|
||||
}
|
||||
|
|
@ -240,8 +184,6 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */
|
||||
" mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
|
||||
" msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
|
||||
|
|
@ -257,8 +199,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" msr basepri, r0 \n"/* basepri = ulMask. */
|
||||
" dsb \n"
|
||||
" isb \n"
|
||||
|
|
@ -268,8 +208,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
|
|
@ -278,202 +216,66 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" .extern SecureContext_SaveContext \n"
|
||||
" .extern SecureContext_LoadContext \n"
|
||||
" \n"
|
||||
" ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
|
||||
" ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */
|
||||
" \n"
|
||||
" cbz r0, save_ns_context \n" /* No secure context to save. */
|
||||
" save_s_context: \n"
|
||||
" push {r0-r2, lr} \n"
|
||||
" bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
" pop {r0-r2, lr} \n"
|
||||
" \n"
|
||||
" save_ns_context: \n"
|
||||
" mov r3, lr \n" /* r3 = LR (EXC_RETURN). */
|
||||
" lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
|
||||
" \n"
|
||||
" save_general_regs: \n"
|
||||
" mrs r3, psp \n"
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
" add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */
|
||||
" tst lr, #0x10 \n"
|
||||
" ittt eq \n"
|
||||
" vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */
|
||||
" vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */
|
||||
" vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */
|
||||
" sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
" stmia r2!, {r4-r11} \n" /* Store r4-r11. */
|
||||
" ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */
|
||||
" stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */
|
||||
" \n"
|
||||
" save_special_regs: \n"
|
||||
" mrs r3, psp \n" /* r3 = PSP. */
|
||||
" mrs r4, psplim \n" /* r4 = PSPLIM. */
|
||||
" mrs r5, control \n" /* r5 = CONTROL. */
|
||||
" stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" mrs r3, PAC_KEY_P_0 \n" /* Read task's dedicated PAC key from the PAC key registers. */
|
||||
" mrs r4, PAC_KEY_P_1 \n"
|
||||
" mrs r5, PAC_KEY_P_2 \n"
|
||||
" mrs r6, PAC_KEY_P_3 \n"
|
||||
" stmia r2!, {r3-r6} \n" /* Store the task's dedicated PAC key on the task's context. */
|
||||
" clrm {r3-r6} \n" /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
" str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */
|
||||
" \n"
|
||||
" select_next_task: \n"
|
||||
" mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
|
||||
" msr basepri, r0 \n" /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
|
||||
" dsb \n"
|
||||
" isb \n"
|
||||
" bl vTaskSwitchContext \n"
|
||||
" mov r0, #0 \n" /* r0 = 0. */
|
||||
" msr basepri, r0 \n" /* Enable interrupts. */
|
||||
" \n"
|
||||
" program_mpu: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/
|
||||
" \n"
|
||||
" dmb \n" /* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Disable MPU. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
" ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
" ldr r2, =0xe000edc0 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r1, [r2] \n" /* Program MAIR0. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
" ldr r1, =0xe000ed98 \n" /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" \n"
|
||||
" movs r3, #4 \n" /* r3 = 4. */
|
||||
" str r3, [r1] \n" /* Program RNR = 4. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" \n"
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
" movs r3, #8 \n" /* r3 = 8. */
|
||||
" str r3, [r1] \n" /* Program RNR = 8. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" movs r3, #12 \n" /* r3 = 12. */
|
||||
" str r3, [r1] \n" /* Program RNR = 12. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||
" \n"
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Enable MPU. */
|
||||
" dsb \n" /* Force memory writes before continuing. */
|
||||
" \n"
|
||||
" restore_context: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/
|
||||
" ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */
|
||||
" \n"
|
||||
" restore_special_regs: \n"
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" ldmdb r2!, {r3-r6} \n" /* Read task's dedicated PAC key from the task's context. */
|
||||
" msr PAC_KEY_P_0, r3 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
" msr PAC_KEY_P_1, r4 \n"
|
||||
" msr PAC_KEY_P_2, r5 \n"
|
||||
" msr PAC_KEY_P_3, r6 \n"
|
||||
" clrm {r3-r6} \n" /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
" ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
|
||||
" msr psp, r3 \n"
|
||||
" msr psplim, r4 \n"
|
||||
" msr control, r5 \n"
|
||||
" ldr r4, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" str r0, [r4] \n" /* Restore xSecureContext. */
|
||||
" cbz r0, restore_ns_context \n" /* No secure context to restore. */
|
||||
" \n"
|
||||
" restore_s_context: \n"
|
||||
" push {r1-r3, lr} \n"
|
||||
" bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
" pop {r1-r3, lr} \n"
|
||||
" \n"
|
||||
" restore_ns_context: \n"
|
||||
" mov r0, lr \n" /* r0 = LR (EXC_RETURN). */
|
||||
" lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
|
||||
" \n"
|
||||
" restore_general_regs: \n"
|
||||
" ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */
|
||||
" stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */
|
||||
" ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
" tst lr, #0x10 \n"
|
||||
" ittt eq \n"
|
||||
" vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */
|
||||
" vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */
|
||||
" vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
" \n"
|
||||
" restore_context_done: \n"
|
||||
" str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
" bx lr \n"
|
||||
::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
);
|
||||
}
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" .extern SecureContext_SaveContext \n"
|
||||
" .extern SecureContext_LoadContext \n"
|
||||
" \n"
|
||||
" ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
|
||||
" mrs r2, psp \n"/* Read PSP in r2. */
|
||||
" \n"
|
||||
" cbz r0, save_ns_context \n"/* No secure context to save. */
|
||||
" save_s_context: \n"
|
||||
" push {r0-r2, lr} \n"
|
||||
" push {r0-r2, r14} \n"
|
||||
" bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
" pop {r0-r2, lr} \n"
|
||||
" pop {r0-r3} \n"/* LR is now in r3. */
|
||||
" mov lr, r3 \n"/* LR = r3. */
|
||||
" lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
" \n"
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB.*/
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" subs r2, r2, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
" str r2, [r1] \n"/* Save the new top of stack in TCB. */
|
||||
" mrs r1, psplim \n"/* r1 = PSPLIM. */
|
||||
" mrs r3, control \n"/* r3 = CONTROL. */
|
||||
" mov r4, lr \n"/* r4 = LR/EXC_RETURN. */
|
||||
" stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
#else /* configENABLE_MPU */
|
||||
" subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
|
||||
" str r2, [r1] \n"/* Save the new top of stack in TCB. */
|
||||
" mrs r1, psplim \n"/* r1 = PSPLIM. */
|
||||
" mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
|
||||
" stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" b select_next_task \n"
|
||||
" \n"
|
||||
" save_ns_context: \n"
|
||||
" mov r3, lr \n" /* r3 = LR (EXC_RETURN). */
|
||||
" lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bmi save_special_regs \n" /* If r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used. */
|
||||
" \n"
|
||||
" save_general_regs: \n"
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB. */
|
||||
#if ( configENABLE_FPU == 1 )
|
||||
" tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
|
||||
" it eq \n"
|
||||
" vstmdbeq r2!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
" stmdb r2!, {r4-r11} \n" /* Store the registers that are not saved automatically. */
|
||||
" \n"
|
||||
" save_special_regs: \n"
|
||||
" mrs r3, psplim \n" /* r3 = PSPLIM. */
|
||||
" stmdb r2!, {r0, r3, lr} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" mrs r3, PAC_KEY_P_3 \n" /* Read task's dedicated PAC key from the PAC key registers. */
|
||||
" mrs r4, PAC_KEY_P_2 \n"
|
||||
" mrs r5, PAC_KEY_P_1 \n"
|
||||
" mrs r6, PAC_KEY_P_0 \n"
|
||||
" stmdb r2!, {r3-r6} \n" /* Store the task's dedicated PAC key on the stack. */
|
||||
" clrm {r3-r6} \n" /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
" \n"
|
||||
" vstmdbeq r2!, {s16-s31} \n"/* Store the FPU registers which are not saved automatically. */
|
||||
#endif /* configENABLE_FPU */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" subs r2, r2, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
|
||||
" str r2, [r1] \n"/* Save the new top of stack in TCB. */
|
||||
" adds r2, r2, #16 \n"/* r2 = r2 + 16. */
|
||||
" stm r2, {r4-r11} \n"/* Store the registers that are not saved automatically. */
|
||||
" mrs r1, psplim \n"/* r1 = PSPLIM. */
|
||||
" mrs r3, control \n"/* r3 = CONTROL. */
|
||||
" mov r4, lr \n"/* r4 = LR/EXC_RETURN. */
|
||||
" subs r2, r2, #16 \n"/* r2 = r2 - 16. */
|
||||
" stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
#else /* configENABLE_MPU */
|
||||
" subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
|
||||
" str r2, [r1] \n"/* Save the new top of stack in TCB. */
|
||||
" adds r2, r2, #12 \n"/* r2 = r2 + 12. */
|
||||
" stm r2, {r4-r11} \n"/* Store the registers that are not saved automatically. */
|
||||
" mrs r1, psplim \n"/* r1 = PSPLIM. */
|
||||
" mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
|
||||
" subs r2, r2, #12 \n"/* r2 = r2 - 12. */
|
||||
" stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
" select_next_task: \n"
|
||||
" mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
|
||||
|
|
@ -484,118 +286,118 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" mov r0, #0 \n"/* r0 = 0. */
|
||||
" msr basepri, r0 \n"/* Enable interrupts. */
|
||||
" \n"
|
||||
" restore_context: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB. */
|
||||
" ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
|
||||
" \n"
|
||||
" restore_special_regs: \n"
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" ldmia r2!, {r3-r6} \n" /* Read task's dedicated PAC key from stack. */
|
||||
" msr PAC_KEY_P_3, r3 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
" msr PAC_KEY_P_2, r4 \n"
|
||||
" msr PAC_KEY_P_1, r5 \n"
|
||||
" msr PAC_KEY_P_0, r6 \n"
|
||||
" clrm {r3-r6} \n" /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
" ldmia r2!, {r0, r3, lr} \n" /* Read from stack - r0 = xSecureContext, r3 = PSPLIM and LR restored. */
|
||||
" msr psplim, r3 \n" /* Restore the PSPLIM register value for the task. */
|
||||
" ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" dmb \n"/* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */
|
||||
" bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
|
||||
" str r4, [r3] \n"/* Disable MPU. */
|
||||
" \n"
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
" ldr r4, [r1] \n"/* r4 = *r1 i.e. r4 = MAIR0. */
|
||||
" ldr r3, xMAIR0Const \n"/* r3 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r4, [r3] \n"/* Program MAIR0. */
|
||||
" ldr r3, xRNRConst \n"/* r3 = 0xe000ed98 [Location of RNR]. */
|
||||
" movs r4, #4 \n"/* r4 = 4. */
|
||||
" str r4, [r3] \n"/* Program RNR = 4. */
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
" stmia r3!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" \n"
|
||||
" ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */
|
||||
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||
" str r4, [r3] \n"/* Enable MPU. */
|
||||
" dsb \n"/* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" ldmia r2!, {r0, r1, r3, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */
|
||||
" msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */
|
||||
" msr control, r3 \n"/* Restore the CONTROL register value for the task. */
|
||||
" mov lr, r4 \n"/* LR = r4. */
|
||||
" ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" str r0, [r3] \n"/* Restore the task's xSecureContext. */
|
||||
" cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */
|
||||
" \n"
|
||||
" restore_s_context: \n"
|
||||
" push {r1-r3, lr} \n"
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB. */
|
||||
" push {r2, r4} \n"
|
||||
" bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
" pop {r1-r3, lr} \n"
|
||||
" \n"
|
||||
" restore_ns_context: \n"
|
||||
" mov r0, lr \n" /* r0 = LR (EXC_RETURN). */
|
||||
" lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
|
||||
" \n"
|
||||
" restore_general_regs: \n"
|
||||
" ldmia r2!, {r4-r11} \n" /* Restore the registers that are not automatically restored. */
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
|
||||
" it eq \n"
|
||||
" vldmiaeq r2!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
" \n"
|
||||
" restore_context_done: \n"
|
||||
" pop {r2, r4} \n"
|
||||
" mov lr, r4 \n"/* LR = r4. */
|
||||
" lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
" msr psp, r2 \n"/* Remember the new top of stack for the task. */
|
||||
" bx lr \n"
|
||||
#else /* configENABLE_MPU */
|
||||
" ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
|
||||
" msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */
|
||||
" mov lr, r4 \n"/* LR = r4. */
|
||||
" ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" str r0, [r3] \n"/* Restore the task's xSecureContext. */
|
||||
" cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */
|
||||
" ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n"/* Read pxCurrentTCB. */
|
||||
" push {r2, r4} \n"
|
||||
" bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
" pop {r2, r4} \n"
|
||||
" mov lr, r4 \n"/* LR = r4. */
|
||||
" lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
" msr psp, r2 \n"/* Remember the new top of stack for the task. */
|
||||
" bx lr \n"
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
" restore_ns_context: \n"
|
||||
" ldmia r2!, {r4-r11} \n"/* Restore the registers that are not automatically restored. */
|
||||
#if ( configENABLE_FPU == 1 )
|
||||
" tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
|
||||
" it eq \n"
|
||||
" vldmiaeq r2!, {s16-s31} \n"/* Restore the FPU registers which are not restored automatically. */
|
||||
#endif /* configENABLE_FPU */
|
||||
" msr psp, r2 \n"/* Remember the new top of stack for the task. */
|
||||
" bx lr \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"pxCurrentTCBConst: .word pxCurrentTCB \n"
|
||||
"xSecureContextConst: .word xSecureContext \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
"xMPUCTRLConst: .word 0xe000ed94 \n"
|
||||
"xMAIR0Const: .word 0xe000edc0 \n"
|
||||
"xRNRConst: .word 0xe000ed98 \n"
|
||||
"xRBARConst: .word 0xe000ed9c \n"
|
||||
#endif /* configENABLE_MPU */
|
||||
::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
|
||||
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
".syntax unified \n"
|
||||
".extern vPortSVCHandler_C \n"
|
||||
".extern vSystemCallEnter \n"
|
||||
".extern vSystemCallExit \n"
|
||||
" \n"
|
||||
" tst lr, #4 \n"
|
||||
" ite eq \n"
|
||||
" mrseq r0, msp \n"
|
||||
" mrsne r0, psp \n"
|
||||
" \n"
|
||||
"ldr r1, [r0, #24] \n"
|
||||
"ldrb r2, [r1, #-2] \n"
|
||||
"cmp r2, %0 \n"
|
||||
"blt syscall_enter \n"
|
||||
"cmp r2, %1 \n"
|
||||
"beq syscall_exit \n"
|
||||
"b vPortSVCHandler_C \n"
|
||||
" \n"
|
||||
"syscall_enter: \n"
|
||||
" mov r1, lr \n"
|
||||
" b vSystemCallEnter \n"
|
||||
" \n"
|
||||
"syscall_exit: \n"
|
||||
" mov r1, lr \n"
|
||||
" b vSystemCallExit \n"
|
||||
" \n"
|
||||
: /* No outputs. */
|
||||
: "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT )
|
||||
: "r0", "r1", "r2", "memory"
|
||||
);
|
||||
}
|
||||
|
||||
#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" tst lr, #4 \n"
|
||||
" ite eq \n"
|
||||
" mrseq r0, msp \n"
|
||||
" mrsne r0, psp \n"
|
||||
" ldr r1, =vPortSVCHandler_C \n"
|
||||
" ldr r1, svchandler_address_const \n"
|
||||
" bx r1 \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"svchandler_address_const: .word vPortSVCHandler_C \n"
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (( naked )) */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" svc %0 \n"/* Secure context is allocated in the supervisor call. */
|
||||
" bx lr \n"/* Return. */
|
||||
::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
|
||||
|
|
@ -607,8 +409,6 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */
|
||||
" ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */
|
||||
" cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,16 +22,15 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
|
@ -45,37 +42,271 @@
|
|||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef configENABLE_FPU
|
||||
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
|
||||
#endif /* configENABLE_FPU */
|
||||
|
||||
#ifndef configENABLE_MPU
|
||||
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#ifndef configENABLE_TRUSTZONE
|
||||
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Type definitions.
|
||||
*/
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* Architecture specifics.
|
||||
*/
|
||||
#define portARCH_NAME "Cortex-M33"
|
||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||
#define portARMV8M_MINOR_VERSION 0
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portNOP()
|
||||
#define portINLINE __inline
|
||||
#ifndef portFORCE_INLINE
|
||||
#define portFORCE_INLINE inline __attribute__( ( always_inline ) )
|
||||
#endif
|
||||
#define portHAS_STACK_OVERFLOW_CHECKING 1
|
||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ARMv8-M common port configurations. */
|
||||
#include "portmacrocommon.h"
|
||||
/**
|
||||
* @brief Extern declarations.
|
||||
*/
|
||||
extern BaseType_t xPortIsInsideInterrupt( void );
|
||||
|
||||
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
|
||||
extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
|
||||
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#ifndef configENABLE_MVE
|
||||
#define configENABLE_MVE 0
|
||||
#elif ( configENABLE_MVE != 0 )
|
||||
#error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M33.
|
||||
#endif
|
||||
/**
|
||||
* @brief MPU specific constants.
|
||||
*/
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
#define portUSING_MPU_WRAPPERS 1
|
||||
#define portPRIVILEGE_BIT ( 0x80000000UL )
|
||||
#else
|
||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
|
||||
/* MPU regions. */
|
||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||
#define portUNPRIVILEGED_FLASH_REGION ( 1UL )
|
||||
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
|
||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||
#define portSTACK_REGION ( 4UL )
|
||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||
|
||||
/* Device memory attributes used in MPU_MAIR registers.
|
||||
*
|
||||
* 8-bit values encoded as follows:
|
||||
* Bit[7:4] - 0000 - Device Memory
|
||||
* Bit[3:2] - 00 --> Device-nGnRnE
|
||||
* 01 --> Device-nGnRE
|
||||
* 10 --> Device-nGRE
|
||||
* 11 --> Device-GRE
|
||||
* Bit[1:0] - 00, Reserved.
|
||||
*/
|
||||
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
|
||||
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
|
||||
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
|
||||
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
|
||||
|
||||
/* Normal memory attributes used in MPU_MAIR registers. */
|
||||
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
|
||||
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
|
||||
|
||||
/* Attributes used in MPU_RBAR registers. */
|
||||
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
|
||||
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
|
||||
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
|
||||
|
||||
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
|
||||
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
|
||||
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
|
||||
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
|
||||
|
||||
#define portMPU_REGION_EXECUTE_NEVER ( 1UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Settings to define an MPU region.
|
||||
*/
|
||||
typedef struct MPURegionSettings
|
||||
{
|
||||
uint32_t ulRBAR; /**< RBAR for the region. */
|
||||
uint32_t ulRLAR; /**< RLAR for the region. */
|
||||
} MPURegionSettings_t;
|
||||
|
||||
/**
|
||||
* @brief MPU settings as stored in the TCB.
|
||||
*/
|
||||
typedef struct MPU_SETTINGS
|
||||
{
|
||||
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
|
||||
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
|
||||
} xMPU_SETTINGS;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief SVC numbers.
|
||||
*/
|
||||
#define portSVC_ALLOCATE_SECURE_CONTEXT 0
|
||||
#define portSVC_FREE_SECURE_CONTEXT 1
|
||||
#define portSVC_START_SCHEDULER 2
|
||||
#define portSVC_RAISE_PRIVILEGE 3
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Scheduler utilities.
|
||||
*/
|
||||
#define portYIELD() vPortYield()
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Critical section management.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
|
||||
#define portDISABLE_INTERRUPTS() ulSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 )
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Tickless idle/low power functionality.
|
||||
*/
|
||||
#ifndef portSUPPRESS_TICKS_AND_SLEEP
|
||||
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Task function macros as described on the FreeRTOS.org WEB site.
|
||||
*/
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
|
||||
/**
|
||||
* @brief Allocate a secure context for the task.
|
||||
*
|
||||
* Tasks are not created with a secure context. Any task that is going to call
|
||||
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
|
||||
* secure context before it calls any secure function.
|
||||
*
|
||||
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
|
||||
*/
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
|
||||
|
||||
/**
|
||||
* @brief Called when a task is deleted to delete the task's secure context,
|
||||
* if it has one.
|
||||
*
|
||||
* @param[in] pxTCB The TCB of the task being deleted.
|
||||
*/
|
||||
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
|
||||
#else
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
|
||||
#define portCLEAN_UP_TCB( pxTCB )
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
/**
|
||||
* @brief Checks whether or not the processor is privileged.
|
||||
*
|
||||
* @return 1 if the processor is already privileged, 0 otherwise.
|
||||
*/
|
||||
#define portIS_PRIVILEGED() xIsPrivileged()
|
||||
|
||||
/**
|
||||
* @brief Raise an SVC request to raise privilege.
|
||||
*
|
||||
* The SVC handler checks that the SVC was raised from a system call and only
|
||||
* then it raises the privilege. If this is called from any other place,
|
||||
* the privilege is not raised.
|
||||
*/
|
||||
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
|
||||
|
||||
/**
|
||||
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
|
||||
* register.
|
||||
*/
|
||||
#define portRESET_PRIVILEGE() vResetPrivilege()
|
||||
#else
|
||||
#define portIS_PRIVILEGED()
|
||||
#define portRAISE_PRIVILEGE()
|
||||
#define portRESET_PRIVILEGE()
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Barriers.
|
||||
*/
|
||||
#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,10 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
* Copyright 2024 Arm Limited and/or its affiliates
|
||||
* <open-source-office@arm.com>
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -26,6 +22,7 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
|
|
@ -38,144 +35,93 @@
|
|||
/* Portasm includes. */
|
||||
#include "portasm.h"
|
||||
|
||||
/* System call numbers includes. */
|
||||
#include "mpu_syscall_numbers.h"
|
||||
|
||||
/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the
|
||||
* header files. */
|
||||
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" program_mpu_first_task: \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */
|
||||
" \n"
|
||||
" dmb \n" /* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Disable MPU. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
" ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
" ldr r2, =0xe000edc0 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r1, [r2] \n" /* Program MAIR0. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
" ldr r1, =0xe000ed98 \n" /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" \n"
|
||||
" movs r3, #4 \n" /* r3 = 4. */
|
||||
" str r3, [r1] \n" /* Program RNR = 4. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" \n"
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
" movs r3, #8 \n" /* r3 = 8. */
|
||||
" str r3, [r1] \n" /* Program RNR = 8. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" movs r3, #12 \n" /* r3 = 12. */
|
||||
" str r3, [r1] \n" /* Program RNR = 12. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||
" \n"
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Enable MPU. */
|
||||
" dsb \n" /* Force memory writes before continuing. */
|
||||
" \n"
|
||||
" restore_context_first_task: \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/
|
||||
" ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */
|
||||
" \n"
|
||||
" restore_special_regs_first_task: \n"
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" ldmdb r1!, {r2-r5} \n" /* Read task's dedicated PAC key from the task's context. */
|
||||
" msr PAC_KEY_P_0, r2 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
" msr PAC_KEY_P_1, r3 \n"
|
||||
" msr PAC_KEY_P_2, r4 \n"
|
||||
" msr PAC_KEY_P_3, r5 \n"
|
||||
" clrm {r2-r5} \n" /* Clear r2-r5. */
|
||||
#endif /* configENABLE_PAC */
|
||||
" ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
|
||||
" msr psp, r2 \n"
|
||||
" msr psplim, r3 \n"
|
||||
" msr control, r4 \n"
|
||||
" \n"
|
||||
" restore_general_regs_first_task: \n"
|
||||
" ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */
|
||||
" stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */
|
||||
" ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */
|
||||
" \n"
|
||||
" restore_context_done_first_task: \n"
|
||||
" str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
" mov r0, #0 \n"
|
||||
" msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */
|
||||
" bx lr \n"
|
||||
);
|
||||
}
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r2] \n"/* Read pxCurrentTCB. */
|
||||
" ldr r0, [r1] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
|
||||
" \n"
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" ldmia r0!, {r1-r4} \n" /* Read task's dedicated PAC key from stack. */
|
||||
" msr PAC_KEY_P_3, r1 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
" msr PAC_KEY_P_2, r2 \n"
|
||||
" msr PAC_KEY_P_1, r3 \n"
|
||||
" msr PAC_KEY_P_0, r4 \n"
|
||||
" clrm {r1-r4} \n" /* Clear r1-r4. */
|
||||
#endif /* configENABLE_PAC */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" dmb \n"/* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
|
||||
" str r4, [r2] \n"/* Disable MPU. */
|
||||
" \n"
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
" ldr r3, [r1] \n"/* r3 = *r1 i.e. r3 = MAIR0. */
|
||||
" ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r3, [r2] \n"/* Program MAIR0. */
|
||||
" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
" movs r3, #4 \n"/* r3 = 4. */
|
||||
" str r3, [r2] \n"/* Program RNR = 4. */
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
" ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" ldmia r1!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" \n"
|
||||
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||
" str r4, [r2] \n"/* Enable MPU. */
|
||||
" dsb \n"/* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" ldm r0!, {r1-r3} \n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
|
||||
" msr psplim, r1 \n"/* Set this task's PSPLIM value. */
|
||||
" msr control, r2 \n"/* Set this task's CONTROL value. */
|
||||
" adds r0, #32 \n"/* Discard everything up to r0. */
|
||||
" msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
|
||||
" isb \n"
|
||||
" mov r0, #0 \n"
|
||||
" msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */
|
||||
" bx r3 \n"/* Finally, branch to EXC_RETURN. */
|
||||
#else /* configENABLE_MPU */
|
||||
" ldm r0!, {r1-r2} \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
|
||||
" msr psplim, r1 \n"/* Set this task's PSPLIM value. */
|
||||
" mrs r1, control \n" /* Obtain current control register value. */
|
||||
" orrs r1, r1, #2 \n" /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointer (PSP). */
|
||||
" msr control, r1 \n" /* Write back the new control register value. */
|
||||
" movs r1, #2 \n"/* r1 = 2. */
|
||||
" msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */
|
||||
" adds r0, #32 \n"/* Discard everything up to r0. */
|
||||
" msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
|
||||
" isb \n"
|
||||
" mov r0, #0 \n"
|
||||
" msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */
|
||||
" bx r2 \n"/* Finally, branch to EXC_RETURN. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"pxCurrentTCBConst2: .word pxCurrentTCB \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
"xMPUCTRLConst2: .word 0xe000ed94 \n"
|
||||
"xMAIR0Const2: .word 0xe000edc0 \n"
|
||||
"xRNRConst2: .word 0xe000ed98 \n"
|
||||
"xRBARConst2: .word 0xe000ed9c \n"
|
||||
#endif /* configENABLE_MPU */
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* r0 = CONTROL. */
|
||||
" tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
|
||||
" ite ne \n"
|
||||
" movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
|
||||
" moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
|
||||
" bx lr \n"/* Return. */
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
::: "r0", "memory"
|
||||
);
|
||||
}
|
||||
|
|
@ -185,8 +131,6 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* Read the CONTROL register. */
|
||||
" bic r0, #1 \n"/* Clear the bit 0. */
|
||||
" msr control, r0 \n"/* Write back the new CONTROL value. */
|
||||
|
|
@ -200,8 +144,6 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, control \n"/* r0 = CONTROL. */
|
||||
" orr r0, #1 \n"/* r0 = r0 | 1. */
|
||||
" msr control, r0 \n"/* CONTROL = r0. */
|
||||
|
|
@ -215,9 +157,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r0, =0xe000ed08 \n" /* Use the NVIC offset register to locate the stack. */
|
||||
" ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
|
||||
" ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
|
||||
" ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
|
||||
" msr msp, r0 \n"/* Set the MSP back to the start of the stack. */
|
||||
|
|
@ -227,6 +167,9 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
|||
" isb \n"
|
||||
" svc %0 \n"/* System call to start the first task. */
|
||||
" nop \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"xVTORConst: .word 0xe000ed08 \n"
|
||||
::"i" ( portSVC_START_SCHEDULER ) : "memory"
|
||||
);
|
||||
}
|
||||
|
|
@ -236,8 +179,6 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */
|
||||
" mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
|
||||
" msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
|
||||
|
|
@ -253,8 +194,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" msr basepri, r0 \n"/* basepri = ulMask. */
|
||||
" dsb \n"
|
||||
" isb \n"
|
||||
|
|
@ -264,137 +203,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */
|
||||
" ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */
|
||||
" mrs r2, psp \n" /* r2 = PSP. */
|
||||
" \n"
|
||||
" save_general_regs: \n"
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
" add r2, r2, #0x20 \n" /* Move r2 to location where s0 is saved. */
|
||||
" tst lr, #0x10 \n"
|
||||
" ittt eq \n"
|
||||
" vstmiaeq r1!, {s16-s31} \n" /* Store s16-s31. */
|
||||
" vldmiaeq r2, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */
|
||||
" vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */
|
||||
" sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
" stmia r1!, {r4-r11} \n" /* Store r4-r11. */
|
||||
" ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */
|
||||
" stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */
|
||||
" \n"
|
||||
" save_special_regs: \n"
|
||||
" mrs r3, psplim \n" /* r3 = PSPLIM. */
|
||||
" mrs r4, control \n" /* r4 = CONTROL. */
|
||||
" stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" mrs r2, PAC_KEY_P_0 \n" /* Read task's dedicated PAC key from the PAC key registers. */
|
||||
" mrs r3, PAC_KEY_P_1 \n"
|
||||
" mrs r4, PAC_KEY_P_2 \n"
|
||||
" mrs r5, PAC_KEY_P_3 \n"
|
||||
" stmia r1!, {r2-r5} \n" /* Store the task's dedicated PAC key on the task's context. */
|
||||
" clrm {r2-r5} \n" /* Clear r2-r5. */
|
||||
#endif /* configENABLE_PAC */
|
||||
" str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */
|
||||
" \n"
|
||||
" select_next_task: \n"
|
||||
" mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
|
||||
" msr basepri, r0 \n" /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
|
||||
" dsb \n"
|
||||
" isb \n"
|
||||
" bl vTaskSwitchContext \n"
|
||||
" mov r0, #0 \n" /* r0 = 0. */
|
||||
" msr basepri, r0 \n" /* Enable interrupts. */
|
||||
" \n"
|
||||
" program_mpu: \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */
|
||||
" \n"
|
||||
" dmb \n" /* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Disable MPU. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
" ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
" ldr r2, =0xe000edc0 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r1, [r2] \n" /* Program MAIR0. */
|
||||
" \n"
|
||||
" adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
" ldr r1, =0xe000ed98 \n" /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
" ldr r2, =0xe000ed9c \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" \n"
|
||||
" movs r3, #4 \n" /* r3 = 4. */
|
||||
" str r3, [r1] \n" /* Program RNR = 4. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" \n"
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
" movs r3, #8 \n" /* r3 = 8. */
|
||||
" str r3, [r1] \n" /* Program RNR = 8. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" movs r3, #12 \n" /* r3 = 12. */
|
||||
" str r3, [r1] \n" /* Program RNR = 12. */
|
||||
" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||
" \n"
|
||||
" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
|
||||
" orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
|
||||
" str r2, [r1] \n" /* Enable MPU. */
|
||||
" dsb \n" /* Force memory writes before continuing. */
|
||||
" \n"
|
||||
" restore_context: \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/
|
||||
" ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */
|
||||
" \n"
|
||||
" restore_special_regs: \n"
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" ldmdb r1!, {r2-r5} \n" /* Read task's dedicated PAC key from the task's context. */
|
||||
" msr PAC_KEY_P_0, r2 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
" msr PAC_KEY_P_1, r3 \n"
|
||||
" msr PAC_KEY_P_2, r4 \n"
|
||||
" msr PAC_KEY_P_3, r5 \n"
|
||||
" clrm {r2-r5} \n" /* Clear r2-r5. */
|
||||
#endif /* configENABLE_PAC */
|
||||
" ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
|
||||
" msr psp, r2 \n"
|
||||
" msr psplim, r3 \n"
|
||||
" msr control, r4 \n"
|
||||
" \n"
|
||||
" restore_general_regs: \n"
|
||||
" ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */
|
||||
" stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */
|
||||
" ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
" tst lr, #0x10 \n"
|
||||
" ittt eq \n"
|
||||
" vldmdbeq r1!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */
|
||||
" vstmiaeq r2!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */
|
||||
" vldmdbeq r1!, {s16-s31} \n" /* Restore s16-s31. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
" \n"
|
||||
" restore_context_done: \n"
|
||||
" str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
" bx lr \n"
|
||||
::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
);
|
||||
}
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
|
|
@ -402,27 +210,23 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" .syntax unified \n"
|
||||
" \n"
|
||||
" mrs r0, psp \n"/* Read PSP in r0. */
|
||||
" \n"
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
|
||||
#if ( configENABLE_FPU == 1 )
|
||||
" tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
|
||||
" it eq \n"
|
||||
" vstmdbeq r0!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
" \n"
|
||||
" vstmdbeq r0!, {s16-s31} \n"/* Store the FPU registers which are not saved automatically. */
|
||||
#endif /* configENABLE_FPU */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" mrs r1, psplim \n"/* r1 = PSPLIM. */
|
||||
" mrs r2, control \n"/* r2 = CONTROL. */
|
||||
" mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
|
||||
" stmdb r0!, {r1-r11} \n"/* Store on the stack - PSPLIM, CONTROL, LR and registers that are not automatically saved. */
|
||||
#else /* configENABLE_MPU */
|
||||
" mrs r2, psplim \n"/* r2 = PSPLIM. */
|
||||
" mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
|
||||
" stmdb r0!, {r2-r11} \n"/* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" mrs r1, PAC_KEY_P_3 \n" /* Read task's dedicated PAC key from the PAC key registers. */
|
||||
" mrs r2, PAC_KEY_P_2 \n"
|
||||
" mrs r3, PAC_KEY_P_1 \n"
|
||||
" mrs r4, PAC_KEY_P_0 \n"
|
||||
" stmdb r0!, {r1-r4} \n" /* Store the task's dedicated PAC key on the stack. */
|
||||
" clrm {r1-r4} \n" /* Clear r1-r4. */
|
||||
#endif /* configENABLE_PAC */
|
||||
" \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r2] \n"/* Read pxCurrentTCB. */
|
||||
" str r0, [r1] \n"/* Save the new top of stack in TCB. */
|
||||
" \n"
|
||||
|
|
@ -434,91 +238,83 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
|
|||
" mov r0, #0 \n"/* r0 = 0. */
|
||||
" msr basepri, r0 \n"/* Enable interrupts. */
|
||||
" \n"
|
||||
" ldr r2, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r2] \n"/* Read pxCurrentTCB. */
|
||||
" ldr r0, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
|
||||
" \n"
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" ldmia r0!, {r2-r5} \n" /* Read task's dedicated PAC key from stack. */
|
||||
" msr PAC_KEY_P_3, r2 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
" msr PAC_KEY_P_2, r3 \n"
|
||||
" msr PAC_KEY_P_1, r4 \n"
|
||||
" msr PAC_KEY_P_0, r5 \n"
|
||||
" clrm {r2-r5} \n" /* Clear r2-r5. */
|
||||
#endif /* configENABLE_PAC */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" dmb \n"/* Complete outstanding transfers before disabling MPU. */
|
||||
" ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
|
||||
" str r4, [r2] \n"/* Disable MPU. */
|
||||
" \n"
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
" ldr r3, [r1] \n"/* r3 = *r1 i.e. r3 = MAIR0. */
|
||||
" ldr r2, xMAIR0Const \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
" str r3, [r2] \n"/* Program MAIR0. */
|
||||
" ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
" movs r3, #4 \n"/* r3 = 4. */
|
||||
" str r3, [r2] \n"/* Program RNR = 4. */
|
||||
" adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
" ldr r2, xRBARConst \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
" \n"
|
||||
" ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||
" str r4, [r2] \n"/* Enable MPU. */
|
||||
" dsb \n"/* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" ldmia r0!, {r1-r11} \n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r11 restored. */
|
||||
#else /* configENABLE_MPU */
|
||||
" ldmia r0!, {r2-r11} \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" \n"
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
" tst r3, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
|
||||
#if ( configENABLE_FPU == 1 )
|
||||
" tst r3, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
|
||||
" it eq \n"
|
||||
" vldmiaeq r0!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
" vldmiaeq r0!, {s16-s31} \n"/* Restore the FPU registers which are not restored automatically. */
|
||||
#endif /* configENABLE_FPU */
|
||||
" \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
" msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */
|
||||
" msr control, r2 \n"/* Restore the CONTROL register value for the task. */
|
||||
#else /* configENABLE_MPU */
|
||||
" msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */
|
||||
#endif /* configENABLE_MPU */
|
||||
" msr psp, r0 \n"/* Remember the new top of stack for the task. */
|
||||
" bx r3 \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"pxCurrentTCBConst: .word pxCurrentTCB \n"
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
"xMPUCTRLConst: .word 0xe000ed94 \n"
|
||||
"xMAIR0Const: .word 0xe000edc0 \n"
|
||||
"xRNRConst: .word 0xe000ed98 \n"
|
||||
"xRBARConst: .word 0xe000ed9c \n"
|
||||
#endif /* configENABLE_MPU */
|
||||
::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
|
||||
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
".syntax unified \n"
|
||||
".extern vPortSVCHandler_C \n"
|
||||
".extern vSystemCallEnter \n"
|
||||
".extern vSystemCallExit \n"
|
||||
" \n"
|
||||
" tst lr, #4 \n"
|
||||
" ite eq \n"
|
||||
" mrseq r0, msp \n"
|
||||
" mrsne r0, psp \n"
|
||||
" \n"
|
||||
"ldr r1, [r0, #24] \n"
|
||||
"ldrb r2, [r1, #-2] \n"
|
||||
"cmp r2, %0 \n"
|
||||
"blt syscall_enter \n"
|
||||
"cmp r2, %1 \n"
|
||||
"beq syscall_exit \n"
|
||||
"b vPortSVCHandler_C \n"
|
||||
" \n"
|
||||
"syscall_enter: \n"
|
||||
" mov r1, lr \n"
|
||||
" b vSystemCallEnter \n"
|
||||
" \n"
|
||||
"syscall_exit: \n"
|
||||
" mov r1, lr \n"
|
||||
" b vSystemCallExit \n"
|
||||
" \n"
|
||||
: /* No outputs. */
|
||||
: "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT )
|
||||
: "r0", "r1", "r2", "memory"
|
||||
);
|
||||
}
|
||||
|
||||
#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" .syntax unified \n"
|
||||
" \n"
|
||||
" tst lr, #4 \n"
|
||||
" ite eq \n"
|
||||
" mrseq r0, msp \n"
|
||||
" mrsne r0, psp \n"
|
||||
" ldr r1, =vPortSVCHandler_C \n"
|
||||
" ldr r1, svchandler_address_const \n"
|
||||
" bx r1 \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
"svchandler_address_const: .word vPortSVCHandler_C \n"
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,16 +22,15 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
|
@ -45,37 +42,271 @@
|
|||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef configENABLE_FPU
|
||||
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
|
||||
#endif /* configENABLE_FPU */
|
||||
|
||||
#ifndef configENABLE_MPU
|
||||
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#ifndef configENABLE_TRUSTZONE
|
||||
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Type definitions.
|
||||
*/
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* Architecture specifics.
|
||||
*/
|
||||
#define portARCH_NAME "Cortex-M33"
|
||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||
#define portARMV8M_MINOR_VERSION 0
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portNOP()
|
||||
#define portINLINE __inline
|
||||
#ifndef portFORCE_INLINE
|
||||
#define portFORCE_INLINE inline __attribute__( ( always_inline ) )
|
||||
#endif
|
||||
#define portHAS_STACK_OVERFLOW_CHECKING 1
|
||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ARMv8-M common port configurations. */
|
||||
#include "portmacrocommon.h"
|
||||
/**
|
||||
* @brief Extern declarations.
|
||||
*/
|
||||
extern BaseType_t xPortIsInsideInterrupt( void );
|
||||
|
||||
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
|
||||
extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
|
||||
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#ifndef configENABLE_MVE
|
||||
#define configENABLE_MVE 0
|
||||
#elif ( configENABLE_MVE != 0 )
|
||||
#error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M33.
|
||||
#endif
|
||||
/**
|
||||
* @brief MPU specific constants.
|
||||
*/
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
#define portUSING_MPU_WRAPPERS 1
|
||||
#define portPRIVILEGE_BIT ( 0x80000000UL )
|
||||
#else
|
||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
|
||||
/* MPU regions. */
|
||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||
#define portUNPRIVILEGED_FLASH_REGION ( 1UL )
|
||||
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
|
||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||
#define portSTACK_REGION ( 4UL )
|
||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||
|
||||
/* Device memory attributes used in MPU_MAIR registers.
|
||||
*
|
||||
* 8-bit values encoded as follows:
|
||||
* Bit[7:4] - 0000 - Device Memory
|
||||
* Bit[3:2] - 00 --> Device-nGnRnE
|
||||
* 01 --> Device-nGnRE
|
||||
* 10 --> Device-nGRE
|
||||
* 11 --> Device-GRE
|
||||
* Bit[1:0] - 00, Reserved.
|
||||
*/
|
||||
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
|
||||
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
|
||||
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
|
||||
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
|
||||
|
||||
/* Normal memory attributes used in MPU_MAIR registers. */
|
||||
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
|
||||
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
|
||||
|
||||
/* Attributes used in MPU_RBAR registers. */
|
||||
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
|
||||
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
|
||||
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
|
||||
|
||||
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
|
||||
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
|
||||
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
|
||||
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
|
||||
|
||||
#define portMPU_REGION_EXECUTE_NEVER ( 1UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Settings to define an MPU region.
|
||||
*/
|
||||
typedef struct MPURegionSettings
|
||||
{
|
||||
uint32_t ulRBAR; /**< RBAR for the region. */
|
||||
uint32_t ulRLAR; /**< RLAR for the region. */
|
||||
} MPURegionSettings_t;
|
||||
|
||||
/**
|
||||
* @brief MPU settings as stored in the TCB.
|
||||
*/
|
||||
typedef struct MPU_SETTINGS
|
||||
{
|
||||
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
|
||||
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
|
||||
} xMPU_SETTINGS;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief SVC numbers.
|
||||
*/
|
||||
#define portSVC_ALLOCATE_SECURE_CONTEXT 0
|
||||
#define portSVC_FREE_SECURE_CONTEXT 1
|
||||
#define portSVC_START_SCHEDULER 2
|
||||
#define portSVC_RAISE_PRIVILEGE 3
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Scheduler utilities.
|
||||
*/
|
||||
#define portYIELD() vPortYield()
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Critical section management.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
|
||||
#define portDISABLE_INTERRUPTS() ulSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 )
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Tickless idle/low power functionality.
|
||||
*/
|
||||
#ifndef portSUPPRESS_TICKS_AND_SLEEP
|
||||
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Task function macros as described on the FreeRTOS.org WEB site.
|
||||
*/
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
|
||||
/**
|
||||
* @brief Allocate a secure context for the task.
|
||||
*
|
||||
* Tasks are not created with a secure context. Any task that is going to call
|
||||
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
|
||||
* secure context before it calls any secure function.
|
||||
*
|
||||
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
|
||||
*/
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
|
||||
|
||||
/**
|
||||
* @brief Called when a task is deleted to delete the task's secure context,
|
||||
* if it has one.
|
||||
*
|
||||
* @param[in] pxTCB The TCB of the task being deleted.
|
||||
*/
|
||||
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
|
||||
#else
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
|
||||
#define portCLEAN_UP_TCB( pxTCB )
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
/**
|
||||
* @brief Checks whether or not the processor is privileged.
|
||||
*
|
||||
* @return 1 if the processor is already privileged, 0 otherwise.
|
||||
*/
|
||||
#define portIS_PRIVILEGED() xIsPrivileged()
|
||||
|
||||
/**
|
||||
* @brief Raise an SVC request to raise privilege.
|
||||
*
|
||||
* The SVC handler checks that the SVC was raised from a system call and only
|
||||
* then it raises the privilege. If this is called from any other place,
|
||||
* the privilege is not raised.
|
||||
*/
|
||||
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
|
||||
|
||||
/**
|
||||
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
|
||||
* register.
|
||||
*/
|
||||
#define portRESET_PRIVILEGE() vResetPrivilege()
|
||||
#else
|
||||
#define portIS_PRIVILEGED()
|
||||
#define portRAISE_PRIVILEGE()
|
||||
#define portRESET_PRIVILEGE()
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Barriers.
|
||||
*/
|
||||
#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
|||
|
|
@ -1,81 +0,0 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the given hardware
|
||||
* and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/**
|
||||
* Architecture specifics.
|
||||
*/
|
||||
#define portARCH_NAME "Cortex-M35P"
|
||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||
#define portARMV8M_MINOR_VERSION 0
|
||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ARMv8-M common port configurations. */
|
||||
#include "portmacrocommon.h"
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#ifndef configENABLE_MVE
|
||||
#define configENABLE_MVE 0
|
||||
#elif ( configENABLE_MVE != 0 )
|
||||
#error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M35.
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Critical section management.
|
||||
*/
|
||||
#define portDISABLE_INTERRUPTS() ulSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
@ -1,79 +0,0 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the given hardware
|
||||
* and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef configENABLE_MVE
|
||||
#error configENABLE_MVE must be defined in FreeRTOSConfig.h. Set configENABLE_MVE to 1 to enable the MVE or 0 to disable the MVE.
|
||||
#endif /* configENABLE_MVE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* Architecture specifics.
|
||||
*/
|
||||
#define portARCH_NAME "Cortex-M55"
|
||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||
#define portARMV8M_MINOR_VERSION 1
|
||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ARMv8-M common port configurations. */
|
||||
#include "portmacrocommon.h"
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Critical section management.
|
||||
*/
|
||||
#define portDISABLE_INTERRUPTS() ulSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
@ -1,79 +0,0 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the given hardware
|
||||
* and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef configENABLE_MVE
|
||||
#error configENABLE_MVE must be defined in FreeRTOSConfig.h. Set configENABLE_MVE to 1 to enable the MVE or 0 to disable the MVE.
|
||||
#endif /* configENABLE_MVE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* Architecture specifics.
|
||||
*/
|
||||
#define portARCH_NAME "Cortex-M85"
|
||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||
#define portARMV8M_MINOR_VERSION 1
|
||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ARMv8-M common port configurations. */
|
||||
#include "portmacrocommon.h"
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Critical section management.
|
||||
*/
|
||||
#define portDISABLE_INTERRUPTS() ulSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,6 +22,7 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* Including FreeRTOSConfig.h here will cause build errors if the header file
|
||||
|
|
@ -33,24 +32,12 @@ the code is included in C files but excluded by the preprocessor in assembly
|
|||
files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
|
||||
#include "FreeRTOSConfig.h"
|
||||
|
||||
/* System call numbers includes. */
|
||||
#include "mpu_syscall_numbers.h"
|
||||
|
||||
#ifndef configUSE_MPU_WRAPPERS_V1
|
||||
#define configUSE_MPU_WRAPPERS_V1 0
|
||||
#endif
|
||||
|
||||
|
||||
EXTERN pxCurrentTCB
|
||||
EXTERN xSecureContext
|
||||
EXTERN vTaskSwitchContext
|
||||
EXTERN vPortSVCHandler_C
|
||||
EXTERN SecureContext_SaveContext
|
||||
EXTERN SecureContext_LoadContext
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
EXTERN vSystemCallEnter
|
||||
EXTERN vSystemCallExit
|
||||
#endif
|
||||
|
||||
PUBLIC xIsPrivileged
|
||||
PUBLIC vResetPrivilege
|
||||
|
|
@ -98,7 +85,7 @@ vResetPrivilege:
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortAllocateSecureContext:
|
||||
svc 100 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */
|
||||
svc 0 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */
|
||||
bx lr /* Return. */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -110,108 +97,75 @@ vPortAllocateSecureContext:
|
|||
THUMB
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
vRestoreContextOfFirstTask:
|
||||
program_mpu_first_task:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r3] /* r0 = pxCurrentTCB.*/
|
||||
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
movs r3, #1 /* r3 = 1. */
|
||||
bics r2, r3 /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
|
||||
str r2, [r1] /* Disable MPU. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
ldr r1, [r0] /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r1, [r2] /* Program MAIR0. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
ldr r1, =0xe000ed98 /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
|
||||
movs r3, #4 /* r3 = 4. */
|
||||
str r3, [r1] /* Program RNR = 4. */
|
||||
ldmia r0!, {r4-r5} /* Read first set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write first set of RBAR/RLAR registers. */
|
||||
movs r3, #5 /* r3 = 5. */
|
||||
str r3, [r1] /* Program RNR = 5. */
|
||||
ldmia r0!, {r4-r5} /* Read second set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write second set of RBAR/RLAR registers. */
|
||||
movs r3, #6 /* r3 = 6. */
|
||||
str r3, [r1] /* Program RNR = 6. */
|
||||
ldmia r0!, {r4-r5} /* Read third set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write third set of RBAR/RLAR registers. */
|
||||
movs r3, #7 /* r3 = 6. */
|
||||
str r3, [r1] /* Program RNR = 7. */
|
||||
ldmia r0!, {r4-r5} /* Read fourth set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write fourth set of RBAR/RLAR registers. */
|
||||
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
movs r3, #1 /* r3 = 1. */
|
||||
orrs r2, r3 /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
|
||||
str r2, [r1] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
restore_context_first_task:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* r1 = pxCurrentTCB.*/
|
||||
ldr r2, [r1] /* r2 = Location of saved context in TCB. */
|
||||
|
||||
restore_special_regs_first_task:
|
||||
subs r2, #20
|
||||
ldmia r2!, {r0, r3-r6} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */
|
||||
subs r2, #20
|
||||
msr psp, r3
|
||||
msr control, r5
|
||||
mov lr, r6
|
||||
ldr r4, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
str r0, [r4] /* Restore xSecureContext. */
|
||||
|
||||
restore_general_regs_first_task:
|
||||
subs r2, #32
|
||||
ldmia r2!, {r4-r7} /* r4-r7 contain half of the hardware saved context. */
|
||||
stmia r3!, {r4-r7} /* Copy half of the the hardware saved context on the task stack. */
|
||||
ldmia r2!, {r4-r7} /* r4-r7 contain rest half of the hardware saved context. */
|
||||
stmia r3!, {r4-r7} /* Copy rest half of the the hardware saved context on the task stack. */
|
||||
subs r2, #48
|
||||
ldmia r2!, {r4-r7} /* Restore r8-r11. */
|
||||
mov r8, r4 /* r8 = r4. */
|
||||
mov r9, r5 /* r9 = r5. */
|
||||
mov r10, r6 /* r10 = r6. */
|
||||
mov r11, r7 /* r11 = r7. */
|
||||
subs r2, #32
|
||||
ldmia r2!, {r4-r7} /* Restore r4-r7. */
|
||||
subs r2, #16
|
||||
|
||||
restore_context_done_first_task:
|
||||
str r2, [r1] /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
bx lr
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
vRestoreContextOfFirstTask:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r3, [r2] /* Read pxCurrentTCB. */
|
||||
ldr r0, [r3] /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r2] /* Read the value of MPU_CTRL. */
|
||||
movs r5, #1 /* r5 = 1. */
|
||||
bics r4, r5 /* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
|
||||
str r4, [r2] /* Disable MPU. */
|
||||
|
||||
adds r3, #4 /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
|
||||
ldr r4, [r3] /* r4 = *r3 i.e. r4 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r4, [r2] /* Program MAIR0. */
|
||||
ldr r2, =0xe000ed98 /* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
adds r3, #4 /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
|
||||
movs r5, #4 /* r5 = 4. */
|
||||
str r5, [r2] /* Program RNR = 4. */
|
||||
ldmia r3!, {r6,r7} /* Read first set of RBAR/RLAR from TCB. */
|
||||
ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r4!, {r6,r7} /* Write first set of RBAR/RLAR registers. */
|
||||
movs r5, #5 /* r5 = 5. */
|
||||
str r5, [r2] /* Program RNR = 5. */
|
||||
ldmia r3!, {r6,r7} /* Read second set of RBAR/RLAR from TCB. */
|
||||
ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r4!, {r6,r7} /* Write second set of RBAR/RLAR registers. */
|
||||
movs r5, #6 /* r5 = 6. */
|
||||
str r5, [r2] /* Program RNR = 6. */
|
||||
ldmia r3!, {r6,r7} /* Read third set of RBAR/RLAR from TCB. */
|
||||
ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r4!, {r6,r7} /* Write third set of RBAR/RLAR registers. */
|
||||
movs r5, #7 /* r5 = 7. */
|
||||
str r5, [r2] /* Program RNR = 7. */
|
||||
ldmia r3!, {r6,r7} /* Read fourth set of RBAR/RLAR from TCB. */
|
||||
ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r4!, {r6,r7} /* Write fourth set of RBAR/RLAR registers. */
|
||||
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r2] /* Read the value of MPU_CTRL. */
|
||||
movs r5, #1 /* r5 = 1. */
|
||||
orrs r4, r5 /* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
|
||||
str r4, [r2] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
ldm r0!, {r1-r4} /* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
|
||||
ldr r5, =xSecureContext
|
||||
str r1, [r5] /* Set xSecureContext to this task's value for the same. */
|
||||
msr psplim, r2 /* Set this task's PSPLIM value. */
|
||||
msr control, r3 /* Set this task's CONTROL value. */
|
||||
adds r0, #32 /* Discard everything up to r0. */
|
||||
msr psp, r0 /* This is now the new top of stack to use in the task. */
|
||||
isb
|
||||
bx r4 /* Finally, branch to EXC_RETURN. */
|
||||
#else /* configENABLE_MPU */
|
||||
ldm r0!, {r1-r3} /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
|
||||
ldr r4, =xSecureContext
|
||||
str r1, [r4] /* Set xSecureContext to this task's value for the same. */
|
||||
msr psplim, r2 /* Set this task's PSPLIM value. */
|
||||
movs r1, #2 /* r1 = 2. */
|
||||
msr CONTROL, r1 /* Switch to use PSP in the thread mode. */
|
||||
adds r0, #32 /* Discard everything up to r0. */
|
||||
msr psp, r0 /* This is now the new top of stack to use in the task. */
|
||||
isb
|
||||
bx r3 /* Finally, branch to EXC_RETURN. */
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -231,7 +185,7 @@ vStartFirstTask:
|
|||
cpsie i /* Globally enable interrupts. */
|
||||
dsb
|
||||
isb
|
||||
svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */
|
||||
svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
ulSetInterruptMask:
|
||||
|
|
@ -244,148 +198,6 @@ vClearInterruptMask:
|
|||
msr PRIMASK, r0
|
||||
bx lr
|
||||
/*-----------------------------------------------------------*/
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
PendSV_Handler:
|
||||
ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
ldr r0, [r3] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/
|
||||
ldr r2, [r1] /* r2 = Location in TCB where the context should be saved. */
|
||||
|
||||
cbz r0, save_ns_context /* No secure context to save. */
|
||||
save_s_context:
|
||||
push {r0-r2, lr}
|
||||
bl SecureContext_SaveContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
pop {r0-r3} /* LR is now in r3. */
|
||||
mov lr, r3 /* Restore LR. */
|
||||
|
||||
save_ns_context:
|
||||
mov r3, lr /* r3 = LR (EXC_RETURN). */
|
||||
lsls r3, r3, #25 /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
bmi save_special_regs /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
|
||||
|
||||
save_general_regs:
|
||||
mrs r3, psp
|
||||
stmia r2!, {r4-r7} /* Store r4-r7. */
|
||||
mov r4, r8 /* r4 = r8. */
|
||||
mov r5, r9 /* r5 = r9. */
|
||||
mov r6, r10 /* r6 = r10. */
|
||||
mov r7, r11 /* r7 = r11. */
|
||||
stmia r2!, {r4-r7} /* Store r8-r11. */
|
||||
ldmia r3!, {r4-r7} /* Copy half of the hardware saved context into r4-r7. */
|
||||
stmia r2!, {r4-r7} /* Store the hardware saved context. */
|
||||
ldmia r3!, {r4-r7} /* Copy rest half of the hardware saved context into r4-r7. */
|
||||
stmia r2!, {r4-r7} /* Store the hardware saved context. */
|
||||
|
||||
save_special_regs:
|
||||
mrs r3, psp /* r3 = PSP. */
|
||||
movs r4, #0 /* r4 = 0. 0 is stored in the PSPLIM slot. */
|
||||
mrs r5, control /* r5 = CONTROL. */
|
||||
mov r6, lr /* r6 = LR. */
|
||||
stmia r2!, {r0, r3-r6} /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
|
||||
str r2, [r1] /* Save the location from where the context should be restored as the first member of TCB. */
|
||||
|
||||
select_next_task:
|
||||
cpsid i
|
||||
bl vTaskSwitchContext
|
||||
cpsie i
|
||||
|
||||
program_mpu:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r3] /* r0 = pxCurrentTCB.*/
|
||||
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
movs r3, #1 /* r3 = 1. */
|
||||
bics r2, r3 /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
|
||||
str r2, [r1] /* Disable MPU. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
ldr r1, [r0] /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r1, [r2] /* Program MAIR0. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
ldr r1, =0xe000ed98 /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
|
||||
movs r3, #4 /* r3 = 4. */
|
||||
str r3, [r1] /* Program RNR = 4. */
|
||||
ldmia r0!, {r4-r5} /* Read first set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write first set of RBAR/RLAR registers. */
|
||||
movs r3, #5 /* r3 = 5. */
|
||||
str r3, [r1] /* Program RNR = 5. */
|
||||
ldmia r0!, {r4-r5} /* Read second set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write second set of RBAR/RLAR registers. */
|
||||
movs r3, #6 /* r3 = 6. */
|
||||
str r3, [r1] /* Program RNR = 6. */
|
||||
ldmia r0!, {r4-r5} /* Read third set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write third set of RBAR/RLAR registers. */
|
||||
movs r3, #7 /* r3 = 6. */
|
||||
str r3, [r1] /* Program RNR = 7. */
|
||||
ldmia r0!, {r4-r5} /* Read fourth set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write fourth set of RBAR/RLAR registers. */
|
||||
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
movs r3, #1 /* r3 = 1. */
|
||||
orrs r2, r3 /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
|
||||
str r2, [r1] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
restore_context:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* r1 = pxCurrentTCB.*/
|
||||
ldr r2, [r1] /* r2 = Location of saved context in TCB. */
|
||||
|
||||
restore_special_regs:
|
||||
subs r2, #20
|
||||
ldmia r2!, {r0, r3-r6} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */
|
||||
subs r2, #20
|
||||
msr psp, r3
|
||||
msr control, r5
|
||||
mov lr, r6
|
||||
ldr r4, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
str r0, [r4] /* Restore xSecureContext. */
|
||||
cbz r0, restore_ns_context /* No secure context to restore. */
|
||||
|
||||
restore_s_context:
|
||||
push {r1-r3, lr}
|
||||
bl SecureContext_LoadContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
pop {r1-r4} /* LR is now in r4. */
|
||||
mov lr, r4
|
||||
|
||||
restore_ns_context:
|
||||
mov r0, lr /* r0 = LR (EXC_RETURN). */
|
||||
lsls r0, r0, #25 /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
bmi restore_context_done /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
|
||||
|
||||
restore_general_regs:
|
||||
subs r2, #32
|
||||
ldmia r2!, {r4-r7} /* r4-r7 contain half of the hardware saved context. */
|
||||
stmia r3!, {r4-r7} /* Copy half of the the hardware saved context on the task stack. */
|
||||
ldmia r2!, {r4-r7} /* r4-r7 contain rest half of the hardware saved context. */
|
||||
stmia r3!, {r4-r7} /* Copy rest half of the the hardware saved context on the task stack. */
|
||||
subs r2, #48
|
||||
ldmia r2!, {r4-r7} /* Restore r8-r11. */
|
||||
mov r8, r4 /* r8 = r4. */
|
||||
mov r9, r5 /* r9 = r5. */
|
||||
mov r10, r6 /* r10 = r6. */
|
||||
mov r11, r7 /* r11 = r7. */
|
||||
subs r2, #32
|
||||
ldmia r2!, {r4-r7} /* Restore r4-r7. */
|
||||
subs r2, #16
|
||||
|
||||
restore_context_done:
|
||||
str r2, [r1] /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
bx lr
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
PendSV_Handler:
|
||||
ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
|
|
@ -403,21 +215,44 @@ PendSV_Handler:
|
|||
bpl save_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* Read pxCurrentTCB. */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
subs r2, r2, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
str r2, [r1] /* Save the new top of stack in TCB. */
|
||||
mrs r1, psplim /* r1 = PSPLIM. */
|
||||
mrs r3, control /* r3 = CONTROL. */
|
||||
mov r4, lr /* r4 = LR/EXC_RETURN. */
|
||||
stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
#else /* configENABLE_MPU */
|
||||
subs r2, r2, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */
|
||||
str r2, [r1] /* Save the new top of stack in TCB. */
|
||||
movs r1, #0 /* r1 = 0. 0 is stored in the PSPLIM slot. */
|
||||
mrs r1, psplim /* r1 = PSPLIM. */
|
||||
mov r3, lr /* r3 = LR/EXC_RETURN. */
|
||||
stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
b select_next_task
|
||||
|
||||
save_ns_context:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* Read pxCurrentTCB. */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
subs r2, r2, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
|
||||
str r2, [r1] /* Save the new top of stack in TCB. */
|
||||
adds r2, r2, #16 /* r2 = r2 + 16. */
|
||||
stmia r2!, {r4-r7} /* Store the low registers that are not saved automatically. */
|
||||
mov r4, r8 /* r4 = r8. */
|
||||
mov r5, r9 /* r5 = r9. */
|
||||
mov r6, r10 /* r6 = r10. */
|
||||
mov r7, r11 /* r7 = r11. */
|
||||
stmia r2!, {r4-r7} /* Store the high registers that are not saved automatically. */
|
||||
mrs r1, psplim /* r1 = PSPLIM. */
|
||||
mrs r3, control /* r3 = CONTROL. */
|
||||
mov r4, lr /* r4 = LR/EXC_RETURN. */
|
||||
subs r2, r2, #48 /* r2 = r2 - 48. */
|
||||
stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
#else /* configENABLE_MPU */
|
||||
subs r2, r2, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
|
||||
str r2, [r1] /* Save the new top of stack in TCB. */
|
||||
movs r1, #0 /* r1 = 0. 0 is stored in the PSPLIM slot. */
|
||||
mrs r1, psplim /* r1 = PSPLIM. */
|
||||
mov r3, lr /* r3 = LR/EXC_RETURN. */
|
||||
stmia r2!, {r0, r1, r3-r7} /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
|
||||
mov r4, r8 /* r4 = r8. */
|
||||
|
|
@ -425,6 +260,7 @@ PendSV_Handler:
|
|||
mov r6, r10 /* r6 = r10. */
|
||||
mov r7, r11 /* r7 = r11. */
|
||||
stmia r2!, {r4-r7} /* Store the high registers that are not saved automatically. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
select_next_task:
|
||||
cpsid i
|
||||
|
|
@ -435,7 +271,53 @@ PendSV_Handler:
|
|||
ldr r1, [r3] /* Read pxCurrentTCB. */
|
||||
ldr r2, [r1] /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
|
||||
|
||||
ldmia r2!, {r0, r1, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r3] /* Read the value of MPU_CTRL. */
|
||||
movs r5, #1 /* r5 = 1. */
|
||||
bics r4, r5 /* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
|
||||
str r4, [r3] /* Disable MPU. */
|
||||
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
ldr r4, [r1] /* r4 = *r1 i.e. r4 = MAIR0. */
|
||||
ldr r3, =0xe000edc0 /* r3 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r4, [r3] /* Program MAIR0. */
|
||||
ldr r4, =0xe000ed98 /* r4 = 0xe000ed98 [Location of RNR]. */
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
movs r5, #4 /* r5 = 4. */
|
||||
str r5, [r4] /* Program RNR = 4. */
|
||||
ldmia r1!, {r6,r7} /* Read first set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r6,r7} /* Write first set of RBAR/RLAR registers. */
|
||||
movs r5, #5 /* r5 = 5. */
|
||||
str r5, [r4] /* Program RNR = 5. */
|
||||
ldmia r1!, {r6,r7} /* Read second set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r6,r7} /* Write second set of RBAR/RLAR registers. */
|
||||
movs r5, #6 /* r5 = 6. */
|
||||
str r5, [r4] /* Program RNR = 6. */
|
||||
ldmia r1!, {r6,r7} /* Read third set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r6,r7} /* Write third set of RBAR/RLAR registers. */
|
||||
movs r5, #7 /* r5 = 7. */
|
||||
str r5, [r4] /* Program RNR = 7. */
|
||||
ldmia r1!, {r6,r7} /* Read fourth set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r6,r7} /* Write fourth set of RBAR/RLAR registers. */
|
||||
|
||||
ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r3] /* Read the value of MPU_CTRL. */
|
||||
movs r5, #1 /* r5 = 1. */
|
||||
orrs r4, r5 /* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
|
||||
str r4, [r3] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
ldmia r2!, {r0, r1, r3, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */
|
||||
msr psplim, r1 /* Restore the PSPLIM register value for the task. */
|
||||
msr control, r3 /* Restore the CONTROL register value for the task. */
|
||||
mov lr, r4 /* LR = r4. */
|
||||
ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
str r0, [r3] /* Restore the task's xSecureContext. */
|
||||
|
|
@ -450,6 +332,24 @@ PendSV_Handler:
|
|||
bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
msr psp, r2 /* Remember the new top of stack for the task. */
|
||||
bx lr
|
||||
#else /* configENABLE_MPU */
|
||||
ldmia r2!, {r0, r1, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
|
||||
msr psplim, r1 /* Restore the PSPLIM register value for the task. */
|
||||
mov lr, r4 /* LR = r4. */
|
||||
ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
str r0, [r3] /* Restore the task's xSecureContext. */
|
||||
cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* Read pxCurrentTCB. */
|
||||
push {r2, r4}
|
||||
bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
pop {r2, r4}
|
||||
mov lr, r4 /* LR = r4. */
|
||||
lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
msr psp, r2 /* Remember the new top of stack for the task. */
|
||||
bx lr
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
restore_ns_context:
|
||||
adds r2, r2, #16 /* Move to the high registers. */
|
||||
|
|
@ -462,41 +362,8 @@ PendSV_Handler:
|
|||
subs r2, r2, #32 /* Go back to the low registers. */
|
||||
ldmia r2!, {r4-r7} /* Restore the low registers that are not automatically restored. */
|
||||
bx lr
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
|
||||
SVC_Handler:
|
||||
movs r0, #4
|
||||
mov r1, lr
|
||||
tst r0, r1
|
||||
beq stack_on_msp
|
||||
stack_on_psp:
|
||||
mrs r0, psp
|
||||
b route_svc
|
||||
stack_on_msp:
|
||||
mrs r0, msp
|
||||
b route_svc
|
||||
|
||||
route_svc:
|
||||
ldr r3, [r0, #24]
|
||||
subs r3, #2
|
||||
ldrb r2, [r3, #0]
|
||||
cmp r2, #NUM_SYSTEM_CALLS
|
||||
blt system_call_enter
|
||||
cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */
|
||||
beq system_call_exit
|
||||
b vPortSVCHandler_C
|
||||
|
||||
system_call_enter:
|
||||
b vSystemCallEnter
|
||||
system_call_exit:
|
||||
b vSystemCallExit
|
||||
|
||||
#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
SVC_Handler:
|
||||
movs r0, #4
|
||||
mov r1, lr
|
||||
|
|
@ -507,8 +374,6 @@ SVC_Handler:
|
|||
stacking_used_msp:
|
||||
mrs r0, msp
|
||||
b vPortSVCHandler_C
|
||||
|
||||
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortFreeSecureContext:
|
||||
|
|
@ -518,7 +383,7 @@ vPortFreeSecureContext:
|
|||
bne free_secure_context /* Branch if r1 != 0. */
|
||||
bx lr /* There is no secure context (xSecureContext is NULL). */
|
||||
free_secure_context:
|
||||
svc 101 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */
|
||||
svc 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */
|
||||
bx lr /* Return. */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,16 +22,15 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
|
@ -45,35 +42,267 @@
|
|||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef configENABLE_FPU
|
||||
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
|
||||
#endif /* configENABLE_FPU */
|
||||
|
||||
#ifndef configENABLE_MPU
|
||||
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#ifndef configENABLE_TRUSTZONE
|
||||
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Type definitions.
|
||||
*/
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* Architecture specifics.
|
||||
*/
|
||||
#define portARCH_NAME "Cortex-M23"
|
||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||
#define portARMV8M_MINOR_VERSION 0
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portNOP()
|
||||
#define portINLINE __inline
|
||||
#ifndef portFORCE_INLINE
|
||||
#define portFORCE_INLINE inline __attribute__( ( always_inline ) )
|
||||
#endif
|
||||
#define portHAS_STACK_OVERFLOW_CHECKING 1
|
||||
#define portDONT_DISCARD __root
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ARMv8-M common port configurations. */
|
||||
#include "portmacrocommon.h"
|
||||
/**
|
||||
* @brief Extern declarations.
|
||||
*/
|
||||
extern BaseType_t xPortIsInsideInterrupt( void );
|
||||
|
||||
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
|
||||
extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
|
||||
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
#error 16 MPU regions are not yet supported for this port.
|
||||
#endif
|
||||
/**
|
||||
* @brief MPU specific constants.
|
||||
*/
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
#define portUSING_MPU_WRAPPERS 1
|
||||
#define portPRIVILEGE_BIT ( 0x80000000UL )
|
||||
#else
|
||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#ifndef configENABLE_MVE
|
||||
#define configENABLE_MVE 0
|
||||
#elif ( configENABLE_MVE != 0 )
|
||||
#error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M23.
|
||||
|
||||
/* MPU regions. */
|
||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||
#define portUNPRIVILEGED_FLASH_REGION ( 1UL )
|
||||
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
|
||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||
#define portSTACK_REGION ( 4UL )
|
||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||
|
||||
/* Device memory attributes used in MPU_MAIR registers.
|
||||
*
|
||||
* 8-bit values encoded as follows:
|
||||
* Bit[7:4] - 0000 - Device Memory
|
||||
* Bit[3:2] - 00 --> Device-nGnRnE
|
||||
* 01 --> Device-nGnRE
|
||||
* 10 --> Device-nGRE
|
||||
* 11 --> Device-GRE
|
||||
* Bit[1:0] - 00, Reserved.
|
||||
*/
|
||||
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
|
||||
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
|
||||
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
|
||||
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
|
||||
|
||||
/* Normal memory attributes used in MPU_MAIR registers. */
|
||||
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
|
||||
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
|
||||
|
||||
/* Attributes used in MPU_RBAR registers. */
|
||||
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
|
||||
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
|
||||
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
|
||||
|
||||
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
|
||||
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
|
||||
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
|
||||
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
|
||||
|
||||
#define portMPU_REGION_EXECUTE_NEVER ( 1UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Settings to define an MPU region.
|
||||
*/
|
||||
typedef struct MPURegionSettings
|
||||
{
|
||||
uint32_t ulRBAR; /**< RBAR for the region. */
|
||||
uint32_t ulRLAR; /**< RLAR for the region. */
|
||||
} MPURegionSettings_t;
|
||||
|
||||
/**
|
||||
* @brief MPU settings as stored in the TCB.
|
||||
*/
|
||||
typedef struct MPU_SETTINGS
|
||||
{
|
||||
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
|
||||
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
|
||||
} xMPU_SETTINGS;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief SVC numbers.
|
||||
*/
|
||||
#define portSVC_ALLOCATE_SECURE_CONTEXT 0
|
||||
#define portSVC_FREE_SECURE_CONTEXT 1
|
||||
#define portSVC_START_SCHEDULER 2
|
||||
#define portSVC_RAISE_PRIVILEGE 3
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Scheduler utilities.
|
||||
*/
|
||||
#define portYIELD() vPortYield()
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Tickless idle/low power functionality.
|
||||
*/
|
||||
#ifndef portSUPPRESS_TICKS_AND_SLEEP
|
||||
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Critical section management.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
|
||||
#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
|
||||
#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Task function macros as described on the FreeRTOS.org WEB site.
|
||||
*/
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
|
||||
/**
|
||||
* @brief Allocate a secure context for the task.
|
||||
*
|
||||
* Tasks are not created with a secure context. Any task that is going to call
|
||||
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
|
||||
* secure context before it calls any secure function.
|
||||
*
|
||||
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
|
||||
*/
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
|
||||
|
||||
/**
|
||||
* @brief Called when a task is deleted to delete the task's secure context,
|
||||
* if it has one.
|
||||
*
|
||||
* @param[in] pxTCB The TCB of the task being deleted.
|
||||
*/
|
||||
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
|
||||
#else
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
|
||||
#define portCLEAN_UP_TCB( pxTCB )
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
/**
|
||||
* @brief Checks whether or not the processor is privileged.
|
||||
*
|
||||
* @return 1 if the processor is already privileged, 0 otherwise.
|
||||
*/
|
||||
#define portIS_PRIVILEGED() xIsPrivileged()
|
||||
|
||||
/**
|
||||
* @brief Raise an SVC request to raise privilege.
|
||||
*
|
||||
* The SVC handler checks that the SVC was raised from a system call and only
|
||||
* then it raises the privilege. If this is called from any other place,
|
||||
* the privilege is not raised.
|
||||
*/
|
||||
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
|
||||
|
||||
/**
|
||||
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
|
||||
* register.
|
||||
*/
|
||||
#define portRESET_PRIVILEGE() vResetPrivilege()
|
||||
#else
|
||||
#define portIS_PRIVILEGED()
|
||||
#define portRAISE_PRIVILEGE()
|
||||
#define portRESET_PRIVILEGE()
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Barriers.
|
||||
*/
|
||||
#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
|
||||
|
|
@ -83,10 +312,8 @@
|
|||
#pragma diag_suppress=Pa082
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,6 +22,7 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
/* Including FreeRTOSConfig.h here will cause build errors if the header file
|
||||
contains code not understood by the assembler - for example the 'extern' keyword.
|
||||
|
|
@ -32,24 +31,9 @@ the code is included in C files but excluded by the preprocessor in assembly
|
|||
files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
|
||||
#include "FreeRTOSConfig.h"
|
||||
|
||||
/* System call numbers includes. */
|
||||
#include "mpu_syscall_numbers.h"
|
||||
|
||||
#ifndef configUSE_MPU_WRAPPERS_V1
|
||||
#define configUSE_MPU_WRAPPERS_V1 0
|
||||
#endif
|
||||
|
||||
#ifndef configRUN_FREERTOS_SECURE_ONLY
|
||||
#define configRUN_FREERTOS_SECURE_ONLY 0
|
||||
#endif
|
||||
|
||||
EXTERN pxCurrentTCB
|
||||
EXTERN vTaskSwitchContext
|
||||
EXTERN vPortSVCHandler_C
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
EXTERN vSystemCallEnter
|
||||
EXTERN vSystemCallExit
|
||||
#endif
|
||||
|
||||
PUBLIC xIsPrivileged
|
||||
PUBLIC vResetPrivilege
|
||||
|
|
@ -103,110 +87,71 @@ vResetPrivilege:
|
|||
THUMB
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
vRestoreContextOfFirstTask:
|
||||
program_mpu_first_task:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r3] /* r0 = pxCurrentTCB.*/
|
||||
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
movs r3, #1 /* r3 = 1. */
|
||||
bics r2, r3 /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
|
||||
str r2, [r1] /* Disable MPU. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
ldr r1, [r0] /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r1, [r2] /* Program MAIR0. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
ldr r1, =0xe000ed98 /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
|
||||
movs r3, #4 /* r3 = 4. */
|
||||
str r3, [r1] /* Program RNR = 4. */
|
||||
ldmia r0!, {r4-r5} /* Read first set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write first set of RBAR/RLAR registers. */
|
||||
movs r3, #5 /* r3 = 5. */
|
||||
str r3, [r1] /* Program RNR = 5. */
|
||||
ldmia r0!, {r4-r5} /* Read second set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write second set of RBAR/RLAR registers. */
|
||||
movs r3, #6 /* r3 = 6. */
|
||||
str r3, [r1] /* Program RNR = 6. */
|
||||
ldmia r0!, {r4-r5} /* Read third set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write third set of RBAR/RLAR registers. */
|
||||
movs r3, #7 /* r3 = 6. */
|
||||
str r3, [r1] /* Program RNR = 7. */
|
||||
ldmia r0!, {r4-r5} /* Read fourth set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write fourth set of RBAR/RLAR registers. */
|
||||
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
movs r3, #1 /* r3 = 1. */
|
||||
orrs r2, r3 /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
|
||||
str r2, [r1] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
restore_context_first_task:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r2] /* r0 = pxCurrentTCB.*/
|
||||
ldr r1, [r0] /* r1 = Location of saved context in TCB. */
|
||||
|
||||
restore_special_regs_first_task:
|
||||
subs r1, #16
|
||||
ldmia r1!, {r2-r5} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
|
||||
subs r1, #16
|
||||
msr psp, r2
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
msr psplim, r3
|
||||
#endif
|
||||
msr control, r4
|
||||
mov lr, r5
|
||||
|
||||
restore_general_regs_first_task:
|
||||
subs r1, #32
|
||||
ldmia r1!, {r4-r7} /* r4-r7 contain half of the hardware saved context. */
|
||||
stmia r2!, {r4-r7} /* Copy half of the the hardware saved context on the task stack. */
|
||||
ldmia r1!, {r4-r7} /* r4-r7 contain rest half of the hardware saved context. */
|
||||
stmia r2!, {r4-r7} /* Copy rest half of the the hardware saved context on the task stack. */
|
||||
subs r1, #48
|
||||
ldmia r1!, {r4-r7} /* Restore r8-r11. */
|
||||
mov r8, r4 /* r8 = r4. */
|
||||
mov r9, r5 /* r9 = r5. */
|
||||
mov r10, r6 /* r10 = r6. */
|
||||
mov r11, r7 /* r11 = r7. */
|
||||
subs r1, #32
|
||||
ldmia r1!, {r4-r7} /* Restore r4-r7. */
|
||||
subs r1, #16
|
||||
|
||||
restore_context_done_first_task:
|
||||
str r1, [r0] /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
bx lr
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
vRestoreContextOfFirstTask:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r2] /* Read pxCurrentTCB. */
|
||||
ldr r0, [r1] /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
|
||||
|
||||
ldm r0!, {r1-r2} /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r3, [r2] /* Read the value of MPU_CTRL. */
|
||||
movs r4, #1 /* r4 = 1. */
|
||||
bics r3, r4 /* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
|
||||
str r3, [r2] /* Disable MPU. */
|
||||
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
ldr r4, [r1] /* r4 = *r1 i.e. r4 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r4, [r2] /* Program MAIR0. */
|
||||
ldr r2, =0xe000ed98 /* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
movs r4, #4 /* r4 = 4. */
|
||||
str r4, [r2] /* Program RNR = 4. */
|
||||
ldmia r1!, {r5,r6} /* Read first set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r5,r6} /* Write first set of RBAR/RLAR registers. */
|
||||
movs r4, #5 /* r4 = 5. */
|
||||
str r4, [r2] /* Program RNR = 5. */
|
||||
ldmia r1!, {r5,r6} /* Read second set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r5,r6} /* Write second set of RBAR/RLAR registers. */
|
||||
movs r4, #6 /* r4 = 6. */
|
||||
str r4, [r2] /* Program RNR = 6. */
|
||||
ldmia r1!, {r5,r6} /* Read third set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r5,r6} /* Write third set of RBAR/RLAR registers. */
|
||||
movs r4, #7 /* r4 = 7. */
|
||||
str r4, [r2] /* Program RNR = 7. */
|
||||
ldmia r1!, {r5,r6} /* Read fourth set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r5,r6} /* Write fourth set of RBAR/RLAR registers. */
|
||||
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r3, [r2] /* Read the value of MPU_CTRL. */
|
||||
movs r4, #1 /* r4 = 1. */
|
||||
orrs r3, r4 /* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
|
||||
str r3, [r2] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
ldm r0!, {r1-r3} /* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
|
||||
msr psplim, r1 /* Set this task's PSPLIM value. */
|
||||
msr control, r2 /* Set this task's CONTROL value. */
|
||||
adds r0, #32 /* Discard everything up to r0. */
|
||||
msr psp, r0 /* This is now the new top of stack to use in the task. */
|
||||
isb
|
||||
bx r3 /* Finally, branch to EXC_RETURN. */
|
||||
#else /* configENABLE_MPU */
|
||||
ldm r0!, {r1-r2} /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
|
||||
msr psplim, r1 /* Set this task's PSPLIM value. */
|
||||
#endif
|
||||
movs r1, #2 /* r1 = 2. */
|
||||
msr CONTROL, r1 /* Switch to use PSP in the thread mode. */
|
||||
adds r0, #32 /* Discard everything up to r0. */
|
||||
msr psp, r0 /* This is now the new top of stack to use in the task. */
|
||||
isb
|
||||
bx r2 /* Finally, branch to EXC_RETURN. */
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -226,7 +171,7 @@ vStartFirstTask:
|
|||
cpsie i /* Globally enable interrupts. */
|
||||
dsb
|
||||
isb
|
||||
svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */
|
||||
svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */
|
||||
nop
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -241,140 +186,26 @@ vClearInterruptMask:
|
|||
bx lr
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
PendSV_Handler:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r2] /* r0 = pxCurrentTCB. */
|
||||
ldr r1, [r0] /* r1 = Location in TCB where the context should be saved. */
|
||||
mrs r2, psp /* r2 = PSP. */
|
||||
|
||||
save_general_regs:
|
||||
stmia r1!, {r4-r7} /* Store r4-r7. */
|
||||
mov r4, r8 /* r4 = r8. */
|
||||
mov r5, r9 /* r5 = r9. */
|
||||
mov r6, r10 /* r6 = r10. */
|
||||
mov r7, r11 /* r7 = r11. */
|
||||
stmia r1!, {r4-r7} /* Store r8-r11. */
|
||||
ldmia r2!, {r4-r7} /* Copy half of the hardware saved context into r4-r7. */
|
||||
stmia r1!, {r4-r7} /* Store the hardware saved context. */
|
||||
ldmia r2!, {r4-r7} /* Copy rest half of the hardware saved context into r4-r7. */
|
||||
stmia r1!, {r4-r7} /* Store the hardware saved context. */
|
||||
|
||||
save_special_regs:
|
||||
mrs r2, psp /* r2 = PSP. */
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
mrs r3, psplim /* r3 = PSPLIM. */
|
||||
#else
|
||||
movs r3, #0 /* r3 = 0. 0 is stored in the PSPLIM slot. */
|
||||
#endif
|
||||
mrs r4, control /* r4 = CONTROL. */
|
||||
mov r5, lr /* r5 = LR. */
|
||||
stmia r1!, {r2-r5} /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
|
||||
str r1, [r0] /* Save the location from where the context should be restored as the first member of TCB. */
|
||||
|
||||
select_next_task:
|
||||
cpsid i
|
||||
bl vTaskSwitchContext
|
||||
cpsie i
|
||||
|
||||
program_mpu:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r3] /* r0 = pxCurrentTCB.*/
|
||||
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
movs r3, #1 /* r3 = 1. */
|
||||
bics r2, r3 /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
|
||||
str r2, [r1] /* Disable MPU. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
ldr r1, [r0] /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r1, [r2] /* Program MAIR0. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
ldr r1, =0xe000ed98 /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
|
||||
movs r3, #4 /* r3 = 4. */
|
||||
str r3, [r1] /* Program RNR = 4. */
|
||||
ldmia r0!, {r4-r5} /* Read first set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write first set of RBAR/RLAR registers. */
|
||||
movs r3, #5 /* r3 = 5. */
|
||||
str r3, [r1] /* Program RNR = 5. */
|
||||
ldmia r0!, {r4-r5} /* Read second set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write second set of RBAR/RLAR registers. */
|
||||
movs r3, #6 /* r3 = 6. */
|
||||
str r3, [r1] /* Program RNR = 6. */
|
||||
ldmia r0!, {r4-r5} /* Read third set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write third set of RBAR/RLAR registers. */
|
||||
movs r3, #7 /* r3 = 6. */
|
||||
str r3, [r1] /* Program RNR = 7. */
|
||||
ldmia r0!, {r4-r5} /* Read fourth set of RBAR/RLAR registers from TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r2!, {r4-r5} /* Write fourth set of RBAR/RLAR registers. */
|
||||
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
movs r3, #1 /* r3 = 1. */
|
||||
orrs r2, r3 /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
|
||||
str r2, [r1] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
restore_context:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r2] /* r0 = pxCurrentTCB.*/
|
||||
ldr r1, [r0] /* r1 = Location of saved context in TCB. */
|
||||
|
||||
restore_special_regs:
|
||||
subs r1, #16
|
||||
ldmia r1!, {r2-r5} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
|
||||
subs r1, #16
|
||||
msr psp, r2
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
msr psplim, r3
|
||||
#endif
|
||||
msr control, r4
|
||||
mov lr, r5
|
||||
|
||||
restore_general_regs:
|
||||
subs r1, #32
|
||||
ldmia r1!, {r4-r7} /* r4-r7 contain half of the hardware saved context. */
|
||||
stmia r2!, {r4-r7} /* Copy half of the the hardware saved context on the task stack. */
|
||||
ldmia r1!, {r4-r7} /* r4-r7 contain rest half of the hardware saved context. */
|
||||
stmia r2!, {r4-r7} /* Copy rest half of the the hardware saved context on the task stack. */
|
||||
subs r1, #48
|
||||
ldmia r1!, {r4-r7} /* Restore r8-r11. */
|
||||
mov r8, r4 /* r8 = r4. */
|
||||
mov r9, r5 /* r9 = r5. */
|
||||
mov r10, r6 /* r10 = r6. */
|
||||
mov r11, r7 /* r11 = r7. */
|
||||
subs r1, #32
|
||||
ldmia r1!, {r4-r7} /* Restore r4-r7. */
|
||||
subs r1, #16
|
||||
|
||||
restore_context_done:
|
||||
str r1, [r0] /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
bx lr
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
PendSV_Handler:
|
||||
mrs r0, psp /* Read PSP in r0. */
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r2] /* Read pxCurrentTCB. */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
subs r0, r0, #44 /* Make space for PSPLIM, CONTROL, LR and the remaining registers on the stack. */
|
||||
str r0, [r1] /* Save the new top of stack in TCB. */
|
||||
mrs r1, psplim /* r1 = PSPLIM. */
|
||||
mrs r2, control /* r2 = CONTROL. */
|
||||
mov r3, lr /* r3 = LR/EXC_RETURN. */
|
||||
stmia r0!, {r1-r7} /* Store on the stack - PSPLIM, CONTROL, LR and low registers that are not automatically saved. */
|
||||
mov r4, r8 /* r4 = r8. */
|
||||
mov r5, r9 /* r5 = r9. */
|
||||
mov r6, r10 /* r6 = r10. */
|
||||
mov r7, r11 /* r7 = r11. */
|
||||
stmia r0!, {r4-r7} /* Store the high registers that are not saved automatically. */
|
||||
#else /* configENABLE_MPU */
|
||||
subs r0, r0, #40 /* Make space for PSPLIM, LR and the remaining registers on the stack. */
|
||||
str r0, [r1] /* Save the new top of stack in TCB. */
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
mrs r2, psplim /* r2 = PSPLIM. */
|
||||
#else
|
||||
movs r2, #0 /* r0 = 0. 0 is stored in the PSPLIM slot. */
|
||||
#endif
|
||||
mov r3, lr /* r3 = LR/EXC_RETURN. */
|
||||
stmia r0!, {r2-r7} /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
|
||||
mov r4, r8 /* r4 = r8. */
|
||||
|
|
@ -382,6 +213,7 @@ PendSV_Handler:
|
|||
mov r6, r10 /* r6 = r10. */
|
||||
mov r7, r11 /* r7 = r11. */
|
||||
stmia r0!, {r4-r7} /* Store the high registers that are not saved automatically. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
cpsid i
|
||||
bl vTaskSwitchContext
|
||||
|
|
@ -391,6 +223,63 @@ PendSV_Handler:
|
|||
ldr r1, [r2] /* Read pxCurrentTCB. */
|
||||
ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r3, [r2] /* Read the value of MPU_CTRL. */
|
||||
movs r4, #1 /* r4 = 1. */
|
||||
bics r3, r4 /* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
|
||||
str r3, [r2] /* Disable MPU. */
|
||||
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
ldr r4, [r1] /* r4 = *r1 i.e. r4 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r4, [r2] /* Program MAIR0. */
|
||||
ldr r2, =0xe000ed98 /* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
movs r4, #4 /* r4 = 4. */
|
||||
str r4, [r2] /* Program RNR = 4. */
|
||||
ldmia r1!, {r5,r6} /* Read first set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r5,r6} /* Write first set of RBAR/RLAR registers. */
|
||||
movs r4, #5 /* r4 = 5. */
|
||||
str r4, [r2] /* Program RNR = 5. */
|
||||
ldmia r1!, {r5,r6} /* Read second set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r5,r6} /* Write second set of RBAR/RLAR registers. */
|
||||
movs r4, #6 /* r4 = 6. */
|
||||
str r4, [r2] /* Program RNR = 6. */
|
||||
ldmia r1!, {r5,r6} /* Read third set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r5,r6} /* Write third set of RBAR/RLAR registers. */
|
||||
movs r4, #7 /* r4 = 7. */
|
||||
str r4, [r2] /* Program RNR = 7. */
|
||||
ldmia r1!, {r5,r6} /* Read fourth set of RBAR/RLAR from TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
stmia r3!, {r5,r6} /* Write fourth set of RBAR/RLAR registers. */
|
||||
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r3, [r2] /* Read the value of MPU_CTRL. */
|
||||
movs r4, #1 /* r4 = 1. */
|
||||
orrs r3, r4 /* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
|
||||
str r3, [r2] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
adds r0, r0, #28 /* Move to the high registers. */
|
||||
ldmia r0!, {r4-r7} /* Restore the high registers that are not automatically restored. */
|
||||
mov r8, r4 /* r8 = r4. */
|
||||
mov r9, r5 /* r9 = r5. */
|
||||
mov r10, r6 /* r10 = r6. */
|
||||
mov r11, r7 /* r11 = r7. */
|
||||
msr psp, r0 /* Remember the new top of stack for the task. */
|
||||
subs r0, r0, #44 /* Move to the starting of the saved context. */
|
||||
ldmia r0!, {r1-r7} /* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r7 restored. */
|
||||
msr psplim, r1 /* Restore the PSPLIM register value for the task. */
|
||||
msr control, r2 /* Restore the CONTROL register value for the task. */
|
||||
bx r3
|
||||
#else /* configENABLE_MPU */
|
||||
adds r0, r0, #24 /* Move to the high registers. */
|
||||
ldmia r0!, {r4-r7} /* Restore the high registers that are not automatically restored. */
|
||||
mov r8, r4 /* r8 = r4. */
|
||||
|
|
@ -400,45 +289,11 @@ PendSV_Handler:
|
|||
msr psp, r0 /* Remember the new top of stack for the task. */
|
||||
subs r0, r0, #40 /* Move to the starting of the saved context. */
|
||||
ldmia r0!, {r2-r7} /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
|
||||
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
|
||||
msr psplim, r2 /* Restore the PSPLIM register value for the task. */
|
||||
#endif
|
||||
bx r3
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
|
||||
SVC_Handler:
|
||||
movs r0, #4
|
||||
mov r1, lr
|
||||
tst r0, r1
|
||||
beq stack_on_msp
|
||||
stack_on_psp:
|
||||
mrs r0, psp
|
||||
b route_svc
|
||||
stack_on_msp:
|
||||
mrs r0, msp
|
||||
b route_svc
|
||||
|
||||
route_svc:
|
||||
ldr r3, [r0, #24]
|
||||
subs r3, #2
|
||||
ldrb r2, [r3, #0]
|
||||
cmp r2, #NUM_SYSTEM_CALLS
|
||||
blt system_call_enter
|
||||
cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */
|
||||
beq system_call_exit
|
||||
b vPortSVCHandler_C
|
||||
|
||||
system_call_enter:
|
||||
b vSystemCallEnter
|
||||
system_call_exit:
|
||||
b vSystemCallExit
|
||||
|
||||
#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
SVC_Handler:
|
||||
movs r0, #4
|
||||
mov r1, lr
|
||||
|
|
@ -449,8 +304,6 @@ SVC_Handler:
|
|||
stacking_used_msp:
|
||||
mrs r0, msp
|
||||
b vPortSVCHandler_C
|
||||
|
||||
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
END
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,16 +22,15 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
|
@ -45,35 +42,267 @@
|
|||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef configENABLE_FPU
|
||||
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
|
||||
#endif /* configENABLE_FPU */
|
||||
|
||||
#ifndef configENABLE_MPU
|
||||
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#ifndef configENABLE_TRUSTZONE
|
||||
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Type definitions.
|
||||
*/
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* Architecture specifics.
|
||||
*/
|
||||
#define portARCH_NAME "Cortex-M23"
|
||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||
#define portARMV8M_MINOR_VERSION 0
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portNOP()
|
||||
#define portINLINE __inline
|
||||
#ifndef portFORCE_INLINE
|
||||
#define portFORCE_INLINE inline __attribute__( ( always_inline ) )
|
||||
#endif
|
||||
#define portHAS_STACK_OVERFLOW_CHECKING 1
|
||||
#define portDONT_DISCARD __root
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ARMv8-M common port configurations. */
|
||||
#include "portmacrocommon.h"
|
||||
/**
|
||||
* @brief Extern declarations.
|
||||
*/
|
||||
extern BaseType_t xPortIsInsideInterrupt( void );
|
||||
|
||||
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
|
||||
extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
|
||||
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
#error 16 MPU regions are not yet supported for this port.
|
||||
#endif
|
||||
/**
|
||||
* @brief MPU specific constants.
|
||||
*/
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
#define portUSING_MPU_WRAPPERS 1
|
||||
#define portPRIVILEGE_BIT ( 0x80000000UL )
|
||||
#else
|
||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#ifndef configENABLE_MVE
|
||||
#define configENABLE_MVE 0
|
||||
#elif ( configENABLE_MVE != 0 )
|
||||
#error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M23.
|
||||
#endif
|
||||
|
||||
/* MPU regions. */
|
||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||
#define portUNPRIVILEGED_FLASH_REGION ( 1UL )
|
||||
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
|
||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||
#define portSTACK_REGION ( 4UL )
|
||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||
|
||||
/* Device memory attributes used in MPU_MAIR registers.
|
||||
*
|
||||
* 8-bit values encoded as follows:
|
||||
* Bit[7:4] - 0000 - Device Memory
|
||||
* Bit[3:2] - 00 --> Device-nGnRnE
|
||||
* 01 --> Device-nGnRE
|
||||
* 10 --> Device-nGRE
|
||||
* 11 --> Device-GRE
|
||||
* Bit[1:0] - 00, Reserved.
|
||||
*/
|
||||
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
|
||||
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
|
||||
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
|
||||
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
|
||||
|
||||
/* Normal memory attributes used in MPU_MAIR registers. */
|
||||
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
|
||||
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
|
||||
|
||||
/* Attributes used in MPU_RBAR registers. */
|
||||
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
|
||||
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
|
||||
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
|
||||
|
||||
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
|
||||
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
|
||||
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
|
||||
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
|
||||
|
||||
#define portMPU_REGION_EXECUTE_NEVER ( 1UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Settings to define an MPU region.
|
||||
*/
|
||||
typedef struct MPURegionSettings
|
||||
{
|
||||
uint32_t ulRBAR; /**< RBAR for the region. */
|
||||
uint32_t ulRLAR; /**< RLAR for the region. */
|
||||
} MPURegionSettings_t;
|
||||
|
||||
/**
|
||||
* @brief MPU settings as stored in the TCB.
|
||||
*/
|
||||
typedef struct MPU_SETTINGS
|
||||
{
|
||||
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
|
||||
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
|
||||
} xMPU_SETTINGS;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief SVC numbers.
|
||||
*/
|
||||
#define portSVC_ALLOCATE_SECURE_CONTEXT 0
|
||||
#define portSVC_FREE_SECURE_CONTEXT 1
|
||||
#define portSVC_START_SCHEDULER 2
|
||||
#define portSVC_RAISE_PRIVILEGE 3
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Scheduler utilities.
|
||||
*/
|
||||
#define portYIELD() vPortYield()
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Critical section management.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
|
||||
#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
|
||||
#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Tickless idle/low power functionality.
|
||||
*/
|
||||
#ifndef portSUPPRESS_TICKS_AND_SLEEP
|
||||
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Task function macros as described on the FreeRTOS.org WEB site.
|
||||
*/
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
|
||||
/**
|
||||
* @brief Allocate a secure context for the task.
|
||||
*
|
||||
* Tasks are not created with a secure context. Any task that is going to call
|
||||
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
|
||||
* secure context before it calls any secure function.
|
||||
*
|
||||
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
|
||||
*/
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
|
||||
|
||||
/**
|
||||
* @brief Called when a task is deleted to delete the task's secure context,
|
||||
* if it has one.
|
||||
*
|
||||
* @param[in] pxTCB The TCB of the task being deleted.
|
||||
*/
|
||||
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
|
||||
#else
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
|
||||
#define portCLEAN_UP_TCB( pxTCB )
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
/**
|
||||
* @brief Checks whether or not the processor is privileged.
|
||||
*
|
||||
* @return 1 if the processor is already privileged, 0 otherwise.
|
||||
*/
|
||||
#define portIS_PRIVILEGED() xIsPrivileged()
|
||||
|
||||
/**
|
||||
* @brief Raise an SVC request to raise privilege.
|
||||
*
|
||||
* The SVC handler checks that the SVC was raised from a system call and only
|
||||
* then it raises the privilege. If this is called from any other place,
|
||||
* the privilege is not raised.
|
||||
*/
|
||||
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
|
||||
|
||||
/**
|
||||
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
|
||||
* register.
|
||||
*/
|
||||
#define portRESET_PRIVILEGE() vResetPrivilege()
|
||||
#else
|
||||
#define portIS_PRIVILEGED()
|
||||
#define portRAISE_PRIVILEGE()
|
||||
#define portRESET_PRIVILEGE()
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Barriers.
|
||||
*/
|
||||
#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
|
||||
|
|
@ -83,10 +312,8 @@
|
|||
#pragma diag_suppress=Pa082
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,10 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
* Copyright 2024 Arm Limited and/or its affiliates
|
||||
* <open-source-office@arm.com>
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -26,6 +22,7 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
/* Including FreeRTOSConfig.h here will cause build errors if the header file
|
||||
contains code not understood by the assembler - for example the 'extern' keyword.
|
||||
|
|
@ -34,23 +31,12 @@ the code is included in C files but excluded by the preprocessor in assembly
|
|||
files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
|
||||
#include "FreeRTOSConfig.h"
|
||||
|
||||
/* System call numbers includes. */
|
||||
#include "mpu_syscall_numbers.h"
|
||||
|
||||
#ifndef configUSE_MPU_WRAPPERS_V1
|
||||
#define configUSE_MPU_WRAPPERS_V1 0
|
||||
#endif
|
||||
|
||||
EXTERN pxCurrentTCB
|
||||
EXTERN xSecureContext
|
||||
EXTERN vTaskSwitchContext
|
||||
EXTERN vPortSVCHandler_C
|
||||
EXTERN SecureContext_SaveContext
|
||||
EXTERN SecureContext_LoadContext
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
EXTERN vSystemCallEnter
|
||||
EXTERN vSystemCallExit
|
||||
#endif
|
||||
|
||||
PUBLIC xIsPrivileged
|
||||
PUBLIC vResetPrivilege
|
||||
|
|
@ -90,7 +76,7 @@ vResetPrivilege:
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortAllocateSecureContext:
|
||||
svc 100 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */
|
||||
svc 0 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */
|
||||
bx lr /* Return. */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -102,112 +88,62 @@ vPortAllocateSecureContext:
|
|||
THUMB
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
vRestoreContextOfFirstTask:
|
||||
program_mpu_first_task:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r3] /* r0 = pxCurrentTCB. */
|
||||
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
bic r2, #1 /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
|
||||
str r2, [r1] /* Disable MPU. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
ldr r1, [r0] /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r1, [r2] /* Program MAIR0. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
ldr r1, =0xe000ed98 /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
|
||||
movs r3, #4 /* r3 = 4. */
|
||||
str r3, [r1] /* Program RNR = 4. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
movs r3, #8 /* r3 = 8. */
|
||||
str r3, [r1] /* Program RNR = 8. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
movs r3, #12 /* r3 = 12. */
|
||||
str r3, [r1] /* Program RNR = 12. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
orr r2, #1 /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */
|
||||
str r2, [r1] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
restore_context_first_task:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* r1 = pxCurrentTCB.*/
|
||||
ldr r2, [r1] /* r2 = Location of saved context in TCB. */
|
||||
|
||||
restore_special_regs_first_task:
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
ldmdb r2!, {r3-r6} /* Read task's dedicated PAC key from the task's context. */
|
||||
msr PAC_KEY_P_0, r3 /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
msr PAC_KEY_P_1, r4
|
||||
msr PAC_KEY_P_2, r5
|
||||
msr PAC_KEY_P_3, r6
|
||||
clrm {r3-r6} /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
ldmdb r2!, {r0, r3-r5, lr} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
|
||||
msr psp, r3
|
||||
msr psplim, r4
|
||||
msr control, r5
|
||||
ldr r4, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
str r0, [r4] /* Restore xSecureContext. */
|
||||
|
||||
restore_general_regs_first_task:
|
||||
ldmdb r2!, {r4-r11} /* r4-r11 contain hardware saved context. */
|
||||
stmia r3!, {r4-r11} /* Copy the hardware saved context on the task stack. */
|
||||
ldmdb r2!, {r4-r11} /* r4-r11 restored. */
|
||||
|
||||
restore_context_done_first_task:
|
||||
str r2, [r1] /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
mov r0, #0
|
||||
msr basepri, r0 /* Ensure that interrupts are enabled when the first task starts. */
|
||||
bx lr
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
vRestoreContextOfFirstTask:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r3, [r2] /* Read pxCurrentTCB. */
|
||||
ldr r0, [r3] /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
|
||||
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
ldmia r0!, {r1-r4} /* Read task's dedicated PAC key from stack. */
|
||||
msr PAC_KEY_P_3, r1 /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
msr PAC_KEY_P_2, r2
|
||||
msr PAC_KEY_P_1, r3
|
||||
msr PAC_KEY_P_0, r4
|
||||
clrm {r1-r4} /* Clear r1-r4. */
|
||||
#endif /* configENABLE_PAC */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r2] /* Read the value of MPU_CTRL. */
|
||||
bic r4, r4, #1 /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
|
||||
str r4, [r2] /* Disable MPU. */
|
||||
|
||||
adds r3, #4 /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
|
||||
ldr r4, [r3] /* r4 = *r3 i.e. r4 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r4, [r2] /* Program MAIR0. */
|
||||
ldr r2, =0xe000ed98 /* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
movs r4, #4 /* r4 = 4. */
|
||||
str r4, [r2] /* Program RNR = 4. */
|
||||
adds r3, #4 /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
ldmia r3!, {r4-r11} /* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||
stmia r2!, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r2] /* Read the value of MPU_CTRL. */
|
||||
orr r4, r4, #1 /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||
str r4, [r2] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
ldm r0!, {r1-r4} /* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
|
||||
ldr r5, =xSecureContext
|
||||
str r1, [r5] /* Set xSecureContext to this task's value for the same. */
|
||||
msr psplim, r2 /* Set this task's PSPLIM value. */
|
||||
msr control, r3 /* Set this task's CONTROL value. */
|
||||
adds r0, #32 /* Discard everything up to r0. */
|
||||
msr psp, r0 /* This is now the new top of stack to use in the task. */
|
||||
isb
|
||||
mov r0, #0
|
||||
msr basepri, r0 /* Ensure that interrupts are enabled when the first task starts. */
|
||||
bx r4 /* Finally, branch to EXC_RETURN. */
|
||||
#else /* configENABLE_MPU */
|
||||
ldm r0!, {r1-r3} /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
|
||||
ldr r4, =xSecureContext
|
||||
str r1, [r4] /* Set xSecureContext to this task's value for the same. */
|
||||
msr psplim, r2 /* Set this task's PSPLIM value. */
|
||||
mrs r1, control /* Obtain current control register value. */
|
||||
orrs r1, r1, #2 /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointe (PSP). */
|
||||
msr control, r1 /* Write back the new control register value. */
|
||||
movs r1, #2 /* r1 = 2. */
|
||||
msr CONTROL, r1 /* Switch to use PSP in the thread mode. */
|
||||
adds r0, #32 /* Discard everything up to r0. */
|
||||
msr psp, r0 /* This is now the new top of stack to use in the task. */
|
||||
isb
|
||||
mov r0, #0
|
||||
msr basepri, r0 /* Ensure that interrupts are enabled when the first task starts. */
|
||||
bx r3 /* Finally, branch to EXC_RETURN. */
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -227,7 +163,7 @@ vStartFirstTask:
|
|||
cpsie f
|
||||
dsb
|
||||
isb
|
||||
svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */
|
||||
svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
ulSetInterruptMask:
|
||||
|
|
@ -246,160 +182,6 @@ vClearInterruptMask:
|
|||
bx lr /* Return. */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
PendSV_Handler:
|
||||
ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
ldr r0, [r3] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
|
||||
ldr r2, [r1] /* r2 = Location in TCB where the context should be saved. */
|
||||
|
||||
cbz r0, save_ns_context /* No secure context to save. */
|
||||
save_s_context:
|
||||
push {r0-r2, lr}
|
||||
bl SecureContext_SaveContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
pop {r0-r2, lr}
|
||||
|
||||
save_ns_context:
|
||||
mov r3, lr /* r3 = LR (EXC_RETURN). */
|
||||
lsls r3, r3, #25 /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
bmi save_special_regs /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
|
||||
|
||||
save_general_regs:
|
||||
mrs r3, psp
|
||||
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
add r3, r3, #0x20 /* Move r3 to location where s0 is saved. */
|
||||
tst lr, #0x10
|
||||
ittt eq
|
||||
vstmiaeq r2!, {s16-s31} /* Store s16-s31. */
|
||||
vldmiaeq r3, {s0-s16} /* Copy hardware saved FP context into s0-s16. */
|
||||
vstmiaeq r2!, {s0-s16} /* Store hardware saved FP context. */
|
||||
sub r3, r3, #0x20 /* Set r3 back to the location of hardware saved context. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
|
||||
stmia r2!, {r4-r11} /* Store r4-r11. */
|
||||
ldmia r3, {r4-r11} /* Copy the hardware saved context into r4-r11. */
|
||||
stmia r2!, {r4-r11} /* Store the hardware saved context. */
|
||||
|
||||
save_special_regs:
|
||||
mrs r3, psp /* r3 = PSP. */
|
||||
mrs r4, psplim /* r4 = PSPLIM. */
|
||||
mrs r5, control /* r5 = CONTROL. */
|
||||
stmia r2!, {r0, r3-r5, lr} /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
mrs r3, PAC_KEY_P_0 /* Read task's dedicated PAC key from the PAC key registers. */
|
||||
mrs r4, PAC_KEY_P_1
|
||||
mrs r5, PAC_KEY_P_2
|
||||
mrs r6, PAC_KEY_P_3
|
||||
stmia r2!, {r3-r6} /* Store the task's dedicated PAC key on the task's context. */
|
||||
clrm {r3-r6} /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
|
||||
str r2, [r1] /* Save the location from where the context should be restored as the first member of TCB. */
|
||||
|
||||
select_next_task:
|
||||
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
msr basepri, r0 /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
|
||||
dsb
|
||||
isb
|
||||
bl vTaskSwitchContext
|
||||
mov r0, #0 /* r0 = 0. */
|
||||
msr basepri, r0 /* Enable interrupts. */
|
||||
|
||||
program_mpu:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r3] /* r0 = pxCurrentTCB.*/
|
||||
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
bic r2, #1 /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
|
||||
str r2, [r1] /* Disable MPU. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
ldr r1, [r0] /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r1, [r2] /* Program MAIR0. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
ldr r1, =0xe000ed98 /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
|
||||
movs r3, #4 /* r3 = 4. */
|
||||
str r3, [r1] /* Program RNR = 4. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
movs r3, #8 /* r3 = 8. */
|
||||
str r3, [r1] /* Program RNR = 8. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
movs r3, #12 /* r3 = 12. */
|
||||
str r3, [r1] /* Program RNR = 12. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
orr r2, #1 /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
|
||||
str r2, [r1] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
restore_context:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* r1 = pxCurrentTCB.*/
|
||||
ldr r2, [r1] /* r2 = Location of saved context in TCB. */
|
||||
|
||||
restore_special_regs:
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
ldmdb r2!, {r3-r6} /* Read task's dedicated PAC key from the task's context. */
|
||||
msr PAC_KEY_P_0, r3 /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
msr PAC_KEY_P_1, r4
|
||||
msr PAC_KEY_P_2, r5
|
||||
msr PAC_KEY_P_3, r6
|
||||
clrm {r3-r6} /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
ldmdb r2!, {r0, r3-r5, lr} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
|
||||
msr psp, r3
|
||||
msr psplim, r4
|
||||
msr control, r5
|
||||
ldr r4, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
str r0, [r4] /* Restore xSecureContext. */
|
||||
cbz r0, restore_ns_context /* No secure context to restore. */
|
||||
|
||||
restore_s_context:
|
||||
push {r1-r3, lr}
|
||||
bl SecureContext_LoadContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
pop {r1-r3, lr}
|
||||
|
||||
restore_ns_context:
|
||||
mov r0, lr /* r0 = LR (EXC_RETURN). */
|
||||
lsls r0, r0, #25 /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
bmi restore_context_done /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
|
||||
|
||||
restore_general_regs:
|
||||
ldmdb r2!, {r4-r11} /* r4-r11 contain hardware saved context. */
|
||||
stmia r3!, {r4-r11} /* Copy the hardware saved context on the task stack. */
|
||||
ldmdb r2!, {r4-r11} /* r4-r11 restored. */
|
||||
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
tst lr, #0x10
|
||||
ittt eq
|
||||
vldmdbeq r2!, {s0-s16} /* s0-s16 contain hardware saved FP context. */
|
||||
vstmiaeq r3!, {s0-s16} /* Copy hardware saved FP context on the task stack. */
|
||||
vldmdbeq r2!, {s16-s31} /* Restore s16-s31. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
|
||||
restore_context_done:
|
||||
str r2, [r1] /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
bx lr
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
PendSV_Handler:
|
||||
ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
ldr r0, [r3] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
|
||||
|
|
@ -408,37 +190,59 @@ PendSV_Handler:
|
|||
mrs r2, psp /* Read PSP in r2. */
|
||||
|
||||
cbz r0, save_ns_context /* No secure context to save. */
|
||||
save_s_context:
|
||||
push {r0-r2, lr}
|
||||
push {r0-r2, r14}
|
||||
bl SecureContext_SaveContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
pop {r0-r2, lr}
|
||||
pop {r0-r3} /* LR is now in r3. */
|
||||
mov lr, r3 /* LR = r3. */
|
||||
lsls r1, r3, #25 /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
bpl save_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* Read pxCurrentTCB. */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
subs r2, r2, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
str r2, [r1] /* Save the new top of stack in TCB. */
|
||||
mrs r1, psplim /* r1 = PSPLIM. */
|
||||
mrs r3, control /* r3 = CONTROL. */
|
||||
mov r4, lr /* r4 = LR/EXC_RETURN. */
|
||||
stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
#else /* configENABLE_MPU */
|
||||
subs r2, r2, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */
|
||||
str r2, [r1] /* Save the new top of stack in TCB. */
|
||||
mrs r1, psplim /* r1 = PSPLIM. */
|
||||
mov r3, lr /* r3 = LR/EXC_RETURN. */
|
||||
stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */
|
||||
#endif /* configENABLE_MPU */
|
||||
b select_next_task
|
||||
|
||||
save_ns_context:
|
||||
mov r3, lr /* r3 = LR. */
|
||||
lsls r3, r3, #25 /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
bmi save_special_regs /* If r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used. */
|
||||
|
||||
save_general_regs:
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* Read pxCurrentTCB. */
|
||||
#if ( configENABLE_FPU == 1 )
|
||||
tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
|
||||
it eq
|
||||
vstmdbeq r2!, {s16-s31} /* Store the additional FP context registers which are not saved automatically. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
stmdb r2!, {r4-r11} /* Store the registers that are not saved automatically. */
|
||||
|
||||
save_special_regs:
|
||||
mrs r3, psplim /* r3 = PSPLIM. */
|
||||
stmdb r2!, {r0, r3, lr} /* Store xSecureContext, PSPLIM and LR on the stack. */
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
mrs r3, PAC_KEY_P_3 /* Read task's dedicated PAC key from the PAC key registers. */
|
||||
mrs r4, PAC_KEY_P_2
|
||||
mrs r5, PAC_KEY_P_1
|
||||
mrs r6, PAC_KEY_P_0
|
||||
stmdb r2!, {r3-r6} /* Store the task's dedicated PAC key on the stack. */
|
||||
clrm {r3-r6} /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
|
||||
vstmdbeq r2!, {s16-s31} /* Store the FPU registers which are not saved automatically. */
|
||||
#endif /* configENABLE_FPU */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
subs r2, r2, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
|
||||
str r2, [r1] /* Save the new top of stack in TCB. */
|
||||
adds r2, r2, #16 /* r2 = r2 + 16. */
|
||||
stm r2, {r4-r11} /* Store the registers that are not saved automatically. */
|
||||
mrs r1, psplim /* r1 = PSPLIM. */
|
||||
mrs r3, control /* r3 = CONTROL. */
|
||||
mov r4, lr /* r4 = LR/EXC_RETURN. */
|
||||
subs r2, r2, #16 /* r2 = r2 - 16. */
|
||||
stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
|
||||
#else /* configENABLE_MPU */
|
||||
subs r2, r2, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
|
||||
str r2, [r1] /* Save the new top of stack in TCB. */
|
||||
adds r2, r2, #12 /* r2 = r2 + 12. */
|
||||
stm r2, {r4-r11} /* Store the registers that are not saved automatically. */
|
||||
mrs r1, psplim /* r1 = PSPLIM. */
|
||||
mov r3, lr /* r3 = LR/EXC_RETURN. */
|
||||
subs r2, r2, #12 /* r2 = r2 - 12. */
|
||||
stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
select_next_task:
|
||||
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
|
|
@ -449,85 +253,90 @@ PendSV_Handler:
|
|||
mov r0, #0 /* r0 = 0. */
|
||||
msr basepri, r0 /* Enable interrupts. */
|
||||
|
||||
restore_context:
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* Read pxCurrentTCB. */
|
||||
ldr r2, [r1] /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
|
||||
|
||||
restore_special_regs:
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
ldmia r2!, {r3-r6} /* Read task's dedicated PAC key from stack. */
|
||||
msr PAC_KEY_P_3, r3 /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
msr PAC_KEY_P_2, r4
|
||||
msr PAC_KEY_P_1, r5
|
||||
msr PAC_KEY_P_0, r6
|
||||
clrm {r3-r6} /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
ldmia r2!, {r0, r3, lr} http://files.iar.com/ftp/pub/box/bxarm-9.60.3.deb/* Read from stack - r0 = xSecureContext, r3 = PSPLIM and LR restored. */
|
||||
msr psplim, r3 /* Restore the PSPLIM register value for the task. */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r3] /* Read the value of MPU_CTRL. */
|
||||
bic r4, r4, #1 /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
|
||||
str r4, [r3] /* Disable MPU. */
|
||||
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
ldr r4, [r1] /* r4 = *r1 i.e. r4 = MAIR0. */
|
||||
ldr r3, =0xe000edc0 /* r3 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r4, [r3] /* Program MAIR0. */
|
||||
ldr r3, =0xe000ed98 /* r3 = 0xe000ed98 [Location of RNR]. */
|
||||
movs r4, #4 /* r4 = 4. */
|
||||
str r4, [r3] /* Program RNR = 4. */
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||
ldmia r1!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r3!, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
|
||||
ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r3] /* Read the value of MPU_CTRL. */
|
||||
orr r4, r4, #1 /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||
str r4, [r3] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
ldmia r2!, {r0, r1, r3, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */
|
||||
msr psplim, r1 /* Restore the PSPLIM register value for the task. */
|
||||
msr control, r3 /* Restore the CONTROL register value for the task. */
|
||||
mov lr, r4 /* LR = r4. */
|
||||
ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
str r0, [r3] /* Restore the task's xSecureContext. */
|
||||
cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */
|
||||
|
||||
restore_s_context:
|
||||
push {r1-r3, lr}
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* Read pxCurrentTCB. */
|
||||
push {r2, r4}
|
||||
bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
pop {r1-r3, lr}
|
||||
|
||||
restore_ns_context:
|
||||
mov r0, lr /* r0 = LR (EXC_RETURN). */
|
||||
lsls r0, r0, #25 /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
bmi restore_context_done /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
|
||||
|
||||
restore_general_regs:
|
||||
ldmia r2!, {r4-r11} /* Restore the registers that are not automatically restored. */
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
|
||||
it eq
|
||||
vldmiaeq r2!, {s16-s31} /* Restore the additional FP context registers which are not restored automatically. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
|
||||
restore_context_done:
|
||||
pop {r2, r4}
|
||||
mov lr, r4 /* LR = r4. */
|
||||
lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
msr psp, r2 /* Remember the new top of stack for the task. */
|
||||
bx lr
|
||||
#else /* configENABLE_MPU */
|
||||
ldmia r2!, {r0, r1, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
|
||||
msr psplim, r1 /* Restore the PSPLIM register value for the task. */
|
||||
mov lr, r4 /* LR = r4. */
|
||||
ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
str r0, [r3] /* Restore the task's xSecureContext. */
|
||||
cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */
|
||||
ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r3] /* Read pxCurrentTCB. */
|
||||
push {r2, r4}
|
||||
bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
pop {r2, r4}
|
||||
mov lr, r4 /* LR = r4. */
|
||||
lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
|
||||
msr psp, r2 /* Remember the new top of stack for the task. */
|
||||
bx lr
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
restore_ns_context:
|
||||
ldmia r2!, {r4-r11} /* Restore the registers that are not automatically restored. */
|
||||
#if ( configENABLE_FPU == 1 )
|
||||
tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
|
||||
it eq
|
||||
vldmiaeq r2!, {s16-s31} /* Restore the FPU registers which are not restored automatically. */
|
||||
#endif /* configENABLE_FPU */
|
||||
msr psp, r2 /* Remember the new top of stack for the task. */
|
||||
bx lr
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
|
||||
SVC_Handler:
|
||||
tst lr, #4
|
||||
ite eq
|
||||
mrseq r0, msp
|
||||
mrsne r0, psp
|
||||
|
||||
ldr r1, [r0, #24]
|
||||
ldrb r2, [r1, #-2]
|
||||
cmp r2, #NUM_SYSTEM_CALLS
|
||||
blt syscall_enter
|
||||
cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */
|
||||
beq syscall_exit
|
||||
b vPortSVCHandler_C
|
||||
|
||||
syscall_enter:
|
||||
mov r1, lr
|
||||
b vSystemCallEnter
|
||||
|
||||
syscall_exit:
|
||||
mov r1, lr
|
||||
b vSystemCallExit
|
||||
|
||||
#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
SVC_Handler:
|
||||
tst lr, #4
|
||||
ite eq
|
||||
mrseq r0, msp
|
||||
mrsne r0, psp
|
||||
b vPortSVCHandler_C
|
||||
|
||||
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortFreeSecureContext:
|
||||
|
|
@ -536,7 +345,7 @@ vPortFreeSecureContext:
|
|||
ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */
|
||||
cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */
|
||||
it ne
|
||||
svcne 101 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */
|
||||
svcne 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */
|
||||
bx lr /* Return. */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -24,16 +22,15 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
|
@ -45,31 +42,267 @@
|
|||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef configENABLE_FPU
|
||||
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
|
||||
#endif /* configENABLE_FPU */
|
||||
|
||||
#ifndef configENABLE_MPU
|
||||
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#ifndef configENABLE_TRUSTZONE
|
||||
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Type definitions.
|
||||
*/
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* Architecture specifics.
|
||||
*/
|
||||
#define portARCH_NAME "Cortex-M33"
|
||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||
#define portARMV8M_MINOR_VERSION 0
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portNOP()
|
||||
#define portINLINE __inline
|
||||
#ifndef portFORCE_INLINE
|
||||
#define portFORCE_INLINE inline __attribute__( ( always_inline ) )
|
||||
#endif
|
||||
#define portHAS_STACK_OVERFLOW_CHECKING 1
|
||||
#define portDONT_DISCARD __root
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ARMv8-M common port configurations. */
|
||||
#include "portmacrocommon.h"
|
||||
/**
|
||||
* @brief Extern declarations.
|
||||
*/
|
||||
extern BaseType_t xPortIsInsideInterrupt( void );
|
||||
|
||||
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
|
||||
|
||||
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
|
||||
extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
|
||||
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#ifndef configENABLE_MVE
|
||||
#define configENABLE_MVE 0
|
||||
#elif ( configENABLE_MVE != 0 )
|
||||
#error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M33.
|
||||
#endif
|
||||
/**
|
||||
* @brief MPU specific constants.
|
||||
*/
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
#define portUSING_MPU_WRAPPERS 1
|
||||
#define portPRIVILEGE_BIT ( 0x80000000UL )
|
||||
#else
|
||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
|
||||
/* MPU regions. */
|
||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||
#define portUNPRIVILEGED_FLASH_REGION ( 1UL )
|
||||
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
|
||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||
#define portSTACK_REGION ( 4UL )
|
||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||
|
||||
/* Device memory attributes used in MPU_MAIR registers.
|
||||
*
|
||||
* 8-bit values encoded as follows:
|
||||
* Bit[7:4] - 0000 - Device Memory
|
||||
* Bit[3:2] - 00 --> Device-nGnRnE
|
||||
* 01 --> Device-nGnRE
|
||||
* 10 --> Device-nGRE
|
||||
* 11 --> Device-GRE
|
||||
* Bit[1:0] - 00, Reserved.
|
||||
*/
|
||||
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
|
||||
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
|
||||
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
|
||||
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
|
||||
|
||||
/* Normal memory attributes used in MPU_MAIR registers. */
|
||||
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
|
||||
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
|
||||
|
||||
/* Attributes used in MPU_RBAR registers. */
|
||||
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
|
||||
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
|
||||
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
|
||||
|
||||
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
|
||||
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
|
||||
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
|
||||
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
|
||||
|
||||
#define portMPU_REGION_EXECUTE_NEVER ( 1UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Settings to define an MPU region.
|
||||
*/
|
||||
typedef struct MPURegionSettings
|
||||
{
|
||||
uint32_t ulRBAR; /**< RBAR for the region. */
|
||||
uint32_t ulRLAR; /**< RLAR for the region. */
|
||||
} MPURegionSettings_t;
|
||||
|
||||
/**
|
||||
* @brief MPU settings as stored in the TCB.
|
||||
*/
|
||||
typedef struct MPU_SETTINGS
|
||||
{
|
||||
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
|
||||
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
|
||||
} xMPU_SETTINGS;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief SVC numbers.
|
||||
*/
|
||||
#define portSVC_ALLOCATE_SECURE_CONTEXT 0
|
||||
#define portSVC_FREE_SECURE_CONTEXT 1
|
||||
#define portSVC_START_SCHEDULER 2
|
||||
#define portSVC_RAISE_PRIVILEGE 3
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Scheduler utilities.
|
||||
*/
|
||||
#define portYIELD() vPortYield()
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Critical section management.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
|
||||
#define portDISABLE_INTERRUPTS() ulSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 )
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Tickless idle/low power functionality.
|
||||
*/
|
||||
#ifndef portSUPPRESS_TICKS_AND_SLEEP
|
||||
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Task function macros as described on the FreeRTOS.org WEB site.
|
||||
*/
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_TRUSTZONE == 1 )
|
||||
|
||||
/**
|
||||
* @brief Allocate a secure context for the task.
|
||||
*
|
||||
* Tasks are not created with a secure context. Any task that is going to call
|
||||
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
|
||||
* secure context before it calls any secure function.
|
||||
*
|
||||
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
|
||||
*/
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
|
||||
|
||||
/**
|
||||
* @brief Called when a task is deleted to delete the task's secure context,
|
||||
* if it has one.
|
||||
*
|
||||
* @param[in] pxTCB The TCB of the task being deleted.
|
||||
*/
|
||||
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
|
||||
#else
|
||||
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
|
||||
#define portCLEAN_UP_TCB( pxTCB )
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
/**
|
||||
* @brief Checks whether or not the processor is privileged.
|
||||
*
|
||||
* @return 1 if the processor is already privileged, 0 otherwise.
|
||||
*/
|
||||
#define portIS_PRIVILEGED() xIsPrivileged()
|
||||
|
||||
/**
|
||||
* @brief Raise an SVC request to raise privilege.
|
||||
*
|
||||
* The SVC handler checks that the SVC was raised from a system call and only
|
||||
* then it raises the privilege. If this is called from any other place,
|
||||
* the privilege is not raised.
|
||||
*/
|
||||
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
|
||||
|
||||
/**
|
||||
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
|
||||
* register.
|
||||
*/
|
||||
#define portRESET_PRIVILEGE() vResetPrivilege()
|
||||
#else
|
||||
#define portIS_PRIVILEGED()
|
||||
#define portRAISE_PRIVILEGE()
|
||||
#define portRESET_PRIVILEGE()
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Barriers.
|
||||
*/
|
||||
#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
|
||||
|
|
@ -79,10 +312,8 @@
|
|||
#pragma diag_suppress=Pa082
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,10 +1,6 @@
|
|||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
* Copyright 2024 Arm Limited and/or its affiliates
|
||||
* <open-source-office@arm.com>
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
* FreeRTOS Kernel V10.4.3 LTS Patch 3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
|
|
@ -26,6 +22,7 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
/* Including FreeRTOSConfig.h here will cause build errors if the header file
|
||||
contains code not understood by the assembler - for example the 'extern' keyword.
|
||||
|
|
@ -34,20 +31,9 @@ the code is included in C files but excluded by the preprocessor in assembly
|
|||
files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
|
||||
#include "FreeRTOSConfig.h"
|
||||
|
||||
/* System call numbers includes. */
|
||||
#include "mpu_syscall_numbers.h"
|
||||
|
||||
#ifndef configUSE_MPU_WRAPPERS_V1
|
||||
#define configUSE_MPU_WRAPPERS_V1 0
|
||||
#endif
|
||||
|
||||
EXTERN pxCurrentTCB
|
||||
EXTERN vTaskSwitchContext
|
||||
EXTERN vPortSVCHandler_C
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
EXTERN vSystemCallEnter
|
||||
EXTERN vSystemCallExit
|
||||
#endif
|
||||
|
||||
PUBLIC xIsPrivileged
|
||||
PUBLIC vResetPrivilege
|
||||
|
|
@ -92,108 +78,58 @@ vResetPrivilege:
|
|||
THUMB
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
vRestoreContextOfFirstTask:
|
||||
program_mpu_first_task:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r2] /* r0 = pxCurrentTCB. */
|
||||
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
bic r2, #1 /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
|
||||
str r2, [r1] /* Disable MPU. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
ldr r1, [r0] /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r1, [r2] /* Program MAIR0. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
ldr r1, =0xe000ed98 /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
|
||||
movs r3, #4 /* r3 = 4. */
|
||||
str r3, [r1] /* Program RNR = 4. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
movs r3, #8 /* r3 = 8. */
|
||||
str r3, [r1] /* Program RNR = 8. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
movs r3, #12 /* r3 = 12. */
|
||||
str r3, [r1] /* Program RNR = 12. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
orr r2, #1 /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
|
||||
str r2, [r1] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
restore_context_first_task:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r2] /* r0 = pxCurrentTCB.*/
|
||||
ldr r1, [r0] /* r1 = Location of saved context in TCB. */
|
||||
|
||||
restore_special_regs_first_task:
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
ldmdb r1!, {r2-r5} /* Read task's dedicated PAC key from the task's context. */
|
||||
msr PAC_KEY_P_0, r2 /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
msr PAC_KEY_P_1, r3
|
||||
msr PAC_KEY_P_2, r4
|
||||
msr PAC_KEY_P_3, r5
|
||||
clrm {r2-r5} /* Clear r2-r5. */
|
||||
#endif /* configENABLE_PAC */
|
||||
ldmdb r1!, {r2-r4, lr} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
|
||||
msr psp, r2
|
||||
msr psplim, r3
|
||||
msr control, r4
|
||||
|
||||
restore_general_regs_first_task:
|
||||
ldmdb r1!, {r4-r11} /* r4-r11 contain hardware saved context. */
|
||||
stmia r2!, {r4-r11} /* Copy the hardware saved context on the task stack. */
|
||||
ldmdb r1!, {r4-r11} /* r4-r11 restored. */
|
||||
|
||||
restore_context_done_first_task:
|
||||
str r1, [r0] /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
mov r0, #0
|
||||
msr basepri, r0 /* Ensure that interrupts are enabled when the first task starts. */
|
||||
bx lr
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
vRestoreContextOfFirstTask:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r2] /* Read pxCurrentTCB. */
|
||||
ldr r0, [r1] /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
|
||||
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
ldmia r0!, {r1-r4} /* Read task's dedicated PAC key from stack. */
|
||||
msr PAC_KEY_P_3, r1 /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
msr PAC_KEY_P_2, r2
|
||||
msr PAC_KEY_P_1, r3
|
||||
msr PAC_KEY_P_0, r4
|
||||
clrm {r1-r4} /* Clear r1-r4. */
|
||||
#endif /* configENABLE_PAC */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r2] /* Read the value of MPU_CTRL. */
|
||||
bic r4, r4, #1 /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
|
||||
str r4, [r2] /* Disable MPU. */
|
||||
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
ldr r3, [r1] /* r3 = *r1 i.e. r3 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r3, [r2] /* Program MAIR0. */
|
||||
ldr r2, =0xe000ed98 /* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
movs r3, #4 /* r3 = 4. */
|
||||
str r3, [r2] /* Program RNR = 4. */
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
ldmia r1!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r2!, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r2] /* Read the value of MPU_CTRL. */
|
||||
orr r4, r4, #1 /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||
str r4, [r2] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
ldm r0!, {r1-r3} /* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
|
||||
msr psplim, r1 /* Set this task's PSPLIM value. */
|
||||
msr control, r2 /* Set this task's CONTROL value. */
|
||||
adds r0, #32 /* Discard everything up to r0. */
|
||||
msr psp, r0 /* This is now the new top of stack to use in the task. */
|
||||
isb
|
||||
mov r0, #0
|
||||
msr basepri, r0 /* Ensure that interrupts are enabled when the first task starts. */
|
||||
bx r3 /* Finally, branch to EXC_RETURN. */
|
||||
#else /* configENABLE_MPU */
|
||||
ldm r0!, {r1-r2} /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
|
||||
msr psplim, r1 /* Set this task's PSPLIM value. */
|
||||
mrs r1, control /* Obtain current control register value. */
|
||||
orrs r1, r1, #2 /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointe (PSP). */
|
||||
msr control, r1 /* Write back the new control register value. */
|
||||
movs r1, #2 /* r1 = 2. */
|
||||
msr CONTROL, r1 /* Switch to use PSP in the thread mode. */
|
||||
adds r0, #32 /* Discard everything up to r0. */
|
||||
msr psp, r0 /* This is now the new top of stack to use in the task. */
|
||||
isb
|
||||
mov r0, #0
|
||||
msr basepri, r0 /* Ensure that interrupts are enabled when the first task starts. */
|
||||
bx r2 /* Finally, branch to EXC_RETURN. */
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -213,7 +149,7 @@ vStartFirstTask:
|
|||
cpsie f
|
||||
dsb
|
||||
isb
|
||||
svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */
|
||||
svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
ulSetInterruptMask:
|
||||
|
|
@ -232,150 +168,23 @@ vClearInterruptMask:
|
|||
bx lr /* Return. */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
|
||||
PendSV_Handler:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r2] /* r0 = pxCurrentTCB. */
|
||||
ldr r1, [r0] /* r1 = Location in TCB where the context should be saved. */
|
||||
mrs r2, psp /* r2 = PSP. */
|
||||
|
||||
save_general_regs:
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
add r2, r2, #0x20 /* Move r2 to location where s0 is saved. */
|
||||
tst lr, #0x10
|
||||
ittt eq
|
||||
vstmiaeq r1!, {s16-s31} /* Store s16-s31. */
|
||||
vldmiaeq r2, {s0-s16} /* Copy hardware saved FP context into s0-s16. */
|
||||
vstmiaeq r1!, {s0-s16} /* Store hardware saved FP context. */
|
||||
sub r2, r2, #0x20 /* Set r2 back to the location of hardware saved context. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
stmia r1!, {r4-r11} /* Store r4-r11. */
|
||||
ldmia r2, {r4-r11} /* Copy the hardware saved context into r4-r11. */
|
||||
stmia r1!, {r4-r11} /* Store the hardware saved context. */
|
||||
|
||||
save_special_regs:
|
||||
mrs r3, psplim /* r3 = PSPLIM. */
|
||||
mrs r4, control /* r4 = CONTROL. */
|
||||
stmia r1!, {r2-r4, lr} /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
mrs r2, PAC_KEY_P_0 /* Read task's dedicated PAC key from the PAC key registers. */
|
||||
mrs r3, PAC_KEY_P_1
|
||||
mrs r4, PAC_KEY_P_2
|
||||
mrs r5, PAC_KEY_P_3
|
||||
stmia r1!, {r2-r5} /* Store the task's dedicated PAC key on the task's context. */
|
||||
clrm {r2-r5} /* Clear r2-r5. */
|
||||
#endif /* configENABLE_PAC */
|
||||
|
||||
str r1, [r0] /* Save the location from where the context should be restored as the first member of TCB. */
|
||||
|
||||
select_next_task:
|
||||
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
msr basepri, r0 /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
|
||||
dsb
|
||||
isb
|
||||
bl vTaskSwitchContext
|
||||
mov r0, #0 /* r0 = 0. */
|
||||
msr basepri, r0 /* Enable interrupts. */
|
||||
|
||||
program_mpu:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r2] /* r0 = pxCurrentTCB. */
|
||||
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
bic r2, #1 /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
|
||||
str r2, [r1] /* Disable MPU. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
|
||||
ldr r1, [r0] /* r1 = *r0 i.e. r1 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r1, [r2] /* Program MAIR0. */
|
||||
|
||||
adds r0, #4 /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
|
||||
ldr r1, =0xe000ed98 /* r1 = 0xe000ed98 [Location of RNR]. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
|
||||
movs r3, #4 /* r3 = 4. */
|
||||
str r3, [r1] /* Program RNR = 4. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
movs r3, #8 /* r3 = 8. */
|
||||
str r3, [r1] /* Program RNR = 8. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
movs r3, #12 /* r3 = 12. */
|
||||
str r3, [r1] /* Program RNR = 12. */
|
||||
ldmia r0!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r2, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||
|
||||
ldr r1, =0xe000ed94 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r2, [r1] /* Read the value of MPU_CTRL. */
|
||||
orr r2, #1 /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
|
||||
str r2, [r1] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
restore_context:
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r0, [r2] /* r0 = pxCurrentTCB.*/
|
||||
ldr r1, [r0] /* r1 = Location of saved context in TCB. */
|
||||
|
||||
restore_special_regs:
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
ldmdb r1!, {r2-r5} /* Read task's dedicated PAC key from the task's context. */
|
||||
msr PAC_KEY_P_0, r2 /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
msr PAC_KEY_P_1, r3
|
||||
msr PAC_KEY_P_2, r4
|
||||
msr PAC_KEY_P_3, r5
|
||||
clrm {r2-r5} /* Clear r2-r5. */
|
||||
#endif /* configENABLE_PAC */
|
||||
ldmdb r1!, {r2-r4, lr} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
|
||||
msr psp, r2
|
||||
msr psplim, r3
|
||||
msr control, r4
|
||||
|
||||
restore_general_regs:
|
||||
ldmdb r1!, {r4-r11} /* r4-r11 contain hardware saved context. */
|
||||
stmia r2!, {r4-r11} /* Copy the hardware saved context on the task stack. */
|
||||
ldmdb r1!, {r4-r11} /* r4-r11 restored. */
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
tst lr, #0x10
|
||||
ittt eq
|
||||
vldmdbeq r1!, {s0-s16} /* s0-s16 contain hardware saved FP context. */
|
||||
vstmiaeq r2!, {s0-s16} /* Copy hardware saved FP context on the task stack. */
|
||||
vldmdbeq r1!, {s16-s31} /* Restore s16-s31. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
|
||||
restore_context_done:
|
||||
str r1, [r0] /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
bx lr
|
||||
|
||||
#else /* configENABLE_MPU */
|
||||
|
||||
PendSV_Handler:
|
||||
mrs r0, psp /* Read PSP in r0. */
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
|
||||
#if ( configENABLE_FPU == 1 )
|
||||
tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
|
||||
it eq
|
||||
vstmdbeq r0!, {s16-s31} /* Store the additional FP context registers which are not saved automatically. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
|
||||
vstmdbeq r0!, {s16-s31} /* Store the FPU registers which are not saved automatically. */
|
||||
#endif /* configENABLE_FPU */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
mrs r1, psplim /* r1 = PSPLIM. */
|
||||
mrs r2, control /* r2 = CONTROL. */
|
||||
mov r3, lr /* r3 = LR/EXC_RETURN. */
|
||||
stmdb r0!, {r1-r11} /* Store on the stack - PSPLIM, CONTROL, LR and registers that are not automatically saved. */
|
||||
#else /* configENABLE_MPU */
|
||||
mrs r2, psplim /* r2 = PSPLIM. */
|
||||
mov r3, lr /* r3 = LR/EXC_RETURN. */
|
||||
stmdb r0!, {r2-r11} /* Store on the stack - PSPLIM, LR and registers that are not automatically. */
|
||||
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
mrs r1, PAC_KEY_P_3 /* Read task's dedicated PAC key from the PAC key registers. */
|
||||
mrs r2, PAC_KEY_P_2
|
||||
mrs r3, PAC_KEY_P_1
|
||||
mrs r4, PAC_KEY_P_0
|
||||
stmdb r0!, {r1-r4} /* Store the task's dedicated PAC key on the stack. */
|
||||
clrm {r1-r4} /* Clear r1-r4. */
|
||||
#endif /* configENABLE_PAC */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
ldr r1, [r2] /* Read pxCurrentTCB. */
|
||||
|
|
@ -393,64 +202,60 @@ PendSV_Handler:
|
|||
ldr r1, [r2] /* Read pxCurrentTCB. */
|
||||
ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
|
||||
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
ldmia r0!, {r2-r5} /* Read task's dedicated PAC key from stack. */
|
||||
msr PAC_KEY_P_3, r2 /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
msr PAC_KEY_P_2, r3
|
||||
msr PAC_KEY_P_1, r4
|
||||
msr PAC_KEY_P_0, r5
|
||||
clrm {r2-r5} /* Clear r2-r5. */
|
||||
#endif /* configENABLE_PAC */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r2] /* Read the value of MPU_CTRL. */
|
||||
bic r4, r4, #1 /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
|
||||
str r4, [r2] /* Disable MPU. */
|
||||
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
|
||||
ldr r3, [r1] /* r3 = *r1 i.e. r3 = MAIR0. */
|
||||
ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */
|
||||
str r3, [r2] /* Program MAIR0. */
|
||||
ldr r2, =0xe000ed98 /* r2 = 0xe000ed98 [Location of RNR]. */
|
||||
movs r3, #4 /* r3 = 4. */
|
||||
str r3, [r2] /* Program RNR = 4. */
|
||||
adds r1, #4 /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
|
||||
ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||
ldmia r1!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||
stmia r2!, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||
|
||||
ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||
ldr r4, [r2] /* Read the value of MPU_CTRL. */
|
||||
orr r4, r4, #1 /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||
str r4, [r2] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
ldmia r0!, {r1-r11} /* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r11 restored. */
|
||||
#else /* configENABLE_MPU */
|
||||
ldmia r0!, {r2-r11} /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
|
||||
#endif /* configENABLE_MPU */
|
||||
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
tst r3, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
|
||||
#if ( configENABLE_FPU == 1 )
|
||||
tst r3, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
|
||||
it eq
|
||||
vldmiaeq r0!, {s16-s31} /* Restore the additional FP context registers which are not restored automatically. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
vldmiaeq r0!, {s16-s31} /* Restore the FPU registers which are not restored automatically. */
|
||||
#endif /* configENABLE_FPU */
|
||||
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
msr psplim, r1 /* Restore the PSPLIM register value for the task. */
|
||||
msr control, r2 /* Restore the CONTROL register value for the task. */
|
||||
#else /* configENABLE_MPU */
|
||||
msr psplim, r2 /* Restore the PSPLIM register value for the task. */
|
||||
#endif /* configENABLE_MPU */
|
||||
msr psp, r0 /* Remember the new top of stack for the task. */
|
||||
bx r3
|
||||
|
||||
#endif /* configENABLE_MPU */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
|
||||
|
||||
SVC_Handler:
|
||||
tst lr, #4
|
||||
ite eq
|
||||
mrseq r0, msp
|
||||
mrsne r0, psp
|
||||
|
||||
ldr r1, [r0, #24]
|
||||
ldrb r2, [r1, #-2]
|
||||
cmp r2, #NUM_SYSTEM_CALLS
|
||||
blt syscall_enter
|
||||
cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */
|
||||
beq syscall_exit
|
||||
b vPortSVCHandler_C
|
||||
|
||||
syscall_enter:
|
||||
mov r1, lr
|
||||
b vSystemCallEnter
|
||||
|
||||
syscall_exit:
|
||||
mov r1, lr
|
||||
b vSystemCallExit
|
||||
|
||||
#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
SVC_Handler:
|
||||
tst lr, #4
|
||||
ite eq
|
||||
mrseq r0, msp
|
||||
mrsne r0, psp
|
||||
b vPortSVCHandler_C
|
||||
|
||||
#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
END
|
||||
|
|
|
|||
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Reference in a new issue