[AUTO][RELEASE]: Update SBOM

* Update History.txt for V10.6.2

.github/lexicon.txt

@@ -2469,6 +2469,7 @@ uxpriority
 uxprioritytouse
 uxqueue
 uxqueuegetqueueitemsize
+uxqueuegetqueuelength
 uxqueuelength
 uxqueuemessageswaiting
 uxqueuespacesavailable

.github/scripts/kernel_checker.py

@@ -1,6 +1,6 @@
 #!/usr/bin/env python3
 #/*
-# * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+# * FreeRTOS Kernel V10.6.2
 # * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 # *
 # * SPDX-License-Identifier: MIT
@@ -99,7 +99,7 @@ KERNEL_THIRD_PARTY_PATTERNS = [
 
 KERNEL_HEADER = [
     '/*\n',
-    ' * FreeRTOS Kernel <DEVELOPMENT BRANCH>\n',
+    ' * FreeRTOS Kernel V10.6.2\n',
     ' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n',
     ' *\n',
     ' * SPDX-License-Identifier: MIT\n',

.github/scripts/manifest_updater.py

@@ -0,0 +1,32 @@
+#!/usr/bin/env python3
+import os
+import argparse
+
+THIS_FILE_PATH = os.path.dirname(os.path.abspath(__file__))
+MANIFEST_FILE = os.path.join(THIS_FILE_PATH, '..', '..', 'manifest.yml')
+
+def update_manifest_file(new_version_number):
+    updated_lines = []
+    with open(MANIFEST_FILE, 'r') as f:
+        for line in f:
+            line = line.strip()
+            if line.startswith('version'):
+                updated_lines.append(f'version: "v{new_version_number}"\n')
+            else:
+                updated_lines.append(f'{line}\n')
+
+    with open(MANIFEST_FILE, 'w') as f:
+        f.writelines(updated_lines)
+
+def parse_args():
+    parser = argparse.ArgumentParser()
+    parser.add_argument('-v', '--version', required=True, help='New version number.')
+    args = parser.parse_args()
+    return args
+
+def main():
+    args = parse_args()
+    update_manifest_file(args.version)
+
+if __name__ == '__main__':
+    main()

.github/workflows/auto-release.yml

@@ -63,6 +63,19 @@ jobs:
         env:
             GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
 
+      - name : Update version number in manifest.yml
+        working-directory: ./local_kernel
+        run: |
+          ./.github/scripts/manifest_updater.py -v ${{ github.event.inputs.version_number }}
+          exit $?
+
+      - name : Commit version number change in manifest.yml
+        working-directory: ./local_kernel
+        run: |
+          git add .
+          git commit -m '[AUTO][RELEASE]: Update version number in manifest.yml'
+          git push -u origin ${{ github.event.inputs.version_number }}
+
       - name: Generate SBOM
         uses: FreeRTOS/CI-CD-Github-Actions/sbom-generator@main
         with:
@@ -73,7 +86,7 @@ jobs:
         working-directory: ./local_kernel
         run: |
           git add .
-          git commit -m 'Update SBOM'
+          git commit -m '[AUTO][RELEASE]: Update SBOM'
           git push -u origin ${{ github.event.inputs.version_number }}
           echo "COMMIT_SHA_2=$(git rev-parse HEAD)" >> $GITHUB_ENV
 
@@ -81,7 +94,7 @@ jobs:
         run: |
           # Install deps and run
           pip install -r ./tools/.github/scripts/release-requirements.txt
-          ./tools/.github/scripts/release.py FreeRTOS --kernel-repo-path=local_kernel --kernel-commit=${{ env.COMMIT_SHA_2 }} --new-kernel-version=${{ github.event.inputs.version_number }} --new-kernel-main-br-version=${{ github.event.inputs.main_br_version }}
+          ./tools/.github/scripts/release.py ${{ github.repository_owner }} --kernel-repo-path=local_kernel --kernel-commit=${{ env.COMMIT_SHA_2 }} --new-kernel-version=${{ github.event.inputs.version_number }} --new-kernel-main-br-version=${{ github.event.inputs.main_br_version }}
           exit $?
         env:
             GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

.github/workflows/kernel-demos.yml

@@ -123,9 +123,22 @@ jobs:
         with:
           ref: main
           repository: FreeRTOS/FreeRTOS
-          submodules: 'recursive'
           fetch-depth: 1
 
+      - name: Fetch Community-Supported-Demos Submodule
+        shell: bash
+        run: |
+          # Fetch Community-Supported-Demos Submodule
+          echo "::group::Fetch Community-Supported-Demos Submodule"
+          git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos
+          echo "::engdroup::"
+          if [ "$?" = "0" ]; then
+            echo -e "\033[32;3mCloned the Community-Supported-Demos\033[0m"
+          else
+            echo -e "\033[32;31mCommunity-Supported-Demos Clone Failed...\033[0m"
+            exit 1
+          fi
+
       # Checkout user pull request changes
       - name: Checkout Pull Request
         uses: actions/checkout@v2
@@ -148,20 +161,6 @@ jobs:
         working-directory: FreeRTOS/Demo/CORTEX_LM3S102_GCC
         run: make -j
 
-      - name: Build CORTEX_M3_MPS2_QEMU_GCC Demo
-        shell: bash
-        working-directory: FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC
-        run: |
-          make clean
-          make -j
-
-      - name: Build CORTEX_M3_MPS2_QEMU_GCC Demo
-        shell: bash
-        working-directory: FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC
-        run: |
-          make clean
-          make FULL_DEMO=1 -j
-
       - name: Build CORTEX_LM3S811_GCC Demo
         shell: bash
         working-directory: FreeRTOS/Demo/CORTEX_LM3S811_GCC
@@ -169,7 +168,7 @@ jobs:
 
       - name: Build CORTEX_M0+_RP2040 Demos
         shell: bash
-        working-directory: FreeRTOS/Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040
+        working-directory: FreeRTOS/Demo/ThirdParty/Community-Supported-Demos/CORTEX_M0+_RP2040
         run: |
           git clone https://github.com/raspberrypi/pico-sdk.git
           cmake -B build -DPICO_SDK_PATH=pico-sdk -GNinja

.github/workflows/unit-tests.yml

@@ -8,7 +8,7 @@ jobs:
     - name: Checkout Parent Repository
       uses: actions/checkout@v2
       with:
-        ref: main
+        ref: 80db00d98bfac8b22289a2668d9e6b0265946d24
         repository: FreeRTOS/FreeRTOS
         submodules: 'recursive'
         fetch-depth: 1

History.txt

@@ -1,6 +1,32 @@
 Documentation and download available at https://www.FreeRTOS.org/
 
-Changes between FreeRTOS V10.5.1 and FreeRTOS 10.6.0 released July 13, 2023
+Changes between FreeRTOS V10.6.1 and FreeRTOS V10.6.2 released November 29, 2023
+
+	+ Add the following improvements to the new MPU wrapper (mpu_wrappers_v2.c)
+	  introduced in version 10.6.0:
+	  - Introduce Access Control List (ACL) feature to allow the application
+	    writer to control an unprivileged task’s access to kernel objects.
+	  - Update the system call entry mechanism to only require one Supervisor
+	    Call (SVC) instruction.
+	  - Wrap parameters for system calls with more than four parameters in a
+	    struct to avoid special handling during system call entry.
+	  - Fix 2 possible integer overflows.
+	  - Convert some asserts to run time parameter checks.
+
+Changes between FreeRTOS V10.6.0 and FreeRTOS V10.6.1 released August 17, 2023
+
+	+ Add runtime parameter checks to functions in mpu_wrappers_v2.c file.
+	  The same checks are already performed in API implementations using
+	  asserts.
+	  We thank the following people for their inputs in these changes:
+	  - Lan Luo, Zixia Liu of School of Computer Science and Technology,
+	    Anhui University of Technology, China.
+	  - Xinwen Fu of Department of Computer Science, University of
+	    Massachusetts Lowell, USA.
+	  - Xinhui Shao, Yumeng Wei, Huaiyu Yan, Zhen Ling of School of
+	    Computer Science and Engineering, Southeast University, China.
+
+Changes between FreeRTOS V10.5.1 and FreeRTOS V10.6.0 released July 13, 2023
 
 	+ Add a new MPU wrapper that places additional restrictions on unprivileged
 	  tasks. The following is the list of changes introduced with the new MPU

croutine.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

event_groups.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -46,26 +46,6 @@
  * correct privileged Vs unprivileged linkage and placement. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021 See comment above. */
 
-/* The following bit fields convey control information in a task's event list
- * item value.  It is important they don't clash with the
- * taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */
-#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
-    #define eventCLEAR_EVENTS_ON_EXIT_BIT    0x0100U
-    #define eventUNBLOCKED_DUE_TO_BIT_SET    0x0200U
-    #define eventWAIT_FOR_ALL_BITS           0x0400U
-    #define eventEVENT_BITS_CONTROL_BYTES    0xff00U
-#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
-    #define eventCLEAR_EVENTS_ON_EXIT_BIT    0x01000000UL
-    #define eventUNBLOCKED_DUE_TO_BIT_SET    0x02000000UL
-    #define eventWAIT_FOR_ALL_BITS           0x04000000UL
-    #define eventEVENT_BITS_CONTROL_BYTES    0xff000000UL
-#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_64_BITS )
-    #define eventCLEAR_EVENTS_ON_EXIT_BIT    0x0100000000000000ULL
-    #define eventUNBLOCKED_DUE_TO_BIT_SET    0x0200000000000000ULL
-    #define eventWAIT_FOR_ALL_BITS           0x0400000000000000ULL
-    #define eventEVENT_BITS_CONTROL_BYTES    0xff00000000000000ULL
-#endif /* if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) */
-
 typedef struct EventGroupDef_t
 {
     EventBits_t uxEventBits;

include/FreeRTOS.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -86,6 +86,11 @@
     #define configUSE_MPU_WRAPPERS_V1    0
 #endif
 
+/* Set configENABLE_ACCESS_CONTROL_LIST to 1 to enable access control list support. */
+#ifndef configENABLE_ACCESS_CONTROL_LIST
+    #define configENABLE_ACCESS_CONTROL_LIST    0
+#endif
+
 /* Basic FreeRTOS definitions. */
 #include "projdefs.h"
 

include/StackMacros.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/atomic.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/croutine.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/deprecated_definitions.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/event_groups.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -36,6 +36,26 @@
 /* FreeRTOS includes. */
 #include "timers.h"
 
+/* The following bit fields convey control information in a task's event list
+ * item value.  It is important they don't clash with the
+ * taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */
+#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
+    #define eventCLEAR_EVENTS_ON_EXIT_BIT    0x0100U
+    #define eventUNBLOCKED_DUE_TO_BIT_SET    0x0200U
+    #define eventWAIT_FOR_ALL_BITS           0x0400U
+    #define eventEVENT_BITS_CONTROL_BYTES    0xff00U
+#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
+    #define eventCLEAR_EVENTS_ON_EXIT_BIT    0x01000000UL
+    #define eventUNBLOCKED_DUE_TO_BIT_SET    0x02000000UL
+    #define eventWAIT_FOR_ALL_BITS           0x04000000UL
+    #define eventEVENT_BITS_CONTROL_BYTES    0xff000000UL
+#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_64_BITS )
+    #define eventCLEAR_EVENTS_ON_EXIT_BIT    0x0100000000000000ULL
+    #define eventUNBLOCKED_DUE_TO_BIT_SET    0x0200000000000000ULL
+    #define eventWAIT_FOR_ALL_BITS           0x0400000000000000ULL
+    #define eventEVENT_BITS_CONTROL_BYTES    0xff00000000000000ULL
+#endif /* if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) */
+
 /* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {

include/list.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/message_buffer.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/mpu_prototypes.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -38,6 +38,42 @@
 #ifndef MPU_PROTOTYPES_H
 #define MPU_PROTOTYPES_H
 
+typedef struct xTaskGenericNotifyParams
+{
+    TaskHandle_t xTaskToNotify;
+    UBaseType_t uxIndexToNotify;
+    uint32_t ulValue;
+    eNotifyAction eAction;
+    uint32_t * pulPreviousNotificationValue;
+} xTaskGenericNotifyParams_t;
+
+typedef struct xTaskGenericNotifyWaitParams
+{
+    UBaseType_t uxIndexToWaitOn;
+    uint32_t ulBitsToClearOnEntry;
+    uint32_t ulBitsToClearOnExit;
+    uint32_t * pulNotificationValue;
+    TickType_t xTicksToWait;
+} xTaskGenericNotifyWaitParams_t;
+
+typedef struct xTimerGenericCommandParams
+{
+    TimerHandle_t xTimer;
+    BaseType_t xCommandID;
+    TickType_t xOptionalValue;
+    BaseType_t * pxHigherPriorityTaskWoken;
+    TickType_t xTicksToWait;
+} xTimerGenericCommandParams_t;
+
+typedef struct xEventGroupWaitBitsParams
+{
+    EventGroupHandle_t xEventGroup;
+    EventBits_t uxBitsToWaitFor;
+    BaseType_t xClearOnExit;
+    BaseType_t xWaitForAllBits;
+    TickType_t xTicksToWait;
+} xEventGroupWaitBitsParams_t;
+
 /* MPU versions of task.h API functions. */
 void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
@@ -77,11 +113,13 @@ BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify,
                                    uint32_t ulValue,
                                    eNotifyAction eAction,
                                    uint32_t * pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
                                        uint32_t ulBitsToClearOnEntry,
                                        uint32_t ulBitsToClearOnExit,
                                        uint32_t * pulNotificationValue,
                                        TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
 uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
                                       BaseType_t xClearCountOnExit,
                                       TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
@@ -228,9 +266,10 @@ BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer,
                                      const TickType_t xOptionalValue,
                                      BaseType_t * const pxHigherPriorityTaskWoken,
                                      const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
 const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
-                              const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
+                              const BaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
@@ -259,6 +298,7 @@ EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
                                      const BaseType_t xClearOnExit,
                                      const BaseType_t xWaitForAllBits,
                                      TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
 EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup,
                                       const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL;
 EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup,

include/mpu_syscall_numbers.h

@@ -0,0 +1,106 @@
+/*
+ * FreeRTOS Kernel V10.6.2
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef MPU_SYSCALL_NUMBERS_H
+#define MPU_SYSCALL_NUMBERS_H
+
+/* Numbers assigned to various system calls. */
+#define SYSTEM_CALL_xTaskGenericNotify                     0
+#define SYSTEM_CALL_xTaskGenericNotifyWait                 1
+#define SYSTEM_CALL_xTimerGenericCommand                   2
+#define SYSTEM_CALL_xEventGroupWaitBits                    3
+#define SYSTEM_CALL_xTaskDelayUntil                        4
+#define SYSTEM_CALL_xTaskAbortDelay                        5
+#define SYSTEM_CALL_vTaskDelay                             6
+#define SYSTEM_CALL_uxTaskPriorityGet                      7
+#define SYSTEM_CALL_eTaskGetState                          8
+#define SYSTEM_CALL_vTaskGetInfo                           9
+#define SYSTEM_CALL_xTaskGetIdleTaskHandle                 10
+#define SYSTEM_CALL_vTaskSuspend                           11
+#define SYSTEM_CALL_vTaskResume                            12
+#define SYSTEM_CALL_xTaskGetTickCount                      13
+#define SYSTEM_CALL_uxTaskGetNumberOfTasks                 14
+#define SYSTEM_CALL_pcTaskGetName                          15
+#define SYSTEM_CALL_ulTaskGetRunTimeCounter                16
+#define SYSTEM_CALL_ulTaskGetRunTimePercent                17
+#define SYSTEM_CALL_ulTaskGetIdleRunTimePercent            18
+#define SYSTEM_CALL_ulTaskGetIdleRunTimeCounter            19
+#define SYSTEM_CALL_vTaskSetApplicationTaskTag             20
+#define SYSTEM_CALL_xTaskGetApplicationTaskTag             21
+#define SYSTEM_CALL_vTaskSetThreadLocalStoragePointer      22
+#define SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer     23
+#define SYSTEM_CALL_uxTaskGetSystemState                   24
+#define SYSTEM_CALL_uxTaskGetStackHighWaterMark            25
+#define SYSTEM_CALL_uxTaskGetStackHighWaterMark2           26
+#define SYSTEM_CALL_xTaskGetCurrentTaskHandle              27
+#define SYSTEM_CALL_xTaskGetSchedulerState                 28
+#define SYSTEM_CALL_vTaskSetTimeOutState                   29
+#define SYSTEM_CALL_xTaskCheckForTimeOut                   30
+#define SYSTEM_CALL_ulTaskGenericNotifyTake                31
+#define SYSTEM_CALL_xTaskGenericNotifyStateClear           32
+#define SYSTEM_CALL_ulTaskGenericNotifyValueClear          33
+#define SYSTEM_CALL_xQueueGenericSend                      34
+#define SYSTEM_CALL_uxQueueMessagesWaiting                 35
+#define SYSTEM_CALL_uxQueueSpacesAvailable                 36
+#define SYSTEM_CALL_xQueueReceive                          37
+#define SYSTEM_CALL_xQueuePeek                             38
+#define SYSTEM_CALL_xQueueSemaphoreTake                    39
+#define SYSTEM_CALL_xQueueGetMutexHolder                   40
+#define SYSTEM_CALL_xQueueTakeMutexRecursive               41
+#define SYSTEM_CALL_xQueueGiveMutexRecursive               42
+#define SYSTEM_CALL_xQueueSelectFromSet                    43
+#define SYSTEM_CALL_xQueueAddToSet                         44
+#define SYSTEM_CALL_vQueueAddToRegistry                    45
+#define SYSTEM_CALL_vQueueUnregisterQueue                  46
+#define SYSTEM_CALL_pcQueueGetName                         47
+#define SYSTEM_CALL_pvTimerGetTimerID                      48
+#define SYSTEM_CALL_vTimerSetTimerID                       49
+#define SYSTEM_CALL_xTimerIsTimerActive                    50
+#define SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle         51
+#define SYSTEM_CALL_pcTimerGetName                         52
+#define SYSTEM_CALL_vTimerSetReloadMode                    53
+#define SYSTEM_CALL_xTimerGetReloadMode                    54
+#define SYSTEM_CALL_uxTimerGetReloadMode                   55
+#define SYSTEM_CALL_xTimerGetPeriod                        56
+#define SYSTEM_CALL_xTimerGetExpiryTime                    57
+#define SYSTEM_CALL_xEventGroupClearBits                   58
+#define SYSTEM_CALL_xEventGroupSetBits                     59
+#define SYSTEM_CALL_xEventGroupSync                        60
+#define SYSTEM_CALL_uxEventGroupGetNumber                  61
+#define SYSTEM_CALL_vEventGroupSetNumber                   62
+#define SYSTEM_CALL_xStreamBufferSend                      63
+#define SYSTEM_CALL_xStreamBufferReceive                   64
+#define SYSTEM_CALL_xStreamBufferIsFull                    65
+#define SYSTEM_CALL_xStreamBufferIsEmpty                   66
+#define SYSTEM_CALL_xStreamBufferSpacesAvailable           67
+#define SYSTEM_CALL_xStreamBufferBytesAvailable            68
+#define SYSTEM_CALL_xStreamBufferSetTriggerLevel           69
+#define SYSTEM_CALL_xStreamBufferNextMessageLengthBytes    70
+#define NUM_SYSTEM_CALLS                                   71  /* Total number of system calls. */
+
+#endif /* MPU_SYSCALL_NUMBERS_H */

include/mpu_wrappers.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -233,6 +233,35 @@
         #define PRIVILEGED_DATA    __attribute__( ( section( "privileged_data" ) ) )
         #define FREERTOS_SYSTEM_CALL
 
+
+        #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+
+            #define vGrantAccessToTask( xTask, xTaskToGrantAccess )                        vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xTaskToGrantAccess ) )
+            #define vRevokeAccessToTask( xTask, xTaskToRevokeAccess )                      vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xTaskToRevokeAccess ) )
+
+            #define vGrantAccessToSemaphore( xTask, xSemaphoreToGrantAccess )              vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xSemaphoreToGrantAccess ) )
+            #define vRevokeAccessToSemaphore( xTask, xSemaphoreToRevokeAccess )            vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xSemaphoreToRevokeAccess ) )
+
+            #define vGrantAccessToQueue( xTask, xQueueToGrantAccess )                      vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueToGrantAccess ) )
+            #define vRevokeAccessToQueue( xTask, xQueueToRevokeAccess )                    vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueToRevokeAccess ) )
+
+            #define vGrantAccessToQueueSet( xTask, xQueueSetToGrantAccess )                vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueSetToGrantAccess ) )
+            #define vRevokeAccessToQueueSet( xTask, xQueueSetToRevokeAccess )              vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueSetToRevokeAccess ) )
+
+            #define vGrantAccessToEventGroup( xTask, xEventGroupToGrantAccess )            vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xEventGroupToGrantAccess ) )
+            #define vRevokeAccessToEventGroup( xTask, xEventGroupToRevokeAccess )          vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xEventGroupToRevokeAccess ) )
+
+            #define vGrantAccessToStreamBuffer( xTask, xStreamBufferToGrantAccess )        vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xStreamBufferToGrantAccess ) )
+            #define vRevokeAccessToStreamBuffer( xTask, xStreamBufferToRevokeAccess )      vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xStreamBufferToRevokeAccess ) )
+
+            #define vGrantAccessToMessageBuffer( xTask, xMessageBufferToGrantAccess )      vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xMessageBufferToGrantAccess ) )
+            #define vRevokeAccessToMessageBuffer( xTask, xMessageBufferToRevokeAccess )    vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xMessageBufferToRevokeAccess ) )
+
+            #define vGrantAccessToTimer( xTask, xTimerToGrantAccess )                      vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xTimerToGrantAccess ) )
+            #define vRevokeAccessToTimer( xTask, xTimerToRevokeAccess )                    vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xTimerToRevokeAccess ) )
+
+        #endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */
+
     #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
 
 /* Ensure API functions go in the privileged execution section. */

include/newlib-freertos.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/picolibc-freertos.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/portable.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -247,6 +247,21 @@ void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
                                                 uint32_t ulAccessRequested ) PRIVILEGED_FUNCTION;
 #endif
 
+/**
+ * @brief Checks if the calling task is authorized to access the given kernel object.
+ *
+ * @param lInternalIndexOfKernelObject The index of the kernel object in the kernel
+ *                                     object handle pool.
+ *
+ * @return pdTRUE if the calling task is authorized to access the kernel object,
+ *         pdFALSE otherwise.
+ */
+#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
+    BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) PRIVILEGED_FUNCTION;
+
+#endif
+
 /* *INDENT-OFF* */
 #ifdef __cplusplus
     }

include/projdefs.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/queue.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -1753,6 +1753,7 @@ void vQueueSetQueueNumber( QueueHandle_t xQueue,
 UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 UBaseType_t uxQueueGetQueueItemSize( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+UBaseType_t uxQueueGetQueueLength( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
 /* *INDENT-OFF* */
 #ifdef __cplusplus

include/semphr.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/stack_macros.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/stdint.readme

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/stream_buffer.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

include/task.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -53,10 +53,10 @@
  * The tskKERNEL_VERSION_MAJOR, tskKERNEL_VERSION_MINOR, tskKERNEL_VERSION_BUILD
  * values will reflect the last released version number.
  */
-#define tskKERNEL_VERSION_NUMBER       "V10.4.4+"
+#define tskKERNEL_VERSION_NUMBER       "V10.6.2"
 #define tskKERNEL_VERSION_MAJOR        10
-#define tskKERNEL_VERSION_MINOR        4
+#define tskKERNEL_VERSION_MINOR        6
-#define tskKERNEL_VERSION_BUILD        4
+#define tskKERNEL_VERSION_BUILD        2
 
 /* MPU region parameters passed in ulParameters
  * of MemoryRegion_t struct. */
@@ -3206,6 +3206,27 @@ void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNC
 
 #endif /* portUSING_MPU_WRAPPERS */
 
+
+#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+
+/*
+ * For internal use only.  Grant/Revoke a task's access to a kernel object.
+ */
+    void vGrantAccessToKernelObject( TaskHandle_t xExternalTaskHandle,
+                                     int32_t lExternalKernelObjectHandle ) PRIVILEGED_FUNCTION;
+    void vRevokeAccessToKernelObject( TaskHandle_t xExternalTaskHandle,
+                                      int32_t lExternalKernelObjectHandle ) PRIVILEGED_FUNCTION;
+
+/*
+ * For internal use only.  Grant/Revoke a task's access to a kernel object.
+ */
+    void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle,
+                                         int32_t lInternalIndexOfKernelObject ) PRIVILEGED_FUNCTION;
+    void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle,
+                                          int32_t lInternalIndexOfKernelObject ) PRIVILEGED_FUNCTION;
+
+#endif /* #if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */
+
 /* *INDENT-OFF* */
 #ifdef __cplusplus
     }

include/timers.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

list.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

manifest.yml

@@ -1,4 +1,4 @@
 name : "FreeRTOS-Kernel"
-version: "v10.5.1"
+version: "v10.6.2"
 description: "FreeRTOS Kernel."
 license: "MIT"

portable/ARMv8M/copy_files.py

@@ -1,5 +1,5 @@
 #/*
-# * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+# * FreeRTOS Kernel V10.6.2
 # * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 # *
 # * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -36,6 +36,9 @@
 /* Portasm includes. */
 #include "portasm.h"
 
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
 /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the
  * header files. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
@@ -46,127 +49,127 @@
 
 #if ( configENABLE_MPU == 1 )
 
-void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        " .syntax unified                                 \n"
+            " .syntax unified                                 \n"
-        "                                                 \n"
+            "                                                 \n"
-        " program_mpu_first_task:                         \n"
+            " program_mpu_first_task:                         \n"
-        "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
+            "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
-        "                                                 \n"
+            "                                                 \n"
-        "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
+            "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-        "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
-        "    movs r3, #1                                  \n" /* r3 = 1. */
+            "    movs r3, #1                                  \n" /* r3 = 1. */
-        "    bics r2, r3                                  \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
+            "    bics r2, r3                                  \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
-        "    str r2, [r1]                                 \n" /* Disable MPU. */
+            "    str r2, [r1]                                 \n" /* Disable MPU. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
-        "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
+            "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-        "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-        "    str r1, [r2]                                 \n" /* Program MAIR0. */
+            "    str r1, [r2]                                 \n" /* Program MAIR0. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-        "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
-        "                                                 \n"
+            "                                                 \n"
-        "    movs r3, #4                                  \n" /* r3 = 4. */
+            "    movs r3, #4                                  \n" /* r3 = 4. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 4. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 4. */
-        "    ldmia r0!, {r4-r5}                           \n" /* Read first set of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read first set of RBAR/RLAR registers from TCB. */
-        "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "    stmia r2!, {r4-r5}                           \n" /* Write first set of RBAR/RLAR registers. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write first set of RBAR/RLAR registers. */
-        "    movs r3, #5                                  \n" /* r3 = 5. */
+            "    movs r3, #5                                  \n" /* r3 = 5. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 5. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 5. */
-        "    ldmia r0!, {r4-r5}                           \n" /* Read second set of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read second set of RBAR/RLAR registers from TCB. */
-        "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "    stmia r2!, {r4-r5}                           \n" /* Write second set of RBAR/RLAR registers. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write second set of RBAR/RLAR registers. */
-        "    movs r3, #6                                  \n" /* r3 = 6. */
+            "    movs r3, #6                                  \n" /* r3 = 6. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 6. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 6. */
-        "    ldmia r0!, {r4-r5}                           \n" /* Read third set of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read third set of RBAR/RLAR registers from TCB. */
-        "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "    stmia r2!, {r4-r5}                           \n" /* Write third set of RBAR/RLAR registers. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write third set of RBAR/RLAR registers. */
-        "    movs r3, #7                                  \n" /* r3 = 6. */
+            "    movs r3, #7                                  \n" /* r3 = 6. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 7. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 7. */
-        "    ldmia r0!, {r4-r5}                           \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
-        "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "    stmia r2!, {r4-r5}                           \n" /* Write fourth set of RBAR/RLAR registers. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write fourth set of RBAR/RLAR registers. */
-        "                                                 \n"
+            "                                                 \n"
-        "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
-        "    movs r3, #1                                  \n" /* r3 = 1. */
+            "    movs r3, #1                                  \n" /* r3 = 1. */
-        "    orrs r2, r3                                  \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
+            "    orrs r2, r3                                  \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
-        "    str r2, [r1]                                 \n" /* Enable MPU. */
+            "    str r2, [r1]                                 \n" /* Enable MPU. */
-        "    dsb                                          \n" /* Force memory writes before continuing. */
+            "    dsb                                          \n" /* Force memory writes before continuing. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context_first_task:                     \n"
+            " restore_context_first_task:                     \n"
-        "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
-        "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
+            "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_special_regs_first_task:                \n"
+            " restore_special_regs_first_task:                \n"
-        "    subs r1, #16                                 \n"
+            "    subs r1, #16                                 \n"
-        "    ldmia r1!, {r2-r5}                           \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
+            "    ldmia r1!, {r2-r5}                           \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
-        "    subs r1, #16                                 \n"
+            "    subs r1, #16                                 \n"
-        "    msr psp, r2                                  \n"
+            "    msr psp, r2                                  \n"
-        "    msr psplim, r3                               \n"
+            "    msr psplim, r3                               \n"
-        "    msr control, r4                              \n"
+            "    msr control, r4                              \n"
-        "    mov lr, r5                                   \n"
+            "    mov lr, r5                                   \n"
-        "                                                 \n"
+            "                                                 \n"
-        " restore_general_regs_first_task:                \n"
+            " restore_general_regs_first_task:                \n"
-        "    subs r1, #32                                 \n"
+            "    subs r1, #32                                 \n"
-        "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain half of the hardware saved context. */
+            "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain half of the hardware saved context. */
-        "    stmia r2!, {r4-r7}                           \n" /* Copy half of the the hardware saved context on the task stack. */
+            "    stmia r2!, {r4-r7}                           \n" /* Copy half of the the hardware saved context on the task stack. */
-        "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain rest half of the hardware saved context. */
+            "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain rest half of the hardware saved context. */
-        "    stmia r2!, {r4-r7}                           \n" /* Copy rest half of the the hardware saved context on the task stack. */
+            "    stmia r2!, {r4-r7}                           \n" /* Copy rest half of the the hardware saved context on the task stack. */
-        "    subs r1, #48                                 \n"
+            "    subs r1, #48                                 \n"
-        "    ldmia r1!, {r4-r7}                           \n" /* Restore r8-r11. */
+            "    ldmia r1!, {r4-r7}                           \n" /* Restore r8-r11. */
-        "    mov r8, r4                                   \n" /* r8 = r4. */
+            "    mov r8, r4                                   \n" /* r8 = r4. */
-        "    mov r9, r5                                   \n" /* r9 = r5. */
+            "    mov r9, r5                                   \n" /* r9 = r5. */
-        "    mov r10, r6                                  \n" /* r10 = r6. */
+            "    mov r10, r6                                  \n" /* r10 = r6. */
-        "    mov r11, r7                                  \n" /* r11 = r7. */
+            "    mov r11, r7                                  \n" /* r11 = r7. */
-        "    subs r1, #32                                 \n"
+            "    subs r1, #32                                 \n"
-        "    ldmia r1!, {r4-r7}                           \n" /* Restore r4-r7. */
+            "    ldmia r1!, {r4-r7}                           \n" /* Restore r4-r7. */
-        "    subs r1, #16                                 \n"
+            "    subs r1, #16                                 \n"
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context_done_first_task:                \n"
+            " restore_context_done_first_task:                \n"
-        "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
+            "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
-        "    bx lr                                        \n"
+            "    bx lr                                        \n"
-        "                                                 \n"
+            "                                                 \n"
-        " .align 4                                        \n"
+            " .align 4                                        \n"
-        " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
+            " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
-        " xMPUCTRLConst2: .word 0xe000ed94                \n"
+            " xMPUCTRLConst2: .word 0xe000ed94                \n"
-        " xMAIR0Const2: .word 0xe000edc0                  \n"
+            " xMAIR0Const2: .word 0xe000edc0                  \n"
-        " xRNRConst2: .word 0xe000ed98                    \n"
+            " xRNRConst2: .word 0xe000ed98                    \n"
-        " xRBARConst2: .word 0xe000ed9c                   \n"
+            " xRBARConst2: .word 0xe000ed9c                   \n"
-    );
+        );
-}
+    }
 
 #else /* configENABLE_MPU */
 
-void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        "   .syntax unified                                 \n"
+            "   .syntax unified                                 \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   ldr  r2, pxCurrentTCBConst2                     \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr  r2, pxCurrentTCBConst2                     \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr  r1, [r2]                                   \n"/* Read pxCurrentTCB. */
+            "   ldr  r1, [r2]                                   \n" /* Read pxCurrentTCB. */
-        "   ldr  r0, [r1]                                   \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+            "   ldr  r0, [r1]                                   \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-        "                                                   \n"
+            "                                                   \n"
-        "   ldm  r0!, {r1-r2}                               \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
+            "   ldm  r0!, {r1-r2}                               \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
-        "   msr  psplim, r1                                 \n"/* Set this task's PSPLIM value. */
+            "   msr  psplim, r1                                 \n" /* Set this task's PSPLIM value. */
-        "   movs r1, #2                                     \n"/* r1 = 2. */
+            "   movs r1, #2                                     \n" /* r1 = 2. */
-        "   msr  CONTROL, r1                                \n"/* Switch to use PSP in the thread mode. */
+            "   msr  CONTROL, r1                                \n" /* Switch to use PSP in the thread mode. */
-        "   adds r0, #32                                    \n"/* Discard everything up to r0. */
+            "   adds r0, #32                                    \n" /* Discard everything up to r0. */
-        "   msr  psp, r0                                    \n"/* This is now the new top of stack to use in the task. */
+            "   msr  psp, r0                                    \n" /* This is now the new top of stack to use in the task. */
-        "   isb                                             \n"
+            "   isb                                             \n"
-        "   bx   r2                                         \n"/* Finally, branch to EXC_RETURN. */
+            "   bx   r2                                         \n" /* Finally, branch to EXC_RETURN. */
-        "                                                   \n"
+            "                                                   \n"
-        "   .align 4                                        \n"
+            "   .align 4                                        \n"
-        "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
+            "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
-    );
+        );
-}
+    }
 
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
@@ -177,15 +180,15 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   mrs r0, control                                 \n"/* r0 = CONTROL. */
+        "   mrs r0, control                                 \n" /* r0 = CONTROL. */
-        "   movs r1, #1                                     \n"/* r1 = 1. */
+        "   movs r1, #1                                     \n" /* r1 = 1. */
-        "   tst r0, r1                                      \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
+        "   tst r0, r1                                      \n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
-        "   beq running_privileged                          \n"/* If the result of previous AND operation was 0, branch. */
+        "   beq running_privileged                          \n" /* If the result of previous AND operation was 0, branch. */
-        "   movs r0, #0                                     \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "   movs r0, #0                                     \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-        "   bx lr                                           \n"/* Return. */
+        "   bx lr                                           \n" /* Return. */
         " running_privileged:                               \n"
-        "   movs r0, #1                                     \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "   movs r0, #1                                     \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-        "   bx lr                                           \n"/* Return. */
+        "   bx lr                                           \n" /* Return. */
         "                                                   \n"
         "   .align 4                                        \n"
         ::: "r0", "r1", "memory"
@@ -199,11 +202,11 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   mrs  r0, control                                \n"/* Read the CONTROL register. */
+        "   mrs  r0, control                                \n" /* Read the CONTROL register. */
-        "   movs r1, #1                                     \n"/* r1 = 1. */
+        "   movs r1, #1                                     \n" /* r1 = 1. */
-        "   bics r0, r1                                     \n"/* Clear the bit 0. */
+        "   bics r0, r1                                     \n" /* Clear the bit 0. */
-        "   msr  control, r0                                \n"/* Write back the new CONTROL value. */
+        "   msr  control, r0                                \n" /* Write back the new CONTROL value. */
-        "   bx lr                                           \n"/* Return to the caller. */
+        "   bx lr                                           \n" /* Return to the caller. */
         ::: "r0", "r1", "memory"
     );
 }
@@ -215,11 +218,11 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   mrs r0, control                                 \n"/* r0 = CONTROL. */
+        "   mrs r0, control                                 \n" /* r0 = CONTROL. */
-        "   movs r1, #1                                     \n"/* r1 = 1. */
+        "   movs r1, #1                                     \n" /* r1 = 1. */
-        "   orrs r0, r1                                     \n"/* r0 = r0 | r1. */
+        "   orrs r0, r1                                     \n" /* r0 = r0 | r1. */
-        "   msr control, r0                                 \n"/* CONTROL = r0. */
+        "   msr control, r0                                 \n" /* CONTROL = r0. */
-        "   bx lr                                           \n"/* Return to the caller. */
+        "   bx lr                                           \n" /* Return to the caller. */
         ::: "r0", "r1", "memory"
     );
 }
@@ -231,14 +234,14 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   ldr r0, xVTORConst                              \n"/* Use the NVIC offset register to locate the stack. */
+        "   ldr r0, xVTORConst                              \n" /* Use the NVIC offset register to locate the stack. */
-        "   ldr r0, [r0]                                    \n"/* Read the VTOR register which gives the address of vector table. */
+        "   ldr r0, [r0]                                    \n" /* Read the VTOR register which gives the address of vector table. */
-        "   ldr r0, [r0]                                    \n"/* The first entry in vector table is stack pointer. */
+        "   ldr r0, [r0]                                    \n" /* The first entry in vector table is stack pointer. */
-        "   msr msp, r0                                     \n"/* Set the MSP back to the start of the stack. */
+        "   msr msp, r0                                     \n" /* Set the MSP back to the start of the stack. */
-        "   cpsie i                                         \n"/* Globally enable interrupts. */
+        "   cpsie i                                         \n" /* Globally enable interrupts. */
         "   dsb                                             \n"
         "   isb                                             \n"
-        "   svc %0                                          \n"/* System call to start the first task. */
+        "   svc %0                                          \n" /* System call to start the first task. */
         "   nop                                             \n"
         "                                                   \n"
         "   .align 4                                        \n"
@@ -277,254 +280,249 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
 
 #if ( configENABLE_MPU == 1 )
 
-void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        " .syntax unified                                 \n"
+            " .syntax unified                                 \n"
-        "                                                 \n"
+            "                                                 \n"
-        " ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            " ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        " ldr r0, [r2]                                    \n" /* r0 = pxCurrentTCB. */
+            " ldr r0, [r2]                                    \n" /* r0 = pxCurrentTCB. */
-        " ldr r1, [r0]                                    \n" /* r1 = Location in TCB where the context should be saved. */
+            " ldr r1, [r0]                                    \n" /* r1 = Location in TCB where the context should be saved. */
-        " mrs r2, psp                                     \n" /* r2 = PSP. */
+            " mrs r2, psp                                     \n" /* r2 = PSP. */
-        "                                                 \n"
+            "                                                 \n"
-        " save_general_regs:                              \n"
+            " save_general_regs:                              \n"
-        "    stmia r1!, {r4-r7}                           \n" /* Store r4-r7. */
+            "    stmia r1!, {r4-r7}                           \n" /* Store r4-r7. */
-        "    mov r4, r8                                   \n" /* r4 = r8. */
+            "    mov r4, r8                                   \n" /* r4 = r8. */
-        "    mov r5, r9                                   \n" /* r5 = r9. */
+            "    mov r5, r9                                   \n" /* r5 = r9. */
-        "    mov r6, r10                                  \n" /* r6 = r10. */
+            "    mov r6, r10                                  \n" /* r6 = r10. */
-        "    mov r7, r11                                  \n" /* r7 = r11. */
+            "    mov r7, r11                                  \n" /* r7 = r11. */
-        "    stmia r1!, {r4-r7}                           \n" /* Store r8-r11. */
+            "    stmia r1!, {r4-r7}                           \n" /* Store r8-r11. */
-        "    ldmia r2!, {r4-r7}                           \n" /* Copy half of the  hardware saved context into r4-r7. */
+            "    ldmia r2!, {r4-r7}                           \n" /* Copy half of the  hardware saved context into r4-r7. */
-        "    stmia r1!, {r4-r7}                           \n" /* Store the hardware saved context. */
+            "    stmia r1!, {r4-r7}                           \n" /* Store the hardware saved context. */
-        "    ldmia r2!, {r4-r7}                           \n" /* Copy rest half of the  hardware saved context into r4-r7. */
+            "    ldmia r2!, {r4-r7}                           \n" /* Copy rest half of the  hardware saved context into r4-r7. */
-        "    stmia r1!, {r4-r7}                           \n" /* Store the hardware saved context. */
+            "    stmia r1!, {r4-r7}                           \n" /* Store the hardware saved context. */
-        "                                                 \n"
+            "                                                 \n"
-        " save_special_regs:                              \n"
+            " save_special_regs:                              \n"
-        "    mrs r2, psp                                  \n" /* r2 = PSP. */
+            "    mrs r2, psp                                  \n" /* r2 = PSP. */
-        "    mrs r3, psplim                               \n" /* r3 = PSPLIM. */
+            "    mrs r3, psplim                               \n" /* r3 = PSPLIM. */
-        "    mrs r4, control                              \n" /* r4 = CONTROL. */
+            "    mrs r4, control                              \n" /* r4 = CONTROL. */
-        "    mov r5, lr                                   \n" /* r5 = LR. */
+            "    mov r5, lr                                   \n" /* r5 = LR. */
-        "    stmia r1!, {r2-r5}                           \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
+            "    stmia r1!, {r2-r5}                           \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
-        "    str r1, [r0]                                 \n" /* Save the location from where the context should be restored as the first member of TCB. */
+            "    str r1, [r0]                                 \n" /* Save the location from where the context should be restored as the first member of TCB. */
-        "                                                 \n"
+            "                                                 \n"
-        " select_next_task:                               \n"
+            " select_next_task:                               \n"
-        "    cpsid i                                      \n"
+            "    cpsid i                                      \n"
-        "    bl vTaskSwitchContext                        \n"
+            "    bl vTaskSwitchContext                        \n"
-        "    cpsie i                                      \n"
+            "    cpsie i                                      \n"
-        "                                                 \n"
+            "                                                 \n"
-        " program_mpu:                                    \n"
+            " program_mpu:                                    \n"
-        "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
+            "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
-        "                                                 \n"
+            "                                                 \n"
-        "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
+            "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-        "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
-        "    movs r3, #1                                  \n" /* r3 = 1. */
+            "    movs r3, #1                                  \n" /* r3 = 1. */
-        "    bics r2, r3                                  \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
+            "    bics r2, r3                                  \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
-        "    str r2, [r1]                                 \n" /* Disable MPU. */
+            "    str r2, [r1]                                 \n" /* Disable MPU. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
-        "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
+            "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-        "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-        "    str r1, [r2]                                 \n" /* Program MAIR0. */
+            "    str r1, [r2]                                 \n" /* Program MAIR0. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-        "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
-        "                                                 \n"
+            "                                                 \n"
-        "    movs r3, #4                                  \n" /* r3 = 4. */
+            "    movs r3, #4                                  \n" /* r3 = 4. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 4. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 4. */
-        "    ldmia r0!, {r4-r5}                           \n" /* Read first set of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read first set of RBAR/RLAR registers from TCB. */
-        "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "    stmia r2!, {r4-r5}                           \n" /* Write first set of RBAR/RLAR registers. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write first set of RBAR/RLAR registers. */
-        "    movs r3, #5                                  \n" /* r3 = 5. */
+            "    movs r3, #5                                  \n" /* r3 = 5. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 5. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 5. */
-        "    ldmia r0!, {r4-r5}                           \n" /* Read second set of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read second set of RBAR/RLAR registers from TCB. */
-        "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "    stmia r2!, {r4-r5}                           \n" /* Write second set of RBAR/RLAR registers. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write second set of RBAR/RLAR registers. */
-        "    movs r3, #6                                  \n" /* r3 = 6. */
+            "    movs r3, #6                                  \n" /* r3 = 6. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 6. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 6. */
-        "    ldmia r0!, {r4-r5}                           \n" /* Read third set of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read third set of RBAR/RLAR registers from TCB. */
-        "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "    stmia r2!, {r4-r5}                           \n" /* Write third set of RBAR/RLAR registers. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write third set of RBAR/RLAR registers. */
-        "    movs r3, #7                                  \n" /* r3 = 6. */
+            "    movs r3, #7                                  \n" /* r3 = 6. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 7. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 7. */
-        "    ldmia r0!, {r4-r5}                           \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
-        "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "    stmia r2!, {r4-r5}                           \n" /* Write fourth set of RBAR/RLAR registers. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write fourth set of RBAR/RLAR registers. */
-        "                                                 \n"
+            "                                                 \n"
-        "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
-        "    movs r3, #1                                  \n" /* r3 = 1. */
+            "    movs r3, #1                                  \n" /* r3 = 1. */
-        "    orrs r2, r3                                  \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
+            "    orrs r2, r3                                  \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
-        "    str r2, [r1]                                 \n" /* Enable MPU. */
+            "    str r2, [r1]                                 \n" /* Enable MPU. */
-        "    dsb                                          \n" /* Force memory writes before continuing. */
+            "    dsb                                          \n" /* Force memory writes before continuing. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context:                                \n"
+            " restore_context:                                \n"
-        "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
-        "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
+            "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_special_regs:                           \n"
+            " restore_special_regs:                           \n"
-        "    subs r1, #16                                 \n"
+            "    subs r1, #16                                 \n"
-        "    ldmia r1!, {r2-r5}                           \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
+            "    ldmia r1!, {r2-r5}                           \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
-        "    subs r1, #16                                 \n"
+            "    subs r1, #16                                 \n"
-        "    msr psp, r2                                  \n"
+            "    msr psp, r2                                  \n"
-        "    msr psplim, r3                               \n"
+            "    msr psplim, r3                               \n"
-        "    msr control, r4                              \n"
+            "    msr control, r4                              \n"
-        "    mov lr, r5                                   \n"
+            "    mov lr, r5                                   \n"
-        "                                                 \n"
+            "                                                 \n"
-        " restore_general_regs:                           \n"
+            " restore_general_regs:                           \n"
-        "    subs r1, #32                                 \n"
+            "    subs r1, #32                                 \n"
-        "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain half of the hardware saved context. */
+            "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain half of the hardware saved context. */
-        "    stmia r2!, {r4-r7}                           \n" /* Copy half of the the hardware saved context on the task stack. */
+            "    stmia r2!, {r4-r7}                           \n" /* Copy half of the the hardware saved context on the task stack. */
-        "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain rest half of the hardware saved context. */
+            "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain rest half of the hardware saved context. */
-        "    stmia r2!, {r4-r7}                           \n" /* Copy rest half of the the hardware saved context on the task stack. */
+            "    stmia r2!, {r4-r7}                           \n" /* Copy rest half of the the hardware saved context on the task stack. */
-        "    subs r1, #48                                 \n"
+            "    subs r1, #48                                 \n"
-        "    ldmia r1!, {r4-r7}                           \n" /* Restore r8-r11. */
+            "    ldmia r1!, {r4-r7}                           \n" /* Restore r8-r11. */
-        "    mov r8, r4                                   \n" /* r8 = r4. */
+            "    mov r8, r4                                   \n" /* r8 = r4. */
-        "    mov r9, r5                                   \n" /* r9 = r5. */
+            "    mov r9, r5                                   \n" /* r9 = r5. */
-        "    mov r10, r6                                  \n" /* r10 = r6. */
+            "    mov r10, r6                                  \n" /* r10 = r6. */
-        "    mov r11, r7                                  \n" /* r11 = r7. */
+            "    mov r11, r7                                  \n" /* r11 = r7. */
-        "    subs r1, #32                                 \n"
+            "    subs r1, #32                                 \n"
-        "    ldmia r1!, {r4-r7}                           \n" /* Restore r4-r7. */
+            "    ldmia r1!, {r4-r7}                           \n" /* Restore r4-r7. */
-        "    subs r1, #16                                 \n"
+            "    subs r1, #16                                 \n"
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context_done:                           \n"
+            " restore_context_done:                           \n"
-        "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
+            "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
-        "    bx lr                                        \n"
+            "    bx lr                                        \n"
-        "                                                 \n"
+            "                                                 \n"
-        " .align 4                                        \n"
+            " .align 4                                        \n"
-        " pxCurrentTCBConst: .word pxCurrentTCB           \n"
+            " pxCurrentTCBConst: .word pxCurrentTCB           \n"
-        " xMPUCTRLConst: .word 0xe000ed94                 \n"
+            " xMPUCTRLConst: .word 0xe000ed94                 \n"
-        " xMAIR0Const: .word 0xe000edc0                   \n"
+            " xMAIR0Const: .word 0xe000edc0                   \n"
-        " xRNRConst: .word 0xe000ed98                     \n"
+            " xRNRConst: .word 0xe000ed98                     \n"
-        " xRBARConst: .word 0xe000ed9c                    \n"
+            " xRBARConst: .word 0xe000ed9c                    \n"
-    );
+        );
-}
+    }
 
 #else /* configENABLE_MPU */
 
-void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        "   .syntax unified                                 \n"
+            "   .syntax unified                                 \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   mrs r0, psp                                     \n"/* Read PSP in r0. */
+            "   mrs r0, psp                                     \n" /* Read PSP in r0. */
-        "   ldr r2, pxCurrentTCBConst                       \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr r1, [r2]                                    \n"/* Read pxCurrentTCB. */
+            "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
-        "   subs r0, r0, #40                                \n"/* Make space for PSPLIM, LR and the remaining registers on the stack. */
+            "   subs r0, r0, #40                                \n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */
-        "   str r0, [r1]                                    \n"/* Save the new top of stack in TCB. */
+            "   str r0, [r1]                                    \n" /* Save the new top of stack in TCB. */
-        "   mrs r2, psplim                                  \n"/* r2 = PSPLIM. */
+            "   mrs r2, psplim                                  \n" /* r2 = PSPLIM. */
-        "   mov r3, lr                                      \n"/* r3 = LR/EXC_RETURN. */
+            "   mov r3, lr                                      \n" /* r3 = LR/EXC_RETURN. */
-        "   stmia r0!, {r2-r7}                              \n"/* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
+            "   stmia r0!, {r2-r7}                              \n" /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
-        "   mov r4, r8                                      \n"/* r4 = r8. */
+            "   mov r4, r8                                      \n" /* r4 = r8. */
-        "   mov r5, r9                                      \n"/* r5 = r9. */
+            "   mov r5, r9                                      \n" /* r5 = r9. */
-        "   mov r6, r10                                     \n"/* r6 = r10. */
+            "   mov r6, r10                                     \n" /* r6 = r10. */
-        "   mov r7, r11                                     \n"/* r7 = r11. */
+            "   mov r7, r11                                     \n" /* r7 = r11. */
-        "   stmia r0!, {r4-r7}                              \n"/* Store the high registers that are not saved automatically. */
+            "   stmia r0!, {r4-r7}                              \n" /* Store the high registers that are not saved automatically. */
-        "                                                   \n"
+            "                                                   \n"
-        "   cpsid i                                         \n"
+            "   cpsid i                                         \n"
-        "   bl vTaskSwitchContext                           \n"
+            "   bl vTaskSwitchContext                           \n"
-        "   cpsie i                                         \n"
+            "   cpsie i                                         \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   ldr r2, pxCurrentTCBConst                       \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr r1, [r2]                                    \n"/* Read pxCurrentTCB. */
+            "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
-        "   ldr r0, [r1]                                    \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
+            "   ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
-        "                                                   \n"
+            "                                                   \n"
-        "   adds r0, r0, #24                                \n"/* Move to the high registers. */
+            "   adds r0, r0, #24                                \n" /* Move to the high registers. */
-        "   ldmia r0!, {r4-r7}                              \n"/* Restore the high registers that are not automatically restored. */
+            "   ldmia r0!, {r4-r7}                              \n" /* Restore the high registers that are not automatically restored. */
-        "   mov r8, r4                                      \n"/* r8 = r4. */
+            "   mov r8, r4                                      \n" /* r8 = r4. */
-        "   mov r9, r5                                      \n"/* r9 = r5. */
+            "   mov r9, r5                                      \n" /* r9 = r5. */
-        "   mov r10, r6                                     \n"/* r10 = r6. */
+            "   mov r10, r6                                     \n" /* r10 = r6. */
-        "   mov r11, r7                                     \n"/* r11 = r7. */
+            "   mov r11, r7                                     \n" /* r11 = r7. */
-        "   msr psp, r0                                     \n"/* Remember the new top of stack for the task. */
+            "   msr psp, r0                                     \n" /* Remember the new top of stack for the task. */
-        "   subs r0, r0, #40                                \n"/* Move to the starting of the saved context. */
+            "   subs r0, r0, #40                                \n" /* Move to the starting of the saved context. */
-        "   ldmia r0!, {r2-r7}                              \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
+            "   ldmia r0!, {r2-r7}                              \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
-        "   msr psplim, r2                                  \n"/* Restore the PSPLIM register value for the task. */
+            "   msr psplim, r2                                  \n" /* Restore the PSPLIM register value for the task. */
-        "   bx r3                                           \n"
+            "   bx r3                                           \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   .align 4                                        \n"
+            "   .align 4                                        \n"
-        "pxCurrentTCBConst: .word pxCurrentTCB              \n"
+            "pxCurrentTCBConst: .word pxCurrentTCB              \n"
-    );
+        );
-}
+    }
 
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
 
-void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-   __asm volatile
+        __asm volatile
-    (
+        (
-        ".syntax unified                \n"
+            ".syntax unified                \n"
-        ".extern vPortSVCHandler_C      \n"
+            ".extern vPortSVCHandler_C      \n"
-        ".extern vSystemCallEnter       \n"
+            ".extern vSystemCallEnter       \n"
-        ".extern vSystemCallEnter_1     \n"
+            ".extern vSystemCallExit        \n"
-        ".extern vSystemCallExit        \n"
+            "                               \n"
-        "                               \n"
+            "movs r0, #4                    \n"
-        "movs r0, #4                    \n"
+            "mov r1, lr                     \n"
-        "mov r1, lr                     \n"
+            "tst r0, r1                     \n"
-        "tst r0, r1                     \n"
+            "beq stack_on_msp               \n"
-        "beq stack_on_msp               \n"
+            "stack_on_psp:                  \n"
-        "stack_on_psp:                  \n"
+            "    mrs r0, psp                \n"
-        "    mrs r0, psp                \n"
+            "    b route_svc                \n"
-        "    b route_svc                \n"
+            "stack_on_msp:                  \n"
-        "stack_on_msp:                  \n"
+            "    mrs r0, msp                \n"
-        "    mrs r0, msp                \n"
+            "    b route_svc                \n"
-        "    b route_svc                \n"
+            "                               \n"
-        "                               \n"
+            "route_svc:                     \n"
-        "route_svc:                     \n"
+            "    ldr r3, [r0, #24]          \n"
-        "    ldr r2, [r0, #24]          \n"
+            "    subs r3, #2                \n"
-        "    subs r2, #2                \n"
+            "    ldrb r2, [r3, #0]          \n"
-        "    ldrb r3, [r2, #0]          \n"
+            "    cmp r2, %0                 \n"
-        "    cmp r3, %0                 \n"
+            "    blt system_call_enter      \n"
-        "    beq system_call_enter      \n"
+            "    cmp r2, %1                 \n"
-        "    cmp r3, %1                 \n"
+            "    beq system_call_exit       \n"
-        "    beq system_call_enter_1    \n"
+            "    b vPortSVCHandler_C        \n"
-        "    cmp r3, %2                 \n"
+            "                               \n"
-        "    beq system_call_exit       \n"
+            "system_call_enter:             \n"
-        "    b vPortSVCHandler_C        \n"
+            "    b vSystemCallEnter         \n"
-        "                               \n"
+            "system_call_exit:              \n"
-        "system_call_enter:             \n"
+            "    b vSystemCallExit          \n"
-        "    b vSystemCallEnter         \n"
+            "                               \n"
-        "system_call_enter_1:           \n"
+            : /* No outputs. */
-        "    b vSystemCallEnter_1       \n"
+            : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT )
-        "system_call_exit:              \n"
+            : "r0", "r1", "r2", "r3", "memory"
-        "    b vSystemCallExit          \n"
+        );
-        "                               \n"
+    }
-        : /* No outputs. */
-        :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT )
-        : "r0", "r1", "r2", "r3", "memory"
-    );
-}
 
 #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
 
-void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        "   .syntax unified                                 \n"
+            "   .syntax unified                                 \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   movs r0, #4                                     \n"
+            "   movs r0, #4                                     \n"
-        "   mov r1, lr                                      \n"
+            "   mov r1, lr                                      \n"
-        "   tst r0, r1                                      \n"
+            "   tst r0, r1                                      \n"
-        "   beq stacking_used_msp                           \n"
+            "   beq stacking_used_msp                           \n"
-        "   mrs r0, psp                                     \n"
+            "   mrs r0, psp                                     \n"
-        "   ldr r2, svchandler_address_const                \n"
+            "   ldr r2, svchandler_address_const                \n"
-        "   bx r2                                           \n"
+            "   bx r2                                           \n"
-        " stacking_used_msp:                                \n"
+            " stacking_used_msp:                                \n"
-        "   mrs r0, msp                                     \n"
+            "   mrs r0, msp                                     \n"
-        "   ldr r2, svchandler_address_const                \n"
+            "   ldr r2, svchandler_address_const                \n"
-        "   bx r2                                           \n"
+            "   bx r2                                           \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   .align 4                                        \n"
+            "   .align 4                                        \n"
-        "svchandler_address_const: .word vPortSVCHandler_C  \n"
+            "svchandler_address_const: .word vPortSVCHandler_C  \n"
-    );
+        );
-}
+    }
 
 #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
 /*-----------------------------------------------------------*/

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -36,122 +36,125 @@
 /* Portasm includes. */
 #include "portasm.h"
 
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
 /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the
  * header files. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #if ( configENABLE_MPU == 1 )
 
-void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        " .syntax unified                                 \n"
+            " .syntax unified                                 \n"
-        "                                                 \n"
+            "                                                 \n"
-        " program_mpu_first_task:                         \n"
+            " program_mpu_first_task:                         \n"
-        "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB. */
+            "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB. */
-        "                                                 \n"
+            "                                                 \n"
-        "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
+            "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-        "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
-        "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
+            "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
-        "    str r2, [r1]                                 \n" /* Disable MPU. */
+            "    str r2, [r1]                                 \n" /* Disable MPU. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
-        "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
+            "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-        "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-        "    str r1, [r2]                                 \n" /* Program MAIR0. */
+            "    str r1, [r2]                                 \n" /* Program MAIR0. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-        "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
-        "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "                                                 \n"
+            "                                                 \n"
-        "    movs r3, #4                                  \n" /* r3 = 4. */
+            "    movs r3, #4                                  \n" /* r3 = 4. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 4. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 4. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-        "                                                 \n"
+            "                                                 \n"
         #if ( configTOTAL_MPU_REGIONS == 16 )
-        "    movs r3, #8                                  \n" /* r3 = 8. */
+            "    movs r3, #8                                  \n" /* r3 = 8. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 8. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 8. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-        "    movs r3, #12                                 \n" /* r3 = 12. */
+            "    movs r3, #12                                 \n" /* r3 = 12. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 12. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 12. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
         #endif /* configTOTAL_MPU_REGIONS == 16 */
-        "                                                 \n"
+            "                                                 \n"
-        "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
-        "    orr r2, #1                                   \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */
+            "    orr r2, #1                                   \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */
-        "    str r2, [r1]                                 \n" /* Enable MPU. */
+            "    str r2, [r1]                                 \n" /* Enable MPU. */
-        "    dsb                                          \n" /* Force memory writes before continuing. */
+            "    dsb                                          \n" /* Force memory writes before continuing. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context_first_task:                     \n"
+            " restore_context_first_task:                     \n"
-        "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r1, [r3]                                 \n" /* r1 = pxCurrentTCB.*/
+            "    ldr r1, [r3]                                 \n" /* r1 = pxCurrentTCB.*/
-        "    ldr r2, [r1]                                 \n" /* r2 = Location of saved context in TCB. */
+            "    ldr r2, [r1]                                 \n" /* r2 = Location of saved context in TCB. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_special_regs_first_task:                \n"
+            " restore_special_regs_first_task:                \n"
-        "    ldmdb r2!, {r0, r3-r5, lr}                   \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
+            "    ldmdb r2!, {r0, r3-r5, lr}                   \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
-        "    msr psp, r3                                  \n"
+            "    msr psp, r3                                  \n"
-        "    msr psplim, r4                               \n"
+            "    msr psplim, r4                               \n"
-        "    msr control, r5                              \n"
+            "    msr control, r5                              \n"
-        "    ldr r4, xSecureContextConst2                 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "    ldr r4, xSecureContextConst2                 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-        "    str r0, [r4]                                 \n" /* Restore xSecureContext. */
+            "    str r0, [r4]                                 \n" /* Restore xSecureContext. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_general_regs_first_task:                \n"
+            " restore_general_regs_first_task:                \n"
-        "    ldmdb r2!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
+            "    ldmdb r2!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
-        "    stmia r3!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
+            "    stmia r3!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
-        "    ldmdb r2!, {r4-r11}                          \n" /* r4-r11 restored. */
+            "    ldmdb r2!, {r4-r11}                          \n" /* r4-r11 restored. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context_done_first_task:                \n"
+            " restore_context_done_first_task:                \n"
-        "    str r2, [r1]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
+            "    str r2, [r1]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
-        "    mov r0, #0                                   \n"
+            "    mov r0, #0                                   \n"
-        "    msr basepri, r0                              \n" /* Ensure that interrupts are enabled when the first task starts. */
+            "    msr basepri, r0                              \n" /* Ensure that interrupts are enabled when the first task starts. */
-        "    bx lr                                        \n"
+            "    bx lr                                        \n"
-        "                                                 \n"
+            "                                                 \n"
-        " .align 4                                        \n"
+            " .align 4                                        \n"
-        " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
+            " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
-        " xSecureContextConst2: .word xSecureContext      \n"
+            " xSecureContextConst2: .word xSecureContext      \n"
-        " xMPUCTRLConst2: .word 0xe000ed94                \n"
+            " xMPUCTRLConst2: .word 0xe000ed94                \n"
-        " xMAIR0Const2: .word 0xe000edc0                  \n"
+            " xMAIR0Const2: .word 0xe000edc0                  \n"
-        " xRNRConst2: .word 0xe000ed98                    \n"
+            " xRNRConst2: .word 0xe000ed98                    \n"
-        " xRBARConst2: .word 0xe000ed9c                   \n"
+            " xRBARConst2: .word 0xe000ed9c                   \n"
-    );
+        );
-}
+    }
 
 #else /* configENABLE_MPU */
 
-void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        "   .syntax unified                                 \n"
+            "   .syntax unified                                 \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   ldr  r2, pxCurrentTCBConst2                     \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr  r2, pxCurrentTCBConst2                     \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr  r3, [r2]                                   \n" /* Read pxCurrentTCB. */
+            "   ldr  r3, [r2]                                   \n" /* Read pxCurrentTCB. */
-        "   ldr  r0, [r3]                                   \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+            "   ldr  r0, [r3]                                   \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-        "                                                   \n"
+            "                                                   \n"
-        "   ldm  r0!, {r1-r3}                               \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
+            "   ldm  r0!, {r1-r3}                               \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
-        "   ldr  r4, xSecureContextConst2                   \n"
+            "   ldr  r4, xSecureContextConst2                   \n"
-        "   str  r1, [r4]                                   \n" /* Set xSecureContext to this task's value for the same. */
+            "   str  r1, [r4]                                   \n" /* Set xSecureContext to this task's value for the same. */
-        "   msr  psplim, r2                                 \n" /* Set this task's PSPLIM value. */
+            "   msr  psplim, r2                                 \n" /* Set this task's PSPLIM value. */
-        "   movs r1, #2                                     \n" /* r1 = 2. */
+            "   movs r1, #2                                     \n" /* r1 = 2. */
-        "   msr  CONTROL, r1                                \n" /* Switch to use PSP in the thread mode. */
+            "   msr  CONTROL, r1                                \n" /* Switch to use PSP in the thread mode. */
-        "   adds r0, #32                                    \n" /* Discard everything up to r0. */
+            "   adds r0, #32                                    \n" /* Discard everything up to r0. */
-        "   msr  psp, r0                                    \n" /* This is now the new top of stack to use in the task. */
+            "   msr  psp, r0                                    \n" /* This is now the new top of stack to use in the task. */
-        "   isb                                             \n"
+            "   isb                                             \n"
-        "   mov  r0, #0                                     \n"
+            "   mov  r0, #0                                     \n"
-        "   msr  basepri, r0                                \n" /* Ensure that interrupts are enabled when the first task starts. */
+            "   msr  basepri, r0                                \n" /* Ensure that interrupts are enabled when the first task starts. */
-        "   bx   r3                                         \n" /* Finally, branch to EXC_RETURN. */
+            "   bx   r3                                         \n" /* Finally, branch to EXC_RETURN. */
-        "   .align 4                                        \n"
+            "   .align 4                                        \n"
-        "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
+            "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
-        "xSecureContextConst2: .word xSecureContext         \n"
+            "xSecureContextConst2: .word xSecureContext         \n"
-    );
+        );
-}
+    }
 
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
@@ -162,12 +165,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   mrs r0, control                                 \n"/* r0 = CONTROL. */
+        "   mrs r0, control                                 \n" /* r0 = CONTROL. */
-        "   tst r0, #1                                      \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
+        "   tst r0, #1                                      \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
         "   ite ne                                          \n"
-        "   movne r0, #0                                    \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "   movne r0, #0                                    \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-        "   moveq r0, #1                                    \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "   moveq r0, #1                                    \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-        "   bx lr                                           \n"/* Return. */
+        "   bx lr                                           \n" /* Return. */
         "                                                   \n"
         "   .align 4                                        \n"
         ::: "r0", "memory"
@@ -181,10 +184,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   mrs r0, control                                 \n"/* Read the CONTROL register. */
+        "   mrs r0, control                                 \n" /* Read the CONTROL register. */
-        "   bic r0, #1                                      \n"/* Clear the bit 0. */
+        "   bic r0, #1                                      \n" /* Clear the bit 0. */
-        "   msr control, r0                                 \n"/* Write back the new CONTROL value. */
+        "   msr control, r0                                 \n" /* Write back the new CONTROL value. */
-        "   bx lr                                           \n"/* Return to the caller. */
+        "   bx lr                                           \n" /* Return to the caller. */
         ::: "r0", "memory"
     );
 }
@@ -196,10 +199,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   mrs r0, control                                 \n"/* r0 = CONTROL. */
+        "   mrs r0, control                                 \n" /* r0 = CONTROL. */
-        "   orr r0, #1                                      \n"/* r0 = r0 | 1. */
+        "   orr r0, #1                                      \n" /* r0 = r0 | 1. */
-        "   msr control, r0                                 \n"/* CONTROL = r0. */
+        "   msr control, r0                                 \n" /* CONTROL = r0. */
-        "   bx lr                                           \n"/* Return to the caller. */
+        "   bx lr                                           \n" /* Return to the caller. */
         ::: "r0", "memory"
     );
 }
@@ -211,15 +214,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   ldr r0, xVTORConst                              \n"/* Use the NVIC offset register to locate the stack. */
+        "   ldr r0, xVTORConst                              \n" /* Use the NVIC offset register to locate the stack. */
-        "   ldr r0, [r0]                                    \n"/* Read the VTOR register which gives the address of vector table. */
+        "   ldr r0, [r0]                                    \n" /* Read the VTOR register which gives the address of vector table. */
-        "   ldr r0, [r0]                                    \n"/* The first entry in vector table is stack pointer. */
+        "   ldr r0, [r0]                                    \n" /* The first entry in vector table is stack pointer. */
-        "   msr msp, r0                                     \n"/* Set the MSP back to the start of the stack. */
+        "   msr msp, r0                                     \n" /* Set the MSP back to the start of the stack. */
-        "   cpsie i                                         \n"/* Globally enable interrupts. */
+        "   cpsie i                                         \n" /* Globally enable interrupts. */
         "   cpsie f                                         \n"
         "   dsb                                             \n"
         "   isb                                             \n"
-        "   svc %0                                          \n"/* System call to start the first task. */
+        "   svc %0                                          \n" /* System call to start the first task. */
         "   nop                                             \n"
         "                                                   \n"
         "   .align 4                                        \n"
@@ -235,12 +238,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   mrs r0, basepri                                 \n"/* r0 = basepri. Return original basepri value. */
+        "   mrs r0, basepri                                 \n" /* r0 = basepri. Return original basepri value. */
-        "   mov r1, %0                                      \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "   mov r1, %0                                      \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-        "   msr basepri, r1                                 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "   msr basepri, r1                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
         "   dsb                                             \n"
         "   isb                                             \n"
-        "   bx lr                                           \n"/* Return. */
+        "   bx lr                                           \n" /* Return. */
         ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
     );
 }
@@ -252,10 +255,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   msr basepri, r0                                 \n"/* basepri = ulMask. */
+        "   msr basepri, r0                                 \n" /* basepri = ulMask. */
         "   dsb                                             \n"
         "   isb                                             \n"
-        "   bx lr                                           \n"/* Return. */
+        "   bx lr                                           \n" /* Return. */
         ::: "memory"
     );
 }
@@ -263,320 +266,313 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
 
 #if ( configENABLE_MPU == 1 )
 
-void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        " .syntax unified                                 \n"
+            " .syntax unified                                 \n"
-        " .extern SecureContext_SaveContext               \n"
+            " .extern SecureContext_SaveContext               \n"
-        " .extern SecureContext_LoadContext               \n"
+            " .extern SecureContext_LoadContext               \n"
-        "                                                 \n"
+            "                                                 \n"
-        " ldr r3, xSecureContextConst                     \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            " ldr r3, xSecureContextConst                     \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-        " ldr r0, [r3]                                    \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+            " ldr r0, [r3]                                    \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-        " ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            " ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        " ldr r1, [r3]                                    \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
+            " ldr r1, [r3]                                    \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
-        " ldr r2, [r1]                                    \n" /* r2 = Location in TCB where the context should be saved. */
+            " ldr r2, [r1]                                    \n" /* r2 = Location in TCB where the context should be saved. */
-        "                                                 \n"
+            "                                                 \n"
-        " cbz r0, save_ns_context                         \n" /* No secure context to save. */
+            " cbz r0, save_ns_context                         \n" /* No secure context to save. */
-        " save_s_context:                                 \n"
+            " save_s_context:                                 \n"
-        "    push {r0-r2, lr}                             \n"
+            "    push {r0-r2, lr}                             \n"
-        "    bl SecureContext_SaveContext                 \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+            "    bl SecureContext_SaveContext                 \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
-        "    pop {r0-r2, lr}                              \n"
+            "    pop {r0-r2, lr}                              \n"
-        "                                                 \n"
+            "                                                 \n"
-        " save_ns_context:                                \n"
+            " save_ns_context:                                \n"
-        "    mov r3, lr                                   \n" /* r3 = LR (EXC_RETURN). */
+            "    mov r3, lr                                   \n" /* r3 = LR (EXC_RETURN). */
-        "    lsls r3, r3, #25                             \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "    lsls r3, r3, #25                             \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-        "    bmi save_special_regs                        \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
+            "    bmi save_special_regs                        \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
-        "                                                 \n"
+            "                                                 \n"
-        " save_general_regs:                              \n"
+            " save_general_regs:                              \n"
-        "    mrs r3, psp                                  \n"
+            "    mrs r3, psp                                  \n"
-        "                                                 \n"
+            "                                                 \n"
-    #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-        "    add r3, r3, #0x20                            \n" /* Move r3 to location where s0 is saved. */
+            "    add r3, r3, #0x20                            \n" /* Move r3 to location where s0 is saved. */
-        "    tst lr, #0x10                                \n"
+            "    tst lr, #0x10                                \n"
-        "    ittt eq                                      \n"
+            "    ittt eq                                      \n"
-        "    vstmiaeq r2!, {s16-s31}                      \n" /* Store s16-s31. */
+            "    vstmiaeq r2!, {s16-s31}                      \n" /* Store s16-s31. */
-        "    vldmiaeq r3, {s0-s16}                        \n" /* Copy hardware saved FP context into s0-s16. */
+            "    vldmiaeq r3, {s0-s16}                        \n" /* Copy hardware saved FP context into s0-s16. */
-        "    vstmiaeq r2!, {s0-s16}                       \n" /* Store hardware saved FP context. */
+            "    vstmiaeq r2!, {s0-s16}                       \n" /* Store hardware saved FP context. */
-        "    sub r3, r3, #0x20                            \n" /* Set r3 back to the location of hardware saved context. */
+            "    sub r3, r3, #0x20                            \n" /* Set r3 back to the location of hardware saved context. */
-    #endif /* configENABLE_FPU || configENABLE_MVE */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
-        "                                                 \n"
+            "                                                 \n"
-        "    stmia r2!, {r4-r11}                          \n" /* Store r4-r11. */
+            "    stmia r2!, {r4-r11}                          \n" /* Store r4-r11. */
-        "    ldmia r3, {r4-r11}                           \n" /* Copy the hardware saved context into r4-r11. */
+            "    ldmia r3, {r4-r11}                           \n" /* Copy the hardware saved context into r4-r11. */
-        "    stmia r2!, {r4-r11}                          \n" /* Store the hardware saved context. */
+            "    stmia r2!, {r4-r11}                          \n" /* Store the hardware saved context. */
-        "                                                 \n"
+            "                                                 \n"
-        " save_special_regs:                              \n"
+            " save_special_regs:                              \n"
-        "    mrs r3, psp                                  \n" /* r3 = PSP. */
+            "    mrs r3, psp                                  \n" /* r3 = PSP. */
-        "    mrs r4, psplim                               \n" /* r4 = PSPLIM. */
+            "    mrs r4, psplim                               \n" /* r4 = PSPLIM. */
-        "    mrs r5, control                              \n" /* r5 = CONTROL. */
+            "    mrs r5, control                              \n" /* r5 = CONTROL. */
-        "    stmia r2!, {r0, r3-r5, lr}                   \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
+            "    stmia r2!, {r0, r3-r5, lr}                   \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
-        "    str r2, [r1]                                 \n" /* Save the location from where the context should be restored as the first member of TCB. */
+            "    str r2, [r1]                                 \n" /* Save the location from where the context should be restored as the first member of TCB. */
-        "                                                 \n"
+            "                                                 \n"
-        " select_next_task:                               \n"
+            " select_next_task:                               \n"
-        "    mov r0, %0                                   \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
+            "    mov r0, %0                                   \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-        "    msr basepri, r0                              \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+            "    msr basepri, r0                              \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-        "    dsb                                          \n"
+            "    dsb                                          \n"
-        "    isb                                          \n"
+            "    isb                                          \n"
-        "    bl vTaskSwitchContext                        \n"
+            "    bl vTaskSwitchContext                        \n"
-        "    mov r0, #0                                   \n" /* r0 = 0. */
+            "    mov r0, #0                                   \n" /* r0 = 0. */
-        "    msr basepri, r0                              \n" /* Enable interrupts. */
+            "    msr basepri, r0                              \n" /* Enable interrupts. */
-        "                                                 \n"
+            "                                                 \n"
-        " program_mpu:                                    \n"
+            " program_mpu:                                    \n"
-        "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
+            "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
-        "                                                 \n"
+            "                                                 \n"
-        "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
+            "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-        "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
-        "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
+            "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
-        "    str r2, [r1]                                 \n" /* Disable MPU. */
+            "    str r2, [r1]                                 \n" /* Disable MPU. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
-        "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
+            "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-        "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-        "    str r1, [r2]                                 \n" /* Program MAIR0. */
+            "    str r1, [r2]                                 \n" /* Program MAIR0. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-        "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
-        "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "                                                 \n"
+            "                                                 \n"
-        "    movs r3, #4                                  \n" /* r3 = 4. */
+            "    movs r3, #4                                  \n" /* r3 = 4. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 4. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 4. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-        "                                                 \n"
+            "                                                 \n"
         #if ( configTOTAL_MPU_REGIONS == 16 )
-        "    movs r3, #8                                  \n" /* r3 = 8. */
+            "    movs r3, #8                                  \n" /* r3 = 8. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 8. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 8. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-        "    movs r3, #12                                 \n" /* r3 = 12. */
+            "    movs r3, #12                                 \n" /* r3 = 12. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 12. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 12. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
         #endif /* configTOTAL_MPU_REGIONS == 16 */
-        "                                                 \n"
+            "                                                 \n"
-        "   ldr r1, xMPUCTRLConst                         \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "   ldr r1, xMPUCTRLConst                         \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
+            "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
-        "   orr r2, #1                                    \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
+            "   orr r2, #1                                    \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
-        "   str r2, [r1]                                  \n" /* Enable MPU. */
+            "   str r2, [r1]                                  \n" /* Enable MPU. */
-        "   dsb                                           \n" /* Force memory writes before continuing. */
+            "   dsb                                           \n" /* Force memory writes before continuing. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context:                                \n"
+            " restore_context:                                \n"
-        "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r1, [r3]                                 \n" /* r1 = pxCurrentTCB.*/
+            "    ldr r1, [r3]                                 \n" /* r1 = pxCurrentTCB.*/
-        "    ldr r2, [r1]                                 \n" /* r2 = Location of saved context in TCB. */
+            "    ldr r2, [r1]                                 \n" /* r2 = Location of saved context in TCB. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_special_regs:                           \n"
+            " restore_special_regs:                           \n"
-        "    ldmdb r2!, {r0, r3-r5, lr}                   \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
+            "    ldmdb r2!, {r0, r3-r5, lr}                   \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
-        "    msr psp, r3                                  \n"
+            "    msr psp, r3                                  \n"
-        "    msr psplim, r4                               \n"
+            "    msr psplim, r4                               \n"
-        "    msr control, r5                              \n"
+            "    msr control, r5                              \n"
-        "    ldr r4, xSecureContextConst                  \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "    ldr r4, xSecureContextConst                  \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-        "    str r0, [r4]                                 \n" /* Restore xSecureContext. */
+            "    str r0, [r4]                                 \n" /* Restore xSecureContext. */
-        "    cbz r0, restore_ns_context                   \n" /* No secure context to restore. */
+            "    cbz r0, restore_ns_context                   \n" /* No secure context to restore. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_s_context:                              \n"
+            " restore_s_context:                              \n"
-        "    push {r1-r3, lr}                             \n"
+            "    push {r1-r3, lr}                             \n"
-        "    bl SecureContext_LoadContext                 \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+            "    bl SecureContext_LoadContext                 \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
-        "    pop {r1-r3, lr}                              \n"
+            "    pop {r1-r3, lr}                              \n"
-        "                                                 \n"
+            "                                                 \n"
-        " restore_ns_context:                             \n"
+            " restore_ns_context:                             \n"
-        "    mov r0, lr                                   \n" /* r0 = LR (EXC_RETURN). */
+            "    mov r0, lr                                   \n" /* r0 = LR (EXC_RETURN). */
-        "    lsls r0, r0, #25                             \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "    lsls r0, r0, #25                             \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-        "    bmi restore_context_done                     \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
+            "    bmi restore_context_done                     \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_general_regs:                           \n"
+            " restore_general_regs:                           \n"
-        "    ldmdb r2!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
+            "    ldmdb r2!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
-        "    stmia r3!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
+            "    stmia r3!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
-        "    ldmdb r2!, {r4-r11}                          \n" /* r4-r11 restored. */
+            "    ldmdb r2!, {r4-r11}                          \n" /* r4-r11 restored. */
-    #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-        "    tst lr, #0x10                                \n"
+            "    tst lr, #0x10                                \n"
-        "    ittt eq                                      \n"
+            "    ittt eq                                      \n"
-        "    vldmdbeq r2!, {s0-s16}                       \n" /* s0-s16 contain hardware saved FP context. */
+            "    vldmdbeq r2!, {s0-s16}                       \n" /* s0-s16 contain hardware saved FP context. */
-        "    vstmiaeq r3!, {s0-s16}                       \n" /* Copy hardware saved FP context on the task stack. */
+            "    vstmiaeq r3!, {s0-s16}                       \n" /* Copy hardware saved FP context on the task stack. */
-        "    vldmdbeq r2!, {s16-s31}                      \n" /* Restore s16-s31. */
+            "    vldmdbeq r2!, {s16-s31}                      \n" /* Restore s16-s31. */
-    #endif /* configENABLE_FPU || configENABLE_MVE */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context_done:                           \n"
+            " restore_context_done:                           \n"
-        "    str r2, [r1]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
+            "    str r2, [r1]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
-        "    bx lr                                        \n"
+            "    bx lr                                        \n"
-        "                                                 \n"
+            "                                                 \n"
-        " .align 4                                        \n"
+            " .align 4                                        \n"
-        " pxCurrentTCBConst: .word pxCurrentTCB           \n"
+            " pxCurrentTCBConst: .word pxCurrentTCB           \n"
-        " xSecureContextConst: .word xSecureContext       \n"
+            " xSecureContextConst: .word xSecureContext       \n"
-        " xMPUCTRLConst: .word 0xe000ed94                 \n"
+            " xMPUCTRLConst: .word 0xe000ed94                 \n"
-        " xMAIR0Const: .word 0xe000edc0                   \n"
+            " xMAIR0Const: .word 0xe000edc0                   \n"
-        " xRNRConst: .word 0xe000ed98                     \n"
+            " xRNRConst: .word 0xe000ed98                     \n"
-        " xRBARConst: .word 0xe000ed9c                    \n"
+            " xRBARConst: .word 0xe000ed9c                    \n"
-        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+            ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-    );
+        );
-}
+    }
 
 #else /* configENABLE_MPU */
 
-void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        "   .syntax unified                                 \n"
+            "   .syntax unified                                 \n"
-        "   .extern SecureContext_SaveContext               \n"
+            "   .extern SecureContext_SaveContext               \n"
-        "   .extern SecureContext_LoadContext               \n"
+            "   .extern SecureContext_LoadContext               \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   ldr r3, xSecureContextConst                     \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "   ldr r3, xSecureContextConst                     \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-        "   ldr r0, [r3]                                    \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+            "   ldr r0, [r3]                                    \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-        "   ldr r3, pxCurrentTCBConst                       \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr r1, [r3]                                    \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
+            "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
-        "   mrs r2, psp                                     \n"/* Read PSP in r2. */
+            "   mrs r2, psp                                     \n" /* Read PSP in r2. */
-        "                                                   \n"
+            "                                                   \n"
-        "   cbz r0, save_ns_context                         \n"/* No secure context to save. */
+            "   cbz r0, save_ns_context                         \n" /* No secure context to save. */
-        "   push {r0-r2, r14}                               \n"
+            "   push {r0-r2, r14}                               \n"
-        "   bl SecureContext_SaveContext                    \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+            "   bl SecureContext_SaveContext                    \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
-        "   pop {r0-r3}                                     \n"/* LR is now in r3. */
+            "   pop {r0-r3}                                     \n" /* LR is now in r3. */
-        "   mov lr, r3                                      \n"/* LR = r3. */
+            "   mov lr, r3                                      \n" /* LR = r3. */
-        "   lsls r1, r3, #25                                \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "   lsls r1, r3, #25                                \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-        "   bpl save_ns_context                             \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "   bpl save_ns_context                             \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-        "                                                   \n"
+            "                                                   \n"
-        "   ldr r3, pxCurrentTCBConst                       \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr r1, [r3]                                    \n"/* Read pxCurrentTCB.*/
+            "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB.*/
-        "   subs r2, r2, #12                                \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
+            "   subs r2, r2, #12                                \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */
-        "   str r2, [r1]                                    \n"/* Save the new top of stack in TCB. */
+            "   str r2, [r1]                                    \n" /* Save the new top of stack in TCB. */
-        "   mrs r1, psplim                                  \n"/* r1 = PSPLIM. */
+            "   mrs r1, psplim                                  \n" /* r1 = PSPLIM. */
-        "   mov r3, lr                                      \n"/* r3 = LR/EXC_RETURN. */
+            "   mov r3, lr                                      \n" /* r3 = LR/EXC_RETURN. */
-        "   stmia r2!, {r0, r1, r3}                         \n"/* Store xSecureContext, PSPLIM and LR on the stack. */
+            "   stmia r2!, {r0, r1, r3}                         \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
-        "   b select_next_task                              \n"
+            "   b select_next_task                              \n"
-        "                                                   \n"
+            "                                                   \n"
-        " save_ns_context:                                  \n"
+            " save_ns_context:                                  \n"
-        "   ldr r3, pxCurrentTCBConst                       \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr r1, [r3]                                    \n"/* Read pxCurrentTCB. */
+            "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB. */
         #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-            "   tst lr, #0x10                               \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+            "   tst lr, #0x10                                   \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
-            "   it eq                                       \n"
+            "   it eq                                           \n"
-            "   vstmdbeq r2!, {s16-s31}                     \n"/* Store the additional FP context registers which are not saved automatically. */
+            "   vstmdbeq r2!, {s16-s31}                         \n" /* Store the additional FP context registers which are not saved automatically. */
         #endif /* configENABLE_FPU || configENABLE_MVE */
-        "   subs r2, r2, #44                                \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
+            "   subs r2, r2, #44                                \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-        "   str r2, [r1]                                    \n"/* Save the new top of stack in TCB. */
+            "   str r2, [r1]                                    \n" /* Save the new top of stack in TCB. */
-        "   adds r2, r2, #12                                \n"/* r2 = r2 + 12. */
+            "   adds r2, r2, #12                                \n" /* r2 = r2 + 12. */
-        "   stm r2, {r4-r11}                                \n"/* Store the registers that are not saved automatically. */
+            "   stm r2, {r4-r11}                                \n" /* Store the registers that are not saved automatically. */
-        "   mrs r1, psplim                                  \n"/* r1 = PSPLIM. */
+            "   mrs r1, psplim                                  \n" /* r1 = PSPLIM. */
-        "   mov r3, lr                                      \n"/* r3 = LR/EXC_RETURN. */
+            "   mov r3, lr                                      \n" /* r3 = LR/EXC_RETURN. */
-        "   subs r2, r2, #12                                \n"/* r2 = r2 - 12. */
+            "   subs r2, r2, #12                                \n" /* r2 = r2 - 12. */
-        "   stmia r2!, {r0, r1, r3}                         \n"/* Store xSecureContext, PSPLIM and LR on the stack. */
+            "   stmia r2!, {r0, r1, r3}                         \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
-        "                                                   \n"
+            "                                                   \n"
-        " select_next_task:                                 \n"
+            " select_next_task:                                 \n"
-        "   mov r0, %0                                      \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
+            "   mov r0, %0                                      \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-        "   msr basepri, r0                                 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+            "   msr basepri, r0                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-        "   dsb                                             \n"
+            "   dsb                                             \n"
-        "   isb                                             \n"
+            "   isb                                             \n"
-        "   bl vTaskSwitchContext                           \n"
+            "   bl vTaskSwitchContext                           \n"
-        "   mov r0, #0                                      \n"/* r0 = 0. */
+            "   mov r0, #0                                      \n" /* r0 = 0. */
-        "   msr basepri, r0                                 \n"/* Enable interrupts. */
+            "   msr basepri, r0                                 \n" /* Enable interrupts. */
-        "                                                   \n"
+            "                                                   \n"
-        "   ldr r3, pxCurrentTCBConst                       \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr r1, [r3]                                    \n"/* Read pxCurrentTCB. */
+            "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB. */
-        "   ldr r2, [r1]                                    \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
+            "   ldr r2, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
-        "                                                   \n"
+            "                                                   \n"
-        "   ldmia r2!, {r0, r1, r4}                         \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
+            "   ldmia r2!, {r0, r1, r4}                         \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
-        "   msr psplim, r1                                  \n"/* Restore the PSPLIM register value for the task. */
+            "   msr psplim, r1                                  \n" /* Restore the PSPLIM register value for the task. */
-        "   mov lr, r4                                      \n"/* LR = r4. */
+            "   mov lr, r4                                      \n" /* LR = r4. */
-        "   ldr r3, xSecureContextConst                     \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "   ldr r3, xSecureContextConst                     \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-        "   str r0, [r3]                                    \n"/* Restore the task's xSecureContext. */
+            "   str r0, [r3]                                    \n" /* Restore the task's xSecureContext. */
-        "   cbz r0, restore_ns_context                      \n"/* If there is no secure context for the task, restore the non-secure context. */
+            "   cbz r0, restore_ns_context                      \n" /* If there is no secure context for the task, restore the non-secure context. */
-        "   ldr r3, pxCurrentTCBConst                       \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr r1, [r3]                                    \n"/* Read pxCurrentTCB. */
+            "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB. */
-        "   push {r2, r4}                                   \n"
+            "   push {r2, r4}                                   \n"
-        "   bl SecureContext_LoadContext                    \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+            "   bl SecureContext_LoadContext                    \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
-        "   pop {r2, r4}                                    \n"
+            "   pop {r2, r4}                                    \n"
-        "   mov lr, r4                                      \n"/* LR = r4. */
+            "   mov lr, r4                                      \n" /* LR = r4. */
-        "   lsls r1, r4, #25                                \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "   lsls r1, r4, #25                                \n" /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-        "   bpl restore_ns_context                          \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "   bpl restore_ns_context                          \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-        "   msr psp, r2                                     \n"/* Remember the new top of stack for the task. */
+            "   msr psp, r2                                     \n" /* Remember the new top of stack for the task. */
-        "   bx lr                                           \n"
+            "   bx lr                                           \n"
-        "                                                   \n"
+            "                                                   \n"
-        " restore_ns_context:                               \n"
+            " restore_ns_context:                               \n"
-        "   ldmia r2!, {r4-r11}                             \n"/* Restore the registers that are not automatically restored. */
+            "   ldmia r2!, {r4-r11}                             \n" /* Restore the registers that are not automatically restored. */
         #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-            "   tst lr, #0x10                               \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+            "   tst lr, #0x10                                   \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
-            "   it eq                                       \n"
+            "   it eq                                           \n"
-            "   vldmiaeq r2!, {s16-s31}                     \n"/* Restore the additional FP context registers which are not restored automatically. */
+            "   vldmiaeq r2!, {s16-s31}                         \n" /* Restore the additional FP context registers which are not restored automatically. */
         #endif /* configENABLE_FPU || configENABLE_MVE */
-        "   msr psp, r2                                     \n"/* Remember the new top of stack for the task. */
+            "   msr psp, r2                                     \n" /* Remember the new top of stack for the task. */
-        "   bx lr                                           \n"
+            "   bx lr                                           \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   .align 4                                        \n"
+            "   .align 4                                        \n"
-        "pxCurrentTCBConst: .word pxCurrentTCB              \n"
+            "pxCurrentTCBConst: .word pxCurrentTCB              \n"
-        "xSecureContextConst: .word xSecureContext          \n"
+            "xSecureContextConst: .word xSecureContext          \n"
-        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+            ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-    );
+        );
-}
+    }
 
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
 
-void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-   __asm volatile
+        __asm volatile
-    (
+        (
-        ".syntax unified                \n"
+            ".syntax unified                \n"
-        ".extern vPortSVCHandler_C      \n"
+            ".extern vPortSVCHandler_C      \n"
-        ".extern vSystemCallEnter       \n"
+            ".extern vSystemCallEnter       \n"
-        ".extern vSystemCallEnter_1     \n"
+            ".extern vSystemCallExit        \n"
-        ".extern vSystemCallExit        \n"
+            "                               \n"
-        "                               \n"
+            "tst lr, #4                     \n"
-        "tst lr, #4                     \n"
+            "ite eq                         \n"
-        "ite eq                         \n"
+            "mrseq r0, msp                  \n"
-        "mrseq r0, msp                  \n"
+            "mrsne r0, psp                  \n"
-        "mrsne r0, psp                  \n"
+            "                               \n"
-        "                               \n"
+            "ldr r1, [r0, #24]              \n"
-        "ldr r1, [r0, #24]              \n"
+            "ldrb r2, [r1, #-2]             \n"
-        "ldrb r2, [r1, #-2]             \n"
+            "cmp r2, %0                     \n"
-        "cmp r2, %0                     \n"
+            "blt syscall_enter              \n"
-        "beq syscall_enter              \n"
+            "cmp r2, %1                     \n"
-        "cmp r2, %1                     \n"
+            "beq syscall_exit               \n"
-        "beq syscall_enter_1            \n"
+            "b vPortSVCHandler_C            \n"
-        "cmp r2, %2                     \n"
+            "                               \n"
-        "beq syscall_exit               \n"
+            "syscall_enter:                 \n"
-        "b vPortSVCHandler_C            \n"
+            "    mov r1, lr                 \n"
-        "                               \n"
+            "    b vSystemCallEnter         \n"
-        "syscall_enter:                 \n"
+            "                               \n"
-        "    mov r1, lr                 \n"
+            "syscall_exit:                  \n"
-        "    b vSystemCallEnter         \n"
+            "    mov r1, lr                 \n"
-        "                               \n"
+            "    b vSystemCallExit          \n"
-        "syscall_enter_1:               \n"
+            "                               \n"
-        "    mov r1, lr                 \n"
+            : /* No outputs. */
-        "    b vSystemCallEnter_1       \n"
+            : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT )
-        "                               \n"
+            : "r0", "r1", "r2", "memory"
-        "syscall_exit:                  \n"
+        );
-        "    mov r1, lr                 \n"
+    }
-        "    b vSystemCallExit          \n"
-        "                               \n"
-        : /* No outputs. */
-        :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT )
-        : "r0", "r1", "r2", "memory"
-    );
-}
 
 #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
 
-void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        "   .syntax unified                                 \n"
+            "   .syntax unified                                 \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   tst lr, #4                                      \n"
+            "   tst lr, #4                                      \n"
-        "   ite eq                                          \n"
+            "   ite eq                                          \n"
-        "   mrseq r0, msp                                   \n"
+            "   mrseq r0, msp                                   \n"
-        "   mrsne r0, psp                                   \n"
+            "   mrsne r0, psp                                   \n"
-        "   ldr r1, svchandler_address_const                \n"
+            "   ldr r1, svchandler_address_const                \n"
-        "   bx r1                                           \n"
+            "   bx r1                                           \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   .align 4                                        \n"
+            "   .align 4                                        \n"
-        "svchandler_address_const: .word vPortSVCHandler_C  \n"
+            "svchandler_address_const: .word vPortSVCHandler_C  \n"
-    );
+        );
-}
+    }
 
 #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
 /*-----------------------------------------------------------*/
@@ -587,8 +583,8 @@ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   svc %0                                          \n"/* Secure context is allocated in the supervisor call. */
+        "   svc %0                                          \n" /* Secure context is allocated in the supervisor call. */
-        "   bx lr                                           \n"/* Return. */
+        "   bx lr                                           \n" /* Return. */
         ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
     );
 }
@@ -600,12 +596,12 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   ldr r2, [r0]                                    \n"/* The first item in the TCB is the top of the stack. */
+        "   ldr r2, [r0]                                    \n" /* The first item in the TCB is the top of the stack. */
-        "   ldr r1, [r2]                                    \n"/* The first item on the stack is the task's xSecureContext. */
+        "   ldr r1, [r2]                                    \n" /* The first item on the stack is the task's xSecureContext. */
-        "   cmp r1, #0                                      \n"/* Raise svc if task's xSecureContext is not NULL. */
+        "   cmp r1, #0                                      \n" /* Raise svc if task's xSecureContext is not NULL. */
         "   it ne                                           \n"
-        "   svcne %0                                        \n"/* Secure context is freed in the supervisor call. */
+        "   svcne %0                                        \n" /* Secure context is freed in the supervisor call. */
-        "   bx lr                                           \n"/* Return. */
+        "   bx lr                                           \n" /* Return. */
         ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory"
     );
 }

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -36,117 +36,120 @@
 /* Portasm includes. */
 #include "portasm.h"
 
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
 /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the
  * header files. */
 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
 #if ( configENABLE_MPU == 1 )
 
-void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        " .syntax unified                                 \n"
+            " .syntax unified                                 \n"
-        "                                                 \n"
+            "                                                 \n"
-        " program_mpu_first_task:                         \n"
+            " program_mpu_first_task:                         \n"
-        "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB. */
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB. */
-        "                                                 \n"
+            "                                                 \n"
-        "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
+            "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-        "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
-        "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
+            "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
-        "    str r2, [r1]                                 \n" /* Disable MPU. */
+            "    str r2, [r1]                                 \n" /* Disable MPU. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
-        "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
+            "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-        "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-        "    str r1, [r2]                                 \n" /* Program MAIR0. */
+            "    str r1, [r2]                                 \n" /* Program MAIR0. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-        "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
-        "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "                                                 \n"
+            "                                                 \n"
-        "    movs r3, #4                                  \n" /* r3 = 4. */
+            "    movs r3, #4                                  \n" /* r3 = 4. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 4. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 4. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-        "                                                 \n"
+            "                                                 \n"
-    #if ( configTOTAL_MPU_REGIONS == 16 )
+        #if ( configTOTAL_MPU_REGIONS == 16 )
-        "    movs r3, #8                                  \n" /* r3 = 8. */
+            "    movs r3, #8                                  \n" /* r3 = 8. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 8. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 8. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-        "    movs r3, #12                                 \n" /* r3 = 12. */
+            "    movs r3, #12                                 \n" /* r3 = 12. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 12. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 12. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-    #endif /* configTOTAL_MPU_REGIONS == 16 */
+        #endif /* configTOTAL_MPU_REGIONS == 16 */
-        "                                                 \n"
+            "                                                 \n"
-        "   ldr r1, xMPUCTRLConst2                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "   ldr r1, xMPUCTRLConst2                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
+            "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
-        "   orr r2, #1                                    \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
+            "   orr r2, #1                                    \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
-        "   str r2, [r1]                                  \n" /* Enable MPU. */
+            "   str r2, [r1]                                  \n" /* Enable MPU. */
-        "   dsb                                           \n" /* Force memory writes before continuing. */
+            "   dsb                                           \n" /* Force memory writes before continuing. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context_first_task:                     \n"
+            " restore_context_first_task:                     \n"
-        "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
-        "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
+            "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_special_regs_first_task:                \n"
+            " restore_special_regs_first_task:                \n"
-        "    ldmdb r1!, {r2-r4, lr}                       \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
+            "    ldmdb r1!, {r2-r4, lr}                       \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
-        "    msr psp, r2                                  \n"
+            "    msr psp, r2                                  \n"
-        "    msr psplim, r3                               \n"
+            "    msr psplim, r3                               \n"
-        "    msr control, r4                              \n"
+            "    msr control, r4                              \n"
-        "                                                 \n"
+            "                                                 \n"
-        " restore_general_regs_first_task:                \n"
+            " restore_general_regs_first_task:                \n"
-        "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
+            "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
-        "    stmia r2!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
+            "    stmia r2!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
-        "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 restored. */
+            "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 restored. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context_done_first_task:                \n"
+            " restore_context_done_first_task:                \n"
-        "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
+            "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
-        "    mov r0, #0                                   \n"
+            "    mov r0, #0                                   \n"
-        "    msr basepri, r0                              \n" /* Ensure that interrupts are enabled when the first task starts. */
+            "    msr basepri, r0                              \n" /* Ensure that interrupts are enabled when the first task starts. */
-        "    bx lr                                        \n"
+            "    bx lr                                        \n"
-        "                                                 \n"
+            "                                                 \n"
-        " .align 4                                        \n"
+            " .align 4                                        \n"
-        " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
+            " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
-        " xMPUCTRLConst2: .word 0xe000ed94                \n"
+            " xMPUCTRLConst2: .word 0xe000ed94                \n"
-        " xMAIR0Const2: .word 0xe000edc0                  \n"
+            " xMAIR0Const2: .word 0xe000edc0                  \n"
-        " xRNRConst2: .word 0xe000ed98                    \n"
+            " xRNRConst2: .word 0xe000ed98                    \n"
-        " xRBARConst2: .word 0xe000ed9c                   \n"
+            " xRBARConst2: .word 0xe000ed9c                   \n"
-    );
+        );
-}
+    }
 
 #else /* configENABLE_MPU */
 
-void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        "   .syntax unified                                 \n"
+            "   .syntax unified                                 \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   ldr  r2, pxCurrentTCBConst2                     \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr  r2, pxCurrentTCBConst2                     \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr  r1, [r2]                                   \n"/* Read pxCurrentTCB. */
+            "   ldr  r1, [r2]                                   \n" /* Read pxCurrentTCB. */
-        "   ldr  r0, [r1]                                   \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+            "   ldr  r0, [r1]                                   \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-        "                                                   \n"
+            "                                                   \n"
-        "   ldm  r0!, {r1-r2}                               \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
+            "   ldm  r0!, {r1-r2}                               \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
-        "   msr  psplim, r1                                 \n"/* Set this task's PSPLIM value. */
+            "   msr  psplim, r1                                 \n" /* Set this task's PSPLIM value. */
-        "   movs r1, #2                                     \n"/* r1 = 2. */
+            "   movs r1, #2                                     \n" /* r1 = 2. */
-        "   msr  CONTROL, r1                                \n"/* Switch to use PSP in the thread mode. */
+            "   msr  CONTROL, r1                                \n" /* Switch to use PSP in the thread mode. */
-        "   adds r0, #32                                    \n"/* Discard everything up to r0. */
+            "   adds r0, #32                                    \n" /* Discard everything up to r0. */
-        "   msr  psp, r0                                    \n"/* This is now the new top of stack to use in the task. */
+            "   msr  psp, r0                                    \n" /* This is now the new top of stack to use in the task. */
-        "   isb                                             \n"
+            "   isb                                             \n"
-        "   mov  r0, #0                                     \n"
+            "   mov  r0, #0                                     \n"
-        "   msr  basepri, r0                                \n"/* Ensure that interrupts are enabled when the first task starts. */
+            "   msr  basepri, r0                                \n" /* Ensure that interrupts are enabled when the first task starts. */
-        "   bx   r2                                         \n"/* Finally, branch to EXC_RETURN. */
+            "   bx   r2                                         \n" /* Finally, branch to EXC_RETURN. */
-        "                                                   \n"
+            "                                                   \n"
-        "   .align 4                                        \n"
+            "   .align 4                                        \n"
-        "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
+            "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
-    );
+        );
-}
+    }
 
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
@@ -157,12 +160,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   mrs r0, control                                 \n"/* r0 = CONTROL. */
+        "   mrs r0, control                                 \n" /* r0 = CONTROL. */
-        "   tst r0, #1                                      \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
+        "   tst r0, #1                                      \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
         "   ite ne                                          \n"
-        "   movne r0, #0                                    \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "   movne r0, #0                                    \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-        "   moveq r0, #1                                    \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "   moveq r0, #1                                    \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-        "   bx lr                                           \n"/* Return. */
+        "   bx lr                                           \n" /* Return. */
         "                                                   \n"
         "   .align 4                                        \n"
         ::: "r0", "memory"
@@ -176,10 +179,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   mrs  r0, control                                \n"/* Read the CONTROL register. */
+        "   mrs  r0, control                                \n" /* Read the CONTROL register. */
-        "   bic r0, #1                                      \n"/* Clear the bit 0. */
+        "   bic r0, #1                                      \n" /* Clear the bit 0. */
-        "   msr  control, r0                                \n"/* Write back the new CONTROL value. */
+        "   msr  control, r0                                \n" /* Write back the new CONTROL value. */
-        "   bx lr                                           \n"/* Return to the caller. */
+        "   bx lr                                           \n" /* Return to the caller. */
         ::: "r0", "memory"
     );
 }
@@ -191,10 +194,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   mrs r0, control                                 \n"/* r0 = CONTROL. */
+        "   mrs r0, control                                 \n" /* r0 = CONTROL. */
-        "   orr r0, #1                                      \n"/* r0 = r0 | 1. */
+        "   orr r0, #1                                      \n" /* r0 = r0 | 1. */
-        "   msr control, r0                                 \n"/* CONTROL = r0. */
+        "   msr control, r0                                 \n" /* CONTROL = r0. */
-        "   bx lr                                           \n"/* Return to the caller. */
+        "   bx lr                                           \n" /* Return to the caller. */
         ::: "r0", "memory"
     );
 }
@@ -206,15 +209,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   ldr r0, xVTORConst                              \n"/* Use the NVIC offset register to locate the stack. */
+        "   ldr r0, xVTORConst                              \n" /* Use the NVIC offset register to locate the stack. */
-        "   ldr r0, [r0]                                    \n"/* Read the VTOR register which gives the address of vector table. */
+        "   ldr r0, [r0]                                    \n" /* Read the VTOR register which gives the address of vector table. */
-        "   ldr r0, [r0]                                    \n"/* The first entry in vector table is stack pointer. */
+        "   ldr r0, [r0]                                    \n" /* The first entry in vector table is stack pointer. */
-        "   msr msp, r0                                     \n"/* Set the MSP back to the start of the stack. */
+        "   msr msp, r0                                     \n" /* Set the MSP back to the start of the stack. */
-        "   cpsie i                                         \n"/* Globally enable interrupts. */
+        "   cpsie i                                         \n" /* Globally enable interrupts. */
         "   cpsie f                                         \n"
         "   dsb                                             \n"
         "   isb                                             \n"
-        "   svc %0                                          \n"/* System call to start the first task. */
+        "   svc %0                                          \n" /* System call to start the first task. */
         "   nop                                             \n"
         "                                                   \n"
         "   .align 4                                        \n"
@@ -230,12 +233,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   mrs r0, basepri                                 \n"/* r0 = basepri. Return original basepri value. */
+        "   mrs r0, basepri                                 \n" /* r0 = basepri. Return original basepri value. */
-        "   mov r1, %0                                      \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "   mov r1, %0                                      \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-        "   msr basepri, r1                                 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "   msr basepri, r1                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
         "   dsb                                             \n"
         "   isb                                             \n"
-        "   bx lr                                           \n"/* Return. */
+        "   bx lr                                           \n" /* Return. */
         ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
     );
 }
@@ -247,10 +250,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   msr basepri, r0                                 \n"/* basepri = ulMask. */
+        "   msr basepri, r0                                 \n" /* basepri = ulMask. */
         "   dsb                                             \n"
         "   isb                                             \n"
-        "   bx lr                                           \n"/* Return. */
+        "   bx lr                                           \n" /* Return. */
         ::: "memory"
     );
 }
@@ -258,246 +261,239 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
 
 #if ( configENABLE_MPU == 1 )
 
-void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        " .syntax unified                                 \n"
+            " .syntax unified                                 \n"
-        "                                                 \n"
+            "                                                 \n"
-        " ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            " ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        " ldr r0, [r2]                                    \n" /* r0 = pxCurrentTCB. */
+            " ldr r0, [r2]                                    \n" /* r0 = pxCurrentTCB. */
-        " ldr r1, [r0]                                    \n" /* r1 = Location in TCB where the context should be saved. */
+            " ldr r1, [r0]                                    \n" /* r1 = Location in TCB where the context should be saved. */
-        " mrs r2, psp                                     \n" /* r2 = PSP. */
+            " mrs r2, psp                                     \n" /* r2 = PSP. */
-        "                                                 \n"
+            "                                                 \n"
-        " save_general_regs:                              \n"
+            " save_general_regs:                              \n"
-    #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-        "    add r2, r2, #0x20                            \n" /* Move r2 to location where s0 is saved. */
+            "    add r2, r2, #0x20                            \n" /* Move r2 to location where s0 is saved. */
-        "    tst lr, #0x10                                \n"
+            "    tst lr, #0x10                                \n"
-        "    ittt eq                                      \n"
+            "    ittt eq                                      \n"
-        "    vstmiaeq r1!, {s16-s31}                      \n" /* Store s16-s31. */
+            "    vstmiaeq r1!, {s16-s31}                      \n" /* Store s16-s31. */
-        "    vldmiaeq r2, {s0-s16}                        \n" /* Copy hardware saved FP context into s0-s16. */
+            "    vldmiaeq r2, {s0-s16}                        \n" /* Copy hardware saved FP context into s0-s16. */
-        "    vstmiaeq r1!, {s0-s16}                       \n" /* Store hardware saved FP context. */
+            "    vstmiaeq r1!, {s0-s16}                       \n" /* Store hardware saved FP context. */
-        "    sub r2, r2, #0x20                            \n" /* Set r2 back to the location of hardware saved context. */
+            "    sub r2, r2, #0x20                            \n" /* Set r2 back to the location of hardware saved context. */
-    #endif /* configENABLE_FPU || configENABLE_MVE */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
-        "                                                 \n"
+            "                                                 \n"
-        "    stmia r1!, {r4-r11}                          \n" /* Store r4-r11. */
+            "    stmia r1!, {r4-r11}                          \n" /* Store r4-r11. */
-        "    ldmia r2, {r4-r11}                           \n" /* Copy the hardware saved context into r4-r11. */
+            "    ldmia r2, {r4-r11}                           \n" /* Copy the hardware saved context into r4-r11. */
-        "    stmia r1!, {r4-r11}                          \n" /* Store the hardware saved context. */
+            "    stmia r1!, {r4-r11}                          \n" /* Store the hardware saved context. */
-        "                                                 \n"
+            "                                                 \n"
-        " save_special_regs:                              \n"
+            " save_special_regs:                              \n"
-        "    mrs r3, psplim                               \n" /* r3 = PSPLIM. */
+            "    mrs r3, psplim                               \n" /* r3 = PSPLIM. */
-        "    mrs r4, control                              \n" /* r4 = CONTROL. */
+            "    mrs r4, control                              \n" /* r4 = CONTROL. */
-        "    stmia r1!, {r2-r4, lr}                       \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
+            "    stmia r1!, {r2-r4, lr}                       \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
-        "    str r1, [r0]                                 \n" /* Save the location from where the context should be restored as the first member of TCB. */
+            "    str r1, [r0]                                 \n" /* Save the location from where the context should be restored as the first member of TCB. */
-        "                                                 \n"
+            "                                                 \n"
-        " select_next_task:                               \n"
+            " select_next_task:                               \n"
-        "    mov r0, %0                                   \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
+            "    mov r0, %0                                   \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-        "    msr basepri, r0                              \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+            "    msr basepri, r0                              \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-        "    dsb                                          \n"
+            "    dsb                                          \n"
-        "    isb                                          \n"
+            "    isb                                          \n"
-        "    bl vTaskSwitchContext                        \n"
+            "    bl vTaskSwitchContext                        \n"
-        "    mov r0, #0                                   \n" /* r0 = 0. */
+            "    mov r0, #0                                   \n" /* r0 = 0. */
-        "    msr basepri, r0                              \n" /* Enable interrupts. */
+            "    msr basepri, r0                              \n" /* Enable interrupts. */
-        "                                                 \n"
+            "                                                 \n"
-        " program_mpu:                                    \n"
+            " program_mpu:                                    \n"
-        "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB. */
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB. */
-        "                                                 \n"
+            "                                                 \n"
-        "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
+            "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-        "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
-        "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
+            "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
-        "    str r2, [r1]                                 \n" /* Disable MPU. */
+            "    str r2, [r1]                                 \n" /* Disable MPU. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
-        "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
+            "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-        "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-        "    str r1, [r2]                                 \n" /* Program MAIR0. */
+            "    str r1, [r2]                                 \n" /* Program MAIR0. */
-        "                                                 \n"
+            "                                                 \n"
-        "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-        "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
-        "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-        "                                                 \n"
+            "                                                 \n"
-        "    movs r3, #4                                  \n" /* r3 = 4. */
+            "    movs r3, #4                                  \n" /* r3 = 4. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 4. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 4. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-        "                                                 \n"
+            "                                                 \n"
-    #if ( configTOTAL_MPU_REGIONS == 16 )
+        #if ( configTOTAL_MPU_REGIONS == 16 )
-        "    movs r3, #8                                  \n" /* r3 = 8. */
+            "    movs r3, #8                                  \n" /* r3 = 8. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 8. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 8. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-        "    movs r3, #12                                 \n" /* r3 = 12. */
+            "    movs r3, #12                                 \n" /* r3 = 12. */
-        "    str r3, [r1]                                 \n" /* Program RNR = 12. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 12. */
-        "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-        "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-    #endif /* configTOTAL_MPU_REGIONS == 16 */
+        #endif /* configTOTAL_MPU_REGIONS == 16 */
-        "                                                 \n"
+            "                                                 \n"
-        "   ldr r1, xMPUCTRLConst                         \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "   ldr r1, xMPUCTRLConst                         \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
-        "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
+            "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
-        "   orr r2, #1                                    \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
+            "   orr r2, #1                                    \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
-        "   str r2, [r1]                                  \n" /* Enable MPU. */
+            "   str r2, [r1]                                  \n" /* Enable MPU. */
-        "   dsb                                           \n" /* Force memory writes before continuing. */
+            "   dsb                                           \n" /* Force memory writes before continuing. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context:                                \n"
+            " restore_context:                                \n"
-        "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
-        "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
+            "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_special_regs:                           \n"
+            " restore_special_regs:                           \n"
-        "    ldmdb r1!, {r2-r4, lr}                       \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
+            "    ldmdb r1!, {r2-r4, lr}                       \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
-        "    msr psp, r2                                  \n"
+            "    msr psp, r2                                  \n"
-        "    msr psplim, r3                               \n"
+            "    msr psplim, r3                               \n"
-        "    msr control, r4                              \n"
+            "    msr control, r4                              \n"
-        "                                                 \n"
+            "                                                 \n"
-        " restore_general_regs:                           \n"
+            " restore_general_regs:                           \n"
-        "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
+            "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
-        "    stmia r2!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
+            "    stmia r2!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
-        "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 restored. */
+            "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 restored. */
-    #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-        "    tst lr, #0x10                                \n"
+            "    tst lr, #0x10                                \n"
-        "    ittt eq                                      \n"
+            "    ittt eq                                      \n"
-        "    vldmdbeq r1!, {s0-s16}                       \n" /* s0-s16 contain hardware saved FP context. */
+            "    vldmdbeq r1!, {s0-s16}                       \n" /* s0-s16 contain hardware saved FP context. */
-        "    vstmiaeq r2!, {s0-s16}                       \n" /* Copy hardware saved FP context on the task stack. */
+            "    vstmiaeq r2!, {s0-s16}                       \n" /* Copy hardware saved FP context on the task stack. */
-        "    vldmdbeq r1!, {s16-s31}                      \n" /* Restore s16-s31. */
+            "    vldmdbeq r1!, {s16-s31}                      \n" /* Restore s16-s31. */
-    #endif /* configENABLE_FPU || configENABLE_MVE */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
-        "                                                 \n"
+            "                                                 \n"
-        " restore_context_done:                           \n"
+            " restore_context_done:                           \n"
-        "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
+            "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
-        "    bx lr                                        \n"
+            "    bx lr                                        \n"
-        "                                                 \n"
+            "                                                 \n"
-        " .align 4                                        \n"
+            " .align 4                                        \n"
-        " pxCurrentTCBConst: .word pxCurrentTCB           \n"
+            " pxCurrentTCBConst: .word pxCurrentTCB           \n"
-        " xMPUCTRLConst: .word 0xe000ed94                 \n"
+            " xMPUCTRLConst: .word 0xe000ed94                 \n"
-        " xMAIR0Const: .word 0xe000edc0                   \n"
+            " xMAIR0Const: .word 0xe000edc0                   \n"
-        " xRNRConst: .word 0xe000ed98                     \n"
+            " xRNRConst: .word 0xe000ed98                     \n"
-        " xRBARConst: .word 0xe000ed9c                    \n"
+            " xRBARConst: .word 0xe000ed9c                    \n"
-        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+            ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-    );
+        );
-}
+    }
 
 #else /* configENABLE_MPU */
 
-void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        "   .syntax unified                                 \n"
+            "   .syntax unified                                 \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   mrs r0, psp                                     \n"/* Read PSP in r0. */
+            "   mrs r0, psp                                     \n" /* Read PSP in r0. */
-        "                                                   \n"
+            "                                                   \n"
         #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-            "   tst lr, #0x10                                   \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+            "   tst lr, #0x10                                   \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
             "   it eq                                           \n"
-            "   vstmdbeq r0!, {s16-s31}                         \n"/* Store the additional FP context registers which are not saved automatically. */
+            "   vstmdbeq r0!, {s16-s31}                         \n" /* Store the additional FP context registers which are not saved automatically. */
         #endif /* configENABLE_FPU || configENABLE_MVE */
-        "                                                   \n"
+            "                                                   \n"
-        "   mrs r2, psplim                                  \n"/* r2 = PSPLIM. */
+            "   mrs r2, psplim                                  \n" /* r2 = PSPLIM. */
-        "   mov r3, lr                                      \n"/* r3 = LR/EXC_RETURN. */
+            "   mov r3, lr                                      \n" /* r3 = LR/EXC_RETURN. */
-        "   stmdb r0!, {r2-r11}                             \n"/* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
+            "   stmdb r0!, {r2-r11}                             \n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
-        "                                                   \n"
+            "                                                   \n"
-        "   ldr r2, pxCurrentTCBConst                       \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr r1, [r2]                                    \n"/* Read pxCurrentTCB. */
+            "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
-        "   str r0, [r1]                                    \n"/* Save the new top of stack in TCB. */
+            "   str r0, [r1]                                    \n" /* Save the new top of stack in TCB. */
-        "                                                   \n"
+            "                                                   \n"
-        "   mov r0, %0                                      \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
+            "   mov r0, %0                                      \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-        "   msr basepri, r0                                 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+            "   msr basepri, r0                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-        "   dsb                                             \n"
+            "   dsb                                             \n"
-        "   isb                                             \n"
+            "   isb                                             \n"
-        "   bl vTaskSwitchContext                           \n"
+            "   bl vTaskSwitchContext                           \n"
-        "   mov r0, #0                                      \n"/* r0 = 0. */
+            "   mov r0, #0                                      \n" /* r0 = 0. */
-        "   msr basepri, r0                                 \n"/* Enable interrupts. */
+            "   msr basepri, r0                                 \n" /* Enable interrupts. */
-        "                                                   \n"
+            "                                                   \n"
-        "   ldr r2, pxCurrentTCBConst                       \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "   ldr r1, [r2]                                    \n"/* Read pxCurrentTCB. */
+            "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
-        "   ldr r0, [r1]                                    \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
+            "   ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
-        "                                                   \n"
+            "                                                   \n"
-        "   ldmia r0!, {r2-r11}                             \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
+            "   ldmia r0!, {r2-r11}                             \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
-        "                                                   \n"
+            "                                                   \n"
         #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-            "   tst r3, #0x10                                   \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+            "   tst r3, #0x10                                   \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
             "   it eq                                           \n"
-            "   vldmiaeq r0!, {s16-s31}                         \n"/* Restore the additional FP context registers which are not restored automatically. */
+            "   vldmiaeq r0!, {s16-s31}                         \n" /* Restore the additional FP context registers which are not restored automatically. */
         #endif /* configENABLE_FPU || configENABLE_MVE */
-        "                                                   \n"
+            "                                                   \n"
-        "   msr psplim, r2                                  \n"/* Restore the PSPLIM register value for the task. */
+            "   msr psplim, r2                                  \n" /* Restore the PSPLIM register value for the task. */
-        "   msr psp, r0                                     \n"/* Remember the new top of stack for the task. */
+            "   msr psp, r0                                     \n" /* Remember the new top of stack for the task. */
-        "   bx r3                                           \n"
+            "   bx r3                                           \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   .align 4                                        \n"
+            "   .align 4                                        \n"
-        "pxCurrentTCBConst: .word pxCurrentTCB              \n"
+            "pxCurrentTCBConst: .word pxCurrentTCB              \n"
-        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+            ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-    );
+        );
-}
+    }
 
 #endif /* configENABLE_MPU */
 /*-----------------------------------------------------------*/
 
 #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
 
-void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-   __asm volatile
+        __asm volatile
-    (
+        (
-        ".syntax unified                \n"
+            ".syntax unified                \n"
-        ".extern vPortSVCHandler_C      \n"
+            ".extern vPortSVCHandler_C      \n"
-        ".extern vSystemCallEnter       \n"
+            ".extern vSystemCallEnter       \n"
-        ".extern vSystemCallEnter_1     \n"
+            ".extern vSystemCallExit        \n"
-        ".extern vSystemCallExit        \n"
+            "                               \n"
-        "                               \n"
+            "tst lr, #4                     \n"
-        "tst lr, #4                     \n"
+            "ite eq                         \n"
-        "ite eq                         \n"
+            "mrseq r0, msp                  \n"
-        "mrseq r0, msp                  \n"
+            "mrsne r0, psp                  \n"
-        "mrsne r0, psp                  \n"
+            "                               \n"
-        "                               \n"
+            "ldr r1, [r0, #24]              \n"
-        "ldr r1, [r0, #24]              \n"
+            "ldrb r2, [r1, #-2]             \n"
-        "ldrb r2, [r1, #-2]             \n"
+            "cmp r2, %0                     \n"
-        "cmp r2, %0                     \n"
+            "blt syscall_enter              \n"
-        "beq syscall_enter              \n"
+            "cmp r2, %1                     \n"
-        "cmp r2, %1                     \n"
+            "beq syscall_exit               \n"
-        "beq syscall_enter_1            \n"
+            "b vPortSVCHandler_C            \n"
-        "cmp r2, %2                     \n"
+            "                               \n"
-        "beq syscall_exit               \n"
+            "syscall_enter:                 \n"
-        "b vPortSVCHandler_C            \n"
+            "    mov r1, lr                 \n"
-        "                               \n"
+            "    b vSystemCallEnter         \n"
-        "syscall_enter:                 \n"
+            "                               \n"
-        "    mov r1, lr                 \n"
+            "syscall_exit:                  \n"
-        "    b vSystemCallEnter         \n"
+            "    mov r1, lr                 \n"
-        "                               \n"
+            "    b vSystemCallExit          \n"
-        "syscall_enter_1:               \n"
+            "                               \n"
-        "    mov r1, lr                 \n"
+            : /* No outputs. */
-        "    b vSystemCallEnter_1       \n"
+            : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT )
-        "                               \n"
+            : "r0", "r1", "r2", "memory"
-        "syscall_exit:                  \n"
+        );
-        "    mov r1, lr                 \n"
+    }
-        "    b vSystemCallExit          \n"
-        "                               \n"
-        : /* No outputs. */
-        :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT )
-        : "r0", "r1", "r2", "memory"
-    );
-}
 
 #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
 
-void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
+    {
-    __asm volatile
+        __asm volatile
-    (
+        (
-        "   .syntax unified                                 \n"
+            "   .syntax unified                                 \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   tst lr, #4                                      \n"
+            "   tst lr, #4                                      \n"
-        "   ite eq                                          \n"
+            "   ite eq                                          \n"
-        "   mrseq r0, msp                                   \n"
+            "   mrseq r0, msp                                   \n"
-        "   mrsne r0, psp                                   \n"
+            "   mrsne r0, psp                                   \n"
-        "   ldr r1, svchandler_address_const                \n"
+            "   ldr r1, svchandler_address_const                \n"
-        "   bx r1                                           \n"
+            "   bx r1                                           \n"
-        "                                                   \n"
+            "                                                   \n"
-        "   .align 4                                        \n"
+            "   .align 4                                        \n"
-        "svchandler_address_const: .word vPortSVCHandler_C  \n"
+            "svchandler_address_const: .word vPortSVCHandler_C  \n"
-    );
+        );
-}
+    }
 
 #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
 /*-----------------------------------------------------------*/

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -32,15 +32,12 @@
 /*-----------------------------------------------------------*/
 
 #include "FreeRTOSConfig.h"
+#include "mpu_syscall_numbers.h"
 
 #ifndef configUSE_MPU_WRAPPERS_V1
     #define configUSE_MPU_WRAPPERS_V1 0
 #endif
 
-/* These must be in sync with portmacro.h. */
-#define portSVC_SYSTEM_CALL_ENTER   4 /* System calls with upto 4 parameters. */
-#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */
-#define portSVC_SYSTEM_CALL_EXIT    6
 /*-----------------------------------------------------------*/
 
 #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
@@ -57,10 +54,7 @@ MPU_xTaskDelayUntil:
         b MPU_xTaskDelayUntilImpl
     MPU_xTaskDelayUntil_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskDelayUntil
-        bl MPU_xTaskDelayUntilImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskAbortDelay
@@ -75,10 +69,7 @@ MPU_xTaskAbortDelay:
         b MPU_xTaskAbortDelayImpl
     MPU_xTaskAbortDelay_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskAbortDelay
-        bl MPU_xTaskAbortDelayImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskDelay
@@ -93,10 +84,7 @@ MPU_vTaskDelay:
         b MPU_vTaskDelayImpl
     MPU_vTaskDelay_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskDelay
-        bl MPU_vTaskDelayImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskPriorityGet
@@ -111,10 +99,7 @@ MPU_uxTaskPriorityGet:
         b MPU_uxTaskPriorityGetImpl
     MPU_uxTaskPriorityGet_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskPriorityGet
-        bl MPU_uxTaskPriorityGetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_eTaskGetState
@@ -129,10 +114,7 @@ MPU_eTaskGetState:
         b MPU_eTaskGetStateImpl
     MPU_eTaskGetState_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_eTaskGetState
-        bl MPU_eTaskGetStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskGetInfo
@@ -147,10 +129,7 @@ MPU_vTaskGetInfo:
         b MPU_vTaskGetInfoImpl
     MPU_vTaskGetInfo_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskGetInfo
-        bl MPU_vTaskGetInfoImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetIdleTaskHandle
@@ -165,10 +144,7 @@ MPU_xTaskGetIdleTaskHandle:
         b MPU_xTaskGetIdleTaskHandleImpl
     MPU_xTaskGetIdleTaskHandle_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetIdleTaskHandle
-        bl MPU_xTaskGetIdleTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSuspend
@@ -183,10 +159,7 @@ MPU_vTaskSuspend:
         b MPU_vTaskSuspendImpl
     MPU_vTaskSuspend_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSuspend
-        bl MPU_vTaskSuspendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskResume
@@ -201,10 +174,7 @@ MPU_vTaskResume:
         b MPU_vTaskResumeImpl
     MPU_vTaskResume_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskResume
-        bl MPU_vTaskResumeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetTickCount
@@ -219,10 +189,7 @@ MPU_xTaskGetTickCount:
         b MPU_xTaskGetTickCountImpl
     MPU_xTaskGetTickCount_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetTickCount
-        bl MPU_xTaskGetTickCountImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetNumberOfTasks
@@ -237,10 +204,7 @@ MPU_uxTaskGetNumberOfTasks:
         b MPU_uxTaskGetNumberOfTasksImpl
     MPU_uxTaskGetNumberOfTasks_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetNumberOfTasks
-        bl MPU_uxTaskGetNumberOfTasksImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pcTaskGetName
@@ -255,10 +219,7 @@ MPU_pcTaskGetName:
         b MPU_pcTaskGetNameImpl
     MPU_pcTaskGetName_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcTaskGetName
-        bl MPU_pcTaskGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetRunTimeCounter
@@ -273,10 +234,7 @@ MPU_ulTaskGetRunTimeCounter:
         b MPU_ulTaskGetRunTimeCounterImpl
     MPU_ulTaskGetRunTimeCounter_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetRunTimeCounter
-        bl MPU_ulTaskGetRunTimeCounterImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetRunTimePercent
@@ -291,10 +249,7 @@ MPU_ulTaskGetRunTimePercent:
         b MPU_ulTaskGetRunTimePercentImpl
     MPU_ulTaskGetRunTimePercent_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetRunTimePercent
-        bl MPU_ulTaskGetRunTimePercentImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetIdleRunTimePercent
@@ -309,10 +264,7 @@ MPU_ulTaskGetIdleRunTimePercent:
         b MPU_ulTaskGetIdleRunTimePercentImpl
     MPU_ulTaskGetIdleRunTimePercent_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent
-        bl MPU_ulTaskGetIdleRunTimePercentImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetIdleRunTimeCounter
@@ -327,10 +279,7 @@ MPU_ulTaskGetIdleRunTimeCounter:
         b MPU_ulTaskGetIdleRunTimeCounterImpl
     MPU_ulTaskGetIdleRunTimeCounter_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter
-        bl MPU_ulTaskGetIdleRunTimeCounterImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetApplicationTaskTag
@@ -345,10 +294,7 @@ MPU_vTaskSetApplicationTaskTag:
         b MPU_vTaskSetApplicationTaskTagImpl
     MPU_vTaskSetApplicationTaskTag_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetApplicationTaskTag
-        bl MPU_vTaskSetApplicationTaskTagImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetApplicationTaskTag
@@ -363,10 +309,7 @@ MPU_xTaskGetApplicationTaskTag:
         b MPU_xTaskGetApplicationTaskTagImpl
     MPU_xTaskGetApplicationTaskTag_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetApplicationTaskTag
-        bl MPU_xTaskGetApplicationTaskTagImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetThreadLocalStoragePointer
@@ -381,10 +324,7 @@ MPU_vTaskSetThreadLocalStoragePointer:
         b MPU_vTaskSetThreadLocalStoragePointerImpl
     MPU_vTaskSetThreadLocalStoragePointer_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer
-        bl MPU_vTaskSetThreadLocalStoragePointerImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pvTaskGetThreadLocalStoragePointer
@@ -399,10 +339,7 @@ MPU_pvTaskGetThreadLocalStoragePointer:
         b MPU_pvTaskGetThreadLocalStoragePointerImpl
     MPU_pvTaskGetThreadLocalStoragePointer_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer
-        bl MPU_pvTaskGetThreadLocalStoragePointerImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetSystemState
@@ -417,10 +354,7 @@ MPU_uxTaskGetSystemState:
         b MPU_uxTaskGetSystemStateImpl
     MPU_uxTaskGetSystemState_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetSystemState
-        bl MPU_uxTaskGetSystemStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetStackHighWaterMark
@@ -435,10 +369,7 @@ MPU_uxTaskGetStackHighWaterMark:
         b MPU_uxTaskGetStackHighWaterMarkImpl
     MPU_uxTaskGetStackHighWaterMark_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark
-        bl MPU_uxTaskGetStackHighWaterMarkImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetStackHighWaterMark2
@@ -453,10 +384,7 @@ MPU_uxTaskGetStackHighWaterMark2:
         b MPU_uxTaskGetStackHighWaterMark2Impl
     MPU_uxTaskGetStackHighWaterMark2_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2
-        bl MPU_uxTaskGetStackHighWaterMark2Impl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetCurrentTaskHandle
@@ -471,10 +399,7 @@ MPU_xTaskGetCurrentTaskHandle:
         b MPU_xTaskGetCurrentTaskHandleImpl
     MPU_xTaskGetCurrentTaskHandle_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle
-        bl MPU_xTaskGetCurrentTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetSchedulerState
@@ -489,10 +414,7 @@ MPU_xTaskGetSchedulerState:
         b MPU_xTaskGetSchedulerStateImpl
     MPU_xTaskGetSchedulerState_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetSchedulerState
-        bl MPU_xTaskGetSchedulerStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetTimeOutState
@@ -507,10 +429,7 @@ MPU_vTaskSetTimeOutState:
         b MPU_vTaskSetTimeOutStateImpl
     MPU_vTaskSetTimeOutState_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetTimeOutState
-        bl MPU_vTaskSetTimeOutStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskCheckForTimeOut
@@ -525,14 +444,11 @@ MPU_xTaskCheckForTimeOut:
         b MPU_xTaskCheckForTimeOutImpl
     MPU_xTaskCheckForTimeOut_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskCheckForTimeOut
-        bl MPU_xTaskCheckForTimeOutImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTaskGenericNotify
+    PUBLIC MPU_xTaskGenericNotifyEntry
-MPU_xTaskGenericNotify:
+MPU_xTaskGenericNotifyEntry:
     push {r0, r1}
     mrs r0, control
     movs r1, #1
@@ -543,14 +459,11 @@ MPU_xTaskGenericNotify:
         b MPU_xTaskGenericNotifyImpl
     MPU_xTaskGenericNotify_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTaskGenericNotify
-        bl MPU_xTaskGenericNotifyImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTaskGenericNotifyWait
+    PUBLIC MPU_xTaskGenericNotifyWaitEntry
-MPU_xTaskGenericNotifyWait:
+MPU_xTaskGenericNotifyWaitEntry:
     push {r0, r1}
     mrs r0, control
     movs r1, #1
@@ -561,10 +474,7 @@ MPU_xTaskGenericNotifyWait:
         b MPU_xTaskGenericNotifyWaitImpl
     MPU_xTaskGenericNotifyWait_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTaskGenericNotifyWait
-        bl MPU_xTaskGenericNotifyWaitImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGenericNotifyTake
@@ -579,10 +489,7 @@ MPU_ulTaskGenericNotifyTake:
         b MPU_ulTaskGenericNotifyTakeImpl
     MPU_ulTaskGenericNotifyTake_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGenericNotifyTake
-        bl MPU_ulTaskGenericNotifyTakeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGenericNotifyStateClear
@@ -597,10 +504,7 @@ MPU_xTaskGenericNotifyStateClear:
         b MPU_xTaskGenericNotifyStateClearImpl
     MPU_xTaskGenericNotifyStateClear_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGenericNotifyStateClear
-        bl MPU_xTaskGenericNotifyStateClearImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGenericNotifyValueClear
@@ -615,10 +519,7 @@ MPU_ulTaskGenericNotifyValueClear:
         b MPU_ulTaskGenericNotifyValueClearImpl
     MPU_ulTaskGenericNotifyValueClear_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear
-        bl MPU_ulTaskGenericNotifyValueClearImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGenericSend
@@ -633,10 +534,7 @@ MPU_xQueueGenericSend:
         b MPU_xQueueGenericSendImpl
     MPU_xQueueGenericSend_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGenericSend
-        bl MPU_xQueueGenericSendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxQueueMessagesWaiting
@@ -651,10 +549,7 @@ MPU_uxQueueMessagesWaiting:
         b MPU_uxQueueMessagesWaitingImpl
     MPU_uxQueueMessagesWaiting_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxQueueMessagesWaiting
-        bl MPU_uxQueueMessagesWaitingImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxQueueSpacesAvailable
@@ -669,10 +564,7 @@ MPU_uxQueueSpacesAvailable:
         b MPU_uxQueueSpacesAvailableImpl
     MPU_uxQueueSpacesAvailable_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxQueueSpacesAvailable
-        bl MPU_uxQueueSpacesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueReceive
@@ -687,10 +579,7 @@ MPU_xQueueReceive:
         b MPU_xQueueReceiveImpl
     MPU_xQueueReceive_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueReceive
-        bl MPU_xQueueReceiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueuePeek
@@ -705,10 +594,7 @@ MPU_xQueuePeek:
         b MPU_xQueuePeekImpl
     MPU_xQueuePeek_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueuePeek
-        bl MPU_xQueuePeekImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueSemaphoreTake
@@ -723,10 +609,7 @@ MPU_xQueueSemaphoreTake:
         b MPU_xQueueSemaphoreTakeImpl
     MPU_xQueueSemaphoreTake_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueSemaphoreTake
-        bl MPU_xQueueSemaphoreTakeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGetMutexHolder
@@ -741,10 +624,7 @@ MPU_xQueueGetMutexHolder:
         b MPU_xQueueGetMutexHolderImpl
     MPU_xQueueGetMutexHolder_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGetMutexHolder
-        bl MPU_xQueueGetMutexHolderImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueTakeMutexRecursive
@@ -759,10 +639,7 @@ MPU_xQueueTakeMutexRecursive:
         b MPU_xQueueTakeMutexRecursiveImpl
     MPU_xQueueTakeMutexRecursive_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueTakeMutexRecursive
-        bl MPU_xQueueTakeMutexRecursiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGiveMutexRecursive
@@ -777,10 +654,7 @@ MPU_xQueueGiveMutexRecursive:
         b MPU_xQueueGiveMutexRecursiveImpl
     MPU_xQueueGiveMutexRecursive_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGiveMutexRecursive
-        bl MPU_xQueueGiveMutexRecursiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueSelectFromSet
@@ -795,10 +669,7 @@ MPU_xQueueSelectFromSet:
         b MPU_xQueueSelectFromSetImpl
     MPU_xQueueSelectFromSet_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueSelectFromSet
-        bl MPU_xQueueSelectFromSetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueAddToSet
@@ -813,10 +684,7 @@ MPU_xQueueAddToSet:
         b MPU_xQueueAddToSetImpl
     MPU_xQueueAddToSet_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueAddToSet
-        bl MPU_xQueueAddToSetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vQueueAddToRegistry
@@ -831,10 +699,7 @@ MPU_vQueueAddToRegistry:
         b MPU_vQueueAddToRegistryImpl
     MPU_vQueueAddToRegistry_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vQueueAddToRegistry
-        bl MPU_vQueueAddToRegistryImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vQueueUnregisterQueue
@@ -849,10 +714,7 @@ MPU_vQueueUnregisterQueue:
         b MPU_vQueueUnregisterQueueImpl
     MPU_vQueueUnregisterQueue_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vQueueUnregisterQueue
-        bl MPU_vQueueUnregisterQueueImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pcQueueGetName
@@ -867,10 +729,7 @@ MPU_pcQueueGetName:
         b MPU_pcQueueGetNameImpl
     MPU_pcQueueGetName_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcQueueGetName
-        bl MPU_pcQueueGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pvTimerGetTimerID
@@ -885,10 +744,7 @@ MPU_pvTimerGetTimerID:
         b MPU_pvTimerGetTimerIDImpl
     MPU_pvTimerGetTimerID_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pvTimerGetTimerID
-        bl MPU_pvTimerGetTimerIDImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTimerSetTimerID
@@ -903,10 +759,7 @@ MPU_vTimerSetTimerID:
         b MPU_vTimerSetTimerIDImpl
     MPU_vTimerSetTimerID_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTimerSetTimerID
-        bl MPU_vTimerSetTimerIDImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerIsTimerActive
@@ -921,10 +774,7 @@ MPU_xTimerIsTimerActive:
         b MPU_xTimerIsTimerActiveImpl
     MPU_xTimerIsTimerActive_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerIsTimerActive
-        bl MPU_xTimerIsTimerActiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetTimerDaemonTaskHandle
@@ -939,14 +789,11 @@ MPU_xTimerGetTimerDaemonTaskHandle:
         b MPU_xTimerGetTimerDaemonTaskHandleImpl
     MPU_xTimerGetTimerDaemonTaskHandle_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle
-        bl MPU_xTimerGetTimerDaemonTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTimerGenericCommand
+    PUBLIC MPU_xTimerGenericCommandEntry
-MPU_xTimerGenericCommand:
+MPU_xTimerGenericCommandEntry:
     push {r0, r1}
     /* This function can be called from ISR also and therefore, we need a check
      * to take privileged path, if called from ISR. */
@@ -959,13 +806,10 @@ MPU_xTimerGenericCommand:
     beq MPU_xTimerGenericCommand_Priv
     MPU_xTimerGenericCommand_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTimerGenericCommand
-        bl MPU_xTimerGenericCommandImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
     MPU_xTimerGenericCommand_Priv:
         pop {r0, r1}
-        b MPU_xTimerGenericCommandImpl
+        b MPU_xTimerGenericCommandPrivImpl
 
 /*-----------------------------------------------------------*/
 
@@ -981,10 +825,7 @@ MPU_pcTimerGetName:
         b MPU_pcTimerGetNameImpl
     MPU_pcTimerGetName_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcTimerGetName
-        bl MPU_pcTimerGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTimerSetReloadMode
@@ -999,10 +840,7 @@ MPU_vTimerSetReloadMode:
         b MPU_vTimerSetReloadModeImpl
     MPU_vTimerSetReloadMode_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTimerSetReloadMode
-        bl MPU_vTimerSetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetReloadMode
@@ -1017,10 +855,7 @@ MPU_xTimerGetReloadMode:
         b MPU_xTimerGetReloadModeImpl
     MPU_xTimerGetReloadMode_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetReloadMode
-        bl MPU_xTimerGetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTimerGetReloadMode
@@ -1035,10 +870,7 @@ MPU_uxTimerGetReloadMode:
         b MPU_uxTimerGetReloadModeImpl
     MPU_uxTimerGetReloadMode_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTimerGetReloadMode
-        bl MPU_uxTimerGetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetPeriod
@@ -1053,10 +885,7 @@ MPU_xTimerGetPeriod:
         b MPU_xTimerGetPeriodImpl
     MPU_xTimerGetPeriod_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetPeriod
-        bl MPU_xTimerGetPeriodImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetExpiryTime
@@ -1071,14 +900,11 @@ MPU_xTimerGetExpiryTime:
         b MPU_xTimerGetExpiryTimeImpl
     MPU_xTimerGetExpiryTime_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetExpiryTime
-        bl MPU_xTimerGetExpiryTimeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xEventGroupWaitBits
+    PUBLIC MPU_xEventGroupWaitBitsEntry
-MPU_xEventGroupWaitBits:
+MPU_xEventGroupWaitBitsEntry:
     push {r0, r1}
     mrs r0, control
     movs r1, #1
@@ -1089,10 +915,7 @@ MPU_xEventGroupWaitBits:
         b MPU_xEventGroupWaitBitsImpl
     MPU_xEventGroupWaitBits_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xEventGroupWaitBits
-        bl MPU_xEventGroupWaitBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupClearBits
@@ -1107,10 +930,7 @@ MPU_xEventGroupClearBits:
         b MPU_xEventGroupClearBitsImpl
     MPU_xEventGroupClearBits_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupClearBits
-        bl MPU_xEventGroupClearBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupSetBits
@@ -1125,10 +945,7 @@ MPU_xEventGroupSetBits:
         b MPU_xEventGroupSetBitsImpl
     MPU_xEventGroupSetBits_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupSetBits
-        bl MPU_xEventGroupSetBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupSync
@@ -1143,10 +960,7 @@ MPU_xEventGroupSync:
         b MPU_xEventGroupSyncImpl
     MPU_xEventGroupSync_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupSync
-        bl MPU_xEventGroupSyncImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxEventGroupGetNumber
@@ -1161,10 +975,7 @@ MPU_uxEventGroupGetNumber:
         b MPU_uxEventGroupGetNumberImpl
     MPU_uxEventGroupGetNumber_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxEventGroupGetNumber
-        bl MPU_uxEventGroupGetNumberImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vEventGroupSetNumber
@@ -1179,10 +990,7 @@ MPU_vEventGroupSetNumber:
         b MPU_vEventGroupSetNumberImpl
     MPU_vEventGroupSetNumber_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vEventGroupSetNumber
-        bl MPU_vEventGroupSetNumberImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSend
@@ -1197,10 +1005,7 @@ MPU_xStreamBufferSend:
         b MPU_xStreamBufferSendImpl
     MPU_xStreamBufferSend_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSend
-        bl MPU_xStreamBufferSendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferReceive
@@ -1215,10 +1020,7 @@ MPU_xStreamBufferReceive:
         b MPU_xStreamBufferReceiveImpl
     MPU_xStreamBufferReceive_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferReceive
-        bl MPU_xStreamBufferReceiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferIsFull
@@ -1233,10 +1035,7 @@ MPU_xStreamBufferIsFull:
         b MPU_xStreamBufferIsFullImpl
     MPU_xStreamBufferIsFull_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferIsFull
-        bl MPU_xStreamBufferIsFullImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferIsEmpty
@@ -1251,10 +1050,7 @@ MPU_xStreamBufferIsEmpty:
         b MPU_xStreamBufferIsEmptyImpl
     MPU_xStreamBufferIsEmpty_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferIsEmpty
-        bl MPU_xStreamBufferIsEmptyImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSpacesAvailable
@@ -1269,10 +1065,7 @@ MPU_xStreamBufferSpacesAvailable:
         b MPU_xStreamBufferSpacesAvailableImpl
     MPU_xStreamBufferSpacesAvailable_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSpacesAvailable
-        bl MPU_xStreamBufferSpacesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferBytesAvailable
@@ -1287,10 +1080,7 @@ MPU_xStreamBufferBytesAvailable:
         b MPU_xStreamBufferBytesAvailableImpl
     MPU_xStreamBufferBytesAvailable_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferBytesAvailable
-        bl MPU_xStreamBufferBytesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSetTriggerLevel
@@ -1305,10 +1095,7 @@ MPU_xStreamBufferSetTriggerLevel:
         b MPU_xStreamBufferSetTriggerLevelImpl
     MPU_xStreamBufferSetTriggerLevel_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel
-        bl MPU_xStreamBufferSetTriggerLevelImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferNextMessageLengthBytes
@@ -1323,10 +1110,7 @@ MPU_xStreamBufferNextMessageLengthBytes:
         b MPU_xStreamBufferNextMessageLengthBytesImpl
     MPU_xStreamBufferNextMessageLengthBytes_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes
-        bl MPU_xStreamBufferNextMessageLengthBytesImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
 /* Default weak implementations in case one is not available from
@@ -1532,9 +1316,9 @@ MPU_xTimerIsTimerActiveImpl:
 MPU_xTimerGetTimerDaemonTaskHandleImpl:
     b MPU_xTimerGetTimerDaemonTaskHandleImpl
 
-    PUBWEAK MPU_xTimerGenericCommandImpl
+    PUBWEAK MPU_xTimerGenericCommandPrivImpl
-MPU_xTimerGenericCommandImpl:
+MPU_xTimerGenericCommandPrivImpl:
-    b MPU_xTimerGenericCommandImpl
+    b MPU_xTimerGenericCommandPrivImpl
 
     PUBWEAK MPU_pcTimerGetNameImpl
 MPU_pcTimerGetNameImpl:

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -33,6 +33,9 @@ the code is included in C files but excluded by the preprocessor in assembly
 files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
 #include "FreeRTOSConfig.h"
 
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
 #ifndef configUSE_MPU_WRAPPERS_V1
     #define configUSE_MPU_WRAPPERS_V1 0
 #endif
@@ -45,7 +48,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler.
     EXTERN SecureContext_LoadContext
 #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
     EXTERN vSystemCallEnter
-    EXTERN vSystemCallEnter_1
     EXTERN vSystemCallExit
 #endif
 
@@ -95,7 +97,7 @@ vResetPrivilege:
 /*-----------------------------------------------------------*/
 
 vPortAllocateSecureContext:
-    svc 0                                   /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */
+    svc 100                                 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */
     bx lr                                   /* Return. */
 /*-----------------------------------------------------------*/
 
@@ -230,7 +232,7 @@ vStartFirstTask:
     cpsie i                                 /* Globally enable interrupts. */
     dsb
     isb
-    svc 2                                   /* System call to start the first task. portSVC_START_SCHEDULER = 2. */
+    svc 102                                 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */
 /*-----------------------------------------------------------*/
 
 ulSetInterruptMask:
@@ -482,21 +484,17 @@ SVC_Handler:
         b route_svc
 
     route_svc:
-        ldr r2, [r0, #24]
+        ldr r3, [r0, #24]
-        subs r2, #2
+        subs r3, #2
-        ldrb r3, [r2, #0]
+        ldrb r2, [r3, #0]
-        cmp r3, #4          /* portSVC_SYSTEM_CALL_ENTER. */
+        cmp r2, #NUM_SYSTEM_CALLS
-        beq system_call_enter
+        blt system_call_enter
-        cmp r3, #5          /* portSVC_SYSTEM_CALL_ENTER_1. */
+        cmp r2, #104        /* portSVC_SYSTEM_CALL_EXIT. */
-        beq system_call_enter_1
-        cmp r3, #6          /* portSVC_SYSTEM_CALL_EXIT. */
         beq system_call_exit
         b vPortSVCHandler_C
 
     system_call_enter:
         b vSystemCallEnter
-    system_call_enter_1:
-        b vSystemCallEnter_1
     system_call_exit:
         b vSystemCallExit
 
@@ -523,7 +521,7 @@ vPortFreeSecureContext:
     bne free_secure_context                 /* Branch if r1 != 0. */
     bx lr                                   /* There is no secure context (xSecureContext is NULL). */
     free_secure_context:
-        svc 1                               /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */
+        svc 101                             /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */
         bx lr                               /* Return. */
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -32,15 +32,12 @@
 /*-----------------------------------------------------------*/
 
 #include "FreeRTOSConfig.h"
+#include "mpu_syscall_numbers.h"
 
 #ifndef configUSE_MPU_WRAPPERS_V1
     #define configUSE_MPU_WRAPPERS_V1 0
 #endif
 
-/* These must be in sync with portmacro.h. */
-#define portSVC_SYSTEM_CALL_ENTER   4 /* System calls with upto 4 parameters. */
-#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */
-#define portSVC_SYSTEM_CALL_EXIT    6
 /*-----------------------------------------------------------*/
 
 #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
@@ -57,10 +54,7 @@ MPU_xTaskDelayUntil:
         b MPU_xTaskDelayUntilImpl
     MPU_xTaskDelayUntil_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskDelayUntil
-        bl MPU_xTaskDelayUntilImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskAbortDelay
@@ -75,10 +69,7 @@ MPU_xTaskAbortDelay:
         b MPU_xTaskAbortDelayImpl
     MPU_xTaskAbortDelay_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskAbortDelay
-        bl MPU_xTaskAbortDelayImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskDelay
@@ -93,10 +84,7 @@ MPU_vTaskDelay:
         b MPU_vTaskDelayImpl
     MPU_vTaskDelay_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskDelay
-        bl MPU_vTaskDelayImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskPriorityGet
@@ -111,10 +99,7 @@ MPU_uxTaskPriorityGet:
         b MPU_uxTaskPriorityGetImpl
     MPU_uxTaskPriorityGet_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskPriorityGet
-        bl MPU_uxTaskPriorityGetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_eTaskGetState
@@ -129,10 +114,7 @@ MPU_eTaskGetState:
         b MPU_eTaskGetStateImpl
     MPU_eTaskGetState_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_eTaskGetState
-        bl MPU_eTaskGetStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskGetInfo
@@ -147,10 +129,7 @@ MPU_vTaskGetInfo:
         b MPU_vTaskGetInfoImpl
     MPU_vTaskGetInfo_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskGetInfo
-        bl MPU_vTaskGetInfoImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetIdleTaskHandle
@@ -165,10 +144,7 @@ MPU_xTaskGetIdleTaskHandle:
         b MPU_xTaskGetIdleTaskHandleImpl
     MPU_xTaskGetIdleTaskHandle_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetIdleTaskHandle
-        bl MPU_xTaskGetIdleTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSuspend
@@ -183,10 +159,7 @@ MPU_vTaskSuspend:
         b MPU_vTaskSuspendImpl
     MPU_vTaskSuspend_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSuspend
-        bl MPU_vTaskSuspendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskResume
@@ -201,10 +174,7 @@ MPU_vTaskResume:
         b MPU_vTaskResumeImpl
     MPU_vTaskResume_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskResume
-        bl MPU_vTaskResumeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetTickCount
@@ -219,10 +189,7 @@ MPU_xTaskGetTickCount:
         b MPU_xTaskGetTickCountImpl
     MPU_xTaskGetTickCount_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetTickCount
-        bl MPU_xTaskGetTickCountImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetNumberOfTasks
@@ -237,10 +204,7 @@ MPU_uxTaskGetNumberOfTasks:
         b MPU_uxTaskGetNumberOfTasksImpl
     MPU_uxTaskGetNumberOfTasks_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetNumberOfTasks
-        bl MPU_uxTaskGetNumberOfTasksImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pcTaskGetName
@@ -255,10 +219,7 @@ MPU_pcTaskGetName:
         b MPU_pcTaskGetNameImpl
     MPU_pcTaskGetName_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcTaskGetName
-        bl MPU_pcTaskGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetRunTimeCounter
@@ -273,10 +234,7 @@ MPU_ulTaskGetRunTimeCounter:
         b MPU_ulTaskGetRunTimeCounterImpl
     MPU_ulTaskGetRunTimeCounter_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetRunTimeCounter
-        bl MPU_ulTaskGetRunTimeCounterImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetRunTimePercent
@@ -291,10 +249,7 @@ MPU_ulTaskGetRunTimePercent:
         b MPU_ulTaskGetRunTimePercentImpl
     MPU_ulTaskGetRunTimePercent_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetRunTimePercent
-        bl MPU_ulTaskGetRunTimePercentImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetIdleRunTimePercent
@@ -309,10 +264,7 @@ MPU_ulTaskGetIdleRunTimePercent:
         b MPU_ulTaskGetIdleRunTimePercentImpl
     MPU_ulTaskGetIdleRunTimePercent_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent
-        bl MPU_ulTaskGetIdleRunTimePercentImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetIdleRunTimeCounter
@@ -327,10 +279,7 @@ MPU_ulTaskGetIdleRunTimeCounter:
         b MPU_ulTaskGetIdleRunTimeCounterImpl
     MPU_ulTaskGetIdleRunTimeCounter_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter
-        bl MPU_ulTaskGetIdleRunTimeCounterImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetApplicationTaskTag
@@ -345,10 +294,7 @@ MPU_vTaskSetApplicationTaskTag:
         b MPU_vTaskSetApplicationTaskTagImpl
     MPU_vTaskSetApplicationTaskTag_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetApplicationTaskTag
-        bl MPU_vTaskSetApplicationTaskTagImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetApplicationTaskTag
@@ -363,10 +309,7 @@ MPU_xTaskGetApplicationTaskTag:
         b MPU_xTaskGetApplicationTaskTagImpl
     MPU_xTaskGetApplicationTaskTag_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetApplicationTaskTag
-        bl MPU_xTaskGetApplicationTaskTagImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetThreadLocalStoragePointer
@@ -381,10 +324,7 @@ MPU_vTaskSetThreadLocalStoragePointer:
         b MPU_vTaskSetThreadLocalStoragePointerImpl
     MPU_vTaskSetThreadLocalStoragePointer_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer
-        bl MPU_vTaskSetThreadLocalStoragePointerImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pvTaskGetThreadLocalStoragePointer
@@ -399,10 +339,7 @@ MPU_pvTaskGetThreadLocalStoragePointer:
         b MPU_pvTaskGetThreadLocalStoragePointerImpl
     MPU_pvTaskGetThreadLocalStoragePointer_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer
-        bl MPU_pvTaskGetThreadLocalStoragePointerImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetSystemState
@@ -417,10 +354,7 @@ MPU_uxTaskGetSystemState:
         b MPU_uxTaskGetSystemStateImpl
     MPU_uxTaskGetSystemState_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetSystemState
-        bl MPU_uxTaskGetSystemStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetStackHighWaterMark
@@ -435,10 +369,7 @@ MPU_uxTaskGetStackHighWaterMark:
         b MPU_uxTaskGetStackHighWaterMarkImpl
     MPU_uxTaskGetStackHighWaterMark_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark
-        bl MPU_uxTaskGetStackHighWaterMarkImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetStackHighWaterMark2
@@ -453,10 +384,7 @@ MPU_uxTaskGetStackHighWaterMark2:
         b MPU_uxTaskGetStackHighWaterMark2Impl
     MPU_uxTaskGetStackHighWaterMark2_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2
-        bl MPU_uxTaskGetStackHighWaterMark2Impl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetCurrentTaskHandle
@@ -471,10 +399,7 @@ MPU_xTaskGetCurrentTaskHandle:
         b MPU_xTaskGetCurrentTaskHandleImpl
     MPU_xTaskGetCurrentTaskHandle_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle
-        bl MPU_xTaskGetCurrentTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetSchedulerState
@@ -489,10 +414,7 @@ MPU_xTaskGetSchedulerState:
         b MPU_xTaskGetSchedulerStateImpl
     MPU_xTaskGetSchedulerState_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetSchedulerState
-        bl MPU_xTaskGetSchedulerStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetTimeOutState
@@ -507,10 +429,7 @@ MPU_vTaskSetTimeOutState:
         b MPU_vTaskSetTimeOutStateImpl
     MPU_vTaskSetTimeOutState_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetTimeOutState
-        bl MPU_vTaskSetTimeOutStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskCheckForTimeOut
@@ -525,14 +444,11 @@ MPU_xTaskCheckForTimeOut:
         b MPU_xTaskCheckForTimeOutImpl
     MPU_xTaskCheckForTimeOut_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskCheckForTimeOut
-        bl MPU_xTaskCheckForTimeOutImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTaskGenericNotify
+    PUBLIC MPU_xTaskGenericNotifyEntry
-MPU_xTaskGenericNotify:
+MPU_xTaskGenericNotifyEntry:
     push {r0, r1}
     mrs r0, control
     movs r1, #1
@@ -543,14 +459,11 @@ MPU_xTaskGenericNotify:
         b MPU_xTaskGenericNotifyImpl
     MPU_xTaskGenericNotify_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTaskGenericNotify
-        bl MPU_xTaskGenericNotifyImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTaskGenericNotifyWait
+    PUBLIC MPU_xTaskGenericNotifyWaitEntry
-MPU_xTaskGenericNotifyWait:
+MPU_xTaskGenericNotifyWaitEntry:
     push {r0, r1}
     mrs r0, control
     movs r1, #1
@@ -561,10 +474,7 @@ MPU_xTaskGenericNotifyWait:
         b MPU_xTaskGenericNotifyWaitImpl
     MPU_xTaskGenericNotifyWait_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTaskGenericNotifyWait
-        bl MPU_xTaskGenericNotifyWaitImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGenericNotifyTake
@@ -579,10 +489,7 @@ MPU_ulTaskGenericNotifyTake:
         b MPU_ulTaskGenericNotifyTakeImpl
     MPU_ulTaskGenericNotifyTake_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGenericNotifyTake
-        bl MPU_ulTaskGenericNotifyTakeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGenericNotifyStateClear
@@ -597,10 +504,7 @@ MPU_xTaskGenericNotifyStateClear:
         b MPU_xTaskGenericNotifyStateClearImpl
     MPU_xTaskGenericNotifyStateClear_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGenericNotifyStateClear
-        bl MPU_xTaskGenericNotifyStateClearImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGenericNotifyValueClear
@@ -615,10 +519,7 @@ MPU_ulTaskGenericNotifyValueClear:
         b MPU_ulTaskGenericNotifyValueClearImpl
     MPU_ulTaskGenericNotifyValueClear_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear
-        bl MPU_ulTaskGenericNotifyValueClearImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGenericSend
@@ -633,10 +534,7 @@ MPU_xQueueGenericSend:
         b MPU_xQueueGenericSendImpl
     MPU_xQueueGenericSend_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGenericSend
-        bl MPU_xQueueGenericSendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxQueueMessagesWaiting
@@ -651,10 +549,7 @@ MPU_uxQueueMessagesWaiting:
         b MPU_uxQueueMessagesWaitingImpl
     MPU_uxQueueMessagesWaiting_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxQueueMessagesWaiting
-        bl MPU_uxQueueMessagesWaitingImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxQueueSpacesAvailable
@@ -669,10 +564,7 @@ MPU_uxQueueSpacesAvailable:
         b MPU_uxQueueSpacesAvailableImpl
     MPU_uxQueueSpacesAvailable_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxQueueSpacesAvailable
-        bl MPU_uxQueueSpacesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueReceive
@@ -687,10 +579,7 @@ MPU_xQueueReceive:
         b MPU_xQueueReceiveImpl
     MPU_xQueueReceive_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueReceive
-        bl MPU_xQueueReceiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueuePeek
@@ -705,10 +594,7 @@ MPU_xQueuePeek:
         b MPU_xQueuePeekImpl
     MPU_xQueuePeek_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueuePeek
-        bl MPU_xQueuePeekImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueSemaphoreTake
@@ -723,10 +609,7 @@ MPU_xQueueSemaphoreTake:
         b MPU_xQueueSemaphoreTakeImpl
     MPU_xQueueSemaphoreTake_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueSemaphoreTake
-        bl MPU_xQueueSemaphoreTakeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGetMutexHolder
@@ -741,10 +624,7 @@ MPU_xQueueGetMutexHolder:
         b MPU_xQueueGetMutexHolderImpl
     MPU_xQueueGetMutexHolder_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGetMutexHolder
-        bl MPU_xQueueGetMutexHolderImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueTakeMutexRecursive
@@ -759,10 +639,7 @@ MPU_xQueueTakeMutexRecursive:
         b MPU_xQueueTakeMutexRecursiveImpl
     MPU_xQueueTakeMutexRecursive_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueTakeMutexRecursive
-        bl MPU_xQueueTakeMutexRecursiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGiveMutexRecursive
@@ -777,10 +654,7 @@ MPU_xQueueGiveMutexRecursive:
         b MPU_xQueueGiveMutexRecursiveImpl
     MPU_xQueueGiveMutexRecursive_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGiveMutexRecursive
-        bl MPU_xQueueGiveMutexRecursiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueSelectFromSet
@@ -795,10 +669,7 @@ MPU_xQueueSelectFromSet:
         b MPU_xQueueSelectFromSetImpl
     MPU_xQueueSelectFromSet_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueSelectFromSet
-        bl MPU_xQueueSelectFromSetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueAddToSet
@@ -813,10 +684,7 @@ MPU_xQueueAddToSet:
         b MPU_xQueueAddToSetImpl
     MPU_xQueueAddToSet_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueAddToSet
-        bl MPU_xQueueAddToSetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vQueueAddToRegistry
@@ -831,10 +699,7 @@ MPU_vQueueAddToRegistry:
         b MPU_vQueueAddToRegistryImpl
     MPU_vQueueAddToRegistry_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vQueueAddToRegistry
-        bl MPU_vQueueAddToRegistryImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vQueueUnregisterQueue
@@ -849,10 +714,7 @@ MPU_vQueueUnregisterQueue:
         b MPU_vQueueUnregisterQueueImpl
     MPU_vQueueUnregisterQueue_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vQueueUnregisterQueue
-        bl MPU_vQueueUnregisterQueueImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pcQueueGetName
@@ -867,10 +729,7 @@ MPU_pcQueueGetName:
         b MPU_pcQueueGetNameImpl
     MPU_pcQueueGetName_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcQueueGetName
-        bl MPU_pcQueueGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pvTimerGetTimerID
@@ -885,10 +744,7 @@ MPU_pvTimerGetTimerID:
         b MPU_pvTimerGetTimerIDImpl
     MPU_pvTimerGetTimerID_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pvTimerGetTimerID
-        bl MPU_pvTimerGetTimerIDImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTimerSetTimerID
@@ -903,10 +759,7 @@ MPU_vTimerSetTimerID:
         b MPU_vTimerSetTimerIDImpl
     MPU_vTimerSetTimerID_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTimerSetTimerID
-        bl MPU_vTimerSetTimerIDImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerIsTimerActive
@@ -921,10 +774,7 @@ MPU_xTimerIsTimerActive:
         b MPU_xTimerIsTimerActiveImpl
     MPU_xTimerIsTimerActive_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerIsTimerActive
-        bl MPU_xTimerIsTimerActiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetTimerDaemonTaskHandle
@@ -939,14 +789,11 @@ MPU_xTimerGetTimerDaemonTaskHandle:
         b MPU_xTimerGetTimerDaemonTaskHandleImpl
     MPU_xTimerGetTimerDaemonTaskHandle_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle
-        bl MPU_xTimerGetTimerDaemonTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTimerGenericCommand
+    PUBLIC MPU_xTimerGenericCommandEntry
-MPU_xTimerGenericCommand:
+MPU_xTimerGenericCommandEntry:
     push {r0, r1}
     /* This function can be called from ISR also and therefore, we need a check
      * to take privileged path, if called from ISR. */
@@ -959,13 +806,10 @@ MPU_xTimerGenericCommand:
     beq MPU_xTimerGenericCommand_Priv
     MPU_xTimerGenericCommand_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTimerGenericCommand
-        bl MPU_xTimerGenericCommandImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
     MPU_xTimerGenericCommand_Priv:
         pop {r0, r1}
-        b MPU_xTimerGenericCommandImpl
+        b MPU_xTimerGenericCommandPrivImpl
 
 /*-----------------------------------------------------------*/
 
@@ -981,10 +825,7 @@ MPU_pcTimerGetName:
         b MPU_pcTimerGetNameImpl
     MPU_pcTimerGetName_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcTimerGetName
-        bl MPU_pcTimerGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTimerSetReloadMode
@@ -999,10 +840,7 @@ MPU_vTimerSetReloadMode:
         b MPU_vTimerSetReloadModeImpl
     MPU_vTimerSetReloadMode_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTimerSetReloadMode
-        bl MPU_vTimerSetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetReloadMode
@@ -1017,10 +855,7 @@ MPU_xTimerGetReloadMode:
         b MPU_xTimerGetReloadModeImpl
     MPU_xTimerGetReloadMode_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetReloadMode
-        bl MPU_xTimerGetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTimerGetReloadMode
@@ -1035,10 +870,7 @@ MPU_uxTimerGetReloadMode:
         b MPU_uxTimerGetReloadModeImpl
     MPU_uxTimerGetReloadMode_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTimerGetReloadMode
-        bl MPU_uxTimerGetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetPeriod
@@ -1053,10 +885,7 @@ MPU_xTimerGetPeriod:
         b MPU_xTimerGetPeriodImpl
     MPU_xTimerGetPeriod_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetPeriod
-        bl MPU_xTimerGetPeriodImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetExpiryTime
@@ -1071,14 +900,11 @@ MPU_xTimerGetExpiryTime:
         b MPU_xTimerGetExpiryTimeImpl
     MPU_xTimerGetExpiryTime_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetExpiryTime
-        bl MPU_xTimerGetExpiryTimeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xEventGroupWaitBits
+    PUBLIC MPU_xEventGroupWaitBitsEntry
-MPU_xEventGroupWaitBits:
+MPU_xEventGroupWaitBitsEntry:
     push {r0, r1}
     mrs r0, control
     movs r1, #1
@@ -1089,10 +915,7 @@ MPU_xEventGroupWaitBits:
         b MPU_xEventGroupWaitBitsImpl
     MPU_xEventGroupWaitBits_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xEventGroupWaitBits
-        bl MPU_xEventGroupWaitBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupClearBits
@@ -1107,10 +930,7 @@ MPU_xEventGroupClearBits:
         b MPU_xEventGroupClearBitsImpl
     MPU_xEventGroupClearBits_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupClearBits
-        bl MPU_xEventGroupClearBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupSetBits
@@ -1125,10 +945,7 @@ MPU_xEventGroupSetBits:
         b MPU_xEventGroupSetBitsImpl
     MPU_xEventGroupSetBits_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupSetBits
-        bl MPU_xEventGroupSetBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupSync
@@ -1143,10 +960,7 @@ MPU_xEventGroupSync:
         b MPU_xEventGroupSyncImpl
     MPU_xEventGroupSync_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupSync
-        bl MPU_xEventGroupSyncImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxEventGroupGetNumber
@@ -1161,10 +975,7 @@ MPU_uxEventGroupGetNumber:
         b MPU_uxEventGroupGetNumberImpl
     MPU_uxEventGroupGetNumber_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxEventGroupGetNumber
-        bl MPU_uxEventGroupGetNumberImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vEventGroupSetNumber
@@ -1179,10 +990,7 @@ MPU_vEventGroupSetNumber:
         b MPU_vEventGroupSetNumberImpl
     MPU_vEventGroupSetNumber_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vEventGroupSetNumber
-        bl MPU_vEventGroupSetNumberImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSend
@@ -1197,10 +1005,7 @@ MPU_xStreamBufferSend:
         b MPU_xStreamBufferSendImpl
     MPU_xStreamBufferSend_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSend
-        bl MPU_xStreamBufferSendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferReceive
@@ -1215,10 +1020,7 @@ MPU_xStreamBufferReceive:
         b MPU_xStreamBufferReceiveImpl
     MPU_xStreamBufferReceive_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferReceive
-        bl MPU_xStreamBufferReceiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferIsFull
@@ -1233,10 +1035,7 @@ MPU_xStreamBufferIsFull:
         b MPU_xStreamBufferIsFullImpl
     MPU_xStreamBufferIsFull_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferIsFull
-        bl MPU_xStreamBufferIsFullImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferIsEmpty
@@ -1251,10 +1050,7 @@ MPU_xStreamBufferIsEmpty:
         b MPU_xStreamBufferIsEmptyImpl
     MPU_xStreamBufferIsEmpty_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferIsEmpty
-        bl MPU_xStreamBufferIsEmptyImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSpacesAvailable
@@ -1269,10 +1065,7 @@ MPU_xStreamBufferSpacesAvailable:
         b MPU_xStreamBufferSpacesAvailableImpl
     MPU_xStreamBufferSpacesAvailable_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSpacesAvailable
-        bl MPU_xStreamBufferSpacesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferBytesAvailable
@@ -1287,10 +1080,7 @@ MPU_xStreamBufferBytesAvailable:
         b MPU_xStreamBufferBytesAvailableImpl
     MPU_xStreamBufferBytesAvailable_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferBytesAvailable
-        bl MPU_xStreamBufferBytesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSetTriggerLevel
@@ -1305,10 +1095,7 @@ MPU_xStreamBufferSetTriggerLevel:
         b MPU_xStreamBufferSetTriggerLevelImpl
     MPU_xStreamBufferSetTriggerLevel_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel
-        bl MPU_xStreamBufferSetTriggerLevelImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferNextMessageLengthBytes
@@ -1323,10 +1110,7 @@ MPU_xStreamBufferNextMessageLengthBytes:
         b MPU_xStreamBufferNextMessageLengthBytesImpl
     MPU_xStreamBufferNextMessageLengthBytes_Unpriv:
         pop {r0, r1}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes
-        bl MPU_xStreamBufferNextMessageLengthBytesImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
 /* Default weak implementations in case one is not available from
@@ -1532,9 +1316,9 @@ MPU_xTimerIsTimerActiveImpl:
 MPU_xTimerGetTimerDaemonTaskHandleImpl:
     b MPU_xTimerGetTimerDaemonTaskHandleImpl
 
-    PUBWEAK MPU_xTimerGenericCommandImpl
+    PUBWEAK MPU_xTimerGenericCommandPrivImpl
-MPU_xTimerGenericCommandImpl:
+MPU_xTimerGenericCommandPrivImpl:
-    b MPU_xTimerGenericCommandImpl
+    b MPU_xTimerGenericCommandPrivImpl
 
     PUBWEAK MPU_pcTimerGetNameImpl
 MPU_pcTimerGetNameImpl:

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly
 files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
 #include "FreeRTOSConfig.h"
 
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
 #ifndef configUSE_MPU_WRAPPERS_V1
     #define configUSE_MPU_WRAPPERS_V1 0
 #endif
@@ -41,7 +44,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler.
     EXTERN vPortSVCHandler_C
 #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
     EXTERN vSystemCallEnter
-    EXTERN vSystemCallEnter_1
     EXTERN vSystemCallExit
 #endif
 
@@ -216,7 +218,7 @@ vStartFirstTask:
     cpsie i                                 /* Globally enable interrupts. */
     dsb
     isb
-    svc 2                                   /* System call to start the first task. portSVC_START_SCHEDULER = 2. */
+    svc 102                                 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */
     nop
 /*-----------------------------------------------------------*/
 
@@ -401,21 +403,17 @@ SVC_Handler:
         b route_svc
 
     route_svc:
-        ldr r2, [r0, #24]
+        ldr r3, [r0, #24]
-        subs r2, #2
+        subs r3, #2
-        ldrb r3, [r2, #0]
+        ldrb r2, [r3, #0]
-        cmp r3, #4          /* portSVC_SYSTEM_CALL_ENTER. */
+        cmp r2, #NUM_SYSTEM_CALLS
-        beq system_call_enter
+        blt system_call_enter
-        cmp r3, #5          /* portSVC_SYSTEM_CALL_ENTER_1. */
+        cmp r2, #104        /* portSVC_SYSTEM_CALL_EXIT. */
-        beq system_call_enter_1
-        cmp r3, #6          /* portSVC_SYSTEM_CALL_EXIT. */
         beq system_call_exit
         b vPortSVCHandler_C
 
     system_call_enter:
         b vSystemCallEnter
-    system_call_enter_1:
-        b vSystemCallEnter_1
     system_call_exit:
         b vSystemCallExit
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -32,15 +32,12 @@
 /*-----------------------------------------------------------*/
 
 #include "FreeRTOSConfig.h"
+#include "mpu_syscall_numbers.h"
 
 #ifndef configUSE_MPU_WRAPPERS_V1
     #define configUSE_MPU_WRAPPERS_V1 0
 #endif
 
-/* These must be in sync with portmacro.h. */
-#define portSVC_SYSTEM_CALL_ENTER   4 /* System calls with upto 4 parameters. */
-#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */
-#define portSVC_SYSTEM_CALL_EXIT    6
 /*-----------------------------------------------------------*/
 
 #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
@@ -56,10 +53,7 @@ MPU_xTaskDelayUntil:
         b MPU_xTaskDelayUntilImpl
     MPU_xTaskDelayUntil_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskDelayUntil
-        bl MPU_xTaskDelayUntilImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskAbortDelay
@@ -73,10 +67,7 @@ MPU_xTaskAbortDelay:
         b MPU_xTaskAbortDelayImpl
     MPU_xTaskAbortDelay_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskAbortDelay
-        bl MPU_xTaskAbortDelayImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskDelay
@@ -90,10 +81,7 @@ MPU_vTaskDelay:
         b MPU_vTaskDelayImpl
     MPU_vTaskDelay_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskDelay
-        bl MPU_vTaskDelayImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskPriorityGet
@@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet:
         b MPU_uxTaskPriorityGetImpl
     MPU_uxTaskPriorityGet_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskPriorityGet
-        bl MPU_uxTaskPriorityGetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_eTaskGetState
@@ -124,10 +109,7 @@ MPU_eTaskGetState:
         b MPU_eTaskGetStateImpl
     MPU_eTaskGetState_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_eTaskGetState
-        bl MPU_eTaskGetStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskGetInfo
@@ -141,10 +123,7 @@ MPU_vTaskGetInfo:
         b MPU_vTaskGetInfoImpl
     MPU_vTaskGetInfo_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskGetInfo
-        bl MPU_vTaskGetInfoImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetIdleTaskHandle
@@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle:
         b MPU_xTaskGetIdleTaskHandleImpl
     MPU_xTaskGetIdleTaskHandle_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetIdleTaskHandle
-        bl MPU_xTaskGetIdleTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSuspend
@@ -175,10 +151,7 @@ MPU_vTaskSuspend:
         b MPU_vTaskSuspendImpl
     MPU_vTaskSuspend_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSuspend
-        bl MPU_vTaskSuspendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskResume
@@ -192,10 +165,7 @@ MPU_vTaskResume:
         b MPU_vTaskResumeImpl
     MPU_vTaskResume_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskResume
-        bl MPU_vTaskResumeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetTickCount
@@ -209,10 +179,7 @@ MPU_xTaskGetTickCount:
         b MPU_xTaskGetTickCountImpl
     MPU_xTaskGetTickCount_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetTickCount
-        bl MPU_xTaskGetTickCountImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetNumberOfTasks
@@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks:
         b MPU_uxTaskGetNumberOfTasksImpl
     MPU_uxTaskGetNumberOfTasks_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetNumberOfTasks
-        bl MPU_uxTaskGetNumberOfTasksImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pcTaskGetName
@@ -243,10 +207,7 @@ MPU_pcTaskGetName:
         b MPU_pcTaskGetNameImpl
     MPU_pcTaskGetName_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcTaskGetName
-        bl MPU_pcTaskGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetRunTimeCounter
@@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter:
         b MPU_ulTaskGetRunTimeCounterImpl
     MPU_ulTaskGetRunTimeCounter_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetRunTimeCounter
-        bl MPU_ulTaskGetRunTimeCounterImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetRunTimePercent
@@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent:
         b MPU_ulTaskGetRunTimePercentImpl
     MPU_ulTaskGetRunTimePercent_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetRunTimePercent
-        bl MPU_ulTaskGetRunTimePercentImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetIdleRunTimePercent
@@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent:
         b MPU_ulTaskGetIdleRunTimePercentImpl
     MPU_ulTaskGetIdleRunTimePercent_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent
-        bl MPU_ulTaskGetIdleRunTimePercentImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetIdleRunTimeCounter
@@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter:
         b MPU_ulTaskGetIdleRunTimeCounterImpl
     MPU_ulTaskGetIdleRunTimeCounter_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter
-        bl MPU_ulTaskGetIdleRunTimeCounterImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetApplicationTaskTag
@@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag:
         b MPU_vTaskSetApplicationTaskTagImpl
     MPU_vTaskSetApplicationTaskTag_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetApplicationTaskTag
-        bl MPU_vTaskSetApplicationTaskTagImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetApplicationTaskTag
@@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag:
         b MPU_xTaskGetApplicationTaskTagImpl
     MPU_xTaskGetApplicationTaskTag_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetApplicationTaskTag
-        bl MPU_xTaskGetApplicationTaskTagImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetThreadLocalStoragePointer
@@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer:
         b MPU_vTaskSetThreadLocalStoragePointerImpl
     MPU_vTaskSetThreadLocalStoragePointer_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer
-        bl MPU_vTaskSetThreadLocalStoragePointerImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pvTaskGetThreadLocalStoragePointer
@@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer:
         b MPU_pvTaskGetThreadLocalStoragePointerImpl
     MPU_pvTaskGetThreadLocalStoragePointer_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer
-        bl MPU_pvTaskGetThreadLocalStoragePointerImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetSystemState
@@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState:
         b MPU_uxTaskGetSystemStateImpl
     MPU_uxTaskGetSystemState_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetSystemState
-        bl MPU_uxTaskGetSystemStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetStackHighWaterMark
@@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark:
         b MPU_uxTaskGetStackHighWaterMarkImpl
     MPU_uxTaskGetStackHighWaterMark_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark
-        bl MPU_uxTaskGetStackHighWaterMarkImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetStackHighWaterMark2
@@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2:
         b MPU_uxTaskGetStackHighWaterMark2Impl
     MPU_uxTaskGetStackHighWaterMark2_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2
-        bl MPU_uxTaskGetStackHighWaterMark2Impl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetCurrentTaskHandle
@@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle:
         b MPU_xTaskGetCurrentTaskHandleImpl
     MPU_xTaskGetCurrentTaskHandle_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle
-        bl MPU_xTaskGetCurrentTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetSchedulerState
@@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState:
         b MPU_xTaskGetSchedulerStateImpl
     MPU_xTaskGetSchedulerState_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetSchedulerState
-        bl MPU_xTaskGetSchedulerStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetTimeOutState
@@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState:
         b MPU_vTaskSetTimeOutStateImpl
     MPU_vTaskSetTimeOutState_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetTimeOutState
-        bl MPU_vTaskSetTimeOutStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskCheckForTimeOut
@@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut:
         b MPU_xTaskCheckForTimeOutImpl
     MPU_xTaskCheckForTimeOut_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskCheckForTimeOut
-        bl MPU_xTaskCheckForTimeOutImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTaskGenericNotify
+    PUBLIC MPU_xTaskGenericNotifyEntry
-MPU_xTaskGenericNotify:
+MPU_xTaskGenericNotifyEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
@@ -515,14 +431,11 @@ MPU_xTaskGenericNotify:
         b MPU_xTaskGenericNotifyImpl
     MPU_xTaskGenericNotify_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTaskGenericNotify
-        bl MPU_xTaskGenericNotifyImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTaskGenericNotifyWait
+    PUBLIC MPU_xTaskGenericNotifyWaitEntry
-MPU_xTaskGenericNotifyWait:
+MPU_xTaskGenericNotifyWaitEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
@@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait:
         b MPU_xTaskGenericNotifyWaitImpl
     MPU_xTaskGenericNotifyWait_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTaskGenericNotifyWait
-        bl MPU_xTaskGenericNotifyWaitImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGenericNotifyTake
@@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake:
         b MPU_ulTaskGenericNotifyTakeImpl
     MPU_ulTaskGenericNotifyTake_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGenericNotifyTake
-        bl MPU_ulTaskGenericNotifyTakeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGenericNotifyStateClear
@@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear:
         b MPU_xTaskGenericNotifyStateClearImpl
     MPU_xTaskGenericNotifyStateClear_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGenericNotifyStateClear
-        bl MPU_xTaskGenericNotifyStateClearImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGenericNotifyValueClear
@@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear:
         b MPU_ulTaskGenericNotifyValueClearImpl
     MPU_ulTaskGenericNotifyValueClear_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear
-        bl MPU_ulTaskGenericNotifyValueClearImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGenericSend
@@ -600,10 +501,7 @@ MPU_xQueueGenericSend:
         b MPU_xQueueGenericSendImpl
     MPU_xQueueGenericSend_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGenericSend
-        bl MPU_xQueueGenericSendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxQueueMessagesWaiting
@@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting:
         b MPU_uxQueueMessagesWaitingImpl
     MPU_uxQueueMessagesWaiting_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxQueueMessagesWaiting
-        bl MPU_uxQueueMessagesWaitingImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxQueueSpacesAvailable
@@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable:
         b MPU_uxQueueSpacesAvailableImpl
     MPU_uxQueueSpacesAvailable_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxQueueSpacesAvailable
-        bl MPU_uxQueueSpacesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueReceive
@@ -651,10 +543,7 @@ MPU_xQueueReceive:
         b MPU_xQueueReceiveImpl
     MPU_xQueueReceive_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueReceive
-        bl MPU_xQueueReceiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueuePeek
@@ -668,10 +557,7 @@ MPU_xQueuePeek:
         b MPU_xQueuePeekImpl
     MPU_xQueuePeek_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueuePeek
-        bl MPU_xQueuePeekImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueSemaphoreTake
@@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake:
         b MPU_xQueueSemaphoreTakeImpl
     MPU_xQueueSemaphoreTake_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueSemaphoreTake
-        bl MPU_xQueueSemaphoreTakeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGetMutexHolder
@@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder:
         b MPU_xQueueGetMutexHolderImpl
     MPU_xQueueGetMutexHolder_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGetMutexHolder
-        bl MPU_xQueueGetMutexHolderImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueTakeMutexRecursive
@@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive:
         b MPU_xQueueTakeMutexRecursiveImpl
     MPU_xQueueTakeMutexRecursive_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueTakeMutexRecursive
-        bl MPU_xQueueTakeMutexRecursiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGiveMutexRecursive
@@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive:
         b MPU_xQueueGiveMutexRecursiveImpl
     MPU_xQueueGiveMutexRecursive_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGiveMutexRecursive
-        bl MPU_xQueueGiveMutexRecursiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueSelectFromSet
@@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet:
         b MPU_xQueueSelectFromSetImpl
     MPU_xQueueSelectFromSet_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueSelectFromSet
-        bl MPU_xQueueSelectFromSetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueAddToSet
@@ -770,10 +641,7 @@ MPU_xQueueAddToSet:
         b MPU_xQueueAddToSetImpl
     MPU_xQueueAddToSet_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueAddToSet
-        bl MPU_xQueueAddToSetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vQueueAddToRegistry
@@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry:
         b MPU_vQueueAddToRegistryImpl
     MPU_vQueueAddToRegistry_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vQueueAddToRegistry
-        bl MPU_vQueueAddToRegistryImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vQueueUnregisterQueue
@@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue:
         b MPU_vQueueUnregisterQueueImpl
     MPU_vQueueUnregisterQueue_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vQueueUnregisterQueue
-        bl MPU_vQueueUnregisterQueueImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pcQueueGetName
@@ -821,10 +683,7 @@ MPU_pcQueueGetName:
         b MPU_pcQueueGetNameImpl
     MPU_pcQueueGetName_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcQueueGetName
-        bl MPU_pcQueueGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pvTimerGetTimerID
@@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID:
         b MPU_pvTimerGetTimerIDImpl
     MPU_pvTimerGetTimerID_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pvTimerGetTimerID
-        bl MPU_pvTimerGetTimerIDImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTimerSetTimerID
@@ -855,10 +711,7 @@ MPU_vTimerSetTimerID:
         b MPU_vTimerSetTimerIDImpl
     MPU_vTimerSetTimerID_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTimerSetTimerID
-        bl MPU_vTimerSetTimerIDImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerIsTimerActive
@@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive:
         b MPU_xTimerIsTimerActiveImpl
     MPU_xTimerIsTimerActive_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerIsTimerActive
-        bl MPU_xTimerIsTimerActiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetTimerDaemonTaskHandle
@@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle:
         b MPU_xTimerGetTimerDaemonTaskHandleImpl
     MPU_xTimerGetTimerDaemonTaskHandle_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle
-        bl MPU_xTimerGetTimerDaemonTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTimerGenericCommand
+    PUBLIC MPU_xTimerGenericCommandEntry
-MPU_xTimerGenericCommand:
+MPU_xTimerGenericCommandEntry:
     push {r0}
     /* This function can be called from ISR also and therefore, we need a check
      * to take privileged path, if called from ISR. */
@@ -908,13 +755,10 @@ MPU_xTimerGenericCommand:
     beq MPU_xTimerGenericCommand_Priv
     MPU_xTimerGenericCommand_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTimerGenericCommand
-        bl MPU_xTimerGenericCommandImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
     MPU_xTimerGenericCommand_Priv:
         pop {r0}
-        b MPU_xTimerGenericCommandImpl
+        b MPU_xTimerGenericCommandPrivImpl
 
 /*-----------------------------------------------------------*/
 
@@ -929,10 +773,7 @@ MPU_pcTimerGetName:
         b MPU_pcTimerGetNameImpl
     MPU_pcTimerGetName_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcTimerGetName
-        bl MPU_pcTimerGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTimerSetReloadMode
@@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode:
         b MPU_vTimerSetReloadModeImpl
     MPU_vTimerSetReloadMode_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTimerSetReloadMode
-        bl MPU_vTimerSetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetReloadMode
@@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode:
         b MPU_xTimerGetReloadModeImpl
     MPU_xTimerGetReloadMode_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetReloadMode
-        bl MPU_xTimerGetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTimerGetReloadMode
@@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode:
         b MPU_uxTimerGetReloadModeImpl
     MPU_uxTimerGetReloadMode_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTimerGetReloadMode
-        bl MPU_uxTimerGetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetPeriod
@@ -997,10 +829,7 @@ MPU_xTimerGetPeriod:
         b MPU_xTimerGetPeriodImpl
     MPU_xTimerGetPeriod_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetPeriod
-        bl MPU_xTimerGetPeriodImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetExpiryTime
@@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime:
         b MPU_xTimerGetExpiryTimeImpl
     MPU_xTimerGetExpiryTime_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetExpiryTime
-        bl MPU_xTimerGetExpiryTimeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xEventGroupWaitBits
+    PUBLIC MPU_xEventGroupWaitBitsEntry
-MPU_xEventGroupWaitBits:
+MPU_xEventGroupWaitBitsEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
@@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits:
         b MPU_xEventGroupWaitBitsImpl
     MPU_xEventGroupWaitBits_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xEventGroupWaitBits
-        bl MPU_xEventGroupWaitBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupClearBits
@@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits:
         b MPU_xEventGroupClearBitsImpl
     MPU_xEventGroupClearBits_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupClearBits
-        bl MPU_xEventGroupClearBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupSetBits
@@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits:
         b MPU_xEventGroupSetBitsImpl
     MPU_xEventGroupSetBits_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupSetBits
-        bl MPU_xEventGroupSetBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupSync
@@ -1082,10 +899,7 @@ MPU_xEventGroupSync:
         b MPU_xEventGroupSyncImpl
     MPU_xEventGroupSync_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupSync
-        bl MPU_xEventGroupSyncImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxEventGroupGetNumber
@@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber:
         b MPU_uxEventGroupGetNumberImpl
     MPU_uxEventGroupGetNumber_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxEventGroupGetNumber
-        bl MPU_uxEventGroupGetNumberImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vEventGroupSetNumber
@@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber:
         b MPU_vEventGroupSetNumberImpl
     MPU_vEventGroupSetNumber_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vEventGroupSetNumber
-        bl MPU_vEventGroupSetNumberImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSend
@@ -1133,10 +941,7 @@ MPU_xStreamBufferSend:
         b MPU_xStreamBufferSendImpl
     MPU_xStreamBufferSend_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSend
-        bl MPU_xStreamBufferSendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferReceive
@@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive:
         b MPU_xStreamBufferReceiveImpl
     MPU_xStreamBufferReceive_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferReceive
-        bl MPU_xStreamBufferReceiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferIsFull
@@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull:
         b MPU_xStreamBufferIsFullImpl
     MPU_xStreamBufferIsFull_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferIsFull
-        bl MPU_xStreamBufferIsFullImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferIsEmpty
@@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty:
         b MPU_xStreamBufferIsEmptyImpl
     MPU_xStreamBufferIsEmpty_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferIsEmpty
-        bl MPU_xStreamBufferIsEmptyImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSpacesAvailable
@@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable:
         b MPU_xStreamBufferSpacesAvailableImpl
     MPU_xStreamBufferSpacesAvailable_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSpacesAvailable
-        bl MPU_xStreamBufferSpacesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferBytesAvailable
@@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable:
         b MPU_xStreamBufferBytesAvailableImpl
     MPU_xStreamBufferBytesAvailable_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferBytesAvailable
-        bl MPU_xStreamBufferBytesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSetTriggerLevel
@@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel:
         b MPU_xStreamBufferSetTriggerLevelImpl
     MPU_xStreamBufferSetTriggerLevel_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel
-        bl MPU_xStreamBufferSetTriggerLevelImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferNextMessageLengthBytes
@@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes:
         b MPU_xStreamBufferNextMessageLengthBytesImpl
     MPU_xStreamBufferNextMessageLengthBytes_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes
-        bl MPU_xStreamBufferNextMessageLengthBytesImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
 /* Default weak implementations in case one is not available from
@@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl:
 MPU_xTimerGetTimerDaemonTaskHandleImpl:
     b MPU_xTimerGetTimerDaemonTaskHandleImpl
 
-    PUBWEAK MPU_xTimerGenericCommandImpl
+    PUBWEAK MPU_xTimerGenericCommandPrivImpl
-MPU_xTimerGenericCommandImpl:
+MPU_xTimerGenericCommandPrivImpl:
-    b MPU_xTimerGenericCommandImpl
+    b MPU_xTimerGenericCommandPrivImpl
 
     PUBWEAK MPU_pcTimerGetNameImpl
 MPU_pcTimerGetNameImpl:

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly
 files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
 #include "FreeRTOSConfig.h"
 
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
 #ifndef configUSE_MPU_WRAPPERS_V1
     #define configUSE_MPU_WRAPPERS_V1 0
 #endif
@@ -44,7 +47,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler.
     EXTERN SecureContext_LoadContext
 #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
     EXTERN vSystemCallEnter
-    EXTERN vSystemCallEnter_1
     EXTERN vSystemCallExit
 #endif
 
@@ -86,7 +88,7 @@ vResetPrivilege:
 /*-----------------------------------------------------------*/
 
 vPortAllocateSecureContext:
-    svc 0                                   /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */
+    svc 100                                 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */
     bx lr                                   /* Return. */
 /*-----------------------------------------------------------*/
 
@@ -205,7 +207,7 @@ vStartFirstTask:
     cpsie f
     dsb
     isb
-    svc 2                                   /* System call to start the first task. portSVC_START_SCHEDULER = 2. */
+    svc 102                                 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */
 /*-----------------------------------------------------------*/
 
 ulSetInterruptMask:
@@ -455,11 +457,9 @@ SVC_Handler:
 
     ldr r1, [r0, #24]
     ldrb r2, [r1, #-2]
-    cmp r2, #4          /* portSVC_SYSTEM_CALL_ENTER. */
+    cmp r2, #NUM_SYSTEM_CALLS
-    beq syscall_enter
+    blt syscall_enter
-    cmp r2, #5          /* portSVC_SYSTEM_CALL_ENTER_1. */
+    cmp r2, #104            /* portSVC_SYSTEM_CALL_EXIT. */
-    beq syscall_enter_1
-    cmp r2, #6          /* portSVC_SYSTEM_CALL_EXIT. */
     beq syscall_exit
     b vPortSVCHandler_C
 
@@ -467,10 +467,6 @@ SVC_Handler:
         mov r1, lr
         b vSystemCallEnter
 
-    syscall_enter_1:
-        mov r1, lr
-        b vSystemCallEnter_1
-
     syscall_exit:
         mov r1, lr
         b vSystemCallExit
@@ -493,7 +489,7 @@ vPortFreeSecureContext:
     ldr r1, [r2]                            /* The first item on the stack is the task's xSecureContext. */
     cmp r1, #0                              /* Raise svc if task's xSecureContext is not NULL. */
     it ne
-    svcne 1                                 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */
+    svcne 101                               /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */
     bx lr                                   /* Return. */
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -32,15 +32,12 @@
 /*-----------------------------------------------------------*/
 
 #include "FreeRTOSConfig.h"
+#include "mpu_syscall_numbers.h"
 
 #ifndef configUSE_MPU_WRAPPERS_V1
     #define configUSE_MPU_WRAPPERS_V1 0
 #endif
 
-/* These must be in sync with portmacro.h. */
-#define portSVC_SYSTEM_CALL_ENTER   4 /* System calls with upto 4 parameters. */
-#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */
-#define portSVC_SYSTEM_CALL_EXIT    6
 /*-----------------------------------------------------------*/
 
 #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
@@ -56,10 +53,7 @@ MPU_xTaskDelayUntil:
         b MPU_xTaskDelayUntilImpl
     MPU_xTaskDelayUntil_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskDelayUntil
-        bl MPU_xTaskDelayUntilImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskAbortDelay
@@ -73,10 +67,7 @@ MPU_xTaskAbortDelay:
         b MPU_xTaskAbortDelayImpl
     MPU_xTaskAbortDelay_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskAbortDelay
-        bl MPU_xTaskAbortDelayImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskDelay
@@ -90,10 +81,7 @@ MPU_vTaskDelay:
         b MPU_vTaskDelayImpl
     MPU_vTaskDelay_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskDelay
-        bl MPU_vTaskDelayImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskPriorityGet
@@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet:
         b MPU_uxTaskPriorityGetImpl
     MPU_uxTaskPriorityGet_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskPriorityGet
-        bl MPU_uxTaskPriorityGetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_eTaskGetState
@@ -124,10 +109,7 @@ MPU_eTaskGetState:
         b MPU_eTaskGetStateImpl
     MPU_eTaskGetState_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_eTaskGetState
-        bl MPU_eTaskGetStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskGetInfo
@@ -141,10 +123,7 @@ MPU_vTaskGetInfo:
         b MPU_vTaskGetInfoImpl
     MPU_vTaskGetInfo_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskGetInfo
-        bl MPU_vTaskGetInfoImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetIdleTaskHandle
@@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle:
         b MPU_xTaskGetIdleTaskHandleImpl
     MPU_xTaskGetIdleTaskHandle_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetIdleTaskHandle
-        bl MPU_xTaskGetIdleTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSuspend
@@ -175,10 +151,7 @@ MPU_vTaskSuspend:
         b MPU_vTaskSuspendImpl
     MPU_vTaskSuspend_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSuspend
-        bl MPU_vTaskSuspendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskResume
@@ -192,10 +165,7 @@ MPU_vTaskResume:
         b MPU_vTaskResumeImpl
     MPU_vTaskResume_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskResume
-        bl MPU_vTaskResumeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetTickCount
@@ -209,10 +179,7 @@ MPU_xTaskGetTickCount:
         b MPU_xTaskGetTickCountImpl
     MPU_xTaskGetTickCount_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetTickCount
-        bl MPU_xTaskGetTickCountImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetNumberOfTasks
@@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks:
         b MPU_uxTaskGetNumberOfTasksImpl
     MPU_uxTaskGetNumberOfTasks_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetNumberOfTasks
-        bl MPU_uxTaskGetNumberOfTasksImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pcTaskGetName
@@ -243,10 +207,7 @@ MPU_pcTaskGetName:
         b MPU_pcTaskGetNameImpl
     MPU_pcTaskGetName_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcTaskGetName
-        bl MPU_pcTaskGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetRunTimeCounter
@@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter:
         b MPU_ulTaskGetRunTimeCounterImpl
     MPU_ulTaskGetRunTimeCounter_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetRunTimeCounter
-        bl MPU_ulTaskGetRunTimeCounterImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetRunTimePercent
@@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent:
         b MPU_ulTaskGetRunTimePercentImpl
     MPU_ulTaskGetRunTimePercent_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetRunTimePercent
-        bl MPU_ulTaskGetRunTimePercentImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetIdleRunTimePercent
@@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent:
         b MPU_ulTaskGetIdleRunTimePercentImpl
     MPU_ulTaskGetIdleRunTimePercent_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent
-        bl MPU_ulTaskGetIdleRunTimePercentImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGetIdleRunTimeCounter
@@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter:
         b MPU_ulTaskGetIdleRunTimeCounterImpl
     MPU_ulTaskGetIdleRunTimeCounter_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter
-        bl MPU_ulTaskGetIdleRunTimeCounterImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetApplicationTaskTag
@@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag:
         b MPU_vTaskSetApplicationTaskTagImpl
     MPU_vTaskSetApplicationTaskTag_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetApplicationTaskTag
-        bl MPU_vTaskSetApplicationTaskTagImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetApplicationTaskTag
@@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag:
         b MPU_xTaskGetApplicationTaskTagImpl
     MPU_xTaskGetApplicationTaskTag_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetApplicationTaskTag
-        bl MPU_xTaskGetApplicationTaskTagImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetThreadLocalStoragePointer
@@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer:
         b MPU_vTaskSetThreadLocalStoragePointerImpl
     MPU_vTaskSetThreadLocalStoragePointer_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer
-        bl MPU_vTaskSetThreadLocalStoragePointerImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pvTaskGetThreadLocalStoragePointer
@@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer:
         b MPU_pvTaskGetThreadLocalStoragePointerImpl
     MPU_pvTaskGetThreadLocalStoragePointer_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer
-        bl MPU_pvTaskGetThreadLocalStoragePointerImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetSystemState
@@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState:
         b MPU_uxTaskGetSystemStateImpl
     MPU_uxTaskGetSystemState_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetSystemState
-        bl MPU_uxTaskGetSystemStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetStackHighWaterMark
@@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark:
         b MPU_uxTaskGetStackHighWaterMarkImpl
     MPU_uxTaskGetStackHighWaterMark_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark
-        bl MPU_uxTaskGetStackHighWaterMarkImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTaskGetStackHighWaterMark2
@@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2:
         b MPU_uxTaskGetStackHighWaterMark2Impl
     MPU_uxTaskGetStackHighWaterMark2_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2
-        bl MPU_uxTaskGetStackHighWaterMark2Impl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetCurrentTaskHandle
@@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle:
         b MPU_xTaskGetCurrentTaskHandleImpl
     MPU_xTaskGetCurrentTaskHandle_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle
-        bl MPU_xTaskGetCurrentTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGetSchedulerState
@@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState:
         b MPU_xTaskGetSchedulerStateImpl
     MPU_xTaskGetSchedulerState_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGetSchedulerState
-        bl MPU_xTaskGetSchedulerStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTaskSetTimeOutState
@@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState:
         b MPU_vTaskSetTimeOutStateImpl
     MPU_vTaskSetTimeOutState_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTaskSetTimeOutState
-        bl MPU_vTaskSetTimeOutStateImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskCheckForTimeOut
@@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut:
         b MPU_xTaskCheckForTimeOutImpl
     MPU_xTaskCheckForTimeOut_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskCheckForTimeOut
-        bl MPU_xTaskCheckForTimeOutImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTaskGenericNotify
+    PUBLIC MPU_xTaskGenericNotifyEntry
-MPU_xTaskGenericNotify:
+MPU_xTaskGenericNotifyEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
@@ -515,14 +431,11 @@ MPU_xTaskGenericNotify:
         b MPU_xTaskGenericNotifyImpl
     MPU_xTaskGenericNotify_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTaskGenericNotify
-        bl MPU_xTaskGenericNotifyImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTaskGenericNotifyWait
+    PUBLIC MPU_xTaskGenericNotifyWaitEntry
-MPU_xTaskGenericNotifyWait:
+MPU_xTaskGenericNotifyWaitEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
@@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait:
         b MPU_xTaskGenericNotifyWaitImpl
     MPU_xTaskGenericNotifyWait_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTaskGenericNotifyWait
-        bl MPU_xTaskGenericNotifyWaitImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGenericNotifyTake
@@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake:
         b MPU_ulTaskGenericNotifyTakeImpl
     MPU_ulTaskGenericNotifyTake_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGenericNotifyTake
-        bl MPU_ulTaskGenericNotifyTakeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTaskGenericNotifyStateClear
@@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear:
         b MPU_xTaskGenericNotifyStateClearImpl
     MPU_xTaskGenericNotifyStateClear_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTaskGenericNotifyStateClear
-        bl MPU_xTaskGenericNotifyStateClearImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_ulTaskGenericNotifyValueClear
@@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear:
         b MPU_ulTaskGenericNotifyValueClearImpl
     MPU_ulTaskGenericNotifyValueClear_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear
-        bl MPU_ulTaskGenericNotifyValueClearImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGenericSend
@@ -600,10 +501,7 @@ MPU_xQueueGenericSend:
         b MPU_xQueueGenericSendImpl
     MPU_xQueueGenericSend_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGenericSend
-        bl MPU_xQueueGenericSendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxQueueMessagesWaiting
@@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting:
         b MPU_uxQueueMessagesWaitingImpl
     MPU_uxQueueMessagesWaiting_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxQueueMessagesWaiting
-        bl MPU_uxQueueMessagesWaitingImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxQueueSpacesAvailable
@@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable:
         b MPU_uxQueueSpacesAvailableImpl
     MPU_uxQueueSpacesAvailable_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxQueueSpacesAvailable
-        bl MPU_uxQueueSpacesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueReceive
@@ -651,10 +543,7 @@ MPU_xQueueReceive:
         b MPU_xQueueReceiveImpl
     MPU_xQueueReceive_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueReceive
-        bl MPU_xQueueReceiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueuePeek
@@ -668,10 +557,7 @@ MPU_xQueuePeek:
         b MPU_xQueuePeekImpl
     MPU_xQueuePeek_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueuePeek
-        bl MPU_xQueuePeekImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueSemaphoreTake
@@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake:
         b MPU_xQueueSemaphoreTakeImpl
     MPU_xQueueSemaphoreTake_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueSemaphoreTake
-        bl MPU_xQueueSemaphoreTakeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGetMutexHolder
@@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder:
         b MPU_xQueueGetMutexHolderImpl
     MPU_xQueueGetMutexHolder_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGetMutexHolder
-        bl MPU_xQueueGetMutexHolderImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueTakeMutexRecursive
@@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive:
         b MPU_xQueueTakeMutexRecursiveImpl
     MPU_xQueueTakeMutexRecursive_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueTakeMutexRecursive
-        bl MPU_xQueueTakeMutexRecursiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueGiveMutexRecursive
@@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive:
         b MPU_xQueueGiveMutexRecursiveImpl
     MPU_xQueueGiveMutexRecursive_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueGiveMutexRecursive
-        bl MPU_xQueueGiveMutexRecursiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueSelectFromSet
@@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet:
         b MPU_xQueueSelectFromSetImpl
     MPU_xQueueSelectFromSet_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueSelectFromSet
-        bl MPU_xQueueSelectFromSetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xQueueAddToSet
@@ -770,10 +641,7 @@ MPU_xQueueAddToSet:
         b MPU_xQueueAddToSetImpl
     MPU_xQueueAddToSet_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xQueueAddToSet
-        bl MPU_xQueueAddToSetImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vQueueAddToRegistry
@@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry:
         b MPU_vQueueAddToRegistryImpl
     MPU_vQueueAddToRegistry_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vQueueAddToRegistry
-        bl MPU_vQueueAddToRegistryImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vQueueUnregisterQueue
@@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue:
         b MPU_vQueueUnregisterQueueImpl
     MPU_vQueueUnregisterQueue_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vQueueUnregisterQueue
-        bl MPU_vQueueUnregisterQueueImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pcQueueGetName
@@ -821,10 +683,7 @@ MPU_pcQueueGetName:
         b MPU_pcQueueGetNameImpl
     MPU_pcQueueGetName_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcQueueGetName
-        bl MPU_pcQueueGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_pvTimerGetTimerID
@@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID:
         b MPU_pvTimerGetTimerIDImpl
     MPU_pvTimerGetTimerID_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pvTimerGetTimerID
-        bl MPU_pvTimerGetTimerIDImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTimerSetTimerID
@@ -855,10 +711,7 @@ MPU_vTimerSetTimerID:
         b MPU_vTimerSetTimerIDImpl
     MPU_vTimerSetTimerID_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTimerSetTimerID
-        bl MPU_vTimerSetTimerIDImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerIsTimerActive
@@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive:
         b MPU_xTimerIsTimerActiveImpl
     MPU_xTimerIsTimerActive_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerIsTimerActive
-        bl MPU_xTimerIsTimerActiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetTimerDaemonTaskHandle
@@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle:
         b MPU_xTimerGetTimerDaemonTaskHandleImpl
     MPU_xTimerGetTimerDaemonTaskHandle_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle
-        bl MPU_xTimerGetTimerDaemonTaskHandleImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xTimerGenericCommand
+    PUBLIC MPU_xTimerGenericCommandEntry
-MPU_xTimerGenericCommand:
+MPU_xTimerGenericCommandEntry:
     push {r0}
     /* This function can be called from ISR also and therefore, we need a check
      * to take privileged path, if called from ISR. */
@@ -908,13 +755,10 @@ MPU_xTimerGenericCommand:
     beq MPU_xTimerGenericCommand_Priv
     MPU_xTimerGenericCommand_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xTimerGenericCommand
-        bl MPU_xTimerGenericCommandImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
     MPU_xTimerGenericCommand_Priv:
         pop {r0}
-        b MPU_xTimerGenericCommandImpl
+        b MPU_xTimerGenericCommandPrivImpl
 
 /*-----------------------------------------------------------*/
 
@@ -929,10 +773,7 @@ MPU_pcTimerGetName:
         b MPU_pcTimerGetNameImpl
     MPU_pcTimerGetName_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_pcTimerGetName
-        bl MPU_pcTimerGetNameImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vTimerSetReloadMode
@@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode:
         b MPU_vTimerSetReloadModeImpl
     MPU_vTimerSetReloadMode_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vTimerSetReloadMode
-        bl MPU_vTimerSetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetReloadMode
@@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode:
         b MPU_xTimerGetReloadModeImpl
     MPU_xTimerGetReloadMode_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetReloadMode
-        bl MPU_xTimerGetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxTimerGetReloadMode
@@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode:
         b MPU_uxTimerGetReloadModeImpl
     MPU_uxTimerGetReloadMode_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxTimerGetReloadMode
-        bl MPU_uxTimerGetReloadModeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetPeriod
@@ -997,10 +829,7 @@ MPU_xTimerGetPeriod:
         b MPU_xTimerGetPeriodImpl
     MPU_xTimerGetPeriod_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetPeriod
-        bl MPU_xTimerGetPeriodImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xTimerGetExpiryTime
@@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime:
         b MPU_xTimerGetExpiryTimeImpl
     MPU_xTimerGetExpiryTime_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xTimerGetExpiryTime
-        bl MPU_xTimerGetExpiryTimeImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
-    PUBLIC MPU_xEventGroupWaitBits
+    PUBLIC MPU_xEventGroupWaitBitsEntry
-MPU_xEventGroupWaitBits:
+MPU_xEventGroupWaitBitsEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
@@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits:
         b MPU_xEventGroupWaitBitsImpl
     MPU_xEventGroupWaitBits_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER_1
+        svc #SYSTEM_CALL_xEventGroupWaitBits
-        bl MPU_xEventGroupWaitBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupClearBits
@@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits:
         b MPU_xEventGroupClearBitsImpl
     MPU_xEventGroupClearBits_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupClearBits
-        bl MPU_xEventGroupClearBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupSetBits
@@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits:
         b MPU_xEventGroupSetBitsImpl
     MPU_xEventGroupSetBits_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupSetBits
-        bl MPU_xEventGroupSetBitsImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xEventGroupSync
@@ -1082,10 +899,7 @@ MPU_xEventGroupSync:
         b MPU_xEventGroupSyncImpl
     MPU_xEventGroupSync_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xEventGroupSync
-        bl MPU_xEventGroupSyncImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_uxEventGroupGetNumber
@@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber:
         b MPU_uxEventGroupGetNumberImpl
     MPU_uxEventGroupGetNumber_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_uxEventGroupGetNumber
-        bl MPU_uxEventGroupGetNumberImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_vEventGroupSetNumber
@@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber:
         b MPU_vEventGroupSetNumberImpl
     MPU_vEventGroupSetNumber_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_vEventGroupSetNumber
-        bl MPU_vEventGroupSetNumberImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSend
@@ -1133,10 +941,7 @@ MPU_xStreamBufferSend:
         b MPU_xStreamBufferSendImpl
     MPU_xStreamBufferSend_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSend
-        bl MPU_xStreamBufferSendImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferReceive
@@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive:
         b MPU_xStreamBufferReceiveImpl
     MPU_xStreamBufferReceive_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferReceive
-        bl MPU_xStreamBufferReceiveImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferIsFull
@@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull:
         b MPU_xStreamBufferIsFullImpl
     MPU_xStreamBufferIsFull_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferIsFull
-        bl MPU_xStreamBufferIsFullImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferIsEmpty
@@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty:
         b MPU_xStreamBufferIsEmptyImpl
     MPU_xStreamBufferIsEmpty_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferIsEmpty
-        bl MPU_xStreamBufferIsEmptyImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSpacesAvailable
@@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable:
         b MPU_xStreamBufferSpacesAvailableImpl
     MPU_xStreamBufferSpacesAvailable_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSpacesAvailable
-        bl MPU_xStreamBufferSpacesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferBytesAvailable
@@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable:
         b MPU_xStreamBufferBytesAvailableImpl
     MPU_xStreamBufferBytesAvailable_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferBytesAvailable
-        bl MPU_xStreamBufferBytesAvailableImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferSetTriggerLevel
@@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel:
         b MPU_xStreamBufferSetTriggerLevelImpl
     MPU_xStreamBufferSetTriggerLevel_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel
-        bl MPU_xStreamBufferSetTriggerLevelImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
     PUBLIC MPU_xStreamBufferNextMessageLengthBytes
@@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes:
         b MPU_xStreamBufferNextMessageLengthBytesImpl
     MPU_xStreamBufferNextMessageLengthBytes_Unpriv:
         pop {r0}
-        svc #portSVC_SYSTEM_CALL_ENTER
+        svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes
-        bl MPU_xStreamBufferNextMessageLengthBytesImpl
-        svc #portSVC_SYSTEM_CALL_EXIT
-        bx lr
 /*-----------------------------------------------------------*/
 
 /* Default weak implementations in case one is not available from
@@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl:
 MPU_xTimerGetTimerDaemonTaskHandleImpl:
     b MPU_xTimerGetTimerDaemonTaskHandleImpl
 
-    PUBWEAK MPU_xTimerGenericCommandImpl
+    PUBWEAK MPU_xTimerGenericCommandPrivImpl
-MPU_xTimerGenericCommandImpl:
+MPU_xTimerGenericCommandPrivImpl:
-    b MPU_xTimerGenericCommandImpl
+    b MPU_xTimerGenericCommandPrivImpl
 
     PUBWEAK MPU_pcTimerGetNameImpl
 MPU_pcTimerGetNameImpl:

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly
 files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
 #include "FreeRTOSConfig.h"
 
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
 #ifndef configUSE_MPU_WRAPPERS_V1
     #define configUSE_MPU_WRAPPERS_V1 0
 #endif
@@ -41,7 +44,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler.
     EXTERN vPortSVCHandler_C
 #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
     EXTERN vSystemCallEnter
-    EXTERN vSystemCallEnter_1
     EXTERN vSystemCallExit
 #endif
 
@@ -191,7 +193,7 @@ vStartFirstTask:
     cpsie f
     dsb
     isb
-    svc 2                                   /* System call to start the first task. portSVC_START_SCHEDULER = 2. */
+    svc 102                                 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */
 /*-----------------------------------------------------------*/
 
 ulSetInterruptMask:
@@ -371,11 +373,9 @@ SVC_Handler:
 
     ldr r1, [r0, #24]
     ldrb r2, [r1, #-2]
-    cmp r2, #4          /* portSVC_SYSTEM_CALL_ENTER. */
+    cmp r2, #NUM_SYSTEM_CALLS
-    beq syscall_enter
+    blt syscall_enter
-    cmp r2, #5          /* portSVC_SYSTEM_CALL_ENTER_1. */
+    cmp r2, #104            /* portSVC_SYSTEM_CALL_EXIT. */
-    beq syscall_enter_1
-    cmp r2, #6          /* portSVC_SYSTEM_CALL_EXIT. */
     beq syscall_exit
     b vPortSVCHandler_C
 
@@ -383,10 +383,6 @@ SVC_Handler:
         mov r1, lr
         b vSystemCallEnter
 
-    syscall_enter_1:
-        mov r1, lr
-        b vSystemCallEnter_1
-
     syscall_exit:
         mov r1, lr
         b vSystemCallExit

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portasm.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/non_secure/portmacrocommon.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
     #define portSTACK_FRAME_HAS_PADDING_FLAG     ( 1UL << 0UL )
     #define portTASK_IS_PRIVILEGED_FLAG          ( 1UL << 1UL )
 
+/* Size of an Access Control List (ACL) entry in bits. */
+    #define portACL_ENTRY_SIZE_BITS             ( 32U )
+
     typedef struct MPU_SETTINGS
     {
         uint32_t ulMAIR0;                                              /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
@@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
 
         #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
             xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo;
+            #if ( configENABLE_ACCESS_CONTROL_LIST == 1 )
+                uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ];
+            #endif
         #endif
     } xMPU_SETTINGS;
 
@@ -316,13 +322,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
 /**
  * @brief SVC numbers.
  */
-#define portSVC_ALLOCATE_SECURE_CONTEXT    0
+#define portSVC_ALLOCATE_SECURE_CONTEXT    100
-#define portSVC_FREE_SECURE_CONTEXT        1
+#define portSVC_FREE_SECURE_CONTEXT        101
-#define portSVC_START_SCHEDULER            2
+#define portSVC_START_SCHEDULER            102
-#define portSVC_RAISE_PRIVILEGE            3
+#define portSVC_RAISE_PRIVILEGE            103
-#define portSVC_SYSTEM_CALL_ENTER          4   /* System calls with upto 4 parameters. */
+#define portSVC_SYSTEM_CALL_EXIT           104
-#define portSVC_SYSTEM_CALL_ENTER_1        5   /* System calls with 5 parameters. */
+#define portSVC_YIELD                      105
-#define portSVC_SYSTEM_CALL_EXIT           6
 /*-----------------------------------------------------------*/
 
 /**

portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/secure/context/secure_context.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/secure/context/secure_context.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/secure/heap/secure_heap.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/secure/heap/secure_heap.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/secure/init/secure_init.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/secure/init/secure_init.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/ARMv8M/secure/macros/secure_port_macros.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/BCC/16BitDOS/Flsh186/port.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/BCC/16BitDOS/Flsh186/prtmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/BCC/16BitDOS/PC/port.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/BCC/16BitDOS/PC/prtmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/BCC/16BitDOS/common/portasm.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/BCC/16BitDOS/common/portcomn.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/CCS/ARM_CM3/port.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/CCS/ARM_CM3/portasm.asm

@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+; * FreeRTOS Kernel V10.6.2
 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * SPDX-License-Identifier: MIT

portable/CCS/ARM_CM3/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/CCS/ARM_CM4F/port.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/CCS/ARM_CM4F/portasm.asm

@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+; * FreeRTOS Kernel V10.6.2
 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * SPDX-License-Identifier: MIT

portable/CCS/ARM_CM4F/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/CCS/ARM_Cortex-R4/port.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/CCS/ARM_Cortex-R4/portASM.asm

@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+; * FreeRTOS Kernel V10.6.2
 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * SPDX-License-Identifier: MIT

portable/CCS/ARM_Cortex-R4/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/CCS/MSP430X/data_model.h

@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+; * FreeRTOS Kernel V10.6.2
 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * SPDX-License-Identifier: MIT

portable/CCS/MSP430X/port.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/CCS/MSP430X/portext.asm

@@ -1,5 +1,5 @@
 ;/*
-; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+; * FreeRTOS Kernel V10.6.2
 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 ; *
 ; * SPDX-License-Identifier: MIT

portable/CCS/MSP430X/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/CodeWarrior/ColdFire_V1/port.c

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/CodeWarrior/ColdFire_V1/portasm.S

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT

portable/CodeWarrior/ColdFire_V1/portmacro.h

@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
+ * FreeRTOS Kernel V10.6.2
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT