From 81a2a656d16b2cb9fdb4dc23a28ab2b277007105 Mon Sep 17 00:00:00 2001 From: kar-rahul-aws Date: Thu, 13 Jul 2023 11:45:30 +0000 Subject: [PATCH 01/21] [AUTO][RELEASE]: Bump task.h version macros to "10.6.0" --- include/task.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/task.h b/include/task.h index af17ced17..6af61f3a5 100644 --- a/include/task.h +++ b/include/task.h @@ -53,10 +53,10 @@ * The tskKERNEL_VERSION_MAJOR, tskKERNEL_VERSION_MINOR, tskKERNEL_VERSION_BUILD * values will reflect the last released version number. */ -#define tskKERNEL_VERSION_NUMBER "V10.4.4+" +#define tskKERNEL_VERSION_NUMBER "V10.6.0" #define tskKERNEL_VERSION_MAJOR 10 -#define tskKERNEL_VERSION_MINOR 4 -#define tskKERNEL_VERSION_BUILD 4 +#define tskKERNEL_VERSION_MINOR 6 +#define tskKERNEL_VERSION_BUILD 0 /* MPU region parameters passed in ulParameters * of MemoryRegion_t struct. */ From aec827831ac2ab932c8b914e9b106fdfd2ba4269 Mon Sep 17 00:00:00 2001 From: kar-rahul-aws Date: Thu, 13 Jul 2023 11:45:32 +0000 Subject: [PATCH 02/21] [AUTO][RELEASE]: Bump file header version to "10.6.0" --- .github/scripts/kernel_checker.py | 4 ++-- croutine.c | 2 +- event_groups.c | 2 +- include/FreeRTOS.h | 2 +- include/StackMacros.h | 2 +- include/atomic.h | 2 +- include/croutine.h | 2 +- include/deprecated_definitions.h | 2 +- include/event_groups.h | 2 +- include/list.h | 2 +- include/message_buffer.h | 2 +- include/mpu_prototypes.h | 2 +- include/mpu_wrappers.h | 2 +- include/newlib-freertos.h | 2 +- include/picolibc-freertos.h | 2 +- include/portable.h | 2 +- include/projdefs.h | 2 +- include/queue.h | 2 +- include/semphr.h | 2 +- include/stack_macros.h | 2 +- include/stdint.readme | 2 +- include/stream_buffer.h | 2 +- include/task.h | 2 +- include/timers.h | 2 +- list.c | 2 +- portable/ARMv8M/copy_files.py | 2 +- portable/ARMv8M/non_secure/port.c | 2 +- .../non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h | 2 +- .../portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h | 2 +- .../non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h | 2 +- .../portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h | 2 +- .../non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h | 2 +- .../portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h | 2 +- .../non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h | 2 +- .../portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h | 2 +- portable/ARMv8M/non_secure/portasm.h | 2 +- portable/ARMv8M/non_secure/portmacrocommon.h | 2 +- .../context/portable/GCC/ARM_CM23/secure_context_port.c | 2 +- .../context/portable/GCC/ARM_CM33/secure_context_port.c | 2 +- .../context/portable/IAR/ARM_CM23/secure_context_port_asm.s | 2 +- .../context/portable/IAR/ARM_CM33/secure_context_port_asm.s | 2 +- portable/ARMv8M/secure/context/secure_context.c | 2 +- portable/ARMv8M/secure/context/secure_context.h | 2 +- portable/ARMv8M/secure/heap/secure_heap.c | 2 +- portable/ARMv8M/secure/heap/secure_heap.h | 2 +- portable/ARMv8M/secure/init/secure_init.c | 2 +- portable/ARMv8M/secure/init/secure_init.h | 2 +- portable/ARMv8M/secure/macros/secure_port_macros.h | 2 +- portable/BCC/16BitDOS/Flsh186/port.c | 2 +- portable/BCC/16BitDOS/Flsh186/prtmacro.h | 2 +- portable/BCC/16BitDOS/PC/port.c | 2 +- portable/BCC/16BitDOS/PC/prtmacro.h | 2 +- portable/BCC/16BitDOS/common/portasm.h | 2 +- portable/BCC/16BitDOS/common/portcomn.c | 2 +- portable/CCS/ARM_CM3/port.c | 2 +- portable/CCS/ARM_CM3/portasm.asm | 2 +- portable/CCS/ARM_CM3/portmacro.h | 2 +- portable/CCS/ARM_CM4F/port.c | 2 +- portable/CCS/ARM_CM4F/portasm.asm | 2 +- portable/CCS/ARM_CM4F/portmacro.h | 2 +- portable/CCS/ARM_Cortex-R4/port.c | 2 +- portable/CCS/ARM_Cortex-R4/portASM.asm | 2 +- portable/CCS/ARM_Cortex-R4/portmacro.h | 2 +- portable/CCS/MSP430X/data_model.h | 2 +- portable/CCS/MSP430X/port.c | 2 +- portable/CCS/MSP430X/portext.asm | 2 +- portable/CCS/MSP430X/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V1/port.c | 2 +- portable/CodeWarrior/ColdFire_V1/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V1/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V2/port.c | 2 +- portable/CodeWarrior/ColdFire_V2/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V2/portmacro.h | 2 +- portable/CodeWarrior/HCS12/port.c | 2 +- portable/CodeWarrior/HCS12/portmacro.h | 2 +- portable/Common/mpu_wrappers.c | 2 +- portable/Common/mpu_wrappers_v2.c | 2 +- portable/GCC/ARM7_AT91FR40008/port.c | 2 +- portable/GCC/ARM7_AT91FR40008/portISR.c | 2 +- portable/GCC/ARM7_AT91FR40008/portmacro.h | 2 +- portable/GCC/ARM7_AT91SAM7S/port.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portISR.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portmacro.h | 2 +- portable/GCC/ARM7_LPC2000/port.c | 2 +- portable/GCC/ARM7_LPC2000/portISR.c | 2 +- portable/GCC/ARM7_LPC2000/portmacro.h | 2 +- portable/GCC/ARM7_LPC23xx/port.c | 2 +- portable/GCC/ARM7_LPC23xx/portISR.c | 2 +- portable/GCC/ARM7_LPC23xx/portmacro.h | 2 +- portable/GCC/ARM_CA53_64_BIT/port.c | 2 +- portable/GCC/ARM_CA53_64_BIT/portASM.S | 2 +- portable/GCC/ARM_CA53_64_BIT/portmacro.h | 2 +- portable/GCC/ARM_CA53_64_BIT_SRE/port.c | 2 +- portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S | 2 +- portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h | 2 +- portable/GCC/ARM_CA9/port.c | 2 +- portable/GCC/ARM_CA9/portASM.S | 2 +- portable/GCC/ARM_CA9/portmacro.h | 2 +- portable/GCC/ARM_CM0/port.c | 2 +- portable/GCC/ARM_CM0/portmacro.h | 2 +- portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM23/non_secure/port.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM23/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context.c | 2 +- portable/GCC/ARM_CM23/secure/secure_context.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM23/secure/secure_init.c | 2 +- portable/GCC/ARM_CM23/secure/secure_init.h | 2 +- portable/GCC/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM3/port.c | 2 +- portable/GCC/ARM_CM3/portmacro.h | 2 +- portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM33/non_secure/port.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM33/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context.c | 2 +- portable/GCC/ARM_CM33/secure/secure_context.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM33/secure/secure_init.c | 2 +- portable/GCC/ARM_CM33/secure/secure_init.h | 2 +- portable/GCC/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM35P/non_secure/port.c | 2 +- portable/GCC/ARM_CM35P/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM35P/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM35P/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_context.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_context.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_init.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_init.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM3_MPU/port.c | 2 +- portable/GCC/ARM_CM3_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM4F/port.c | 2 +- portable/GCC/ARM_CM4F/portmacro.h | 2 +- portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM4_MPU/port.c | 2 +- portable/GCC/ARM_CM4_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM55/non_secure/port.c | 2 +- portable/GCC/ARM_CM55/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM55/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM55/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM55/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM55/secure/secure_context.c | 2 +- portable/GCC/ARM_CM55/secure/secure_context.h | 2 +- portable/GCC/ARM_CM55/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM55/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM55/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM55/secure/secure_init.c | 2 +- portable/GCC/ARM_CM55/secure/secure_init.h | 2 +- portable/GCC/ARM_CM55/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM7/r0p1/port.c | 2 +- portable/GCC/ARM_CM7/r0p1/portmacro.h | 2 +- portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM85/non_secure/port.c | 2 +- portable/GCC/ARM_CM85/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM85/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM85/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM85/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM85/secure/secure_context.c | 2 +- portable/GCC/ARM_CM85/secure/secure_context.h | 2 +- portable/GCC/ARM_CM85/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM85/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM85/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM85/secure/secure_init.c | 2 +- portable/GCC/ARM_CM85/secure/secure_init.h | 2 +- portable/GCC/ARM_CM85/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CR5/port.c | 2 +- portable/GCC/ARM_CR5/portASM.S | 2 +- portable/GCC/ARM_CR5/portmacro.h | 2 +- portable/GCC/ARM_CRx_No_GIC/port.c | 2 +- portable/GCC/ARM_CRx_No_GIC/portASM.S | 2 +- portable/GCC/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/GCC/ATMega323/port.c | 2 +- portable/GCC/ATMega323/portmacro.h | 2 +- portable/GCC/AVR32_UC3/exception.S | 2 +- portable/GCC/AVR32_UC3/port.c | 2 +- portable/GCC/AVR32_UC3/portmacro.h | 2 +- portable/GCC/CORTUS_APS3/port.c | 2 +- portable/GCC/CORTUS_APS3/portmacro.h | 2 +- portable/GCC/ColdFire_V2/port.c | 2 +- portable/GCC/ColdFire_V2/portasm.S | 2 +- portable/GCC/ColdFire_V2/portmacro.h | 2 +- portable/GCC/H8S2329/port.c | 2 +- portable/GCC/H8S2329/portmacro.h | 2 +- portable/GCC/HCS12/port.c | 2 +- portable/GCC/HCS12/portmacro.h | 2 +- portable/GCC/IA32_flat/ISR_Support.h | 2 +- portable/GCC/IA32_flat/port.c | 2 +- portable/GCC/IA32_flat/portASM.S | 2 +- portable/GCC/IA32_flat/portmacro.h | 2 +- portable/GCC/MSP430F449/port.c | 2 +- portable/GCC/MSP430F449/portmacro.h | 2 +- portable/GCC/MicroBlaze/port.c | 2 +- portable/GCC/MicroBlaze/portasm.s | 2 +- portable/GCC/MicroBlaze/portmacro.h | 2 +- portable/GCC/MicroBlazeV8/port.c | 2 +- portable/GCC/MicroBlazeV8/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV8/portasm.S | 2 +- portable/GCC/MicroBlazeV8/portmacro.h | 2 +- portable/GCC/MicroBlazeV9/port.c | 2 +- portable/GCC/MicroBlazeV9/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV9/portasm.S | 2 +- portable/GCC/MicroBlazeV9/portmacro.h | 2 +- portable/GCC/NiosII/port.c | 2 +- portable/GCC/NiosII/port_asm.S | 2 +- portable/GCC/NiosII/portmacro.h | 2 +- portable/GCC/PPC405_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC405_Xilinx/port.c | 2 +- portable/GCC/PPC405_Xilinx/portasm.S | 2 +- portable/GCC/PPC405_Xilinx/portmacro.h | 2 +- portable/GCC/PPC440_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC440_Xilinx/port.c | 2 +- portable/GCC/PPC440_Xilinx/portasm.S | 2 +- portable/GCC/PPC440_Xilinx/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/GCC/RISC-V/port.c | 2 +- portable/GCC/RISC-V/portASM.S | 2 +- portable/GCC/RISC-V/portContext.h | 2 +- portable/GCC/RISC-V/portmacro.h | 2 +- portable/GCC/RL78/isr_support.h | 2 +- portable/GCC/RL78/port.c | 2 +- portable/GCC/RL78/portasm.S | 2 +- portable/GCC/RL78/portmacro.h | 2 +- portable/GCC/RX100/port.c | 2 +- portable/GCC/RX100/portmacro.h | 2 +- portable/GCC/RX200/port.c | 2 +- portable/GCC/RX200/portmacro.h | 2 +- portable/GCC/RX600/port.c | 2 +- portable/GCC/RX600/portmacro.h | 2 +- portable/GCC/RX600v2/port.c | 2 +- portable/GCC/RX600v2/portmacro.h | 2 +- portable/GCC/RX700v3_DPFPU/port.c | 2 +- portable/GCC/RX700v3_DPFPU/portmacro.h | 2 +- portable/GCC/STR75x/port.c | 2 +- portable/GCC/STR75x/portISR.c | 2 +- portable/GCC/STR75x/portmacro.h | 2 +- portable/GCC/TriCore_1782/port.c | 2 +- portable/GCC/TriCore_1782/portmacro.h | 2 +- portable/GCC/TriCore_1782/porttrap.c | 2 +- portable/IAR/78K0R/ISR_Support.h | 2 +- portable/IAR/78K0R/port.c | 2 +- portable/IAR/78K0R/portasm.s26 | 2 +- portable/IAR/78K0R/portmacro.h | 2 +- portable/IAR/ARM_CA5_No_GIC/port.c | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.h | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CA5_No_GIC/portmacro.h | 2 +- portable/IAR/ARM_CA9/port.c | 2 +- portable/IAR/ARM_CA9/portASM.h | 2 +- portable/IAR/ARM_CA9/portASM.s | 2 +- portable/IAR/ARM_CA9/portmacro.h | 2 +- portable/IAR/ARM_CM0/port.c | 2 +- portable/IAR/ARM_CM0/portasm.s | 2 +- portable/IAR/ARM_CM0/portmacro.h | 2 +- portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM23/non_secure/port.c | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM23/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context.c | 2 +- portable/IAR/ARM_CM23/secure/secure_context.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM23/secure/secure_init.c | 2 +- portable/IAR/ARM_CM23/secure/secure_init.h | 2 +- portable/IAR/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM3/port.c | 2 +- portable/IAR/ARM_CM3/portasm.s | 2 +- portable/IAR/ARM_CM3/portmacro.h | 2 +- portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM33/non_secure/port.c | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM33/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context.c | 2 +- portable/IAR/ARM_CM33/secure/secure_context.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM33/secure/secure_init.c | 2 +- portable/IAR/ARM_CM33/secure/secure_init.h | 2 +- portable/IAR/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM35P/non_secure/port.c | 2 +- portable/IAR/ARM_CM35P/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM35P/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM35P/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_context.c | 2 +- portable/IAR/ARM_CM35P/secure/secure_context.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM35P/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM35P/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_init.c | 2 +- portable/IAR/ARM_CM35P/secure/secure_init.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM4F/port.c | 2 +- portable/IAR/ARM_CM4F/portasm.s | 2 +- portable/IAR/ARM_CM4F/portmacro.h | 2 +- portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM4F_MPU/port.c | 2 +- portable/IAR/ARM_CM4F_MPU/portasm.s | 2 +- portable/IAR/ARM_CM4F_MPU/portmacro.h | 2 +- portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM55/non_secure/port.c | 2 +- portable/IAR/ARM_CM55/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM55/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM55/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM55/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM55/secure/secure_context.c | 2 +- portable/IAR/ARM_CM55/secure/secure_context.h | 2 +- portable/IAR/ARM_CM55/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM55/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM55/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM55/secure/secure_init.c | 2 +- portable/IAR/ARM_CM55/secure/secure_init.h | 2 +- portable/IAR/ARM_CM55/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM7/r0p1/port.c | 2 +- portable/IAR/ARM_CM7/r0p1/portasm.s | 2 +- portable/IAR/ARM_CM7/r0p1/portmacro.h | 2 +- portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM85/non_secure/port.c | 2 +- portable/IAR/ARM_CM85/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM85/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM85/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM85/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM85/secure/secure_context.c | 2 +- portable/IAR/ARM_CM85/secure/secure_context.h | 2 +- portable/IAR/ARM_CM85/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM85/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM85/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM85/secure/secure_init.c | 2 +- portable/IAR/ARM_CM85/secure/secure_init.h | 2 +- portable/IAR/ARM_CM85/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CRx_No_GIC/port.c | 2 +- portable/IAR/ARM_CRx_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/IAR/ATMega323/port.c | 2 +- portable/IAR/ATMega323/portmacro.h | 2 +- portable/IAR/ATMega323/portmacro.s90 | 2 +- portable/IAR/AVR32_UC3/exception.s82 | 2 +- portable/IAR/AVR32_UC3/port.c | 2 +- portable/IAR/AVR32_UC3/portmacro.h | 2 +- portable/IAR/AVR32_UC3/read.c | 2 +- portable/IAR/AVR32_UC3/write.c | 2 +- portable/IAR/AVR_AVRDx/port.c | 2 +- portable/IAR/AVR_AVRDx/porthardware.h | 2 +- portable/IAR/AVR_AVRDx/portmacro.h | 2 +- portable/IAR/AVR_AVRDx/portmacro.s90 | 2 +- portable/IAR/AVR_Mega0/port.c | 2 +- portable/IAR/AVR_Mega0/porthardware.h | 2 +- portable/IAR/AVR_Mega0/portmacro.h | 2 +- portable/IAR/AVR_Mega0/portmacro.s90 | 2 +- portable/IAR/AtmelSAM7S64/ISR_Support.h | 2 +- portable/IAR/AtmelSAM7S64/port.c | 2 +- portable/IAR/AtmelSAM7S64/portasm.s79 | 2 +- portable/IAR/AtmelSAM7S64/portmacro.h | 2 +- portable/IAR/AtmelSAM9XE/ISR_Support.h | 2 +- portable/IAR/AtmelSAM9XE/port.c | 2 +- portable/IAR/AtmelSAM9XE/portasm.s79 | 2 +- portable/IAR/AtmelSAM9XE/portmacro.h | 2 +- portable/IAR/LPC2000/ISR_Support.h | 2 +- portable/IAR/LPC2000/port.c | 2 +- portable/IAR/LPC2000/portasm.s79 | 2 +- portable/IAR/LPC2000/portmacro.h | 2 +- portable/IAR/MSP430/port.c | 2 +- portable/IAR/MSP430/portasm.h | 2 +- portable/IAR/MSP430/portext.s43 | 2 +- portable/IAR/MSP430/portmacro.h | 2 +- portable/IAR/MSP430X/data_model.h | 2 +- portable/IAR/MSP430X/port.c | 2 +- portable/IAR/MSP430X/portext.s43 | 2 +- portable/IAR/MSP430X/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/IAR/RISC-V/port.c | 2 +- portable/IAR/RISC-V/portASM.s | 2 +- portable/IAR/RISC-V/portContext.h | 2 +- portable/IAR/RISC-V/portmacro.h | 2 +- portable/IAR/RL78/port.c | 2 +- portable/IAR/RL78/portasm.s | 2 +- portable/IAR/RL78/portmacro.h | 2 +- portable/IAR/RX100/port.c | 2 +- portable/IAR/RX100/port_asm.s | 2 +- portable/IAR/RX100/portmacro.h | 2 +- portable/IAR/RX600/port.c | 2 +- portable/IAR/RX600/port_asm.s | 2 +- portable/IAR/RX600/portmacro.h | 2 +- portable/IAR/RX700v3_DPFPU/port.c | 2 +- portable/IAR/RX700v3_DPFPU/portmacro.h | 2 +- portable/IAR/RXv2/port.c | 2 +- portable/IAR/RXv2/port_asm.s | 2 +- portable/IAR/RXv2/portmacro.h | 2 +- portable/IAR/STR71x/ISR_Support.h | 2 +- portable/IAR/STR71x/port.c | 2 +- portable/IAR/STR71x/portasm.s79 | 2 +- portable/IAR/STR71x/portmacro.h | 2 +- portable/IAR/STR75x/ISR_Support.h | 2 +- portable/IAR/STR75x/port.c | 2 +- portable/IAR/STR75x/portasm.s79 | 2 +- portable/IAR/STR75x/portmacro.h | 2 +- portable/IAR/STR91x/ISR_Support.h | 2 +- portable/IAR/STR91x/port.c | 2 +- portable/IAR/STR91x/portasm.s79 | 2 +- portable/IAR/STR91x/portmacro.h | 2 +- portable/IAR/V850ES/ISR_Support.h | 2 +- portable/IAR/V850ES/port.c | 2 +- portable/IAR/V850ES/portasm.s85 | 2 +- portable/IAR/V850ES/portasm_Fx3.s85 | 2 +- portable/IAR/V850ES/portasm_Hx2.s85 | 2 +- portable/IAR/V850ES/portmacro.h | 2 +- portable/MPLAB/PIC18F/port.c | 2 +- portable/MPLAB/PIC18F/portmacro.h | 2 +- portable/MPLAB/PIC24_dsPIC/port.c | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S | 2 +- portable/MPLAB/PIC24_dsPIC/portmacro.h | 2 +- portable/MPLAB/PIC32MEC14xx/ISR_Support.h | 2 +- portable/MPLAB/PIC32MEC14xx/port.c | 2 +- portable/MPLAB/PIC32MEC14xx/port_asm.S | 2 +- portable/MPLAB/PIC32MEC14xx/portmacro.h | 2 +- portable/MPLAB/PIC32MX/ISR_Support.h | 2 +- portable/MPLAB/PIC32MX/port.c | 2 +- portable/MPLAB/PIC32MX/port_asm.S | 2 +- portable/MPLAB/PIC32MX/portmacro.h | 2 +- portable/MPLAB/PIC32MZ/ISR_Support.h | 2 +- portable/MPLAB/PIC32MZ/port.c | 2 +- portable/MPLAB/PIC32MZ/port_asm.S | 2 +- portable/MPLAB/PIC32MZ/portmacro.h | 2 +- portable/MSVC-MingW/port.c | 2 +- portable/MSVC-MingW/portmacro.h | 2 +- portable/MemMang/heap_1.c | 2 +- portable/MemMang/heap_2.c | 2 +- portable/MemMang/heap_3.c | 2 +- portable/MemMang/heap_4.c | 2 +- portable/MemMang/heap_5.c | 2 +- portable/MikroC/ARM_CM4F/port.c | 2 +- portable/MikroC/ARM_CM4F/portmacro.h | 2 +- portable/Paradigm/Tern_EE/large_untested/port.c | 2 +- portable/Paradigm/Tern_EE/large_untested/portasm.h | 2 +- portable/Paradigm/Tern_EE/large_untested/portmacro.h | 2 +- portable/Paradigm/Tern_EE/small/port.c | 2 +- portable/Paradigm/Tern_EE/small/portasm.h | 2 +- portable/Paradigm/Tern_EE/small/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/port.c | 2 +- portable/RVDS/ARM7_LPC21xx/portASM.s | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.inc | 2 +- portable/RVDS/ARM_CA9/port.c | 2 +- portable/RVDS/ARM_CA9/portASM.s | 2 +- portable/RVDS/ARM_CA9/portmacro.h | 2 +- portable/RVDS/ARM_CA9/portmacro.inc | 2 +- portable/RVDS/ARM_CM0/port.c | 2 +- portable/RVDS/ARM_CM0/portmacro.h | 2 +- portable/RVDS/ARM_CM3/port.c | 2 +- portable/RVDS/ARM_CM3/portmacro.h | 2 +- portable/RVDS/ARM_CM4F/port.c | 2 +- portable/RVDS/ARM_CM4F/portmacro.h | 2 +- portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c | 2 +- portable/RVDS/ARM_CM4_MPU/port.c | 2 +- portable/RVDS/ARM_CM4_MPU/portmacro.h | 2 +- portable/RVDS/ARM_CM7/r0p1/port.c | 2 +- portable/RVDS/ARM_CM7/r0p1/portmacro.h | 2 +- portable/Renesas/RX100/port.c | 2 +- portable/Renesas/RX100/port_asm.src | 2 +- portable/Renesas/RX100/portmacro.h | 2 +- portable/Renesas/RX200/port.c | 2 +- portable/Renesas/RX200/port_asm.src | 2 +- portable/Renesas/RX200/portmacro.h | 2 +- portable/Renesas/RX600/port.c | 2 +- portable/Renesas/RX600/port_asm.src | 2 +- portable/Renesas/RX600/portmacro.h | 2 +- portable/Renesas/RX600v2/port.c | 2 +- portable/Renesas/RX600v2/port_asm.src | 2 +- portable/Renesas/RX600v2/portmacro.h | 2 +- portable/Renesas/RX700v3_DPFPU/port.c | 2 +- portable/Renesas/RX700v3_DPFPU/port_asm.src | 2 +- portable/Renesas/RX700v3_DPFPU/portmacro.h | 2 +- portable/Renesas/SH2A_FPU/ISR_Support.inc | 2 +- portable/Renesas/SH2A_FPU/port.c | 2 +- portable/Renesas/SH2A_FPU/portasm.src | 2 +- portable/Renesas/SH2A_FPU/portmacro.h | 2 +- portable/Rowley/MSP430F449/port.c | 2 +- portable/Rowley/MSP430F449/portasm.h | 2 +- portable/Rowley/MSP430F449/portext.asm | 2 +- portable/Rowley/MSP430F449/portmacro.h | 2 +- portable/SDCC/Cygnal/port.c | 2 +- portable/SDCC/Cygnal/portmacro.h | 2 +- portable/Softune/MB91460/__STD_LIB_sbrk.c | 2 +- portable/Softune/MB91460/port.c | 2 +- portable/Softune/MB91460/portmacro.h | 2 +- portable/Softune/MB96340/__STD_LIB_sbrk.c | 2 +- portable/Softune/MB96340/port.c | 2 +- portable/Softune/MB96340/portmacro.h | 2 +- portable/Tasking/ARM_CM4F/port.c | 2 +- portable/Tasking/ARM_CM4F/port_asm.asm | 2 +- portable/Tasking/ARM_CM4F/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/port.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_v1/port.c | 2 +- portable/ThirdParty/GCC/ARC_v1/portmacro.h | 2 +- portable/ThirdParty/GCC/ATmega/port.c | 2 +- portable/ThirdParty/GCC/ATmega/portmacro.h | 2 +- portable/ThirdParty/GCC/Posix/port.c | 2 +- portable/ThirdParty/GCC/Posix/portmacro.h | 2 +- portable/ThirdParty/GCC/Posix/utils/wait_for_event.c | 2 +- portable/ThirdParty/GCC/Posix/utils/wait_for_event.h | 2 +- portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c | 2 +- portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h | 2 +- portable/ThirdParty/GCC/RP2040/include/portmacro.h | 2 +- portable/ThirdParty/GCC/RP2040/include/rp2040_config.h | 2 +- portable/ThirdParty/GCC/RP2040/port.c | 2 +- .../ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h | 2 +- portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h | 2 +- portable/ThirdParty/GCC/Xtensa_ESP32/port.c | 2 +- portable/ThirdParty/XCC/Xtensa/port.c | 2 +- portable/ThirdParty/XCC/Xtensa/portasm.S | 2 +- portable/ThirdParty/XCC/Xtensa/portbenchmark.h | 2 +- portable/ThirdParty/XCC/Xtensa/portclib.c | 2 +- portable/ThirdParty/XCC/Xtensa/portmacro.h | 2 +- portable/ThirdParty/XCC/Xtensa/porttrace.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_api.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_config.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_context.S | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_context.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_init.c | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_intr.c | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_timer.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S | 2 +- portable/WizC/PIC18/Drivers/Tick/Tick.c | 2 +- portable/WizC/PIC18/Drivers/Tick/isrTick.c | 2 +- portable/WizC/PIC18/addFreeRTOS.h | 2 +- portable/WizC/PIC18/port.c | 2 +- portable/WizC/PIC18/portmacro.h | 2 +- portable/oWatcom/16BitDOS/Flsh186/port.c | 2 +- portable/oWatcom/16BitDOS/Flsh186/portmacro.h | 2 +- portable/oWatcom/16BitDOS/PC/port.c | 2 +- portable/oWatcom/16BitDOS/PC/portmacro.h | 2 +- portable/oWatcom/16BitDOS/common/portasm.h | 2 +- portable/oWatcom/16BitDOS/common/portcomn.c | 2 +- queue.c | 2 +- stream_buffer.c | 2 +- tasks.c | 2 +- timers.c | 2 +- 657 files changed, 658 insertions(+), 658 deletions(-) diff --git a/.github/scripts/kernel_checker.py b/.github/scripts/kernel_checker.py index f24bbf257..4aea4cc70 100755 --- a/.github/scripts/kernel_checker.py +++ b/.github/scripts/kernel_checker.py @@ -1,6 +1,6 @@ #!/usr/bin/env python3 #/* -# * FreeRTOS Kernel +# * FreeRTOS Kernel V10.6.0 # * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * SPDX-License-Identifier: MIT @@ -99,7 +99,7 @@ KERNEL_THIRD_PARTY_PATTERNS = [ KERNEL_HEADER = [ '/*\n', - ' * FreeRTOS Kernel \n', + ' * FreeRTOS Kernel V10.6.0\n', ' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n', ' *\n', ' * SPDX-License-Identifier: MIT\n', diff --git a/croutine.c b/croutine.c index f38e96247..9661e1486 100644 --- a/croutine.c +++ b/croutine.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/event_groups.c b/event_groups.c index d7238d89a..9efdbf3c2 100644 --- a/event_groups.c +++ b/event_groups.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/FreeRTOS.h b/include/FreeRTOS.h index 831ed037b..d21554560 100644 --- a/include/FreeRTOS.h +++ b/include/FreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/StackMacros.h b/include/StackMacros.h index b8ed92e31..9542d7ead 100644 --- a/include/StackMacros.h +++ b/include/StackMacros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/atomic.h b/include/atomic.h index 8feb65250..88801911d 100644 --- a/include/atomic.h +++ b/include/atomic.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/croutine.h b/include/croutine.h index 664e38b37..5c0e39e7a 100644 --- a/include/croutine.h +++ b/include/croutine.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/deprecated_definitions.h b/include/deprecated_definitions.h index b046711a6..f2246b28a 100644 --- a/include/deprecated_definitions.h +++ b/include/deprecated_definitions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/event_groups.h b/include/event_groups.h index 47572ce94..b95ab59aa 100644 --- a/include/event_groups.h +++ b/include/event_groups.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/list.h b/include/list.h index c86eb7165..55c9c1508 100644 --- a/include/list.h +++ b/include/list.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/message_buffer.h b/include/message_buffer.h index 74fab118f..7ebbc0080 100644 --- a/include/message_buffer.h +++ b/include/message_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/mpu_prototypes.h b/include/mpu_prototypes.h index 633efd4a8..8502c891d 100644 --- a/include/mpu_prototypes.h +++ b/include/mpu_prototypes.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h index 020efc3ef..cbf9d7033 100644 --- a/include/mpu_wrappers.h +++ b/include/mpu_wrappers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/newlib-freertos.h b/include/newlib-freertos.h index a65e62e8e..658220b47 100644 --- a/include/newlib-freertos.h +++ b/include/newlib-freertos.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/picolibc-freertos.h b/include/picolibc-freertos.h index 467f7a970..c348ba0ed 100644 --- a/include/picolibc-freertos.h +++ b/include/picolibc-freertos.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/portable.h b/include/portable.h index 5734eb720..a841911a2 100644 --- a/include/portable.h +++ b/include/portable.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/projdefs.h b/include/projdefs.h index c81ad5684..7598e90c5 100644 --- a/include/projdefs.h +++ b/include/projdefs.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/queue.h b/include/queue.h index 1c1b9822a..b2fec50e7 100644 --- a/include/queue.h +++ b/include/queue.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/semphr.h b/include/semphr.h index 740be5a5d..71d86ff76 100644 --- a/include/semphr.h +++ b/include/semphr.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/stack_macros.h b/include/stack_macros.h index 7ead99ffd..4c3d03173 100644 --- a/include/stack_macros.h +++ b/include/stack_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/stdint.readme b/include/stdint.readme index 5c9d192ec..56dd02dcc 100644 --- a/include/stdint.readme +++ b/include/stdint.readme @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/stream_buffer.h b/include/stream_buffer.h index 521c178ef..cad8b7de5 100644 --- a/include/stream_buffer.h +++ b/include/stream_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/task.h b/include/task.h index 6af61f3a5..54b16992e 100644 --- a/include/task.h +++ b/include/task.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/timers.h b/include/timers.h index 2967a4674..fb4455265 100644 --- a/include/timers.h +++ b/include/timers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/list.c b/list.c index 649c4c302..b8fbbb01c 100644 --- a/list.c +++ b/list.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/copy_files.py b/portable/ARMv8M/copy_files.py index 3609c67ef..f335152e4 100644 --- a/portable/ARMv8M/copy_files.py +++ b/portable/ARMv8M/copy_files.py @@ -1,5 +1,5 @@ #/* -# * FreeRTOS Kernel +# * FreeRTOS Kernel V10.6.0 # * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c index a1e5ce082..38f8c68ae 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index 64a24f527..bac902ad4 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h index 5fd94c1c3..79fb8cc56 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c index a1e5ce082..38f8c68ae 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c index b11b6e97c..21c34a14c 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h index 5fd94c1c3..79fb8cc56 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c index 6e2043427..7ba47dd26 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c index f7ec7d9c0..f6534e5ad 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h index b9efb07dd..d970dfd91 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c index 6e2043427..7ba47dd26 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c index 504b6bf3b..e445d63e0 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h index b9efb07dd..d970dfd91 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h index 9545737c5..12235eb5d 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h index 12bb5e7c4..68e1ae7fa 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h index 99f913d34..bbe6f320c 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S index 867642b5e..fdb2db91b 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s index 648ae0050..3b13f9432 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h index 9cf0e87fb..6e5c4e1c8 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S index 867642b5e..fdb2db91b 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s index 8f77c4daf..640dff9b1 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h index 9cf0e87fb..6e5c4e1c8 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S index f051a6073..96922c1e6 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s index 15e74ffc1..7ea8c16ff 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h index 380768fc0..1763094ef 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S index f051a6073..96922c1e6 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s index ec5202527..d63de40b4 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h index 815dca086..c193e4a2d 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h index 46bc4e24b..265fcb76a 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h index 7829ee618..64ce069f1 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h index 3b51cb5ff..c5b81bdd3 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portasm.h b/portable/ARMv8M/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/ARMv8M/non_secure/portasm.h +++ b/portable/ARMv8M/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portmacrocommon.h b/portable/ARMv8M/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/ARMv8M/non_secure/portmacrocommon.h +++ b/portable/ARMv8M/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c index 2d9eeeaf8..2a20eba5c 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c index 13520870b..0b8ac7455 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s index f7c5d19d2..9dd82ff5d 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s index 400bd0107..94d3d5240 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c index 0730d574d..8e6027e85 100644 --- a/portable/ARMv8M/secure/context/secure_context.c +++ b/portable/ARMv8M/secure/context/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/secure_context.h b/portable/ARMv8M/secure/context/secure_context.h index d0adbaf01..4b7e8017e 100644 --- a/portable/ARMv8M/secure/context/secure_context.h +++ b/portable/ARMv8M/secure/context/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/heap/secure_heap.c b/portable/ARMv8M/secure/heap/secure_heap.c index 157fdbf0e..6d566318e 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.c +++ b/portable/ARMv8M/secure/heap/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/heap/secure_heap.h b/portable/ARMv8M/secure/heap/secure_heap.h index c13590f86..c77d1cc96 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.h +++ b/portable/ARMv8M/secure/heap/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/init/secure_init.c b/portable/ARMv8M/secure/init/secure_init.c index dc19ebc7d..e729dc8ca 100644 --- a/portable/ARMv8M/secure/init/secure_init.c +++ b/portable/ARMv8M/secure/init/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/init/secure_init.h b/portable/ARMv8M/secure/init/secure_init.h index 21daeda6b..f905a423f 100644 --- a/portable/ARMv8M/secure/init/secure_init.h +++ b/portable/ARMv8M/secure/init/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/macros/secure_port_macros.h b/portable/ARMv8M/secure/macros/secure_port_macros.h index 304913b8d..c95d2258b 100644 --- a/portable/ARMv8M/secure/macros/secure_port_macros.h +++ b/portable/ARMv8M/secure/macros/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/Flsh186/port.c b/portable/BCC/16BitDOS/Flsh186/port.c index 66b8b7b7b..e09a02fc3 100644 --- a/portable/BCC/16BitDOS/Flsh186/port.c +++ b/portable/BCC/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/Flsh186/prtmacro.h b/portable/BCC/16BitDOS/Flsh186/prtmacro.h index 295c0bc73..13854f6d6 100644 --- a/portable/BCC/16BitDOS/Flsh186/prtmacro.h +++ b/portable/BCC/16BitDOS/Flsh186/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/PC/port.c b/portable/BCC/16BitDOS/PC/port.c index 6940b1a67..560f90479 100644 --- a/portable/BCC/16BitDOS/PC/port.c +++ b/portable/BCC/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/PC/prtmacro.h b/portable/BCC/16BitDOS/PC/prtmacro.h index 5fb4ed6a4..5a40493e4 100644 --- a/portable/BCC/16BitDOS/PC/prtmacro.h +++ b/portable/BCC/16BitDOS/PC/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/common/portasm.h b/portable/BCC/16BitDOS/common/portasm.h index e53d257c8..8e9190310 100644 --- a/portable/BCC/16BitDOS/common/portasm.h +++ b/portable/BCC/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/common/portcomn.c b/portable/BCC/16BitDOS/common/portcomn.c index 69ab45ba7..8df29eda7 100644 --- a/portable/BCC/16BitDOS/common/portcomn.c +++ b/portable/BCC/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM3/port.c b/portable/CCS/ARM_CM3/port.c index 530e38ad3..ec4d92cfe 100755 --- a/portable/CCS/ARM_CM3/port.c +++ b/portable/CCS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM3/portasm.asm b/portable/CCS/ARM_CM3/portasm.asm index 2773c6ca2..24217c1ab 100644 --- a/portable/CCS/ARM_CM3/portasm.asm +++ b/portable/CCS/ARM_CM3/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM3/portmacro.h b/portable/CCS/ARM_CM3/portmacro.h index 9c405d4c8..6296a69e8 100644 --- a/portable/CCS/ARM_CM3/portmacro.h +++ b/portable/CCS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM4F/port.c b/portable/CCS/ARM_CM4F/port.c index a1fc5210e..5de44f0b3 100755 --- a/portable/CCS/ARM_CM4F/port.c +++ b/portable/CCS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM4F/portasm.asm b/portable/CCS/ARM_CM4F/portasm.asm index eb75533bd..5fd0ed554 100644 --- a/portable/CCS/ARM_CM4F/portasm.asm +++ b/portable/CCS/ARM_CM4F/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM4F/portmacro.h b/portable/CCS/ARM_CM4F/portmacro.h index 64c702c94..89b328823 100644 --- a/portable/CCS/ARM_CM4F/portmacro.h +++ b/portable/CCS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_Cortex-R4/port.c b/portable/CCS/ARM_Cortex-R4/port.c index 6c63a5a71..d7b496863 100644 --- a/portable/CCS/ARM_Cortex-R4/port.c +++ b/portable/CCS/ARM_Cortex-R4/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_Cortex-R4/portASM.asm b/portable/CCS/ARM_Cortex-R4/portASM.asm index 927df85d4..2527bec2b 100644 --- a/portable/CCS/ARM_Cortex-R4/portASM.asm +++ b/portable/CCS/ARM_Cortex-R4/portASM.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_Cortex-R4/portmacro.h b/portable/CCS/ARM_Cortex-R4/portmacro.h index 07c1827cb..7c8e24aae 100644 --- a/portable/CCS/ARM_Cortex-R4/portmacro.h +++ b/portable/CCS/ARM_Cortex-R4/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/data_model.h b/portable/CCS/MSP430X/data_model.h index 186caa65d..c7e330764 100644 --- a/portable/CCS/MSP430X/data_model.h +++ b/portable/CCS/MSP430X/data_model.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/port.c b/portable/CCS/MSP430X/port.c index c691b5d9f..119e86400 100644 --- a/portable/CCS/MSP430X/port.c +++ b/portable/CCS/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/portext.asm b/portable/CCS/MSP430X/portext.asm index 9fe306e94..db21f1584 100644 --- a/portable/CCS/MSP430X/portext.asm +++ b/portable/CCS/MSP430X/portext.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/portmacro.h b/portable/CCS/MSP430X/portmacro.h index 064b0503a..fb5384141 100644 --- a/portable/CCS/MSP430X/portmacro.h +++ b/portable/CCS/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V1/port.c b/portable/CodeWarrior/ColdFire_V1/port.c index 513ce1632..57d1b1b17 100644 --- a/portable/CodeWarrior/ColdFire_V1/port.c +++ b/portable/CodeWarrior/ColdFire_V1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V1/portasm.S b/portable/CodeWarrior/ColdFire_V1/portasm.S index 75f55f037..687b7b71f 100644 --- a/portable/CodeWarrior/ColdFire_V1/portasm.S +++ b/portable/CodeWarrior/ColdFire_V1/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V1/portmacro.h b/portable/CodeWarrior/ColdFire_V1/portmacro.h index 8acfcd04f..fe4147086 100644 --- a/portable/CodeWarrior/ColdFire_V1/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V2/port.c b/portable/CodeWarrior/ColdFire_V2/port.c index 5bca650fe..ced4d23c2 100644 --- a/portable/CodeWarrior/ColdFire_V2/port.c +++ b/portable/CodeWarrior/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V2/portasm.S b/portable/CodeWarrior/ColdFire_V2/portasm.S index bdffce5e8..98e2650aa 100644 --- a/portable/CodeWarrior/ColdFire_V2/portasm.S +++ b/portable/CodeWarrior/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V2/portmacro.h b/portable/CodeWarrior/ColdFire_V2/portmacro.h index 053b0adec..d6c4f0917 100644 --- a/portable/CodeWarrior/ColdFire_V2/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/HCS12/port.c b/portable/CodeWarrior/HCS12/port.c index e4876125a..05e0aab03 100644 --- a/portable/CodeWarrior/HCS12/port.c +++ b/portable/CodeWarrior/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/HCS12/portmacro.h b/portable/CodeWarrior/HCS12/portmacro.h index d0d0a140e..da9af4b5e 100644 --- a/portable/CodeWarrior/HCS12/portmacro.h +++ b/portable/CodeWarrior/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index c9951956f..ccc6fa376 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Common/mpu_wrappers_v2.c b/portable/Common/mpu_wrappers_v2.c index 1e28d8e4e..073606052 100644 --- a/portable/Common/mpu_wrappers_v2.c +++ b/portable/Common/mpu_wrappers_v2.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91FR40008/port.c b/portable/GCC/ARM7_AT91FR40008/port.c index d85e476df..b64b1f5b7 100644 --- a/portable/GCC/ARM7_AT91FR40008/port.c +++ b/portable/GCC/ARM7_AT91FR40008/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91FR40008/portISR.c b/portable/GCC/ARM7_AT91FR40008/portISR.c index 15eba673d..3dda04826 100644 --- a/portable/GCC/ARM7_AT91FR40008/portISR.c +++ b/portable/GCC/ARM7_AT91FR40008/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91FR40008/portmacro.h b/portable/GCC/ARM7_AT91FR40008/portmacro.h index 201f3c7a7..dfc2a0fab 100644 --- a/portable/GCC/ARM7_AT91FR40008/portmacro.h +++ b/portable/GCC/ARM7_AT91FR40008/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91SAM7S/port.c b/portable/GCC/ARM7_AT91SAM7S/port.c index a9d78bb13..6c7e68320 100644 --- a/portable/GCC/ARM7_AT91SAM7S/port.c +++ b/portable/GCC/ARM7_AT91SAM7S/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91SAM7S/portISR.c b/portable/GCC/ARM7_AT91SAM7S/portISR.c index 61cb80419..c16af2318 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portISR.c +++ b/portable/GCC/ARM7_AT91SAM7S/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/portable/GCC/ARM7_AT91SAM7S/portmacro.h index b52fbe0aa..ef20ff787 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portmacro.h +++ b/portable/GCC/ARM7_AT91SAM7S/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC2000/port.c b/portable/GCC/ARM7_LPC2000/port.c index 87a8fd34d..254d55ea4 100644 --- a/portable/GCC/ARM7_LPC2000/port.c +++ b/portable/GCC/ARM7_LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC2000/portISR.c b/portable/GCC/ARM7_LPC2000/portISR.c index f66b4fab1..7af6e082b 100644 --- a/portable/GCC/ARM7_LPC2000/portISR.c +++ b/portable/GCC/ARM7_LPC2000/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC2000/portmacro.h b/portable/GCC/ARM7_LPC2000/portmacro.h index 6545e1127..3f8f3cddb 100644 --- a/portable/GCC/ARM7_LPC2000/portmacro.h +++ b/portable/GCC/ARM7_LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC23xx/port.c b/portable/GCC/ARM7_LPC23xx/port.c index 3b9921775..86d18acc7 100644 --- a/portable/GCC/ARM7_LPC23xx/port.c +++ b/portable/GCC/ARM7_LPC23xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC23xx/portISR.c b/portable/GCC/ARM7_LPC23xx/portISR.c index a3279d286..b888b701f 100644 --- a/portable/GCC/ARM7_LPC23xx/portISR.c +++ b/portable/GCC/ARM7_LPC23xx/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC23xx/portmacro.h b/portable/GCC/ARM7_LPC23xx/portmacro.h index f60cdde53..1a9aec1a7 100644 --- a/portable/GCC/ARM7_LPC23xx/portmacro.h +++ b/portable/GCC/ARM7_LPC23xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT/port.c b/portable/GCC/ARM_CA53_64_BIT/port.c index 545bac15d..86493544c 100644 --- a/portable/GCC/ARM_CA53_64_BIT/port.c +++ b/portable/GCC/ARM_CA53_64_BIT/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT/portASM.S b/portable/GCC/ARM_CA53_64_BIT/portASM.S index c98cadb11..9c7e7c278 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portASM.S +++ b/portable/GCC/ARM_CA53_64_BIT/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT/portmacro.h b/portable/GCC/ARM_CA53_64_BIT/portmacro.h index 00fc06164..8b3f5e2a5 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portmacro.h +++ b/portable/GCC/ARM_CA53_64_BIT/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT_SRE/port.c b/portable/GCC/ARM_CA53_64_BIT_SRE/port.c index b1f7789d7..8473ccad0 100644 --- a/portable/GCC/ARM_CA53_64_BIT_SRE/port.c +++ b/portable/GCC/ARM_CA53_64_BIT_SRE/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S b/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S index d779890bc..16ab484f6 100644 --- a/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S +++ b/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h b/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h index 019928882..1ae90280b 100644 --- a/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h +++ b/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA9/port.c b/portable/GCC/ARM_CA9/port.c index 8c7421411..4b4a664db 100644 --- a/portable/GCC/ARM_CA9/port.c +++ b/portable/GCC/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA9/portASM.S b/portable/GCC/ARM_CA9/portASM.S index 150cfabad..f18b40454 100644 --- a/portable/GCC/ARM_CA9/portASM.S +++ b/portable/GCC/ARM_CA9/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA9/portmacro.h b/portable/GCC/ARM_CA9/portmacro.h index 6f1f22724..7470f7bda 100644 --- a/portable/GCC/ARM_CA9/portmacro.h +++ b/portable/GCC/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM0/port.c b/portable/GCC/ARM_CM0/port.c index 261c12d82..de4387c2d 100644 --- a/portable/GCC/ARM_CM0/port.c +++ b/portable/GCC/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM0/portmacro.h b/portable/GCC/ARM_CM0/portmacro.h index 14375bf95..0b0ab8187 100644 --- a/portable/GCC/ARM_CM0/portmacro.h +++ b/portable/GCC/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c index a1e5ce082..38f8c68ae 100644 --- a/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index 64a24f527..bac902ad4 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.h b/portable/GCC/ARM_CM23/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portmacro.h b/portable/GCC/ARM_CM23/non_secure/portmacro.h index 5fd94c1c3..79fb8cc56 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c index 0730d574d..8e6027e85 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/portable/GCC/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_context.h b/portable/GCC/ARM_CM23/secure/secure_context.h index d0adbaf01..4b7e8017e 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.h +++ b/portable/GCC/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_context_port.c b/portable/GCC/ARM_CM23/secure/secure_context_port.c index 2d9eeeaf8..2a20eba5c 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM23/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.c b/portable/GCC/ARM_CM23/secure/secure_heap.c index 157fdbf0e..6d566318e 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.c +++ b/portable/GCC/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.h b/portable/GCC/ARM_CM23/secure/secure_heap.h index c13590f86..c77d1cc96 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.h +++ b/portable/GCC/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_init.c b/portable/GCC/ARM_CM23/secure/secure_init.c index dc19ebc7d..e729dc8ca 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.c +++ b/portable/GCC/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_init.h b/portable/GCC/ARM_CM23/secure/secure_init.h index 21daeda6b..f905a423f 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.h +++ b/portable/GCC/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_port_macros.h b/portable/GCC/ARM_CM23/secure/secure_port_macros.h index 304913b8d..c95d2258b 100644 --- a/portable/GCC/ARM_CM23/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c index a1e5ce082..38f8c68ae 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index b11b6e97c..21c34a14c 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h index 5fd94c1c3..79fb8cc56 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3/port.c b/portable/GCC/ARM_CM3/port.c index ac8185f5f..bcaf27681 100755 --- a/portable/GCC/ARM_CM3/port.c +++ b/portable/GCC/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3/portmacro.h b/portable/GCC/ARM_CM3/portmacro.h index 0ff96b82a..93f352da8 100644 --- a/portable/GCC/ARM_CM3/portmacro.h +++ b/portable/GCC/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c index 6e2043427..7ba47dd26 100644 --- a/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.c b/portable/GCC/ARM_CM33/non_secure/portasm.c index f7ec7d9c0..f6534e5ad 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.h b/portable/GCC/ARM_CM33/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portmacro.h b/portable/GCC/ARM_CM33/non_secure/portmacro.h index b9efb07dd..d970dfd91 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c index 0730d574d..8e6027e85 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/portable/GCC/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_context.h b/portable/GCC/ARM_CM33/secure/secure_context.h index d0adbaf01..4b7e8017e 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.h +++ b/portable/GCC/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_context_port.c b/portable/GCC/ARM_CM33/secure/secure_context_port.c index 13520870b..0b8ac7455 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM33/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.c b/portable/GCC/ARM_CM33/secure/secure_heap.c index 157fdbf0e..6d566318e 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.c +++ b/portable/GCC/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.h b/portable/GCC/ARM_CM33/secure/secure_heap.h index c13590f86..c77d1cc96 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.h +++ b/portable/GCC/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_init.c b/portable/GCC/ARM_CM33/secure/secure_init.c index dc19ebc7d..e729dc8ca 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.c +++ b/portable/GCC/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_init.h b/portable/GCC/ARM_CM33/secure/secure_init.h index 21daeda6b..f905a423f 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.h +++ b/portable/GCC/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_port_macros.h b/portable/GCC/ARM_CM33/secure/secure_port_macros.h index 304913b8d..c95d2258b 100644 --- a/portable/GCC/ARM_CM33/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c index 6e2043427..7ba47dd26 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c index 504b6bf3b..e445d63e0 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h index b9efb07dd..d970dfd91 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c index 6e2043427..7ba47dd26 100644 --- a/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/port.c b/portable/GCC/ARM_CM35P/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/GCC/ARM_CM35P/non_secure/port.c +++ b/portable/GCC/ARM_CM35P/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portasm.c b/portable/GCC/ARM_CM35P/non_secure/portasm.c index f7ec7d9c0..f6534e5ad 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portasm.c +++ b/portable/GCC/ARM_CM35P/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portasm.h b/portable/GCC/ARM_CM35P/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portasm.h +++ b/portable/GCC/ARM_CM35P/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portmacro.h b/portable/GCC/ARM_CM35P/non_secure/portmacro.h index 9545737c5..12235eb5d 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM35P/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_context.c b/portable/GCC/ARM_CM35P/secure/secure_context.c index 0730d574d..8e6027e85 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_context.c +++ b/portable/GCC/ARM_CM35P/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_context.h b/portable/GCC/ARM_CM35P/secure/secure_context.h index d0adbaf01..4b7e8017e 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_context.h +++ b/portable/GCC/ARM_CM35P/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_context_port.c b/portable/GCC/ARM_CM35P/secure/secure_context_port.c index 13520870b..0b8ac7455 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM35P/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_heap.c b/portable/GCC/ARM_CM35P/secure/secure_heap.c index 157fdbf0e..6d566318e 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_heap.c +++ b/portable/GCC/ARM_CM35P/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_heap.h b/portable/GCC/ARM_CM35P/secure/secure_heap.h index c13590f86..c77d1cc96 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_heap.h +++ b/portable/GCC/ARM_CM35P/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_init.c b/portable/GCC/ARM_CM35P/secure/secure_init.c index dc19ebc7d..e729dc8ca 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_init.c +++ b/portable/GCC/ARM_CM35P/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_init.h b/portable/GCC/ARM_CM35P/secure/secure_init.h index 21daeda6b..f905a423f 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_init.h +++ b/portable/GCC/ARM_CM35P/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_port_macros.h b/portable/GCC/ARM_CM35P/secure/secure_port_macros.h index 304913b8d..c95d2258b 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM35P/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c index 6e2043427..7ba47dd26 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c index 504b6bf3b..e445d63e0 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h index 9545737c5..12235eb5d 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c index df9239a41..15a15100c 100644 --- a/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index d29b31d74..d35b56379 100755 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h index d1f659e37..f9de6c1fe 100644 --- a/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4F/port.c b/portable/GCC/ARM_CM4F/port.c index d18854e1b..726eaec08 100755 --- a/portable/GCC/ARM_CM4F/port.c +++ b/portable/GCC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4F/portmacro.h b/portable/GCC/ARM_CM4F/portmacro.h index 532eefa74..fe51b5de1 100644 --- a/portable/GCC/ARM_CM4F/portmacro.h +++ b/portable/GCC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c index df9239a41..15a15100c 100644 --- a/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index bbcf733b8..8065bff7b 100755 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h index 5417feaef..d393fc55c 100644 --- a/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c index 6e2043427..7ba47dd26 100644 --- a/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/port.c b/portable/GCC/ARM_CM55/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/GCC/ARM_CM55/non_secure/port.c +++ b/portable/GCC/ARM_CM55/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portasm.c b/portable/GCC/ARM_CM55/non_secure/portasm.c index f7ec7d9c0..f6534e5ad 100644 --- a/portable/GCC/ARM_CM55/non_secure/portasm.c +++ b/portable/GCC/ARM_CM55/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portasm.h b/portable/GCC/ARM_CM55/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/GCC/ARM_CM55/non_secure/portasm.h +++ b/portable/GCC/ARM_CM55/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portmacro.h b/portable/GCC/ARM_CM55/non_secure/portmacro.h index 12bb5e7c4..68e1ae7fa 100644 --- a/portable/GCC/ARM_CM55/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM55/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_context.c b/portable/GCC/ARM_CM55/secure/secure_context.c index 0730d574d..8e6027e85 100644 --- a/portable/GCC/ARM_CM55/secure/secure_context.c +++ b/portable/GCC/ARM_CM55/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_context.h b/portable/GCC/ARM_CM55/secure/secure_context.h index d0adbaf01..4b7e8017e 100644 --- a/portable/GCC/ARM_CM55/secure/secure_context.h +++ b/portable/GCC/ARM_CM55/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_context_port.c b/portable/GCC/ARM_CM55/secure/secure_context_port.c index 13520870b..0b8ac7455 100644 --- a/portable/GCC/ARM_CM55/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM55/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_heap.c b/portable/GCC/ARM_CM55/secure/secure_heap.c index 157fdbf0e..6d566318e 100644 --- a/portable/GCC/ARM_CM55/secure/secure_heap.c +++ b/portable/GCC/ARM_CM55/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_heap.h b/portable/GCC/ARM_CM55/secure/secure_heap.h index c13590f86..c77d1cc96 100644 --- a/portable/GCC/ARM_CM55/secure/secure_heap.h +++ b/portable/GCC/ARM_CM55/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_init.c b/portable/GCC/ARM_CM55/secure/secure_init.c index dc19ebc7d..e729dc8ca 100644 --- a/portable/GCC/ARM_CM55/secure/secure_init.c +++ b/portable/GCC/ARM_CM55/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_init.h b/portable/GCC/ARM_CM55/secure/secure_init.h index 21daeda6b..f905a423f 100644 --- a/portable/GCC/ARM_CM55/secure/secure_init.h +++ b/portable/GCC/ARM_CM55/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_port_macros.h b/portable/GCC/ARM_CM55/secure/secure_port_macros.h index 304913b8d..c95d2258b 100644 --- a/portable/GCC/ARM_CM55/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM55/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c index 6e2043427..7ba47dd26 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c index 504b6bf3b..e445d63e0 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h index 12bb5e7c4..68e1ae7fa 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM7/r0p1/port.c b/portable/GCC/ARM_CM7/r0p1/port.c index aab077d76..8e5d7c703 100755 --- a/portable/GCC/ARM_CM7/r0p1/port.c +++ b/portable/GCC/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM7/r0p1/portmacro.h b/portable/GCC/ARM_CM7/r0p1/portmacro.h index f433beb52..8156c228a 100644 --- a/portable/GCC/ARM_CM7/r0p1/portmacro.h +++ b/portable/GCC/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c index 6e2043427..7ba47dd26 100644 --- a/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/port.c b/portable/GCC/ARM_CM85/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/GCC/ARM_CM85/non_secure/port.c +++ b/portable/GCC/ARM_CM85/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portasm.c b/portable/GCC/ARM_CM85/non_secure/portasm.c index f7ec7d9c0..f6534e5ad 100644 --- a/portable/GCC/ARM_CM85/non_secure/portasm.c +++ b/portable/GCC/ARM_CM85/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portasm.h b/portable/GCC/ARM_CM85/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/GCC/ARM_CM85/non_secure/portasm.h +++ b/portable/GCC/ARM_CM85/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portmacro.h b/portable/GCC/ARM_CM85/non_secure/portmacro.h index 99f913d34..bbe6f320c 100644 --- a/portable/GCC/ARM_CM85/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM85/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_context.c b/portable/GCC/ARM_CM85/secure/secure_context.c index 0730d574d..8e6027e85 100644 --- a/portable/GCC/ARM_CM85/secure/secure_context.c +++ b/portable/GCC/ARM_CM85/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_context.h b/portable/GCC/ARM_CM85/secure/secure_context.h index d0adbaf01..4b7e8017e 100644 --- a/portable/GCC/ARM_CM85/secure/secure_context.h +++ b/portable/GCC/ARM_CM85/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_context_port.c b/portable/GCC/ARM_CM85/secure/secure_context_port.c index 13520870b..0b8ac7455 100644 --- a/portable/GCC/ARM_CM85/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM85/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_heap.c b/portable/GCC/ARM_CM85/secure/secure_heap.c index 157fdbf0e..6d566318e 100644 --- a/portable/GCC/ARM_CM85/secure/secure_heap.c +++ b/portable/GCC/ARM_CM85/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_heap.h b/portable/GCC/ARM_CM85/secure/secure_heap.h index c13590f86..c77d1cc96 100644 --- a/portable/GCC/ARM_CM85/secure/secure_heap.h +++ b/portable/GCC/ARM_CM85/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_init.c b/portable/GCC/ARM_CM85/secure/secure_init.c index dc19ebc7d..e729dc8ca 100644 --- a/portable/GCC/ARM_CM85/secure/secure_init.c +++ b/portable/GCC/ARM_CM85/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_init.h b/portable/GCC/ARM_CM85/secure/secure_init.h index 21daeda6b..f905a423f 100644 --- a/portable/GCC/ARM_CM85/secure/secure_init.h +++ b/portable/GCC/ARM_CM85/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_port_macros.h b/portable/GCC/ARM_CM85/secure/secure_port_macros.h index 304913b8d..c95d2258b 100644 --- a/portable/GCC/ARM_CM85/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM85/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c index 6e2043427..7ba47dd26 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c index 504b6bf3b..e445d63e0 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h index 99f913d34..bbe6f320c 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CR5/port.c b/portable/GCC/ARM_CR5/port.c index 2cbc24dbf..b7401fbd3 100644 --- a/portable/GCC/ARM_CR5/port.c +++ b/portable/GCC/ARM_CR5/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CR5/portASM.S b/portable/GCC/ARM_CR5/portASM.S index c331057d6..7637385f1 100644 --- a/portable/GCC/ARM_CR5/portASM.S +++ b/portable/GCC/ARM_CR5/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CR5/portmacro.h b/portable/GCC/ARM_CR5/portmacro.h index ff7337d15..c33157256 100644 --- a/portable/GCC/ARM_CR5/portmacro.h +++ b/portable/GCC/ARM_CR5/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CRx_No_GIC/port.c b/portable/GCC/ARM_CRx_No_GIC/port.c index 74d956345..8c63f7a47 100644 --- a/portable/GCC/ARM_CRx_No_GIC/port.c +++ b/portable/GCC/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CRx_No_GIC/portASM.S b/portable/GCC/ARM_CRx_No_GIC/portASM.S index bfb15733a..9f887362a 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portASM.S +++ b/portable/GCC/ARM_CRx_No_GIC/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CRx_No_GIC/portmacro.h b/portable/GCC/ARM_CRx_No_GIC/portmacro.h index e8e541034..6efe0d0fa 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portmacro.h +++ b/portable/GCC/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ATMega323/port.c b/portable/GCC/ATMega323/port.c index c27910c1d..7a487b04d 100644 --- a/portable/GCC/ATMega323/port.c +++ b/portable/GCC/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ATMega323/portmacro.h b/portable/GCC/ATMega323/portmacro.h index a9f317e6d..c57e0d390 100644 --- a/portable/GCC/ATMega323/portmacro.h +++ b/portable/GCC/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/AVR32_UC3/exception.S b/portable/GCC/AVR32_UC3/exception.S index 9d46489ae..641ace96a 100644 --- a/portable/GCC/AVR32_UC3/exception.S +++ b/portable/GCC/AVR32_UC3/exception.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/GCC/AVR32_UC3/port.c b/portable/GCC/AVR32_UC3/port.c index 8d78fe0d6..740d17e95 100644 --- a/portable/GCC/AVR32_UC3/port.c +++ b/portable/GCC/AVR32_UC3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/GCC/AVR32_UC3/portmacro.h b/portable/GCC/AVR32_UC3/portmacro.h index ebf501091..0736c1f99 100644 --- a/portable/GCC/AVR32_UC3/portmacro.h +++ b/portable/GCC/AVR32_UC3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/GCC/CORTUS_APS3/port.c b/portable/GCC/CORTUS_APS3/port.c index e2ada1a5b..faf5af31d 100644 --- a/portable/GCC/CORTUS_APS3/port.c +++ b/portable/GCC/CORTUS_APS3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/CORTUS_APS3/portmacro.h b/portable/GCC/CORTUS_APS3/portmacro.h index 9d2d0e0cd..56428c1e2 100644 --- a/portable/GCC/CORTUS_APS3/portmacro.h +++ b/portable/GCC/CORTUS_APS3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ColdFire_V2/port.c b/portable/GCC/ColdFire_V2/port.c index cbf569384..10db40112 100644 --- a/portable/GCC/ColdFire_V2/port.c +++ b/portable/GCC/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ColdFire_V2/portasm.S b/portable/GCC/ColdFire_V2/portasm.S index a3c6aca05..43011472d 100644 --- a/portable/GCC/ColdFire_V2/portasm.S +++ b/portable/GCC/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ColdFire_V2/portmacro.h b/portable/GCC/ColdFire_V2/portmacro.h index 06ddbd887..5cbd622c6 100644 --- a/portable/GCC/ColdFire_V2/portmacro.h +++ b/portable/GCC/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/H8S2329/port.c b/portable/GCC/H8S2329/port.c index 660cb81e1..1b74c3cf6 100644 --- a/portable/GCC/H8S2329/port.c +++ b/portable/GCC/H8S2329/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/H8S2329/portmacro.h b/portable/GCC/H8S2329/portmacro.h index a5612cadf..da0982f86 100644 --- a/portable/GCC/H8S2329/portmacro.h +++ b/portable/GCC/H8S2329/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/HCS12/port.c b/portable/GCC/HCS12/port.c index 8ee3e10de..6c1d39b57 100644 --- a/portable/GCC/HCS12/port.c +++ b/portable/GCC/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/HCS12/portmacro.h b/portable/GCC/HCS12/portmacro.h index a11b96c37..c01c9d6fc 100644 --- a/portable/GCC/HCS12/portmacro.h +++ b/portable/GCC/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/ISR_Support.h b/portable/GCC/IA32_flat/ISR_Support.h index 6ee4f2412..7e26f39f4 100644 --- a/portable/GCC/IA32_flat/ISR_Support.h +++ b/portable/GCC/IA32_flat/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/port.c b/portable/GCC/IA32_flat/port.c index 52cac31d2..348b0b511 100644 --- a/portable/GCC/IA32_flat/port.c +++ b/portable/GCC/IA32_flat/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/portASM.S b/portable/GCC/IA32_flat/portASM.S index 4dac1af0b..4a5cf2cb7 100644 --- a/portable/GCC/IA32_flat/portASM.S +++ b/portable/GCC/IA32_flat/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/portmacro.h b/portable/GCC/IA32_flat/portmacro.h index 3a0cd287c..859b14d2b 100644 --- a/portable/GCC/IA32_flat/portmacro.h +++ b/portable/GCC/IA32_flat/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MSP430F449/port.c b/portable/GCC/MSP430F449/port.c index ca5d0c558..2e49c7e07 100644 --- a/portable/GCC/MSP430F449/port.c +++ b/portable/GCC/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MSP430F449/portmacro.h b/portable/GCC/MSP430F449/portmacro.h index 2f70a24d1..a96f6e63c 100644 --- a/portable/GCC/MSP430F449/portmacro.h +++ b/portable/GCC/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlaze/port.c b/portable/GCC/MicroBlaze/port.c index 309b805ad..9ac914723 100644 --- a/portable/GCC/MicroBlaze/port.c +++ b/portable/GCC/MicroBlaze/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlaze/portasm.s b/portable/GCC/MicroBlaze/portasm.s index 344914893..880785e57 100644 --- a/portable/GCC/MicroBlaze/portasm.s +++ b/portable/GCC/MicroBlaze/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlaze/portmacro.h b/portable/GCC/MicroBlaze/portmacro.h index b04c526a4..6ab56326f 100644 --- a/portable/GCC/MicroBlaze/portmacro.h +++ b/portable/GCC/MicroBlaze/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/port.c b/portable/GCC/MicroBlazeV8/port.c index 92857417f..3b58226e1 100644 --- a/portable/GCC/MicroBlazeV8/port.c +++ b/portable/GCC/MicroBlazeV8/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/port_exceptions.c b/portable/GCC/MicroBlazeV8/port_exceptions.c index 52055fc3c..9cf6ea070 100644 --- a/portable/GCC/MicroBlazeV8/port_exceptions.c +++ b/portable/GCC/MicroBlazeV8/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/portasm.S b/portable/GCC/MicroBlazeV8/portasm.S index d0e20515d..707442dc3 100644 --- a/portable/GCC/MicroBlazeV8/portasm.S +++ b/portable/GCC/MicroBlazeV8/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/portmacro.h b/portable/GCC/MicroBlazeV8/portmacro.h index 3ade98795..1c0e020a6 100644 --- a/portable/GCC/MicroBlazeV8/portmacro.h +++ b/portable/GCC/MicroBlazeV8/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/port.c b/portable/GCC/MicroBlazeV9/port.c index 8018da4d6..2b2a9544d 100644 --- a/portable/GCC/MicroBlazeV9/port.c +++ b/portable/GCC/MicroBlazeV9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/port_exceptions.c b/portable/GCC/MicroBlazeV9/port_exceptions.c index 52055fc3c..9cf6ea070 100644 --- a/portable/GCC/MicroBlazeV9/port_exceptions.c +++ b/portable/GCC/MicroBlazeV9/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/portasm.S b/portable/GCC/MicroBlazeV9/portasm.S index 2114d00e8..d60a9da4e 100644 --- a/portable/GCC/MicroBlazeV9/portasm.S +++ b/portable/GCC/MicroBlazeV9/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/portmacro.h b/portable/GCC/MicroBlazeV9/portmacro.h index 9d10b5e5b..7ca7bad91 100644 --- a/portable/GCC/MicroBlazeV9/portmacro.h +++ b/portable/GCC/MicroBlazeV9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/NiosII/port.c b/portable/GCC/NiosII/port.c index f26e29550..2826c1eb5 100644 --- a/portable/GCC/NiosII/port.c +++ b/portable/GCC/NiosII/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/NiosII/port_asm.S b/portable/GCC/NiosII/port_asm.S index 80117e590..bfadede60 100644 --- a/portable/GCC/NiosII/port_asm.S +++ b/portable/GCC/NiosII/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/NiosII/portmacro.h b/portable/GCC/NiosII/portmacro.h index 3ac552dd8..61374d474 100644 --- a/portable/GCC/NiosII/portmacro.h +++ b/portable/GCC/NiosII/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/FPU_Macros.h b/portable/GCC/PPC405_Xilinx/FPU_Macros.h index 9c566588a..e665caedf 100644 --- a/portable/GCC/PPC405_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC405_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/port.c b/portable/GCC/PPC405_Xilinx/port.c index c7ecac070..7e51a618a 100644 --- a/portable/GCC/PPC405_Xilinx/port.c +++ b/portable/GCC/PPC405_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/portasm.S b/portable/GCC/PPC405_Xilinx/portasm.S index 49866e83e..2e4ddb605 100644 --- a/portable/GCC/PPC405_Xilinx/portasm.S +++ b/portable/GCC/PPC405_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/portmacro.h b/portable/GCC/PPC405_Xilinx/portmacro.h index 06cca5df9..8c3ed5029 100644 --- a/portable/GCC/PPC405_Xilinx/portmacro.h +++ b/portable/GCC/PPC405_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/FPU_Macros.h b/portable/GCC/PPC440_Xilinx/FPU_Macros.h index 9c566588a..e665caedf 100644 --- a/portable/GCC/PPC440_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC440_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/port.c b/portable/GCC/PPC440_Xilinx/port.c index 89caeac7c..f09810d61 100644 --- a/portable/GCC/PPC440_Xilinx/port.c +++ b/portable/GCC/PPC440_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/portasm.S b/portable/GCC/PPC440_Xilinx/portasm.S index 49866e83e..2e4ddb605 100644 --- a/portable/GCC/PPC440_Xilinx/portasm.S +++ b/portable/GCC/PPC440_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/portmacro.h b/portable/GCC/PPC440_Xilinx/portmacro.h index 06cca5df9..8c3ed5029 100644 --- a/portable/GCC/PPC440_Xilinx/portmacro.h +++ b/portable/GCC/PPC440_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h index 262c337b3..482eb6d22 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index f525e73ad..4bc15ef54 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h index 4a841f4bb..6146baad1 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 65204a282..0a1e31c89 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/port.c b/portable/GCC/RISC-V/port.c index 628df8307..afa3df0d8 100644 --- a/portable/GCC/RISC-V/port.c +++ b/portable/GCC/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/portASM.S b/portable/GCC/RISC-V/portASM.S index 9dde71f6a..b03a0da38 100644 --- a/portable/GCC/RISC-V/portASM.S +++ b/portable/GCC/RISC-V/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/portContext.h b/portable/GCC/RISC-V/portContext.h index c7eeeec66..c87f3a10d 100644 --- a/portable/GCC/RISC-V/portContext.h +++ b/portable/GCC/RISC-V/portContext.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/portmacro.h b/portable/GCC/RISC-V/portmacro.h index 727273aca..1e96e6054 100644 --- a/portable/GCC/RISC-V/portmacro.h +++ b/portable/GCC/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/isr_support.h b/portable/GCC/RL78/isr_support.h index 348af1d96..1ec3214db 100644 --- a/portable/GCC/RL78/isr_support.h +++ b/portable/GCC/RL78/isr_support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/port.c b/portable/GCC/RL78/port.c index 35ff7df53..202db8767 100644 --- a/portable/GCC/RL78/port.c +++ b/portable/GCC/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/portasm.S b/portable/GCC/RL78/portasm.S index 18ac665ed..141ca5bfe 100644 --- a/portable/GCC/RL78/portasm.S +++ b/portable/GCC/RL78/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/portmacro.h b/portable/GCC/RL78/portmacro.h index 349402008..3e8723211 100644 --- a/portable/GCC/RL78/portmacro.h +++ b/portable/GCC/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX100/port.c b/portable/GCC/RX100/port.c index fc1958658..8ee40bbeb 100644 --- a/portable/GCC/RX100/port.c +++ b/portable/GCC/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX100/portmacro.h b/portable/GCC/RX100/portmacro.h index 4556e147a..9359c2da3 100644 --- a/portable/GCC/RX100/portmacro.h +++ b/portable/GCC/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX200/port.c b/portable/GCC/RX200/port.c index 0f3770ac3..9103a9b56 100644 --- a/portable/GCC/RX200/port.c +++ b/portable/GCC/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX200/portmacro.h b/portable/GCC/RX200/portmacro.h index 40682825d..ccec3f8fb 100644 --- a/portable/GCC/RX200/portmacro.h +++ b/portable/GCC/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600/port.c b/portable/GCC/RX600/port.c index 0bc99683f..ce6b1a103 100644 --- a/portable/GCC/RX600/port.c +++ b/portable/GCC/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600/portmacro.h b/portable/GCC/RX600/portmacro.h index 7e7bbe88b..55ab17450 100644 --- a/portable/GCC/RX600/portmacro.h +++ b/portable/GCC/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600v2/port.c b/portable/GCC/RX600v2/port.c index ca96d8118..d727eb208 100644 --- a/portable/GCC/RX600v2/port.c +++ b/portable/GCC/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600v2/portmacro.h b/portable/GCC/RX600v2/portmacro.h index 7e7bbe88b..55ab17450 100644 --- a/portable/GCC/RX600v2/portmacro.h +++ b/portable/GCC/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX700v3_DPFPU/port.c b/portable/GCC/RX700v3_DPFPU/port.c index c89e7ee2a..75ed3ebf9 100644 --- a/portable/GCC/RX700v3_DPFPU/port.c +++ b/portable/GCC/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX700v3_DPFPU/portmacro.h b/portable/GCC/RX700v3_DPFPU/portmacro.h index 881610515..63a70062e 100644 --- a/portable/GCC/RX700v3_DPFPU/portmacro.h +++ b/portable/GCC/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/STR75x/port.c b/portable/GCC/STR75x/port.c index bd3b3ef78..f4a219c07 100644 --- a/portable/GCC/STR75x/port.c +++ b/portable/GCC/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/STR75x/portISR.c b/portable/GCC/STR75x/portISR.c index fd66e4cfd..fbbe57b11 100644 --- a/portable/GCC/STR75x/portISR.c +++ b/portable/GCC/STR75x/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/STR75x/portmacro.h b/portable/GCC/STR75x/portmacro.h index 876783dcb..fa96bc110 100644 --- a/portable/GCC/STR75x/portmacro.h +++ b/portable/GCC/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/TriCore_1782/port.c b/portable/GCC/TriCore_1782/port.c index 173fed0ad..b9b3535e9 100644 --- a/portable/GCC/TriCore_1782/port.c +++ b/portable/GCC/TriCore_1782/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/TriCore_1782/portmacro.h b/portable/GCC/TriCore_1782/portmacro.h index d17c7bc68..13a74c4e3 100644 --- a/portable/GCC/TriCore_1782/portmacro.h +++ b/portable/GCC/TriCore_1782/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/TriCore_1782/porttrap.c b/portable/GCC/TriCore_1782/porttrap.c index 79d6ea050..33b80cc8c 100644 --- a/portable/GCC/TriCore_1782/porttrap.c +++ b/portable/GCC/TriCore_1782/porttrap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/ISR_Support.h b/portable/IAR/78K0R/ISR_Support.h index 4eeb07774..3572d7db7 100644 --- a/portable/IAR/78K0R/ISR_Support.h +++ b/portable/IAR/78K0R/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/port.c b/portable/IAR/78K0R/port.c index 75f5a3e1d..770d71b25 100644 --- a/portable/IAR/78K0R/port.c +++ b/portable/IAR/78K0R/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/portasm.s26 b/portable/IAR/78K0R/portasm.s26 index 6b6b76137..464a5f5f8 100644 --- a/portable/IAR/78K0R/portasm.s26 +++ b/portable/IAR/78K0R/portasm.s26 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/portmacro.h b/portable/IAR/78K0R/portmacro.h index 03bb5dee7..e4fa185f0 100644 --- a/portable/IAR/78K0R/portmacro.h +++ b/portable/IAR/78K0R/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/port.c b/portable/IAR/ARM_CA5_No_GIC/port.c index b1c21586d..6461bdded 100644 --- a/portable/IAR/ARM_CA5_No_GIC/port.c +++ b/portable/IAR/ARM_CA5_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.h b/portable/IAR/ARM_CA5_No_GIC/portASM.h index 1a9006df3..63cf9af17 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.h +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.s b/portable/IAR/ARM_CA5_No_GIC/portASM.s index 8edcb6c55..5ab3027ee 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.s +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/portmacro.h b/portable/IAR/ARM_CA5_No_GIC/portmacro.h index b1dcf3878..f8a8e02d9 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CA5_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/port.c b/portable/IAR/ARM_CA9/port.c index aa6fcf881..97ab95e57 100644 --- a/portable/IAR/ARM_CA9/port.c +++ b/portable/IAR/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/portASM.h b/portable/IAR/ARM_CA9/portASM.h index e6df989da..4969a1009 100644 --- a/portable/IAR/ARM_CA9/portASM.h +++ b/portable/IAR/ARM_CA9/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/portASM.s b/portable/IAR/ARM_CA9/portASM.s index 56ec384c0..509203d85 100644 --- a/portable/IAR/ARM_CA9/portASM.s +++ b/portable/IAR/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/portmacro.h b/portable/IAR/ARM_CA9/portmacro.h index bce3013b5..c9bc25d34 100644 --- a/portable/IAR/ARM_CA9/portmacro.h +++ b/portable/IAR/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM0/port.c b/portable/IAR/ARM_CM0/port.c index c55af1fd8..4792d6c77 100644 --- a/portable/IAR/ARM_CM0/port.c +++ b/portable/IAR/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM0/portasm.s b/portable/IAR/ARM_CM0/portasm.s index 768ce41cb..7484511ed 100644 --- a/portable/IAR/ARM_CM0/portasm.s +++ b/portable/IAR/ARM_CM0/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM0/portmacro.h b/portable/IAR/ARM_CM0/portmacro.h index 5dcc949b2..5a22fc75c 100644 --- a/portable/IAR/ARM_CM0/portmacro.h +++ b/portable/IAR/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S index 867642b5e..fdb2db91b 100644 --- a/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.h b/portable/IAR/ARM_CM23/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.s b/portable/IAR/ARM_CM23/non_secure/portasm.s index 648ae0050..3b13f9432 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portmacro.h b/portable/IAR/ARM_CM23/non_secure/portmacro.h index 9cf0e87fb..6e5c4e1c8 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c index 0730d574d..8e6027e85 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/portable/IAR/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_context.h b/portable/IAR/ARM_CM23/secure/secure_context.h index d0adbaf01..4b7e8017e 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.h +++ b/portable/IAR/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s index f7c5d19d2..9dd82ff5d 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.c b/portable/IAR/ARM_CM23/secure/secure_heap.c index 157fdbf0e..6d566318e 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.c +++ b/portable/IAR/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.h b/portable/IAR/ARM_CM23/secure/secure_heap.h index c13590f86..c77d1cc96 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.h +++ b/portable/IAR/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_init.c b/portable/IAR/ARM_CM23/secure/secure_init.c index dc19ebc7d..e729dc8ca 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.c +++ b/portable/IAR/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_init.h b/portable/IAR/ARM_CM23/secure/secure_init.h index 21daeda6b..f905a423f 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.h +++ b/portable/IAR/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_port_macros.h b/portable/IAR/ARM_CM23/secure/secure_port_macros.h index 304913b8d..c95d2258b 100644 --- a/portable/IAR/ARM_CM23/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S index 867642b5e..fdb2db91b 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s index 8f77c4daf..640dff9b1 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h index 9cf0e87fb..6e5c4e1c8 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM3/port.c b/portable/IAR/ARM_CM3/port.c index 1e3a3ded0..dad16e17d 100755 --- a/portable/IAR/ARM_CM3/port.c +++ b/portable/IAR/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM3/portasm.s b/portable/IAR/ARM_CM3/portasm.s index 0dbb43b00..1265ccaaa 100644 --- a/portable/IAR/ARM_CM3/portasm.s +++ b/portable/IAR/ARM_CM3/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM3/portmacro.h b/portable/IAR/ARM_CM3/portmacro.h index 92763ac78..194e4c742 100644 --- a/portable/IAR/ARM_CM3/portmacro.h +++ b/portable/IAR/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S index f051a6073..96922c1e6 100644 --- a/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.h b/portable/IAR/ARM_CM33/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.s b/portable/IAR/ARM_CM33/non_secure/portasm.s index 15e74ffc1..7ea8c16ff 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portmacro.h b/portable/IAR/ARM_CM33/non_secure/portmacro.h index 380768fc0..1763094ef 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c index 0730d574d..8e6027e85 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/portable/IAR/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_context.h b/portable/IAR/ARM_CM33/secure/secure_context.h index d0adbaf01..4b7e8017e 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.h +++ b/portable/IAR/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s index 400bd0107..94d3d5240 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.c b/portable/IAR/ARM_CM33/secure/secure_heap.c index 157fdbf0e..6d566318e 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.c +++ b/portable/IAR/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.h b/portable/IAR/ARM_CM33/secure/secure_heap.h index c13590f86..c77d1cc96 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.h +++ b/portable/IAR/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_init.c b/portable/IAR/ARM_CM33/secure/secure_init.c index dc19ebc7d..e729dc8ca 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.c +++ b/portable/IAR/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_init.h b/portable/IAR/ARM_CM33/secure/secure_init.h index 21daeda6b..f905a423f 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.h +++ b/portable/IAR/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_port_macros.h b/portable/IAR/ARM_CM33/secure/secure_port_macros.h index 304913b8d..c95d2258b 100644 --- a/portable/IAR/ARM_CM33/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S index f051a6073..96922c1e6 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s index ec5202527..d63de40b4 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h index 815dca086..c193e4a2d 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S index f051a6073..96922c1e6 100644 --- a/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/port.c b/portable/IAR/ARM_CM35P/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/IAR/ARM_CM35P/non_secure/port.c +++ b/portable/IAR/ARM_CM35P/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portasm.h b/portable/IAR/ARM_CM35P/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portasm.h +++ b/portable/IAR/ARM_CM35P/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portasm.s b/portable/IAR/ARM_CM35P/non_secure/portasm.s index 15e74ffc1..7ea8c16ff 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portasm.s +++ b/portable/IAR/ARM_CM35P/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portmacro.h b/portable/IAR/ARM_CM35P/non_secure/portmacro.h index 46bc4e24b..265fcb76a 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM35P/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_context.c b/portable/IAR/ARM_CM35P/secure/secure_context.c index 0730d574d..8e6027e85 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_context.c +++ b/portable/IAR/ARM_CM35P/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_context.h b/portable/IAR/ARM_CM35P/secure/secure_context.h index d0adbaf01..4b7e8017e 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_context.h +++ b/portable/IAR/ARM_CM35P/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s index 400bd0107..94d3d5240 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_heap.c b/portable/IAR/ARM_CM35P/secure/secure_heap.c index 157fdbf0e..6d566318e 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_heap.c +++ b/portable/IAR/ARM_CM35P/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_heap.h b/portable/IAR/ARM_CM35P/secure/secure_heap.h index c13590f86..c77d1cc96 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_heap.h +++ b/portable/IAR/ARM_CM35P/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_init.c b/portable/IAR/ARM_CM35P/secure/secure_init.c index dc19ebc7d..e729dc8ca 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_init.c +++ b/portable/IAR/ARM_CM35P/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_init.h b/portable/IAR/ARM_CM35P/secure/secure_init.h index 21daeda6b..f905a423f 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_init.h +++ b/portable/IAR/ARM_CM35P/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_port_macros.h b/portable/IAR/ARM_CM35P/secure/secure_port_macros.h index 304913b8d..c95d2258b 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM35P/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S index f051a6073..96922c1e6 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s index ec5202527..d63de40b4 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h index 46bc4e24b..265fcb76a 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F/port.c b/portable/IAR/ARM_CM4F/port.c index 52f5ac287..51f552388 100755 --- a/portable/IAR/ARM_CM4F/port.c +++ b/portable/IAR/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F/portasm.s b/portable/IAR/ARM_CM4F/portasm.s index f4caf80bf..d626f2aa5 100644 --- a/portable/IAR/ARM_CM4F/portasm.s +++ b/portable/IAR/ARM_CM4F/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F/portmacro.h b/portable/IAR/ARM_CM4F/portmacro.h index 02f1d6ff0..8841dc342 100644 --- a/portable/IAR/ARM_CM4F/portmacro.h +++ b/portable/IAR/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S index a0541f790..f25951255 100644 --- a/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index 27f6f0d6c..f9e8f41d3 100755 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/portasm.s b/portable/IAR/ARM_CM4F_MPU/portasm.s index 3cbe5e0f5..afc1a9b31 100644 --- a/portable/IAR/ARM_CM4F_MPU/portasm.s +++ b/portable/IAR/ARM_CM4F_MPU/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h index 4bb8abcde..41c238c8f 100644 --- a/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S index f051a6073..96922c1e6 100644 --- a/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/port.c b/portable/IAR/ARM_CM55/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/IAR/ARM_CM55/non_secure/port.c +++ b/portable/IAR/ARM_CM55/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portasm.h b/portable/IAR/ARM_CM55/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/IAR/ARM_CM55/non_secure/portasm.h +++ b/portable/IAR/ARM_CM55/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portasm.s b/portable/IAR/ARM_CM55/non_secure/portasm.s index 15e74ffc1..7ea8c16ff 100644 --- a/portable/IAR/ARM_CM55/non_secure/portasm.s +++ b/portable/IAR/ARM_CM55/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portmacro.h b/portable/IAR/ARM_CM55/non_secure/portmacro.h index 7829ee618..64ce069f1 100644 --- a/portable/IAR/ARM_CM55/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM55/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_context.c b/portable/IAR/ARM_CM55/secure/secure_context.c index 0730d574d..8e6027e85 100644 --- a/portable/IAR/ARM_CM55/secure/secure_context.c +++ b/portable/IAR/ARM_CM55/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_context.h b/portable/IAR/ARM_CM55/secure/secure_context.h index d0adbaf01..4b7e8017e 100644 --- a/portable/IAR/ARM_CM55/secure/secure_context.h +++ b/portable/IAR/ARM_CM55/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s index 400bd0107..94d3d5240 100644 --- a/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_heap.c b/portable/IAR/ARM_CM55/secure/secure_heap.c index 157fdbf0e..6d566318e 100644 --- a/portable/IAR/ARM_CM55/secure/secure_heap.c +++ b/portable/IAR/ARM_CM55/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_heap.h b/portable/IAR/ARM_CM55/secure/secure_heap.h index c13590f86..c77d1cc96 100644 --- a/portable/IAR/ARM_CM55/secure/secure_heap.h +++ b/portable/IAR/ARM_CM55/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_init.c b/portable/IAR/ARM_CM55/secure/secure_init.c index dc19ebc7d..e729dc8ca 100644 --- a/portable/IAR/ARM_CM55/secure/secure_init.c +++ b/portable/IAR/ARM_CM55/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_init.h b/portable/IAR/ARM_CM55/secure/secure_init.h index 21daeda6b..f905a423f 100644 --- a/portable/IAR/ARM_CM55/secure/secure_init.h +++ b/portable/IAR/ARM_CM55/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_port_macros.h b/portable/IAR/ARM_CM55/secure/secure_port_macros.h index 304913b8d..c95d2258b 100644 --- a/portable/IAR/ARM_CM55/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM55/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S index f051a6073..96922c1e6 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s index ec5202527..d63de40b4 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h index 7829ee618..64ce069f1 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM7/r0p1/port.c b/portable/IAR/ARM_CM7/r0p1/port.c index c1a1cc5aa..92e592b46 100755 --- a/portable/IAR/ARM_CM7/r0p1/port.c +++ b/portable/IAR/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM7/r0p1/portasm.s b/portable/IAR/ARM_CM7/r0p1/portasm.s index 483178d96..5f5ed5ff8 100644 --- a/portable/IAR/ARM_CM7/r0p1/portasm.s +++ b/portable/IAR/ARM_CM7/r0p1/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM7/r0p1/portmacro.h b/portable/IAR/ARM_CM7/r0p1/portmacro.h index a2a2d8788..86729b409 100644 --- a/portable/IAR/ARM_CM7/r0p1/portmacro.h +++ b/portable/IAR/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S index f051a6073..96922c1e6 100644 --- a/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/port.c b/portable/IAR/ARM_CM85/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/IAR/ARM_CM85/non_secure/port.c +++ b/portable/IAR/ARM_CM85/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portasm.h b/portable/IAR/ARM_CM85/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/IAR/ARM_CM85/non_secure/portasm.h +++ b/portable/IAR/ARM_CM85/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portasm.s b/portable/IAR/ARM_CM85/non_secure/portasm.s index 15e74ffc1..7ea8c16ff 100644 --- a/portable/IAR/ARM_CM85/non_secure/portasm.s +++ b/portable/IAR/ARM_CM85/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portmacro.h b/portable/IAR/ARM_CM85/non_secure/portmacro.h index 3b51cb5ff..c5b81bdd3 100644 --- a/portable/IAR/ARM_CM85/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM85/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_context.c b/portable/IAR/ARM_CM85/secure/secure_context.c index 0730d574d..8e6027e85 100644 --- a/portable/IAR/ARM_CM85/secure/secure_context.c +++ b/portable/IAR/ARM_CM85/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_context.h b/portable/IAR/ARM_CM85/secure/secure_context.h index d0adbaf01..4b7e8017e 100644 --- a/portable/IAR/ARM_CM85/secure/secure_context.h +++ b/portable/IAR/ARM_CM85/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s index 400bd0107..94d3d5240 100644 --- a/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_heap.c b/portable/IAR/ARM_CM85/secure/secure_heap.c index 157fdbf0e..6d566318e 100644 --- a/portable/IAR/ARM_CM85/secure/secure_heap.c +++ b/portable/IAR/ARM_CM85/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_heap.h b/portable/IAR/ARM_CM85/secure/secure_heap.h index c13590f86..c77d1cc96 100644 --- a/portable/IAR/ARM_CM85/secure/secure_heap.h +++ b/portable/IAR/ARM_CM85/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_init.c b/portable/IAR/ARM_CM85/secure/secure_init.c index dc19ebc7d..e729dc8ca 100644 --- a/portable/IAR/ARM_CM85/secure/secure_init.c +++ b/portable/IAR/ARM_CM85/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_init.h b/portable/IAR/ARM_CM85/secure/secure_init.h index 21daeda6b..f905a423f 100644 --- a/portable/IAR/ARM_CM85/secure/secure_init.h +++ b/portable/IAR/ARM_CM85/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_port_macros.h b/portable/IAR/ARM_CM85/secure/secure_port_macros.h index 304913b8d..c95d2258b 100644 --- a/portable/IAR/ARM_CM85/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM85/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S index f051a6073..96922c1e6 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c index cab1b3668..b14db7cea 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h index ecd86b97f..600a38494 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s index ec5202527..d63de40b4 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h index 3b51cb5ff..c5b81bdd3 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h index 65ac109c8..8c8924d72 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CRx_No_GIC/port.c b/portable/IAR/ARM_CRx_No_GIC/port.c index 799a20e17..0f88f722f 100644 --- a/portable/IAR/ARM_CRx_No_GIC/port.c +++ b/portable/IAR/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CRx_No_GIC/portASM.s b/portable/IAR/ARM_CRx_No_GIC/portASM.s index 6883cced4..a0461a97e 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portASM.s +++ b/portable/IAR/ARM_CRx_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CRx_No_GIC/portmacro.h b/portable/IAR/ARM_CRx_No_GIC/portmacro.h index 82853af3c..4c48e69b2 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ATMega323/port.c b/portable/IAR/ATMega323/port.c index 19aac2476..1d2c03e1e 100644 --- a/portable/IAR/ATMega323/port.c +++ b/portable/IAR/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ATMega323/portmacro.h b/portable/IAR/ATMega323/portmacro.h index cbc7b2d15..b872cde45 100644 --- a/portable/IAR/ATMega323/portmacro.h +++ b/portable/IAR/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ATMega323/portmacro.s90 b/portable/IAR/ATMega323/portmacro.s90 index 8c72f410f..09c11149d 100644 --- a/portable/IAR/ATMega323/portmacro.s90 +++ b/portable/IAR/ATMega323/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR32_UC3/exception.s82 b/portable/IAR/AVR32_UC3/exception.s82 index 12012e420..f149fa25b 100644 --- a/portable/IAR/AVR32_UC3/exception.s82 +++ b/portable/IAR/AVR32_UC3/exception.s82 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/port.c b/portable/IAR/AVR32_UC3/port.c index 00d51af2a..a4a563381 100644 --- a/portable/IAR/AVR32_UC3/port.c +++ b/portable/IAR/AVR32_UC3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/portmacro.h b/portable/IAR/AVR32_UC3/portmacro.h index 98aa5be07..12d5209bc 100644 --- a/portable/IAR/AVR32_UC3/portmacro.h +++ b/portable/IAR/AVR32_UC3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/read.c b/portable/IAR/AVR32_UC3/read.c index e0fbed04d..f91ca0ff5 100644 --- a/portable/IAR/AVR32_UC3/read.c +++ b/portable/IAR/AVR32_UC3/read.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/write.c b/portable/IAR/AVR32_UC3/write.c index c6e94292e..50469cf8a 100644 --- a/portable/IAR/AVR32_UC3/write.c +++ b/portable/IAR/AVR32_UC3/write.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR_AVRDx/port.c b/portable/IAR/AVR_AVRDx/port.c index 8d8f22331..7aab28cb8 100644 --- a/portable/IAR/AVR_AVRDx/port.c +++ b/portable/IAR/AVR_AVRDx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_AVRDx/porthardware.h b/portable/IAR/AVR_AVRDx/porthardware.h index c313e0c69..beb0deef5 100644 --- a/portable/IAR/AVR_AVRDx/porthardware.h +++ b/portable/IAR/AVR_AVRDx/porthardware.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_AVRDx/portmacro.h b/portable/IAR/AVR_AVRDx/portmacro.h index cb3cb7ec2..091315b10 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.h +++ b/portable/IAR/AVR_AVRDx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_AVRDx/portmacro.s90 b/portable/IAR/AVR_AVRDx/portmacro.s90 index dc72ccf58..19da36006 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.s90 +++ b/portable/IAR/AVR_AVRDx/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/port.c b/portable/IAR/AVR_Mega0/port.c index 4dc8ab3c3..39aac5ef1 100644 --- a/portable/IAR/AVR_Mega0/port.c +++ b/portable/IAR/AVR_Mega0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/porthardware.h b/portable/IAR/AVR_Mega0/porthardware.h index c7341447c..11c3198fb 100644 --- a/portable/IAR/AVR_Mega0/porthardware.h +++ b/portable/IAR/AVR_Mega0/porthardware.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/portmacro.h b/portable/IAR/AVR_Mega0/portmacro.h index cb3cb7ec2..091315b10 100644 --- a/portable/IAR/AVR_Mega0/portmacro.h +++ b/portable/IAR/AVR_Mega0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/portmacro.s90 b/portable/IAR/AVR_Mega0/portmacro.s90 index 2e5046325..8efe1b828 100644 --- a/portable/IAR/AVR_Mega0/portmacro.s90 +++ b/portable/IAR/AVR_Mega0/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/ISR_Support.h b/portable/IAR/AtmelSAM7S64/ISR_Support.h index 4651c2d13..15d5cc303 100644 --- a/portable/IAR/AtmelSAM7S64/ISR_Support.h +++ b/portable/IAR/AtmelSAM7S64/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/port.c b/portable/IAR/AtmelSAM7S64/port.c index 324897023..56f13e9e9 100644 --- a/portable/IAR/AtmelSAM7S64/port.c +++ b/portable/IAR/AtmelSAM7S64/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/portasm.s79 b/portable/IAR/AtmelSAM7S64/portasm.s79 index b01bcf548..938ade238 100644 --- a/portable/IAR/AtmelSAM7S64/portasm.s79 +++ b/portable/IAR/AtmelSAM7S64/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/portmacro.h b/portable/IAR/AtmelSAM7S64/portmacro.h index 9bcf8a670..5f289c1ba 100644 --- a/portable/IAR/AtmelSAM7S64/portmacro.h +++ b/portable/IAR/AtmelSAM7S64/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/ISR_Support.h b/portable/IAR/AtmelSAM9XE/ISR_Support.h index 44414ecf8..6eaa2e268 100644 --- a/portable/IAR/AtmelSAM9XE/ISR_Support.h +++ b/portable/IAR/AtmelSAM9XE/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/port.c b/portable/IAR/AtmelSAM9XE/port.c index cb4b7bed6..9523f2d40 100644 --- a/portable/IAR/AtmelSAM9XE/port.c +++ b/portable/IAR/AtmelSAM9XE/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/portasm.s79 b/portable/IAR/AtmelSAM9XE/portasm.s79 index d3434ecca..cdd0af17d 100644 --- a/portable/IAR/AtmelSAM9XE/portasm.s79 +++ b/portable/IAR/AtmelSAM9XE/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/portmacro.h b/portable/IAR/AtmelSAM9XE/portmacro.h index fdc7c2ba6..979f6c0d5 100644 --- a/portable/IAR/AtmelSAM9XE/portmacro.h +++ b/portable/IAR/AtmelSAM9XE/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/ISR_Support.h b/portable/IAR/LPC2000/ISR_Support.h index 4651c2d13..15d5cc303 100644 --- a/portable/IAR/LPC2000/ISR_Support.h +++ b/portable/IAR/LPC2000/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/port.c b/portable/IAR/LPC2000/port.c index 3758c5dcf..a306a7ca5 100644 --- a/portable/IAR/LPC2000/port.c +++ b/portable/IAR/LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/portasm.s79 b/portable/IAR/LPC2000/portasm.s79 index eb1793315..d289db870 100644 --- a/portable/IAR/LPC2000/portasm.s79 +++ b/portable/IAR/LPC2000/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/portmacro.h b/portable/IAR/LPC2000/portmacro.h index 2929ecba5..f4f2bbe24 100644 --- a/portable/IAR/LPC2000/portmacro.h +++ b/portable/IAR/LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/port.c b/portable/IAR/MSP430/port.c index 4375634d7..d8680cd07 100644 --- a/portable/IAR/MSP430/port.c +++ b/portable/IAR/MSP430/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/portasm.h b/portable/IAR/MSP430/portasm.h index 5a8fa0a52..f86c2a7ce 100644 --- a/portable/IAR/MSP430/portasm.h +++ b/portable/IAR/MSP430/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/portext.s43 b/portable/IAR/MSP430/portext.s43 index 5360a9700..6a9ba369a 100644 --- a/portable/IAR/MSP430/portext.s43 +++ b/portable/IAR/MSP430/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/portmacro.h b/portable/IAR/MSP430/portmacro.h index 6dcec2f03..b904f7d88 100644 --- a/portable/IAR/MSP430/portmacro.h +++ b/portable/IAR/MSP430/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/data_model.h b/portable/IAR/MSP430X/data_model.h index 060135603..49f274b5c 100644 --- a/portable/IAR/MSP430X/data_model.h +++ b/portable/IAR/MSP430X/data_model.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/port.c b/portable/IAR/MSP430X/port.c index ea35d9ac7..31854362d 100644 --- a/portable/IAR/MSP430X/port.c +++ b/portable/IAR/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/portext.s43 b/portable/IAR/MSP430X/portext.s43 index cc2f592a3..4915d4aa3 100644 --- a/portable/IAR/MSP430X/portext.s43 +++ b/portable/IAR/MSP430X/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/portmacro.h b/portable/IAR/MSP430X/portmacro.h index 72456cf11..822e7798d 100644 --- a/portable/IAR/MSP430X/portmacro.h +++ b/portable/IAR/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 326183148..c84977ecd 100644 --- a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/port.c b/portable/IAR/RISC-V/port.c index 984b8338a..4c7f03851 100644 --- a/portable/IAR/RISC-V/port.c +++ b/portable/IAR/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/portASM.s b/portable/IAR/RISC-V/portASM.s index 005b0eb90..dbeaac623 100644 --- a/portable/IAR/RISC-V/portASM.s +++ b/portable/IAR/RISC-V/portASM.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/portContext.h b/portable/IAR/RISC-V/portContext.h index b8f895849..9eec4b4db 100644 --- a/portable/IAR/RISC-V/portContext.h +++ b/portable/IAR/RISC-V/portContext.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/portmacro.h b/portable/IAR/RISC-V/portmacro.h index 5dddb454c..8241a6999 100644 --- a/portable/IAR/RISC-V/portmacro.h +++ b/portable/IAR/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RL78/port.c b/portable/IAR/RL78/port.c index 2f9a08cb8..d27edc6fb 100644 --- a/portable/IAR/RL78/port.c +++ b/portable/IAR/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RL78/portasm.s b/portable/IAR/RL78/portasm.s index f328d1bec..432225f59 100644 --- a/portable/IAR/RL78/portasm.s +++ b/portable/IAR/RL78/portasm.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RL78/portmacro.h b/portable/IAR/RL78/portmacro.h index 1cfe85fa6..5c9e289c8 100644 --- a/portable/IAR/RL78/portmacro.h +++ b/portable/IAR/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX100/port.c b/portable/IAR/RX100/port.c index db9bdceb4..8c511c459 100644 --- a/portable/IAR/RX100/port.c +++ b/portable/IAR/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX100/port_asm.s b/portable/IAR/RX100/port_asm.s index 224f4484a..72e0310af 100644 --- a/portable/IAR/RX100/port_asm.s +++ b/portable/IAR/RX100/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX100/portmacro.h b/portable/IAR/RX100/portmacro.h index e53c43e4c..a62fdc098 100644 --- a/portable/IAR/RX100/portmacro.h +++ b/portable/IAR/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX600/port.c b/portable/IAR/RX600/port.c index 547f7fb4d..e1d473f79 100644 --- a/portable/IAR/RX600/port.c +++ b/portable/IAR/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX600/port_asm.s b/portable/IAR/RX600/port_asm.s index d6584264b..2f4fdaa74 100644 --- a/portable/IAR/RX600/port_asm.s +++ b/portable/IAR/RX600/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX600/portmacro.h b/portable/IAR/RX600/portmacro.h index 1b1bec3fc..0921840dc 100644 --- a/portable/IAR/RX600/portmacro.h +++ b/portable/IAR/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX700v3_DPFPU/port.c b/portable/IAR/RX700v3_DPFPU/port.c index a77efa725..de9eddff0 100644 --- a/portable/IAR/RX700v3_DPFPU/port.c +++ b/portable/IAR/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX700v3_DPFPU/portmacro.h b/portable/IAR/RX700v3_DPFPU/portmacro.h index f8fde2790..4e5c3ebc5 100644 --- a/portable/IAR/RX700v3_DPFPU/portmacro.h +++ b/portable/IAR/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RXv2/port.c b/portable/IAR/RXv2/port.c index f791f44dc..d6ac05f76 100644 --- a/portable/IAR/RXv2/port.c +++ b/portable/IAR/RXv2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RXv2/port_asm.s b/portable/IAR/RXv2/port_asm.s index 6fe6c1d18..14bae31e9 100644 --- a/portable/IAR/RXv2/port_asm.s +++ b/portable/IAR/RXv2/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RXv2/portmacro.h b/portable/IAR/RXv2/portmacro.h index 3f8448448..2fde7d017 100644 --- a/portable/IAR/RXv2/portmacro.h +++ b/portable/IAR/RXv2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/ISR_Support.h b/portable/IAR/STR71x/ISR_Support.h index 4651c2d13..15d5cc303 100644 --- a/portable/IAR/STR71x/ISR_Support.h +++ b/portable/IAR/STR71x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/port.c b/portable/IAR/STR71x/port.c index a7530e807..ed9489405 100644 --- a/portable/IAR/STR71x/port.c +++ b/portable/IAR/STR71x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/portasm.s79 b/portable/IAR/STR71x/portasm.s79 index 88acc6823..aebaa3757 100644 --- a/portable/IAR/STR71x/portasm.s79 +++ b/portable/IAR/STR71x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/portmacro.h b/portable/IAR/STR71x/portmacro.h index 1fbadff3e..cfad05b40 100644 --- a/portable/IAR/STR71x/portmacro.h +++ b/portable/IAR/STR71x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/ISR_Support.h b/portable/IAR/STR75x/ISR_Support.h index 4651c2d13..15d5cc303 100644 --- a/portable/IAR/STR75x/ISR_Support.h +++ b/portable/IAR/STR75x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/port.c b/portable/IAR/STR75x/port.c index 4286a328b..5e6897a69 100644 --- a/portable/IAR/STR75x/port.c +++ b/portable/IAR/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/portasm.s79 b/portable/IAR/STR75x/portasm.s79 index 9427da1d9..b8d113833 100644 --- a/portable/IAR/STR75x/portasm.s79 +++ b/portable/IAR/STR75x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/portmacro.h b/portable/IAR/STR75x/portmacro.h index 94a7b72ed..81654aca4 100644 --- a/portable/IAR/STR75x/portmacro.h +++ b/portable/IAR/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/ISR_Support.h b/portable/IAR/STR91x/ISR_Support.h index 5142c7c56..d88ee691b 100644 --- a/portable/IAR/STR91x/ISR_Support.h +++ b/portable/IAR/STR91x/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/port.c b/portable/IAR/STR91x/port.c index 8a089e243..02a3b17cd 100644 --- a/portable/IAR/STR91x/port.c +++ b/portable/IAR/STR91x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/portasm.s79 b/portable/IAR/STR91x/portasm.s79 index 575c35fb3..b8456df34 100644 --- a/portable/IAR/STR91x/portasm.s79 +++ b/portable/IAR/STR91x/portasm.s79 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/portmacro.h b/portable/IAR/STR91x/portmacro.h index b5429b57d..179baa4c2 100644 --- a/portable/IAR/STR91x/portmacro.h +++ b/portable/IAR/STR91x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/ISR_Support.h b/portable/IAR/V850ES/ISR_Support.h index 28c569152..d8138eea3 100644 --- a/portable/IAR/V850ES/ISR_Support.h +++ b/portable/IAR/V850ES/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/port.c b/portable/IAR/V850ES/port.c index 10e5c4598..a34af3e76 100644 --- a/portable/IAR/V850ES/port.c +++ b/portable/IAR/V850ES/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portasm.s85 b/portable/IAR/V850ES/portasm.s85 index 6f795acbd..1217b64f5 100644 --- a/portable/IAR/V850ES/portasm.s85 +++ b/portable/IAR/V850ES/portasm.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portasm_Fx3.s85 b/portable/IAR/V850ES/portasm_Fx3.s85 index 412077a63..beddc98ab 100644 --- a/portable/IAR/V850ES/portasm_Fx3.s85 +++ b/portable/IAR/V850ES/portasm_Fx3.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portasm_Hx2.s85 b/portable/IAR/V850ES/portasm_Hx2.s85 index 373431f84..ce8de3651 100644 --- a/portable/IAR/V850ES/portasm_Hx2.s85 +++ b/portable/IAR/V850ES/portasm_Hx2.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portmacro.h b/portable/IAR/V850ES/portmacro.h index cfae9ae7c..b8a874fa0 100644 --- a/portable/IAR/V850ES/portmacro.h +++ b/portable/IAR/V850ES/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC18F/port.c b/portable/MPLAB/PIC18F/port.c index 1a1827e42..f2a5acbe0 100644 --- a/portable/MPLAB/PIC18F/port.c +++ b/portable/MPLAB/PIC18F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC18F/portmacro.h b/portable/MPLAB/PIC18F/portmacro.h index 6fef1afe2..86ce75902 100644 --- a/portable/MPLAB/PIC18F/portmacro.h +++ b/portable/MPLAB/PIC18F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/port.c b/portable/MPLAB/PIC24_dsPIC/port.c index 6f23fe8a2..dfd6a1d85 100644 --- a/portable/MPLAB/PIC24_dsPIC/port.c +++ b/portable/MPLAB/PIC24_dsPIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S index 0019d9b45..14d8c83d2 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S index ea46426f4..2321a6bde 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/portmacro.h b/portable/MPLAB/PIC24_dsPIC/portmacro.h index 0cc26f206..82883af7a 100644 --- a/portable/MPLAB/PIC24_dsPIC/portmacro.h +++ b/portable/MPLAB/PIC24_dsPIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h index d2fa5bb4d..862998e76 100644 --- a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h +++ b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/port.c b/portable/MPLAB/PIC32MEC14xx/port.c index ebe9bdb7c..6fc2b0f02 100644 --- a/portable/MPLAB/PIC32MEC14xx/port.c +++ b/portable/MPLAB/PIC32MEC14xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/port_asm.S b/portable/MPLAB/PIC32MEC14xx/port_asm.S index cb5aff269..1c0da410a 100644 --- a/portable/MPLAB/PIC32MEC14xx/port_asm.S +++ b/portable/MPLAB/PIC32MEC14xx/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/portmacro.h b/portable/MPLAB/PIC32MEC14xx/portmacro.h index 9e00a1c05..73d96cc54 100644 --- a/portable/MPLAB/PIC32MEC14xx/portmacro.h +++ b/portable/MPLAB/PIC32MEC14xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/ISR_Support.h b/portable/MPLAB/PIC32MX/ISR_Support.h index d594c7cc7..df7efd8da 100644 --- a/portable/MPLAB/PIC32MX/ISR_Support.h +++ b/portable/MPLAB/PIC32MX/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/port.c b/portable/MPLAB/PIC32MX/port.c index 97c3ceba3..f7e88196c 100644 --- a/portable/MPLAB/PIC32MX/port.c +++ b/portable/MPLAB/PIC32MX/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/port_asm.S b/portable/MPLAB/PIC32MX/port_asm.S index bc1448dee..76dec3381 100644 --- a/portable/MPLAB/PIC32MX/port_asm.S +++ b/portable/MPLAB/PIC32MX/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/portmacro.h b/portable/MPLAB/PIC32MX/portmacro.h index e0bf8dbd1..a2808bf1e 100644 --- a/portable/MPLAB/PIC32MX/portmacro.h +++ b/portable/MPLAB/PIC32MX/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/ISR_Support.h b/portable/MPLAB/PIC32MZ/ISR_Support.h index a9ddee0f4..53c011809 100644 --- a/portable/MPLAB/PIC32MZ/ISR_Support.h +++ b/portable/MPLAB/PIC32MZ/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/port.c b/portable/MPLAB/PIC32MZ/port.c index cc711f858..b9fa99e29 100644 --- a/portable/MPLAB/PIC32MZ/port.c +++ b/portable/MPLAB/PIC32MZ/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/port_asm.S b/portable/MPLAB/PIC32MZ/port_asm.S index 4e7f639c4..a5e226001 100644 --- a/portable/MPLAB/PIC32MZ/port_asm.S +++ b/portable/MPLAB/PIC32MZ/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/portmacro.h b/portable/MPLAB/PIC32MZ/portmacro.h index 371bcab6f..c4c846f3c 100644 --- a/portable/MPLAB/PIC32MZ/portmacro.h +++ b/portable/MPLAB/PIC32MZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MSVC-MingW/port.c b/portable/MSVC-MingW/port.c index f39f0ecbb..7db761eb5 100644 --- a/portable/MSVC-MingW/port.c +++ b/portable/MSVC-MingW/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MSVC-MingW/portmacro.h b/portable/MSVC-MingW/portmacro.h index b1282b3d7..d7bd0915f 100644 --- a/portable/MSVC-MingW/portmacro.h +++ b/portable/MSVC-MingW/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_1.c b/portable/MemMang/heap_1.c index 19f695b20..1a2f7fd9f 100644 --- a/portable/MemMang/heap_1.c +++ b/portable/MemMang/heap_1.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_2.c b/portable/MemMang/heap_2.c index 67f1c3aed..530bd955b 100644 --- a/portable/MemMang/heap_2.c +++ b/portable/MemMang/heap_2.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_3.c b/portable/MemMang/heap_3.c index d174a57e9..76665e7b5 100644 --- a/portable/MemMang/heap_3.c +++ b/portable/MemMang/heap_3.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_4.c b/portable/MemMang/heap_4.c index c7a8209ed..8ef8c9a6c 100644 --- a/portable/MemMang/heap_4.c +++ b/portable/MemMang/heap_4.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_5.c b/portable/MemMang/heap_5.c index db9e1eb37..bddc37c21 100644 --- a/portable/MemMang/heap_5.c +++ b/portable/MemMang/heap_5.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MikroC/ARM_CM4F/port.c b/portable/MikroC/ARM_CM4F/port.c index 91c924a05..37f25a50f 100755 --- a/portable/MikroC/ARM_CM4F/port.c +++ b/portable/MikroC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MikroC/ARM_CM4F/portmacro.h b/portable/MikroC/ARM_CM4F/portmacro.h index b67a0a9d6..0963b6d69 100644 --- a/portable/MikroC/ARM_CM4F/portmacro.h +++ b/portable/MikroC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/large_untested/port.c b/portable/Paradigm/Tern_EE/large_untested/port.c index 4ecffe01a..39dfa2739 100644 --- a/portable/Paradigm/Tern_EE/large_untested/port.c +++ b/portable/Paradigm/Tern_EE/large_untested/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/large_untested/portasm.h b/portable/Paradigm/Tern_EE/large_untested/portasm.h index c3c7456a3..f413ff670 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portasm.h +++ b/portable/Paradigm/Tern_EE/large_untested/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/large_untested/portmacro.h b/portable/Paradigm/Tern_EE/large_untested/portmacro.h index 292c9e260..90b3fbb4a 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portmacro.h +++ b/portable/Paradigm/Tern_EE/large_untested/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/small/port.c b/portable/Paradigm/Tern_EE/small/port.c index 2a1c0d962..aec1a3e2d 100644 --- a/portable/Paradigm/Tern_EE/small/port.c +++ b/portable/Paradigm/Tern_EE/small/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/small/portasm.h b/portable/Paradigm/Tern_EE/small/portasm.h index 930da20b0..d27e03f59 100644 --- a/portable/Paradigm/Tern_EE/small/portasm.h +++ b/portable/Paradigm/Tern_EE/small/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/small/portmacro.h b/portable/Paradigm/Tern_EE/small/portmacro.h index ff0b34b20..1fc88d74f 100644 --- a/portable/Paradigm/Tern_EE/small/portmacro.h +++ b/portable/Paradigm/Tern_EE/small/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/port.c b/portable/RVDS/ARM7_LPC21xx/port.c index a060c045f..1fe78d6de 100644 --- a/portable/RVDS/ARM7_LPC21xx/port.c +++ b/portable/RVDS/ARM7_LPC21xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/portASM.s b/portable/RVDS/ARM7_LPC21xx/portASM.s index 4398ca128..ce3fbcbfd 100644 --- a/portable/RVDS/ARM7_LPC21xx/portASM.s +++ b/portable/RVDS/ARM7_LPC21xx/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.h b/portable/RVDS/ARM7_LPC21xx/portmacro.h index 95043eb8d..f09ae0867 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.h +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.inc b/portable/RVDS/ARM7_LPC21xx/portmacro.inc index 62b1a8731..61c3c9292 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.inc +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/port.c b/portable/RVDS/ARM_CA9/port.c index 661e44500..0f9fa15a4 100644 --- a/portable/RVDS/ARM_CA9/port.c +++ b/portable/RVDS/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/portASM.s b/portable/RVDS/ARM_CA9/portASM.s index a5ac2fc0b..f655e8b72 100644 --- a/portable/RVDS/ARM_CA9/portASM.s +++ b/portable/RVDS/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/portmacro.h b/portable/RVDS/ARM_CA9/portmacro.h index 1351dae9f..e242b4934 100644 --- a/portable/RVDS/ARM_CA9/portmacro.h +++ b/portable/RVDS/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/portmacro.inc b/portable/RVDS/ARM_CA9/portmacro.inc index 93b8d8db6..1df4ebdb3 100644 --- a/portable/RVDS/ARM_CA9/portmacro.inc +++ b/portable/RVDS/ARM_CA9/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM0/port.c b/portable/RVDS/ARM_CM0/port.c index 6af94943f..fb2151a1d 100644 --- a/portable/RVDS/ARM_CM0/port.c +++ b/portable/RVDS/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM0/portmacro.h b/portable/RVDS/ARM_CM0/portmacro.h index 4a1ea8a7b..883fc383a 100644 --- a/portable/RVDS/ARM_CM0/portmacro.h +++ b/portable/RVDS/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM3/port.c b/portable/RVDS/ARM_CM3/port.c index 91038fd69..bfab38f5f 100755 --- a/portable/RVDS/ARM_CM3/port.c +++ b/portable/RVDS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM3/portmacro.h b/portable/RVDS/ARM_CM3/portmacro.h index c23a6b3fd..36b586b2c 100644 --- a/portable/RVDS/ARM_CM3/portmacro.h +++ b/portable/RVDS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4F/port.c b/portable/RVDS/ARM_CM4F/port.c index 3c2040596..30a5c49b4 100755 --- a/portable/RVDS/ARM_CM4F/port.c +++ b/portable/RVDS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4F/portmacro.h b/portable/RVDS/ARM_CM4F/portmacro.h index de92c8d4b..da24d1173 100644 --- a/portable/RVDS/ARM_CM4F/portmacro.h +++ b/portable/RVDS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c b/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c index aa1e825fc..f3f817dff 100644 --- a/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c +++ b/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index beb52ea22..2d22db313 100755 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h index cc4e136d6..16b80468e 100644 --- a/portable/RVDS/ARM_CM4_MPU/portmacro.h +++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM7/r0p1/port.c b/portable/RVDS/ARM_CM7/r0p1/port.c index 8414acc99..5e14708d9 100755 --- a/portable/RVDS/ARM_CM7/r0p1/port.c +++ b/portable/RVDS/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM7/r0p1/portmacro.h b/portable/RVDS/ARM_CM7/r0p1/portmacro.h index a8fa6630e..b1cec5ffc 100644 --- a/portable/RVDS/ARM_CM7/r0p1/portmacro.h +++ b/portable/RVDS/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX100/port.c b/portable/Renesas/RX100/port.c index 9e8db4f04..608bc4011 100644 --- a/portable/Renesas/RX100/port.c +++ b/portable/Renesas/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX100/port_asm.src b/portable/Renesas/RX100/port_asm.src index b3e60a416..6308f6b27 100644 --- a/portable/Renesas/RX100/port_asm.src +++ b/portable/Renesas/RX100/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX100/portmacro.h b/portable/Renesas/RX100/portmacro.h index b82fdca24..ae55bed15 100644 --- a/portable/Renesas/RX100/portmacro.h +++ b/portable/Renesas/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX200/port.c b/portable/Renesas/RX200/port.c index d60ac8fff..0fa036dfa 100644 --- a/portable/Renesas/RX200/port.c +++ b/portable/Renesas/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX200/port_asm.src b/portable/Renesas/RX200/port_asm.src index b3e60a416..6308f6b27 100644 --- a/portable/Renesas/RX200/port_asm.src +++ b/portable/Renesas/RX200/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX200/portmacro.h b/portable/Renesas/RX200/portmacro.h index 55278dacb..c27079fd2 100644 --- a/portable/Renesas/RX200/portmacro.h +++ b/portable/Renesas/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600/port.c b/portable/Renesas/RX600/port.c index 5438f5764..93c733db3 100644 --- a/portable/Renesas/RX600/port.c +++ b/portable/Renesas/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600/port_asm.src b/portable/Renesas/RX600/port_asm.src index b3e60a416..6308f6b27 100644 --- a/portable/Renesas/RX600/port_asm.src +++ b/portable/Renesas/RX600/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600/portmacro.h b/portable/Renesas/RX600/portmacro.h index 60106ae13..c39b97493 100644 --- a/portable/Renesas/RX600/portmacro.h +++ b/portable/Renesas/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600v2/port.c b/portable/Renesas/RX600v2/port.c index ee7da87e6..8ed612c4d 100644 --- a/portable/Renesas/RX600v2/port.c +++ b/portable/Renesas/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600v2/port_asm.src b/portable/Renesas/RX600v2/port_asm.src index 6fdcef60d..3c4aefb86 100644 --- a/portable/Renesas/RX600v2/port_asm.src +++ b/portable/Renesas/RX600v2/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600v2/portmacro.h b/portable/Renesas/RX600v2/portmacro.h index 6efba647d..25ca79bab 100644 --- a/portable/Renesas/RX600v2/portmacro.h +++ b/portable/Renesas/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX700v3_DPFPU/port.c b/portable/Renesas/RX700v3_DPFPU/port.c index 26cb9f020..fc1b87427 100644 --- a/portable/Renesas/RX700v3_DPFPU/port.c +++ b/portable/Renesas/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX700v3_DPFPU/port_asm.src b/portable/Renesas/RX700v3_DPFPU/port_asm.src index 6fdcef60d..3c4aefb86 100644 --- a/portable/Renesas/RX700v3_DPFPU/port_asm.src +++ b/portable/Renesas/RX700v3_DPFPU/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX700v3_DPFPU/portmacro.h b/portable/Renesas/RX700v3_DPFPU/portmacro.h index fef13556e..dcb349687 100644 --- a/portable/Renesas/RX700v3_DPFPU/portmacro.h +++ b/portable/Renesas/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/ISR_Support.inc b/portable/Renesas/SH2A_FPU/ISR_Support.inc index 3128c526e..b974a7f07 100644 --- a/portable/Renesas/SH2A_FPU/ISR_Support.inc +++ b/portable/Renesas/SH2A_FPU/ISR_Support.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/port.c b/portable/Renesas/SH2A_FPU/port.c index 82c06fa5a..f2dfb7f4a 100644 --- a/portable/Renesas/SH2A_FPU/port.c +++ b/portable/Renesas/SH2A_FPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/portasm.src b/portable/Renesas/SH2A_FPU/portasm.src index 6164f7644..8a097d603 100644 --- a/portable/Renesas/SH2A_FPU/portasm.src +++ b/portable/Renesas/SH2A_FPU/portasm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/portmacro.h b/portable/Renesas/SH2A_FPU/portmacro.h index 0ff2e323a..6c1806d7e 100644 --- a/portable/Renesas/SH2A_FPU/portmacro.h +++ b/portable/Renesas/SH2A_FPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/port.c b/portable/Rowley/MSP430F449/port.c index 992e3e763..b294905f7 100644 --- a/portable/Rowley/MSP430F449/port.c +++ b/portable/Rowley/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/portasm.h b/portable/Rowley/MSP430F449/portasm.h index 96c27cdac..29153821e 100644 --- a/portable/Rowley/MSP430F449/portasm.h +++ b/portable/Rowley/MSP430F449/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/portext.asm b/portable/Rowley/MSP430F449/portext.asm index f66214134..cb41db0ac 100644 --- a/portable/Rowley/MSP430F449/portext.asm +++ b/portable/Rowley/MSP430F449/portext.asm @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/portmacro.h b/portable/Rowley/MSP430F449/portmacro.h index 7137a6e09..fe380f390 100644 --- a/portable/Rowley/MSP430F449/portmacro.h +++ b/portable/Rowley/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/SDCC/Cygnal/port.c b/portable/SDCC/Cygnal/port.c index 8bf739eb7..cead166b3 100644 --- a/portable/SDCC/Cygnal/port.c +++ b/portable/SDCC/Cygnal/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/SDCC/Cygnal/portmacro.h b/portable/SDCC/Cygnal/portmacro.h index 04186381f..c79fe75e5 100644 --- a/portable/SDCC/Cygnal/portmacro.h +++ b/portable/SDCC/Cygnal/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB91460/__STD_LIB_sbrk.c b/portable/Softune/MB91460/__STD_LIB_sbrk.c index 87dfc54f7..4db93f4c7 100644 --- a/portable/Softune/MB91460/__STD_LIB_sbrk.c +++ b/portable/Softune/MB91460/__STD_LIB_sbrk.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB91460/port.c b/portable/Softune/MB91460/port.c index 08e197b06..76e9e168f 100644 --- a/portable/Softune/MB91460/port.c +++ b/portable/Softune/MB91460/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB91460/portmacro.h b/portable/Softune/MB91460/portmacro.h index 9ae6959c4..a157a9063 100644 --- a/portable/Softune/MB91460/portmacro.h +++ b/portable/Softune/MB91460/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB96340/__STD_LIB_sbrk.c b/portable/Softune/MB96340/__STD_LIB_sbrk.c index 87dfc54f7..4db93f4c7 100644 --- a/portable/Softune/MB96340/__STD_LIB_sbrk.c +++ b/portable/Softune/MB96340/__STD_LIB_sbrk.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB96340/port.c b/portable/Softune/MB96340/port.c index 23aede59a..40d6240e8 100644 --- a/portable/Softune/MB96340/port.c +++ b/portable/Softune/MB96340/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB96340/portmacro.h b/portable/Softune/MB96340/portmacro.h index 827874fde..5ab66e92f 100644 --- a/portable/Softune/MB96340/portmacro.h +++ b/portable/Softune/MB96340/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Tasking/ARM_CM4F/port.c b/portable/Tasking/ARM_CM4F/port.c index 4ba5da739..16001ca44 100755 --- a/portable/Tasking/ARM_CM4F/port.c +++ b/portable/Tasking/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Tasking/ARM_CM4F/port_asm.asm b/portable/Tasking/ARM_CM4F/port_asm.asm index 5a65fb756..123994200 100644 --- a/portable/Tasking/ARM_CM4F/port_asm.asm +++ b/portable/Tasking/ARM_CM4F/port_asm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel +; * FreeRTOS Kernel V10.6.0 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Tasking/ARM_CM4F/portmacro.h b/portable/Tasking/ARM_CM4F/portmacro.h index 1c3588b86..fa7aafab9 100644 --- a/portable/Tasking/ARM_CM4F/portmacro.h +++ b/portable/Tasking/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c index 3b5b085a2..19fbe150c 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h index 35a5abafb..2ecfe64c8 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s index 14174a376..79cd30998 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c index 7d74f319e..95db6906b 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/port.c b/portable/ThirdParty/GCC/ARC_EM_HS/port.c index 0e023088e..0c32ade23 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/port.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h index 49b15b099..144996a02 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c index 3b5b085a2..19fbe150c 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h index 35a5abafb..2ecfe64c8 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_support.s b/portable/ThirdParty/GCC/ARC_v1/arc_support.s index df2ec408c..0626cbfad 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_v1/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/port.c b/portable/ThirdParty/GCC/ARC_v1/port.c index 4dbdc7e60..75c0204d3 100644 --- a/portable/ThirdParty/GCC/ARC_v1/port.c +++ b/portable/ThirdParty/GCC/ARC_v1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/portmacro.h b/portable/ThirdParty/GCC/ARC_v1/portmacro.h index 137cbc05d..34b8f78f1 100644 --- a/portable/ThirdParty/GCC/ARC_v1/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_v1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ATmega/port.c b/portable/ThirdParty/GCC/ATmega/port.c index b8f9546d7..40a8a8560 100644 --- a/portable/ThirdParty/GCC/ATmega/port.c +++ b/portable/ThirdParty/GCC/ATmega/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ATmega/portmacro.h b/portable/ThirdParty/GCC/ATmega/portmacro.h index e48ddb219..5a3dd44c6 100644 --- a/portable/ThirdParty/GCC/ATmega/portmacro.h +++ b/portable/ThirdParty/GCC/ATmega/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/port.c b/portable/ThirdParty/GCC/Posix/port.c index 23aec6552..c331c72f1 100644 --- a/portable/ThirdParty/GCC/Posix/port.c +++ b/portable/ThirdParty/GCC/Posix/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Cambridge Consultants Ltd. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/portmacro.h b/portable/ThirdParty/GCC/Posix/portmacro.h index 154a03975..49950c1ae 100644 --- a/portable/ThirdParty/GCC/Posix/portmacro.h +++ b/portable/ThirdParty/GCC/Posix/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright 2020 Cambridge Consultants Ltd. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c index 144eba6c8..7708b1f8e 100644 --- a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c +++ b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h index 65e3e5481..515ec9c21 100644 --- a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h +++ b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c b/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c index 4d4b0ea1b..c1bd00ac3 100644 --- a/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c +++ b/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h b/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h index 8bf5d0b1d..94767721c 100644 --- a/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h +++ b/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/include/portmacro.h b/portable/ThirdParty/GCC/RP2040/include/portmacro.h index 973ac39f0..3dbdaf3d9 100644 --- a/portable/ThirdParty/GCC/RP2040/include/portmacro.h +++ b/portable/ThirdParty/GCC/RP2040/include/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h b/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h index 2406bd921..f52e093c9 100644 --- a/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h +++ b/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/port.c b/portable/ThirdParty/GCC/RP2040/port.c index 41dd114a0..63f57434a 100644 --- a/portable/ThirdParty/GCC/RP2040/port.c +++ b/portable/ThirdParty/GCC/RP2040/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h index eebfcde84..ba45fbb30 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h @@ -6,7 +6,7 @@ * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD */ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h index e87d560cf..6a1569ec5 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h @@ -7,7 +7,7 @@ * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD */ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/port.c b/portable/ThirdParty/GCC/Xtensa_ESP32/port.c index 4852cffa7..ed65f23bd 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/port.c +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/port.c @@ -7,7 +7,7 @@ * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD */ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/XCC/Xtensa/port.c b/portable/ThirdParty/XCC/Xtensa/port.c index 805a78401..603846e71 100644 --- a/portable/ThirdParty/XCC/Xtensa/port.c +++ b/portable/ThirdParty/XCC/Xtensa/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portasm.S b/portable/ThirdParty/XCC/Xtensa/portasm.S index 10754ecad..46b3ad5af 100644 --- a/portable/ThirdParty/XCC/Xtensa/portasm.S +++ b/portable/ThirdParty/XCC/Xtensa/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portbenchmark.h b/portable/ThirdParty/XCC/Xtensa/portbenchmark.h index 7778dd1a5..48d94a8ae 100644 --- a/portable/ThirdParty/XCC/Xtensa/portbenchmark.h +++ b/portable/ThirdParty/XCC/Xtensa/portbenchmark.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portclib.c b/portable/ThirdParty/XCC/Xtensa/portclib.c index 3c87d6741..148a86c1a 100644 --- a/portable/ThirdParty/XCC/Xtensa/portclib.c +++ b/portable/ThirdParty/XCC/Xtensa/portclib.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portmacro.h b/portable/ThirdParty/XCC/Xtensa/portmacro.h index f84e4335e..ebca3319b 100644 --- a/portable/ThirdParty/XCC/Xtensa/portmacro.h +++ b/portable/ThirdParty/XCC/Xtensa/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/porttrace.h b/portable/ThirdParty/XCC/Xtensa/porttrace.h index 9909ec3af..8bac5a02a 100644 --- a/portable/ThirdParty/XCC/Xtensa/porttrace.h +++ b/portable/ThirdParty/XCC/Xtensa/porttrace.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_api.h b/portable/ThirdParty/XCC/Xtensa/xtensa_api.h index 703449f2b..9bd57908f 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_api.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_api.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_config.h b/portable/ThirdParty/XCC/Xtensa/xtensa_config.h index a5efcda58..66431f585 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_config.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_config.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_context.S b/portable/ThirdParty/XCC/Xtensa/xtensa_context.S index 96507e1c8..0b92dc556 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_context.S +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_context.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_context.h b/portable/ThirdParty/XCC/Xtensa/xtensa_context.h index 579c62ea2..27459a409 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_context.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_init.c b/portable/ThirdParty/XCC/Xtensa/xtensa_init.c index c18520350..008f49110 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_init.c +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c b/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c index 88ed191e3..1fa3cf349 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S b/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S index ec5ac4c83..e39947c20 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c b/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c index 2a8506a01..d4135e3c4 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h b/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h index 2c917c832..b4a387d77 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h b/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h index cefac70f2..5973cebe7 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S b/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S index 7b8e9fd58..cf7e32103 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/WizC/PIC18/Drivers/Tick/Tick.c b/portable/WizC/PIC18/Drivers/Tick/Tick.c index 5dfa080b6..b5b71c69c 100644 --- a/portable/WizC/PIC18/Drivers/Tick/Tick.c +++ b/portable/WizC/PIC18/Drivers/Tick/Tick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/Drivers/Tick/isrTick.c b/portable/WizC/PIC18/Drivers/Tick/isrTick.c index f61047dc1..94f64fa9e 100644 --- a/portable/WizC/PIC18/Drivers/Tick/isrTick.c +++ b/portable/WizC/PIC18/Drivers/Tick/isrTick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/addFreeRTOS.h b/portable/WizC/PIC18/addFreeRTOS.h index 178ca1089..fb3bc109c 100644 --- a/portable/WizC/PIC18/addFreeRTOS.h +++ b/portable/WizC/PIC18/addFreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/port.c b/portable/WizC/PIC18/port.c index e3cf9999a..50ff27710 100644 --- a/portable/WizC/PIC18/port.c +++ b/portable/WizC/PIC18/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/portmacro.h b/portable/WizC/PIC18/portmacro.h index 0fdba688e..740081207 100644 --- a/portable/WizC/PIC18/portmacro.h +++ b/portable/WizC/PIC18/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/Flsh186/port.c b/portable/oWatcom/16BitDOS/Flsh186/port.c index cc8863d1d..59de34fca 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/port.c +++ b/portable/oWatcom/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h index 952e3f680..2f39ca093 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h +++ b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/PC/port.c b/portable/oWatcom/16BitDOS/PC/port.c index 6cb2de9e8..1611743b2 100644 --- a/portable/oWatcom/16BitDOS/PC/port.c +++ b/portable/oWatcom/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/PC/portmacro.h b/portable/oWatcom/16BitDOS/PC/portmacro.h index 2fb753411..122549a59 100644 --- a/portable/oWatcom/16BitDOS/PC/portmacro.h +++ b/portable/oWatcom/16BitDOS/PC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/common/portasm.h b/portable/oWatcom/16BitDOS/common/portasm.h index f77e2b553..9a71df4be 100644 --- a/portable/oWatcom/16BitDOS/common/portasm.h +++ b/portable/oWatcom/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/common/portcomn.c b/portable/oWatcom/16BitDOS/common/portcomn.c index 2a7b66637..0d249469b 100644 --- a/portable/oWatcom/16BitDOS/common/portcomn.c +++ b/portable/oWatcom/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/queue.c b/queue.c index 29765a54f..edda860b6 100644 --- a/queue.c +++ b/queue.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/stream_buffer.c b/stream_buffer.c index 30093f1af..93c3d58ea 100644 --- a/stream_buffer.c +++ b/stream_buffer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/tasks.c b/tasks.c index 72200ec4f..2c169d5b5 100644 --- a/tasks.c +++ b/tasks.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/timers.c b/timers.c index 457ab8f8f..c78c93443 100644 --- a/timers.c +++ b/timers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel + * FreeRTOS Kernel V10.6.0 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT From fe005419f0d31264059c61a2f043a0b4e0f24076 Mon Sep 17 00:00:00 2001 From: kar-rahul-aws Date: Thu, 13 Jul 2023 11:45:34 +0000 Subject: [PATCH 03/21] Update SBOM --- sbom.spdx | 1778 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 1778 insertions(+) create mode 100644 sbom.spdx diff --git a/sbom.spdx b/sbom.spdx new file mode 100644 index 000000000..d5a760830 --- /dev/null +++ b/sbom.spdx @@ -0,0 +1,1778 @@ +SPDXVersion: SPDX-2.2 +DataLicense: CC0-1.0 +SPDXID: SPDXRef-DOCUMENT +DocumentName: FreeRTOS-Kernel +DocumentNamespace: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/v10.5.1/sbom.spdx +Creator: Amazon Web Services +Created: 2023-07-13T11:45:34Z +CreatorComment: NOASSERTION +DocumentComment: NOASSERTION + +PackageName: FreeRTOS-Kernel +SPDXID: SPDXRef-Package-FreeRTOS-Kernel +PackageVersion: v10.5.1 +PackageDownloadLocation: https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/v10.5.1 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./portable/CodeWarrior/ColdFire_V1/port.c +SPDXID: SPDXRef-File-portable-CodeWarrior-ColdFire_V1-port.c +FileChecksum: SHA1: e669772a4731455e89b47f90fb23ea569cd273ab +LicenseConcluded: MIT +FileCopyrightText: NOASSERTION +FileComment: NOASSERTION + +FileName: ./portable/BCC/16BitDOS/PC/port.c +SPDXID: SPDXRef-File-portable-BCC-16BitDOS-PC-port.c +FileChecksum: SHA1: b75a5f12f7ef2b3bb47da2f4d9432aecd5135e63 +LicenseConcluded: MIT +FileCopyrightText: NOASSERTION +FileComment: NOASSERTION + +FileName: ./portable/BCC/16BitDOS/Flsh186/port.c +SPDXID: SPDXRef-File-portable-BCC-16BitDOS-Flsh186-port.c +FileChecksum: SHA1: e447d951aa9628eb1ce20d9ea6c65fda2ea72793 +LicenseConcluded: MIT +FileCopyrightText: NOASSERTION +FileComment: NOASSERTION + +FileName: ./portable/BCC/16BitDOS/common/portcomn.c +SPDXID: SPDXRef-File-portable-BCC-16BitDOS-common-portcomn.c +FileChecksum: SHA1: 9387ef75b20438f9ddb4677a0d6f88219477d2a3 +LicenseConcluded: MIT +FileCopyrightText: NOASSERTION +FileComment: NOASSERTION + +FileName: ./portable/CCS/ARM_CM3/port.c +SPDXID: SPDXRef-File-portable-CCS-ARM_CM3-port.c +FileChecksum: SHA1: 910a5be1b1dba3fda3cb181a7cfb5e9eec421a24 +LicenseConcluded: MIT +FileCopyrightText: NOASSERTION +FileComment: NOASSERTION + +FileName: ./portable/CCS/ARM_Cortex-R4/port.c +SPDXID: SPDXRef-File-portable-CCS-ARM_Cortex-R4-port.c +FileChecksum: SHA1: 32e38a49a4108ebffd37e95f01ae2a2bb21f7dab +LicenseConcluded: MIT +FileCopyrightText: NOASSERTION +FileComment: NOASSERTION + +FileName: ./portable/CCS/MSP430X/port.c +SPDXID: SPDXRef-File-portable-CCS-MSP430X-port.c +FileChecksum: SHA1: 2ebf2422526a9a6aab1cea063d0a7d6e60a54524 +LicenseConcluded: MIT +FileCopyrightText: NOASSERTION +FileComment: NOASSERTION + +FileName: ./portable/CCS/ARM_CM4F/port.c +SPDXID: SPDXRef-File-portable-CCS-ARM_CM4F-port.c +FileChecksum: SHA1: b54bb51633b33e2858571ec5c99facbe1d76674b +LicenseConcluded: MIT +FileCopyrightText: NOASSERTION +FileComment: NOASSERTION + From 0d871946abc38c6010a86f3c8bce65c135dd4cf6 Mon Sep 17 00:00:00 2001 From: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Date: Thu, 17 Aug 2023 17:20:53 +0530 Subject: [PATCH 04/21] Update version number in manifest.yml (#756) Add automation to update version number in manifest.yml. Also, bring required commits from main. --- .github/scripts/manifest_updater.py | 32 +++++++++++++++++++++++++++++ .github/workflows/auto-release.yml | 17 +++++++++++++-- .github/workflows/kernel-demos.yml | 17 +++++++++++++-- portable/Common/mpu_wrappers_v2.c | 8 ++++---- 4 files changed, 66 insertions(+), 8 deletions(-) create mode 100755 .github/scripts/manifest_updater.py diff --git a/.github/scripts/manifest_updater.py b/.github/scripts/manifest_updater.py new file mode 100755 index 000000000..684c7cb5a --- /dev/null +++ b/.github/scripts/manifest_updater.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python3 +import os +import argparse + +THIS_FILE_PATH = os.path.dirname(os.path.abspath(__file__)) +MANIFEST_FILE = os.path.join(THIS_FILE_PATH, '..', '..', 'manifest.yml') + +def update_manifest_file(new_version_number): + updated_lines = [] + with open(MANIFEST_FILE, 'r') as f: + for line in f: + line = line.strip() + if line.startswith('version'): + updated_lines.append(f'version: "v{new_version_number}"\n') + else: + updated_lines.append(f'{line}\n') + + with open(MANIFEST_FILE, 'w') as f: + f.writelines(updated_lines) + +def parse_args(): + parser = argparse.ArgumentParser() + parser.add_argument('-v', '--version', required=True, help='New version number.') + args = parser.parse_args() + return args + +def main(): + args = parse_args() + update_manifest_file(args.version) + +if __name__ == '__main__': + main() diff --git a/.github/workflows/auto-release.yml b/.github/workflows/auto-release.yml index 426d8f0c0..21788c8a6 100644 --- a/.github/workflows/auto-release.yml +++ b/.github/workflows/auto-release.yml @@ -63,6 +63,19 @@ jobs: env: GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} + - name : Update version number in manifest.yml + working-directory: ./local_kernel + run: | + ./.github/scripts/manifest_updater.py -v ${{ github.event.inputs.version_number }} + exit $? + + - name : Commit version number change in manifest.yml + working-directory: ./local_kernel + run: | + git add . + git commit -m '[AUTO][RELEASE]: Update version number in manifest.yml' + git push -u origin ${{ github.event.inputs.version_number }} + - name: Generate SBOM uses: FreeRTOS/CI-CD-Github-Actions/sbom-generator@main with: @@ -73,7 +86,7 @@ jobs: working-directory: ./local_kernel run: | git add . - git commit -m 'Update SBOM' + git commit -m '[AUTO][RELEASE]: Update SBOM' git push -u origin ${{ github.event.inputs.version_number }} echo "COMMIT_SHA_2=$(git rev-parse HEAD)" >> $GITHUB_ENV @@ -81,7 +94,7 @@ jobs: run: | # Install deps and run pip install -r ./tools/.github/scripts/release-requirements.txt - ./tools/.github/scripts/release.py FreeRTOS --kernel-repo-path=local_kernel --kernel-commit=${{ env.COMMIT_SHA_2 }} --new-kernel-version=${{ github.event.inputs.version_number }} --new-kernel-main-br-version=${{ github.event.inputs.main_br_version }} + ./tools/.github/scripts/release.py ${{ github.repository_owner }} --kernel-repo-path=local_kernel --kernel-commit=${{ env.COMMIT_SHA_2 }} --new-kernel-version=${{ github.event.inputs.version_number }} --new-kernel-main-br-version=${{ github.event.inputs.main_br_version }} exit $? env: GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} diff --git a/.github/workflows/kernel-demos.yml b/.github/workflows/kernel-demos.yml index 96a4c5975..865f4eefb 100644 --- a/.github/workflows/kernel-demos.yml +++ b/.github/workflows/kernel-demos.yml @@ -123,9 +123,22 @@ jobs: with: ref: main repository: FreeRTOS/FreeRTOS - submodules: 'recursive' fetch-depth: 1 + - name: Fetch Community-Supported-Demos Submodule + shell: bash + run: | + # Fetch Community-Supported-Demos Submodule + echo "::group::Fetch Community-Supported-Demos Submodule" + git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos + echo "::engdroup::" + if [ "$?" = "0" ]; then + echo -e "\033[32;3mCloned the Community-Supported-Demos\033[0m" + else + echo -e "\033[32;31mCommunity-Supported-Demos Clone Failed...\033[0m" + exit 1 + fi + # Checkout user pull request changes - name: Checkout Pull Request uses: actions/checkout@v2 @@ -169,7 +182,7 @@ jobs: - name: Build CORTEX_M0+_RP2040 Demos shell: bash - working-directory: FreeRTOS/Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040 + working-directory: FreeRTOS/Demo/ThirdParty/Community-Supported-Demos/CORTEX_M0+_RP2040 run: | git clone https://github.com/raspberrypi/pico-sdk.git cmake -B build -DPICO_SDK_PATH=pico-sdk -GNinja diff --git a/portable/Common/mpu_wrappers_v2.c b/portable/Common/mpu_wrappers_v2.c index 073606052..aa5b9bbf6 100644 --- a/portable/Common/mpu_wrappers_v2.c +++ b/portable/Common/mpu_wrappers_v2.c @@ -2133,7 +2133,7 @@ { BaseType_t xReturn = pdFAIL; QueueSetMemberHandle_t xInternalQueueSetMemberHandle = NULL; - QueueSetHandle_t xInternalQueueSetHandle; + QueueSetHandle_t xInternalQueueSetHandle = NULL; int32_t lIndexQueueSet, lIndexQueueSetMember; lIndexQueueSet = ( int32_t ) xQueueSet; @@ -2215,7 +2215,7 @@ const char * MPU_pcQueueGetNameImpl( QueueHandle_t xQueue ) /* PRIVILEGED_FUNCTION */ { - const char * pcReturn; + const char * pcReturn = NULL; QueueHandle_t xInternalQueueHandle = NULL; int32_t lIndex; @@ -2519,7 +2519,7 @@ { BaseType_t xReturn = pdFAIL; QueueSetMemberHandle_t xInternalQueueSetMemberHandle = NULL; - QueueSetHandle_t xInternalQueueSetHandle; + QueueSetHandle_t xInternalQueueSetHandle = NULL; int32_t lIndexQueueSet, lIndexQueueSetMember; lIndexQueueSet = ( int32_t ) xQueueSet; @@ -3330,7 +3330,7 @@ const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) /* PRIVILEGED_FUNCTION */ { - EventBits_t xReturn; + EventBits_t xReturn = 0; EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; From ace6b39fa063a14a7af43fab915ae0bc838f23f4 Mon Sep 17 00:00:00 2001 From: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Date: Thu, 17 Aug 2023 18:53:42 +0530 Subject: [PATCH 05/21] Add runtime parameter checks (#758) * Add runtime parameter checks This commit adds runtime checks for function parameters to mpu_wrappers_v2 file. The same checks are performed in the API implementation using asserts. Signed-off-by: kar-rahul-aws --- .github/lexicon.txt | 1 + event_groups.c | 20 -- include/event_groups.h | 20 ++ include/queue.h | 1 + portable/Common/mpu_wrappers_v2.c | 402 ++++++++++++++++++------------ queue.c | 6 + tasks.c | 2 + 7 files changed, 273 insertions(+), 179 deletions(-) diff --git a/.github/lexicon.txt b/.github/lexicon.txt index ec6577e9e..92c93ce40 100644 --- a/.github/lexicon.txt +++ b/.github/lexicon.txt @@ -2469,6 +2469,7 @@ uxpriority uxprioritytouse uxqueue uxqueuegetqueueitemsize +uxqueuegetqueuelength uxqueuelength uxqueuemessageswaiting uxqueuespacesavailable diff --git a/event_groups.c b/event_groups.c index 9efdbf3c2..762576284 100644 --- a/event_groups.c +++ b/event_groups.c @@ -46,26 +46,6 @@ * correct privileged Vs unprivileged linkage and placement. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021 See comment above. */ -/* The following bit fields convey control information in a task's event list - * item value. It is important they don't clash with the - * taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */ -#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) - #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x0100U - #define eventUNBLOCKED_DUE_TO_BIT_SET 0x0200U - #define eventWAIT_FOR_ALL_BITS 0x0400U - #define eventEVENT_BITS_CONTROL_BYTES 0xff00U -#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS ) - #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x01000000UL - #define eventUNBLOCKED_DUE_TO_BIT_SET 0x02000000UL - #define eventWAIT_FOR_ALL_BITS 0x04000000UL - #define eventEVENT_BITS_CONTROL_BYTES 0xff000000UL -#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_64_BITS ) - #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x0100000000000000ULL - #define eventUNBLOCKED_DUE_TO_BIT_SET 0x0200000000000000ULL - #define eventWAIT_FOR_ALL_BITS 0x0400000000000000ULL - #define eventEVENT_BITS_CONTROL_BYTES 0xff00000000000000ULL -#endif /* if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) */ - typedef struct EventGroupDef_t { EventBits_t uxEventBits; diff --git a/include/event_groups.h b/include/event_groups.h index b95ab59aa..185a946fa 100644 --- a/include/event_groups.h +++ b/include/event_groups.h @@ -36,6 +36,26 @@ /* FreeRTOS includes. */ #include "timers.h" +/* The following bit fields convey control information in a task's event list + * item value. It is important they don't clash with the + * taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */ +#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) + #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x0100U + #define eventUNBLOCKED_DUE_TO_BIT_SET 0x0200U + #define eventWAIT_FOR_ALL_BITS 0x0400U + #define eventEVENT_BITS_CONTROL_BYTES 0xff00U +#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS ) + #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x01000000UL + #define eventUNBLOCKED_DUE_TO_BIT_SET 0x02000000UL + #define eventWAIT_FOR_ALL_BITS 0x04000000UL + #define eventEVENT_BITS_CONTROL_BYTES 0xff000000UL +#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_64_BITS ) + #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x0100000000000000ULL + #define eventUNBLOCKED_DUE_TO_BIT_SET 0x0200000000000000ULL + #define eventWAIT_FOR_ALL_BITS 0x0400000000000000ULL + #define eventEVENT_BITS_CONTROL_BYTES 0xff00000000000000ULL +#endif /* if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) */ + /* *INDENT-OFF* */ #ifdef __cplusplus extern "C" { diff --git a/include/queue.h b/include/queue.h index b2fec50e7..7076523be 100644 --- a/include/queue.h +++ b/include/queue.h @@ -1753,6 +1753,7 @@ void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; UBaseType_t uxQueueGetQueueItemSize( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; +UBaseType_t uxQueueGetQueueLength( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; /* *INDENT-OFF* */ #ifdef __cplusplus diff --git a/portable/Common/mpu_wrappers_v2.c b/portable/Common/mpu_wrappers_v2.c index aa5b9bbf6..d1effc460 100644 --- a/portable/Common/mpu_wrappers_v2.c +++ b/portable/Common/mpu_wrappers_v2.c @@ -366,13 +366,16 @@ BaseType_t xReturn = pdFAIL; BaseType_t xIsPreviousWakeTimeAccessible = pdFALSE; - xIsPreviousWakeTimeAccessible = xPortIsAuthorizedToAccessBuffer( pxPreviousWakeTime, - sizeof( TickType_t ), - ( tskMPU_WRITE_PERMISSION | tskMPU_READ_PERMISSION ) ); - - if( xIsPreviousWakeTimeAccessible == pdTRUE ) + if( ( pxPreviousWakeTime != NULL ) && ( xTimeIncrement > 0U ) ) { - xReturn = xTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); + xIsPreviousWakeTimeAccessible = xPortIsAuthorizedToAccessBuffer( pxPreviousWakeTime, + sizeof( TickType_t ), + ( tskMPU_WRITE_PERMISSION | tskMPU_READ_PERMISSION ) ); + + if( xIsPreviousWakeTimeAccessible == pdTRUE ) + { + xReturn = xTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); + } } return xReturn; @@ -391,22 +394,15 @@ TaskHandle_t xInternalTaskHandle = NULL; int32_t lIndex; - if( xTask == NULL ) - { - xReturn = xTaskAbortDelay( xTask ); - } - else - { - lIndex = ( int32_t ) xTask; + lIndex = ( int32_t ) xTask; - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + { + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - - if( xInternalTaskHandle != NULL ) - { - xReturn = xTaskAbortDelay( xInternalTaskHandle ); - } + xReturn = xTaskAbortDelay( xInternalTaskHandle ); } } @@ -473,22 +469,15 @@ TaskHandle_t xInternalTaskHandle = NULL; int32_t lIndex; - if( pxTask == NULL ) - { - eReturn = eTaskGetState( pxTask ); - } - else - { - lIndex = ( int32_t ) pxTask; + lIndex = ( int32_t ) pxTask; - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + { + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - - if( xInternalTaskHandle != NULL ) - { - eReturn = eTaskGetState( xInternalTaskHandle ); - } + eReturn = eTaskGetState( xInternalTaskHandle ); } } @@ -577,7 +566,11 @@ { /* After the scheduler starts, only privileged tasks are allowed * to suspend other tasks. */ - if( ( xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED ) || ( portIS_TASK_PRIVILEGED() == pdTRUE ) ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) + if( ( xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED ) || ( portIS_TASK_PRIVILEGED() == pdTRUE ) ) + #else + if( portIS_TASK_PRIVILEGED() == pdTRUE ) + #endif { lIndex = ( int32_t ) pxTaskToSuspend; @@ -1078,13 +1071,16 @@ { BaseType_t xIsTimeOutWriteable = pdFALSE; - xIsTimeOutWriteable = xPortIsAuthorizedToAccessBuffer( pxTimeOut, - sizeof( TimeOut_t ), - tskMPU_WRITE_PERMISSION ); - - if( xIsTimeOutWriteable == pdTRUE ) + if( pxTimeOut != NULL ) { - vTaskSetTimeOutState( pxTimeOut ); + xIsTimeOutWriteable = xPortIsAuthorizedToAccessBuffer( pxTimeOut, + sizeof( TimeOut_t ), + tskMPU_WRITE_PERMISSION ); + + if( xIsTimeOutWriteable == pdTRUE ) + { + vTaskSetTimeOutState( pxTimeOut ); + } } } /*-----------------------------------------------------------*/ @@ -1099,16 +1095,19 @@ BaseType_t xIsTimeOutWriteable = pdFALSE; BaseType_t xIsTicksToWaitWriteable = pdFALSE; - xIsTimeOutWriteable = xPortIsAuthorizedToAccessBuffer( pxTimeOut, - sizeof( TimeOut_t ), - tskMPU_WRITE_PERMISSION ); - xIsTicksToWaitWriteable = xPortIsAuthorizedToAccessBuffer( pxTicksToWait, - sizeof( TickType_t ), - tskMPU_WRITE_PERMISSION ); - - if( ( xIsTimeOutWriteable == pdTRUE ) && ( xIsTicksToWaitWriteable == pdTRUE ) ) + if( ( pxTimeOut != NULL ) && ( pxTicksToWait != NULL ) ) { - xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait ); + xIsTimeOutWriteable = xPortIsAuthorizedToAccessBuffer( pxTimeOut, + sizeof( TimeOut_t ), + tskMPU_WRITE_PERMISSION ); + xIsTicksToWaitWriteable = xPortIsAuthorizedToAccessBuffer( pxTicksToWait, + sizeof( TickType_t ), + tskMPU_WRITE_PERMISSION ); + + if( ( xIsTimeOutWriteable == pdTRUE ) && ( xIsTicksToWaitWriteable == pdTRUE ) ) + { + xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait ); + } } return xReturn; @@ -1134,24 +1133,27 @@ TaskHandle_t xInternalTaskHandle = NULL; BaseType_t xIsPreviousNotificationValueWriteable = pdFALSE; - if( pulPreviousNotificationValue != NULL ) + if( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES ) { - xIsPreviousNotificationValueWriteable = xPortIsAuthorizedToAccessBuffer( pulPreviousNotificationValue, - sizeof( uint32_t ), - tskMPU_WRITE_PERMISSION ); - } - - if( ( pulPreviousNotificationValue == NULL ) || ( xIsPreviousNotificationValueWriteable == pdTRUE ) ) - { - lIndex = ( int32_t ) xTaskToNotify; - - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( pulPreviousNotificationValue != NULL ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xIsPreviousNotificationValueWriteable = xPortIsAuthorizedToAccessBuffer( pulPreviousNotificationValue, + sizeof( uint32_t ), + tskMPU_WRITE_PERMISSION ); + } - if( xInternalTaskHandle != NULL ) + if( ( pulPreviousNotificationValue == NULL ) || ( xIsPreviousNotificationValueWriteable == pdTRUE ) ) + { + lIndex = ( int32_t ) xTaskToNotify; + + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xReturn = xTaskGenericNotify( xInternalTaskHandle, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + xReturn = xTaskGenericNotify( xInternalTaskHandle, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue ); + } } } } @@ -1179,16 +1181,19 @@ BaseType_t xReturn = pdFAIL; BaseType_t xIsNotificationValueWritable = pdFALSE; - if( pulNotificationValue != NULL ) + if( uxIndexToWaitOn < configTASK_NOTIFICATION_ARRAY_ENTRIES ) { - xIsNotificationValueWritable = xPortIsAuthorizedToAccessBuffer( pulNotificationValue, - sizeof( uint32_t ), - tskMPU_WRITE_PERMISSION ); - } + if( pulNotificationValue != NULL ) + { + xIsNotificationValueWritable = xPortIsAuthorizedToAccessBuffer( pulNotificationValue, + sizeof( uint32_t ), + tskMPU_WRITE_PERMISSION ); + } - if( ( pulNotificationValue == NULL ) || ( xIsNotificationValueWritable == pdTRUE ) ) - { - xReturn = xTaskGenericNotifyWait( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ); + if( ( pulNotificationValue == NULL ) || ( xIsNotificationValueWritable == pdTRUE ) ) + { + xReturn = xTaskGenericNotifyWait( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ); + } } return xReturn; @@ -1207,9 +1212,12 @@ BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) /* PRIVILEGED_FUNCTION */ { - uint32_t ulReturn; + uint32_t ulReturn = 0; - ulReturn = ulTaskGenericNotifyTake( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ); + if( uxIndexToWaitOn < configTASK_NOTIFICATION_ARRAY_ENTRIES ) + { + ulReturn = ulTaskGenericNotifyTake( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ); + } return ulReturn; } @@ -1229,21 +1237,24 @@ int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; - if( xTask == NULL ) + if( uxIndexToClear < configTASK_NOTIFICATION_ARRAY_ENTRIES ) { - xReturn = xTaskGenericNotifyStateClear( xTask, uxIndexToClear ); - } - else - { - lIndex = ( int32_t ) xTask; - - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( xTask == NULL ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xReturn = xTaskGenericNotifyStateClear( xTask, uxIndexToClear ); + } + else + { + lIndex = ( int32_t ) xTask; - if( xInternalTaskHandle != NULL ) + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xReturn = xTaskGenericNotifyStateClear( xInternalTaskHandle, uxIndexToClear ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + xReturn = xTaskGenericNotifyStateClear( xInternalTaskHandle, uxIndexToClear ); + } } } } @@ -1268,21 +1279,24 @@ int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; - if( xTask == NULL ) + if( uxIndexToClear < configTASK_NOTIFICATION_ARRAY_ENTRIES ) { - ulReturn = ulTaskGenericNotifyValueClear( xTask, uxIndexToClear, ulBitsToClear ); - } - else - { - lIndex = ( int32_t ) xTask; - - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( xTask == NULL ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + ulReturn = ulTaskGenericNotifyValueClear( xTask, uxIndexToClear, ulBitsToClear ); + } + else + { + lIndex = ( int32_t ) xTask; - if( xInternalTaskHandle != NULL ) + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - ulReturn = ulTaskGenericNotifyValueClear( xInternalTaskHandle, uxIndexToClear, ulBitsToClear ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + ulReturn = ulTaskGenericNotifyValueClear( xInternalTaskHandle, uxIndexToClear, ulBitsToClear ); + } } } } @@ -1811,6 +1825,7 @@ QueueHandle_t xInternalQueueHandle = NULL; BaseType_t xReturn = pdFAIL; BaseType_t xIsItemToQueueReadable = pdFALSE; + UBaseType_t uxQueueItemSize, uxQueueLength; lIndex = ( int32_t ) xQueue; @@ -1820,16 +1835,27 @@ if( xInternalQueueHandle != NULL ) { - if( pvItemToQueue != NULL ) - { - xIsItemToQueueReadable = xPortIsAuthorizedToAccessBuffer( pvItemToQueue, - uxQueueGetQueueItemSize( xInternalQueueHandle ), - tskMPU_READ_PERMISSION ); - } + uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); + uxQueueLength = uxQueueGetQueueLength( xInternalQueueHandle ); - if( ( pvItemToQueue == NULL ) || ( xIsItemToQueueReadable == pdTRUE ) ) + if( ( !( ( pvItemToQueue == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) && + ( !( ( xCopyPosition == queueOVERWRITE ) && ( uxQueueLength != ( UBaseType_t ) 1U ) ) ) + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + #endif + ) { - xReturn = xQueueGenericSend( xInternalQueueHandle, pvItemToQueue, xTicksToWait, xCopyPosition ); + if( pvItemToQueue != NULL ) + { + xIsItemToQueueReadable = xPortIsAuthorizedToAccessBuffer( pvItemToQueue, + uxQueueGetQueueItemSize( xInternalQueueHandle ), + tskMPU_READ_PERMISSION ); + } + + if( ( pvItemToQueue == NULL ) || ( xIsItemToQueueReadable == pdTRUE ) ) + { + xReturn = xQueueGenericSend( xInternalQueueHandle, pvItemToQueue, xTicksToWait, xCopyPosition ); + } } } } @@ -1898,6 +1924,7 @@ QueueHandle_t xInternalQueueHandle = NULL; BaseType_t xReturn = pdFAIL; BaseType_t xIsReceiveBufferWritable = pdFALSE; + UBaseType_t uxQueueItemSize; lIndex = ( int32_t ) pxQueue; @@ -1907,13 +1934,22 @@ if( xInternalQueueHandle != NULL ) { - xIsReceiveBufferWritable = xPortIsAuthorizedToAccessBuffer( pvBuffer, - uxQueueGetQueueItemSize( xInternalQueueHandle ), - tskMPU_WRITE_PERMISSION ); + uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); - if( xIsReceiveBufferWritable == pdTRUE ) + if( ( !( ( ( pvBuffer ) == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + #endif + ) { - xReturn = xQueueReceive( xInternalQueueHandle, pvBuffer, xTicksToWait ); + xIsReceiveBufferWritable = xPortIsAuthorizedToAccessBuffer( pvBuffer, + uxQueueGetQueueItemSize( xInternalQueueHandle ), + tskMPU_WRITE_PERMISSION ); + + if( xIsReceiveBufferWritable == pdTRUE ) + { + xReturn = xQueueReceive( xInternalQueueHandle, pvBuffer, xTicksToWait ); + } } } } @@ -1934,6 +1970,7 @@ QueueHandle_t xInternalQueueHandle = NULL; BaseType_t xReturn = pdFAIL; BaseType_t xIsReceiveBufferWritable = pdFALSE; + UBaseType_t uxQueueItemSize; lIndex = ( int32_t ) xQueue; @@ -1943,13 +1980,22 @@ if( xInternalQueueHandle != NULL ) { - xIsReceiveBufferWritable = xPortIsAuthorizedToAccessBuffer( pvBuffer, - uxQueueGetQueueItemSize( xInternalQueueHandle ), - tskMPU_WRITE_PERMISSION ); + uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); - if( xIsReceiveBufferWritable == pdTRUE ) + if( ( !( ( ( pvBuffer ) == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + #endif + ) { - xReturn = xQueuePeek( xInternalQueueHandle, pvBuffer, xTicksToWait ); + xIsReceiveBufferWritable = xPortIsAuthorizedToAccessBuffer( pvBuffer, + uxQueueGetQueueItemSize( xInternalQueueHandle ), + tskMPU_WRITE_PERMISSION ); + + if( xIsReceiveBufferWritable == pdTRUE ) + { + xReturn = xQueuePeek( xInternalQueueHandle, pvBuffer, xTicksToWait ); + } } } } @@ -1967,6 +2013,7 @@ int32_t lIndex; QueueHandle_t xInternalQueueHandle = NULL; BaseType_t xReturn = pdFAIL; + UBaseType_t uxQueueItemSize; lIndex = ( int32_t ) xQueue; @@ -1976,7 +2023,16 @@ if( xInternalQueueHandle != NULL ) { - xReturn = xQueueSemaphoreTake( xInternalQueueHandle, xTicksToWait ); + uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); + + if( ( uxQueueItemSize == 0 ) + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + #endif + ) + { + xReturn = xQueueSemaphoreTake( xInternalQueueHandle, xTicksToWait ); + } } } @@ -3252,15 +3308,23 @@ EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; - lIndex = ( int32_t ) xEventGroup; - - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( ( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) && + ( uxBitsToWaitFor != 0 ) + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + #endif + ) { - xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + lIndex = ( int32_t ) xEventGroup; - if( xInternalEventGroupHandle != NULL ) + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xReturn = xEventGroupWaitBits( xInternalEventGroupHandle, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait ); + xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalEventGroupHandle != NULL ) + { + xReturn = xEventGroupWaitBits( xInternalEventGroupHandle, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait ); + } } } @@ -3278,15 +3342,18 @@ EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; - lIndex = ( int32_t ) xEventGroup; - - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) { - xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + lIndex = ( int32_t ) xEventGroup; - if( xInternalEventGroupHandle != NULL ) + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xReturn = xEventGroupClearBits( xInternalEventGroupHandle, uxBitsToClear ); + xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalEventGroupHandle != NULL ) + { + xReturn = xEventGroupClearBits( xInternalEventGroupHandle, uxBitsToClear ); + } } } @@ -3304,15 +3371,18 @@ EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; - lIndex = ( int32_t ) xEventGroup; - - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) { - xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + lIndex = ( int32_t ) xEventGroup; - if( xInternalEventGroupHandle != NULL ) + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xReturn = xEventGroupSetBits( xInternalEventGroupHandle, uxBitsToSet ); + xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalEventGroupHandle != NULL ) + { + xReturn = xEventGroupSetBits( xInternalEventGroupHandle, uxBitsToSet ); + } } } @@ -3334,15 +3404,23 @@ EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; - lIndex = ( int32_t ) xEventGroup; - - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( ( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) && + ( uxBitsToWaitFor != 0 ) + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + #endif + ) { - xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + lIndex = ( int32_t ) xEventGroup; - if( xInternalEventGroupHandle != NULL ) + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xReturn = xEventGroupSync( xInternalEventGroupHandle, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); + xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalEventGroupHandle != NULL ) + { + xReturn = xEventGroupSync( xInternalEventGroupHandle, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); + } } } @@ -3615,21 +3693,24 @@ int32_t lIndex; BaseType_t xIsTxDataBufferReadable = pdFALSE; - xIsTxDataBufferReadable = xPortIsAuthorizedToAccessBuffer( pvTxData, - xDataLengthBytes, - tskMPU_READ_PERMISSION ); - - if( xIsTxDataBufferReadable == pdTRUE ) + if( pvTxData != NULL ) { - lIndex = ( int32_t ) xStreamBuffer; + xIsTxDataBufferReadable = xPortIsAuthorizedToAccessBuffer( pvTxData, + xDataLengthBytes, + tskMPU_READ_PERMISSION ); - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( xIsTxDataBufferReadable == pdTRUE ) { - xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + lIndex = ( int32_t ) xStreamBuffer; - if( xInternalStreamBufferHandle != NULL ) + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xReturn = xStreamBufferSend( xInternalStreamBufferHandle, pvTxData, xDataLengthBytes, xTicksToWait ); + xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalStreamBufferHandle != NULL ) + { + xReturn = xStreamBufferSend( xInternalStreamBufferHandle, pvTxData, xDataLengthBytes, xTicksToWait ); + } } } } @@ -3653,21 +3734,24 @@ int32_t lIndex; BaseType_t xIsRxDataBufferWriteable = pdFALSE; - xIsRxDataBufferWriteable = xPortIsAuthorizedToAccessBuffer( pvRxData, - xBufferLengthBytes, - tskMPU_WRITE_PERMISSION ); - - if( xIsRxDataBufferWriteable == pdTRUE ) + if( pvRxData != NULL ) { - lIndex = ( int32_t ) xStreamBuffer; + xIsRxDataBufferWriteable = xPortIsAuthorizedToAccessBuffer( pvRxData, + xBufferLengthBytes, + tskMPU_WRITE_PERMISSION ); - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( xIsRxDataBufferWriteable == pdTRUE ) { - xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + lIndex = ( int32_t ) xStreamBuffer; - if( xInternalStreamBufferHandle != NULL ) + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xReturn = xStreamBufferReceive( xInternalStreamBufferHandle, pvRxData, xBufferLengthBytes, xTicksToWait ); + xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalStreamBufferHandle != NULL ) + { + xReturn = xStreamBufferReceive( xInternalStreamBufferHandle, pvRxData, xBufferLengthBytes, xTicksToWait ); + } } } } diff --git a/queue.c b/queue.c index edda860b6..d479ec11e 100644 --- a/queue.c +++ b/queue.c @@ -2200,6 +2200,12 @@ UBaseType_t uxQueueGetQueueItemSize( QueueHandle_t xQueue ) /* PRIVILEGED_FUNCTI } /*-----------------------------------------------------------*/ +UBaseType_t uxQueueGetQueueLength( QueueHandle_t xQueue ) /* PRIVILEGED_FUNCTION */ +{ + return ( ( Queue_t * ) xQueue )->uxLength; +} +/*-----------------------------------------------------------*/ + #if ( configUSE_MUTEXES == 1 ) static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue ) diff --git a/tasks.c b/tasks.c index 2c169d5b5..53ec69c97 100644 --- a/tasks.c +++ b/tasks.c @@ -5306,6 +5306,8 @@ TickType_t uxTaskResetEventItemValue( void ) TCB_t * pxTCB; uint32_t ulReturn; + configASSERT( uxIndexToClear < configTASK_NOTIFICATION_ARRAY_ENTRIES ); + /* If null is passed in here then it is the calling task that is having * its notification state cleared. */ pxTCB = prvGetTCBFromHandle( xTask ); From 5678e7a27c2828e75f1aad3841896b661fcd09b2 Mon Sep 17 00:00:00 2001 From: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Date: Thu, 17 Aug 2023 22:42:41 +0530 Subject: [PATCH 06/21] Update History.txt for V10.6.1 (#759) Update History.txt for V10.6.1 Signed-off-by: kar-rahul-aws --- History.txt | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/History.txt b/History.txt index 1bf7ea045..588500150 100644 --- a/History.txt +++ b/History.txt @@ -1,5 +1,18 @@ Documentation and download available at https://www.FreeRTOS.org/ +Changes between FreeRTOS V10.6.0 and FreeRTOS 10.6.1 released August 17, 2023 + + + Add runtime parameter checks to functions in mpu_wrappers_v2.c file. + The same checks are already performed in API implementations using + asserts. + We thank the following people for their inputs in these changes: + - Lan Luo, Zixia Liu of School of Computer Science and Technology, + Anhui University of Technology, China. + - Xinwen Fu of Department of Computer Science, University of + Massachusetts Lowell, USA. + - Xinhui Shao, Yumeng Wei, Huaiyu Yan, Zhen Ling of School of + Computer Science and Engineering, Southeast University, China. + Changes between FreeRTOS V10.5.1 and FreeRTOS 10.6.0 released July 13, 2023 + Add a new MPU wrapper that places additional restrictions on unprivileged From 76a4a1680060de0d4ac1ea2350b1560251ed1be5 Mon Sep 17 00:00:00 2001 From: kar-rahul-aws Date: Thu, 17 Aug 2023 17:14:04 +0000 Subject: [PATCH 07/21] [AUTO][RELEASE]: Bump task.h version macros to "10.6.1" --- include/task.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/task.h b/include/task.h index 54b16992e..93a898046 100644 --- a/include/task.h +++ b/include/task.h @@ -53,10 +53,10 @@ * The tskKERNEL_VERSION_MAJOR, tskKERNEL_VERSION_MINOR, tskKERNEL_VERSION_BUILD * values will reflect the last released version number. */ -#define tskKERNEL_VERSION_NUMBER "V10.6.0" +#define tskKERNEL_VERSION_NUMBER "V10.6.1" #define tskKERNEL_VERSION_MAJOR 10 #define tskKERNEL_VERSION_MINOR 6 -#define tskKERNEL_VERSION_BUILD 0 +#define tskKERNEL_VERSION_BUILD 1 /* MPU region parameters passed in ulParameters * of MemoryRegion_t struct. */ From c5edc980c5c742ea9881763ae9ca68136b8d9565 Mon Sep 17 00:00:00 2001 From: kar-rahul-aws Date: Thu, 17 Aug 2023 17:14:06 +0000 Subject: [PATCH 08/21] [AUTO][RELEASE]: Bump file header version to "10.6.1" --- .github/scripts/kernel_checker.py | 4 ++-- croutine.c | 2 +- event_groups.c | 2 +- include/FreeRTOS.h | 2 +- include/StackMacros.h | 2 +- include/atomic.h | 2 +- include/croutine.h | 2 +- include/deprecated_definitions.h | 2 +- include/event_groups.h | 2 +- include/list.h | 2 +- include/message_buffer.h | 2 +- include/mpu_prototypes.h | 2 +- include/mpu_wrappers.h | 2 +- include/newlib-freertos.h | 2 +- include/picolibc-freertos.h | 2 +- include/portable.h | 2 +- include/projdefs.h | 2 +- include/queue.h | 2 +- include/semphr.h | 2 +- include/stack_macros.h | 2 +- include/stdint.readme | 2 +- include/stream_buffer.h | 2 +- include/task.h | 2 +- include/timers.h | 2 +- list.c | 2 +- portable/ARMv8M/copy_files.py | 2 +- portable/ARMv8M/non_secure/port.c | 2 +- .../non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h | 2 +- .../portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h | 2 +- .../non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h | 2 +- .../portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h | 2 +- .../non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h | 2 +- .../portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h | 2 +- .../non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h | 2 +- .../portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h | 2 +- portable/ARMv8M/non_secure/portasm.h | 2 +- portable/ARMv8M/non_secure/portmacrocommon.h | 2 +- .../context/portable/GCC/ARM_CM23/secure_context_port.c | 2 +- .../context/portable/GCC/ARM_CM33/secure_context_port.c | 2 +- .../context/portable/IAR/ARM_CM23/secure_context_port_asm.s | 2 +- .../context/portable/IAR/ARM_CM33/secure_context_port_asm.s | 2 +- portable/ARMv8M/secure/context/secure_context.c | 2 +- portable/ARMv8M/secure/context/secure_context.h | 2 +- portable/ARMv8M/secure/heap/secure_heap.c | 2 +- portable/ARMv8M/secure/heap/secure_heap.h | 2 +- portable/ARMv8M/secure/init/secure_init.c | 2 +- portable/ARMv8M/secure/init/secure_init.h | 2 +- portable/ARMv8M/secure/macros/secure_port_macros.h | 2 +- portable/BCC/16BitDOS/Flsh186/port.c | 2 +- portable/BCC/16BitDOS/Flsh186/prtmacro.h | 2 +- portable/BCC/16BitDOS/PC/port.c | 2 +- portable/BCC/16BitDOS/PC/prtmacro.h | 2 +- portable/BCC/16BitDOS/common/portasm.h | 2 +- portable/BCC/16BitDOS/common/portcomn.c | 2 +- portable/CCS/ARM_CM3/port.c | 2 +- portable/CCS/ARM_CM3/portasm.asm | 2 +- portable/CCS/ARM_CM3/portmacro.h | 2 +- portable/CCS/ARM_CM4F/port.c | 2 +- portable/CCS/ARM_CM4F/portasm.asm | 2 +- portable/CCS/ARM_CM4F/portmacro.h | 2 +- portable/CCS/ARM_Cortex-R4/port.c | 2 +- portable/CCS/ARM_Cortex-R4/portASM.asm | 2 +- portable/CCS/ARM_Cortex-R4/portmacro.h | 2 +- portable/CCS/MSP430X/data_model.h | 2 +- portable/CCS/MSP430X/port.c | 2 +- portable/CCS/MSP430X/portext.asm | 2 +- portable/CCS/MSP430X/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V1/port.c | 2 +- portable/CodeWarrior/ColdFire_V1/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V1/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V2/port.c | 2 +- portable/CodeWarrior/ColdFire_V2/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V2/portmacro.h | 2 +- portable/CodeWarrior/HCS12/port.c | 2 +- portable/CodeWarrior/HCS12/portmacro.h | 2 +- portable/Common/mpu_wrappers.c | 2 +- portable/Common/mpu_wrappers_v2.c | 2 +- portable/GCC/ARM7_AT91FR40008/port.c | 2 +- portable/GCC/ARM7_AT91FR40008/portISR.c | 2 +- portable/GCC/ARM7_AT91FR40008/portmacro.h | 2 +- portable/GCC/ARM7_AT91SAM7S/port.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portISR.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portmacro.h | 2 +- portable/GCC/ARM7_LPC2000/port.c | 2 +- portable/GCC/ARM7_LPC2000/portISR.c | 2 +- portable/GCC/ARM7_LPC2000/portmacro.h | 2 +- portable/GCC/ARM7_LPC23xx/port.c | 2 +- portable/GCC/ARM7_LPC23xx/portISR.c | 2 +- portable/GCC/ARM7_LPC23xx/portmacro.h | 2 +- portable/GCC/ARM_CA53_64_BIT/port.c | 2 +- portable/GCC/ARM_CA53_64_BIT/portASM.S | 2 +- portable/GCC/ARM_CA53_64_BIT/portmacro.h | 2 +- portable/GCC/ARM_CA53_64_BIT_SRE/port.c | 2 +- portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S | 2 +- portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h | 2 +- portable/GCC/ARM_CA9/port.c | 2 +- portable/GCC/ARM_CA9/portASM.S | 2 +- portable/GCC/ARM_CA9/portmacro.h | 2 +- portable/GCC/ARM_CM0/port.c | 2 +- portable/GCC/ARM_CM0/portmacro.h | 2 +- portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM23/non_secure/port.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM23/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context.c | 2 +- portable/GCC/ARM_CM23/secure/secure_context.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM23/secure/secure_init.c | 2 +- portable/GCC/ARM_CM23/secure/secure_init.h | 2 +- portable/GCC/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM3/port.c | 2 +- portable/GCC/ARM_CM3/portmacro.h | 2 +- portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM33/non_secure/port.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM33/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context.c | 2 +- portable/GCC/ARM_CM33/secure/secure_context.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM33/secure/secure_init.c | 2 +- portable/GCC/ARM_CM33/secure/secure_init.h | 2 +- portable/GCC/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM35P/non_secure/port.c | 2 +- portable/GCC/ARM_CM35P/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM35P/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM35P/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_context.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_context.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_init.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_init.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM3_MPU/port.c | 2 +- portable/GCC/ARM_CM3_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM4F/port.c | 2 +- portable/GCC/ARM_CM4F/portmacro.h | 2 +- portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM4_MPU/port.c | 2 +- portable/GCC/ARM_CM4_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM55/non_secure/port.c | 2 +- portable/GCC/ARM_CM55/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM55/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM55/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM55/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM55/secure/secure_context.c | 2 +- portable/GCC/ARM_CM55/secure/secure_context.h | 2 +- portable/GCC/ARM_CM55/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM55/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM55/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM55/secure/secure_init.c | 2 +- portable/GCC/ARM_CM55/secure/secure_init.h | 2 +- portable/GCC/ARM_CM55/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM7/r0p1/port.c | 2 +- portable/GCC/ARM_CM7/r0p1/portmacro.h | 2 +- portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM85/non_secure/port.c | 2 +- portable/GCC/ARM_CM85/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM85/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM85/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM85/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM85/secure/secure_context.c | 2 +- portable/GCC/ARM_CM85/secure/secure_context.h | 2 +- portable/GCC/ARM_CM85/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM85/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM85/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM85/secure/secure_init.c | 2 +- portable/GCC/ARM_CM85/secure/secure_init.h | 2 +- portable/GCC/ARM_CM85/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CR5/port.c | 2 +- portable/GCC/ARM_CR5/portASM.S | 2 +- portable/GCC/ARM_CR5/portmacro.h | 2 +- portable/GCC/ARM_CRx_No_GIC/port.c | 2 +- portable/GCC/ARM_CRx_No_GIC/portASM.S | 2 +- portable/GCC/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/GCC/ATMega323/port.c | 2 +- portable/GCC/ATMega323/portmacro.h | 2 +- portable/GCC/AVR32_UC3/exception.S | 2 +- portable/GCC/AVR32_UC3/port.c | 2 +- portable/GCC/AVR32_UC3/portmacro.h | 2 +- portable/GCC/CORTUS_APS3/port.c | 2 +- portable/GCC/CORTUS_APS3/portmacro.h | 2 +- portable/GCC/ColdFire_V2/port.c | 2 +- portable/GCC/ColdFire_V2/portasm.S | 2 +- portable/GCC/ColdFire_V2/portmacro.h | 2 +- portable/GCC/H8S2329/port.c | 2 +- portable/GCC/H8S2329/portmacro.h | 2 +- portable/GCC/HCS12/port.c | 2 +- portable/GCC/HCS12/portmacro.h | 2 +- portable/GCC/IA32_flat/ISR_Support.h | 2 +- portable/GCC/IA32_flat/port.c | 2 +- portable/GCC/IA32_flat/portASM.S | 2 +- portable/GCC/IA32_flat/portmacro.h | 2 +- portable/GCC/MSP430F449/port.c | 2 +- portable/GCC/MSP430F449/portmacro.h | 2 +- portable/GCC/MicroBlaze/port.c | 2 +- portable/GCC/MicroBlaze/portasm.s | 2 +- portable/GCC/MicroBlaze/portmacro.h | 2 +- portable/GCC/MicroBlazeV8/port.c | 2 +- portable/GCC/MicroBlazeV8/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV8/portasm.S | 2 +- portable/GCC/MicroBlazeV8/portmacro.h | 2 +- portable/GCC/MicroBlazeV9/port.c | 2 +- portable/GCC/MicroBlazeV9/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV9/portasm.S | 2 +- portable/GCC/MicroBlazeV9/portmacro.h | 2 +- portable/GCC/NiosII/port.c | 2 +- portable/GCC/NiosII/port_asm.S | 2 +- portable/GCC/NiosII/portmacro.h | 2 +- portable/GCC/PPC405_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC405_Xilinx/port.c | 2 +- portable/GCC/PPC405_Xilinx/portasm.S | 2 +- portable/GCC/PPC405_Xilinx/portmacro.h | 2 +- portable/GCC/PPC440_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC440_Xilinx/port.c | 2 +- portable/GCC/PPC440_Xilinx/portasm.S | 2 +- portable/GCC/PPC440_Xilinx/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/GCC/RISC-V/port.c | 2 +- portable/GCC/RISC-V/portASM.S | 2 +- portable/GCC/RISC-V/portContext.h | 2 +- portable/GCC/RISC-V/portmacro.h | 2 +- portable/GCC/RL78/isr_support.h | 2 +- portable/GCC/RL78/port.c | 2 +- portable/GCC/RL78/portasm.S | 2 +- portable/GCC/RL78/portmacro.h | 2 +- portable/GCC/RX100/port.c | 2 +- portable/GCC/RX100/portmacro.h | 2 +- portable/GCC/RX200/port.c | 2 +- portable/GCC/RX200/portmacro.h | 2 +- portable/GCC/RX600/port.c | 2 +- portable/GCC/RX600/portmacro.h | 2 +- portable/GCC/RX600v2/port.c | 2 +- portable/GCC/RX600v2/portmacro.h | 2 +- portable/GCC/RX700v3_DPFPU/port.c | 2 +- portable/GCC/RX700v3_DPFPU/portmacro.h | 2 +- portable/GCC/STR75x/port.c | 2 +- portable/GCC/STR75x/portISR.c | 2 +- portable/GCC/STR75x/portmacro.h | 2 +- portable/GCC/TriCore_1782/port.c | 2 +- portable/GCC/TriCore_1782/portmacro.h | 2 +- portable/GCC/TriCore_1782/porttrap.c | 2 +- portable/IAR/78K0R/ISR_Support.h | 2 +- portable/IAR/78K0R/port.c | 2 +- portable/IAR/78K0R/portasm.s26 | 2 +- portable/IAR/78K0R/portmacro.h | 2 +- portable/IAR/ARM_CA5_No_GIC/port.c | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.h | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CA5_No_GIC/portmacro.h | 2 +- portable/IAR/ARM_CA9/port.c | 2 +- portable/IAR/ARM_CA9/portASM.h | 2 +- portable/IAR/ARM_CA9/portASM.s | 2 +- portable/IAR/ARM_CA9/portmacro.h | 2 +- portable/IAR/ARM_CM0/port.c | 2 +- portable/IAR/ARM_CM0/portasm.s | 2 +- portable/IAR/ARM_CM0/portmacro.h | 2 +- portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM23/non_secure/port.c | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM23/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context.c | 2 +- portable/IAR/ARM_CM23/secure/secure_context.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM23/secure/secure_init.c | 2 +- portable/IAR/ARM_CM23/secure/secure_init.h | 2 +- portable/IAR/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM3/port.c | 2 +- portable/IAR/ARM_CM3/portasm.s | 2 +- portable/IAR/ARM_CM3/portmacro.h | 2 +- portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM33/non_secure/port.c | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM33/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context.c | 2 +- portable/IAR/ARM_CM33/secure/secure_context.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM33/secure/secure_init.c | 2 +- portable/IAR/ARM_CM33/secure/secure_init.h | 2 +- portable/IAR/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM35P/non_secure/port.c | 2 +- portable/IAR/ARM_CM35P/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM35P/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM35P/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_context.c | 2 +- portable/IAR/ARM_CM35P/secure/secure_context.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM35P/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM35P/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_init.c | 2 +- portable/IAR/ARM_CM35P/secure/secure_init.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM4F/port.c | 2 +- portable/IAR/ARM_CM4F/portasm.s | 2 +- portable/IAR/ARM_CM4F/portmacro.h | 2 +- portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM4F_MPU/port.c | 2 +- portable/IAR/ARM_CM4F_MPU/portasm.s | 2 +- portable/IAR/ARM_CM4F_MPU/portmacro.h | 2 +- portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM55/non_secure/port.c | 2 +- portable/IAR/ARM_CM55/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM55/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM55/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM55/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM55/secure/secure_context.c | 2 +- portable/IAR/ARM_CM55/secure/secure_context.h | 2 +- portable/IAR/ARM_CM55/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM55/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM55/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM55/secure/secure_init.c | 2 +- portable/IAR/ARM_CM55/secure/secure_init.h | 2 +- portable/IAR/ARM_CM55/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM7/r0p1/port.c | 2 +- portable/IAR/ARM_CM7/r0p1/portasm.s | 2 +- portable/IAR/ARM_CM7/r0p1/portmacro.h | 2 +- portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM85/non_secure/port.c | 2 +- portable/IAR/ARM_CM85/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM85/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM85/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM85/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM85/secure/secure_context.c | 2 +- portable/IAR/ARM_CM85/secure/secure_context.h | 2 +- portable/IAR/ARM_CM85/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM85/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM85/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM85/secure/secure_init.c | 2 +- portable/IAR/ARM_CM85/secure/secure_init.h | 2 +- portable/IAR/ARM_CM85/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CRx_No_GIC/port.c | 2 +- portable/IAR/ARM_CRx_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/IAR/ATMega323/port.c | 2 +- portable/IAR/ATMega323/portmacro.h | 2 +- portable/IAR/ATMega323/portmacro.s90 | 2 +- portable/IAR/AVR32_UC3/exception.s82 | 2 +- portable/IAR/AVR32_UC3/port.c | 2 +- portable/IAR/AVR32_UC3/portmacro.h | 2 +- portable/IAR/AVR32_UC3/read.c | 2 +- portable/IAR/AVR32_UC3/write.c | 2 +- portable/IAR/AVR_AVRDx/port.c | 2 +- portable/IAR/AVR_AVRDx/porthardware.h | 2 +- portable/IAR/AVR_AVRDx/portmacro.h | 2 +- portable/IAR/AVR_AVRDx/portmacro.s90 | 2 +- portable/IAR/AVR_Mega0/port.c | 2 +- portable/IAR/AVR_Mega0/porthardware.h | 2 +- portable/IAR/AVR_Mega0/portmacro.h | 2 +- portable/IAR/AVR_Mega0/portmacro.s90 | 2 +- portable/IAR/AtmelSAM7S64/ISR_Support.h | 2 +- portable/IAR/AtmelSAM7S64/port.c | 2 +- portable/IAR/AtmelSAM7S64/portasm.s79 | 2 +- portable/IAR/AtmelSAM7S64/portmacro.h | 2 +- portable/IAR/AtmelSAM9XE/ISR_Support.h | 2 +- portable/IAR/AtmelSAM9XE/port.c | 2 +- portable/IAR/AtmelSAM9XE/portasm.s79 | 2 +- portable/IAR/AtmelSAM9XE/portmacro.h | 2 +- portable/IAR/LPC2000/ISR_Support.h | 2 +- portable/IAR/LPC2000/port.c | 2 +- portable/IAR/LPC2000/portasm.s79 | 2 +- portable/IAR/LPC2000/portmacro.h | 2 +- portable/IAR/MSP430/port.c | 2 +- portable/IAR/MSP430/portasm.h | 2 +- portable/IAR/MSP430/portext.s43 | 2 +- portable/IAR/MSP430/portmacro.h | 2 +- portable/IAR/MSP430X/data_model.h | 2 +- portable/IAR/MSP430X/port.c | 2 +- portable/IAR/MSP430X/portext.s43 | 2 +- portable/IAR/MSP430X/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/IAR/RISC-V/port.c | 2 +- portable/IAR/RISC-V/portASM.s | 2 +- portable/IAR/RISC-V/portContext.h | 2 +- portable/IAR/RISC-V/portmacro.h | 2 +- portable/IAR/RL78/port.c | 2 +- portable/IAR/RL78/portasm.s | 2 +- portable/IAR/RL78/portmacro.h | 2 +- portable/IAR/RX100/port.c | 2 +- portable/IAR/RX100/port_asm.s | 2 +- portable/IAR/RX100/portmacro.h | 2 +- portable/IAR/RX600/port.c | 2 +- portable/IAR/RX600/port_asm.s | 2 +- portable/IAR/RX600/portmacro.h | 2 +- portable/IAR/RX700v3_DPFPU/port.c | 2 +- portable/IAR/RX700v3_DPFPU/portmacro.h | 2 +- portable/IAR/RXv2/port.c | 2 +- portable/IAR/RXv2/port_asm.s | 2 +- portable/IAR/RXv2/portmacro.h | 2 +- portable/IAR/STR71x/ISR_Support.h | 2 +- portable/IAR/STR71x/port.c | 2 +- portable/IAR/STR71x/portasm.s79 | 2 +- portable/IAR/STR71x/portmacro.h | 2 +- portable/IAR/STR75x/ISR_Support.h | 2 +- portable/IAR/STR75x/port.c | 2 +- portable/IAR/STR75x/portasm.s79 | 2 +- portable/IAR/STR75x/portmacro.h | 2 +- portable/IAR/STR91x/ISR_Support.h | 2 +- portable/IAR/STR91x/port.c | 2 +- portable/IAR/STR91x/portasm.s79 | 2 +- portable/IAR/STR91x/portmacro.h | 2 +- portable/IAR/V850ES/ISR_Support.h | 2 +- portable/IAR/V850ES/port.c | 2 +- portable/IAR/V850ES/portasm.s85 | 2 +- portable/IAR/V850ES/portasm_Fx3.s85 | 2 +- portable/IAR/V850ES/portasm_Hx2.s85 | 2 +- portable/IAR/V850ES/portmacro.h | 2 +- portable/MPLAB/PIC18F/port.c | 2 +- portable/MPLAB/PIC18F/portmacro.h | 2 +- portable/MPLAB/PIC24_dsPIC/port.c | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S | 2 +- portable/MPLAB/PIC24_dsPIC/portmacro.h | 2 +- portable/MPLAB/PIC32MEC14xx/ISR_Support.h | 2 +- portable/MPLAB/PIC32MEC14xx/port.c | 2 +- portable/MPLAB/PIC32MEC14xx/port_asm.S | 2 +- portable/MPLAB/PIC32MEC14xx/portmacro.h | 2 +- portable/MPLAB/PIC32MX/ISR_Support.h | 2 +- portable/MPLAB/PIC32MX/port.c | 2 +- portable/MPLAB/PIC32MX/port_asm.S | 2 +- portable/MPLAB/PIC32MX/portmacro.h | 2 +- portable/MPLAB/PIC32MZ/ISR_Support.h | 2 +- portable/MPLAB/PIC32MZ/port.c | 2 +- portable/MPLAB/PIC32MZ/port_asm.S | 2 +- portable/MPLAB/PIC32MZ/portmacro.h | 2 +- portable/MSVC-MingW/port.c | 2 +- portable/MSVC-MingW/portmacro.h | 2 +- portable/MemMang/heap_1.c | 2 +- portable/MemMang/heap_2.c | 2 +- portable/MemMang/heap_3.c | 2 +- portable/MemMang/heap_4.c | 2 +- portable/MemMang/heap_5.c | 2 +- portable/MikroC/ARM_CM4F/port.c | 2 +- portable/MikroC/ARM_CM4F/portmacro.h | 2 +- portable/Paradigm/Tern_EE/large_untested/port.c | 2 +- portable/Paradigm/Tern_EE/large_untested/portasm.h | 2 +- portable/Paradigm/Tern_EE/large_untested/portmacro.h | 2 +- portable/Paradigm/Tern_EE/small/port.c | 2 +- portable/Paradigm/Tern_EE/small/portasm.h | 2 +- portable/Paradigm/Tern_EE/small/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/port.c | 2 +- portable/RVDS/ARM7_LPC21xx/portASM.s | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.inc | 2 +- portable/RVDS/ARM_CA9/port.c | 2 +- portable/RVDS/ARM_CA9/portASM.s | 2 +- portable/RVDS/ARM_CA9/portmacro.h | 2 +- portable/RVDS/ARM_CA9/portmacro.inc | 2 +- portable/RVDS/ARM_CM0/port.c | 2 +- portable/RVDS/ARM_CM0/portmacro.h | 2 +- portable/RVDS/ARM_CM3/port.c | 2 +- portable/RVDS/ARM_CM3/portmacro.h | 2 +- portable/RVDS/ARM_CM4F/port.c | 2 +- portable/RVDS/ARM_CM4F/portmacro.h | 2 +- portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c | 2 +- portable/RVDS/ARM_CM4_MPU/port.c | 2 +- portable/RVDS/ARM_CM4_MPU/portmacro.h | 2 +- portable/RVDS/ARM_CM7/r0p1/port.c | 2 +- portable/RVDS/ARM_CM7/r0p1/portmacro.h | 2 +- portable/Renesas/RX100/port.c | 2 +- portable/Renesas/RX100/port_asm.src | 2 +- portable/Renesas/RX100/portmacro.h | 2 +- portable/Renesas/RX200/port.c | 2 +- portable/Renesas/RX200/port_asm.src | 2 +- portable/Renesas/RX200/portmacro.h | 2 +- portable/Renesas/RX600/port.c | 2 +- portable/Renesas/RX600/port_asm.src | 2 +- portable/Renesas/RX600/portmacro.h | 2 +- portable/Renesas/RX600v2/port.c | 2 +- portable/Renesas/RX600v2/port_asm.src | 2 +- portable/Renesas/RX600v2/portmacro.h | 2 +- portable/Renesas/RX700v3_DPFPU/port.c | 2 +- portable/Renesas/RX700v3_DPFPU/port_asm.src | 2 +- portable/Renesas/RX700v3_DPFPU/portmacro.h | 2 +- portable/Renesas/SH2A_FPU/ISR_Support.inc | 2 +- portable/Renesas/SH2A_FPU/port.c | 2 +- portable/Renesas/SH2A_FPU/portasm.src | 2 +- portable/Renesas/SH2A_FPU/portmacro.h | 2 +- portable/Rowley/MSP430F449/port.c | 2 +- portable/Rowley/MSP430F449/portasm.h | 2 +- portable/Rowley/MSP430F449/portext.asm | 2 +- portable/Rowley/MSP430F449/portmacro.h | 2 +- portable/SDCC/Cygnal/port.c | 2 +- portable/SDCC/Cygnal/portmacro.h | 2 +- portable/Softune/MB91460/__STD_LIB_sbrk.c | 2 +- portable/Softune/MB91460/port.c | 2 +- portable/Softune/MB91460/portmacro.h | 2 +- portable/Softune/MB96340/__STD_LIB_sbrk.c | 2 +- portable/Softune/MB96340/port.c | 2 +- portable/Softune/MB96340/portmacro.h | 2 +- portable/Tasking/ARM_CM4F/port.c | 2 +- portable/Tasking/ARM_CM4F/port_asm.asm | 2 +- portable/Tasking/ARM_CM4F/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/port.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_v1/port.c | 2 +- portable/ThirdParty/GCC/ARC_v1/portmacro.h | 2 +- portable/ThirdParty/GCC/ATmega/port.c | 2 +- portable/ThirdParty/GCC/ATmega/portmacro.h | 2 +- portable/ThirdParty/GCC/Posix/port.c | 2 +- portable/ThirdParty/GCC/Posix/portmacro.h | 2 +- portable/ThirdParty/GCC/Posix/utils/wait_for_event.c | 2 +- portable/ThirdParty/GCC/Posix/utils/wait_for_event.h | 2 +- portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c | 2 +- portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h | 2 +- portable/ThirdParty/GCC/RP2040/include/portmacro.h | 2 +- portable/ThirdParty/GCC/RP2040/include/rp2040_config.h | 2 +- portable/ThirdParty/GCC/RP2040/port.c | 2 +- .../ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h | 2 +- portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h | 2 +- portable/ThirdParty/GCC/Xtensa_ESP32/port.c | 2 +- portable/ThirdParty/XCC/Xtensa/port.c | 2 +- portable/ThirdParty/XCC/Xtensa/portasm.S | 2 +- portable/ThirdParty/XCC/Xtensa/portbenchmark.h | 2 +- portable/ThirdParty/XCC/Xtensa/portclib.c | 2 +- portable/ThirdParty/XCC/Xtensa/portmacro.h | 2 +- portable/ThirdParty/XCC/Xtensa/porttrace.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_api.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_config.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_context.S | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_context.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_init.c | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_intr.c | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_timer.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S | 2 +- portable/WizC/PIC18/Drivers/Tick/Tick.c | 2 +- portable/WizC/PIC18/Drivers/Tick/isrTick.c | 2 +- portable/WizC/PIC18/addFreeRTOS.h | 2 +- portable/WizC/PIC18/port.c | 2 +- portable/WizC/PIC18/portmacro.h | 2 +- portable/oWatcom/16BitDOS/Flsh186/port.c | 2 +- portable/oWatcom/16BitDOS/Flsh186/portmacro.h | 2 +- portable/oWatcom/16BitDOS/PC/port.c | 2 +- portable/oWatcom/16BitDOS/PC/portmacro.h | 2 +- portable/oWatcom/16BitDOS/common/portasm.h | 2 +- portable/oWatcom/16BitDOS/common/portcomn.c | 2 +- queue.c | 2 +- stream_buffer.c | 2 +- tasks.c | 2 +- timers.c | 2 +- 657 files changed, 658 insertions(+), 658 deletions(-) diff --git a/.github/scripts/kernel_checker.py b/.github/scripts/kernel_checker.py index 4aea4cc70..697561ab4 100755 --- a/.github/scripts/kernel_checker.py +++ b/.github/scripts/kernel_checker.py @@ -1,6 +1,6 @@ #!/usr/bin/env python3 #/* -# * FreeRTOS Kernel V10.6.0 +# * FreeRTOS Kernel V10.6.1 # * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * SPDX-License-Identifier: MIT @@ -99,7 +99,7 @@ KERNEL_THIRD_PARTY_PATTERNS = [ KERNEL_HEADER = [ '/*\n', - ' * FreeRTOS Kernel V10.6.0\n', + ' * FreeRTOS Kernel V10.6.1\n', ' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n', ' *\n', ' * SPDX-License-Identifier: MIT\n', diff --git a/croutine.c b/croutine.c index 9661e1486..754140291 100644 --- a/croutine.c +++ b/croutine.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/event_groups.c b/event_groups.c index 762576284..7e4a402bc 100644 --- a/event_groups.c +++ b/event_groups.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/FreeRTOS.h b/include/FreeRTOS.h index d21554560..9228e071f 100644 --- a/include/FreeRTOS.h +++ b/include/FreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/StackMacros.h b/include/StackMacros.h index 9542d7ead..6ee27b801 100644 --- a/include/StackMacros.h +++ b/include/StackMacros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/atomic.h b/include/atomic.h index 88801911d..1aa50e64a 100644 --- a/include/atomic.h +++ b/include/atomic.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/croutine.h b/include/croutine.h index 5c0e39e7a..349deeab3 100644 --- a/include/croutine.h +++ b/include/croutine.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/deprecated_definitions.h b/include/deprecated_definitions.h index f2246b28a..c8087a1fd 100644 --- a/include/deprecated_definitions.h +++ b/include/deprecated_definitions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/event_groups.h b/include/event_groups.h index 185a946fa..a205a982d 100644 --- a/include/event_groups.h +++ b/include/event_groups.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/list.h b/include/list.h index 55c9c1508..43f3bd503 100644 --- a/include/list.h +++ b/include/list.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/message_buffer.h b/include/message_buffer.h index 7ebbc0080..f5c296c3e 100644 --- a/include/message_buffer.h +++ b/include/message_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/mpu_prototypes.h b/include/mpu_prototypes.h index 8502c891d..3183bae10 100644 --- a/include/mpu_prototypes.h +++ b/include/mpu_prototypes.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h index cbf9d7033..db6356344 100644 --- a/include/mpu_wrappers.h +++ b/include/mpu_wrappers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/newlib-freertos.h b/include/newlib-freertos.h index 658220b47..1377f41db 100644 --- a/include/newlib-freertos.h +++ b/include/newlib-freertos.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/picolibc-freertos.h b/include/picolibc-freertos.h index c348ba0ed..91edeae22 100644 --- a/include/picolibc-freertos.h +++ b/include/picolibc-freertos.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/portable.h b/include/portable.h index a841911a2..ebce9d6cf 100644 --- a/include/portable.h +++ b/include/portable.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/projdefs.h b/include/projdefs.h index 7598e90c5..8ee566ce1 100644 --- a/include/projdefs.h +++ b/include/projdefs.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/queue.h b/include/queue.h index 7076523be..d0a3032c6 100644 --- a/include/queue.h +++ b/include/queue.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/semphr.h b/include/semphr.h index 71d86ff76..5ca43d6c3 100644 --- a/include/semphr.h +++ b/include/semphr.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/stack_macros.h b/include/stack_macros.h index 4c3d03173..7a32e059c 100644 --- a/include/stack_macros.h +++ b/include/stack_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/stdint.readme b/include/stdint.readme index 56dd02dcc..3442ba92d 100644 --- a/include/stdint.readme +++ b/include/stdint.readme @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/stream_buffer.h b/include/stream_buffer.h index cad8b7de5..84abc9688 100644 --- a/include/stream_buffer.h +++ b/include/stream_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/task.h b/include/task.h index 93a898046..9a198f2f4 100644 --- a/include/task.h +++ b/include/task.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/timers.h b/include/timers.h index fb4455265..9d5f4dde9 100644 --- a/include/timers.h +++ b/include/timers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/list.c b/list.c index b8fbbb01c..8cff42e83 100644 --- a/list.c +++ b/list.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/copy_files.py b/portable/ARMv8M/copy_files.py index f335152e4..8d501543c 100644 --- a/portable/ARMv8M/copy_files.py +++ b/portable/ARMv8M/copy_files.py @@ -1,5 +1,5 @@ #/* -# * FreeRTOS Kernel V10.6.0 +# * FreeRTOS Kernel V10.6.1 # * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c index 38f8c68ae..270ee5eda 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index bac902ad4..ed3d71608 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h index 79fb8cc56..148c5c45e 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c index 38f8c68ae..270ee5eda 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c index 21c34a14c..f378341cf 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h index 79fb8cc56..148c5c45e 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c index 7ba47dd26..5c01e02d6 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c index f6534e5ad..2f18b44c4 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h index d970dfd91..171ff1503 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c index 7ba47dd26..5c01e02d6 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c index e445d63e0..b6a86cfd2 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h index d970dfd91..171ff1503 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h index 12235eb5d..091c33c73 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h index 68e1ae7fa..16c6dc7c2 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h index bbe6f320c..4e8ad06d4 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S index fdb2db91b..ee26520b4 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s index 3b13f9432..e89a80448 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h index 6e5c4e1c8..af894a78d 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S index fdb2db91b..ee26520b4 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s index 640dff9b1..e1a10155d 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h index 6e5c4e1c8..af894a78d 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S index 96922c1e6..cbe6b4909 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s index 7ea8c16ff..cc8f3cb6c 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h index 1763094ef..b78f957d3 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S index 96922c1e6..cbe6b4909 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s index d63de40b4..c738cdde6 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h index c193e4a2d..b7c487cd2 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h index 265fcb76a..05ac91399 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h index 64ce069f1..7e7d6450b 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h index c5b81bdd3..d970c79fe 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portasm.h b/portable/ARMv8M/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/ARMv8M/non_secure/portasm.h +++ b/portable/ARMv8M/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portmacrocommon.h b/portable/ARMv8M/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/ARMv8M/non_secure/portmacrocommon.h +++ b/portable/ARMv8M/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c index 2a20eba5c..bf62892a7 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c index 0b8ac7455..541cd1c2d 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s index 9dd82ff5d..afa0bf5d1 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s index 94d3d5240..620dfc3fc 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c index 8e6027e85..e02585e68 100644 --- a/portable/ARMv8M/secure/context/secure_context.c +++ b/portable/ARMv8M/secure/context/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/secure_context.h b/portable/ARMv8M/secure/context/secure_context.h index 4b7e8017e..872f4767c 100644 --- a/portable/ARMv8M/secure/context/secure_context.h +++ b/portable/ARMv8M/secure/context/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/heap/secure_heap.c b/portable/ARMv8M/secure/heap/secure_heap.c index 6d566318e..0a452b6a0 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.c +++ b/portable/ARMv8M/secure/heap/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/heap/secure_heap.h b/portable/ARMv8M/secure/heap/secure_heap.h index c77d1cc96..b95ab4214 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.h +++ b/portable/ARMv8M/secure/heap/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/init/secure_init.c b/portable/ARMv8M/secure/init/secure_init.c index e729dc8ca..419b91e62 100644 --- a/portable/ARMv8M/secure/init/secure_init.c +++ b/portable/ARMv8M/secure/init/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/init/secure_init.h b/portable/ARMv8M/secure/init/secure_init.h index f905a423f..6017dc15a 100644 --- a/portable/ARMv8M/secure/init/secure_init.h +++ b/portable/ARMv8M/secure/init/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/macros/secure_port_macros.h b/portable/ARMv8M/secure/macros/secure_port_macros.h index c95d2258b..335f24fbc 100644 --- a/portable/ARMv8M/secure/macros/secure_port_macros.h +++ b/portable/ARMv8M/secure/macros/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/Flsh186/port.c b/portable/BCC/16BitDOS/Flsh186/port.c index e09a02fc3..c0fb7c91a 100644 --- a/portable/BCC/16BitDOS/Flsh186/port.c +++ b/portable/BCC/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/Flsh186/prtmacro.h b/portable/BCC/16BitDOS/Flsh186/prtmacro.h index 13854f6d6..73479f57e 100644 --- a/portable/BCC/16BitDOS/Flsh186/prtmacro.h +++ b/portable/BCC/16BitDOS/Flsh186/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/PC/port.c b/portable/BCC/16BitDOS/PC/port.c index 560f90479..78e4f369a 100644 --- a/portable/BCC/16BitDOS/PC/port.c +++ b/portable/BCC/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/PC/prtmacro.h b/portable/BCC/16BitDOS/PC/prtmacro.h index 5a40493e4..0ecebb4c4 100644 --- a/portable/BCC/16BitDOS/PC/prtmacro.h +++ b/portable/BCC/16BitDOS/PC/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/common/portasm.h b/portable/BCC/16BitDOS/common/portasm.h index 8e9190310..fab1c71eb 100644 --- a/portable/BCC/16BitDOS/common/portasm.h +++ b/portable/BCC/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/common/portcomn.c b/portable/BCC/16BitDOS/common/portcomn.c index 8df29eda7..879dfb25b 100644 --- a/portable/BCC/16BitDOS/common/portcomn.c +++ b/portable/BCC/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM3/port.c b/portable/CCS/ARM_CM3/port.c index ec4d92cfe..7b6da107b 100755 --- a/portable/CCS/ARM_CM3/port.c +++ b/portable/CCS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM3/portasm.asm b/portable/CCS/ARM_CM3/portasm.asm index 24217c1ab..6c9bdb7fe 100644 --- a/portable/CCS/ARM_CM3/portasm.asm +++ b/portable/CCS/ARM_CM3/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM3/portmacro.h b/portable/CCS/ARM_CM3/portmacro.h index 6296a69e8..165dc01e7 100644 --- a/portable/CCS/ARM_CM3/portmacro.h +++ b/portable/CCS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM4F/port.c b/portable/CCS/ARM_CM4F/port.c index 5de44f0b3..577862067 100755 --- a/portable/CCS/ARM_CM4F/port.c +++ b/portable/CCS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM4F/portasm.asm b/portable/CCS/ARM_CM4F/portasm.asm index 5fd0ed554..602426f01 100644 --- a/portable/CCS/ARM_CM4F/portasm.asm +++ b/portable/CCS/ARM_CM4F/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM4F/portmacro.h b/portable/CCS/ARM_CM4F/portmacro.h index 89b328823..721874133 100644 --- a/portable/CCS/ARM_CM4F/portmacro.h +++ b/portable/CCS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_Cortex-R4/port.c b/portable/CCS/ARM_Cortex-R4/port.c index d7b496863..e0088dc81 100644 --- a/portable/CCS/ARM_Cortex-R4/port.c +++ b/portable/CCS/ARM_Cortex-R4/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_Cortex-R4/portASM.asm b/portable/CCS/ARM_Cortex-R4/portASM.asm index 2527bec2b..b077f662f 100644 --- a/portable/CCS/ARM_Cortex-R4/portASM.asm +++ b/portable/CCS/ARM_Cortex-R4/portASM.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_Cortex-R4/portmacro.h b/portable/CCS/ARM_Cortex-R4/portmacro.h index 7c8e24aae..6eaf01eb6 100644 --- a/portable/CCS/ARM_Cortex-R4/portmacro.h +++ b/portable/CCS/ARM_Cortex-R4/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/data_model.h b/portable/CCS/MSP430X/data_model.h index c7e330764..877579e17 100644 --- a/portable/CCS/MSP430X/data_model.h +++ b/portable/CCS/MSP430X/data_model.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/port.c b/portable/CCS/MSP430X/port.c index 119e86400..894716bfb 100644 --- a/portable/CCS/MSP430X/port.c +++ b/portable/CCS/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/portext.asm b/portable/CCS/MSP430X/portext.asm index db21f1584..3f5ba64b9 100644 --- a/portable/CCS/MSP430X/portext.asm +++ b/portable/CCS/MSP430X/portext.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/portmacro.h b/portable/CCS/MSP430X/portmacro.h index fb5384141..eed0bd2fb 100644 --- a/portable/CCS/MSP430X/portmacro.h +++ b/portable/CCS/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V1/port.c b/portable/CodeWarrior/ColdFire_V1/port.c index 57d1b1b17..cf281bb85 100644 --- a/portable/CodeWarrior/ColdFire_V1/port.c +++ b/portable/CodeWarrior/ColdFire_V1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V1/portasm.S b/portable/CodeWarrior/ColdFire_V1/portasm.S index 687b7b71f..0ca06a1a0 100644 --- a/portable/CodeWarrior/ColdFire_V1/portasm.S +++ b/portable/CodeWarrior/ColdFire_V1/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V1/portmacro.h b/portable/CodeWarrior/ColdFire_V1/portmacro.h index fe4147086..dde2ccbe2 100644 --- a/portable/CodeWarrior/ColdFire_V1/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V2/port.c b/portable/CodeWarrior/ColdFire_V2/port.c index ced4d23c2..168840de9 100644 --- a/portable/CodeWarrior/ColdFire_V2/port.c +++ b/portable/CodeWarrior/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V2/portasm.S b/portable/CodeWarrior/ColdFire_V2/portasm.S index 98e2650aa..3382c8895 100644 --- a/portable/CodeWarrior/ColdFire_V2/portasm.S +++ b/portable/CodeWarrior/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V2/portmacro.h b/portable/CodeWarrior/ColdFire_V2/portmacro.h index d6c4f0917..e785dee65 100644 --- a/portable/CodeWarrior/ColdFire_V2/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/HCS12/port.c b/portable/CodeWarrior/HCS12/port.c index 05e0aab03..80e69a8da 100644 --- a/portable/CodeWarrior/HCS12/port.c +++ b/portable/CodeWarrior/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/HCS12/portmacro.h b/portable/CodeWarrior/HCS12/portmacro.h index da9af4b5e..6871f7633 100644 --- a/portable/CodeWarrior/HCS12/portmacro.h +++ b/portable/CodeWarrior/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index ccc6fa376..e6c8850ed 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Common/mpu_wrappers_v2.c b/portable/Common/mpu_wrappers_v2.c index d1effc460..f5f9a4e15 100644 --- a/portable/Common/mpu_wrappers_v2.c +++ b/portable/Common/mpu_wrappers_v2.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91FR40008/port.c b/portable/GCC/ARM7_AT91FR40008/port.c index b64b1f5b7..3d1d1ace8 100644 --- a/portable/GCC/ARM7_AT91FR40008/port.c +++ b/portable/GCC/ARM7_AT91FR40008/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91FR40008/portISR.c b/portable/GCC/ARM7_AT91FR40008/portISR.c index 3dda04826..d02660ec8 100644 --- a/portable/GCC/ARM7_AT91FR40008/portISR.c +++ b/portable/GCC/ARM7_AT91FR40008/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91FR40008/portmacro.h b/portable/GCC/ARM7_AT91FR40008/portmacro.h index dfc2a0fab..ea0f2d1c1 100644 --- a/portable/GCC/ARM7_AT91FR40008/portmacro.h +++ b/portable/GCC/ARM7_AT91FR40008/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91SAM7S/port.c b/portable/GCC/ARM7_AT91SAM7S/port.c index 6c7e68320..ba3846b47 100644 --- a/portable/GCC/ARM7_AT91SAM7S/port.c +++ b/portable/GCC/ARM7_AT91SAM7S/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91SAM7S/portISR.c b/portable/GCC/ARM7_AT91SAM7S/portISR.c index c16af2318..8dd92a236 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portISR.c +++ b/portable/GCC/ARM7_AT91SAM7S/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/portable/GCC/ARM7_AT91SAM7S/portmacro.h index ef20ff787..05e404527 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portmacro.h +++ b/portable/GCC/ARM7_AT91SAM7S/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC2000/port.c b/portable/GCC/ARM7_LPC2000/port.c index 254d55ea4..3efc13658 100644 --- a/portable/GCC/ARM7_LPC2000/port.c +++ b/portable/GCC/ARM7_LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC2000/portISR.c b/portable/GCC/ARM7_LPC2000/portISR.c index 7af6e082b..69bee162b 100644 --- a/portable/GCC/ARM7_LPC2000/portISR.c +++ b/portable/GCC/ARM7_LPC2000/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC2000/portmacro.h b/portable/GCC/ARM7_LPC2000/portmacro.h index 3f8f3cddb..2a674cc94 100644 --- a/portable/GCC/ARM7_LPC2000/portmacro.h +++ b/portable/GCC/ARM7_LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC23xx/port.c b/portable/GCC/ARM7_LPC23xx/port.c index 86d18acc7..7d4cddaac 100644 --- a/portable/GCC/ARM7_LPC23xx/port.c +++ b/portable/GCC/ARM7_LPC23xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC23xx/portISR.c b/portable/GCC/ARM7_LPC23xx/portISR.c index b888b701f..a79401e1e 100644 --- a/portable/GCC/ARM7_LPC23xx/portISR.c +++ b/portable/GCC/ARM7_LPC23xx/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC23xx/portmacro.h b/portable/GCC/ARM7_LPC23xx/portmacro.h index 1a9aec1a7..5c1ab3859 100644 --- a/portable/GCC/ARM7_LPC23xx/portmacro.h +++ b/portable/GCC/ARM7_LPC23xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT/port.c b/portable/GCC/ARM_CA53_64_BIT/port.c index 86493544c..fd0913e8e 100644 --- a/portable/GCC/ARM_CA53_64_BIT/port.c +++ b/portable/GCC/ARM_CA53_64_BIT/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT/portASM.S b/portable/GCC/ARM_CA53_64_BIT/portASM.S index 9c7e7c278..ef46b4eb3 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portASM.S +++ b/portable/GCC/ARM_CA53_64_BIT/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT/portmacro.h b/portable/GCC/ARM_CA53_64_BIT/portmacro.h index 8b3f5e2a5..c5a16809e 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portmacro.h +++ b/portable/GCC/ARM_CA53_64_BIT/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT_SRE/port.c b/portable/GCC/ARM_CA53_64_BIT_SRE/port.c index 8473ccad0..20beb4eed 100644 --- a/portable/GCC/ARM_CA53_64_BIT_SRE/port.c +++ b/portable/GCC/ARM_CA53_64_BIT_SRE/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S b/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S index 16ab484f6..e1e133e6a 100644 --- a/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S +++ b/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h b/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h index 1ae90280b..067f8b37a 100644 --- a/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h +++ b/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA9/port.c b/portable/GCC/ARM_CA9/port.c index 4b4a664db..f0f0853f9 100644 --- a/portable/GCC/ARM_CA9/port.c +++ b/portable/GCC/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA9/portASM.S b/portable/GCC/ARM_CA9/portASM.S index f18b40454..39c980143 100644 --- a/portable/GCC/ARM_CA9/portASM.S +++ b/portable/GCC/ARM_CA9/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA9/portmacro.h b/portable/GCC/ARM_CA9/portmacro.h index 7470f7bda..b68f4aaea 100644 --- a/portable/GCC/ARM_CA9/portmacro.h +++ b/portable/GCC/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM0/port.c b/portable/GCC/ARM_CM0/port.c index de4387c2d..40c01f2b9 100644 --- a/portable/GCC/ARM_CM0/port.c +++ b/portable/GCC/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM0/portmacro.h b/portable/GCC/ARM_CM0/portmacro.h index 0b0ab8187..75d01d095 100644 --- a/portable/GCC/ARM_CM0/portmacro.h +++ b/portable/GCC/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c index 38f8c68ae..270ee5eda 100644 --- a/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index bac902ad4..ed3d71608 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.h b/portable/GCC/ARM_CM23/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portmacro.h b/portable/GCC/ARM_CM23/non_secure/portmacro.h index 79fb8cc56..148c5c45e 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c index 8e6027e85..e02585e68 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/portable/GCC/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_context.h b/portable/GCC/ARM_CM23/secure/secure_context.h index 4b7e8017e..872f4767c 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.h +++ b/portable/GCC/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_context_port.c b/portable/GCC/ARM_CM23/secure/secure_context_port.c index 2a20eba5c..bf62892a7 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM23/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.c b/portable/GCC/ARM_CM23/secure/secure_heap.c index 6d566318e..0a452b6a0 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.c +++ b/portable/GCC/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.h b/portable/GCC/ARM_CM23/secure/secure_heap.h index c77d1cc96..b95ab4214 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.h +++ b/portable/GCC/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_init.c b/portable/GCC/ARM_CM23/secure/secure_init.c index e729dc8ca..419b91e62 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.c +++ b/portable/GCC/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_init.h b/portable/GCC/ARM_CM23/secure/secure_init.h index f905a423f..6017dc15a 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.h +++ b/portable/GCC/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_port_macros.h b/portable/GCC/ARM_CM23/secure/secure_port_macros.h index c95d2258b..335f24fbc 100644 --- a/portable/GCC/ARM_CM23/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c index 38f8c68ae..270ee5eda 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index 21c34a14c..f378341cf 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h index 79fb8cc56..148c5c45e 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3/port.c b/portable/GCC/ARM_CM3/port.c index bcaf27681..b9cdd7214 100755 --- a/portable/GCC/ARM_CM3/port.c +++ b/portable/GCC/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3/portmacro.h b/portable/GCC/ARM_CM3/portmacro.h index 93f352da8..794d4bcba 100644 --- a/portable/GCC/ARM_CM3/portmacro.h +++ b/portable/GCC/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c index 7ba47dd26..5c01e02d6 100644 --- a/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.c b/portable/GCC/ARM_CM33/non_secure/portasm.c index f6534e5ad..2f18b44c4 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.h b/portable/GCC/ARM_CM33/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portmacro.h b/portable/GCC/ARM_CM33/non_secure/portmacro.h index d970dfd91..171ff1503 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c index 8e6027e85..e02585e68 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/portable/GCC/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_context.h b/portable/GCC/ARM_CM33/secure/secure_context.h index 4b7e8017e..872f4767c 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.h +++ b/portable/GCC/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_context_port.c b/portable/GCC/ARM_CM33/secure/secure_context_port.c index 0b8ac7455..541cd1c2d 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM33/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.c b/portable/GCC/ARM_CM33/secure/secure_heap.c index 6d566318e..0a452b6a0 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.c +++ b/portable/GCC/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.h b/portable/GCC/ARM_CM33/secure/secure_heap.h index c77d1cc96..b95ab4214 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.h +++ b/portable/GCC/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_init.c b/portable/GCC/ARM_CM33/secure/secure_init.c index e729dc8ca..419b91e62 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.c +++ b/portable/GCC/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_init.h b/portable/GCC/ARM_CM33/secure/secure_init.h index f905a423f..6017dc15a 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.h +++ b/portable/GCC/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_port_macros.h b/portable/GCC/ARM_CM33/secure/secure_port_macros.h index c95d2258b..335f24fbc 100644 --- a/portable/GCC/ARM_CM33/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c index 7ba47dd26..5c01e02d6 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c index e445d63e0..b6a86cfd2 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h index d970dfd91..171ff1503 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c index 7ba47dd26..5c01e02d6 100644 --- a/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/port.c b/portable/GCC/ARM_CM35P/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/GCC/ARM_CM35P/non_secure/port.c +++ b/portable/GCC/ARM_CM35P/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portasm.c b/portable/GCC/ARM_CM35P/non_secure/portasm.c index f6534e5ad..2f18b44c4 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portasm.c +++ b/portable/GCC/ARM_CM35P/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portasm.h b/portable/GCC/ARM_CM35P/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portasm.h +++ b/portable/GCC/ARM_CM35P/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portmacro.h b/portable/GCC/ARM_CM35P/non_secure/portmacro.h index 12235eb5d..091c33c73 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM35P/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_context.c b/portable/GCC/ARM_CM35P/secure/secure_context.c index 8e6027e85..e02585e68 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_context.c +++ b/portable/GCC/ARM_CM35P/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_context.h b/portable/GCC/ARM_CM35P/secure/secure_context.h index 4b7e8017e..872f4767c 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_context.h +++ b/portable/GCC/ARM_CM35P/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_context_port.c b/portable/GCC/ARM_CM35P/secure/secure_context_port.c index 0b8ac7455..541cd1c2d 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM35P/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_heap.c b/portable/GCC/ARM_CM35P/secure/secure_heap.c index 6d566318e..0a452b6a0 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_heap.c +++ b/portable/GCC/ARM_CM35P/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_heap.h b/portable/GCC/ARM_CM35P/secure/secure_heap.h index c77d1cc96..b95ab4214 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_heap.h +++ b/portable/GCC/ARM_CM35P/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_init.c b/portable/GCC/ARM_CM35P/secure/secure_init.c index e729dc8ca..419b91e62 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_init.c +++ b/portable/GCC/ARM_CM35P/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_init.h b/portable/GCC/ARM_CM35P/secure/secure_init.h index f905a423f..6017dc15a 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_init.h +++ b/portable/GCC/ARM_CM35P/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_port_macros.h b/portable/GCC/ARM_CM35P/secure/secure_port_macros.h index c95d2258b..335f24fbc 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM35P/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c index 7ba47dd26..5c01e02d6 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c index e445d63e0..b6a86cfd2 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h index 12235eb5d..091c33c73 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c index 15a15100c..076a1e754 100644 --- a/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index d35b56379..7b74545da 100755 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h index f9de6c1fe..d24445a94 100644 --- a/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4F/port.c b/portable/GCC/ARM_CM4F/port.c index 726eaec08..a456b0064 100755 --- a/portable/GCC/ARM_CM4F/port.c +++ b/portable/GCC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4F/portmacro.h b/portable/GCC/ARM_CM4F/portmacro.h index fe51b5de1..411fb6cc2 100644 --- a/portable/GCC/ARM_CM4F/portmacro.h +++ b/portable/GCC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c index 15a15100c..076a1e754 100644 --- a/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index 8065bff7b..28419f014 100755 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h index d393fc55c..8b37d5ada 100644 --- a/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c index 7ba47dd26..5c01e02d6 100644 --- a/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/port.c b/portable/GCC/ARM_CM55/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/GCC/ARM_CM55/non_secure/port.c +++ b/portable/GCC/ARM_CM55/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portasm.c b/portable/GCC/ARM_CM55/non_secure/portasm.c index f6534e5ad..2f18b44c4 100644 --- a/portable/GCC/ARM_CM55/non_secure/portasm.c +++ b/portable/GCC/ARM_CM55/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portasm.h b/portable/GCC/ARM_CM55/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/GCC/ARM_CM55/non_secure/portasm.h +++ b/portable/GCC/ARM_CM55/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portmacro.h b/portable/GCC/ARM_CM55/non_secure/portmacro.h index 68e1ae7fa..16c6dc7c2 100644 --- a/portable/GCC/ARM_CM55/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM55/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_context.c b/portable/GCC/ARM_CM55/secure/secure_context.c index 8e6027e85..e02585e68 100644 --- a/portable/GCC/ARM_CM55/secure/secure_context.c +++ b/portable/GCC/ARM_CM55/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_context.h b/portable/GCC/ARM_CM55/secure/secure_context.h index 4b7e8017e..872f4767c 100644 --- a/portable/GCC/ARM_CM55/secure/secure_context.h +++ b/portable/GCC/ARM_CM55/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_context_port.c b/portable/GCC/ARM_CM55/secure/secure_context_port.c index 0b8ac7455..541cd1c2d 100644 --- a/portable/GCC/ARM_CM55/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM55/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_heap.c b/portable/GCC/ARM_CM55/secure/secure_heap.c index 6d566318e..0a452b6a0 100644 --- a/portable/GCC/ARM_CM55/secure/secure_heap.c +++ b/portable/GCC/ARM_CM55/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_heap.h b/portable/GCC/ARM_CM55/secure/secure_heap.h index c77d1cc96..b95ab4214 100644 --- a/portable/GCC/ARM_CM55/secure/secure_heap.h +++ b/portable/GCC/ARM_CM55/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_init.c b/portable/GCC/ARM_CM55/secure/secure_init.c index e729dc8ca..419b91e62 100644 --- a/portable/GCC/ARM_CM55/secure/secure_init.c +++ b/portable/GCC/ARM_CM55/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_init.h b/portable/GCC/ARM_CM55/secure/secure_init.h index f905a423f..6017dc15a 100644 --- a/portable/GCC/ARM_CM55/secure/secure_init.h +++ b/portable/GCC/ARM_CM55/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_port_macros.h b/portable/GCC/ARM_CM55/secure/secure_port_macros.h index c95d2258b..335f24fbc 100644 --- a/portable/GCC/ARM_CM55/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM55/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c index 7ba47dd26..5c01e02d6 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c index e445d63e0..b6a86cfd2 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h index 68e1ae7fa..16c6dc7c2 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM7/r0p1/port.c b/portable/GCC/ARM_CM7/r0p1/port.c index 8e5d7c703..7bb959da0 100755 --- a/portable/GCC/ARM_CM7/r0p1/port.c +++ b/portable/GCC/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM7/r0p1/portmacro.h b/portable/GCC/ARM_CM7/r0p1/portmacro.h index 8156c228a..f5c9cf835 100644 --- a/portable/GCC/ARM_CM7/r0p1/portmacro.h +++ b/portable/GCC/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c index 7ba47dd26..5c01e02d6 100644 --- a/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/port.c b/portable/GCC/ARM_CM85/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/GCC/ARM_CM85/non_secure/port.c +++ b/portable/GCC/ARM_CM85/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portasm.c b/portable/GCC/ARM_CM85/non_secure/portasm.c index f6534e5ad..2f18b44c4 100644 --- a/portable/GCC/ARM_CM85/non_secure/portasm.c +++ b/portable/GCC/ARM_CM85/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portasm.h b/portable/GCC/ARM_CM85/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/GCC/ARM_CM85/non_secure/portasm.h +++ b/portable/GCC/ARM_CM85/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portmacro.h b/portable/GCC/ARM_CM85/non_secure/portmacro.h index bbe6f320c..4e8ad06d4 100644 --- a/portable/GCC/ARM_CM85/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM85/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_context.c b/portable/GCC/ARM_CM85/secure/secure_context.c index 8e6027e85..e02585e68 100644 --- a/portable/GCC/ARM_CM85/secure/secure_context.c +++ b/portable/GCC/ARM_CM85/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_context.h b/portable/GCC/ARM_CM85/secure/secure_context.h index 4b7e8017e..872f4767c 100644 --- a/portable/GCC/ARM_CM85/secure/secure_context.h +++ b/portable/GCC/ARM_CM85/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_context_port.c b/portable/GCC/ARM_CM85/secure/secure_context_port.c index 0b8ac7455..541cd1c2d 100644 --- a/portable/GCC/ARM_CM85/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM85/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_heap.c b/portable/GCC/ARM_CM85/secure/secure_heap.c index 6d566318e..0a452b6a0 100644 --- a/portable/GCC/ARM_CM85/secure/secure_heap.c +++ b/portable/GCC/ARM_CM85/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_heap.h b/portable/GCC/ARM_CM85/secure/secure_heap.h index c77d1cc96..b95ab4214 100644 --- a/portable/GCC/ARM_CM85/secure/secure_heap.h +++ b/portable/GCC/ARM_CM85/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_init.c b/portable/GCC/ARM_CM85/secure/secure_init.c index e729dc8ca..419b91e62 100644 --- a/portable/GCC/ARM_CM85/secure/secure_init.c +++ b/portable/GCC/ARM_CM85/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_init.h b/portable/GCC/ARM_CM85/secure/secure_init.h index f905a423f..6017dc15a 100644 --- a/portable/GCC/ARM_CM85/secure/secure_init.h +++ b/portable/GCC/ARM_CM85/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_port_macros.h b/portable/GCC/ARM_CM85/secure/secure_port_macros.h index c95d2258b..335f24fbc 100644 --- a/portable/GCC/ARM_CM85/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM85/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c index 7ba47dd26..5c01e02d6 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c index e445d63e0..b6a86cfd2 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h index bbe6f320c..4e8ad06d4 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CR5/port.c b/portable/GCC/ARM_CR5/port.c index b7401fbd3..e9242cd28 100644 --- a/portable/GCC/ARM_CR5/port.c +++ b/portable/GCC/ARM_CR5/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CR5/portASM.S b/portable/GCC/ARM_CR5/portASM.S index 7637385f1..12e85689d 100644 --- a/portable/GCC/ARM_CR5/portASM.S +++ b/portable/GCC/ARM_CR5/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CR5/portmacro.h b/portable/GCC/ARM_CR5/portmacro.h index c33157256..6095fda71 100644 --- a/portable/GCC/ARM_CR5/portmacro.h +++ b/portable/GCC/ARM_CR5/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CRx_No_GIC/port.c b/portable/GCC/ARM_CRx_No_GIC/port.c index 8c63f7a47..c36bbbcf5 100644 --- a/portable/GCC/ARM_CRx_No_GIC/port.c +++ b/portable/GCC/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CRx_No_GIC/portASM.S b/portable/GCC/ARM_CRx_No_GIC/portASM.S index 9f887362a..f3f46b00b 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portASM.S +++ b/portable/GCC/ARM_CRx_No_GIC/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CRx_No_GIC/portmacro.h b/portable/GCC/ARM_CRx_No_GIC/portmacro.h index 6efe0d0fa..fc7721154 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portmacro.h +++ b/portable/GCC/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ATMega323/port.c b/portable/GCC/ATMega323/port.c index 7a487b04d..ed3ace5d7 100644 --- a/portable/GCC/ATMega323/port.c +++ b/portable/GCC/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ATMega323/portmacro.h b/portable/GCC/ATMega323/portmacro.h index c57e0d390..2c8af1471 100644 --- a/portable/GCC/ATMega323/portmacro.h +++ b/portable/GCC/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/AVR32_UC3/exception.S b/portable/GCC/AVR32_UC3/exception.S index 641ace96a..d32cea7c2 100644 --- a/portable/GCC/AVR32_UC3/exception.S +++ b/portable/GCC/AVR32_UC3/exception.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/GCC/AVR32_UC3/port.c b/portable/GCC/AVR32_UC3/port.c index 740d17e95..e39491d2d 100644 --- a/portable/GCC/AVR32_UC3/port.c +++ b/portable/GCC/AVR32_UC3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/GCC/AVR32_UC3/portmacro.h b/portable/GCC/AVR32_UC3/portmacro.h index 0736c1f99..6394f640d 100644 --- a/portable/GCC/AVR32_UC3/portmacro.h +++ b/portable/GCC/AVR32_UC3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/GCC/CORTUS_APS3/port.c b/portable/GCC/CORTUS_APS3/port.c index faf5af31d..115659d0e 100644 --- a/portable/GCC/CORTUS_APS3/port.c +++ b/portable/GCC/CORTUS_APS3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/CORTUS_APS3/portmacro.h b/portable/GCC/CORTUS_APS3/portmacro.h index 56428c1e2..6db48de46 100644 --- a/portable/GCC/CORTUS_APS3/portmacro.h +++ b/portable/GCC/CORTUS_APS3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ColdFire_V2/port.c b/portable/GCC/ColdFire_V2/port.c index 10db40112..7c77f6128 100644 --- a/portable/GCC/ColdFire_V2/port.c +++ b/portable/GCC/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ColdFire_V2/portasm.S b/portable/GCC/ColdFire_V2/portasm.S index 43011472d..f7cf7b5ea 100644 --- a/portable/GCC/ColdFire_V2/portasm.S +++ b/portable/GCC/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ColdFire_V2/portmacro.h b/portable/GCC/ColdFire_V2/portmacro.h index 5cbd622c6..66ced0902 100644 --- a/portable/GCC/ColdFire_V2/portmacro.h +++ b/portable/GCC/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/H8S2329/port.c b/portable/GCC/H8S2329/port.c index 1b74c3cf6..e2097611a 100644 --- a/portable/GCC/H8S2329/port.c +++ b/portable/GCC/H8S2329/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/H8S2329/portmacro.h b/portable/GCC/H8S2329/portmacro.h index da0982f86..808232740 100644 --- a/portable/GCC/H8S2329/portmacro.h +++ b/portable/GCC/H8S2329/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/HCS12/port.c b/portable/GCC/HCS12/port.c index 6c1d39b57..2af4ba5ed 100644 --- a/portable/GCC/HCS12/port.c +++ b/portable/GCC/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/HCS12/portmacro.h b/portable/GCC/HCS12/portmacro.h index c01c9d6fc..a3b29f530 100644 --- a/portable/GCC/HCS12/portmacro.h +++ b/portable/GCC/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/ISR_Support.h b/portable/GCC/IA32_flat/ISR_Support.h index 7e26f39f4..b6b61626d 100644 --- a/portable/GCC/IA32_flat/ISR_Support.h +++ b/portable/GCC/IA32_flat/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/port.c b/portable/GCC/IA32_flat/port.c index 348b0b511..8deb5e7ac 100644 --- a/portable/GCC/IA32_flat/port.c +++ b/portable/GCC/IA32_flat/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/portASM.S b/portable/GCC/IA32_flat/portASM.S index 4a5cf2cb7..09af0e55f 100644 --- a/portable/GCC/IA32_flat/portASM.S +++ b/portable/GCC/IA32_flat/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/portmacro.h b/portable/GCC/IA32_flat/portmacro.h index 859b14d2b..85c727efd 100644 --- a/portable/GCC/IA32_flat/portmacro.h +++ b/portable/GCC/IA32_flat/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MSP430F449/port.c b/portable/GCC/MSP430F449/port.c index 2e49c7e07..41a4790f6 100644 --- a/portable/GCC/MSP430F449/port.c +++ b/portable/GCC/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MSP430F449/portmacro.h b/portable/GCC/MSP430F449/portmacro.h index a96f6e63c..71686df18 100644 --- a/portable/GCC/MSP430F449/portmacro.h +++ b/portable/GCC/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlaze/port.c b/portable/GCC/MicroBlaze/port.c index 9ac914723..256990813 100644 --- a/portable/GCC/MicroBlaze/port.c +++ b/portable/GCC/MicroBlaze/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlaze/portasm.s b/portable/GCC/MicroBlaze/portasm.s index 880785e57..62cfd7082 100644 --- a/portable/GCC/MicroBlaze/portasm.s +++ b/portable/GCC/MicroBlaze/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlaze/portmacro.h b/portable/GCC/MicroBlaze/portmacro.h index 6ab56326f..8e3b1ef5d 100644 --- a/portable/GCC/MicroBlaze/portmacro.h +++ b/portable/GCC/MicroBlaze/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/port.c b/portable/GCC/MicroBlazeV8/port.c index 3b58226e1..d542c3010 100644 --- a/portable/GCC/MicroBlazeV8/port.c +++ b/portable/GCC/MicroBlazeV8/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/port_exceptions.c b/portable/GCC/MicroBlazeV8/port_exceptions.c index 9cf6ea070..975397ca6 100644 --- a/portable/GCC/MicroBlazeV8/port_exceptions.c +++ b/portable/GCC/MicroBlazeV8/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/portasm.S b/portable/GCC/MicroBlazeV8/portasm.S index 707442dc3..45feb40ec 100644 --- a/portable/GCC/MicroBlazeV8/portasm.S +++ b/portable/GCC/MicroBlazeV8/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/portmacro.h b/portable/GCC/MicroBlazeV8/portmacro.h index 1c0e020a6..d4fdbd76a 100644 --- a/portable/GCC/MicroBlazeV8/portmacro.h +++ b/portable/GCC/MicroBlazeV8/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/port.c b/portable/GCC/MicroBlazeV9/port.c index 2b2a9544d..d50b1655c 100644 --- a/portable/GCC/MicroBlazeV9/port.c +++ b/portable/GCC/MicroBlazeV9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/port_exceptions.c b/portable/GCC/MicroBlazeV9/port_exceptions.c index 9cf6ea070..975397ca6 100644 --- a/portable/GCC/MicroBlazeV9/port_exceptions.c +++ b/portable/GCC/MicroBlazeV9/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/portasm.S b/portable/GCC/MicroBlazeV9/portasm.S index d60a9da4e..35dea4d97 100644 --- a/portable/GCC/MicroBlazeV9/portasm.S +++ b/portable/GCC/MicroBlazeV9/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/portmacro.h b/portable/GCC/MicroBlazeV9/portmacro.h index 7ca7bad91..e2d56f028 100644 --- a/portable/GCC/MicroBlazeV9/portmacro.h +++ b/portable/GCC/MicroBlazeV9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/NiosII/port.c b/portable/GCC/NiosII/port.c index 2826c1eb5..cc01bd590 100644 --- a/portable/GCC/NiosII/port.c +++ b/portable/GCC/NiosII/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/NiosII/port_asm.S b/portable/GCC/NiosII/port_asm.S index bfadede60..6af89842c 100644 --- a/portable/GCC/NiosII/port_asm.S +++ b/portable/GCC/NiosII/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/NiosII/portmacro.h b/portable/GCC/NiosII/portmacro.h index 61374d474..f156e8a63 100644 --- a/portable/GCC/NiosII/portmacro.h +++ b/portable/GCC/NiosII/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/FPU_Macros.h b/portable/GCC/PPC405_Xilinx/FPU_Macros.h index e665caedf..8016ffea5 100644 --- a/portable/GCC/PPC405_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC405_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/port.c b/portable/GCC/PPC405_Xilinx/port.c index 7e51a618a..e5c214a01 100644 --- a/portable/GCC/PPC405_Xilinx/port.c +++ b/portable/GCC/PPC405_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/portasm.S b/portable/GCC/PPC405_Xilinx/portasm.S index 2e4ddb605..9e0e2f274 100644 --- a/portable/GCC/PPC405_Xilinx/portasm.S +++ b/portable/GCC/PPC405_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/portmacro.h b/portable/GCC/PPC405_Xilinx/portmacro.h index 8c3ed5029..6c968e389 100644 --- a/portable/GCC/PPC405_Xilinx/portmacro.h +++ b/portable/GCC/PPC405_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/FPU_Macros.h b/portable/GCC/PPC440_Xilinx/FPU_Macros.h index e665caedf..8016ffea5 100644 --- a/portable/GCC/PPC440_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC440_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/port.c b/portable/GCC/PPC440_Xilinx/port.c index f09810d61..357e761c1 100644 --- a/portable/GCC/PPC440_Xilinx/port.c +++ b/portable/GCC/PPC440_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/portasm.S b/portable/GCC/PPC440_Xilinx/portasm.S index 2e4ddb605..9e0e2f274 100644 --- a/portable/GCC/PPC440_Xilinx/portasm.S +++ b/portable/GCC/PPC440_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/portmacro.h b/portable/GCC/PPC440_Xilinx/portmacro.h index 8c3ed5029..6c968e389 100644 --- a/portable/GCC/PPC440_Xilinx/portmacro.h +++ b/portable/GCC/PPC440_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h index 482eb6d22..2eb743f0b 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 4bc15ef54..b52b47565 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h index 6146baad1..c8616fa63 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 0a1e31c89..c35c9168f 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/port.c b/portable/GCC/RISC-V/port.c index afa3df0d8..fbfba405b 100644 --- a/portable/GCC/RISC-V/port.c +++ b/portable/GCC/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/portASM.S b/portable/GCC/RISC-V/portASM.S index b03a0da38..3b5e3b08e 100644 --- a/portable/GCC/RISC-V/portASM.S +++ b/portable/GCC/RISC-V/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/portContext.h b/portable/GCC/RISC-V/portContext.h index c87f3a10d..851342337 100644 --- a/portable/GCC/RISC-V/portContext.h +++ b/portable/GCC/RISC-V/portContext.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/portmacro.h b/portable/GCC/RISC-V/portmacro.h index 1e96e6054..8f0a8f64f 100644 --- a/portable/GCC/RISC-V/portmacro.h +++ b/portable/GCC/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/isr_support.h b/portable/GCC/RL78/isr_support.h index 1ec3214db..29163a4d8 100644 --- a/portable/GCC/RL78/isr_support.h +++ b/portable/GCC/RL78/isr_support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/port.c b/portable/GCC/RL78/port.c index 202db8767..601e3aad9 100644 --- a/portable/GCC/RL78/port.c +++ b/portable/GCC/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/portasm.S b/portable/GCC/RL78/portasm.S index 141ca5bfe..ddf890d3e 100644 --- a/portable/GCC/RL78/portasm.S +++ b/portable/GCC/RL78/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/portmacro.h b/portable/GCC/RL78/portmacro.h index 3e8723211..61b00c4dd 100644 --- a/portable/GCC/RL78/portmacro.h +++ b/portable/GCC/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX100/port.c b/portable/GCC/RX100/port.c index 8ee40bbeb..48887147e 100644 --- a/portable/GCC/RX100/port.c +++ b/portable/GCC/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX100/portmacro.h b/portable/GCC/RX100/portmacro.h index 9359c2da3..f0ddd4738 100644 --- a/portable/GCC/RX100/portmacro.h +++ b/portable/GCC/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX200/port.c b/portable/GCC/RX200/port.c index 9103a9b56..60f3c3ae2 100644 --- a/portable/GCC/RX200/port.c +++ b/portable/GCC/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX200/portmacro.h b/portable/GCC/RX200/portmacro.h index ccec3f8fb..c32c979ed 100644 --- a/portable/GCC/RX200/portmacro.h +++ b/portable/GCC/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600/port.c b/portable/GCC/RX600/port.c index ce6b1a103..ceb63c48a 100644 --- a/portable/GCC/RX600/port.c +++ b/portable/GCC/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600/portmacro.h b/portable/GCC/RX600/portmacro.h index 55ab17450..9f93f15a1 100644 --- a/portable/GCC/RX600/portmacro.h +++ b/portable/GCC/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600v2/port.c b/portable/GCC/RX600v2/port.c index d727eb208..f9d83bfd4 100644 --- a/portable/GCC/RX600v2/port.c +++ b/portable/GCC/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600v2/portmacro.h b/portable/GCC/RX600v2/portmacro.h index 55ab17450..9f93f15a1 100644 --- a/portable/GCC/RX600v2/portmacro.h +++ b/portable/GCC/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX700v3_DPFPU/port.c b/portable/GCC/RX700v3_DPFPU/port.c index 75ed3ebf9..a7fa28d95 100644 --- a/portable/GCC/RX700v3_DPFPU/port.c +++ b/portable/GCC/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX700v3_DPFPU/portmacro.h b/portable/GCC/RX700v3_DPFPU/portmacro.h index 63a70062e..ec912cca2 100644 --- a/portable/GCC/RX700v3_DPFPU/portmacro.h +++ b/portable/GCC/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/STR75x/port.c b/portable/GCC/STR75x/port.c index f4a219c07..8dc092d29 100644 --- a/portable/GCC/STR75x/port.c +++ b/portable/GCC/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/STR75x/portISR.c b/portable/GCC/STR75x/portISR.c index fbbe57b11..9f2a8c236 100644 --- a/portable/GCC/STR75x/portISR.c +++ b/portable/GCC/STR75x/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/STR75x/portmacro.h b/portable/GCC/STR75x/portmacro.h index fa96bc110..420f84648 100644 --- a/portable/GCC/STR75x/portmacro.h +++ b/portable/GCC/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/TriCore_1782/port.c b/portable/GCC/TriCore_1782/port.c index b9b3535e9..7140bbee1 100644 --- a/portable/GCC/TriCore_1782/port.c +++ b/portable/GCC/TriCore_1782/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/TriCore_1782/portmacro.h b/portable/GCC/TriCore_1782/portmacro.h index 13a74c4e3..e758143d3 100644 --- a/portable/GCC/TriCore_1782/portmacro.h +++ b/portable/GCC/TriCore_1782/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/TriCore_1782/porttrap.c b/portable/GCC/TriCore_1782/porttrap.c index 33b80cc8c..9258cf60b 100644 --- a/portable/GCC/TriCore_1782/porttrap.c +++ b/portable/GCC/TriCore_1782/porttrap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/ISR_Support.h b/portable/IAR/78K0R/ISR_Support.h index 3572d7db7..b3c399174 100644 --- a/portable/IAR/78K0R/ISR_Support.h +++ b/portable/IAR/78K0R/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/port.c b/portable/IAR/78K0R/port.c index 770d71b25..b71d7dad5 100644 --- a/portable/IAR/78K0R/port.c +++ b/portable/IAR/78K0R/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/portasm.s26 b/portable/IAR/78K0R/portasm.s26 index 464a5f5f8..60b09e2f2 100644 --- a/portable/IAR/78K0R/portasm.s26 +++ b/portable/IAR/78K0R/portasm.s26 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/portmacro.h b/portable/IAR/78K0R/portmacro.h index e4fa185f0..48a5f6ffa 100644 --- a/portable/IAR/78K0R/portmacro.h +++ b/portable/IAR/78K0R/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/port.c b/portable/IAR/ARM_CA5_No_GIC/port.c index 6461bdded..0beeeed16 100644 --- a/portable/IAR/ARM_CA5_No_GIC/port.c +++ b/portable/IAR/ARM_CA5_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.h b/portable/IAR/ARM_CA5_No_GIC/portASM.h index 63cf9af17..c400b113a 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.h +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.s b/portable/IAR/ARM_CA5_No_GIC/portASM.s index 5ab3027ee..4db7b8d73 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.s +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/portmacro.h b/portable/IAR/ARM_CA5_No_GIC/portmacro.h index f8a8e02d9..7ecb41374 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CA5_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/port.c b/portable/IAR/ARM_CA9/port.c index 97ab95e57..493f9df8b 100644 --- a/portable/IAR/ARM_CA9/port.c +++ b/portable/IAR/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/portASM.h b/portable/IAR/ARM_CA9/portASM.h index 4969a1009..9e706604a 100644 --- a/portable/IAR/ARM_CA9/portASM.h +++ b/portable/IAR/ARM_CA9/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/portASM.s b/portable/IAR/ARM_CA9/portASM.s index 509203d85..50500f6cb 100644 --- a/portable/IAR/ARM_CA9/portASM.s +++ b/portable/IAR/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/portmacro.h b/portable/IAR/ARM_CA9/portmacro.h index c9bc25d34..8fbe9374d 100644 --- a/portable/IAR/ARM_CA9/portmacro.h +++ b/portable/IAR/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM0/port.c b/portable/IAR/ARM_CM0/port.c index 4792d6c77..b5f374ccf 100644 --- a/portable/IAR/ARM_CM0/port.c +++ b/portable/IAR/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM0/portasm.s b/portable/IAR/ARM_CM0/portasm.s index 7484511ed..c6407bee1 100644 --- a/portable/IAR/ARM_CM0/portasm.s +++ b/portable/IAR/ARM_CM0/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM0/portmacro.h b/portable/IAR/ARM_CM0/portmacro.h index 5a22fc75c..60412021d 100644 --- a/portable/IAR/ARM_CM0/portmacro.h +++ b/portable/IAR/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S index fdb2db91b..ee26520b4 100644 --- a/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.h b/portable/IAR/ARM_CM23/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.s b/portable/IAR/ARM_CM23/non_secure/portasm.s index 3b13f9432..e89a80448 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portmacro.h b/portable/IAR/ARM_CM23/non_secure/portmacro.h index 6e5c4e1c8..af894a78d 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c index 8e6027e85..e02585e68 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/portable/IAR/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_context.h b/portable/IAR/ARM_CM23/secure/secure_context.h index 4b7e8017e..872f4767c 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.h +++ b/portable/IAR/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s index 9dd82ff5d..afa0bf5d1 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.c b/portable/IAR/ARM_CM23/secure/secure_heap.c index 6d566318e..0a452b6a0 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.c +++ b/portable/IAR/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.h b/portable/IAR/ARM_CM23/secure/secure_heap.h index c77d1cc96..b95ab4214 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.h +++ b/portable/IAR/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_init.c b/portable/IAR/ARM_CM23/secure/secure_init.c index e729dc8ca..419b91e62 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.c +++ b/portable/IAR/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_init.h b/portable/IAR/ARM_CM23/secure/secure_init.h index f905a423f..6017dc15a 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.h +++ b/portable/IAR/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_port_macros.h b/portable/IAR/ARM_CM23/secure/secure_port_macros.h index c95d2258b..335f24fbc 100644 --- a/portable/IAR/ARM_CM23/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S index fdb2db91b..ee26520b4 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s index 640dff9b1..e1a10155d 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h index 6e5c4e1c8..af894a78d 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM3/port.c b/portable/IAR/ARM_CM3/port.c index dad16e17d..e41ddc57a 100755 --- a/portable/IAR/ARM_CM3/port.c +++ b/portable/IAR/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM3/portasm.s b/portable/IAR/ARM_CM3/portasm.s index 1265ccaaa..614e44380 100644 --- a/portable/IAR/ARM_CM3/portasm.s +++ b/portable/IAR/ARM_CM3/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM3/portmacro.h b/portable/IAR/ARM_CM3/portmacro.h index 194e4c742..31d09bc73 100644 --- a/portable/IAR/ARM_CM3/portmacro.h +++ b/portable/IAR/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S index 96922c1e6..cbe6b4909 100644 --- a/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.h b/portable/IAR/ARM_CM33/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.s b/portable/IAR/ARM_CM33/non_secure/portasm.s index 7ea8c16ff..cc8f3cb6c 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portmacro.h b/portable/IAR/ARM_CM33/non_secure/portmacro.h index 1763094ef..b78f957d3 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c index 8e6027e85..e02585e68 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/portable/IAR/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_context.h b/portable/IAR/ARM_CM33/secure/secure_context.h index 4b7e8017e..872f4767c 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.h +++ b/portable/IAR/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s index 94d3d5240..620dfc3fc 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.c b/portable/IAR/ARM_CM33/secure/secure_heap.c index 6d566318e..0a452b6a0 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.c +++ b/portable/IAR/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.h b/portable/IAR/ARM_CM33/secure/secure_heap.h index c77d1cc96..b95ab4214 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.h +++ b/portable/IAR/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_init.c b/portable/IAR/ARM_CM33/secure/secure_init.c index e729dc8ca..419b91e62 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.c +++ b/portable/IAR/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_init.h b/portable/IAR/ARM_CM33/secure/secure_init.h index f905a423f..6017dc15a 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.h +++ b/portable/IAR/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_port_macros.h b/portable/IAR/ARM_CM33/secure/secure_port_macros.h index c95d2258b..335f24fbc 100644 --- a/portable/IAR/ARM_CM33/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S index 96922c1e6..cbe6b4909 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s index d63de40b4..c738cdde6 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h index c193e4a2d..b7c487cd2 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S index 96922c1e6..cbe6b4909 100644 --- a/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/port.c b/portable/IAR/ARM_CM35P/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/IAR/ARM_CM35P/non_secure/port.c +++ b/portable/IAR/ARM_CM35P/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portasm.h b/portable/IAR/ARM_CM35P/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portasm.h +++ b/portable/IAR/ARM_CM35P/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portasm.s b/portable/IAR/ARM_CM35P/non_secure/portasm.s index 7ea8c16ff..cc8f3cb6c 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portasm.s +++ b/portable/IAR/ARM_CM35P/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portmacro.h b/portable/IAR/ARM_CM35P/non_secure/portmacro.h index 265fcb76a..05ac91399 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM35P/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_context.c b/portable/IAR/ARM_CM35P/secure/secure_context.c index 8e6027e85..e02585e68 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_context.c +++ b/portable/IAR/ARM_CM35P/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_context.h b/portable/IAR/ARM_CM35P/secure/secure_context.h index 4b7e8017e..872f4767c 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_context.h +++ b/portable/IAR/ARM_CM35P/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s index 94d3d5240..620dfc3fc 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_heap.c b/portable/IAR/ARM_CM35P/secure/secure_heap.c index 6d566318e..0a452b6a0 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_heap.c +++ b/portable/IAR/ARM_CM35P/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_heap.h b/portable/IAR/ARM_CM35P/secure/secure_heap.h index c77d1cc96..b95ab4214 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_heap.h +++ b/portable/IAR/ARM_CM35P/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_init.c b/portable/IAR/ARM_CM35P/secure/secure_init.c index e729dc8ca..419b91e62 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_init.c +++ b/portable/IAR/ARM_CM35P/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_init.h b/portable/IAR/ARM_CM35P/secure/secure_init.h index f905a423f..6017dc15a 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_init.h +++ b/portable/IAR/ARM_CM35P/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_port_macros.h b/portable/IAR/ARM_CM35P/secure/secure_port_macros.h index c95d2258b..335f24fbc 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM35P/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S index 96922c1e6..cbe6b4909 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s index d63de40b4..c738cdde6 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h index 265fcb76a..05ac91399 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F/port.c b/portable/IAR/ARM_CM4F/port.c index 51f552388..24700e279 100755 --- a/portable/IAR/ARM_CM4F/port.c +++ b/portable/IAR/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F/portasm.s b/portable/IAR/ARM_CM4F/portasm.s index d626f2aa5..a4fe34e3d 100644 --- a/portable/IAR/ARM_CM4F/portasm.s +++ b/portable/IAR/ARM_CM4F/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F/portmacro.h b/portable/IAR/ARM_CM4F/portmacro.h index 8841dc342..36f49f7fd 100644 --- a/portable/IAR/ARM_CM4F/portmacro.h +++ b/portable/IAR/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S index f25951255..4f450ca95 100644 --- a/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index f9e8f41d3..8116a992b 100755 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/portasm.s b/portable/IAR/ARM_CM4F_MPU/portasm.s index afc1a9b31..4f7248918 100644 --- a/portable/IAR/ARM_CM4F_MPU/portasm.s +++ b/portable/IAR/ARM_CM4F_MPU/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h index 41c238c8f..1105b8ba8 100644 --- a/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S index 96922c1e6..cbe6b4909 100644 --- a/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/port.c b/portable/IAR/ARM_CM55/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/IAR/ARM_CM55/non_secure/port.c +++ b/portable/IAR/ARM_CM55/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portasm.h b/portable/IAR/ARM_CM55/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/IAR/ARM_CM55/non_secure/portasm.h +++ b/portable/IAR/ARM_CM55/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portasm.s b/portable/IAR/ARM_CM55/non_secure/portasm.s index 7ea8c16ff..cc8f3cb6c 100644 --- a/portable/IAR/ARM_CM55/non_secure/portasm.s +++ b/portable/IAR/ARM_CM55/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portmacro.h b/portable/IAR/ARM_CM55/non_secure/portmacro.h index 64ce069f1..7e7d6450b 100644 --- a/portable/IAR/ARM_CM55/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM55/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_context.c b/portable/IAR/ARM_CM55/secure/secure_context.c index 8e6027e85..e02585e68 100644 --- a/portable/IAR/ARM_CM55/secure/secure_context.c +++ b/portable/IAR/ARM_CM55/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_context.h b/portable/IAR/ARM_CM55/secure/secure_context.h index 4b7e8017e..872f4767c 100644 --- a/portable/IAR/ARM_CM55/secure/secure_context.h +++ b/portable/IAR/ARM_CM55/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s index 94d3d5240..620dfc3fc 100644 --- a/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_heap.c b/portable/IAR/ARM_CM55/secure/secure_heap.c index 6d566318e..0a452b6a0 100644 --- a/portable/IAR/ARM_CM55/secure/secure_heap.c +++ b/portable/IAR/ARM_CM55/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_heap.h b/portable/IAR/ARM_CM55/secure/secure_heap.h index c77d1cc96..b95ab4214 100644 --- a/portable/IAR/ARM_CM55/secure/secure_heap.h +++ b/portable/IAR/ARM_CM55/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_init.c b/portable/IAR/ARM_CM55/secure/secure_init.c index e729dc8ca..419b91e62 100644 --- a/portable/IAR/ARM_CM55/secure/secure_init.c +++ b/portable/IAR/ARM_CM55/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_init.h b/portable/IAR/ARM_CM55/secure/secure_init.h index f905a423f..6017dc15a 100644 --- a/portable/IAR/ARM_CM55/secure/secure_init.h +++ b/portable/IAR/ARM_CM55/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_port_macros.h b/portable/IAR/ARM_CM55/secure/secure_port_macros.h index c95d2258b..335f24fbc 100644 --- a/portable/IAR/ARM_CM55/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM55/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S index 96922c1e6..cbe6b4909 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s index d63de40b4..c738cdde6 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h index 64ce069f1..7e7d6450b 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM7/r0p1/port.c b/portable/IAR/ARM_CM7/r0p1/port.c index 92e592b46..25376d24e 100755 --- a/portable/IAR/ARM_CM7/r0p1/port.c +++ b/portable/IAR/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM7/r0p1/portasm.s b/portable/IAR/ARM_CM7/r0p1/portasm.s index 5f5ed5ff8..3303067e2 100644 --- a/portable/IAR/ARM_CM7/r0p1/portasm.s +++ b/portable/IAR/ARM_CM7/r0p1/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM7/r0p1/portmacro.h b/portable/IAR/ARM_CM7/r0p1/portmacro.h index 86729b409..757b02c1e 100644 --- a/portable/IAR/ARM_CM7/r0p1/portmacro.h +++ b/portable/IAR/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S index 96922c1e6..cbe6b4909 100644 --- a/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/port.c b/portable/IAR/ARM_CM85/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/IAR/ARM_CM85/non_secure/port.c +++ b/portable/IAR/ARM_CM85/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portasm.h b/portable/IAR/ARM_CM85/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/IAR/ARM_CM85/non_secure/portasm.h +++ b/portable/IAR/ARM_CM85/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portasm.s b/portable/IAR/ARM_CM85/non_secure/portasm.s index 7ea8c16ff..cc8f3cb6c 100644 --- a/portable/IAR/ARM_CM85/non_secure/portasm.s +++ b/portable/IAR/ARM_CM85/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portmacro.h b/portable/IAR/ARM_CM85/non_secure/portmacro.h index c5b81bdd3..d970c79fe 100644 --- a/portable/IAR/ARM_CM85/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM85/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_context.c b/portable/IAR/ARM_CM85/secure/secure_context.c index 8e6027e85..e02585e68 100644 --- a/portable/IAR/ARM_CM85/secure/secure_context.c +++ b/portable/IAR/ARM_CM85/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_context.h b/portable/IAR/ARM_CM85/secure/secure_context.h index 4b7e8017e..872f4767c 100644 --- a/portable/IAR/ARM_CM85/secure/secure_context.h +++ b/portable/IAR/ARM_CM85/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s index 94d3d5240..620dfc3fc 100644 --- a/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_heap.c b/portable/IAR/ARM_CM85/secure/secure_heap.c index 6d566318e..0a452b6a0 100644 --- a/portable/IAR/ARM_CM85/secure/secure_heap.c +++ b/portable/IAR/ARM_CM85/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_heap.h b/portable/IAR/ARM_CM85/secure/secure_heap.h index c77d1cc96..b95ab4214 100644 --- a/portable/IAR/ARM_CM85/secure/secure_heap.h +++ b/portable/IAR/ARM_CM85/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_init.c b/portable/IAR/ARM_CM85/secure/secure_init.c index e729dc8ca..419b91e62 100644 --- a/portable/IAR/ARM_CM85/secure/secure_init.c +++ b/portable/IAR/ARM_CM85/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_init.h b/portable/IAR/ARM_CM85/secure/secure_init.h index f905a423f..6017dc15a 100644 --- a/portable/IAR/ARM_CM85/secure/secure_init.h +++ b/portable/IAR/ARM_CM85/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_port_macros.h b/portable/IAR/ARM_CM85/secure/secure_port_macros.h index c95d2258b..335f24fbc 100644 --- a/portable/IAR/ARM_CM85/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM85/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S index 96922c1e6..cbe6b4909 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c index b14db7cea..70a97cec3 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h index 600a38494..a75857fc2 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s index d63de40b4..c738cdde6 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h index c5b81bdd3..d970c79fe 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h index 8c8924d72..6e8864a45 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CRx_No_GIC/port.c b/portable/IAR/ARM_CRx_No_GIC/port.c index 0f88f722f..983bacb10 100644 --- a/portable/IAR/ARM_CRx_No_GIC/port.c +++ b/portable/IAR/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CRx_No_GIC/portASM.s b/portable/IAR/ARM_CRx_No_GIC/portASM.s index a0461a97e..13c0c3170 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portASM.s +++ b/portable/IAR/ARM_CRx_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CRx_No_GIC/portmacro.h b/portable/IAR/ARM_CRx_No_GIC/portmacro.h index 4c48e69b2..ba3532e5d 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ATMega323/port.c b/portable/IAR/ATMega323/port.c index 1d2c03e1e..cd8ec9e4a 100644 --- a/portable/IAR/ATMega323/port.c +++ b/portable/IAR/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ATMega323/portmacro.h b/portable/IAR/ATMega323/portmacro.h index b872cde45..0138ab62c 100644 --- a/portable/IAR/ATMega323/portmacro.h +++ b/portable/IAR/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ATMega323/portmacro.s90 b/portable/IAR/ATMega323/portmacro.s90 index 09c11149d..772e82f12 100644 --- a/portable/IAR/ATMega323/portmacro.s90 +++ b/portable/IAR/ATMega323/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR32_UC3/exception.s82 b/portable/IAR/AVR32_UC3/exception.s82 index f149fa25b..083931725 100644 --- a/portable/IAR/AVR32_UC3/exception.s82 +++ b/portable/IAR/AVR32_UC3/exception.s82 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/port.c b/portable/IAR/AVR32_UC3/port.c index a4a563381..3d94c8f40 100644 --- a/portable/IAR/AVR32_UC3/port.c +++ b/portable/IAR/AVR32_UC3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/portmacro.h b/portable/IAR/AVR32_UC3/portmacro.h index 12d5209bc..0f9fa3a05 100644 --- a/portable/IAR/AVR32_UC3/portmacro.h +++ b/portable/IAR/AVR32_UC3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/read.c b/portable/IAR/AVR32_UC3/read.c index f91ca0ff5..d2e6e07af 100644 --- a/portable/IAR/AVR32_UC3/read.c +++ b/portable/IAR/AVR32_UC3/read.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/write.c b/portable/IAR/AVR32_UC3/write.c index 50469cf8a..3253fcc64 100644 --- a/portable/IAR/AVR32_UC3/write.c +++ b/portable/IAR/AVR32_UC3/write.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR_AVRDx/port.c b/portable/IAR/AVR_AVRDx/port.c index 7aab28cb8..20cfa7fc5 100644 --- a/portable/IAR/AVR_AVRDx/port.c +++ b/portable/IAR/AVR_AVRDx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_AVRDx/porthardware.h b/portable/IAR/AVR_AVRDx/porthardware.h index beb0deef5..6cdb46a61 100644 --- a/portable/IAR/AVR_AVRDx/porthardware.h +++ b/portable/IAR/AVR_AVRDx/porthardware.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_AVRDx/portmacro.h b/portable/IAR/AVR_AVRDx/portmacro.h index 091315b10..ad1763a80 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.h +++ b/portable/IAR/AVR_AVRDx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_AVRDx/portmacro.s90 b/portable/IAR/AVR_AVRDx/portmacro.s90 index 19da36006..baba7a6bd 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.s90 +++ b/portable/IAR/AVR_AVRDx/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/port.c b/portable/IAR/AVR_Mega0/port.c index 39aac5ef1..3acd46d5d 100644 --- a/portable/IAR/AVR_Mega0/port.c +++ b/portable/IAR/AVR_Mega0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/porthardware.h b/portable/IAR/AVR_Mega0/porthardware.h index 11c3198fb..cc46d70d0 100644 --- a/portable/IAR/AVR_Mega0/porthardware.h +++ b/portable/IAR/AVR_Mega0/porthardware.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/portmacro.h b/portable/IAR/AVR_Mega0/portmacro.h index 091315b10..ad1763a80 100644 --- a/portable/IAR/AVR_Mega0/portmacro.h +++ b/portable/IAR/AVR_Mega0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/portmacro.s90 b/portable/IAR/AVR_Mega0/portmacro.s90 index 8efe1b828..f329d6ace 100644 --- a/portable/IAR/AVR_Mega0/portmacro.s90 +++ b/portable/IAR/AVR_Mega0/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/ISR_Support.h b/portable/IAR/AtmelSAM7S64/ISR_Support.h index 15d5cc303..f3b452f1e 100644 --- a/portable/IAR/AtmelSAM7S64/ISR_Support.h +++ b/portable/IAR/AtmelSAM7S64/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/port.c b/portable/IAR/AtmelSAM7S64/port.c index 56f13e9e9..ec27daf08 100644 --- a/portable/IAR/AtmelSAM7S64/port.c +++ b/portable/IAR/AtmelSAM7S64/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/portasm.s79 b/portable/IAR/AtmelSAM7S64/portasm.s79 index 938ade238..4f5afbc52 100644 --- a/portable/IAR/AtmelSAM7S64/portasm.s79 +++ b/portable/IAR/AtmelSAM7S64/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/portmacro.h b/portable/IAR/AtmelSAM7S64/portmacro.h index 5f289c1ba..46989f3e7 100644 --- a/portable/IAR/AtmelSAM7S64/portmacro.h +++ b/portable/IAR/AtmelSAM7S64/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/ISR_Support.h b/portable/IAR/AtmelSAM9XE/ISR_Support.h index 6eaa2e268..a57d64e1a 100644 --- a/portable/IAR/AtmelSAM9XE/ISR_Support.h +++ b/portable/IAR/AtmelSAM9XE/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/port.c b/portable/IAR/AtmelSAM9XE/port.c index 9523f2d40..9b539ff08 100644 --- a/portable/IAR/AtmelSAM9XE/port.c +++ b/portable/IAR/AtmelSAM9XE/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/portasm.s79 b/portable/IAR/AtmelSAM9XE/portasm.s79 index cdd0af17d..237d62eb8 100644 --- a/portable/IAR/AtmelSAM9XE/portasm.s79 +++ b/portable/IAR/AtmelSAM9XE/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/portmacro.h b/portable/IAR/AtmelSAM9XE/portmacro.h index 979f6c0d5..4202a6db5 100644 --- a/portable/IAR/AtmelSAM9XE/portmacro.h +++ b/portable/IAR/AtmelSAM9XE/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/ISR_Support.h b/portable/IAR/LPC2000/ISR_Support.h index 15d5cc303..f3b452f1e 100644 --- a/portable/IAR/LPC2000/ISR_Support.h +++ b/portable/IAR/LPC2000/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/port.c b/portable/IAR/LPC2000/port.c index a306a7ca5..1fee8db2a 100644 --- a/portable/IAR/LPC2000/port.c +++ b/portable/IAR/LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/portasm.s79 b/portable/IAR/LPC2000/portasm.s79 index d289db870..3a103b0ee 100644 --- a/portable/IAR/LPC2000/portasm.s79 +++ b/portable/IAR/LPC2000/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/portmacro.h b/portable/IAR/LPC2000/portmacro.h index f4f2bbe24..18b6a2160 100644 --- a/portable/IAR/LPC2000/portmacro.h +++ b/portable/IAR/LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/port.c b/portable/IAR/MSP430/port.c index d8680cd07..e9c94b519 100644 --- a/portable/IAR/MSP430/port.c +++ b/portable/IAR/MSP430/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/portasm.h b/portable/IAR/MSP430/portasm.h index f86c2a7ce..ab7e82848 100644 --- a/portable/IAR/MSP430/portasm.h +++ b/portable/IAR/MSP430/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/portext.s43 b/portable/IAR/MSP430/portext.s43 index 6a9ba369a..74bef0681 100644 --- a/portable/IAR/MSP430/portext.s43 +++ b/portable/IAR/MSP430/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/portmacro.h b/portable/IAR/MSP430/portmacro.h index b904f7d88..045577442 100644 --- a/portable/IAR/MSP430/portmacro.h +++ b/portable/IAR/MSP430/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/data_model.h b/portable/IAR/MSP430X/data_model.h index 49f274b5c..85762171f 100644 --- a/portable/IAR/MSP430X/data_model.h +++ b/portable/IAR/MSP430X/data_model.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/port.c b/portable/IAR/MSP430X/port.c index 31854362d..de61f77c1 100644 --- a/portable/IAR/MSP430X/port.c +++ b/portable/IAR/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/portext.s43 b/portable/IAR/MSP430X/portext.s43 index 4915d4aa3..ca4aeac6b 100644 --- a/portable/IAR/MSP430X/portext.s43 +++ b/portable/IAR/MSP430X/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/portmacro.h b/portable/IAR/MSP430X/portmacro.h index 822e7798d..3c5fa13bf 100644 --- a/portable/IAR/MSP430X/portmacro.h +++ b/portable/IAR/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index c84977ecd..0a00cf28c 100644 --- a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/port.c b/portable/IAR/RISC-V/port.c index 4c7f03851..6044d85b2 100644 --- a/portable/IAR/RISC-V/port.c +++ b/portable/IAR/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/portASM.s b/portable/IAR/RISC-V/portASM.s index dbeaac623..1cd99edd8 100644 --- a/portable/IAR/RISC-V/portASM.s +++ b/portable/IAR/RISC-V/portASM.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/portContext.h b/portable/IAR/RISC-V/portContext.h index 9eec4b4db..e381ab512 100644 --- a/portable/IAR/RISC-V/portContext.h +++ b/portable/IAR/RISC-V/portContext.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/portmacro.h b/portable/IAR/RISC-V/portmacro.h index 8241a6999..003667c1d 100644 --- a/portable/IAR/RISC-V/portmacro.h +++ b/portable/IAR/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RL78/port.c b/portable/IAR/RL78/port.c index d27edc6fb..51853e2ba 100644 --- a/portable/IAR/RL78/port.c +++ b/portable/IAR/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RL78/portasm.s b/portable/IAR/RL78/portasm.s index 432225f59..b8dc11d33 100644 --- a/portable/IAR/RL78/portasm.s +++ b/portable/IAR/RL78/portasm.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RL78/portmacro.h b/portable/IAR/RL78/portmacro.h index 5c9e289c8..9cd3ef315 100644 --- a/portable/IAR/RL78/portmacro.h +++ b/portable/IAR/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX100/port.c b/portable/IAR/RX100/port.c index 8c511c459..224807e06 100644 --- a/portable/IAR/RX100/port.c +++ b/portable/IAR/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX100/port_asm.s b/portable/IAR/RX100/port_asm.s index 72e0310af..c7a37671d 100644 --- a/portable/IAR/RX100/port_asm.s +++ b/portable/IAR/RX100/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX100/portmacro.h b/portable/IAR/RX100/portmacro.h index a62fdc098..9fe1c937f 100644 --- a/portable/IAR/RX100/portmacro.h +++ b/portable/IAR/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX600/port.c b/portable/IAR/RX600/port.c index e1d473f79..bf14aca07 100644 --- a/portable/IAR/RX600/port.c +++ b/portable/IAR/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX600/port_asm.s b/portable/IAR/RX600/port_asm.s index 2f4fdaa74..3f8894f29 100644 --- a/portable/IAR/RX600/port_asm.s +++ b/portable/IAR/RX600/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX600/portmacro.h b/portable/IAR/RX600/portmacro.h index 0921840dc..764f86ac2 100644 --- a/portable/IAR/RX600/portmacro.h +++ b/portable/IAR/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX700v3_DPFPU/port.c b/portable/IAR/RX700v3_DPFPU/port.c index de9eddff0..d87ea29ec 100644 --- a/portable/IAR/RX700v3_DPFPU/port.c +++ b/portable/IAR/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX700v3_DPFPU/portmacro.h b/portable/IAR/RX700v3_DPFPU/portmacro.h index 4e5c3ebc5..e85f51e7b 100644 --- a/portable/IAR/RX700v3_DPFPU/portmacro.h +++ b/portable/IAR/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RXv2/port.c b/portable/IAR/RXv2/port.c index d6ac05f76..c526ccbe9 100644 --- a/portable/IAR/RXv2/port.c +++ b/portable/IAR/RXv2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RXv2/port_asm.s b/portable/IAR/RXv2/port_asm.s index 14bae31e9..50039f2b0 100644 --- a/portable/IAR/RXv2/port_asm.s +++ b/portable/IAR/RXv2/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RXv2/portmacro.h b/portable/IAR/RXv2/portmacro.h index 2fde7d017..0aedddbf2 100644 --- a/portable/IAR/RXv2/portmacro.h +++ b/portable/IAR/RXv2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/ISR_Support.h b/portable/IAR/STR71x/ISR_Support.h index 15d5cc303..f3b452f1e 100644 --- a/portable/IAR/STR71x/ISR_Support.h +++ b/portable/IAR/STR71x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/port.c b/portable/IAR/STR71x/port.c index ed9489405..bb5fd6d42 100644 --- a/portable/IAR/STR71x/port.c +++ b/portable/IAR/STR71x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/portasm.s79 b/portable/IAR/STR71x/portasm.s79 index aebaa3757..eb7302d74 100644 --- a/portable/IAR/STR71x/portasm.s79 +++ b/portable/IAR/STR71x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/portmacro.h b/portable/IAR/STR71x/portmacro.h index cfad05b40..07d12e140 100644 --- a/portable/IAR/STR71x/portmacro.h +++ b/portable/IAR/STR71x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/ISR_Support.h b/portable/IAR/STR75x/ISR_Support.h index 15d5cc303..f3b452f1e 100644 --- a/portable/IAR/STR75x/ISR_Support.h +++ b/portable/IAR/STR75x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/port.c b/portable/IAR/STR75x/port.c index 5e6897a69..195d298bd 100644 --- a/portable/IAR/STR75x/port.c +++ b/portable/IAR/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/portasm.s79 b/portable/IAR/STR75x/portasm.s79 index b8d113833..d7bfa3fd3 100644 --- a/portable/IAR/STR75x/portasm.s79 +++ b/portable/IAR/STR75x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/portmacro.h b/portable/IAR/STR75x/portmacro.h index 81654aca4..2435c14a1 100644 --- a/portable/IAR/STR75x/portmacro.h +++ b/portable/IAR/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/ISR_Support.h b/portable/IAR/STR91x/ISR_Support.h index d88ee691b..2893b9b6e 100644 --- a/portable/IAR/STR91x/ISR_Support.h +++ b/portable/IAR/STR91x/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/port.c b/portable/IAR/STR91x/port.c index 02a3b17cd..bcf01b5d2 100644 --- a/portable/IAR/STR91x/port.c +++ b/portable/IAR/STR91x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/portasm.s79 b/portable/IAR/STR91x/portasm.s79 index b8456df34..f2347cdbf 100644 --- a/portable/IAR/STR91x/portasm.s79 +++ b/portable/IAR/STR91x/portasm.s79 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/portmacro.h b/portable/IAR/STR91x/portmacro.h index 179baa4c2..c17b45cd1 100644 --- a/portable/IAR/STR91x/portmacro.h +++ b/portable/IAR/STR91x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/ISR_Support.h b/portable/IAR/V850ES/ISR_Support.h index d8138eea3..c2813301f 100644 --- a/portable/IAR/V850ES/ISR_Support.h +++ b/portable/IAR/V850ES/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/port.c b/portable/IAR/V850ES/port.c index a34af3e76..e8be642dc 100644 --- a/portable/IAR/V850ES/port.c +++ b/portable/IAR/V850ES/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portasm.s85 b/portable/IAR/V850ES/portasm.s85 index 1217b64f5..9f8224f4a 100644 --- a/portable/IAR/V850ES/portasm.s85 +++ b/portable/IAR/V850ES/portasm.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portasm_Fx3.s85 b/portable/IAR/V850ES/portasm_Fx3.s85 index beddc98ab..505040191 100644 --- a/portable/IAR/V850ES/portasm_Fx3.s85 +++ b/portable/IAR/V850ES/portasm_Fx3.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portasm_Hx2.s85 b/portable/IAR/V850ES/portasm_Hx2.s85 index ce8de3651..e340afe86 100644 --- a/portable/IAR/V850ES/portasm_Hx2.s85 +++ b/portable/IAR/V850ES/portasm_Hx2.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portmacro.h b/portable/IAR/V850ES/portmacro.h index b8a874fa0..cef73fb4c 100644 --- a/portable/IAR/V850ES/portmacro.h +++ b/portable/IAR/V850ES/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC18F/port.c b/portable/MPLAB/PIC18F/port.c index f2a5acbe0..3fbf3d5e0 100644 --- a/portable/MPLAB/PIC18F/port.c +++ b/portable/MPLAB/PIC18F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC18F/portmacro.h b/portable/MPLAB/PIC18F/portmacro.h index 86ce75902..d7954e814 100644 --- a/portable/MPLAB/PIC18F/portmacro.h +++ b/portable/MPLAB/PIC18F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/port.c b/portable/MPLAB/PIC24_dsPIC/port.c index dfd6a1d85..9f63cba0e 100644 --- a/portable/MPLAB/PIC24_dsPIC/port.c +++ b/portable/MPLAB/PIC24_dsPIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S index 14d8c83d2..dd9b1e761 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S index 2321a6bde..575064151 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/portmacro.h b/portable/MPLAB/PIC24_dsPIC/portmacro.h index 82883af7a..e75e7eef2 100644 --- a/portable/MPLAB/PIC24_dsPIC/portmacro.h +++ b/portable/MPLAB/PIC24_dsPIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h index 862998e76..2f43d5589 100644 --- a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h +++ b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/port.c b/portable/MPLAB/PIC32MEC14xx/port.c index 6fc2b0f02..38121b311 100644 --- a/portable/MPLAB/PIC32MEC14xx/port.c +++ b/portable/MPLAB/PIC32MEC14xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/port_asm.S b/portable/MPLAB/PIC32MEC14xx/port_asm.S index 1c0da410a..594f989ec 100644 --- a/portable/MPLAB/PIC32MEC14xx/port_asm.S +++ b/portable/MPLAB/PIC32MEC14xx/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/portmacro.h b/portable/MPLAB/PIC32MEC14xx/portmacro.h index 73d96cc54..915518334 100644 --- a/portable/MPLAB/PIC32MEC14xx/portmacro.h +++ b/portable/MPLAB/PIC32MEC14xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/ISR_Support.h b/portable/MPLAB/PIC32MX/ISR_Support.h index df7efd8da..7ee811f2f 100644 --- a/portable/MPLAB/PIC32MX/ISR_Support.h +++ b/portable/MPLAB/PIC32MX/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/port.c b/portable/MPLAB/PIC32MX/port.c index f7e88196c..1e9eb6cb3 100644 --- a/portable/MPLAB/PIC32MX/port.c +++ b/portable/MPLAB/PIC32MX/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/port_asm.S b/portable/MPLAB/PIC32MX/port_asm.S index 76dec3381..ab3c994af 100644 --- a/portable/MPLAB/PIC32MX/port_asm.S +++ b/portable/MPLAB/PIC32MX/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/portmacro.h b/portable/MPLAB/PIC32MX/portmacro.h index a2808bf1e..0fd9d68d3 100644 --- a/portable/MPLAB/PIC32MX/portmacro.h +++ b/portable/MPLAB/PIC32MX/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/ISR_Support.h b/portable/MPLAB/PIC32MZ/ISR_Support.h index 53c011809..81542d800 100644 --- a/portable/MPLAB/PIC32MZ/ISR_Support.h +++ b/portable/MPLAB/PIC32MZ/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/port.c b/portable/MPLAB/PIC32MZ/port.c index b9fa99e29..a59dca1cb 100644 --- a/portable/MPLAB/PIC32MZ/port.c +++ b/portable/MPLAB/PIC32MZ/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/port_asm.S b/portable/MPLAB/PIC32MZ/port_asm.S index a5e226001..885974311 100644 --- a/portable/MPLAB/PIC32MZ/port_asm.S +++ b/portable/MPLAB/PIC32MZ/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/portmacro.h b/portable/MPLAB/PIC32MZ/portmacro.h index c4c846f3c..400a30338 100644 --- a/portable/MPLAB/PIC32MZ/portmacro.h +++ b/portable/MPLAB/PIC32MZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MSVC-MingW/port.c b/portable/MSVC-MingW/port.c index 7db761eb5..4b196d627 100644 --- a/portable/MSVC-MingW/port.c +++ b/portable/MSVC-MingW/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MSVC-MingW/portmacro.h b/portable/MSVC-MingW/portmacro.h index d7bd0915f..64942caff 100644 --- a/portable/MSVC-MingW/portmacro.h +++ b/portable/MSVC-MingW/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_1.c b/portable/MemMang/heap_1.c index 1a2f7fd9f..15e3335fb 100644 --- a/portable/MemMang/heap_1.c +++ b/portable/MemMang/heap_1.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_2.c b/portable/MemMang/heap_2.c index 530bd955b..4b966558f 100644 --- a/portable/MemMang/heap_2.c +++ b/portable/MemMang/heap_2.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_3.c b/portable/MemMang/heap_3.c index 76665e7b5..ba7c67309 100644 --- a/portable/MemMang/heap_3.c +++ b/portable/MemMang/heap_3.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_4.c b/portable/MemMang/heap_4.c index 8ef8c9a6c..e662da25a 100644 --- a/portable/MemMang/heap_4.c +++ b/portable/MemMang/heap_4.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_5.c b/portable/MemMang/heap_5.c index bddc37c21..f627b7421 100644 --- a/portable/MemMang/heap_5.c +++ b/portable/MemMang/heap_5.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MikroC/ARM_CM4F/port.c b/portable/MikroC/ARM_CM4F/port.c index 37f25a50f..84d1c6dd5 100755 --- a/portable/MikroC/ARM_CM4F/port.c +++ b/portable/MikroC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MikroC/ARM_CM4F/portmacro.h b/portable/MikroC/ARM_CM4F/portmacro.h index 0963b6d69..5b156d8f2 100644 --- a/portable/MikroC/ARM_CM4F/portmacro.h +++ b/portable/MikroC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/large_untested/port.c b/portable/Paradigm/Tern_EE/large_untested/port.c index 39dfa2739..77184fa92 100644 --- a/portable/Paradigm/Tern_EE/large_untested/port.c +++ b/portable/Paradigm/Tern_EE/large_untested/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/large_untested/portasm.h b/portable/Paradigm/Tern_EE/large_untested/portasm.h index f413ff670..ab8b9e735 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portasm.h +++ b/portable/Paradigm/Tern_EE/large_untested/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/large_untested/portmacro.h b/portable/Paradigm/Tern_EE/large_untested/portmacro.h index 90b3fbb4a..60ae23cfd 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portmacro.h +++ b/portable/Paradigm/Tern_EE/large_untested/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/small/port.c b/portable/Paradigm/Tern_EE/small/port.c index aec1a3e2d..871830044 100644 --- a/portable/Paradigm/Tern_EE/small/port.c +++ b/portable/Paradigm/Tern_EE/small/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/small/portasm.h b/portable/Paradigm/Tern_EE/small/portasm.h index d27e03f59..f2b54fac6 100644 --- a/portable/Paradigm/Tern_EE/small/portasm.h +++ b/portable/Paradigm/Tern_EE/small/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/small/portmacro.h b/portable/Paradigm/Tern_EE/small/portmacro.h index 1fc88d74f..6d318ad8e 100644 --- a/portable/Paradigm/Tern_EE/small/portmacro.h +++ b/portable/Paradigm/Tern_EE/small/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/port.c b/portable/RVDS/ARM7_LPC21xx/port.c index 1fe78d6de..43c5247a0 100644 --- a/portable/RVDS/ARM7_LPC21xx/port.c +++ b/portable/RVDS/ARM7_LPC21xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/portASM.s b/portable/RVDS/ARM7_LPC21xx/portASM.s index ce3fbcbfd..09c241caa 100644 --- a/portable/RVDS/ARM7_LPC21xx/portASM.s +++ b/portable/RVDS/ARM7_LPC21xx/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.h b/portable/RVDS/ARM7_LPC21xx/portmacro.h index f09ae0867..ec738d510 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.h +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.inc b/portable/RVDS/ARM7_LPC21xx/portmacro.inc index 61c3c9292..6ff33fa2b 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.inc +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/port.c b/portable/RVDS/ARM_CA9/port.c index 0f9fa15a4..d75b9a786 100644 --- a/portable/RVDS/ARM_CA9/port.c +++ b/portable/RVDS/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/portASM.s b/portable/RVDS/ARM_CA9/portASM.s index f655e8b72..8a9070d82 100644 --- a/portable/RVDS/ARM_CA9/portASM.s +++ b/portable/RVDS/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/portmacro.h b/portable/RVDS/ARM_CA9/portmacro.h index e242b4934..08203256b 100644 --- a/portable/RVDS/ARM_CA9/portmacro.h +++ b/portable/RVDS/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/portmacro.inc b/portable/RVDS/ARM_CA9/portmacro.inc index 1df4ebdb3..86f792c7b 100644 --- a/portable/RVDS/ARM_CA9/portmacro.inc +++ b/portable/RVDS/ARM_CA9/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM0/port.c b/portable/RVDS/ARM_CM0/port.c index fb2151a1d..d55129653 100644 --- a/portable/RVDS/ARM_CM0/port.c +++ b/portable/RVDS/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM0/portmacro.h b/portable/RVDS/ARM_CM0/portmacro.h index 883fc383a..555ac8df8 100644 --- a/portable/RVDS/ARM_CM0/portmacro.h +++ b/portable/RVDS/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM3/port.c b/portable/RVDS/ARM_CM3/port.c index bfab38f5f..3f91efcfe 100755 --- a/portable/RVDS/ARM_CM3/port.c +++ b/portable/RVDS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM3/portmacro.h b/portable/RVDS/ARM_CM3/portmacro.h index 36b586b2c..f95841ee5 100644 --- a/portable/RVDS/ARM_CM3/portmacro.h +++ b/portable/RVDS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4F/port.c b/portable/RVDS/ARM_CM4F/port.c index 30a5c49b4..d1393c696 100755 --- a/portable/RVDS/ARM_CM4F/port.c +++ b/portable/RVDS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4F/portmacro.h b/portable/RVDS/ARM_CM4F/portmacro.h index da24d1173..df09a66fc 100644 --- a/portable/RVDS/ARM_CM4F/portmacro.h +++ b/portable/RVDS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c b/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c index f3f817dff..bcd73a0af 100644 --- a/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c +++ b/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index 2d22db313..95db1b76a 100755 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h index 16b80468e..6ec5f40c9 100644 --- a/portable/RVDS/ARM_CM4_MPU/portmacro.h +++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM7/r0p1/port.c b/portable/RVDS/ARM_CM7/r0p1/port.c index 5e14708d9..721c04773 100755 --- a/portable/RVDS/ARM_CM7/r0p1/port.c +++ b/portable/RVDS/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM7/r0p1/portmacro.h b/portable/RVDS/ARM_CM7/r0p1/portmacro.h index b1cec5ffc..8dae3407a 100644 --- a/portable/RVDS/ARM_CM7/r0p1/portmacro.h +++ b/portable/RVDS/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX100/port.c b/portable/Renesas/RX100/port.c index 608bc4011..a04876302 100644 --- a/portable/Renesas/RX100/port.c +++ b/portable/Renesas/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX100/port_asm.src b/portable/Renesas/RX100/port_asm.src index 6308f6b27..a216e917e 100644 --- a/portable/Renesas/RX100/port_asm.src +++ b/portable/Renesas/RX100/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX100/portmacro.h b/portable/Renesas/RX100/portmacro.h index ae55bed15..eb5242e93 100644 --- a/portable/Renesas/RX100/portmacro.h +++ b/portable/Renesas/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX200/port.c b/portable/Renesas/RX200/port.c index 0fa036dfa..0d06f9ab1 100644 --- a/portable/Renesas/RX200/port.c +++ b/portable/Renesas/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX200/port_asm.src b/portable/Renesas/RX200/port_asm.src index 6308f6b27..a216e917e 100644 --- a/portable/Renesas/RX200/port_asm.src +++ b/portable/Renesas/RX200/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX200/portmacro.h b/portable/Renesas/RX200/portmacro.h index c27079fd2..7c204ea5e 100644 --- a/portable/Renesas/RX200/portmacro.h +++ b/portable/Renesas/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600/port.c b/portable/Renesas/RX600/port.c index 93c733db3..4ef917159 100644 --- a/portable/Renesas/RX600/port.c +++ b/portable/Renesas/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600/port_asm.src b/portable/Renesas/RX600/port_asm.src index 6308f6b27..a216e917e 100644 --- a/portable/Renesas/RX600/port_asm.src +++ b/portable/Renesas/RX600/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600/portmacro.h b/portable/Renesas/RX600/portmacro.h index c39b97493..7c82fe642 100644 --- a/portable/Renesas/RX600/portmacro.h +++ b/portable/Renesas/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600v2/port.c b/portable/Renesas/RX600v2/port.c index 8ed612c4d..46daffa36 100644 --- a/portable/Renesas/RX600v2/port.c +++ b/portable/Renesas/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600v2/port_asm.src b/portable/Renesas/RX600v2/port_asm.src index 3c4aefb86..ad851df56 100644 --- a/portable/Renesas/RX600v2/port_asm.src +++ b/portable/Renesas/RX600v2/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600v2/portmacro.h b/portable/Renesas/RX600v2/portmacro.h index 25ca79bab..178b39e54 100644 --- a/portable/Renesas/RX600v2/portmacro.h +++ b/portable/Renesas/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX700v3_DPFPU/port.c b/portable/Renesas/RX700v3_DPFPU/port.c index fc1b87427..80aa603eb 100644 --- a/portable/Renesas/RX700v3_DPFPU/port.c +++ b/portable/Renesas/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX700v3_DPFPU/port_asm.src b/portable/Renesas/RX700v3_DPFPU/port_asm.src index 3c4aefb86..ad851df56 100644 --- a/portable/Renesas/RX700v3_DPFPU/port_asm.src +++ b/portable/Renesas/RX700v3_DPFPU/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX700v3_DPFPU/portmacro.h b/portable/Renesas/RX700v3_DPFPU/portmacro.h index dcb349687..480896b3c 100644 --- a/portable/Renesas/RX700v3_DPFPU/portmacro.h +++ b/portable/Renesas/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/ISR_Support.inc b/portable/Renesas/SH2A_FPU/ISR_Support.inc index b974a7f07..f46f27cb1 100644 --- a/portable/Renesas/SH2A_FPU/ISR_Support.inc +++ b/portable/Renesas/SH2A_FPU/ISR_Support.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/port.c b/portable/Renesas/SH2A_FPU/port.c index f2dfb7f4a..09edf4d6e 100644 --- a/portable/Renesas/SH2A_FPU/port.c +++ b/portable/Renesas/SH2A_FPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/portasm.src b/portable/Renesas/SH2A_FPU/portasm.src index 8a097d603..291422f34 100644 --- a/portable/Renesas/SH2A_FPU/portasm.src +++ b/portable/Renesas/SH2A_FPU/portasm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/portmacro.h b/portable/Renesas/SH2A_FPU/portmacro.h index 6c1806d7e..b3610f514 100644 --- a/portable/Renesas/SH2A_FPU/portmacro.h +++ b/portable/Renesas/SH2A_FPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/port.c b/portable/Rowley/MSP430F449/port.c index b294905f7..09c22c9e4 100644 --- a/portable/Rowley/MSP430F449/port.c +++ b/portable/Rowley/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/portasm.h b/portable/Rowley/MSP430F449/portasm.h index 29153821e..a9ae8f7fc 100644 --- a/portable/Rowley/MSP430F449/portasm.h +++ b/portable/Rowley/MSP430F449/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/portext.asm b/portable/Rowley/MSP430F449/portext.asm index cb41db0ac..22bdd81fd 100644 --- a/portable/Rowley/MSP430F449/portext.asm +++ b/portable/Rowley/MSP430F449/portext.asm @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/portmacro.h b/portable/Rowley/MSP430F449/portmacro.h index fe380f390..ee6c9fc59 100644 --- a/portable/Rowley/MSP430F449/portmacro.h +++ b/portable/Rowley/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/SDCC/Cygnal/port.c b/portable/SDCC/Cygnal/port.c index cead166b3..978bd8016 100644 --- a/portable/SDCC/Cygnal/port.c +++ b/portable/SDCC/Cygnal/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/SDCC/Cygnal/portmacro.h b/portable/SDCC/Cygnal/portmacro.h index c79fe75e5..2314be932 100644 --- a/portable/SDCC/Cygnal/portmacro.h +++ b/portable/SDCC/Cygnal/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB91460/__STD_LIB_sbrk.c b/portable/Softune/MB91460/__STD_LIB_sbrk.c index 4db93f4c7..ec38320f4 100644 --- a/portable/Softune/MB91460/__STD_LIB_sbrk.c +++ b/portable/Softune/MB91460/__STD_LIB_sbrk.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB91460/port.c b/portable/Softune/MB91460/port.c index 76e9e168f..b5fa088f0 100644 --- a/portable/Softune/MB91460/port.c +++ b/portable/Softune/MB91460/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB91460/portmacro.h b/portable/Softune/MB91460/portmacro.h index a157a9063..28cb52479 100644 --- a/portable/Softune/MB91460/portmacro.h +++ b/portable/Softune/MB91460/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB96340/__STD_LIB_sbrk.c b/portable/Softune/MB96340/__STD_LIB_sbrk.c index 4db93f4c7..ec38320f4 100644 --- a/portable/Softune/MB96340/__STD_LIB_sbrk.c +++ b/portable/Softune/MB96340/__STD_LIB_sbrk.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB96340/port.c b/portable/Softune/MB96340/port.c index 40d6240e8..f8d7f8dbe 100644 --- a/portable/Softune/MB96340/port.c +++ b/portable/Softune/MB96340/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB96340/portmacro.h b/portable/Softune/MB96340/portmacro.h index 5ab66e92f..9acb16c28 100644 --- a/portable/Softune/MB96340/portmacro.h +++ b/portable/Softune/MB96340/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Tasking/ARM_CM4F/port.c b/portable/Tasking/ARM_CM4F/port.c index 16001ca44..6985a92ae 100755 --- a/portable/Tasking/ARM_CM4F/port.c +++ b/portable/Tasking/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Tasking/ARM_CM4F/port_asm.asm b/portable/Tasking/ARM_CM4F/port_asm.asm index 123994200..16c75f5b2 100644 --- a/portable/Tasking/ARM_CM4F/port_asm.asm +++ b/portable/Tasking/ARM_CM4F/port_asm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.0 +; * FreeRTOS Kernel V10.6.1 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Tasking/ARM_CM4F/portmacro.h b/portable/Tasking/ARM_CM4F/portmacro.h index fa7aafab9..815ce8271 100644 --- a/portable/Tasking/ARM_CM4F/portmacro.h +++ b/portable/Tasking/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c index 19fbe150c..e395d03bf 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h index 2ecfe64c8..8f7539e2d 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s index 79cd30998..5664694c9 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c index 95db6906b..319a8d765 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/port.c b/portable/ThirdParty/GCC/ARC_EM_HS/port.c index 0c32ade23..875854492 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/port.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h index 144996a02..ffc3160e3 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c index 19fbe150c..e395d03bf 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h index 2ecfe64c8..8f7539e2d 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_support.s b/portable/ThirdParty/GCC/ARC_v1/arc_support.s index 0626cbfad..cc2a27d07 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_v1/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/port.c b/portable/ThirdParty/GCC/ARC_v1/port.c index 75c0204d3..a7d2e7268 100644 --- a/portable/ThirdParty/GCC/ARC_v1/port.c +++ b/portable/ThirdParty/GCC/ARC_v1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/portmacro.h b/portable/ThirdParty/GCC/ARC_v1/portmacro.h index 34b8f78f1..39ee710dc 100644 --- a/portable/ThirdParty/GCC/ARC_v1/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_v1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ATmega/port.c b/portable/ThirdParty/GCC/ATmega/port.c index 40a8a8560..3891de2b0 100644 --- a/portable/ThirdParty/GCC/ATmega/port.c +++ b/portable/ThirdParty/GCC/ATmega/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ATmega/portmacro.h b/portable/ThirdParty/GCC/ATmega/portmacro.h index 5a3dd44c6..8a018927a 100644 --- a/portable/ThirdParty/GCC/ATmega/portmacro.h +++ b/portable/ThirdParty/GCC/ATmega/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/port.c b/portable/ThirdParty/GCC/Posix/port.c index c331c72f1..3d744fe8f 100644 --- a/portable/ThirdParty/GCC/Posix/port.c +++ b/portable/ThirdParty/GCC/Posix/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Cambridge Consultants Ltd. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/portmacro.h b/portable/ThirdParty/GCC/Posix/portmacro.h index 49950c1ae..b1447dbff 100644 --- a/portable/ThirdParty/GCC/Posix/portmacro.h +++ b/portable/ThirdParty/GCC/Posix/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright 2020 Cambridge Consultants Ltd. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c index 7708b1f8e..1af2d6f22 100644 --- a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c +++ b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h index 515ec9c21..d535bad2e 100644 --- a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h +++ b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c b/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c index c1bd00ac3..347814958 100644 --- a/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c +++ b/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h b/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h index 94767721c..c6b98c781 100644 --- a/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h +++ b/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/include/portmacro.h b/portable/ThirdParty/GCC/RP2040/include/portmacro.h index 3dbdaf3d9..a15a48e50 100644 --- a/portable/ThirdParty/GCC/RP2040/include/portmacro.h +++ b/portable/ThirdParty/GCC/RP2040/include/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h b/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h index f52e093c9..a869e5658 100644 --- a/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h +++ b/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/port.c b/portable/ThirdParty/GCC/RP2040/port.c index 63f57434a..e75a6dcaa 100644 --- a/portable/ThirdParty/GCC/RP2040/port.c +++ b/portable/ThirdParty/GCC/RP2040/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h index ba45fbb30..051ca017d 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h @@ -6,7 +6,7 @@ * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD */ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h index 6a1569ec5..7435323b7 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h @@ -7,7 +7,7 @@ * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD */ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/port.c b/portable/ThirdParty/GCC/Xtensa_ESP32/port.c index ed65f23bd..f4705ba31 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/port.c +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/port.c @@ -7,7 +7,7 @@ * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD */ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/XCC/Xtensa/port.c b/portable/ThirdParty/XCC/Xtensa/port.c index 603846e71..c74839d98 100644 --- a/portable/ThirdParty/XCC/Xtensa/port.c +++ b/portable/ThirdParty/XCC/Xtensa/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portasm.S b/portable/ThirdParty/XCC/Xtensa/portasm.S index 46b3ad5af..4d457a870 100644 --- a/portable/ThirdParty/XCC/Xtensa/portasm.S +++ b/portable/ThirdParty/XCC/Xtensa/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portbenchmark.h b/portable/ThirdParty/XCC/Xtensa/portbenchmark.h index 48d94a8ae..7ad06e1e0 100644 --- a/portable/ThirdParty/XCC/Xtensa/portbenchmark.h +++ b/portable/ThirdParty/XCC/Xtensa/portbenchmark.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portclib.c b/portable/ThirdParty/XCC/Xtensa/portclib.c index 148a86c1a..426a73ed1 100644 --- a/portable/ThirdParty/XCC/Xtensa/portclib.c +++ b/portable/ThirdParty/XCC/Xtensa/portclib.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portmacro.h b/portable/ThirdParty/XCC/Xtensa/portmacro.h index ebca3319b..8c65780ce 100644 --- a/portable/ThirdParty/XCC/Xtensa/portmacro.h +++ b/portable/ThirdParty/XCC/Xtensa/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/porttrace.h b/portable/ThirdParty/XCC/Xtensa/porttrace.h index 8bac5a02a..e1ae9c3ce 100644 --- a/portable/ThirdParty/XCC/Xtensa/porttrace.h +++ b/portable/ThirdParty/XCC/Xtensa/porttrace.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_api.h b/portable/ThirdParty/XCC/Xtensa/xtensa_api.h index 9bd57908f..b096c15fd 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_api.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_api.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_config.h b/portable/ThirdParty/XCC/Xtensa/xtensa_config.h index 66431f585..ee15e8a99 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_config.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_config.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_context.S b/portable/ThirdParty/XCC/Xtensa/xtensa_context.S index 0b92dc556..d73ce8356 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_context.S +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_context.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_context.h b/portable/ThirdParty/XCC/Xtensa/xtensa_context.h index 27459a409..5b1504e2a 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_context.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_init.c b/portable/ThirdParty/XCC/Xtensa/xtensa_init.c index 008f49110..c932af334 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_init.c +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c b/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c index 1fa3cf349..dc8814350 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S b/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S index e39947c20..0b71b1b10 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c b/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c index d4135e3c4..3b0b7f059 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h b/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h index b4a387d77..5caab93f0 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h b/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h index 5973cebe7..e22eb567d 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S b/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S index cf7e32103..d1d73bb7f 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/WizC/PIC18/Drivers/Tick/Tick.c b/portable/WizC/PIC18/Drivers/Tick/Tick.c index b5b71c69c..12b5a3be6 100644 --- a/portable/WizC/PIC18/Drivers/Tick/Tick.c +++ b/portable/WizC/PIC18/Drivers/Tick/Tick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/Drivers/Tick/isrTick.c b/portable/WizC/PIC18/Drivers/Tick/isrTick.c index 94f64fa9e..f1f43b454 100644 --- a/portable/WizC/PIC18/Drivers/Tick/isrTick.c +++ b/portable/WizC/PIC18/Drivers/Tick/isrTick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/addFreeRTOS.h b/portable/WizC/PIC18/addFreeRTOS.h index fb3bc109c..3c302d58a 100644 --- a/portable/WizC/PIC18/addFreeRTOS.h +++ b/portable/WizC/PIC18/addFreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/port.c b/portable/WizC/PIC18/port.c index 50ff27710..3015b9574 100644 --- a/portable/WizC/PIC18/port.c +++ b/portable/WizC/PIC18/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/portmacro.h b/portable/WizC/PIC18/portmacro.h index 740081207..2b883a184 100644 --- a/portable/WizC/PIC18/portmacro.h +++ b/portable/WizC/PIC18/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/Flsh186/port.c b/portable/oWatcom/16BitDOS/Flsh186/port.c index 59de34fca..810c7275d 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/port.c +++ b/portable/oWatcom/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h index 2f39ca093..69a18c785 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h +++ b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/PC/port.c b/portable/oWatcom/16BitDOS/PC/port.c index 1611743b2..16139e1b4 100644 --- a/portable/oWatcom/16BitDOS/PC/port.c +++ b/portable/oWatcom/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/PC/portmacro.h b/portable/oWatcom/16BitDOS/PC/portmacro.h index 122549a59..47fc988d0 100644 --- a/portable/oWatcom/16BitDOS/PC/portmacro.h +++ b/portable/oWatcom/16BitDOS/PC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/common/portasm.h b/portable/oWatcom/16BitDOS/common/portasm.h index 9a71df4be..8fd8af12d 100644 --- a/portable/oWatcom/16BitDOS/common/portasm.h +++ b/portable/oWatcom/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/common/portcomn.c b/portable/oWatcom/16BitDOS/common/portcomn.c index 0d249469b..a0dc870db 100644 --- a/portable/oWatcom/16BitDOS/common/portcomn.c +++ b/portable/oWatcom/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/queue.c b/queue.c index d479ec11e..65cf7a3a1 100644 --- a/queue.c +++ b/queue.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/stream_buffer.c b/stream_buffer.c index 93c3d58ea..085e22620 100644 --- a/stream_buffer.c +++ b/stream_buffer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/tasks.c b/tasks.c index 53ec69c97..7f0c3ce5c 100644 --- a/tasks.c +++ b/tasks.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/timers.c b/timers.c index c78c93443..1d0c63355 100644 --- a/timers.c +++ b/timers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.0 + * FreeRTOS Kernel V10.6.1 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT From ab6744c08cd010fea2252a6ad997c6a3d7c81baa Mon Sep 17 00:00:00 2001 From: kar-rahul-aws Date: Thu, 17 Aug 2023 17:14:06 +0000 Subject: [PATCH 09/21] [AUTO][RELEASE]: Update version number in manifest.yml --- manifest.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest.yml b/manifest.yml index 211e3c2ae..4a19fce3d 100644 --- a/manifest.yml +++ b/manifest.yml @@ -1,4 +1,4 @@ name : "FreeRTOS-Kernel" -version: "v10.5.1" +version: "v10.6.1" description: "FreeRTOS Kernel." license: "MIT" From 0264280230aa6a828247b5f05bf57e33f1994581 Mon Sep 17 00:00:00 2001 From: kar-rahul-aws Date: Thu, 17 Aug 2023 17:14:08 +0000 Subject: [PATCH 10/21] [AUTO][RELEASE]: Update SBOM --- sbom.spdx | 2376 ++++++++++++++++++++++++++--------------------------- 1 file changed, 1188 insertions(+), 1188 deletions(-) diff --git a/sbom.spdx b/sbom.spdx index d5a760830..5ee618ef6 100644 --- a/sbom.spdx +++ b/sbom.spdx @@ -2,733 +2,845 @@ SPDXVersion: SPDX-2.2 DataLicense: CC0-1.0 SPDXID: SPDXRef-DOCUMENT DocumentName: FreeRTOS-Kernel -DocumentNamespace: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/v10.5.1/sbom.spdx +DocumentNamespace: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/v10.6.1/sbom.spdx Creator: Amazon Web Services -Created: 2023-07-13T11:45:34Z +Created: 2023-08-17T17:14:08Z CreatorComment: NOASSERTION DocumentComment: NOASSERTION PackageName: FreeRTOS-Kernel SPDXID: SPDXRef-Package-FreeRTOS-Kernel -PackageVersion: v10.5.1 -PackageDownloadLocation: https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/v10.5.1 +PackageVersion: v10.6.1 +PackageDownloadLocation: https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/v10.6.1 PackageLicenseConcluded: MIT FilesAnalyzed: True -PackageVerificationCode: 9dcfeabc64e4ecdd592144e7c23e0bada23f5fee +PackageVerificationCode: 57c35c7fda5aab4af2f747061307de7b5c574dcf PackageCopyrightText: NOASSERTION PackageSummary: NOASSERTION PackageDescription: FreeRTOS Kernel. -FileName: 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SPDXRef-File-portable-ThirdParty-GCC-ATmega-port.c +FileChecksum: SHA1: d833579b0b49f172c907bdb349c1e22781059f1a LicenseConcluded: MIT FileCopyrightText: NOASSERTION FileComment: NOASSERTION From 7003ba73eda622dfa328d79c966b62b47bfc14d7 Mon Sep 17 00:00:00 2001 From: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Date: Tue, 17 Oct 2023 23:49:09 +0530 Subject: [PATCH 11/21] Backport PR 836 to FreeRTOS-Kernel V10.6.1 (#837) Signed-off-by: Gaurav Aggarwal --- portable/Common/mpu_wrappers_v2.c | 41 ++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 14 deletions(-) diff --git a/portable/Common/mpu_wrappers_v2.c b/portable/Common/mpu_wrappers_v2.c index f5f9a4e15..2bb1417be 100644 --- a/portable/Common/mpu_wrappers_v2.c +++ b/portable/Common/mpu_wrappers_v2.c @@ -112,6 +112,16 @@ */ #define CONVERT_TO_INTERNAL_INDEX( lIndex ) ( ( lIndex ) - INDEX_OFFSET ) +/** + * @brief Max value that fits in a size_t type. + */ + #define mpuSIZE_MAX ( ~( ( size_t ) 0 ) ) + +/** + * @brief Check if multiplying a and b will result in overflow. + */ + #define mpuMULTIPLY_WILL_OVERFLOW( a, b ) ( ( ( a ) > 0 ) && ( ( b ) > ( mpuSIZE_MAX / ( a ) ) ) ) + /** * @brief Get the index of a free slot in the kernel object pool. * @@ -924,25 +934,28 @@ UBaseType_t uxArraySize, configRUN_TIME_COUNTER_TYPE * pulTotalRunTime ) /* PRIVILEGED_FUNCTION */ { - UBaseType_t uxReturn = pdFALSE; + UBaseType_t uxReturn = 0; UBaseType_t xIsTaskStatusArrayWriteable = pdFALSE; UBaseType_t xIsTotalRunTimeWriteable = pdFALSE; - xIsTaskStatusArrayWriteable = xPortIsAuthorizedToAccessBuffer( pxTaskStatusArray, - sizeof( TaskStatus_t ) * uxArraySize, - tskMPU_WRITE_PERMISSION ); - - if( pulTotalRunTime != NULL ) + if( mpuMULTIPLY_WILL_OVERFLOW( sizeof( TaskStatus_t ), uxArraySize ) == 0 ) { - xIsTotalRunTimeWriteable = xPortIsAuthorizedToAccessBuffer( pulTotalRunTime, - sizeof( configRUN_TIME_COUNTER_TYPE ), - tskMPU_WRITE_PERMISSION ); - } + xIsTaskStatusArrayWriteable = xPortIsAuthorizedToAccessBuffer( pxTaskStatusArray, + sizeof( TaskStatus_t ) * uxArraySize, + tskMPU_WRITE_PERMISSION ); - if( ( xIsTaskStatusArrayWriteable == pdTRUE ) && - ( ( pulTotalRunTime == NULL ) || ( xIsTotalRunTimeWriteable == pdTRUE ) ) ) - { - uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime ); + if( pulTotalRunTime != NULL ) + { + xIsTotalRunTimeWriteable = xPortIsAuthorizedToAccessBuffer( pulTotalRunTime, + sizeof( configRUN_TIME_COUNTER_TYPE ), + tskMPU_WRITE_PERMISSION ); + } + + if( ( xIsTaskStatusArrayWriteable == pdTRUE ) && + ( ( pulTotalRunTime == NULL ) || ( xIsTotalRunTimeWriteable == pdTRUE ) ) ) + { + uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime ); + } } return uxReturn; From d9fc48bced1ecb9aeebd8ee0d564a5eb6405afe6 Mon Sep 17 00:00:00 2001 From: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com> Date: Thu, 19 Oct 2023 11:21:27 +0530 Subject: [PATCH 12/21] Backport PR 839 to FreeRTOS-Kernel V10.6.1 (#840) * Fix size alignment in the integer overflow issue * Remove CORTEX_M3_MPS2_QEMU demo in the V10.6.x branch to sync with the main branch. --- .github/workflows/kernel-demos.yml | 14 -------------- portable/Common/mpu_wrappers_v2.c | 14 ++++++++------ 2 files changed, 8 insertions(+), 20 deletions(-) diff --git a/.github/workflows/kernel-demos.yml b/.github/workflows/kernel-demos.yml index 865f4eefb..abee44bc1 100644 --- a/.github/workflows/kernel-demos.yml +++ b/.github/workflows/kernel-demos.yml @@ -161,20 +161,6 @@ jobs: working-directory: FreeRTOS/Demo/CORTEX_LM3S102_GCC run: make -j - - name: Build CORTEX_M3_MPS2_QEMU_GCC Demo - shell: bash - working-directory: FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC - run: | - make clean - make -j - - - name: Build CORTEX_M3_MPS2_QEMU_GCC Demo - shell: bash - working-directory: FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC - run: | - make clean - make FULL_DEMO=1 -j - - name: Build CORTEX_LM3S811_GCC Demo shell: bash working-directory: FreeRTOS/Demo/CORTEX_LM3S811_GCC diff --git a/portable/Common/mpu_wrappers_v2.c b/portable/Common/mpu_wrappers_v2.c index 2bb1417be..93874eacb 100644 --- a/portable/Common/mpu_wrappers_v2.c +++ b/portable/Common/mpu_wrappers_v2.c @@ -113,14 +113,14 @@ #define CONVERT_TO_INTERNAL_INDEX( lIndex ) ( ( lIndex ) - INDEX_OFFSET ) /** - * @brief Max value that fits in a size_t type. + * @brief Max value that fits in a uint32_t type. */ - #define mpuSIZE_MAX ( ~( ( size_t ) 0 ) ) + #define mpuUINT32_MAX ( ~( ( uint32_t ) 0 ) ) /** * @brief Check if multiplying a and b will result in overflow. */ - #define mpuMULTIPLY_WILL_OVERFLOW( a, b ) ( ( ( a ) > 0 ) && ( ( b ) > ( mpuSIZE_MAX / ( a ) ) ) ) + #define mpuMULTIPLY_UINT32_WILL_OVERFLOW( a, b ) ( ( ( a ) > 0 ) && ( ( b ) > ( mpuUINT32_MAX / ( a ) ) ) ) /** * @brief Get the index of a free slot in the kernel object pool. @@ -937,11 +937,13 @@ UBaseType_t uxReturn = 0; UBaseType_t xIsTaskStatusArrayWriteable = pdFALSE; UBaseType_t xIsTotalRunTimeWriteable = pdFALSE; + uint32_t ulArraySize = ( uint32_t ) uxArraySize; + uint32_t ulTaskStatusSize = ( uint32_t ) sizeof( TaskStatus_t ); - if( mpuMULTIPLY_WILL_OVERFLOW( sizeof( TaskStatus_t ), uxArraySize ) == 0 ) + if( mpuMULTIPLY_UINT32_WILL_OVERFLOW( ulTaskStatusSize, ulArraySize ) == 0 ) { xIsTaskStatusArrayWriteable = xPortIsAuthorizedToAccessBuffer( pxTaskStatusArray, - sizeof( TaskStatus_t ) * uxArraySize, + ulTaskStatusSize * ulArraySize, tskMPU_WRITE_PERMISSION ); if( pulTotalRunTime != NULL ) @@ -954,7 +956,7 @@ if( ( xIsTaskStatusArrayWriteable == pdTRUE ) && ( ( pulTotalRunTime == NULL ) || ( xIsTotalRunTimeWriteable == pdTRUE ) ) ) { - uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime ); + uxReturn = uxTaskGetSystemState( pxTaskStatusArray, ( UBaseType_t ) ulArraySize, pulTotalRunTime ); } } From 52c1c6e578cbbc250b09fa19b17b456ea0fc076f Mon Sep 17 00:00:00 2001 From: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Date: Fri, 20 Oct 2023 22:08:19 +0530 Subject: [PATCH 13/21] Covert object type check to runtime check (#847) It was checked using assert earlier. Signed-off-by: Gaurav Aggarwal --- portable/Common/mpu_wrappers_v2.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/portable/Common/mpu_wrappers_v2.c b/portable/Common/mpu_wrappers_v2.c index 93874eacb..04daedcff 100644 --- a/portable/Common/mpu_wrappers_v2.c +++ b/portable/Common/mpu_wrappers_v2.c @@ -324,9 +324,16 @@ static OpaqueObjectHandle_t MPU_GetHandleAtIndex( int32_t lIndex, uint32_t ulKernelObjectType ) /* PRIVILEGED_FUNCTION */ { + OpaqueObjectHandle_t xObjectHandle = NULL; + configASSERT( IS_INTERNAL_INDEX_VALID( lIndex ) != pdFALSE ); - configASSERT( xKernelObjectPool[ lIndex ].ulKernelObjectType == ulKernelObjectType ); - return xKernelObjectPool[ lIndex ].xInternalObjectHandle; + + if( xKernelObjectPool[ lIndex ].ulKernelObjectType == ulKernelObjectType ) + { + xObjectHandle = xKernelObjectPool[ lIndex ].xInternalObjectHandle; + } + + return xObjectHandle; } /*-----------------------------------------------------------*/ From 9bfd85a2537d77eefc1912ef7faeeeb467795769 Mon Sep 17 00:00:00 2001 From: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Date: Tue, 21 Nov 2023 18:42:23 +0530 Subject: [PATCH 14/21] Update system call entry mechanism (#896) Earlier the System Call entry from an unprivileged task looked like: 1. SVC for entering system call. 2. System call implementation. 3. SVC for exiting system call. Now, the system call entry needs to make only one system call and everything else is handled internally. This PR also makes the following small changes: 1. Add one struct param for system calls with 5 parameters. This removes the need for special handling for system calls with 5 parameters. 2. Remove raise privilege SVC when MPU wrapper v2 is used. 3. Add additional run time parameter checks to MPU wrappers for xTaskGenericNotify and xQueueTakeMutexRecursive APIs. These changes are tested on the following platforms: 1. STM32H743ZI (Cortex-M7) 2. STM32L152RE (Cortex-M3) 3. Nuvoton M2351 (Cortex-M23) 4. NXP LPC55S69 (Cortex-M33) --- .github/workflows/unit-tests.yml | 2 +- include/mpu_prototypes.h | 42 +- include/mpu_syscall_numbers.h | 106 + portable/ARMv8M/non_secure/port.c | 877 ++-- .../GCC/ARM_CM23/mpu_wrappers_v2_asm.c | 3903 ++++++++--------- .../portable/GCC/ARM_CM23/portasm.c | 932 ++-- .../GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c | 3903 ++++++++--------- .../portable/GCC/ARM_CM23_NTZ/portasm.c | 754 ++-- .../GCC/ARM_CM33/mpu_wrappers_v2_asm.c | 3763 ++++++++-------- .../portable/GCC/ARM_CM33/portasm.c | 862 ++-- .../GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c | 3763 ++++++++-------- .../portable/GCC/ARM_CM33_NTZ/portasm.c | 694 ++- .../IAR/ARM_CM23/mpu_wrappers_v2_asm.S | 384 +- .../portable/IAR/ARM_CM23/portasm.s | 26 +- .../IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S | 384 +- .../portable/IAR/ARM_CM23_NTZ/portasm.s | 22 +- .../IAR/ARM_CM33/mpu_wrappers_v2_asm.S | 384 +- .../portable/IAR/ARM_CM33/portasm.s | 22 +- .../IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S | 384 +- .../portable/IAR/ARM_CM33_NTZ/portasm.s | 18 +- portable/ARMv8M/non_secure/portmacrocommon.h | 13 +- portable/Common/mpu_wrappers_v2.c | 558 ++- .../ARM_CM23/non_secure/mpu_wrappers_v2_asm.c | 3903 ++++++++--------- portable/GCC/ARM_CM23/non_secure/port.c | 877 ++-- portable/GCC/ARM_CM23/non_secure/portasm.c | 932 ++-- .../GCC/ARM_CM23/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.c | 3903 ++++++++--------- portable/GCC/ARM_CM23_NTZ/non_secure/port.c | 877 ++-- .../GCC/ARM_CM23_NTZ/non_secure/portasm.c | 754 ++-- .../ARM_CM23_NTZ/non_secure/portmacrocommon.h | 13 +- .../ARM_CM33/non_secure/mpu_wrappers_v2_asm.c | 3763 ++++++++-------- portable/GCC/ARM_CM33/non_secure/port.c | 877 ++-- portable/GCC/ARM_CM33/non_secure/portasm.c | 862 ++-- .../GCC/ARM_CM33/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.c | 3763 ++++++++-------- portable/GCC/ARM_CM33_NTZ/non_secure/port.c | 877 ++-- .../GCC/ARM_CM33_NTZ/non_secure/portasm.c | 694 ++- .../ARM_CM33_NTZ/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.c | 3763 ++++++++-------- portable/GCC/ARM_CM35P/non_secure/port.c | 877 ++-- portable/GCC/ARM_CM35P/non_secure/portasm.c | 862 ++-- .../ARM_CM35P/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.c | 3763 ++++++++-------- portable/GCC/ARM_CM35P_NTZ/non_secure/port.c | 877 ++-- .../GCC/ARM_CM35P_NTZ/non_secure/portasm.c | 694 ++- .../non_secure/portmacrocommon.h | 13 +- .../GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c | 3762 ++++++++-------- portable/GCC/ARM_CM3_MPU/port.c | 856 ++-- portable/GCC/ARM_CM3_MPU/portmacro.h | 10 +- .../GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c | 3762 ++++++++-------- portable/GCC/ARM_CM4_MPU/port.c | 970 ++-- portable/GCC/ARM_CM4_MPU/portmacro.h | 10 +- .../ARM_CM55/non_secure/mpu_wrappers_v2_asm.c | 3763 ++++++++-------- portable/GCC/ARM_CM55/non_secure/port.c | 877 ++-- portable/GCC/ARM_CM55/non_secure/portasm.c | 862 ++-- .../GCC/ARM_CM55/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.c | 3763 ++++++++-------- portable/GCC/ARM_CM55_NTZ/non_secure/port.c | 877 ++-- .../GCC/ARM_CM55_NTZ/non_secure/portasm.c | 694 ++- .../ARM_CM55_NTZ/non_secure/portmacrocommon.h | 13 +- .../ARM_CM85/non_secure/mpu_wrappers_v2_asm.c | 3763 ++++++++-------- portable/GCC/ARM_CM85/non_secure/port.c | 877 ++-- portable/GCC/ARM_CM85/non_secure/portasm.c | 862 ++-- .../GCC/ARM_CM85/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.c | 3763 ++++++++-------- portable/GCC/ARM_CM85_NTZ/non_secure/port.c | 877 ++-- .../GCC/ARM_CM85_NTZ/non_secure/portasm.c | 694 ++- .../ARM_CM85_NTZ/non_secure/portmacrocommon.h | 13 +- .../ARM_CM23/non_secure/mpu_wrappers_v2_asm.S | 384 +- portable/IAR/ARM_CM23/non_secure/port.c | 877 ++-- portable/IAR/ARM_CM23/non_secure/portasm.s | 26 +- .../IAR/ARM_CM23/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.S | 384 +- portable/IAR/ARM_CM23_NTZ/non_secure/port.c | 877 ++-- .../IAR/ARM_CM23_NTZ/non_secure/portasm.s | 22 +- .../ARM_CM23_NTZ/non_secure/portmacrocommon.h | 13 +- .../ARM_CM33/non_secure/mpu_wrappers_v2_asm.S | 384 +- portable/IAR/ARM_CM33/non_secure/port.c | 877 ++-- portable/IAR/ARM_CM33/non_secure/portasm.s | 22 +- .../IAR/ARM_CM33/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.S | 384 +- portable/IAR/ARM_CM33_NTZ/non_secure/port.c | 877 ++-- .../IAR/ARM_CM33_NTZ/non_secure/portasm.s | 18 +- .../ARM_CM33_NTZ/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.S | 384 +- portable/IAR/ARM_CM35P/non_secure/port.c | 877 ++-- portable/IAR/ARM_CM35P/non_secure/portasm.s | 22 +- .../ARM_CM35P/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.S | 384 +- portable/IAR/ARM_CM35P_NTZ/non_secure/port.c | 877 ++-- .../IAR/ARM_CM35P_NTZ/non_secure/portasm.s | 18 +- .../non_secure/portmacrocommon.h | 13 +- .../IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S | 384 +- portable/IAR/ARM_CM4F_MPU/port.c | 596 ++- portable/IAR/ARM_CM4F_MPU/portasm.s | 19 +- portable/IAR/ARM_CM4F_MPU/portmacro.h | 10 +- .../ARM_CM55/non_secure/mpu_wrappers_v2_asm.S | 384 +- portable/IAR/ARM_CM55/non_secure/port.c | 877 ++-- portable/IAR/ARM_CM55/non_secure/portasm.s | 22 +- .../IAR/ARM_CM55/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.S | 384 +- portable/IAR/ARM_CM55_NTZ/non_secure/port.c | 877 ++-- .../IAR/ARM_CM55_NTZ/non_secure/portasm.s | 18 +- .../ARM_CM55_NTZ/non_secure/portmacrocommon.h | 13 +- .../ARM_CM85/non_secure/mpu_wrappers_v2_asm.S | 384 +- portable/IAR/ARM_CM85/non_secure/port.c | 877 ++-- portable/IAR/ARM_CM85/non_secure/portasm.s | 22 +- .../IAR/ARM_CM85/non_secure/portmacrocommon.h | 13 +- .../non_secure/mpu_wrappers_v2_asm.S | 384 +- portable/IAR/ARM_CM85_NTZ/non_secure/port.c | 877 ++-- .../IAR/ARM_CM85_NTZ/non_secure/portasm.s | 18 +- .../ARM_CM85_NTZ/non_secure/portmacrocommon.h | 13 +- .../RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c | 409 +- portable/RVDS/ARM_CM4_MPU/port.c | 610 ++- portable/RVDS/ARM_CM4_MPU/portmacro.h | 10 +- 115 files changed, 46168 insertions(+), 54704 deletions(-) create mode 100644 include/mpu_syscall_numbers.h mode change 100755 => 100644 portable/GCC/ARM_CM3_MPU/port.c mode change 100755 => 100644 portable/GCC/ARM_CM4_MPU/port.c mode change 100755 => 100644 portable/IAR/ARM_CM4F_MPU/port.c mode change 100755 => 100644 portable/RVDS/ARM_CM4_MPU/port.c diff --git a/.github/workflows/unit-tests.yml b/.github/workflows/unit-tests.yml index 73e1808fa..c471c5b13 100644 --- a/.github/workflows/unit-tests.yml +++ b/.github/workflows/unit-tests.yml @@ -8,7 +8,7 @@ jobs: - name: Checkout Parent Repository uses: actions/checkout@v2 with: - ref: main + ref: 80db00d98bfac8b22289a2668d9e6b0265946d24 repository: FreeRTOS/FreeRTOS submodules: 'recursive' fetch-depth: 1 diff --git a/include/mpu_prototypes.h b/include/mpu_prototypes.h index 3183bae10..40a9441e3 100644 --- a/include/mpu_prototypes.h +++ b/include/mpu_prototypes.h @@ -38,6 +38,42 @@ #ifndef MPU_PROTOTYPES_H #define MPU_PROTOTYPES_H +typedef struct xTaskGenericNotifyParams +{ + TaskHandle_t xTaskToNotify; + UBaseType_t uxIndexToNotify; + uint32_t ulValue; + eNotifyAction eAction; + uint32_t * pulPreviousNotificationValue; +} xTaskGenericNotifyParams_t; + +typedef struct xTaskGenericNotifyWaitParams +{ + UBaseType_t uxIndexToWaitOn; + uint32_t ulBitsToClearOnEntry; + uint32_t ulBitsToClearOnExit; + uint32_t * pulNotificationValue; + TickType_t xTicksToWait; +} xTaskGenericNotifyWaitParams_t; + +typedef struct xTimerGenericCommandParams +{ + TimerHandle_t xTimer; + BaseType_t xCommandID; + TickType_t xOptionalValue; + BaseType_t * pxHigherPriorityTaskWoken; + TickType_t xTicksToWait; +} xTimerGenericCommandParams_t; + +typedef struct xEventGroupWaitBitsParams +{ + EventGroupHandle_t xEventGroup; + EventBits_t uxBitsToWaitFor; + BaseType_t xClearOnExit; + BaseType_t xWaitForAllBits; + TickType_t xTicksToWait; +} xEventGroupWaitBitsParams_t; + /* MPU versions of task.h API functions. */ void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, @@ -77,11 +113,13 @@ BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t * pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t * pulNotificationValue, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) FREERTOS_SYSTEM_CALL; uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; @@ -228,9 +266,10 @@ BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) FREERTOS_SYSTEM_CALL; const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL; + const BaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; @@ -259,6 +298,7 @@ EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) FREERTOS_SYSTEM_CALL; EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL; EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, diff --git a/include/mpu_syscall_numbers.h b/include/mpu_syscall_numbers.h new file mode 100644 index 000000000..b056d0e54 --- /dev/null +++ b/include/mpu_syscall_numbers.h @@ -0,0 +1,106 @@ +/* + * FreeRTOS Kernel V10.6.1 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef MPU_SYSCALL_NUMBERS_H +#define MPU_SYSCALL_NUMBERS_H + +/* Numbers assigned to various system calls. */ +#define SYSTEM_CALL_xTaskGenericNotify 0 +#define SYSTEM_CALL_xTaskGenericNotifyWait 1 +#define SYSTEM_CALL_xTimerGenericCommand 2 +#define SYSTEM_CALL_xEventGroupWaitBits 3 +#define SYSTEM_CALL_xTaskDelayUntil 4 +#define SYSTEM_CALL_xTaskAbortDelay 5 +#define SYSTEM_CALL_vTaskDelay 6 +#define SYSTEM_CALL_uxTaskPriorityGet 7 +#define SYSTEM_CALL_eTaskGetState 8 +#define SYSTEM_CALL_vTaskGetInfo 9 +#define SYSTEM_CALL_xTaskGetIdleTaskHandle 10 +#define SYSTEM_CALL_vTaskSuspend 11 +#define SYSTEM_CALL_vTaskResume 12 +#define SYSTEM_CALL_xTaskGetTickCount 13 +#define SYSTEM_CALL_uxTaskGetNumberOfTasks 14 +#define SYSTEM_CALL_pcTaskGetName 15 +#define SYSTEM_CALL_ulTaskGetRunTimeCounter 16 +#define SYSTEM_CALL_ulTaskGetRunTimePercent 17 +#define SYSTEM_CALL_ulTaskGetIdleRunTimePercent 18 +#define SYSTEM_CALL_ulTaskGetIdleRunTimeCounter 19 +#define SYSTEM_CALL_vTaskSetApplicationTaskTag 20 +#define SYSTEM_CALL_xTaskGetApplicationTaskTag 21 +#define SYSTEM_CALL_vTaskSetThreadLocalStoragePointer 22 +#define SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer 23 +#define SYSTEM_CALL_uxTaskGetSystemState 24 +#define SYSTEM_CALL_uxTaskGetStackHighWaterMark 25 +#define SYSTEM_CALL_uxTaskGetStackHighWaterMark2 26 +#define SYSTEM_CALL_xTaskGetCurrentTaskHandle 27 +#define SYSTEM_CALL_xTaskGetSchedulerState 28 +#define SYSTEM_CALL_vTaskSetTimeOutState 29 +#define SYSTEM_CALL_xTaskCheckForTimeOut 30 +#define SYSTEM_CALL_ulTaskGenericNotifyTake 31 +#define SYSTEM_CALL_xTaskGenericNotifyStateClear 32 +#define SYSTEM_CALL_ulTaskGenericNotifyValueClear 33 +#define SYSTEM_CALL_xQueueGenericSend 34 +#define SYSTEM_CALL_uxQueueMessagesWaiting 35 +#define SYSTEM_CALL_uxQueueSpacesAvailable 36 +#define SYSTEM_CALL_xQueueReceive 37 +#define SYSTEM_CALL_xQueuePeek 38 +#define SYSTEM_CALL_xQueueSemaphoreTake 39 +#define SYSTEM_CALL_xQueueGetMutexHolder 40 +#define SYSTEM_CALL_xQueueTakeMutexRecursive 41 +#define SYSTEM_CALL_xQueueGiveMutexRecursive 42 +#define SYSTEM_CALL_xQueueSelectFromSet 43 +#define SYSTEM_CALL_xQueueAddToSet 44 +#define SYSTEM_CALL_vQueueAddToRegistry 45 +#define SYSTEM_CALL_vQueueUnregisterQueue 46 +#define SYSTEM_CALL_pcQueueGetName 47 +#define SYSTEM_CALL_pvTimerGetTimerID 48 +#define SYSTEM_CALL_vTimerSetTimerID 49 +#define SYSTEM_CALL_xTimerIsTimerActive 50 +#define SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle 51 +#define SYSTEM_CALL_pcTimerGetName 52 +#define SYSTEM_CALL_vTimerSetReloadMode 53 +#define SYSTEM_CALL_xTimerGetReloadMode 54 +#define SYSTEM_CALL_uxTimerGetReloadMode 55 +#define SYSTEM_CALL_xTimerGetPeriod 56 +#define SYSTEM_CALL_xTimerGetExpiryTime 57 +#define SYSTEM_CALL_xEventGroupClearBits 58 +#define SYSTEM_CALL_xEventGroupSetBits 59 +#define SYSTEM_CALL_xEventGroupSync 60 +#define SYSTEM_CALL_uxEventGroupGetNumber 61 +#define SYSTEM_CALL_vEventGroupSetNumber 62 +#define SYSTEM_CALL_xStreamBufferSend 63 +#define SYSTEM_CALL_xStreamBufferReceive 64 +#define SYSTEM_CALL_xStreamBufferIsFull 65 +#define SYSTEM_CALL_xStreamBufferIsEmpty 66 +#define SYSTEM_CALL_xStreamBufferSpacesAvailable 67 +#define SYSTEM_CALL_xStreamBufferBytesAvailable 68 +#define SYSTEM_CALL_xStreamBufferSetTriggerLevel 69 +#define SYSTEM_CALL_xStreamBufferNextMessageLengthBytes 70 +#define NUM_SYSTEM_CALLS 71 /* Total number of system calls. */ + +#endif /* MPU_SYSCALL_NUMBERS_H */ diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c index 270ee5eda..4323feffe 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c @@ -38,2382 +38,2139 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index ed3d71608..dc1d60d43 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -36,6 +36,9 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE @@ -46,133 +49,133 @@ #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ - " movs r3, #5 \n" /* r3 = 5. */ - " str r3, [r1] \n" /* Program RNR = 5. */ - " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ - " movs r3, #6 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 6. */ - " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ - " movs r3, #7 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 7. */ - " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " subs r2, #20 \n" - " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ - " subs r2, #20 \n" - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " mov lr, r6 \n" - " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " \n" - " restore_general_regs_first_task: \n" - " subs r2, #32 \n" - " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ - " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ - " subs r2, #48 \n" - " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ - " mov r8, r4 \n" /* r8 = r4. */ - " mov r9, r5 \n" /* r9 = r5. */ - " mov r10, r6 \n" /* r10 = r6. */ - " mov r11, r7 \n" /* r11 = r7. */ - " subs r2, #32 \n" - " ldmia r2!, {r4-r7} \n" /* Restore r4-r7. */ - " subs r2, #16 \n" - " \n" - " restore_context_done_first_task: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xSecureContextConst2: .word xSecureContext \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ + " movs r3, #5 \n" /* r3 = 5. */ + " str r3, [r1] \n" /* Program RNR = 5. */ + " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ + " movs r3, #6 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 6. */ + " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ + " movs r3, #7 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 7. */ + " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " subs r2, #20 \n" + " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ + " subs r2, #20 \n" + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " mov lr, r6 \n" + " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " \n" + " restore_general_regs_first_task: \n" + " subs r2, #32 \n" + " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ + " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ + " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " subs r2, #48 \n" + " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " subs r2, #32 \n" + " ldmia r2!, {r4-r7} \n" /* Restore r4-r7. */ + " subs r2, #16 \n" + " \n" + " restore_context_done_first_task: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xSecureContextConst2: .word xSecureContext \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r3, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r3] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ - " ldr r4, xSecureContextConst2 \n" - " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " bx r3 \n"/* Finally, branch to EXC_RETURN. */ - " \n" - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - "xSecureContextConst2: .word xSecureContext \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ + " ldr r4, xSecureContextConst2 \n" + " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " bx r3 \n" /* Finally, branch to EXC_RETURN. */ + " \n" + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + "xSecureContextConst2: .word xSecureContext \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -183,15 +186,15 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " movs r1, #1 \n"/* r1 = 1. */ - " tst r0, r1 \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */ - " beq running_privileged \n"/* If the result of previous AND operation was 0, branch. */ - " movs r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " bx lr \n"/* Return. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " movs r1, #1 \n" /* r1 = 1. */ + " tst r0, r1 \n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */ + " beq running_privileged \n" /* If the result of previous AND operation was 0, branch. */ + " movs r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " bx lr \n" /* Return. */ " running_privileged: \n" - " movs r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movs r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "r1", "memory" @@ -205,11 +208,11 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " movs r1, #1 \n"/* r1 = 1. */ - " bics r0, r1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "r1", "memory" ); } @@ -221,11 +224,11 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " movs r1, #1 \n"/* r1 = 1. */ - " orrs r0, r1 \n"/* r0 = r0 | r1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* r0 = r0 | r1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "r1", "memory" ); } @@ -237,14 +240,14 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -283,328 +286,323 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/ - " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ - " \n" - " cbz r0, save_ns_context \n" /* No secure context to save. */ - " save_s_context: \n" - " push {r0-r2, lr} \n" - " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r3} \n" /* LR is now in r3. */ - " mov lr, r3 \n" /* Restore LR. */ - " \n" - " save_ns_context: \n" - " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ - " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " save_general_regs: \n" - " mrs r3, psp \n" - " stmia r2!, {r4-r7} \n" /* Store r4-r7. */ - " mov r4, r8 \n" /* r4 = r8. */ - " mov r5, r9 \n" /* r5 = r9. */ - " mov r6, r10 \n" /* r6 = r10. */ - " mov r7, r11 \n" /* r7 = r11. */ - " stmia r2!, {r4-r7} \n" /* Store r8-r11. */ - " ldmia r3!, {r4-r7} \n" /* Copy half of the hardware saved context into r4-r7. */ - " stmia r2!, {r4-r7} \n" /* Store the hardware saved context. */ - " ldmia r3!, {r4-r7} \n" /* Copy rest half of the hardware saved context into r4-r7. */ - " stmia r2!, {r4-r7} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psp \n" /* r3 = PSP. */ - " mrs r4, psplim \n" /* r4 = PSPLIM. */ - " mrs r5, control \n" /* r5 = CONTROL. */ - " mov r6, lr \n" /* r6 = LR. */ - " stmia r2!, {r0, r3-r6} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " cpsid i \n" - " bl vTaskSwitchContext \n" - " cpsie i \n" - " \n" - " program_mpu: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ - " movs r3, #5 \n" /* r3 = 5. */ - " str r3, [r1] \n" /* Program RNR = 5. */ - " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ - " movs r3, #6 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 6. */ - " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ - " movs r3, #7 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 7. */ - " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " subs r2, #20 \n" - " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ - " subs r2, #20 \n" - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " mov lr, r6 \n" - " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " cbz r0, restore_ns_context \n" /* No secure context to restore. */ - " \n" - " restore_s_context: \n" - " push {r1-r3, lr} \n" - " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r1-r4} \n" /* LR is now in r4. */ - " mov lr, r4 \n" - " \n" - " restore_ns_context: \n" - " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ - " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " restore_general_regs: \n" - " subs r2, #32 \n" - " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ - " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ - " subs r2, #48 \n" - " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ - " mov r8, r4 \n" /* r8 = r4. */ - " mov r9, r5 \n" /* r9 = r5. */ - " mov r10, r6 \n" /* r10 = r6. */ - " mov r11, r7 \n" /* r11 = r7. */ - " subs r2, #32 \n" - " ldmia r2!, {r4-r7} \n" /* Restore r4-r7. */ - " subs r2, #16 \n" - " \n" - " restore_context_done: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xSecureContextConst: .word xSecureContext \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/ + " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " save_s_context: \n" + " push {r0-r2, lr} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r3} \n" /* LR is now in r3. */ + " mov lr, r3 \n" /* Restore LR. */ + " \n" + " save_ns_context: \n" + " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ + " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " save_general_regs: \n" + " mrs r3, psp \n" + " stmia r2!, {r4-r7} \n" /* Store r4-r7. */ + " mov r4, r8 \n" /* r4 = r8. */ + " mov r5, r9 \n" /* r5 = r9. */ + " mov r6, r10 \n" /* r6 = r10. */ + " mov r7, r11 \n" /* r7 = r11. */ + " stmia r2!, {r4-r7} \n" /* Store r8-r11. */ + " ldmia r3!, {r4-r7} \n" /* Copy half of the hardware saved context into r4-r7. */ + " stmia r2!, {r4-r7} \n" /* Store the hardware saved context. */ + " ldmia r3!, {r4-r7} \n" /* Copy rest half of the hardware saved context into r4-r7. */ + " stmia r2!, {r4-r7} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psp \n" /* r3 = PSP. */ + " mrs r4, psplim \n" /* r4 = PSPLIM. */ + " mrs r5, control \n" /* r5 = CONTROL. */ + " mov r6, lr \n" /* r6 = LR. */ + " stmia r2!, {r0, r3-r6} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " cpsid i \n" + " bl vTaskSwitchContext \n" + " cpsie i \n" + " \n" + " program_mpu: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ + " movs r3, #5 \n" /* r3 = 5. */ + " str r3, [r1] \n" /* Program RNR = 5. */ + " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ + " movs r3, #6 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 6. */ + " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ + " movs r3, #7 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 7. */ + " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " subs r2, #20 \n" + " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ + " subs r2, #20 \n" + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " mov lr, r6 \n" + " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " cbz r0, restore_ns_context \n" /* No secure context to restore. */ + " \n" + " restore_s_context: \n" + " push {r1-r3, lr} \n" + " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r1-r4} \n" /* LR is now in r4. */ + " mov lr, r4 \n" + " \n" + " restore_ns_context: \n" + " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ + " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " restore_general_regs: \n" + " subs r2, #32 \n" + " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ + " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ + " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " subs r2, #48 \n" + " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " subs r2, #32 \n" + " ldmia r2!, {r4-r7} \n" /* Restore r4-r7. */ + " subs r2, #16 \n" + " \n" + " restore_context_done: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xSecureContextConst: .word xSecureContext \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/ - " mrs r2, psp \n"/* Read PSP in r2. */ - " \n" - " cbz r0, save_ns_context \n"/* No secure context to save. */ - " push {r0-r2, r14} \n" - " bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r3} \n"/* LR is now in r3. */ - " mov lr, r3 \n"/* LR = r3. */ - " lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " b select_next_task \n" - " \n" - " save_ns_context: \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r2!, {r0, r1, r3-r7} \n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ - " mov r4, r8 \n"/* r4 = r8. */ - " mov r5, r9 \n"/* r5 = r9. */ - " mov r6, r10 \n"/* r6 = r10. */ - " mov r7, r11 \n"/* r7 = r11. */ - " stmia r2!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ - " \n" - " select_next_task: \n" - " cpsid i \n" - " bl vTaskSwitchContext \n" - " cpsie i \n" - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ - " \n" - " ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ - " mov lr, r4 \n"/* LR = r4. */ - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r3] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " push {r2, r4} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r2, r4} \n" - " mov lr, r4 \n"/* LR = r4. */ - " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " restore_ns_context: \n" - " adds r2, r2, #16 \n"/* Move to the high registers. */ - " ldmia r2!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */ - " mov r8, r4 \n"/* r8 = r4. */ - " mov r9, r5 \n"/* r9 = r5. */ - " mov r10, r6 \n"/* r10 = r6. */ - " mov r11, r7 \n"/* r11 = r7. */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " subs r2, r2, #32 \n"/* Go back to the low registers. */ - " ldmia r2!, {r4-r7} \n"/* Restore the low registers that are not automatically restored. */ - " bx lr \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - "xSecureContextConst: .word xSecureContext \n" - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/ + " mrs r2, psp \n" /* Read PSP in r2. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " push {r0-r2, r14} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r3} \n" /* LR is now in r3. */ + " mov lr, r3 \n" /* LR = r3. */ + " lsls r1, r3, #25 \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl save_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " b select_next_task \n" + " \n" + " save_ns_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3-r7} \n" /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ + " mov r4, r8 \n" /* r4 = r8. */ + " mov r5, r9 \n" /* r5 = r9. */ + " mov r6, r10 \n" /* r6 = r10. */ + " mov r7, r11 \n" /* r7 = r11. */ + " stmia r2!, {r4-r7} \n" /* Store the high registers that are not saved automatically. */ + " \n" + " select_next_task: \n" + " cpsid i \n" + " bl vTaskSwitchContext \n" + " cpsie i \n" + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ + " \n" + " ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + " msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ + " mov lr, r4 \n" /* LR = r4. */ + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n" /* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n" /* LR = r4. */ + " lsls r1, r4, #25 \n" /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " restore_ns_context: \n" + " adds r2, r2, #16 \n" /* Move to the high registers. */ + " ldmia r2!, {r4-r7} \n" /* Restore the high registers that are not automatically restored. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " subs r2, r2, #32 \n" /* Go back to the low registers. */ + " ldmia r2!, {r4-r7} \n" /* Restore the low registers that are not automatically restored. */ + " bx lr \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + "xSecureContextConst: .word xSecureContext \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "movs r0, #4 \n" - "mov r1, lr \n" - "tst r0, r1 \n" - "beq stack_on_msp \n" - "stack_on_psp: \n" - " mrs r0, psp \n" - " b route_svc \n" - "stack_on_msp: \n" - " mrs r0, msp \n" - " b route_svc \n" - " \n" - "route_svc: \n" - " ldr r2, [r0, #24] \n" - " subs r2, #2 \n" - " ldrb r3, [r2, #0] \n" - " cmp r3, %0 \n" - " beq system_call_enter \n" - " cmp r3, %1 \n" - " beq system_call_enter_1 \n" - " cmp r3, %2 \n" - " beq system_call_exit \n" - " b vPortSVCHandler_C \n" - " \n" - "system_call_enter: \n" - " b vSystemCallEnter \n" - "system_call_enter_1: \n" - " b vSystemCallEnter_1 \n" - "system_call_exit: \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "r3", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "movs r0, #4 \n" + "mov r1, lr \n" + "tst r0, r1 \n" + "beq stack_on_msp \n" + "stack_on_psp: \n" + " mrs r0, psp \n" + " b route_svc \n" + "stack_on_msp: \n" + " mrs r0, msp \n" + " b route_svc \n" + " \n" + "route_svc: \n" + " ldr r3, [r0, #24] \n" + " subs r3, #2 \n" + " ldrb r2, [r3, #0] \n" + " cmp r2, %0 \n" + " blt system_call_enter \n" + " cmp r2, %1 \n" + " beq system_call_exit \n" + " b vPortSVCHandler_C \n" + " \n" + "system_call_enter: \n" + " b vSystemCallEnter \n" + "system_call_exit: \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "r3", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " movs r0, #4 \n" - " mov r1, lr \n" - " tst r0, r1 \n" - " beq stacking_used_msp \n" - " mrs r0, psp \n" - " ldr r2, svchandler_address_const \n" - " bx r2 \n" - " stacking_used_msp: \n" - " mrs r0, msp \n" - " ldr r2, svchandler_address_const \n" - " bx r2 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " movs r0, #4 \n" + " mov r1, lr \n" + " tst r0, r1 \n" + " beq stacking_used_msp \n" + " mrs r0, psp \n" + " ldr r2, svchandler_address_const \n" + " bx r2 \n" + " stacking_used_msp: \n" + " mrs r0, msp \n" + " ldr r2, svchandler_address_const \n" + " bx r2 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -615,8 +613,8 @@ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ ( ( " .syntax unified \n" " \n" - " svc %0 \n"/* Secure context is allocated in the supervisor call. */ - " bx lr \n"/* Return. */ + " svc %0 \n" /* Secure context is allocated in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory" ); } @@ -628,14 +626,14 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR ( " .syntax unified \n" " \n" - " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ - " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ - " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ - " bne free_secure_context \n"/* Branch if r1 != 0. */ - " bx lr \n"/* There is no secure context (xSecureContext is NULL). */ + " ldr r2, [r0] \n" /* The first item in the TCB is the top of the stack. */ + " ldr r1, [r2] \n" /* The first item on the stack is the task's xSecureContext. */ + " cmp r1, #0 \n" /* Raise svc if task's xSecureContext is not NULL. */ + " bne free_secure_context \n" /* Branch if r1 != 0. */ + " bx lr \n" /* There is no secure context (xSecureContext is NULL). */ " free_secure_context: \n" - " svc %0 \n"/* Secure context is freed in the supervisor call. */ - " bx lr \n"/* Return. */ + " svc %0 \n" /* Secure context is freed in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory" ); } diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c index 270ee5eda..4323feffe 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c @@ -38,2382 +38,2139 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c index f378341cf..a6ab28b6b 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c @@ -36,6 +36,9 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE @@ -46,127 +49,127 @@ #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ - " movs r3, #5 \n" /* r3 = 5. */ - " str r3, [r1] \n" /* Program RNR = 5. */ - " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ - " movs r3, #6 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 6. */ - " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ - " movs r3, #7 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 7. */ - " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " subs r1, #16 \n" - " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ - " subs r1, #16 \n" - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " mov lr, r5 \n" - " \n" - " restore_general_regs_first_task: \n" - " subs r1, #32 \n" - " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ - " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ - " subs r1, #48 \n" - " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ - " mov r8, r4 \n" /* r8 = r4. */ - " mov r9, r5 \n" /* r9 = r5. */ - " mov r10, r6 \n" /* r10 = r6. */ - " mov r11, r7 \n" /* r11 = r7. */ - " subs r1, #32 \n" - " ldmia r1!, {r4-r7} \n" /* Restore r4-r7. */ - " subs r1, #16 \n" - " \n" - " restore_context_done_first_task: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ + " movs r3, #5 \n" /* r3 = 5. */ + " str r3, [r1] \n" /* Program RNR = 5. */ + " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ + " movs r3, #6 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 6. */ + " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ + " movs r3, #7 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 7. */ + " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " subs r1, #16 \n" + " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ + " subs r1, #16 \n" + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " mov lr, r5 \n" + " \n" + " restore_general_regs_first_task: \n" + " subs r1, #32 \n" + " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ + " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ + " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " subs r1, #48 \n" + " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " subs r1, #32 \n" + " ldmia r1!, {r4-r7} \n" /* Restore r4-r7. */ + " subs r1, #16 \n" + " \n" + " restore_context_done_first_task: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r2} \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ - " msr psplim, r1 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " bx r2 \n"/* Finally, branch to EXC_RETURN. */ - " \n" - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ + " msr psplim, r1 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " bx r2 \n" /* Finally, branch to EXC_RETURN. */ + " \n" + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -177,15 +180,15 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " movs r1, #1 \n"/* r1 = 1. */ - " tst r0, r1 \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */ - " beq running_privileged \n"/* If the result of previous AND operation was 0, branch. */ - " movs r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " bx lr \n"/* Return. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " movs r1, #1 \n" /* r1 = 1. */ + " tst r0, r1 \n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */ + " beq running_privileged \n" /* If the result of previous AND operation was 0, branch. */ + " movs r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " bx lr \n" /* Return. */ " running_privileged: \n" - " movs r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movs r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "r1", "memory" @@ -199,11 +202,11 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " movs r1, #1 \n"/* r1 = 1. */ - " bics r0, r1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "r1", "memory" ); } @@ -215,11 +218,11 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " movs r1, #1 \n"/* r1 = 1. */ - " orrs r0, r1 \n"/* r0 = r0 | r1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* r0 = r0 | r1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "r1", "memory" ); } @@ -231,14 +234,14 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -277,254 +280,249 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ - " mrs r2, psp \n" /* r2 = PSP. */ - " \n" - " save_general_regs: \n" - " stmia r1!, {r4-r7} \n" /* Store r4-r7. */ - " mov r4, r8 \n" /* r4 = r8. */ - " mov r5, r9 \n" /* r5 = r9. */ - " mov r6, r10 \n" /* r6 = r10. */ - " mov r7, r11 \n" /* r7 = r11. */ - " stmia r1!, {r4-r7} \n" /* Store r8-r11. */ - " ldmia r2!, {r4-r7} \n" /* Copy half of the hardware saved context into r4-r7. */ - " stmia r1!, {r4-r7} \n" /* Store the hardware saved context. */ - " ldmia r2!, {r4-r7} \n" /* Copy rest half of the hardware saved context into r4-r7. */ - " stmia r1!, {r4-r7} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r2, psp \n" /* r2 = PSP. */ - " mrs r3, psplim \n" /* r3 = PSPLIM. */ - " mrs r4, control \n" /* r4 = CONTROL. */ - " mov r5, lr \n" /* r5 = LR. */ - " stmia r1!, {r2-r5} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " cpsid i \n" - " bl vTaskSwitchContext \n" - " cpsie i \n" - " \n" - " program_mpu: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ - " movs r3, #5 \n" /* r3 = 5. */ - " str r3, [r1] \n" /* Program RNR = 5. */ - " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ - " movs r3, #6 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 6. */ - " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ - " movs r3, #7 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 7. */ - " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " subs r1, #16 \n" - " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ - " subs r1, #16 \n" - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " mov lr, r5 \n" - " \n" - " restore_general_regs: \n" - " subs r1, #32 \n" - " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ - " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ - " subs r1, #48 \n" - " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ - " mov r8, r4 \n" /* r8 = r4. */ - " mov r9, r5 \n" /* r9 = r5. */ - " mov r10, r6 \n" /* r10 = r6. */ - " mov r11, r7 \n" /* r11 = r7. */ - " subs r1, #32 \n" - " ldmia r1!, {r4-r7} \n" /* Restore r4-r7. */ - " subs r1, #16 \n" - " \n" - " restore_context_done: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ + " mrs r2, psp \n" /* r2 = PSP. */ + " \n" + " save_general_regs: \n" + " stmia r1!, {r4-r7} \n" /* Store r4-r7. */ + " mov r4, r8 \n" /* r4 = r8. */ + " mov r5, r9 \n" /* r5 = r9. */ + " mov r6, r10 \n" /* r6 = r10. */ + " mov r7, r11 \n" /* r7 = r11. */ + " stmia r1!, {r4-r7} \n" /* Store r8-r11. */ + " ldmia r2!, {r4-r7} \n" /* Copy half of the hardware saved context into r4-r7. */ + " stmia r1!, {r4-r7} \n" /* Store the hardware saved context. */ + " ldmia r2!, {r4-r7} \n" /* Copy rest half of the hardware saved context into r4-r7. */ + " stmia r1!, {r4-r7} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r2, psp \n" /* r2 = PSP. */ + " mrs r3, psplim \n" /* r3 = PSPLIM. */ + " mrs r4, control \n" /* r4 = CONTROL. */ + " mov r5, lr \n" /* r5 = LR. */ + " stmia r1!, {r2-r5} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " cpsid i \n" + " bl vTaskSwitchContext \n" + " cpsie i \n" + " \n" + " program_mpu: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ + " movs r3, #5 \n" /* r3 = 5. */ + " str r3, [r1] \n" /* Program RNR = 5. */ + " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ + " movs r3, #6 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 6. */ + " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ + " movs r3, #7 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 7. */ + " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " subs r1, #16 \n" + " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ + " subs r1, #16 \n" + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " mov lr, r5 \n" + " \n" + " restore_general_regs: \n" + " subs r1, #32 \n" + " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ + " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ + " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " subs r1, #48 \n" + " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " subs r1, #32 \n" + " ldmia r1!, {r4-r7} \n" /* Restore r4-r7. */ + " subs r1, #16 \n" + " \n" + " restore_context_done: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " mrs r0, psp \n"/* Read PSP in r0. */ - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " subs r0, r0, #40 \n"/* Make space for PSPLIM, LR and the remaining registers on the stack. */ - " str r0, [r1] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r0!, {r2-r7} \n"/* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */ - " mov r4, r8 \n"/* r4 = r8. */ - " mov r5, r9 \n"/* r5 = r9. */ - " mov r6, r10 \n"/* r6 = r10. */ - " mov r7, r11 \n"/* r7 = r11. */ - " stmia r0!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ - " \n" - " cpsid i \n" - " bl vTaskSwitchContext \n" - " cpsie i \n" - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ - " \n" - " adds r0, r0, #24 \n"/* Move to the high registers. */ - " ldmia r0!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */ - " mov r8, r4 \n"/* r8 = r4. */ - " mov r9, r5 \n"/* r9 = r5. */ - " mov r10, r6 \n"/* r10 = r6. */ - " mov r11, r7 \n"/* r11 = r7. */ - " msr psp, r0 \n"/* Remember the new top of stack for the task. */ - " subs r0, r0, #40 \n"/* Move to the starting of the saved context. */ - " ldmia r0!, {r2-r7} \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */ - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " bx r3 \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " mrs r0, psp \n" /* Read PSP in r0. */ + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " subs r0, r0, #40 \n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */ + " str r0, [r1] \n" /* Save the new top of stack in TCB. */ + " mrs r2, psplim \n" /* r2 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmia r0!, {r2-r7} \n" /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */ + " mov r4, r8 \n" /* r4 = r8. */ + " mov r5, r9 \n" /* r5 = r9. */ + " mov r6, r10 \n" /* r6 = r10. */ + " mov r7, r11 \n" /* r7 = r11. */ + " stmia r0!, {r4-r7} \n" /* Store the high registers that are not saved automatically. */ + " \n" + " cpsid i \n" + " bl vTaskSwitchContext \n" + " cpsie i \n" + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ + " \n" + " adds r0, r0, #24 \n" /* Move to the high registers. */ + " ldmia r0!, {r4-r7} \n" /* Restore the high registers that are not automatically restored. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " msr psp, r0 \n" /* Remember the new top of stack for the task. */ + " subs r0, r0, #40 \n" /* Move to the starting of the saved context. */ + " ldmia r0!, {r2-r7} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */ + " msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ + " bx r3 \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "movs r0, #4 \n" - "mov r1, lr \n" - "tst r0, r1 \n" - "beq stack_on_msp \n" - "stack_on_psp: \n" - " mrs r0, psp \n" - " b route_svc \n" - "stack_on_msp: \n" - " mrs r0, msp \n" - " b route_svc \n" - " \n" - "route_svc: \n" - " ldr r2, [r0, #24] \n" - " subs r2, #2 \n" - " ldrb r3, [r2, #0] \n" - " cmp r3, %0 \n" - " beq system_call_enter \n" - " cmp r3, %1 \n" - " beq system_call_enter_1 \n" - " cmp r3, %2 \n" - " beq system_call_exit \n" - " b vPortSVCHandler_C \n" - " \n" - "system_call_enter: \n" - " b vSystemCallEnter \n" - "system_call_enter_1: \n" - " b vSystemCallEnter_1 \n" - "system_call_exit: \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "r3", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "movs r0, #4 \n" + "mov r1, lr \n" + "tst r0, r1 \n" + "beq stack_on_msp \n" + "stack_on_psp: \n" + " mrs r0, psp \n" + " b route_svc \n" + "stack_on_msp: \n" + " mrs r0, msp \n" + " b route_svc \n" + " \n" + "route_svc: \n" + " ldr r3, [r0, #24] \n" + " subs r3, #2 \n" + " ldrb r2, [r3, #0] \n" + " cmp r2, %0 \n" + " blt system_call_enter \n" + " cmp r2, %1 \n" + " beq system_call_exit \n" + " b vPortSVCHandler_C \n" + " \n" + "system_call_enter: \n" + " b vSystemCallEnter \n" + "system_call_exit: \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "r3", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " movs r0, #4 \n" - " mov r1, lr \n" - " tst r0, r1 \n" - " beq stacking_used_msp \n" - " mrs r0, psp \n" - " ldr r2, svchandler_address_const \n" - " bx r2 \n" - " stacking_used_msp: \n" - " mrs r0, msp \n" - " ldr r2, svchandler_address_const \n" - " bx r2 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " movs r0, #4 \n" + " mov r1, lr \n" + " tst r0, r1 \n" + " beq stacking_used_msp \n" + " mrs r0, psp \n" + " ldr r2, svchandler_address_const \n" + " bx r2 \n" + " stacking_used_msp: \n" + " mrs r0, msp \n" + " ldr r2, svchandler_address_const \n" + " bx r2 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c index 5c01e02d6..dca4ec1e4 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2069 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c index 2f18b44c4..54de64d36 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c @@ -36,122 +36,125 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " \n" - " restore_general_regs_first_task: \n" - " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ - " \n" - " restore_context_done_first_task: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xSecureContextConst2: .word xSecureContext \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " \n" + " restore_general_regs_first_task: \n" + " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ + " \n" + " restore_context_done_first_task: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xSecureContextConst2: .word xSecureContext \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ - " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ - " ldr r4, xSecureContextConst2 \n" - " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ - " movs r1, #2 \n" /* r1 = 2. */ - " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n" /* Discard everything up to r0. */ - " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx r3 \n" /* Finally, branch to EXC_RETURN. */ - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - "xSecureContextConst2: .word xSecureContext \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ + " ldr r4, xSecureContextConst2 \n" + " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx r3 \n" /* Finally, branch to EXC_RETURN. */ + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + "xSecureContextConst2: .word xSecureContext \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -162,12 +165,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -181,10 +184,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " bic r0, #1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " bic r0, #1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -196,10 +199,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -211,15 +214,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -235,12 +238,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT ( " .syntax unified \n" " \n" - " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */ - " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } @@ -252,10 +255,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att ( " .syntax unified \n" " \n" - " msr basepri, r0 \n"/* basepri = ulMask. */ + " msr basepri, r0 \n" /* basepri = ulMask. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -263,320 +266,313 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ - " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ - " \n" - " cbz r0, save_ns_context \n" /* No secure context to save. */ - " save_s_context: \n" - " push {r0-r2, lr} \n" - " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r2, lr} \n" - " \n" - " save_ns_context: \n" - " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ - " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " save_general_regs: \n" - " mrs r3, psp \n" - " \n" - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */ - " tst lr, #0x10 \n" - " ittt eq \n" - " vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */ - " vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ - " vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */ - " sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " stmia r2!, {r4-r11} \n" /* Store r4-r11. */ - " ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ - " stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psp \n" /* r3 = PSP. */ - " mrs r4, psplim \n" /* r4 = PSPLIM. */ - " mrs r5, control \n" /* r5 = CONTROL. */ - " stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" /* r0 = 0. */ - " msr basepri, r0 \n" /* Enable interrupts. */ - " \n" - " program_mpu: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " save_s_context: \n" + " push {r0-r2, lr} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r2, lr} \n" + " \n" + " save_ns_context: \n" + " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ + " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " save_general_regs: \n" + " mrs r3, psp \n" + " \n" + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */ + " tst lr, #0x10 \n" + " ittt eq \n" + " vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */ + " vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ + " vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */ + " sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " stmia r2!, {r4-r11} \n" /* Store r4-r11. */ + " ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ + " stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psp \n" /* r3 = PSP. */ + " mrs r4, psplim \n" /* r4 = PSPLIM. */ + " mrs r5, control \n" /* r5 = CONTROL. */ + " stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " program_mpu: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " cbz r0, restore_ns_context \n" /* No secure context to restore. */ - " \n" - " restore_s_context: \n" - " push {r1-r3, lr} \n" - " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r1-r3, lr} \n" - " \n" - " restore_ns_context: \n" - " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ - " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " restore_general_regs: \n" - " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n" - " ittt eq \n" - " vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ - " vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ - " vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " restore_context_done: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xSecureContextConst: .word xSecureContext \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " cbz r0, restore_ns_context \n" /* No secure context to restore. */ + " \n" + " restore_s_context: \n" + " push {r1-r3, lr} \n" + " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r1-r3, lr} \n" + " \n" + " restore_ns_context: \n" + " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ + " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " restore_general_regs: \n" + " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " tst lr, #0x10 \n" + " ittt eq \n" + " vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ + " vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ + " vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " restore_context_done: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xSecureContextConst: .word xSecureContext \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ - " mrs r2, psp \n"/* Read PSP in r2. */ - " \n" - " cbz r0, save_ns_context \n"/* No secure context to save. */ - " push {r0-r2, r14} \n" - " bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r3} \n"/* LR is now in r3. */ - " mov lr, r3 \n"/* LR = r3. */ - " lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB.*/ - " subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " b select_next_task \n" - " \n" - " save_ns_context: \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " mrs r2, psp \n" /* Read PSP in r2. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " push {r0-r2, r14} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r3} \n" /* LR is now in r3. */ + " mov lr, r3 \n" /* LR = r3. */ + " lsls r1, r3, #25 \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl save_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB.*/ + " subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " b select_next_task \n" + " \n" + " save_ns_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ - " it eq \n" - " vstmdbeq r2!, {s16-s31} \n"/* Store the additional FP context registers which are not saved automatically. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " it eq \n" + " vstmdbeq r2!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " adds r2, r2, #12 \n"/* r2 = r2 + 12. */ - " stm r2, {r4-r11} \n"/* Store the registers that are not saved automatically. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " subs r2, r2, #12 \n"/* r2 = r2 - 12. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n"/* r0 = 0. */ - " msr basepri, r0 \n"/* Enable interrupts. */ - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ - " \n" - " ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ - " mov lr, r4 \n"/* LR = r4. */ - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r3] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " push {r2, r4} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r2, r4} \n" - " mov lr, r4 \n"/* LR = r4. */ - " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " restore_ns_context: \n" - " ldmia r2!, {r4-r11} \n"/* Restore the registers that are not automatically restored. */ + " subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " adds r2, r2, #12 \n" /* r2 = r2 + 12. */ + " stm r2, {r4-r11} \n" /* Store the registers that are not saved automatically. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " subs r2, r2, #12 \n" /* r2 = r2 - 12. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ + " \n" + " ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + " msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ + " mov lr, r4 \n" /* LR = r4. */ + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n" /* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n" /* LR = r4. */ + " lsls r1, r4, #25 \n" /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " restore_ns_context: \n" + " ldmia r2!, {r4-r11} \n" /* Restore the registers that are not automatically restored. */ #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ - " it eq \n" - " vldmiaeq r2!, {s16-s31} \n"/* Restore the additional FP context registers which are not restored automatically. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " it eq \n" + " vldmiaeq r2!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - "xSecureContextConst: .word xSecureContext \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + "xSecureContextConst: .word xSecureContext \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq syscall_enter \n" - "cmp r2, %1 \n" - "beq syscall_enter_1 \n" - "cmp r2, %2 \n" - "beq syscall_exit \n" - "b vPortSVCHandler_C \n" - " \n" - "syscall_enter: \n" - " mov r1, lr \n" - " b vSystemCallEnter \n" - " \n" - "syscall_enter_1: \n" - " mov r1, lr \n" - " b vSystemCallEnter_1 \n" - " \n" - "syscall_exit: \n" - " mov r1, lr \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r1, [r0, #24] \n" + "ldrb r2, [r1, #-2] \n" + "cmp r2, %0 \n" + "blt syscall_enter \n" + "cmp r2, %1 \n" + "beq syscall_exit \n" + "b vPortSVCHandler_C \n" + " \n" + "syscall_enter: \n" + " mov r1, lr \n" + " b vSystemCallEnter \n" + " \n" + "syscall_exit: \n" + " mov r1, lr \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, svchandler_address_const \n" - " bx r1 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, svchandler_address_const \n" + " bx r1 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -587,8 +583,8 @@ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ ( ( " .syntax unified \n" " \n" - " svc %0 \n"/* Secure context is allocated in the supervisor call. */ - " bx lr \n"/* Return. */ + " svc %0 \n" /* Secure context is allocated in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory" ); } @@ -600,12 +596,12 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR ( " .syntax unified \n" " \n" - " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ - " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ - " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ + " ldr r2, [r0] \n" /* The first item in the TCB is the top of the stack. */ + " ldr r1, [r2] \n" /* The first item on the stack is the task's xSecureContext. */ + " cmp r1, #0 \n" /* Raise svc if task's xSecureContext is not NULL. */ " it ne \n" - " svcne %0 \n"/* Secure context is freed in the supervisor call. */ - " bx lr \n"/* Return. */ + " svcne %0 \n" /* Secure context is freed in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory" ); } diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c index 5c01e02d6..dca4ec1e4 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2069 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c index b6a86cfd2..9d5ff50fc 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c @@ -36,117 +36,120 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " \n" - " restore_general_regs_first_task: \n" - " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ - " \n" - " restore_context_done_first_task: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + #if ( configTOTAL_MPU_REGIONS == 16 ) + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + #endif /* configTOTAL_MPU_REGIONS == 16 */ + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " \n" + " restore_general_regs_first_task: \n" + " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ + " \n" + " restore_context_done_first_task: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r2} \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ - " msr psplim, r1 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ - " bx r2 \n"/* Finally, branch to EXC_RETURN. */ - " \n" - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ + " msr psplim, r1 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx r2 \n" /* Finally, branch to EXC_RETURN. */ + " \n" + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -157,12 +160,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -176,10 +179,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " bic r0, #1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " bic r0, #1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -191,10 +194,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -206,15 +209,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -230,12 +233,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT ( " .syntax unified \n" " \n" - " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */ - " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } @@ -247,10 +250,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att ( " .syntax unified \n" " \n" - " msr basepri, r0 \n"/* basepri = ulMask. */ + " msr basepri, r0 \n" /* basepri = ulMask. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -258,246 +261,239 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ - " mrs r2, psp \n" /* r2 = PSP. */ - " \n" - " save_general_regs: \n" - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " add r2, r2, #0x20 \n" /* Move r2 to location where s0 is saved. */ - " tst lr, #0x10 \n" - " ittt eq \n" - " vstmiaeq r1!, {s16-s31} \n" /* Store s16-s31. */ - " vldmiaeq r2, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ - " vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */ - " sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " stmia r1!, {r4-r11} \n" /* Store r4-r11. */ - " ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ - " stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psplim \n" /* r3 = PSPLIM. */ - " mrs r4, control \n" /* r4 = CONTROL. */ - " stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" /* r0 = 0. */ - " msr basepri, r0 \n" /* Enable interrupts. */ - " \n" - " program_mpu: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " \n" - " restore_general_regs: \n" - " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n" - " ittt eq \n" - " vldmdbeq r1!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ - " vstmiaeq r2!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ - " vldmdbeq r1!, {s16-s31} \n" /* Restore s16-s31. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " restore_context_done: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ + " mrs r2, psp \n" /* r2 = PSP. */ + " \n" + " save_general_regs: \n" + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " add r2, r2, #0x20 \n" /* Move r2 to location where s0 is saved. */ + " tst lr, #0x10 \n" + " ittt eq \n" + " vstmiaeq r1!, {s16-s31} \n" /* Store s16-s31. */ + " vldmiaeq r2, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ + " vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */ + " sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " stmia r1!, {r4-r11} \n" /* Store r4-r11. */ + " ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ + " stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psplim \n" /* r3 = PSPLIM. */ + " mrs r4, control \n" /* r4 = CONTROL. */ + " stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " program_mpu: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + #if ( configTOTAL_MPU_REGIONS == 16 ) + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + #endif /* configTOTAL_MPU_REGIONS == 16 */ + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " \n" + " restore_general_regs: \n" + " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " tst lr, #0x10 \n" + " ittt eq \n" + " vldmdbeq r1!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ + " vstmiaeq r2!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ + " vldmdbeq r1!, {s16-s31} \n" /* Restore s16-s31. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " restore_context_done: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " mrs r0, psp \n"/* Read PSP in r0. */ - " \n" + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " mrs r0, psp \n" /* Read PSP in r0. */ + " \n" #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " it eq \n" - " vstmdbeq r0!, {s16-s31} \n"/* Store the additional FP context registers which are not saved automatically. */ + " vstmdbeq r0!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmdb r0!, {r2-r11} \n"/* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " str r0, [r1] \n"/* Save the new top of stack in TCB. */ - " \n" - " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n"/* r0 = 0. */ - " msr basepri, r0 \n"/* Enable interrupts. */ - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ - " \n" - " ldmia r0!, {r2-r11} \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ - " \n" + " \n" + " mrs r2, psplim \n" /* r2 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmdb r0!, {r2-r11} \n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " str r0, [r1] \n" /* Save the new top of stack in TCB. */ + " \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ + " \n" + " ldmia r0!, {r2-r11} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ + " \n" #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst r3, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " tst r3, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " it eq \n" - " vldmiaeq r0!, {s16-s31} \n"/* Restore the additional FP context registers which are not restored automatically. */ + " vldmiaeq r0!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " msr psp, r0 \n"/* Remember the new top of stack for the task. */ - " bx r3 \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " \n" + " msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ + " msr psp, r0 \n" /* Remember the new top of stack for the task. */ + " bx r3 \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq syscall_enter \n" - "cmp r2, %1 \n" - "beq syscall_enter_1 \n" - "cmp r2, %2 \n" - "beq syscall_exit \n" - "b vPortSVCHandler_C \n" - " \n" - "syscall_enter: \n" - " mov r1, lr \n" - " b vSystemCallEnter \n" - " \n" - "syscall_enter_1: \n" - " mov r1, lr \n" - " b vSystemCallEnter_1 \n" - " \n" - "syscall_exit: \n" - " mov r1, lr \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r1, [r0, #24] \n" + "ldrb r2, [r1, #-2] \n" + "cmp r2, %0 \n" + "blt syscall_enter \n" + "cmp r2, %1 \n" + "beq syscall_exit \n" + "b vPortSVCHandler_C \n" + " \n" + "syscall_enter: \n" + " mov r1, lr \n" + " b vSystemCallEnter \n" + " \n" + "syscall_exit: \n" + " mov r1, lr \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, svchandler_address_const \n" - " bx r1 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, svchandler_address_const \n" + " bx r1 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S index ee26520b4..2ffb37043 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -57,10 +54,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -75,10 +69,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -93,10 +84,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -111,10 +99,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -129,10 +114,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -147,10 +129,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -165,10 +144,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -183,10 +159,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -201,10 +174,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -219,10 +189,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -237,10 +204,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -255,10 +219,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -273,10 +234,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -291,10 +249,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -309,10 +264,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -327,10 +279,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -345,10 +294,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -363,10 +309,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -381,10 +324,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -399,10 +339,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -417,10 +354,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -435,10 +369,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -453,10 +384,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -471,10 +399,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -489,10 +414,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -507,10 +429,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -525,14 +444,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -543,14 +459,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -561,10 +474,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -579,10 +489,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -597,10 +504,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -615,10 +519,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -633,10 +534,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -651,10 +549,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -669,10 +564,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -687,10 +579,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -705,10 +594,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -723,10 +609,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -741,10 +624,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -759,10 +639,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -777,10 +654,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -795,10 +669,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -813,10 +684,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -831,10 +699,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -849,10 +714,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -867,10 +729,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -885,10 +744,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -903,10 +759,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -921,10 +774,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -939,14 +789,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0, r1} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -959,13 +806,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0, r1} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -981,10 +825,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -999,10 +840,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -1017,10 +855,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -1035,10 +870,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -1053,10 +885,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1071,14 +900,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -1089,10 +915,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1107,10 +930,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1125,10 +945,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1143,10 +960,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1161,10 +975,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1179,10 +990,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1197,10 +1005,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1215,10 +1020,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1233,10 +1035,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1251,10 +1050,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1269,10 +1065,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1287,10 +1080,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1305,10 +1095,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1323,10 +1110,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1532,9 +1316,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s index e89a80448..16a874393 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s @@ -33,6 +33,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -45,7 +48,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN SecureContext_LoadContext #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -95,7 +97,7 @@ vResetPrivilege: /*-----------------------------------------------------------*/ vPortAllocateSecureContext: - svc 0 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */ + svc 100 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ @@ -230,7 +232,7 @@ vStartFirstTask: cpsie i /* Globally enable interrupts. */ dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -482,21 +484,17 @@ SVC_Handler: b route_svc route_svc: - ldr r2, [r0, #24] - subs r2, #2 - ldrb r3, [r2, #0] - cmp r3, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq system_call_enter - cmp r3, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq system_call_enter_1 - cmp r3, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + ldr r3, [r0, #24] + subs r3, #2 + ldrb r2, [r3, #0] + cmp r2, #NUM_SYSTEM_CALLS + blt system_call_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq system_call_exit b vPortSVCHandler_C system_call_enter: b vSystemCallEnter - system_call_enter_1: - b vSystemCallEnter_1 system_call_exit: b vSystemCallExit @@ -523,7 +521,7 @@ vPortFreeSecureContext: bne free_secure_context /* Branch if r1 != 0. */ bx lr /* There is no secure context (xSecureContext is NULL). */ free_secure_context: - svc 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */ + svc 101 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S index ee26520b4..2ffb37043 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -57,10 +54,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -75,10 +69,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -93,10 +84,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -111,10 +99,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -129,10 +114,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -147,10 +129,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -165,10 +144,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -183,10 +159,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -201,10 +174,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -219,10 +189,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -237,10 +204,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -255,10 +219,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -273,10 +234,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -291,10 +249,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -309,10 +264,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -327,10 +279,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -345,10 +294,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -363,10 +309,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -381,10 +324,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -399,10 +339,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -417,10 +354,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -435,10 +369,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -453,10 +384,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -471,10 +399,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -489,10 +414,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -507,10 +429,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -525,14 +444,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -543,14 +459,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -561,10 +474,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -579,10 +489,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -597,10 +504,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -615,10 +519,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -633,10 +534,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -651,10 +549,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -669,10 +564,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -687,10 +579,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -705,10 +594,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -723,10 +609,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -741,10 +624,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -759,10 +639,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -777,10 +654,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -795,10 +669,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -813,10 +684,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -831,10 +699,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -849,10 +714,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -867,10 +729,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -885,10 +744,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -903,10 +759,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -921,10 +774,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -939,14 +789,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0, r1} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -959,13 +806,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0, r1} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -981,10 +825,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -999,10 +840,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -1017,10 +855,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -1035,10 +870,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -1053,10 +885,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1071,14 +900,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -1089,10 +915,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1107,10 +930,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1125,10 +945,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1143,10 +960,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1161,10 +975,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1179,10 +990,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1197,10 +1005,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1215,10 +1020,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1233,10 +1035,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1251,10 +1050,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1269,10 +1065,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1287,10 +1080,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1305,10 +1095,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1323,10 +1110,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1532,9 +1316,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s index e1a10155d..082e14f3f 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -41,7 +44,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN vPortSVCHandler_C #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -216,7 +218,7 @@ vStartFirstTask: cpsie i /* Globally enable interrupts. */ dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ nop /*-----------------------------------------------------------*/ @@ -401,21 +403,17 @@ SVC_Handler: b route_svc route_svc: - ldr r2, [r0, #24] - subs r2, #2 - ldrb r3, [r2, #0] - cmp r3, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq system_call_enter - cmp r3, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq system_call_enter_1 - cmp r3, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + ldr r3, [r0, #24] + subs r3, #2 + ldrb r2, [r3, #0] + cmp r2, #NUM_SYSTEM_CALLS + blt system_call_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq system_call_exit b vPortSVCHandler_C system_call_enter: b vSystemCallEnter - system_call_enter_1: - b vSystemCallEnter_1 system_call_exit: b vSystemCallExit diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S index cbe6b4909..9ce253f73 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -56,10 +53,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -73,10 +67,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -90,10 +81,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -124,10 +109,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -141,10 +123,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -175,10 +151,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -192,10 +165,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -209,10 +179,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -243,10 +207,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0} mrs r0, control tst r0, #1 @@ -515,14 +431,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0} mrs r0, control tst r0, #1 @@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -600,10 +501,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -651,10 +543,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -668,10 +557,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -770,10 +641,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -821,10 +683,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -855,10 +711,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -908,13 +755,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -929,10 +773,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -997,10 +829,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0} mrs r0, control tst r0, #1 @@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1082,10 +899,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1133,10 +941,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s index cc8f3cb6c..372cc19bf 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -44,7 +47,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN SecureContext_LoadContext #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -86,7 +88,7 @@ vResetPrivilege: /*-----------------------------------------------------------*/ vPortAllocateSecureContext: - svc 0 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */ + svc 100 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ @@ -205,7 +207,7 @@ vStartFirstTask: cpsie f dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -455,11 +457,9 @@ SVC_Handler: ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq syscall_enter - cmp r2, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq syscall_enter_1 - cmp r2, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq syscall_exit b vPortSVCHandler_C @@ -467,10 +467,6 @@ SVC_Handler: mov r1, lr b vSystemCallEnter - syscall_enter_1: - mov r1, lr - b vSystemCallEnter_1 - syscall_exit: mov r1, lr b vSystemCallExit @@ -493,7 +489,7 @@ vPortFreeSecureContext: ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */ cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */ it ne - svcne 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */ + svcne 101 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S index cbe6b4909..9ce253f73 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -56,10 +53,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -73,10 +67,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -90,10 +81,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -124,10 +109,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -141,10 +123,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -175,10 +151,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -192,10 +165,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -209,10 +179,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -243,10 +207,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0} mrs r0, control tst r0, #1 @@ -515,14 +431,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0} mrs r0, control tst r0, #1 @@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -600,10 +501,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -651,10 +543,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -668,10 +557,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -770,10 +641,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -821,10 +683,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -855,10 +711,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -908,13 +755,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -929,10 +773,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -997,10 +829,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0} mrs r0, control tst r0, #1 @@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1082,10 +899,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1133,10 +941,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s index c738cdde6..afb416a8e 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -41,7 +44,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN vPortSVCHandler_C #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -191,7 +193,7 @@ vStartFirstTask: cpsie f dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -371,11 +373,9 @@ SVC_Handler: ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq syscall_enter - cmp r2, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq syscall_enter_1 - cmp r2, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq syscall_exit b vPortSVCHandler_C @@ -383,10 +383,6 @@ SVC_Handler: mov r1, lr b vSystemCallEnter - syscall_enter_1: - mov r1, lr - b vSystemCallEnter_1 - syscall_exit: mov r1, lr b vSystemCallExit diff --git a/portable/ARMv8M/non_secure/portmacrocommon.h b/portable/ARMv8M/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/ARMv8M/non_secure/portmacrocommon.h +++ b/portable/ARMv8M/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/Common/mpu_wrappers_v2.c b/portable/Common/mpu_wrappers_v2.c index 04daedcff..bf3b8c9fc 100644 --- a/portable/Common/mpu_wrappers_v2.c +++ b/portable/Common/mpu_wrappers_v2.c @@ -44,6 +44,7 @@ #include "event_groups.h" #include "stream_buffer.h" #include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ @@ -1138,43 +1139,76 @@ #if ( configUSE_TASK_NOTIFICATIONS == 1 ) - BaseType_t MPU_xTaskGenericNotifyImpl( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) PRIVILEGED_FUNCTION; + BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, + UBaseType_t uxIndexToNotify, + uint32_t ulValue, + eNotifyAction eAction, + uint32_t * pulPreviousNotificationValue ) /* FREERTOS_SYSTEM_CALL */ + { + BaseType_t xReturn = pdFAIL; + xTaskGenericNotifyParams_t xParams; - BaseType_t MPU_xTaskGenericNotifyImpl( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* PRIVILEGED_FUNCTION */ + xParams.xTaskToNotify = xTaskToNotify; + xParams.uxIndexToNotify = uxIndexToNotify; + xParams.ulValue = ulValue; + xParams.eAction = eAction; + xParams.pulPreviousNotificationValue = pulPreviousNotificationValue; + + xReturn = MPU_xTaskGenericNotifyEntry( &( xParams ) ); + + return xReturn; + } + + BaseType_t MPU_xTaskGenericNotifyImpl( const xTaskGenericNotifyParams_t * pxParams ) PRIVILEGED_FUNCTION; + + BaseType_t MPU_xTaskGenericNotifyImpl( const xTaskGenericNotifyParams_t * pxParams ) /* PRIVILEGED_FUNCTION */ { BaseType_t xReturn = pdFAIL; int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; BaseType_t xIsPreviousNotificationValueWriteable = pdFALSE; + BaseType_t xAreParamsReadable = pdFALSE; - if( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES ) + if( pxParams != NULL ) { - if( pulPreviousNotificationValue != NULL ) - { - xIsPreviousNotificationValueWriteable = xPortIsAuthorizedToAccessBuffer( pulPreviousNotificationValue, - sizeof( uint32_t ), - tskMPU_WRITE_PERMISSION ); - } + xAreParamsReadable = xPortIsAuthorizedToAccessBuffer( pxParams, + sizeof( xTaskGenericNotifyParams_t ), + tskMPU_READ_PERMISSION ); + } - if( ( pulPreviousNotificationValue == NULL ) || ( xIsPreviousNotificationValueWriteable == pdTRUE ) ) + if( xAreParamsReadable == pdTRUE ) + { + if( ( pxParams->uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES ) && + ( ( pxParams->eAction == eNoAction ) || + ( pxParams->eAction == eSetBits ) || + ( pxParams->eAction == eIncrement ) || + ( pxParams->eAction == eSetValueWithOverwrite ) || + ( pxParams->eAction == eSetValueWithoutOverwrite ) ) ) { - lIndex = ( int32_t ) xTaskToNotify; - - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( pxParams->pulPreviousNotificationValue != NULL ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xIsPreviousNotificationValueWriteable = xPortIsAuthorizedToAccessBuffer( pxParams->pulPreviousNotificationValue, + sizeof( uint32_t ), + tskMPU_WRITE_PERMISSION ); + } - if( xInternalTaskHandle != NULL ) + if( ( pxParams->pulPreviousNotificationValue == NULL ) || + ( xIsPreviousNotificationValueWriteable == pdTRUE ) ) + { + lIndex = ( int32_t ) ( pxParams->xTaskToNotify ); + + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xReturn = xTaskGenericNotify( xInternalTaskHandle, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + xReturn = xTaskGenericNotify( xInternalTaskHandle, + pxParams->uxIndexToNotify, + pxParams->ulValue, + pxParams->eAction, + pxParams->pulPreviousNotificationValue ); + } } } } @@ -1188,33 +1222,61 @@ #if ( configUSE_TASK_NOTIFICATIONS == 1 ) - BaseType_t MPU_xTaskGenericNotifyWaitImpl( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, + uint32_t ulBitsToClearOnEntry, + uint32_t ulBitsToClearOnExit, + uint32_t * pulNotificationValue, + TickType_t xTicksToWait ) + { + BaseType_t xReturn = pdFAIL; + xTaskGenericNotifyWaitParams_t xParams; - BaseType_t MPU_xTaskGenericNotifyWaitImpl( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* PRIVILEGED_FUNCTION */ + xParams.uxIndexToWaitOn = uxIndexToWaitOn; + xParams.ulBitsToClearOnEntry = ulBitsToClearOnEntry; + xParams.ulBitsToClearOnExit = ulBitsToClearOnExit; + xParams.pulNotificationValue = pulNotificationValue; + xParams.xTicksToWait = xTicksToWait; + + xReturn = MPU_xTaskGenericNotifyWaitEntry( &( xParams ) ); + + return xReturn; + } + + BaseType_t MPU_xTaskGenericNotifyWaitImpl( const xTaskGenericNotifyWaitParams_t * pxParams ) PRIVILEGED_FUNCTION; + + BaseType_t MPU_xTaskGenericNotifyWaitImpl( const xTaskGenericNotifyWaitParams_t * pxParams ) /* PRIVILEGED_FUNCTION */ { BaseType_t xReturn = pdFAIL; BaseType_t xIsNotificationValueWritable = pdFALSE; + BaseType_t xAreParamsReadable = pdFALSE; - if( uxIndexToWaitOn < configTASK_NOTIFICATION_ARRAY_ENTRIES ) + if( pxParams != NULL ) { - if( pulNotificationValue != NULL ) - { - xIsNotificationValueWritable = xPortIsAuthorizedToAccessBuffer( pulNotificationValue, - sizeof( uint32_t ), - tskMPU_WRITE_PERMISSION ); - } + xAreParamsReadable = xPortIsAuthorizedToAccessBuffer( pxParams, + sizeof( xTaskGenericNotifyWaitParams_t ), + tskMPU_READ_PERMISSION ); + } - if( ( pulNotificationValue == NULL ) || ( xIsNotificationValueWritable == pdTRUE ) ) + if( xAreParamsReadable == pdTRUE ) + { + if( pxParams->uxIndexToWaitOn < configTASK_NOTIFICATION_ARRAY_ENTRIES ) { - xReturn = xTaskGenericNotifyWait( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ); + if( pxParams->pulNotificationValue != NULL ) + { + xIsNotificationValueWritable = xPortIsAuthorizedToAccessBuffer( pxParams->pulNotificationValue, + sizeof( uint32_t ), + tskMPU_WRITE_PERMISSION ); + } + + if( ( pxParams->pulNotificationValue == NULL ) || + ( xIsNotificationValueWritable == pdTRUE ) ) + { + xReturn = xTaskGenericNotifyWait( pxParams->uxIndexToWaitOn, + pxParams->ulBitsToClearOnEntry, + pxParams->ulBitsToClearOnExit, + pxParams->pulNotificationValue, + pxParams->xTicksToWait ); + } } } @@ -2113,6 +2175,7 @@ BaseType_t xReturn = pdFAIL; int32_t lIndex; QueueHandle_t xInternalQueueHandle = NULL; + UBaseType_t uxQueueItemSize; lIndex = ( int32_t ) xMutex; @@ -2122,7 +2185,12 @@ if( xInternalQueueHandle != NULL ) { - xReturn = xQueueTakeMutexRecursive( xInternalQueueHandle, xBlockTime ); + uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); + + if( uxQueueItemSize == 0 ) + { + xReturn = xQueueTakeMutexRecursive( xInternalQueueHandle, xBlockTime ); + } } } @@ -2995,33 +3063,87 @@ #if ( configUSE_TIMERS == 1 ) - BaseType_t MPU_xTimerGenericCommandImpl( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, + const BaseType_t xCommandID, + const TickType_t xOptionalValue, + BaseType_t * const pxHigherPriorityTaskWoken, + const TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ + { + BaseType_t xReturn = pdFALSE; + xTimerGenericCommandParams_t xParams; - BaseType_t MPU_xTimerGenericCommandImpl( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* PRIVILEGED_FUNCTION */ + xParams.xTimer = xTimer; + xParams.xCommandID = xCommandID; + xParams.xOptionalValue = xOptionalValue; + xParams.pxHigherPriorityTaskWoken = pxHigherPriorityTaskWoken; + xParams.xTicksToWait = xTicksToWait; + + xReturn = MPU_xTimerGenericCommandEntry( &( xParams ) ); + + return xReturn; + } + + BaseType_t MPU_xTimerGenericCommandImpl( const xTimerGenericCommandParams_t * pxParams ) PRIVILEGED_FUNCTION; + + BaseType_t MPU_xTimerGenericCommandImpl( const xTimerGenericCommandParams_t * pxParams ) /* PRIVILEGED_FUNCTION */ { BaseType_t xReturn = pdFALSE; TimerHandle_t xInternalTimerHandle = NULL; int32_t lIndex; BaseType_t xIsHigherPriorityTaskWokenWriteable = pdFALSE; + BaseType_t xAreParamsReadable = pdFALSE; - if( pxHigherPriorityTaskWoken != NULL ) + if( pxParams != NULL ) { - xIsHigherPriorityTaskWokenWriteable = xPortIsAuthorizedToAccessBuffer( pxHigherPriorityTaskWoken, - sizeof( BaseType_t ), - tskMPU_WRITE_PERMISSION ); + xAreParamsReadable = xPortIsAuthorizedToAccessBuffer( pxParams, + sizeof( xTimerGenericCommandParams_t ), + tskMPU_READ_PERMISSION ); } - if( ( pxHigherPriorityTaskWoken == NULL ) || ( xIsHigherPriorityTaskWokenWriteable == pdTRUE ) ) + if( xAreParamsReadable == pdTRUE ) { - lIndex = ( int32_t ) xTimer; + if( pxParams->pxHigherPriorityTaskWoken != NULL ) + { + xIsHigherPriorityTaskWokenWriteable = xPortIsAuthorizedToAccessBuffer( pxParams->pxHigherPriorityTaskWoken, + sizeof( BaseType_t ), + tskMPU_WRITE_PERMISSION ); + } + + if( ( pxParams->pxHigherPriorityTaskWoken == NULL ) || + ( xIsHigherPriorityTaskWokenWriteable == pdTRUE ) ) + { + lIndex = ( int32_t ) ( pxParams->xTimer ); + + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + { + xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTimerHandle != NULL ) + { + xReturn = xTimerGenericCommand( xInternalTimerHandle, + pxParams->xCommandID, + pxParams->xOptionalValue, + pxParams->pxHigherPriorityTaskWoken, + pxParams->xTicksToWait ); + } + } + } + } + + return xReturn; + } + + BaseType_t MPU_xTimerGenericCommandPrivImpl( const xTimerGenericCommandParams_t * pxParams ) PRIVILEGED_FUNCTION; + + BaseType_t MPU_xTimerGenericCommandPrivImpl( const xTimerGenericCommandParams_t * pxParams ) /* PRIVILEGED_FUNCTION */ + { + BaseType_t xReturn = pdFALSE; + TimerHandle_t xInternalTimerHandle = NULL; + int32_t lIndex; + + if( pxParams != NULL ) + { + lIndex = ( int32_t ) ( pxParams->xTimer ); if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { @@ -3029,7 +3151,11 @@ if( xInternalTimerHandle != NULL ) { - xReturn = xTimerGenericCommand( xInternalTimerHandle, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait ); + xReturn = xTimerGenericCommand( xInternalTimerHandle, + pxParams->xCommandID, + pxParams->xOptionalValue, + pxParams->pxHigherPriorityTaskWoken, + pxParams->xTicksToWait ); } } } @@ -3314,38 +3440,65 @@ /* MPU wrappers for event group APIs. */ /*-----------------------------------------------------------*/ - EventBits_t MPU_xEventGroupWaitBitsImpl( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToWaitFor, + const BaseType_t xClearOnExit, + const BaseType_t xWaitForAllBits, + TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ + { + EventBits_t xReturn = 0; + xEventGroupWaitBitsParams_t xParams; - EventBits_t MPU_xEventGroupWaitBitsImpl( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) /* PRIVILEGED_FUNCTION */ + xParams.xEventGroup = xEventGroup; + xParams.uxBitsToWaitFor = uxBitsToWaitFor; + xParams.xClearOnExit = xClearOnExit; + xParams.xWaitForAllBits = xWaitForAllBits; + xParams.xTicksToWait = xTicksToWait; + + xReturn = MPU_xEventGroupWaitBitsEntry( &( xParams ) ); + + return xReturn; + } + + EventBits_t MPU_xEventGroupWaitBitsImpl( const xEventGroupWaitBitsParams_t * pxParams ) PRIVILEGED_FUNCTION; + + EventBits_t MPU_xEventGroupWaitBitsImpl( const xEventGroupWaitBitsParams_t * pxParams ) /* PRIVILEGED_FUNCTION */ { EventBits_t xReturn = 0; EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; + BaseType_t xAreParamsReadable = pdFALSE; - if( ( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) && - ( uxBitsToWaitFor != 0 ) - #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) - #endif - ) + if( pxParams != NULL ) { - lIndex = ( int32_t ) xEventGroup; + xAreParamsReadable = xPortIsAuthorizedToAccessBuffer( pxParams, + sizeof( xEventGroupWaitBitsParams_t ), + tskMPU_READ_PERMISSION ); + } - if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) + if( xAreParamsReadable == pdTRUE ) + { + if( ( ( pxParams->uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) && + ( pxParams->uxBitsToWaitFor != 0 ) + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( pxParams->xTicksToWait != 0 ) ) ) + #endif + ) { - xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + lIndex = ( int32_t ) ( pxParams->xEventGroup ); - if( xInternalEventGroupHandle != NULL ) + if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xReturn = xEventGroupWaitBits( xInternalEventGroupHandle, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait ); + xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalEventGroupHandle != NULL ) + { + xReturn = xEventGroupWaitBits( xInternalEventGroupHandle, + pxParams->uxBitsToWaitFor, + pxParams->xClearOnExit, + pxParams->xWaitForAllBits, + pxParams->xTicksToWait ); + } } } } @@ -4223,5 +4376,246 @@ #endif /*-----------------------------------------------------------*/ +/** + * @brief Array of system call implementation functions. + * + * The index in the array MUST match the corresponding system call number + * defined in mpu_wrappers.h. + */ + PRIVILEGED_DATA UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ] = + { + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) + ( UBaseType_t ) MPU_xTaskGenericNotifyImpl, /* SYSTEM_CALL_xTaskGenericNotify. */ + ( UBaseType_t ) MPU_xTaskGenericNotifyWaitImpl, /* SYSTEM_CALL_xTaskGenericNotifyWait. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTaskGenericNotify. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTaskGenericNotifyWait. */ + #endif + + #if ( configUSE_TIMERS == 1 ) + ( UBaseType_t ) MPU_xTimerGenericCommandImpl, /* SYSTEM_CALL_xTimerGenericCommand. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTimerGenericCommand. */ + #endif + + ( UBaseType_t ) MPU_xEventGroupWaitBitsImpl, /* SYSTEM_CALL_xEventGroupWaitBits. */ + + /* The system calls above this line take 5 parameters. */ + + #if ( INCLUDE_xTaskDelayUntil == 1 ) + ( UBaseType_t ) MPU_xTaskDelayUntilImpl, /* SYSTEM_CALL_xTaskDelayUntil. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTaskDelayUntil. */ + #endif + + #if ( INCLUDE_xTaskAbortDelay == 1 ) + ( UBaseType_t ) MPU_xTaskAbortDelayImpl, /* SYSTEM_CALL_xTaskAbortDelay. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTaskAbortDelay. */ + #endif + + #if ( INCLUDE_vTaskDelay == 1 ) + ( UBaseType_t ) MPU_vTaskDelayImpl, /* SYSTEM_CALL_vTaskDelay. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_vTaskDelay. */ + #endif + + #if ( INCLUDE_uxTaskPriorityGet == 1 ) + ( UBaseType_t ) MPU_uxTaskPriorityGetImpl, /* SYSTEM_CALL_uxTaskPriorityGet. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_uxTaskPriorityGet. */ + #endif + + #if ( INCLUDE_eTaskGetState == 1 ) + ( UBaseType_t ) MPU_eTaskGetStateImpl, /* SYSTEM_CALL_eTaskGetState. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_eTaskGetState. */ + #endif + + #if ( configUSE_TRACE_FACILITY == 1 ) + ( UBaseType_t ) MPU_vTaskGetInfoImpl, /* SYSTEM_CALL_vTaskGetInfo. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_vTaskGetInfo. */ + #endif + + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + ( UBaseType_t ) MPU_xTaskGetIdleTaskHandleImpl, /* SYSTEM_CALL_xTaskGetIdleTaskHandle. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTaskGetIdleTaskHandle. */ + #endif + + #if ( INCLUDE_vTaskSuspend == 1 ) + ( UBaseType_t ) MPU_vTaskSuspendImpl, /* SYSTEM_CALL_vTaskSuspend. */ + ( UBaseType_t ) MPU_vTaskResumeImpl, /* SYSTEM_CALL_vTaskResume. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_vTaskSuspend. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_vTaskResume. */ + #endif + + ( UBaseType_t ) MPU_xTaskGetTickCountImpl, /* SYSTEM_CALL_xTaskGetTickCount. */ + ( UBaseType_t ) MPU_uxTaskGetNumberOfTasksImpl, /* SYSTEM_CALL_uxTaskGetNumberOfTasks. */ + ( UBaseType_t ) MPU_pcTaskGetNameImpl, /* SYSTEM_CALL_pcTaskGetName. */ + + #if ( configGENERATE_RUN_TIME_STATS == 1 ) + ( UBaseType_t ) MPU_ulTaskGetRunTimeCounterImpl, /* SYSTEM_CALL_ulTaskGetRunTimeCounter. */ + ( UBaseType_t ) MPU_ulTaskGetRunTimePercentImpl, /* SYSTEM_CALL_ulTaskGetRunTimePercent. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_ulTaskGetRunTimeCounter. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_ulTaskGetRunTimePercent. */ + #endif + + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + ( UBaseType_t ) MPU_ulTaskGetIdleRunTimePercentImpl, /* SYSTEM_CALL_ulTaskGetIdleRunTimePercent. */ + ( UBaseType_t ) MPU_ulTaskGetIdleRunTimeCounterImpl, /* SYSTEM_CALL_ulTaskGetIdleRunTimeCounter. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_ulTaskGetIdleRunTimePercent. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_ulTaskGetIdleRunTimeCounter. */ + #endif + + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) + ( UBaseType_t ) MPU_vTaskSetApplicationTaskTagImpl, /* SYSTEM_CALL_vTaskSetApplicationTaskTag. */ + ( UBaseType_t ) MPU_xTaskGetApplicationTaskTagImpl, /* SYSTEM_CALL_xTaskGetApplicationTaskTag. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_vTaskSetApplicationTaskTag. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTaskGetApplicationTaskTag. */ + #endif + + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + ( UBaseType_t ) MPU_vTaskSetThreadLocalStoragePointerImpl, /* SYSTEM_CALL_vTaskSetThreadLocalStoragePointer. */ + ( UBaseType_t ) MPU_pvTaskGetThreadLocalStoragePointerImpl, /* SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_vTaskSetThreadLocalStoragePointer. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer. */ + #endif + + #if ( configUSE_TRACE_FACILITY == 1 ) + ( UBaseType_t ) MPU_uxTaskGetSystemStateImpl, /* SYSTEM_CALL_uxTaskGetSystemState. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_uxTaskGetSystemState. */ + #endif + + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + ( UBaseType_t ) MPU_uxTaskGetStackHighWaterMarkImpl, /* SYSTEM_CALL_uxTaskGetStackHighWaterMark. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_uxTaskGetStackHighWaterMark. */ + #endif + + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + ( UBaseType_t ) MPU_uxTaskGetStackHighWaterMark2Impl, /* SYSTEM_CALL_uxTaskGetStackHighWaterMark2. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_uxTaskGetStackHighWaterMark2. */ + #endif + + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + ( UBaseType_t ) MPU_xTaskGetCurrentTaskHandleImpl, /* SYSTEM_CALL_xTaskGetCurrentTaskHandle. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTaskGetCurrentTaskHandle. */ + #endif + + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) + ( UBaseType_t ) MPU_xTaskGetSchedulerStateImpl, /* SYSTEM_CALL_xTaskGetSchedulerState. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTaskGetSchedulerState. */ + #endif + + ( UBaseType_t ) MPU_vTaskSetTimeOutStateImpl, /* SYSTEM_CALL_vTaskSetTimeOutState. */ + ( UBaseType_t ) MPU_xTaskCheckForTimeOutImpl, /* SYSTEM_CALL_xTaskCheckForTimeOut. */ + + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) + ( UBaseType_t ) MPU_ulTaskGenericNotifyTakeImpl, /* SYSTEM_CALL_ulTaskGenericNotifyTake. */ + ( UBaseType_t ) MPU_xTaskGenericNotifyStateClearImpl, /* SYSTEM_CALL_xTaskGenericNotifyStateClear. */ + ( UBaseType_t ) MPU_ulTaskGenericNotifyValueClearImpl, /* SYSTEM_CALL_ulTaskGenericNotifyValueClear. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_ulTaskGenericNotifyTake. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTaskGenericNotifyStateClear. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_ulTaskGenericNotifyValueClear. */ + #endif + + ( UBaseType_t ) MPU_xQueueGenericSendImpl, /* SYSTEM_CALL_xQueueGenericSend. */ + ( UBaseType_t ) MPU_uxQueueMessagesWaitingImpl, /* SYSTEM_CALL_uxQueueMessagesWaiting. */ + ( UBaseType_t ) MPU_uxQueueSpacesAvailableImpl, /* SYSTEM_CALL_uxQueueSpacesAvailable. */ + ( UBaseType_t ) MPU_xQueueReceiveImpl, /* SYSTEM_CALL_xQueueReceive. */ + ( UBaseType_t ) MPU_xQueuePeekImpl, /* SYSTEM_CALL_xQueuePeek. */ + ( UBaseType_t ) MPU_xQueueSemaphoreTakeImpl, /* SYSTEM_CALL_xQueueSemaphoreTake. */ + + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + ( UBaseType_t ) MPU_xQueueGetMutexHolderImpl, /* SYSTEM_CALL_xQueueGetMutexHolder. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_xQueueGetMutexHolder. */ + #endif + + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) + ( UBaseType_t ) MPU_xQueueTakeMutexRecursiveImpl, /* SYSTEM_CALL_xQueueTakeMutexRecursive. */ + ( UBaseType_t ) MPU_xQueueGiveMutexRecursiveImpl, /* SYSTEM_CALL_xQueueGiveMutexRecursive. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_xQueueTakeMutexRecursive. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_xQueueGiveMutexRecursive. */ + #endif + + #if ( configUSE_QUEUE_SETS == 1 ) + ( UBaseType_t ) MPU_xQueueSelectFromSetImpl, /* SYSTEM_CALL_xQueueSelectFromSet. */ + ( UBaseType_t ) MPU_xQueueAddToSetImpl, /* SYSTEM_CALL_xQueueAddToSet. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_xQueueSelectFromSet. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_xQueueAddToSet. */ + #endif + + #if configQUEUE_REGISTRY_SIZE > 0 + ( UBaseType_t ) MPU_vQueueAddToRegistryImpl, /* SYSTEM_CALL_vQueueAddToRegistry. */ + ( UBaseType_t ) MPU_vQueueUnregisterQueueImpl, /* SYSTEM_CALL_vQueueUnregisterQueue. */ + ( UBaseType_t ) MPU_pcQueueGetNameImpl, /* SYSTEM_CALL_pcQueueGetName. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_vQueueAddToRegistry. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_vQueueUnregisterQueue. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_pcQueueGetName. */ + #endif + + #if ( configUSE_TIMERS == 1 ) + ( UBaseType_t ) MPU_pvTimerGetTimerIDImpl, /* SYSTEM_CALL_pvTimerGetTimerID. */ + ( UBaseType_t ) MPU_vTimerSetTimerIDImpl, /* SYSTEM_CALL_vTimerSetTimerID. */ + ( UBaseType_t ) MPU_xTimerIsTimerActiveImpl, /* SYSTEM_CALL_xTimerIsTimerActive. */ + ( UBaseType_t ) MPU_xTimerGetTimerDaemonTaskHandleImpl, /* SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle. */ + ( UBaseType_t ) MPU_pcTimerGetNameImpl, /* SYSTEM_CALL_pcTimerGetName. */ + ( UBaseType_t ) MPU_vTimerSetReloadModeImpl, /* SYSTEM_CALL_vTimerSetReloadMode. */ + ( UBaseType_t ) MPU_xTimerGetReloadModeImpl, /* SYSTEM_CALL_xTimerGetReloadMode. */ + ( UBaseType_t ) MPU_uxTimerGetReloadModeImpl, /* SYSTEM_CALL_uxTimerGetReloadMode. */ + ( UBaseType_t ) MPU_xTimerGetPeriodImpl, /* SYSTEM_CALL_xTimerGetPeriod. */ + ( UBaseType_t ) MPU_xTimerGetExpiryTimeImpl, /* SYSTEM_CALL_xTimerGetExpiryTime. */ + #else /* if ( configUSE_TIMERS == 1 ) */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_pvTimerGetTimerID. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_vTimerSetTimerID. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTimerIsTimerActive. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_pcTimerGetName. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_vTimerSetReloadMode. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTimerGetReloadMode. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_uxTimerGetReloadMode. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTimerGetPeriod. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_xTimerGetExpiryTime. */ + #endif /* if ( configUSE_TIMERS == 1 ) */ + + ( UBaseType_t ) MPU_xEventGroupClearBitsImpl, /* SYSTEM_CALL_xEventGroupClearBits. */ + ( UBaseType_t ) MPU_xEventGroupSetBitsImpl, /* SYSTEM_CALL_xEventGroupSetBits. */ + ( UBaseType_t ) MPU_xEventGroupSyncImpl, /* SYSTEM_CALL_xEventGroupSync. */ + + #if ( configUSE_TRACE_FACILITY == 1 ) + ( UBaseType_t ) MPU_uxEventGroupGetNumberImpl, /* SYSTEM_CALL_uxEventGroupGetNumber. */ + ( UBaseType_t ) MPU_vEventGroupSetNumberImpl, /* SYSTEM_CALL_vEventGroupSetNumber. */ + #else + ( UBaseType_t ) 0, /* SYSTEM_CALL_uxEventGroupGetNumber. */ + ( UBaseType_t ) 0, /* SYSTEM_CALL_vEventGroupSetNumber. */ + #endif + + ( UBaseType_t ) MPU_xStreamBufferSendImpl, /* SYSTEM_CALL_xStreamBufferSend. */ + ( UBaseType_t ) MPU_xStreamBufferReceiveImpl, /* SYSTEM_CALL_xStreamBufferReceive. */ + ( UBaseType_t ) MPU_xStreamBufferIsFullImpl, /* SYSTEM_CALL_xStreamBufferIsFull. */ + ( UBaseType_t ) MPU_xStreamBufferIsEmptyImpl, /* SYSTEM_CALL_xStreamBufferIsEmpty. */ + ( UBaseType_t ) MPU_xStreamBufferSpacesAvailableImpl, /* SYSTEM_CALL_xStreamBufferSpacesAvailable. */ + ( UBaseType_t ) MPU_xStreamBufferBytesAvailableImpl, /* SYSTEM_CALL_xStreamBufferBytesAvailable. */ + ( UBaseType_t ) MPU_xStreamBufferSetTriggerLevelImpl, /* SYSTEM_CALL_xStreamBufferSetTriggerLevel. */ + ( UBaseType_t ) MPU_xStreamBufferNextMessageLengthBytesImpl /* SYSTEM_CALL_xStreamBufferNextMessageLengthBytes. */ + }; +/*-----------------------------------------------------------*/ + #endif /* #if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c index 270ee5eda..4323feffe 100644 --- a/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c @@ -38,2382 +38,2139 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index ed3d71608..dc1d60d43 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -36,6 +36,9 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE @@ -46,133 +49,133 @@ #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ - " movs r3, #5 \n" /* r3 = 5. */ - " str r3, [r1] \n" /* Program RNR = 5. */ - " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ - " movs r3, #6 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 6. */ - " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ - " movs r3, #7 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 7. */ - " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " subs r2, #20 \n" - " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ - " subs r2, #20 \n" - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " mov lr, r6 \n" - " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " \n" - " restore_general_regs_first_task: \n" - " subs r2, #32 \n" - " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ - " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ - " subs r2, #48 \n" - " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ - " mov r8, r4 \n" /* r8 = r4. */ - " mov r9, r5 \n" /* r9 = r5. */ - " mov r10, r6 \n" /* r10 = r6. */ - " mov r11, r7 \n" /* r11 = r7. */ - " subs r2, #32 \n" - " ldmia r2!, {r4-r7} \n" /* Restore r4-r7. */ - " subs r2, #16 \n" - " \n" - " restore_context_done_first_task: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xSecureContextConst2: .word xSecureContext \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ + " movs r3, #5 \n" /* r3 = 5. */ + " str r3, [r1] \n" /* Program RNR = 5. */ + " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ + " movs r3, #6 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 6. */ + " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ + " movs r3, #7 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 7. */ + " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " subs r2, #20 \n" + " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ + " subs r2, #20 \n" + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " mov lr, r6 \n" + " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " \n" + " restore_general_regs_first_task: \n" + " subs r2, #32 \n" + " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ + " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ + " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " subs r2, #48 \n" + " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " subs r2, #32 \n" + " ldmia r2!, {r4-r7} \n" /* Restore r4-r7. */ + " subs r2, #16 \n" + " \n" + " restore_context_done_first_task: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xSecureContextConst2: .word xSecureContext \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r3, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r3] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ - " ldr r4, xSecureContextConst2 \n" - " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " bx r3 \n"/* Finally, branch to EXC_RETURN. */ - " \n" - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - "xSecureContextConst2: .word xSecureContext \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ + " ldr r4, xSecureContextConst2 \n" + " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " bx r3 \n" /* Finally, branch to EXC_RETURN. */ + " \n" + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + "xSecureContextConst2: .word xSecureContext \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -183,15 +186,15 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " movs r1, #1 \n"/* r1 = 1. */ - " tst r0, r1 \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */ - " beq running_privileged \n"/* If the result of previous AND operation was 0, branch. */ - " movs r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " bx lr \n"/* Return. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " movs r1, #1 \n" /* r1 = 1. */ + " tst r0, r1 \n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */ + " beq running_privileged \n" /* If the result of previous AND operation was 0, branch. */ + " movs r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " bx lr \n" /* Return. */ " running_privileged: \n" - " movs r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movs r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "r1", "memory" @@ -205,11 +208,11 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " movs r1, #1 \n"/* r1 = 1. */ - " bics r0, r1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "r1", "memory" ); } @@ -221,11 +224,11 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " movs r1, #1 \n"/* r1 = 1. */ - " orrs r0, r1 \n"/* r0 = r0 | r1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* r0 = r0 | r1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "r1", "memory" ); } @@ -237,14 +240,14 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -283,328 +286,323 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/ - " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ - " \n" - " cbz r0, save_ns_context \n" /* No secure context to save. */ - " save_s_context: \n" - " push {r0-r2, lr} \n" - " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r3} \n" /* LR is now in r3. */ - " mov lr, r3 \n" /* Restore LR. */ - " \n" - " save_ns_context: \n" - " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ - " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " save_general_regs: \n" - " mrs r3, psp \n" - " stmia r2!, {r4-r7} \n" /* Store r4-r7. */ - " mov r4, r8 \n" /* r4 = r8. */ - " mov r5, r9 \n" /* r5 = r9. */ - " mov r6, r10 \n" /* r6 = r10. */ - " mov r7, r11 \n" /* r7 = r11. */ - " stmia r2!, {r4-r7} \n" /* Store r8-r11. */ - " ldmia r3!, {r4-r7} \n" /* Copy half of the hardware saved context into r4-r7. */ - " stmia r2!, {r4-r7} \n" /* Store the hardware saved context. */ - " ldmia r3!, {r4-r7} \n" /* Copy rest half of the hardware saved context into r4-r7. */ - " stmia r2!, {r4-r7} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psp \n" /* r3 = PSP. */ - " mrs r4, psplim \n" /* r4 = PSPLIM. */ - " mrs r5, control \n" /* r5 = CONTROL. */ - " mov r6, lr \n" /* r6 = LR. */ - " stmia r2!, {r0, r3-r6} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " cpsid i \n" - " bl vTaskSwitchContext \n" - " cpsie i \n" - " \n" - " program_mpu: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ - " movs r3, #5 \n" /* r3 = 5. */ - " str r3, [r1] \n" /* Program RNR = 5. */ - " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ - " movs r3, #6 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 6. */ - " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ - " movs r3, #7 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 7. */ - " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " subs r2, #20 \n" - " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ - " subs r2, #20 \n" - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " mov lr, r6 \n" - " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " cbz r0, restore_ns_context \n" /* No secure context to restore. */ - " \n" - " restore_s_context: \n" - " push {r1-r3, lr} \n" - " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r1-r4} \n" /* LR is now in r4. */ - " mov lr, r4 \n" - " \n" - " restore_ns_context: \n" - " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ - " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " restore_general_regs: \n" - " subs r2, #32 \n" - " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ - " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ - " subs r2, #48 \n" - " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ - " mov r8, r4 \n" /* r8 = r4. */ - " mov r9, r5 \n" /* r9 = r5. */ - " mov r10, r6 \n" /* r10 = r6. */ - " mov r11, r7 \n" /* r11 = r7. */ - " subs r2, #32 \n" - " ldmia r2!, {r4-r7} \n" /* Restore r4-r7. */ - " subs r2, #16 \n" - " \n" - " restore_context_done: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xSecureContextConst: .word xSecureContext \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/ + " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " save_s_context: \n" + " push {r0-r2, lr} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r3} \n" /* LR is now in r3. */ + " mov lr, r3 \n" /* Restore LR. */ + " \n" + " save_ns_context: \n" + " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ + " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " save_general_regs: \n" + " mrs r3, psp \n" + " stmia r2!, {r4-r7} \n" /* Store r4-r7. */ + " mov r4, r8 \n" /* r4 = r8. */ + " mov r5, r9 \n" /* r5 = r9. */ + " mov r6, r10 \n" /* r6 = r10. */ + " mov r7, r11 \n" /* r7 = r11. */ + " stmia r2!, {r4-r7} \n" /* Store r8-r11. */ + " ldmia r3!, {r4-r7} \n" /* Copy half of the hardware saved context into r4-r7. */ + " stmia r2!, {r4-r7} \n" /* Store the hardware saved context. */ + " ldmia r3!, {r4-r7} \n" /* Copy rest half of the hardware saved context into r4-r7. */ + " stmia r2!, {r4-r7} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psp \n" /* r3 = PSP. */ + " mrs r4, psplim \n" /* r4 = PSPLIM. */ + " mrs r5, control \n" /* r5 = CONTROL. */ + " mov r6, lr \n" /* r6 = LR. */ + " stmia r2!, {r0, r3-r6} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " cpsid i \n" + " bl vTaskSwitchContext \n" + " cpsie i \n" + " \n" + " program_mpu: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ + " movs r3, #5 \n" /* r3 = 5. */ + " str r3, [r1] \n" /* Program RNR = 5. */ + " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ + " movs r3, #6 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 6. */ + " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ + " movs r3, #7 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 7. */ + " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " subs r2, #20 \n" + " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ + " subs r2, #20 \n" + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " mov lr, r6 \n" + " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " cbz r0, restore_ns_context \n" /* No secure context to restore. */ + " \n" + " restore_s_context: \n" + " push {r1-r3, lr} \n" + " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r1-r4} \n" /* LR is now in r4. */ + " mov lr, r4 \n" + " \n" + " restore_ns_context: \n" + " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ + " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " restore_general_regs: \n" + " subs r2, #32 \n" + " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ + " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ + " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " subs r2, #48 \n" + " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " subs r2, #32 \n" + " ldmia r2!, {r4-r7} \n" /* Restore r4-r7. */ + " subs r2, #16 \n" + " \n" + " restore_context_done: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xSecureContextConst: .word xSecureContext \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/ - " mrs r2, psp \n"/* Read PSP in r2. */ - " \n" - " cbz r0, save_ns_context \n"/* No secure context to save. */ - " push {r0-r2, r14} \n" - " bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r3} \n"/* LR is now in r3. */ - " mov lr, r3 \n"/* LR = r3. */ - " lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " b select_next_task \n" - " \n" - " save_ns_context: \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r2!, {r0, r1, r3-r7} \n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ - " mov r4, r8 \n"/* r4 = r8. */ - " mov r5, r9 \n"/* r5 = r9. */ - " mov r6, r10 \n"/* r6 = r10. */ - " mov r7, r11 \n"/* r7 = r11. */ - " stmia r2!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ - " \n" - " select_next_task: \n" - " cpsid i \n" - " bl vTaskSwitchContext \n" - " cpsie i \n" - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ - " \n" - " ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ - " mov lr, r4 \n"/* LR = r4. */ - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r3] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " push {r2, r4} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r2, r4} \n" - " mov lr, r4 \n"/* LR = r4. */ - " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " restore_ns_context: \n" - " adds r2, r2, #16 \n"/* Move to the high registers. */ - " ldmia r2!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */ - " mov r8, r4 \n"/* r8 = r4. */ - " mov r9, r5 \n"/* r9 = r5. */ - " mov r10, r6 \n"/* r10 = r6. */ - " mov r11, r7 \n"/* r11 = r7. */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " subs r2, r2, #32 \n"/* Go back to the low registers. */ - " ldmia r2!, {r4-r7} \n"/* Restore the low registers that are not automatically restored. */ - " bx lr \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - "xSecureContextConst: .word xSecureContext \n" - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/ + " mrs r2, psp \n" /* Read PSP in r2. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " push {r0-r2, r14} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r3} \n" /* LR is now in r3. */ + " mov lr, r3 \n" /* LR = r3. */ + " lsls r1, r3, #25 \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl save_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " b select_next_task \n" + " \n" + " save_ns_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3-r7} \n" /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ + " mov r4, r8 \n" /* r4 = r8. */ + " mov r5, r9 \n" /* r5 = r9. */ + " mov r6, r10 \n" /* r6 = r10. */ + " mov r7, r11 \n" /* r7 = r11. */ + " stmia r2!, {r4-r7} \n" /* Store the high registers that are not saved automatically. */ + " \n" + " select_next_task: \n" + " cpsid i \n" + " bl vTaskSwitchContext \n" + " cpsie i \n" + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ + " \n" + " ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + " msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ + " mov lr, r4 \n" /* LR = r4. */ + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n" /* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n" /* LR = r4. */ + " lsls r1, r4, #25 \n" /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " restore_ns_context: \n" + " adds r2, r2, #16 \n" /* Move to the high registers. */ + " ldmia r2!, {r4-r7} \n" /* Restore the high registers that are not automatically restored. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " subs r2, r2, #32 \n" /* Go back to the low registers. */ + " ldmia r2!, {r4-r7} \n" /* Restore the low registers that are not automatically restored. */ + " bx lr \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + "xSecureContextConst: .word xSecureContext \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "movs r0, #4 \n" - "mov r1, lr \n" - "tst r0, r1 \n" - "beq stack_on_msp \n" - "stack_on_psp: \n" - " mrs r0, psp \n" - " b route_svc \n" - "stack_on_msp: \n" - " mrs r0, msp \n" - " b route_svc \n" - " \n" - "route_svc: \n" - " ldr r2, [r0, #24] \n" - " subs r2, #2 \n" - " ldrb r3, [r2, #0] \n" - " cmp r3, %0 \n" - " beq system_call_enter \n" - " cmp r3, %1 \n" - " beq system_call_enter_1 \n" - " cmp r3, %2 \n" - " beq system_call_exit \n" - " b vPortSVCHandler_C \n" - " \n" - "system_call_enter: \n" - " b vSystemCallEnter \n" - "system_call_enter_1: \n" - " b vSystemCallEnter_1 \n" - "system_call_exit: \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "r3", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "movs r0, #4 \n" + "mov r1, lr \n" + "tst r0, r1 \n" + "beq stack_on_msp \n" + "stack_on_psp: \n" + " mrs r0, psp \n" + " b route_svc \n" + "stack_on_msp: \n" + " mrs r0, msp \n" + " b route_svc \n" + " \n" + "route_svc: \n" + " ldr r3, [r0, #24] \n" + " subs r3, #2 \n" + " ldrb r2, [r3, #0] \n" + " cmp r2, %0 \n" + " blt system_call_enter \n" + " cmp r2, %1 \n" + " beq system_call_exit \n" + " b vPortSVCHandler_C \n" + " \n" + "system_call_enter: \n" + " b vSystemCallEnter \n" + "system_call_exit: \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "r3", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " movs r0, #4 \n" - " mov r1, lr \n" - " tst r0, r1 \n" - " beq stacking_used_msp \n" - " mrs r0, psp \n" - " ldr r2, svchandler_address_const \n" - " bx r2 \n" - " stacking_used_msp: \n" - " mrs r0, msp \n" - " ldr r2, svchandler_address_const \n" - " bx r2 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " movs r0, #4 \n" + " mov r1, lr \n" + " tst r0, r1 \n" + " beq stacking_used_msp \n" + " mrs r0, psp \n" + " ldr r2, svchandler_address_const \n" + " bx r2 \n" + " stacking_used_msp: \n" + " mrs r0, msp \n" + " ldr r2, svchandler_address_const \n" + " bx r2 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -615,8 +613,8 @@ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ ( ( " .syntax unified \n" " \n" - " svc %0 \n"/* Secure context is allocated in the supervisor call. */ - " bx lr \n"/* Return. */ + " svc %0 \n" /* Secure context is allocated in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory" ); } @@ -628,14 +626,14 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR ( " .syntax unified \n" " \n" - " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ - " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ - " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ - " bne free_secure_context \n"/* Branch if r1 != 0. */ - " bx lr \n"/* There is no secure context (xSecureContext is NULL). */ + " ldr r2, [r0] \n" /* The first item in the TCB is the top of the stack. */ + " ldr r1, [r2] \n" /* The first item on the stack is the task's xSecureContext. */ + " cmp r1, #0 \n" /* Raise svc if task's xSecureContext is not NULL. */ + " bne free_secure_context \n" /* Branch if r1 != 0. */ + " bx lr \n" /* There is no secure context (xSecureContext is NULL). */ " free_secure_context: \n" - " svc %0 \n"/* Secure context is freed in the supervisor call. */ - " bx lr \n"/* Return. */ + " svc %0 \n" /* Secure context is freed in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory" ); } diff --git a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c index 270ee5eda..4323feffe 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -38,2382 +38,2139 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0, r1} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0, r1} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0, r1} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0, r1} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0, r1} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0, r1} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0, r1} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0, r1} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0, r1} \n" - " mrs r0, control \n" - " movs r1, #1 \n" - " tst r0, r1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0, r1} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0, r1} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0, r1} \n" + " mrs r0, control \n" + " movs r1, #1 \n" + " tst r0, r1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0, r1} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0, r1} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index f378341cf..a6ab28b6b 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -36,6 +36,9 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE @@ -46,127 +49,127 @@ #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ - " movs r3, #5 \n" /* r3 = 5. */ - " str r3, [r1] \n" /* Program RNR = 5. */ - " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ - " movs r3, #6 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 6. */ - " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ - " movs r3, #7 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 7. */ - " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " subs r1, #16 \n" - " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ - " subs r1, #16 \n" - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " mov lr, r5 \n" - " \n" - " restore_general_regs_first_task: \n" - " subs r1, #32 \n" - " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ - " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ - " subs r1, #48 \n" - " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ - " mov r8, r4 \n" /* r8 = r4. */ - " mov r9, r5 \n" /* r9 = r5. */ - " mov r10, r6 \n" /* r10 = r6. */ - " mov r11, r7 \n" /* r11 = r7. */ - " subs r1, #32 \n" - " ldmia r1!, {r4-r7} \n" /* Restore r4-r7. */ - " subs r1, #16 \n" - " \n" - " restore_context_done_first_task: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ + " movs r3, #5 \n" /* r3 = 5. */ + " str r3, [r1] \n" /* Program RNR = 5. */ + " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ + " movs r3, #6 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 6. */ + " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ + " movs r3, #7 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 7. */ + " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " subs r1, #16 \n" + " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ + " subs r1, #16 \n" + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " mov lr, r5 \n" + " \n" + " restore_general_regs_first_task: \n" + " subs r1, #32 \n" + " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ + " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ + " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " subs r1, #48 \n" + " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " subs r1, #32 \n" + " ldmia r1!, {r4-r7} \n" /* Restore r4-r7. */ + " subs r1, #16 \n" + " \n" + " restore_context_done_first_task: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r2} \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ - " msr psplim, r1 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " bx r2 \n"/* Finally, branch to EXC_RETURN. */ - " \n" - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ + " msr psplim, r1 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " bx r2 \n" /* Finally, branch to EXC_RETURN. */ + " \n" + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -177,15 +180,15 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " movs r1, #1 \n"/* r1 = 1. */ - " tst r0, r1 \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */ - " beq running_privileged \n"/* If the result of previous AND operation was 0, branch. */ - " movs r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " bx lr \n"/* Return. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " movs r1, #1 \n" /* r1 = 1. */ + " tst r0, r1 \n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */ + " beq running_privileged \n" /* If the result of previous AND operation was 0, branch. */ + " movs r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " bx lr \n" /* Return. */ " running_privileged: \n" - " movs r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movs r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "r1", "memory" @@ -199,11 +202,11 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " movs r1, #1 \n"/* r1 = 1. */ - " bics r0, r1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "r1", "memory" ); } @@ -215,11 +218,11 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " movs r1, #1 \n"/* r1 = 1. */ - " orrs r0, r1 \n"/* r0 = r0 | r1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* r0 = r0 | r1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "r1", "memory" ); } @@ -231,14 +234,14 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -277,254 +280,249 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ - " mrs r2, psp \n" /* r2 = PSP. */ - " \n" - " save_general_regs: \n" - " stmia r1!, {r4-r7} \n" /* Store r4-r7. */ - " mov r4, r8 \n" /* r4 = r8. */ - " mov r5, r9 \n" /* r5 = r9. */ - " mov r6, r10 \n" /* r6 = r10. */ - " mov r7, r11 \n" /* r7 = r11. */ - " stmia r1!, {r4-r7} \n" /* Store r8-r11. */ - " ldmia r2!, {r4-r7} \n" /* Copy half of the hardware saved context into r4-r7. */ - " stmia r1!, {r4-r7} \n" /* Store the hardware saved context. */ - " ldmia r2!, {r4-r7} \n" /* Copy rest half of the hardware saved context into r4-r7. */ - " stmia r1!, {r4-r7} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r2, psp \n" /* r2 = PSP. */ - " mrs r3, psplim \n" /* r3 = PSPLIM. */ - " mrs r4, control \n" /* r4 = CONTROL. */ - " mov r5, lr \n" /* r5 = LR. */ - " stmia r1!, {r2-r5} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " cpsid i \n" - " bl vTaskSwitchContext \n" - " cpsie i \n" - " \n" - " program_mpu: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ - " movs r3, #5 \n" /* r3 = 5. */ - " str r3, [r1] \n" /* Program RNR = 5. */ - " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ - " movs r3, #6 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 6. */ - " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ - " movs r3, #7 \n" /* r3 = 6. */ - " str r3, [r1] \n" /* Program RNR = 7. */ - " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " movs r3, #1 \n" /* r3 = 1. */ - " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " subs r1, #16 \n" - " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ - " subs r1, #16 \n" - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " mov lr, r5 \n" - " \n" - " restore_general_regs: \n" - " subs r1, #32 \n" - " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ - " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ - " subs r1, #48 \n" - " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ - " mov r8, r4 \n" /* r8 = r4. */ - " mov r9, r5 \n" /* r9 = r5. */ - " mov r10, r6 \n" /* r10 = r6. */ - " mov r11, r7 \n" /* r11 = r7. */ - " subs r1, #32 \n" - " ldmia r1!, {r4-r7} \n" /* Restore r4-r7. */ - " subs r1, #16 \n" - " \n" - " restore_context_done: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ + " mrs r2, psp \n" /* r2 = PSP. */ + " \n" + " save_general_regs: \n" + " stmia r1!, {r4-r7} \n" /* Store r4-r7. */ + " mov r4, r8 \n" /* r4 = r8. */ + " mov r5, r9 \n" /* r5 = r9. */ + " mov r6, r10 \n" /* r6 = r10. */ + " mov r7, r11 \n" /* r7 = r11. */ + " stmia r1!, {r4-r7} \n" /* Store r8-r11. */ + " ldmia r2!, {r4-r7} \n" /* Copy half of the hardware saved context into r4-r7. */ + " stmia r1!, {r4-r7} \n" /* Store the hardware saved context. */ + " ldmia r2!, {r4-r7} \n" /* Copy rest half of the hardware saved context into r4-r7. */ + " stmia r1!, {r4-r7} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r2, psp \n" /* r2 = PSP. */ + " mrs r3, psplim \n" /* r3 = PSPLIM. */ + " mrs r4, control \n" /* r4 = CONTROL. */ + " mov r5, lr \n" /* r5 = LR. */ + " stmia r1!, {r2-r5} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " cpsid i \n" + " bl vTaskSwitchContext \n" + " cpsie i \n" + " \n" + " program_mpu: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ + " movs r3, #5 \n" /* r3 = 5. */ + " str r3, [r1] \n" /* Program RNR = 5. */ + " ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. */ + " movs r3, #6 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 6. */ + " ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write third set of RBAR/RLAR registers. */ + " movs r3, #7 \n" /* r3 = 6. */ + " str r3, [r1] \n" /* Program RNR = 7. */ + " ldmia r0!, {r4-r5} \n" /* Read fourth set of RBAR/RLAR registers from TCB. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " stmia r2!, {r4-r5} \n" /* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " movs r3, #1 \n" /* r3 = 1. */ + " orrs r2, r3 \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " subs r1, #16 \n" + " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ + " subs r1, #16 \n" + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " mov lr, r5 \n" + " \n" + " restore_general_regs: \n" + " subs r1, #32 \n" + " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ + " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ + " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " subs r1, #48 \n" + " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " subs r1, #32 \n" + " ldmia r1!, {r4-r7} \n" /* Restore r4-r7. */ + " subs r1, #16 \n" + " \n" + " restore_context_done: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " mrs r0, psp \n"/* Read PSP in r0. */ - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " subs r0, r0, #40 \n"/* Make space for PSPLIM, LR and the remaining registers on the stack. */ - " str r0, [r1] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r0!, {r2-r7} \n"/* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */ - " mov r4, r8 \n"/* r4 = r8. */ - " mov r5, r9 \n"/* r5 = r9. */ - " mov r6, r10 \n"/* r6 = r10. */ - " mov r7, r11 \n"/* r7 = r11. */ - " stmia r0!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ - " \n" - " cpsid i \n" - " bl vTaskSwitchContext \n" - " cpsie i \n" - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ - " \n" - " adds r0, r0, #24 \n"/* Move to the high registers. */ - " ldmia r0!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */ - " mov r8, r4 \n"/* r8 = r4. */ - " mov r9, r5 \n"/* r9 = r5. */ - " mov r10, r6 \n"/* r10 = r6. */ - " mov r11, r7 \n"/* r11 = r7. */ - " msr psp, r0 \n"/* Remember the new top of stack for the task. */ - " subs r0, r0, #40 \n"/* Move to the starting of the saved context. */ - " ldmia r0!, {r2-r7} \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */ - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " bx r3 \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " mrs r0, psp \n" /* Read PSP in r0. */ + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " subs r0, r0, #40 \n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */ + " str r0, [r1] \n" /* Save the new top of stack in TCB. */ + " mrs r2, psplim \n" /* r2 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmia r0!, {r2-r7} \n" /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */ + " mov r4, r8 \n" /* r4 = r8. */ + " mov r5, r9 \n" /* r5 = r9. */ + " mov r6, r10 \n" /* r6 = r10. */ + " mov r7, r11 \n" /* r7 = r11. */ + " stmia r0!, {r4-r7} \n" /* Store the high registers that are not saved automatically. */ + " \n" + " cpsid i \n" + " bl vTaskSwitchContext \n" + " cpsie i \n" + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ + " \n" + " adds r0, r0, #24 \n" /* Move to the high registers. */ + " ldmia r0!, {r4-r7} \n" /* Restore the high registers that are not automatically restored. */ + " mov r8, r4 \n" /* r8 = r4. */ + " mov r9, r5 \n" /* r9 = r5. */ + " mov r10, r6 \n" /* r10 = r6. */ + " mov r11, r7 \n" /* r11 = r7. */ + " msr psp, r0 \n" /* Remember the new top of stack for the task. */ + " subs r0, r0, #40 \n" /* Move to the starting of the saved context. */ + " ldmia r0!, {r2-r7} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */ + " msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ + " bx r3 \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "movs r0, #4 \n" - "mov r1, lr \n" - "tst r0, r1 \n" - "beq stack_on_msp \n" - "stack_on_psp: \n" - " mrs r0, psp \n" - " b route_svc \n" - "stack_on_msp: \n" - " mrs r0, msp \n" - " b route_svc \n" - " \n" - "route_svc: \n" - " ldr r2, [r0, #24] \n" - " subs r2, #2 \n" - " ldrb r3, [r2, #0] \n" - " cmp r3, %0 \n" - " beq system_call_enter \n" - " cmp r3, %1 \n" - " beq system_call_enter_1 \n" - " cmp r3, %2 \n" - " beq system_call_exit \n" - " b vPortSVCHandler_C \n" - " \n" - "system_call_enter: \n" - " b vSystemCallEnter \n" - "system_call_enter_1: \n" - " b vSystemCallEnter_1 \n" - "system_call_exit: \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "r3", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "movs r0, #4 \n" + "mov r1, lr \n" + "tst r0, r1 \n" + "beq stack_on_msp \n" + "stack_on_psp: \n" + " mrs r0, psp \n" + " b route_svc \n" + "stack_on_msp: \n" + " mrs r0, msp \n" + " b route_svc \n" + " \n" + "route_svc: \n" + " ldr r3, [r0, #24] \n" + " subs r3, #2 \n" + " ldrb r2, [r3, #0] \n" + " cmp r2, %0 \n" + " blt system_call_enter \n" + " cmp r2, %1 \n" + " beq system_call_exit \n" + " b vPortSVCHandler_C \n" + " \n" + "system_call_enter: \n" + " b vSystemCallEnter \n" + "system_call_exit: \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "r3", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " movs r0, #4 \n" - " mov r1, lr \n" - " tst r0, r1 \n" - " beq stacking_used_msp \n" - " mrs r0, psp \n" - " ldr r2, svchandler_address_const \n" - " bx r2 \n" - " stacking_used_msp: \n" - " mrs r0, msp \n" - " ldr r2, svchandler_address_const \n" - " bx r2 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " movs r0, #4 \n" + " mov r1, lr \n" + " tst r0, r1 \n" + " beq stacking_used_msp \n" + " mrs r0, psp \n" + " ldr r2, svchandler_address_const \n" + " bx r2 \n" + " stacking_used_msp: \n" + " mrs r0, msp \n" + " ldr r2, svchandler_address_const \n" + " bx r2 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c index 5c01e02d6..dca4ec1e4 100644 --- a/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2069 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.c b/portable/GCC/ARM_CM33/non_secure/portasm.c index 2f18b44c4..54de64d36 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33/non_secure/portasm.c @@ -36,122 +36,125 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " \n" - " restore_general_regs_first_task: \n" - " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ - " \n" - " restore_context_done_first_task: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xSecureContextConst2: .word xSecureContext \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " \n" + " restore_general_regs_first_task: \n" + " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ + " \n" + " restore_context_done_first_task: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xSecureContextConst2: .word xSecureContext \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ - " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ - " ldr r4, xSecureContextConst2 \n" - " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ - " movs r1, #2 \n" /* r1 = 2. */ - " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n" /* Discard everything up to r0. */ - " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx r3 \n" /* Finally, branch to EXC_RETURN. */ - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - "xSecureContextConst2: .word xSecureContext \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ + " ldr r4, xSecureContextConst2 \n" + " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx r3 \n" /* Finally, branch to EXC_RETURN. */ + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + "xSecureContextConst2: .word xSecureContext \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -162,12 +165,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -181,10 +184,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " bic r0, #1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " bic r0, #1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -196,10 +199,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -211,15 +214,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -235,12 +238,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT ( " .syntax unified \n" " \n" - " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */ - " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } @@ -252,10 +255,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att ( " .syntax unified \n" " \n" - " msr basepri, r0 \n"/* basepri = ulMask. */ + " msr basepri, r0 \n" /* basepri = ulMask. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -263,320 +266,313 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ - " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ - " \n" - " cbz r0, save_ns_context \n" /* No secure context to save. */ - " save_s_context: \n" - " push {r0-r2, lr} \n" - " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r2, lr} \n" - " \n" - " save_ns_context: \n" - " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ - " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " save_general_regs: \n" - " mrs r3, psp \n" - " \n" - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */ - " tst lr, #0x10 \n" - " ittt eq \n" - " vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */ - " vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ - " vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */ - " sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " stmia r2!, {r4-r11} \n" /* Store r4-r11. */ - " ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ - " stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psp \n" /* r3 = PSP. */ - " mrs r4, psplim \n" /* r4 = PSPLIM. */ - " mrs r5, control \n" /* r5 = CONTROL. */ - " stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" /* r0 = 0. */ - " msr basepri, r0 \n" /* Enable interrupts. */ - " \n" - " program_mpu: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " save_s_context: \n" + " push {r0-r2, lr} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r2, lr} \n" + " \n" + " save_ns_context: \n" + " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ + " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " save_general_regs: \n" + " mrs r3, psp \n" + " \n" + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */ + " tst lr, #0x10 \n" + " ittt eq \n" + " vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */ + " vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ + " vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */ + " sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " stmia r2!, {r4-r11} \n" /* Store r4-r11. */ + " ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ + " stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psp \n" /* r3 = PSP. */ + " mrs r4, psplim \n" /* r4 = PSPLIM. */ + " mrs r5, control \n" /* r5 = CONTROL. */ + " stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " program_mpu: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " cbz r0, restore_ns_context \n" /* No secure context to restore. */ - " \n" - " restore_s_context: \n" - " push {r1-r3, lr} \n" - " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r1-r3, lr} \n" - " \n" - " restore_ns_context: \n" - " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ - " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " restore_general_regs: \n" - " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n" - " ittt eq \n" - " vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ - " vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ - " vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " restore_context_done: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xSecureContextConst: .word xSecureContext \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " cbz r0, restore_ns_context \n" /* No secure context to restore. */ + " \n" + " restore_s_context: \n" + " push {r1-r3, lr} \n" + " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r1-r3, lr} \n" + " \n" + " restore_ns_context: \n" + " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ + " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " restore_general_regs: \n" + " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " tst lr, #0x10 \n" + " ittt eq \n" + " vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ + " vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ + " vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " restore_context_done: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xSecureContextConst: .word xSecureContext \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ - " mrs r2, psp \n"/* Read PSP in r2. */ - " \n" - " cbz r0, save_ns_context \n"/* No secure context to save. */ - " push {r0-r2, r14} \n" - " bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r3} \n"/* LR is now in r3. */ - " mov lr, r3 \n"/* LR = r3. */ - " lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB.*/ - " subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " b select_next_task \n" - " \n" - " save_ns_context: \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " mrs r2, psp \n" /* Read PSP in r2. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " push {r0-r2, r14} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r3} \n" /* LR is now in r3. */ + " mov lr, r3 \n" /* LR = r3. */ + " lsls r1, r3, #25 \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl save_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB.*/ + " subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " b select_next_task \n" + " \n" + " save_ns_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ - " it eq \n" - " vstmdbeq r2!, {s16-s31} \n"/* Store the additional FP context registers which are not saved automatically. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " it eq \n" + " vstmdbeq r2!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " adds r2, r2, #12 \n"/* r2 = r2 + 12. */ - " stm r2, {r4-r11} \n"/* Store the registers that are not saved automatically. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " subs r2, r2, #12 \n"/* r2 = r2 - 12. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n"/* r0 = 0. */ - " msr basepri, r0 \n"/* Enable interrupts. */ - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ - " \n" - " ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ - " mov lr, r4 \n"/* LR = r4. */ - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r3] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " push {r2, r4} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r2, r4} \n" - " mov lr, r4 \n"/* LR = r4. */ - " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " restore_ns_context: \n" - " ldmia r2!, {r4-r11} \n"/* Restore the registers that are not automatically restored. */ + " subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " adds r2, r2, #12 \n" /* r2 = r2 + 12. */ + " stm r2, {r4-r11} \n" /* Store the registers that are not saved automatically. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " subs r2, r2, #12 \n" /* r2 = r2 - 12. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ + " \n" + " ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + " msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ + " mov lr, r4 \n" /* LR = r4. */ + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n" /* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n" /* LR = r4. */ + " lsls r1, r4, #25 \n" /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " restore_ns_context: \n" + " ldmia r2!, {r4-r11} \n" /* Restore the registers that are not automatically restored. */ #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ - " it eq \n" - " vldmiaeq r2!, {s16-s31} \n"/* Restore the additional FP context registers which are not restored automatically. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " it eq \n" + " vldmiaeq r2!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - "xSecureContextConst: .word xSecureContext \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + "xSecureContextConst: .word xSecureContext \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq syscall_enter \n" - "cmp r2, %1 \n" - "beq syscall_enter_1 \n" - "cmp r2, %2 \n" - "beq syscall_exit \n" - "b vPortSVCHandler_C \n" - " \n" - "syscall_enter: \n" - " mov r1, lr \n" - " b vSystemCallEnter \n" - " \n" - "syscall_enter_1: \n" - " mov r1, lr \n" - " b vSystemCallEnter_1 \n" - " \n" - "syscall_exit: \n" - " mov r1, lr \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r1, [r0, #24] \n" + "ldrb r2, [r1, #-2] \n" + "cmp r2, %0 \n" + "blt syscall_enter \n" + "cmp r2, %1 \n" + "beq syscall_exit \n" + "b vPortSVCHandler_C \n" + " \n" + "syscall_enter: \n" + " mov r1, lr \n" + " b vSystemCallEnter \n" + " \n" + "syscall_exit: \n" + " mov r1, lr \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, svchandler_address_const \n" - " bx r1 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, svchandler_address_const \n" + " bx r1 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -587,8 +583,8 @@ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ ( ( " .syntax unified \n" " \n" - " svc %0 \n"/* Secure context is allocated in the supervisor call. */ - " bx lr \n"/* Return. */ + " svc %0 \n" /* Secure context is allocated in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory" ); } @@ -600,12 +596,12 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR ( " .syntax unified \n" " \n" - " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ - " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ - " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ + " ldr r2, [r0] \n" /* The first item in the TCB is the top of the stack. */ + " ldr r1, [r2] \n" /* The first item on the stack is the task's xSecureContext. */ + " cmp r1, #0 \n" /* Raise svc if task's xSecureContext is not NULL. */ " it ne \n" - " svcne %0 \n"/* Secure context is freed in the supervisor call. */ - " bx lr \n"/* Return. */ + " svcne %0 \n" /* Secure context is freed in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory" ); } diff --git a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c index 5c01e02d6..dca4ec1e4 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2069 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c index b6a86cfd2..9d5ff50fc 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c @@ -36,117 +36,120 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " \n" - " restore_general_regs_first_task: \n" - " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ - " \n" - " restore_context_done_first_task: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + #if ( configTOTAL_MPU_REGIONS == 16 ) + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + #endif /* configTOTAL_MPU_REGIONS == 16 */ + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " \n" + " restore_general_regs_first_task: \n" + " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ + " \n" + " restore_context_done_first_task: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r2} \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ - " msr psplim, r1 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ - " bx r2 \n"/* Finally, branch to EXC_RETURN. */ - " \n" - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ + " msr psplim, r1 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx r2 \n" /* Finally, branch to EXC_RETURN. */ + " \n" + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -157,12 +160,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -176,10 +179,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " bic r0, #1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " bic r0, #1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -191,10 +194,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -206,15 +209,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -230,12 +233,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT ( " .syntax unified \n" " \n" - " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */ - " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } @@ -247,10 +250,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att ( " .syntax unified \n" " \n" - " msr basepri, r0 \n"/* basepri = ulMask. */ + " msr basepri, r0 \n" /* basepri = ulMask. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -258,246 +261,239 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ - " mrs r2, psp \n" /* r2 = PSP. */ - " \n" - " save_general_regs: \n" - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " add r2, r2, #0x20 \n" /* Move r2 to location where s0 is saved. */ - " tst lr, #0x10 \n" - " ittt eq \n" - " vstmiaeq r1!, {s16-s31} \n" /* Store s16-s31. */ - " vldmiaeq r2, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ - " vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */ - " sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " stmia r1!, {r4-r11} \n" /* Store r4-r11. */ - " ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ - " stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psplim \n" /* r3 = PSPLIM. */ - " mrs r4, control \n" /* r4 = CONTROL. */ - " stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" /* r0 = 0. */ - " msr basepri, r0 \n" /* Enable interrupts. */ - " \n" - " program_mpu: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " \n" - " restore_general_regs: \n" - " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n" - " ittt eq \n" - " vldmdbeq r1!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ - " vstmiaeq r2!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ - " vldmdbeq r1!, {s16-s31} \n" /* Restore s16-s31. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " restore_context_done: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ + " mrs r2, psp \n" /* r2 = PSP. */ + " \n" + " save_general_regs: \n" + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " add r2, r2, #0x20 \n" /* Move r2 to location where s0 is saved. */ + " tst lr, #0x10 \n" + " ittt eq \n" + " vstmiaeq r1!, {s16-s31} \n" /* Store s16-s31. */ + " vldmiaeq r2, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ + " vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */ + " sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " stmia r1!, {r4-r11} \n" /* Store r4-r11. */ + " ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ + " stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psplim \n" /* r3 = PSPLIM. */ + " mrs r4, control \n" /* r4 = CONTROL. */ + " stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " program_mpu: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + #if ( configTOTAL_MPU_REGIONS == 16 ) + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + #endif /* configTOTAL_MPU_REGIONS == 16 */ + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " \n" + " restore_general_regs: \n" + " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " tst lr, #0x10 \n" + " ittt eq \n" + " vldmdbeq r1!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ + " vstmiaeq r2!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ + " vldmdbeq r1!, {s16-s31} \n" /* Restore s16-s31. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " restore_context_done: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " mrs r0, psp \n"/* Read PSP in r0. */ - " \n" + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " mrs r0, psp \n" /* Read PSP in r0. */ + " \n" #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " it eq \n" - " vstmdbeq r0!, {s16-s31} \n"/* Store the additional FP context registers which are not saved automatically. */ + " vstmdbeq r0!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmdb r0!, {r2-r11} \n"/* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " str r0, [r1] \n"/* Save the new top of stack in TCB. */ - " \n" - " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n"/* r0 = 0. */ - " msr basepri, r0 \n"/* Enable interrupts. */ - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ - " \n" - " ldmia r0!, {r2-r11} \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ - " \n" + " \n" + " mrs r2, psplim \n" /* r2 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmdb r0!, {r2-r11} \n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " str r0, [r1] \n" /* Save the new top of stack in TCB. */ + " \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ + " \n" + " ldmia r0!, {r2-r11} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ + " \n" #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst r3, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " tst r3, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " it eq \n" - " vldmiaeq r0!, {s16-s31} \n"/* Restore the additional FP context registers which are not restored automatically. */ + " vldmiaeq r0!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " msr psp, r0 \n"/* Remember the new top of stack for the task. */ - " bx r3 \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " \n" + " msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ + " msr psp, r0 \n" /* Remember the new top of stack for the task. */ + " bx r3 \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq syscall_enter \n" - "cmp r2, %1 \n" - "beq syscall_enter_1 \n" - "cmp r2, %2 \n" - "beq syscall_exit \n" - "b vPortSVCHandler_C \n" - " \n" - "syscall_enter: \n" - " mov r1, lr \n" - " b vSystemCallEnter \n" - " \n" - "syscall_enter_1: \n" - " mov r1, lr \n" - " b vSystemCallEnter_1 \n" - " \n" - "syscall_exit: \n" - " mov r1, lr \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r1, [r0, #24] \n" + "ldrb r2, [r1, #-2] \n" + "cmp r2, %0 \n" + "blt syscall_enter \n" + "cmp r2, %1 \n" + "beq syscall_exit \n" + "b vPortSVCHandler_C \n" + " \n" + "syscall_enter: \n" + " mov r1, lr \n" + " b vSystemCallEnter \n" + " \n" + "syscall_exit: \n" + " mov r1, lr \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, svchandler_address_const \n" - " bx r1 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, svchandler_address_const \n" + " bx r1 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c index 5c01e02d6..dca4ec1e4 100644 --- a/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2069 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/GCC/ARM_CM35P/non_secure/port.c b/portable/GCC/ARM_CM35P/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/GCC/ARM_CM35P/non_secure/port.c +++ b/portable/GCC/ARM_CM35P/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/GCC/ARM_CM35P/non_secure/portasm.c b/portable/GCC/ARM_CM35P/non_secure/portasm.c index 2f18b44c4..54de64d36 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portasm.c +++ b/portable/GCC/ARM_CM35P/non_secure/portasm.c @@ -36,122 +36,125 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " \n" - " restore_general_regs_first_task: \n" - " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ - " \n" - " restore_context_done_first_task: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xSecureContextConst2: .word xSecureContext \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " \n" + " restore_general_regs_first_task: \n" + " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ + " \n" + " restore_context_done_first_task: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xSecureContextConst2: .word xSecureContext \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ - " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ - " ldr r4, xSecureContextConst2 \n" - " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ - " movs r1, #2 \n" /* r1 = 2. */ - " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n" /* Discard everything up to r0. */ - " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx r3 \n" /* Finally, branch to EXC_RETURN. */ - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - "xSecureContextConst2: .word xSecureContext \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ + " ldr r4, xSecureContextConst2 \n" + " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx r3 \n" /* Finally, branch to EXC_RETURN. */ + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + "xSecureContextConst2: .word xSecureContext \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -162,12 +165,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -181,10 +184,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " bic r0, #1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " bic r0, #1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -196,10 +199,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -211,15 +214,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -235,12 +238,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT ( " .syntax unified \n" " \n" - " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */ - " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } @@ -252,10 +255,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att ( " .syntax unified \n" " \n" - " msr basepri, r0 \n"/* basepri = ulMask. */ + " msr basepri, r0 \n" /* basepri = ulMask. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -263,320 +266,313 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ - " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ - " \n" - " cbz r0, save_ns_context \n" /* No secure context to save. */ - " save_s_context: \n" - " push {r0-r2, lr} \n" - " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r2, lr} \n" - " \n" - " save_ns_context: \n" - " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ - " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " save_general_regs: \n" - " mrs r3, psp \n" - " \n" - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */ - " tst lr, #0x10 \n" - " ittt eq \n" - " vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */ - " vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ - " vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */ - " sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " stmia r2!, {r4-r11} \n" /* Store r4-r11. */ - " ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ - " stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psp \n" /* r3 = PSP. */ - " mrs r4, psplim \n" /* r4 = PSPLIM. */ - " mrs r5, control \n" /* r5 = CONTROL. */ - " stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" /* r0 = 0. */ - " msr basepri, r0 \n" /* Enable interrupts. */ - " \n" - " program_mpu: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " save_s_context: \n" + " push {r0-r2, lr} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r2, lr} \n" + " \n" + " save_ns_context: \n" + " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ + " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " save_general_regs: \n" + " mrs r3, psp \n" + " \n" + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */ + " tst lr, #0x10 \n" + " ittt eq \n" + " vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */ + " vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ + " vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */ + " sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " stmia r2!, {r4-r11} \n" /* Store r4-r11. */ + " ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ + " stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psp \n" /* r3 = PSP. */ + " mrs r4, psplim \n" /* r4 = PSPLIM. */ + " mrs r5, control \n" /* r5 = CONTROL. */ + " stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " program_mpu: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " cbz r0, restore_ns_context \n" /* No secure context to restore. */ - " \n" - " restore_s_context: \n" - " push {r1-r3, lr} \n" - " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r1-r3, lr} \n" - " \n" - " restore_ns_context: \n" - " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ - " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " restore_general_regs: \n" - " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n" - " ittt eq \n" - " vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ - " vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ - " vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " restore_context_done: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xSecureContextConst: .word xSecureContext \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " cbz r0, restore_ns_context \n" /* No secure context to restore. */ + " \n" + " restore_s_context: \n" + " push {r1-r3, lr} \n" + " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r1-r3, lr} \n" + " \n" + " restore_ns_context: \n" + " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ + " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " restore_general_regs: \n" + " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " tst lr, #0x10 \n" + " ittt eq \n" + " vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ + " vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ + " vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " restore_context_done: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xSecureContextConst: .word xSecureContext \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ - " mrs r2, psp \n"/* Read PSP in r2. */ - " \n" - " cbz r0, save_ns_context \n"/* No secure context to save. */ - " push {r0-r2, r14} \n" - " bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r3} \n"/* LR is now in r3. */ - " mov lr, r3 \n"/* LR = r3. */ - " lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB.*/ - " subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " b select_next_task \n" - " \n" - " save_ns_context: \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " mrs r2, psp \n" /* Read PSP in r2. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " push {r0-r2, r14} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r3} \n" /* LR is now in r3. */ + " mov lr, r3 \n" /* LR = r3. */ + " lsls r1, r3, #25 \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl save_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB.*/ + " subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " b select_next_task \n" + " \n" + " save_ns_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ - " it eq \n" - " vstmdbeq r2!, {s16-s31} \n"/* Store the additional FP context registers which are not saved automatically. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " it eq \n" + " vstmdbeq r2!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " adds r2, r2, #12 \n"/* r2 = r2 + 12. */ - " stm r2, {r4-r11} \n"/* Store the registers that are not saved automatically. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " subs r2, r2, #12 \n"/* r2 = r2 - 12. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n"/* r0 = 0. */ - " msr basepri, r0 \n"/* Enable interrupts. */ - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ - " \n" - " ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ - " mov lr, r4 \n"/* LR = r4. */ - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r3] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " push {r2, r4} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r2, r4} \n" - " mov lr, r4 \n"/* LR = r4. */ - " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " restore_ns_context: \n" - " ldmia r2!, {r4-r11} \n"/* Restore the registers that are not automatically restored. */ + " subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " adds r2, r2, #12 \n" /* r2 = r2 + 12. */ + " stm r2, {r4-r11} \n" /* Store the registers that are not saved automatically. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " subs r2, r2, #12 \n" /* r2 = r2 - 12. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ + " \n" + " ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + " msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ + " mov lr, r4 \n" /* LR = r4. */ + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n" /* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n" /* LR = r4. */ + " lsls r1, r4, #25 \n" /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " restore_ns_context: \n" + " ldmia r2!, {r4-r11} \n" /* Restore the registers that are not automatically restored. */ #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ - " it eq \n" - " vldmiaeq r2!, {s16-s31} \n"/* Restore the additional FP context registers which are not restored automatically. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " it eq \n" + " vldmiaeq r2!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - "xSecureContextConst: .word xSecureContext \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + "xSecureContextConst: .word xSecureContext \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq syscall_enter \n" - "cmp r2, %1 \n" - "beq syscall_enter_1 \n" - "cmp r2, %2 \n" - "beq syscall_exit \n" - "b vPortSVCHandler_C \n" - " \n" - "syscall_enter: \n" - " mov r1, lr \n" - " b vSystemCallEnter \n" - " \n" - "syscall_enter_1: \n" - " mov r1, lr \n" - " b vSystemCallEnter_1 \n" - " \n" - "syscall_exit: \n" - " mov r1, lr \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r1, [r0, #24] \n" + "ldrb r2, [r1, #-2] \n" + "cmp r2, %0 \n" + "blt syscall_enter \n" + "cmp r2, %1 \n" + "beq syscall_exit \n" + "b vPortSVCHandler_C \n" + " \n" + "syscall_enter: \n" + " mov r1, lr \n" + " b vSystemCallEnter \n" + " \n" + "syscall_exit: \n" + " mov r1, lr \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, svchandler_address_const \n" - " bx r1 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, svchandler_address_const \n" + " bx r1 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -587,8 +583,8 @@ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ ( ( " .syntax unified \n" " \n" - " svc %0 \n"/* Secure context is allocated in the supervisor call. */ - " bx lr \n"/* Return. */ + " svc %0 \n" /* Secure context is allocated in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory" ); } @@ -600,12 +596,12 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR ( " .syntax unified \n" " \n" - " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ - " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ - " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ + " ldr r2, [r0] \n" /* The first item in the TCB is the top of the stack. */ + " ldr r1, [r2] \n" /* The first item on the stack is the task's xSecureContext. */ + " cmp r1, #0 \n" /* Raise svc if task's xSecureContext is not NULL. */ " it ne \n" - " svcne %0 \n"/* Secure context is freed in the supervisor call. */ - " bx lr \n"/* Return. */ + " svcne %0 \n" /* Secure context is freed in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory" ); } diff --git a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c index 5c01e02d6..dca4ec1e4 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2069 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c index b6a86cfd2..9d5ff50fc 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c @@ -36,117 +36,120 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " \n" - " restore_general_regs_first_task: \n" - " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ - " \n" - " restore_context_done_first_task: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + #if ( configTOTAL_MPU_REGIONS == 16 ) + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + #endif /* configTOTAL_MPU_REGIONS == 16 */ + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " \n" + " restore_general_regs_first_task: \n" + " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ + " \n" + " restore_context_done_first_task: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r2} \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ - " msr psplim, r1 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ - " bx r2 \n"/* Finally, branch to EXC_RETURN. */ - " \n" - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ + " msr psplim, r1 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx r2 \n" /* Finally, branch to EXC_RETURN. */ + " \n" + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -157,12 +160,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -176,10 +179,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " bic r0, #1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " bic r0, #1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -191,10 +194,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -206,15 +209,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -230,12 +233,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT ( " .syntax unified \n" " \n" - " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */ - " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } @@ -247,10 +250,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att ( " .syntax unified \n" " \n" - " msr basepri, r0 \n"/* basepri = ulMask. */ + " msr basepri, r0 \n" /* basepri = ulMask. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -258,246 +261,239 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ - " mrs r2, psp \n" /* r2 = PSP. */ - " \n" - " save_general_regs: \n" - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " add r2, r2, #0x20 \n" /* Move r2 to location where s0 is saved. */ - " tst lr, #0x10 \n" - " ittt eq \n" - " vstmiaeq r1!, {s16-s31} \n" /* Store s16-s31. */ - " vldmiaeq r2, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ - " vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */ - " sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " stmia r1!, {r4-r11} \n" /* Store r4-r11. */ - " ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ - " stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psplim \n" /* r3 = PSPLIM. */ - " mrs r4, control \n" /* r4 = CONTROL. */ - " stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" /* r0 = 0. */ - " msr basepri, r0 \n" /* Enable interrupts. */ - " \n" - " program_mpu: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " \n" - " restore_general_regs: \n" - " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n" - " ittt eq \n" - " vldmdbeq r1!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ - " vstmiaeq r2!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ - " vldmdbeq r1!, {s16-s31} \n" /* Restore s16-s31. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " restore_context_done: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ + " mrs r2, psp \n" /* r2 = PSP. */ + " \n" + " save_general_regs: \n" + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " add r2, r2, #0x20 \n" /* Move r2 to location where s0 is saved. */ + " tst lr, #0x10 \n" + " ittt eq \n" + " vstmiaeq r1!, {s16-s31} \n" /* Store s16-s31. */ + " vldmiaeq r2, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ + " vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */ + " sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " stmia r1!, {r4-r11} \n" /* Store r4-r11. */ + " ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ + " stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psplim \n" /* r3 = PSPLIM. */ + " mrs r4, control \n" /* r4 = CONTROL. */ + " stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " program_mpu: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + #if ( configTOTAL_MPU_REGIONS == 16 ) + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + #endif /* configTOTAL_MPU_REGIONS == 16 */ + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " \n" + " restore_general_regs: \n" + " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " tst lr, #0x10 \n" + " ittt eq \n" + " vldmdbeq r1!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ + " vstmiaeq r2!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ + " vldmdbeq r1!, {s16-s31} \n" /* Restore s16-s31. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " restore_context_done: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " mrs r0, psp \n"/* Read PSP in r0. */ - " \n" + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " mrs r0, psp \n" /* Read PSP in r0. */ + " \n" #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " it eq \n" - " vstmdbeq r0!, {s16-s31} \n"/* Store the additional FP context registers which are not saved automatically. */ + " vstmdbeq r0!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmdb r0!, {r2-r11} \n"/* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " str r0, [r1] \n"/* Save the new top of stack in TCB. */ - " \n" - " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n"/* r0 = 0. */ - " msr basepri, r0 \n"/* Enable interrupts. */ - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ - " \n" - " ldmia r0!, {r2-r11} \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ - " \n" + " \n" + " mrs r2, psplim \n" /* r2 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmdb r0!, {r2-r11} \n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " str r0, [r1] \n" /* Save the new top of stack in TCB. */ + " \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ + " \n" + " ldmia r0!, {r2-r11} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ + " \n" #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst r3, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " tst r3, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " it eq \n" - " vldmiaeq r0!, {s16-s31} \n"/* Restore the additional FP context registers which are not restored automatically. */ + " vldmiaeq r0!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " msr psp, r0 \n"/* Remember the new top of stack for the task. */ - " bx r3 \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " \n" + " msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ + " msr psp, r0 \n" /* Remember the new top of stack for the task. */ + " bx r3 \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq syscall_enter \n" - "cmp r2, %1 \n" - "beq syscall_enter_1 \n" - "cmp r2, %2 \n" - "beq syscall_exit \n" - "b vPortSVCHandler_C \n" - " \n" - "syscall_enter: \n" - " mov r1, lr \n" - " b vSystemCallEnter \n" - " \n" - "syscall_enter_1: \n" - " mov r1, lr \n" - " b vSystemCallEnter_1 \n" - " \n" - "syscall_exit: \n" - " mov r1, lr \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r1, [r0, #24] \n" + "ldrb r2, [r1, #-2] \n" + "cmp r2, %0 \n" + "blt syscall_enter \n" + "cmp r2, %1 \n" + "beq syscall_exit \n" + "b vPortSVCHandler_C \n" + " \n" + "syscall_enter: \n" + " mov r1, lr \n" + " b vSystemCallEnter \n" + " \n" + "syscall_exit: \n" + " mov r1, lr \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, svchandler_address_const \n" - " bx r1 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, svchandler_address_const \n" + " bx r1 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c index 076a1e754..33e2a8670 100644 --- a/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2068 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c old mode 100755 new mode 100644 index 7b74545da..fd00078c4 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -38,6 +38,7 @@ /* Scheduler includes. */ #include "FreeRTOS.h" #include "task.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE @@ -188,7 +189,7 @@ void vResetPrivilege( void ) __attribute__( ( naked ) ); /** * @brief Enter critical section. */ -#if( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) +#if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) void vPortEnterCritical( void ) FREERTOS_SYSTEM_CALL; #else void vPortEnterCritical( void ) PRIVILEGED_FUNCTION; @@ -197,7 +198,7 @@ void vResetPrivilege( void ) __attribute__( ( naked ) ); /** * @brief Exit from critical section. */ -#if( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) +#if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) void vPortExitCritical( void ) FREERTOS_SYSTEM_CALL; #else void vPortExitCritical( void ) PRIVILEGED_FUNCTION; @@ -205,29 +206,24 @@ void vResetPrivilege( void ) __attribute__( ( naked ) ); #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - */ - void vSystemCallEnter( uint32_t * pulTaskStack ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -325,56 +321,53 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vPortSVCHandler( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq vSystemCallEnter \n" - "cmp r2, %1 \n" - "beq vSystemCallEnter_1 \n" - "cmp r2, %2 \n" - "beq vSystemCallExit \n" - "b vSVCHandler_C \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void vPortSVCHandler( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r2, [r0, #24] \n" + "ldrb r1, [r2, #-2] \n" + "cmp r1, %0 \n" + "blt vSystemCallEnter \n" + "cmp r1, %1 \n" + "beq vSystemCallExit \n" + "b vSVCHandler_C \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void vPortSVCHandler( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ -{ - /* Assumes psp was in use. */ - __asm volatile - ( - #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */ - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - #else - " mrs r0, psp \n" - #endif - " b %0 \n" - ::"i" ( vSVCHandler_C ) : "r0", "memory" - ); -} + void vPortSVCHandler( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ + { + /* Assumes psp was in use. */ + __asm volatile + ( + #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */ + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + #else + " mrs r0, psp \n" + #endif + " b %0 \n" + ::"i" ( vSVCHandler_C ) : "r0", "memory" + ); + } #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -384,11 +377,10 @@ void vSVCHandler_C( uint32_t * pulParam ) /* PRIVILEGED_FUNCTION */ uint8_t ucSVCNumber; uint32_t ulPC; - #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) + #if ( ( configUSE_MPU_WRAPPERS_V1 == 1 ) && ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ + * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; extern uint32_t * __syscalls_flash_end__; #else @@ -396,7 +388,7 @@ void vSVCHandler_C( uint32_t * pulParam ) /* PRIVILEGED_FUNCTION */ extern uint32_t __syscalls_flash_start__[]; extern uint32_t __syscalls_flash_end__[]; #endif /* #if defined( __ARMCC_VERSION ) */ - #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + #endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 1 ) && ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) ) */ /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first * argument (r0) is pulParam[ 0 ]. */ @@ -422,281 +414,240 @@ void vSVCHandler_C( uint32_t * pulParam ) /* PRIVILEGED_FUNCTION */ break; - #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) - case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the - * svc was raised from any of the - * system calls. */ + #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) + #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) + case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the + * svc was raised from any of the + * system calls. */ - if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) ) - { - __asm volatile - ( - " mrs r1, control \n"/* Obtain current control value. */ - " bic r1, #1 \n"/* Set privilege bit. */ - " msr control, r1 \n"/* Write back new control value. */ - ::: "r1", "memory" - ); - } - - break; - #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ - case portSVC_RAISE_PRIVILEGE: + if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) ) + { __asm volatile ( - " mrs r1, control \n"/* Obtain current control value. */ - " bic r1, #1 \n"/* Set privilege bit. */ - " msr control, r1 \n"/* Write back new control value. */ + " mrs r1, control \n" /* Obtain current control value. */ + " bic r1, #1 \n" /* Set privilege bit. */ + " msr control, r1 \n" /* Write back new control value. */ ::: "r1", "memory" ); - break; - #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + } - default: /* Unknown SVC call. */ - break; + break; + #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + case portSVC_RAISE_PRIVILEGE: + __asm volatile + ( + " mrs r1, control \n" /* Obtain current control value. */ + " bic r1, #1 \n" /* Set privilege bit. */ + " msr control, r1 \n" /* Write back new control value. */ + ::: "r1", "memory" + ); + break; + #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */ + + default: /* Unknown SVC call. */ + break; } } /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallEnter( uint32_t * pulTaskStack ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulSystemCallLocation, i; - const uint32_t ulStackFrameSize = 8; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulSystemCallLocation, i; + const uint32_t ulStackFrameSize = 8; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r1, control \n" /* Obtain current control value. */ + " bic r1, #1 \n" /* Clear nPRIV bit. */ + " msr control, r1 \n" /* Write back new control value. */ + ::: "r1", "memory" + ); + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; + } + else + { + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); + } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r1, control \n" /* Obtain current control value. */ - " bic r1, #1 \n" /* Clear nPRIV bit. */ - " msr control, r1 \n" /* Write back new control value. */ - ::: "r1", "memory" - ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Store the value of the Link Register before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallEnter_1( uint32_t * pulTaskStack ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulSystemCallLocation, i; - const uint32_t ulStackFrameSize = 8; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r1, control \n" /* Obtain current control value. */ - " bic r1, #1 \n" /* Clear nPRIV bit. */ - " msr control, r1 \n" /* Write back new control value. */ - ::: "r1", "memory" - ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Store the value of the Link Register before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallExit( uint32_t * pulSystemCallStack ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulSystemCallLocation, i; - const uint32_t ulStackFrameSize = 8; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulSystemCallLocation, i; + const uint32_t ulStackFrameSize = 8; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r1, control \n" /* Obtain current control value. */ + " orr r1, #1 \n" /* Set nPRIV bit. */ + " msr control, r1 \n" /* Write back new control value. */ + ::: "r1", "memory" + ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; + } + else + { + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r1, control \n" /* Obtain current control value. */ - " orr r1, #1 \n" /* Set nPRIV bit. */ - " msr control, r1 \n" /* Write back new control value. */ - ::: "r1", "memory" - ); - - /* Restore the stacked link register to what it was at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -774,87 +725,87 @@ static void prvRestoreContextOfFirstTask( void ) BaseType_t xPortStartScheduler( void ) { #if ( configASSERT_DEFINED == 1 ) + { + volatile uint8_t ucOriginalPriority; + volatile uint32_t ulImplementedPrioBits = 0; + volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); + volatile uint8_t ucMaxPriorityValue; + + /* Determine the maximum priority from which ISR safe FreeRTOS API + * functions can be called. ISR safe functions are those that end in + * "FromISR". FreeRTOS maintains separate thread and ISR API functions + * to ensure interrupt entry is as fast and simple as possible. + * + * Save the interrupt priority value that is about to be clobbered. */ + ucOriginalPriority = *pucFirstUserPriorityRegister; + + /* Determine the number of priority bits available. First write to all + * possible bits. */ + *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; + + /* Read the value back to see how many bits stuck. */ + ucMaxPriorityValue = *pucFirstUserPriorityRegister; + + /* Use the same mask on the maximum system call priority. */ + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + + /* Check that the maximum system call priority is nonzero after + * accounting for the number of priority bits supported by the + * hardware. A priority of 0 is invalid because setting the BASEPRI + * register to 0 unmasks all interrupts, and interrupts with priority 0 + * cannot be masked using BASEPRI. + * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ + configASSERT( ucMaxSysCallPriority ); + + /* Check that the bits not implemented in hardware are zero in + * configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U ); + + /* Calculate the maximum acceptable priority group value for the number + * of bits read back. */ + + while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { - volatile uint8_t ucOriginalPriority; - volatile uint32_t ulImplementedPrioBits = 0; - volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; - - /* Determine the maximum priority from which ISR safe FreeRTOS API - * functions can be called. ISR safe functions are those that end in - * "FromISR". FreeRTOS maintains separate thread and ISR API functions - * to ensure interrupt entry is as fast and simple as possible. - * - * Save the interrupt priority value that is about to be clobbered. */ - ucOriginalPriority = *pucFirstUserPriorityRegister; - - /* Determine the number of priority bits available. First write to all - * possible bits. */ - *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; - - /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; - - /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; - - /* Check that the maximum system call priority is nonzero after - * accounting for the number of priority bits supported by the - * hardware. A priority of 0 is invalid because setting the BASEPRI - * register to 0 unmasks all interrupts, and interrupts with priority 0 - * cannot be masked using BASEPRI. - * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ - configASSERT( ucMaxSysCallPriority ); - - /* Check that the bits not implemented in hardware are zero in - * configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U ); - - /* Calculate the maximum acceptable priority group value for the number - * of bits read back. */ - - while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) - { - ulImplementedPrioBits++; - ucMaxPriorityValue <<= ( uint8_t ) 0x01; - } - - if( ulImplementedPrioBits == 8 ) - { - /* When the hardware implements 8 priority bits, there is no way for - * the software to configure PRIGROUP to not have sub-priorities. As - * a result, the least significant bit is always used for sub-priority - * and there are 128 preemption priorities and 2 sub-priorities. - * - * This may cause some confusion in some cases - for example, if - * configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4 - * priority interrupts will be masked in Critical Sections as those - * are at the same preemption priority. This may appear confusing as - * 4 is higher (numerically lower) priority than - * configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not - * have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY - * to 4, this confusion does not happen and the behaviour remains the same. - * - * The following assert ensures that the sub-priority bit in the - * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned - * confusion. */ - configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & 0x1U ) == 0U ); - ulMaxPRIGROUPValue = 0; - } - else - { - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits; - } - - /* Shift the priority group value back to its position within the AIRCR - * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; - - /* Restore the clobbered interrupt priority register to its original - * value. */ - *pucFirstUserPriorityRegister = ucOriginalPriority; + ulImplementedPrioBits++; + ucMaxPriorityValue <<= ( uint8_t ) 0x01; } + + if( ulImplementedPrioBits == 8 ) + { + /* When the hardware implements 8 priority bits, there is no way for + * the software to configure PRIGROUP to not have sub-priorities. As + * a result, the least significant bit is always used for sub-priority + * and there are 128 preemption priorities and 2 sub-priorities. + * + * This may cause some confusion in some cases - for example, if + * configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4 + * priority interrupts will be masked in Critical Sections as those + * are at the same preemption priority. This may appear confusing as + * 4 is higher (numerically lower) priority than + * configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not + * have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY + * to 4, this confusion does not happen and the behaviour remains the same. + * + * The following assert ensures that the sub-priority bit in the + * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned + * confusion. */ + configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & 0x1U ) == 0U ); + ulMaxPRIGROUPValue = 0; + } + else + { + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits; + } + + /* Shift the priority group value back to its position within the AIRCR + * register. */ + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + + /* Restore the clobbered interrupt priority register to its original + * value. */ + *pucFirstUserPriorityRegister = ucOriginalPriority; + } #endif /* configASSERT_DEFINED */ /* Make PendSV and SysTick the same priority as the kernel, and the SVC @@ -874,19 +825,21 @@ BaseType_t xPortStartScheduler( void ) uxCriticalNesting = 0; /* Start the first task. */ - __asm volatile ( - " ldr r0, =0xE000ED08 \n"/* Use the NVIC offset register to locate the stack. */ + __asm volatile + ( + " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */ " ldr r0, [r0] \n" " ldr r0, [r0] \n" - " msr msp, r0 \n"/* Set the msp back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " msr msp, r0 \n" /* Set the msp back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start first task. */ + " svc %0 \n" /* System call to start first task. */ " nop \n" " .ltorg \n" - ::"i" ( portSVC_START_SCHEDULER ) : "memory" ); + ::"i" ( portSVC_START_SCHEDULER ) : "memory" + ); /* Should not get here! */ return 0; @@ -903,39 +856,63 @@ void vPortEndScheduler( void ) void vPortEnterCritical( void ) { -#if( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) - if( portIS_PRIVILEGED() == pdFALSE ) - { - portRAISE_PRIVILEGE(); - portMEMORY_BARRIER(); + #if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + } + #else /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ portDISABLE_INTERRUPTS(); uxCriticalNesting++; - portMEMORY_BARRIER(); - - portRESET_PRIVILEGE(); - portMEMORY_BARRIER(); - } - else - { - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; - } -#else - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; -#endif + #endif /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ } /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { -#if( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) - if( portIS_PRIVILEGED() == pdFALSE ) - { - portRAISE_PRIVILEGE(); - portMEMORY_BARRIER(); + #if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + } + #else /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ configASSERT( uxCriticalNesting ); uxCriticalNesting--; @@ -943,30 +920,7 @@ void vPortExitCritical( void ) { portENABLE_INTERRUPTS(); } - portMEMORY_BARRIER(); - - portRESET_PRIVILEGE(); - portMEMORY_BARRIER(); - } - else - { - configASSERT( uxCriticalNesting ); - uxCriticalNesting--; - - if( uxCriticalNesting == 0 ) - { - portENABLE_INTERRUPTS(); - } - } -#else - configASSERT( uxCriticalNesting ); - uxCriticalNesting--; - - if( uxCriticalNesting == 0 ) - { - portENABLE_INTERRUPTS(); - } -#endif + #endif /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ } /*-----------------------------------------------------------*/ @@ -1167,12 +1121,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ { __asm volatile ( - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -1184,10 +1138,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ { __asm volatile ( - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -1284,11 +1238,13 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegionSettings[ ul ].ulRegionStartAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress; xMPUSettings->xRegionSettings[ ul ].ulRegionEndAddress = ( uint32_t ) ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1UL ); xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = 0UL; + if( ( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_READ_ONLY ) == portMPU_REGION_READ_ONLY ) || ( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) == portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) ) { xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = tskMPU_READ_PERMISSION; } + if( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_READ_WRITE ) == portMPU_REGION_READ_WRITE ) { xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = ( tskMPU_READ_PERMISSION | tskMPU_WRITE_PERMISSION ); diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h index d24445a94..cfc72b17e 100644 --- a/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -153,12 +153,10 @@ /*-----------------------------------------------------------*/ /* SVC numbers for various services. */ - #define portSVC_START_SCHEDULER 0 - #define portSVC_YIELD 1 - #define portSVC_RAISE_PRIVILEGE 2 - #define portSVC_SYSTEM_CALL_ENTER 3 /* System calls with upto 4 parameters. */ - #define portSVC_SYSTEM_CALL_ENTER_1 4 /* System calls with 5 parameters. */ - #define portSVC_SYSTEM_CALL_EXIT 5 +#define portSVC_START_SCHEDULER 100 +#define portSVC_YIELD 101 +#define portSVC_RAISE_PRIVILEGE 102 +#define portSVC_SYSTEM_CALL_EXIT 103 /* Scheduler utilities. */ diff --git a/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c index 076a1e754..33e2a8670 100644 --- a/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2068 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c old mode 100755 new mode 100644 index 28419f014..2a94f04c5 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -38,6 +38,7 @@ /* Scheduler includes. */ #include "FreeRTOS.h" #include "task.h" +#include "mpu_syscall_numbers.h" #ifndef __VFP_FP__ #error This port can only be used when the project options are configured to enable hardware floating point support. @@ -209,7 +210,7 @@ void vResetPrivilege( void ) __attribute__( ( naked ) ); /** * @brief Enter critical section. */ -#if( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) +#if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) void vPortEnterCritical( void ) FREERTOS_SYSTEM_CALL; #else void vPortEnterCritical( void ) PRIVILEGED_FUNCTION; @@ -218,7 +219,7 @@ void vResetPrivilege( void ) __attribute__( ( naked ) ); /** * @brief Exit from critical section. */ -#if( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) +#if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) void vPortExitCritical( void ) FREERTOS_SYSTEM_CALL; #else void vPortExitCritical( void ) PRIVILEGED_FUNCTION; @@ -226,31 +227,26 @@ void vResetPrivilege( void ) __attribute__( ( naked ) ); #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -263,7 +259,8 @@ void vResetPrivilege( void ) __attribute__( ( naked ) ); * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -350,68 +347,61 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vPortSVCHandler( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq syscall_enter \n" - "cmp r2, %1 \n" - "beq syscall_enter_1 \n" - "cmp r2, %2 \n" - "beq syscall_exit \n" - "b vSVCHandler_C \n" - " \n" - "syscall_enter: \n" - " mov r1, lr \n" - " b vSystemCallEnter \n" - " \n" - "syscall_enter_1: \n" - " mov r1, lr \n" - " b vSystemCallEnter_1 \n" - " \n" - "syscall_exit: \n" - " mov r1, lr \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void vPortSVCHandler( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r1, [r0, #24] \n" + "ldrb r2, [r1, #-2] \n" + "cmp r2, %0 \n" + "blt syscall_enter \n" + "cmp r2, %1 \n" + "beq syscall_exit \n" + "b vSVCHandler_C \n" + " \n" + "syscall_enter: \n" + " mov r1, lr \n" + " b vSystemCallEnter \n" + " \n" + "syscall_exit: \n" + " mov r1, lr \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void vPortSVCHandler( void ) -{ - /* Assumes psp was in use. */ - __asm volatile - ( - #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */ - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - #else - " mrs r0, psp \n" - #endif - " b %0 \n" - ::"i" ( vSVCHandler_C ) : "r0", "memory" - ); -} + void vPortSVCHandler( void ) + { + /* Assumes psp was in use. */ + __asm volatile + ( + #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */ + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + #else + " mrs r0, psp \n" + #endif + " b %0 \n" + ::"i" ( vSVCHandler_C ) : "r0", "memory" + ); + } #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -421,11 +411,10 @@ void vSVCHandler_C( uint32_t * pulParam ) /* PRIVILEGED_FUNCTION */ uint8_t ucSVCNumber; uint32_t ulPC; - #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) + #if ( ( configUSE_MPU_WRAPPERS_V1 == 1 ) && ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ + * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; extern uint32_t * __syscalls_flash_end__; #else @@ -433,7 +422,7 @@ void vSVCHandler_C( uint32_t * pulParam ) /* PRIVILEGED_FUNCTION */ extern uint32_t __syscalls_flash_start__[]; extern uint32_t __syscalls_flash_end__[]; #endif /* #if defined( __ARMCC_VERSION ) */ - #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + #endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 1 ) && ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) ) */ /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first * argument (r0) is pulParam[ 0 ]. */ @@ -459,326 +448,274 @@ void vSVCHandler_C( uint32_t * pulParam ) /* PRIVILEGED_FUNCTION */ break; - #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) - case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the - * svc was raised from any of the - * system calls. */ + #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) + #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) + case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the + * svc was raised from any of the + * system calls. */ - if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) ) - { - __asm volatile - ( - " mrs r1, control \n"/* Obtain current control value. */ - " bic r1, #1 \n"/* Set privilege bit. */ - " msr control, r1 \n"/* Write back new control value. */ - ::: "r1", "memory" - ); - } - - break; - #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ - case portSVC_RAISE_PRIVILEGE: + if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) ) + { __asm volatile ( - " mrs r1, control \n"/* Obtain current control value. */ - " bic r1, #1 \n"/* Set privilege bit. */ - " msr control, r1 \n"/* Write back new control value. */ + " mrs r1, control \n" /* Obtain current control value. */ + " bic r1, #1 \n" /* Set privilege bit. */ + " msr control, r1 \n" /* Write back new control value. */ ::: "r1", "memory" ); - break; - #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + } - default: /* Unknown SVC call. */ - break; + break; + #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + case portSVC_RAISE_PRIVILEGE: + __asm volatile + ( + " mrs r1, control \n" /* Obtain current control value. */ + " bic r1, #1 \n" /* Set privilege bit. */ + " msr control, r1 \n" /* Write back new control value. */ + ::: "r1", "memory" + ); + break; + #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */ + + default: /* Unknown SVC call. */ + break; } } /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r1, control \n" /* Obtain current control value. */ + " bic r1, #1 \n" /* Clear nPRIV bit. */ + " msr control, r1 \n" /* Write back new control value. */ + ::: "r1", "memory" + ); + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; + } + else + { + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); + } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r1, control \n" /* Obtain current control value. */ - " bic r1, #1 \n" /* Clear nPRIV bit. */ - " msr control, r1 \n" /* Write back new control value. */ - ::: "r1", "memory" - ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Store the value of the Link Register before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r1, control \n" /* Obtain current control value. */ - " bic r1, #1 \n" /* Clear nPRIV bit. */ - " msr control, r1 \n" /* Write back new control value. */ - ::: "r1", "memory" - ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Store the value of the Link Register before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r1, control \n" /* Obtain current control value. */ + " orr r1, #1 \n" /* Set nPRIV bit. */ + " msr control, r1 \n" /* Write back new control value. */ + ::: "r1", "memory" + ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; + } + else + { + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r1, control \n" /* Obtain current control value. */ - " orr r1, #1 \n" /* Set nPRIV bit. */ - " msr control, r1 \n" /* Write back new control value. */ - ::: "r1", "memory" - ); - - /* Restore the stacked link register to what it was at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -875,87 +812,87 @@ BaseType_t xPortStartScheduler( void ) #endif #if ( configASSERT_DEFINED == 1 ) + { + volatile uint8_t ucOriginalPriority; + volatile uint32_t ulImplementedPrioBits = 0; + volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); + volatile uint8_t ucMaxPriorityValue; + + /* Determine the maximum priority from which ISR safe FreeRTOS API + * functions can be called. ISR safe functions are those that end in + * "FromISR". FreeRTOS maintains separate thread and ISR API functions to + * ensure interrupt entry is as fast and simple as possible. + * + * Save the interrupt priority value that is about to be clobbered. */ + ucOriginalPriority = *pucFirstUserPriorityRegister; + + /* Determine the number of priority bits available. First write to all + * possible bits. */ + *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; + + /* Read the value back to see how many bits stuck. */ + ucMaxPriorityValue = *pucFirstUserPriorityRegister; + + /* Use the same mask on the maximum system call priority. */ + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + + /* Check that the maximum system call priority is nonzero after + * accounting for the number of priority bits supported by the + * hardware. A priority of 0 is invalid because setting the BASEPRI + * register to 0 unmasks all interrupts, and interrupts with priority 0 + * cannot be masked using BASEPRI. + * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ + configASSERT( ucMaxSysCallPriority ); + + /* Check that the bits not implemented in hardware are zero in + * configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U ); + + /* Calculate the maximum acceptable priority group value for the number + * of bits read back. */ + + while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { - volatile uint8_t ucOriginalPriority; - volatile uint32_t ulImplementedPrioBits = 0; - volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; - - /* Determine the maximum priority from which ISR safe FreeRTOS API - * functions can be called. ISR safe functions are those that end in - * "FromISR". FreeRTOS maintains separate thread and ISR API functions to - * ensure interrupt entry is as fast and simple as possible. - * - * Save the interrupt priority value that is about to be clobbered. */ - ucOriginalPriority = *pucFirstUserPriorityRegister; - - /* Determine the number of priority bits available. First write to all - * possible bits. */ - *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; - - /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; - - /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; - - /* Check that the maximum system call priority is nonzero after - * accounting for the number of priority bits supported by the - * hardware. A priority of 0 is invalid because setting the BASEPRI - * register to 0 unmasks all interrupts, and interrupts with priority 0 - * cannot be masked using BASEPRI. - * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ - configASSERT( ucMaxSysCallPriority ); - - /* Check that the bits not implemented in hardware are zero in - * configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U ); - - /* Calculate the maximum acceptable priority group value for the number - * of bits read back. */ - - while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) - { - ulImplementedPrioBits++; - ucMaxPriorityValue <<= ( uint8_t ) 0x01; - } - - if( ulImplementedPrioBits == 8 ) - { - /* When the hardware implements 8 priority bits, there is no way for - * the software to configure PRIGROUP to not have sub-priorities. As - * a result, the least significant bit is always used for sub-priority - * and there are 128 preemption priorities and 2 sub-priorities. - * - * This may cause some confusion in some cases - for example, if - * configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4 - * priority interrupts will be masked in Critical Sections as those - * are at the same preemption priority. This may appear confusing as - * 4 is higher (numerically lower) priority than - * configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not - * have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY - * to 4, this confusion does not happen and the behaviour remains the same. - * - * The following assert ensures that the sub-priority bit in the - * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned - * confusion. */ - configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & 0x1U ) == 0U ); - ulMaxPRIGROUPValue = 0; - } - else - { - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits; - } - - /* Shift the priority group value back to its position within the AIRCR - * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; - - /* Restore the clobbered interrupt priority register to its original - * value. */ - *pucFirstUserPriorityRegister = ucOriginalPriority; + ulImplementedPrioBits++; + ucMaxPriorityValue <<= ( uint8_t ) 0x01; } + + if( ulImplementedPrioBits == 8 ) + { + /* When the hardware implements 8 priority bits, there is no way for + * the software to configure PRIGROUP to not have sub-priorities. As + * a result, the least significant bit is always used for sub-priority + * and there are 128 preemption priorities and 2 sub-priorities. + * + * This may cause some confusion in some cases - for example, if + * configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4 + * priority interrupts will be masked in Critical Sections as those + * are at the same preemption priority. This may appear confusing as + * 4 is higher (numerically lower) priority than + * configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not + * have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY + * to 4, this confusion does not happen and the behaviour remains the same. + * + * The following assert ensures that the sub-priority bit in the + * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned + * confusion. */ + configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & 0x1U ) == 0U ); + ulMaxPRIGROUPValue = 0; + } + else + { + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits; + } + + /* Shift the priority group value back to its position within the AIRCR + * register. */ + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + + /* Restore the clobbered interrupt priority register to its original + * value. */ + *pucFirstUserPriorityRegister = ucOriginalPriority; + } #endif /* configASSERT_DEFINED */ /* Make PendSV and SysTick the same priority as the kernel, and the SVC @@ -984,21 +921,23 @@ BaseType_t xPortStartScheduler( void ) * in use in case the FPU was used before the scheduler was started - which * would otherwise result in the unnecessary leaving of space in the SVC stack * for lazy saving of FPU registers. */ - __asm volatile ( - " ldr r0, =0xE000ED08 \n"/* Use the NVIC offset register to locate the stack. */ + __asm volatile + ( + " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */ " ldr r0, [r0] \n" " ldr r0, [r0] \n" - " msr msp, r0 \n"/* Set the msp back to the start of the stack. */ - " mov r0, #0 \n"/* Clear the bit that indicates the FPU is in use, see comment above. */ + " msr msp, r0 \n" /* Set the msp back to the start of the stack. */ + " mov r0, #0 \n" /* Clear the bit that indicates the FPU is in use, see comment above. */ " msr control, r0 \n" - " cpsie i \n"/* Globally enable interrupts. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start first task. */ + " svc %0 \n" /* System call to start first task. */ " nop \n" " .ltorg \n" - ::"i" ( portSVC_START_SCHEDULER ) : "memory" ); + ::"i" ( portSVC_START_SCHEDULER ) : "memory" + ); /* Should not get here! */ return 0; @@ -1015,39 +954,63 @@ void vPortEndScheduler( void ) void vPortEnterCritical( void ) { -#if( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) - if( portIS_PRIVILEGED() == pdFALSE ) - { - portRAISE_PRIVILEGE(); - portMEMORY_BARRIER(); + #if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + } + #else /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ portDISABLE_INTERRUPTS(); uxCriticalNesting++; - portMEMORY_BARRIER(); - - portRESET_PRIVILEGE(); - portMEMORY_BARRIER(); - } - else - { - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; - } -#else - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; -#endif + #endif /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ } /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { -#if( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) - if( portIS_PRIVILEGED() == pdFALSE ) - { - portRAISE_PRIVILEGE(); - portMEMORY_BARRIER(); + #if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + } + #else /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ configASSERT( uxCriticalNesting ); uxCriticalNesting--; @@ -1055,30 +1018,7 @@ void vPortExitCritical( void ) { portENABLE_INTERRUPTS(); } - portMEMORY_BARRIER(); - - portRESET_PRIVILEGE(); - portMEMORY_BARRIER(); - } - else - { - configASSERT( uxCriticalNesting ); - uxCriticalNesting--; - - if( uxCriticalNesting == 0 ) - { - portENABLE_INTERRUPTS(); - } - } -#else - configASSERT( uxCriticalNesting ); - uxCriticalNesting--; - - if( uxCriticalNesting == 0 ) - { - portENABLE_INTERRUPTS(); - } -#endif + #endif /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ } /*-----------------------------------------------------------*/ @@ -1219,10 +1159,10 @@ static void vPortEnableVFP( void ) { __asm volatile ( - " ldr.w r0, =0xE000ED88 \n"/* The FPU enable bits are in the CPACR. */ + " ldr.w r0, =0xE000ED88 \n" /* The FPU enable bits are in the CPACR. */ " ldr r1, [r0] \n" " \n" - " orr r1, r1, #( 0xf << 20 ) \n"/* Enable CP10 and CP11 coprocessors, then save back. */ + " orr r1, r1, #( 0xf << 20 ) \n" /* Enable CP10 and CP11 coprocessors, then save back. */ " str r1, [r0] \n" " bx r14 \n" " .ltorg \n" @@ -1233,7 +1173,6 @@ static void vPortEnableVFP( void ) static void prvSetupMPU( void ) { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -1341,12 +1280,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ { __asm volatile ( - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -1358,10 +1297,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ { __asm volatile ( - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -1373,7 +1312,6 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, uint32_t ulStackDepth ) { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __SRAM_segment_start__; @@ -1471,11 +1409,13 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegionSettings[ ul ].ulRegionStartAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress; xMPUSettings->xRegionSettings[ ul ].ulRegionEndAddress = ( uint32_t ) ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1UL ); xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = 0UL; + if( ( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_READ_ONLY ) == portMPU_REGION_READ_ONLY ) || ( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) == portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) ) { xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = tskMPU_READ_PERMISSION; } + if( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_READ_WRITE ) == portMPU_REGION_READ_WRITE ) { xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = ( tskMPU_READ_PERMISSION | tskMPU_WRITE_PERMISSION ); diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h index 8b37d5ada..c239ff5df 100644 --- a/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -242,12 +242,10 @@ typedef struct MPU_SETTINGS /*-----------------------------------------------------------*/ /* SVC numbers for various services. */ -#define portSVC_START_SCHEDULER 0 -#define portSVC_YIELD 1 -#define portSVC_RAISE_PRIVILEGE 2 -#define portSVC_SYSTEM_CALL_ENTER 3 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 4 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 5 +#define portSVC_START_SCHEDULER 100 +#define portSVC_YIELD 101 +#define portSVC_RAISE_PRIVILEGE 102 +#define portSVC_SYSTEM_CALL_EXIT 103 /* Scheduler utilities. */ diff --git a/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c index 5c01e02d6..dca4ec1e4 100644 --- a/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2069 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/GCC/ARM_CM55/non_secure/port.c b/portable/GCC/ARM_CM55/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/GCC/ARM_CM55/non_secure/port.c +++ b/portable/GCC/ARM_CM55/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/GCC/ARM_CM55/non_secure/portasm.c b/portable/GCC/ARM_CM55/non_secure/portasm.c index 2f18b44c4..54de64d36 100644 --- a/portable/GCC/ARM_CM55/non_secure/portasm.c +++ b/portable/GCC/ARM_CM55/non_secure/portasm.c @@ -36,122 +36,125 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " \n" - " restore_general_regs_first_task: \n" - " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ - " \n" - " restore_context_done_first_task: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xSecureContextConst2: .word xSecureContext \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " \n" + " restore_general_regs_first_task: \n" + " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ + " \n" + " restore_context_done_first_task: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xSecureContextConst2: .word xSecureContext \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ - " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ - " ldr r4, xSecureContextConst2 \n" - " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ - " movs r1, #2 \n" /* r1 = 2. */ - " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n" /* Discard everything up to r0. */ - " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx r3 \n" /* Finally, branch to EXC_RETURN. */ - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - "xSecureContextConst2: .word xSecureContext \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ + " ldr r4, xSecureContextConst2 \n" + " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx r3 \n" /* Finally, branch to EXC_RETURN. */ + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + "xSecureContextConst2: .word xSecureContext \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -162,12 +165,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -181,10 +184,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " bic r0, #1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " bic r0, #1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -196,10 +199,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -211,15 +214,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -235,12 +238,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT ( " .syntax unified \n" " \n" - " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */ - " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } @@ -252,10 +255,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att ( " .syntax unified \n" " \n" - " msr basepri, r0 \n"/* basepri = ulMask. */ + " msr basepri, r0 \n" /* basepri = ulMask. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -263,320 +266,313 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ - " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ - " \n" - " cbz r0, save_ns_context \n" /* No secure context to save. */ - " save_s_context: \n" - " push {r0-r2, lr} \n" - " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r2, lr} \n" - " \n" - " save_ns_context: \n" - " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ - " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " save_general_regs: \n" - " mrs r3, psp \n" - " \n" - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */ - " tst lr, #0x10 \n" - " ittt eq \n" - " vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */ - " vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ - " vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */ - " sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " stmia r2!, {r4-r11} \n" /* Store r4-r11. */ - " ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ - " stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psp \n" /* r3 = PSP. */ - " mrs r4, psplim \n" /* r4 = PSPLIM. */ - " mrs r5, control \n" /* r5 = CONTROL. */ - " stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" /* r0 = 0. */ - " msr basepri, r0 \n" /* Enable interrupts. */ - " \n" - " program_mpu: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " save_s_context: \n" + " push {r0-r2, lr} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r2, lr} \n" + " \n" + " save_ns_context: \n" + " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ + " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " save_general_regs: \n" + " mrs r3, psp \n" + " \n" + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */ + " tst lr, #0x10 \n" + " ittt eq \n" + " vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */ + " vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ + " vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */ + " sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " stmia r2!, {r4-r11} \n" /* Store r4-r11. */ + " ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ + " stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psp \n" /* r3 = PSP. */ + " mrs r4, psplim \n" /* r4 = PSPLIM. */ + " mrs r5, control \n" /* r5 = CONTROL. */ + " stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " program_mpu: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " cbz r0, restore_ns_context \n" /* No secure context to restore. */ - " \n" - " restore_s_context: \n" - " push {r1-r3, lr} \n" - " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r1-r3, lr} \n" - " \n" - " restore_ns_context: \n" - " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ - " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " restore_general_regs: \n" - " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n" - " ittt eq \n" - " vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ - " vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ - " vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " restore_context_done: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xSecureContextConst: .word xSecureContext \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " cbz r0, restore_ns_context \n" /* No secure context to restore. */ + " \n" + " restore_s_context: \n" + " push {r1-r3, lr} \n" + " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r1-r3, lr} \n" + " \n" + " restore_ns_context: \n" + " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ + " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " restore_general_regs: \n" + " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " tst lr, #0x10 \n" + " ittt eq \n" + " vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ + " vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ + " vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " restore_context_done: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xSecureContextConst: .word xSecureContext \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ - " mrs r2, psp \n"/* Read PSP in r2. */ - " \n" - " cbz r0, save_ns_context \n"/* No secure context to save. */ - " push {r0-r2, r14} \n" - " bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r3} \n"/* LR is now in r3. */ - " mov lr, r3 \n"/* LR = r3. */ - " lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB.*/ - " subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " b select_next_task \n" - " \n" - " save_ns_context: \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " mrs r2, psp \n" /* Read PSP in r2. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " push {r0-r2, r14} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r3} \n" /* LR is now in r3. */ + " mov lr, r3 \n" /* LR = r3. */ + " lsls r1, r3, #25 \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl save_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB.*/ + " subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " b select_next_task \n" + " \n" + " save_ns_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ - " it eq \n" - " vstmdbeq r2!, {s16-s31} \n"/* Store the additional FP context registers which are not saved automatically. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " it eq \n" + " vstmdbeq r2!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " adds r2, r2, #12 \n"/* r2 = r2 + 12. */ - " stm r2, {r4-r11} \n"/* Store the registers that are not saved automatically. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " subs r2, r2, #12 \n"/* r2 = r2 - 12. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n"/* r0 = 0. */ - " msr basepri, r0 \n"/* Enable interrupts. */ - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ - " \n" - " ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ - " mov lr, r4 \n"/* LR = r4. */ - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r3] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " push {r2, r4} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r2, r4} \n" - " mov lr, r4 \n"/* LR = r4. */ - " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " restore_ns_context: \n" - " ldmia r2!, {r4-r11} \n"/* Restore the registers that are not automatically restored. */ + " subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " adds r2, r2, #12 \n" /* r2 = r2 + 12. */ + " stm r2, {r4-r11} \n" /* Store the registers that are not saved automatically. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " subs r2, r2, #12 \n" /* r2 = r2 - 12. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ + " \n" + " ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + " msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ + " mov lr, r4 \n" /* LR = r4. */ + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n" /* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n" /* LR = r4. */ + " lsls r1, r4, #25 \n" /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " restore_ns_context: \n" + " ldmia r2!, {r4-r11} \n" /* Restore the registers that are not automatically restored. */ #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ - " it eq \n" - " vldmiaeq r2!, {s16-s31} \n"/* Restore the additional FP context registers which are not restored automatically. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " it eq \n" + " vldmiaeq r2!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - "xSecureContextConst: .word xSecureContext \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + "xSecureContextConst: .word xSecureContext \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq syscall_enter \n" - "cmp r2, %1 \n" - "beq syscall_enter_1 \n" - "cmp r2, %2 \n" - "beq syscall_exit \n" - "b vPortSVCHandler_C \n" - " \n" - "syscall_enter: \n" - " mov r1, lr \n" - " b vSystemCallEnter \n" - " \n" - "syscall_enter_1: \n" - " mov r1, lr \n" - " b vSystemCallEnter_1 \n" - " \n" - "syscall_exit: \n" - " mov r1, lr \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r1, [r0, #24] \n" + "ldrb r2, [r1, #-2] \n" + "cmp r2, %0 \n" + "blt syscall_enter \n" + "cmp r2, %1 \n" + "beq syscall_exit \n" + "b vPortSVCHandler_C \n" + " \n" + "syscall_enter: \n" + " mov r1, lr \n" + " b vSystemCallEnter \n" + " \n" + "syscall_exit: \n" + " mov r1, lr \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, svchandler_address_const \n" - " bx r1 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, svchandler_address_const \n" + " bx r1 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -587,8 +583,8 @@ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ ( ( " .syntax unified \n" " \n" - " svc %0 \n"/* Secure context is allocated in the supervisor call. */ - " bx lr \n"/* Return. */ + " svc %0 \n" /* Secure context is allocated in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory" ); } @@ -600,12 +596,12 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR ( " .syntax unified \n" " \n" - " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ - " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ - " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ + " ldr r2, [r0] \n" /* The first item in the TCB is the top of the stack. */ + " ldr r1, [r2] \n" /* The first item on the stack is the task's xSecureContext. */ + " cmp r1, #0 \n" /* Raise svc if task's xSecureContext is not NULL. */ " it ne \n" - " svcne %0 \n"/* Secure context is freed in the supervisor call. */ - " bx lr \n"/* Return. */ + " svcne %0 \n" /* Secure context is freed in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory" ); } diff --git a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c index 5c01e02d6..dca4ec1e4 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2069 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c index b6a86cfd2..9d5ff50fc 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c @@ -36,117 +36,120 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " \n" - " restore_general_regs_first_task: \n" - " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ - " \n" - " restore_context_done_first_task: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + #if ( configTOTAL_MPU_REGIONS == 16 ) + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + #endif /* configTOTAL_MPU_REGIONS == 16 */ + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " \n" + " restore_general_regs_first_task: \n" + " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ + " \n" + " restore_context_done_first_task: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r2} \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ - " msr psplim, r1 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ - " bx r2 \n"/* Finally, branch to EXC_RETURN. */ - " \n" - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ + " msr psplim, r1 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx r2 \n" /* Finally, branch to EXC_RETURN. */ + " \n" + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -157,12 +160,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -176,10 +179,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " bic r0, #1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " bic r0, #1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -191,10 +194,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -206,15 +209,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -230,12 +233,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT ( " .syntax unified \n" " \n" - " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */ - " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } @@ -247,10 +250,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att ( " .syntax unified \n" " \n" - " msr basepri, r0 \n"/* basepri = ulMask. */ + " msr basepri, r0 \n" /* basepri = ulMask. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -258,246 +261,239 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ - " mrs r2, psp \n" /* r2 = PSP. */ - " \n" - " save_general_regs: \n" - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " add r2, r2, #0x20 \n" /* Move r2 to location where s0 is saved. */ - " tst lr, #0x10 \n" - " ittt eq \n" - " vstmiaeq r1!, {s16-s31} \n" /* Store s16-s31. */ - " vldmiaeq r2, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ - " vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */ - " sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " stmia r1!, {r4-r11} \n" /* Store r4-r11. */ - " ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ - " stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psplim \n" /* r3 = PSPLIM. */ - " mrs r4, control \n" /* r4 = CONTROL. */ - " stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" /* r0 = 0. */ - " msr basepri, r0 \n" /* Enable interrupts. */ - " \n" - " program_mpu: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " \n" - " restore_general_regs: \n" - " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n" - " ittt eq \n" - " vldmdbeq r1!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ - " vstmiaeq r2!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ - " vldmdbeq r1!, {s16-s31} \n" /* Restore s16-s31. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " restore_context_done: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ + " mrs r2, psp \n" /* r2 = PSP. */ + " \n" + " save_general_regs: \n" + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " add r2, r2, #0x20 \n" /* Move r2 to location where s0 is saved. */ + " tst lr, #0x10 \n" + " ittt eq \n" + " vstmiaeq r1!, {s16-s31} \n" /* Store s16-s31. */ + " vldmiaeq r2, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ + " vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */ + " sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " stmia r1!, {r4-r11} \n" /* Store r4-r11. */ + " ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ + " stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psplim \n" /* r3 = PSPLIM. */ + " mrs r4, control \n" /* r4 = CONTROL. */ + " stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " program_mpu: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + #if ( configTOTAL_MPU_REGIONS == 16 ) + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + #endif /* configTOTAL_MPU_REGIONS == 16 */ + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " \n" + " restore_general_regs: \n" + " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " tst lr, #0x10 \n" + " ittt eq \n" + " vldmdbeq r1!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ + " vstmiaeq r2!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ + " vldmdbeq r1!, {s16-s31} \n" /* Restore s16-s31. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " restore_context_done: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " mrs r0, psp \n"/* Read PSP in r0. */ - " \n" + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " mrs r0, psp \n" /* Read PSP in r0. */ + " \n" #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " it eq \n" - " vstmdbeq r0!, {s16-s31} \n"/* Store the additional FP context registers which are not saved automatically. */ + " vstmdbeq r0!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmdb r0!, {r2-r11} \n"/* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " str r0, [r1] \n"/* Save the new top of stack in TCB. */ - " \n" - " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n"/* r0 = 0. */ - " msr basepri, r0 \n"/* Enable interrupts. */ - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ - " \n" - " ldmia r0!, {r2-r11} \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ - " \n" + " \n" + " mrs r2, psplim \n" /* r2 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmdb r0!, {r2-r11} \n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " str r0, [r1] \n" /* Save the new top of stack in TCB. */ + " \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ + " \n" + " ldmia r0!, {r2-r11} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ + " \n" #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst r3, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " tst r3, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " it eq \n" - " vldmiaeq r0!, {s16-s31} \n"/* Restore the additional FP context registers which are not restored automatically. */ + " vldmiaeq r0!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " msr psp, r0 \n"/* Remember the new top of stack for the task. */ - " bx r3 \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " \n" + " msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ + " msr psp, r0 \n" /* Remember the new top of stack for the task. */ + " bx r3 \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq syscall_enter \n" - "cmp r2, %1 \n" - "beq syscall_enter_1 \n" - "cmp r2, %2 \n" - "beq syscall_exit \n" - "b vPortSVCHandler_C \n" - " \n" - "syscall_enter: \n" - " mov r1, lr \n" - " b vSystemCallEnter \n" - " \n" - "syscall_enter_1: \n" - " mov r1, lr \n" - " b vSystemCallEnter_1 \n" - " \n" - "syscall_exit: \n" - " mov r1, lr \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r1, [r0, #24] \n" + "ldrb r2, [r1, #-2] \n" + "cmp r2, %0 \n" + "blt syscall_enter \n" + "cmp r2, %1 \n" + "beq syscall_exit \n" + "b vPortSVCHandler_C \n" + " \n" + "syscall_enter: \n" + " mov r1, lr \n" + " b vSystemCallEnter \n" + " \n" + "syscall_exit: \n" + " mov r1, lr \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, svchandler_address_const \n" - " bx r1 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, svchandler_address_const \n" + " bx r1 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c index 5c01e02d6..dca4ec1e4 100644 --- a/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2069 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/GCC/ARM_CM85/non_secure/port.c b/portable/GCC/ARM_CM85/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/GCC/ARM_CM85/non_secure/port.c +++ b/portable/GCC/ARM_CM85/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/GCC/ARM_CM85/non_secure/portasm.c b/portable/GCC/ARM_CM85/non_secure/portasm.c index 2f18b44c4..54de64d36 100644 --- a/portable/GCC/ARM_CM85/non_secure/portasm.c +++ b/portable/GCC/ARM_CM85/non_secure/portasm.c @@ -36,122 +36,125 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " \n" - " restore_general_regs_first_task: \n" - " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ - " \n" - " restore_context_done_first_task: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xSecureContextConst2: .word xSecureContext \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r3, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " \n" + " restore_general_regs_first_task: \n" + " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ + " \n" + " restore_context_done_first_task: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xSecureContextConst2: .word xSecureContext \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ - " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ - " ldr r4, xSecureContextConst2 \n" - " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ - " movs r1, #2 \n" /* r1 = 2. */ - " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n" /* Discard everything up to r0. */ - " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx r3 \n" /* Finally, branch to EXC_RETURN. */ - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - "xSecureContextConst2: .word xSecureContext \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r3, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ + " ldr r4, xSecureContextConst2 \n" + " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx r3 \n" /* Finally, branch to EXC_RETURN. */ + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + "xSecureContextConst2: .word xSecureContext \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -162,12 +165,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -181,10 +184,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " bic r0, #1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " bic r0, #1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -196,10 +199,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -211,15 +214,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -235,12 +238,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT ( " .syntax unified \n" " \n" - " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */ - " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } @@ -252,10 +255,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att ( " .syntax unified \n" " \n" - " msr basepri, r0 \n"/* basepri = ulMask. */ + " msr basepri, r0 \n" /* basepri = ulMask. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -263,320 +266,313 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ - " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ - " \n" - " cbz r0, save_ns_context \n" /* No secure context to save. */ - " save_s_context: \n" - " push {r0-r2, lr} \n" - " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r2, lr} \n" - " \n" - " save_ns_context: \n" - " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ - " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " save_general_regs: \n" - " mrs r3, psp \n" - " \n" - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */ - " tst lr, #0x10 \n" - " ittt eq \n" - " vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */ - " vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ - " vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */ - " sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " stmia r2!, {r4-r11} \n" /* Store r4-r11. */ - " ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ - " stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psp \n" /* r3 = PSP. */ - " mrs r4, psplim \n" /* r4 = PSPLIM. */ - " mrs r5, control \n" /* r5 = CONTROL. */ - " stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" /* r0 = 0. */ - " msr basepri, r0 \n" /* Enable interrupts. */ - " \n" - " program_mpu: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " ldr r2, [r1] \n" /* r2 = Location in TCB where the context should be saved. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " save_s_context: \n" + " push {r0-r2, lr} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r2, lr} \n" + " \n" + " save_ns_context: \n" + " mov r3, lr \n" /* r3 = LR (EXC_RETURN). */ + " lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi save_special_regs \n" /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " save_general_regs: \n" + " mrs r3, psp \n" + " \n" + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */ + " tst lr, #0x10 \n" + " ittt eq \n" + " vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */ + " vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ + " vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */ + " sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " stmia r2!, {r4-r11} \n" /* Store r4-r11. */ + " ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ + " stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psp \n" /* r3 = PSP. */ + " mrs r4, psplim \n" /* r4 = PSPLIM. */ + " mrs r5, control \n" /* r5 = CONTROL. */ + " stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " program_mpu: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r3] \n" /* r0 = pxCurrentTCB.*/ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ - " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ - " msr psp, r3 \n" - " msr psplim, r4 \n" - " msr control, r5 \n" - " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r4] \n" /* Restore xSecureContext. */ - " cbz r0, restore_ns_context \n" /* No secure context to restore. */ - " \n" - " restore_s_context: \n" - " push {r1-r3, lr} \n" - " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r1-r3, lr} \n" - " \n" - " restore_ns_context: \n" - " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ - " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ - " \n" - " restore_general_regs: \n" - " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n" - " ittt eq \n" - " vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ - " vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ - " vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " restore_context_done: \n" - " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xSecureContextConst: .word xSecureContext \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* r1 = pxCurrentTCB.*/ + " ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */ + " msr psp, r3 \n" + " msr psplim, r4 \n" + " msr control, r5 \n" + " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r4] \n" /* Restore xSecureContext. */ + " cbz r0, restore_ns_context \n" /* No secure context to restore. */ + " \n" + " restore_s_context: \n" + " push {r1-r3, lr} \n" + " bl SecureContext_LoadContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r1-r3, lr} \n" + " \n" + " restore_ns_context: \n" + " mov r0, lr \n" /* r0 = LR (EXC_RETURN). */ + " lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */ + " \n" + " restore_general_regs: \n" + " ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */ + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " tst lr, #0x10 \n" + " ittt eq \n" + " vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ + " vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ + " vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " restore_context_done: \n" + " str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xSecureContextConst: .word xSecureContext \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern SecureContext_SaveContext \n" - " .extern SecureContext_LoadContext \n" - " \n" - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ - " mrs r2, psp \n"/* Read PSP in r2. */ - " \n" - " cbz r0, save_ns_context \n"/* No secure context to save. */ - " push {r0-r2, r14} \n" - " bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r0-r3} \n"/* LR is now in r3. */ - " mov lr, r3 \n"/* LR = r3. */ - " lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB.*/ - " subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " b select_next_task \n" - " \n" - " save_ns_context: \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern SecureContext_SaveContext \n" + " .extern SecureContext_LoadContext \n" + " \n" + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " mrs r2, psp \n" /* Read PSP in r2. */ + " \n" + " cbz r0, save_ns_context \n" /* No secure context to save. */ + " push {r0-r2, r14} \n" + " bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r0-r3} \n" /* LR is now in r3. */ + " mov lr, r3 \n" /* LR = r3. */ + " lsls r1, r3, #25 \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl save_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB.*/ + " subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " b select_next_task \n" + " \n" + " save_ns_context: \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ - " it eq \n" - " vstmdbeq r2!, {s16-s31} \n"/* Store the additional FP context registers which are not saved automatically. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " it eq \n" + " vstmdbeq r2!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - " str r2, [r1] \n"/* Save the new top of stack in TCB. */ - " adds r2, r2, #12 \n"/* r2 = r2 + 12. */ - " stm r2, {r4-r11} \n"/* Store the registers that are not saved automatically. */ - " mrs r1, psplim \n"/* r1 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " subs r2, r2, #12 \n"/* r2 = r2 - 12. */ - " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n"/* r0 = 0. */ - " msr basepri, r0 \n"/* Enable interrupts. */ - " \n" - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ - " \n" - " ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ - " mov lr, r4 \n"/* LR = r4. */ - " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r3] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ - " push {r2, r4} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ - " pop {r2, r4} \n" - " mov lr, r4 \n"/* LR = r4. */ - " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " restore_ns_context: \n" - " ldmia r2!, {r4-r11} \n"/* Restore the registers that are not automatically restored. */ + " subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + " str r2, [r1] \n" /* Save the new top of stack in TCB. */ + " adds r2, r2, #12 \n" /* r2 = r2 + 12. */ + " stm r2, {r4-r11} \n" /* Store the registers that are not saved automatically. */ + " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " subs r2, r2, #12 \n" /* r2 = r2 - 12. */ + " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ + " \n" + " ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + " msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ + " mov lr, r4 \n" /* LR = r4. */ + " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n" /* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n" /* LR = r4. */ + " lsls r1, r4, #25 \n" /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " restore_ns_context: \n" + " ldmia r2!, {r4-r11} \n" /* Restore the registers that are not automatically restored. */ #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ - " it eq \n" - " vldmiaeq r2!, {s16-s31} \n"/* Restore the additional FP context registers which are not restored automatically. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " it eq \n" + " vldmiaeq r2!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " msr psp, r2 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - "xSecureContextConst: .word xSecureContext \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " msr psp, r2 \n" /* Remember the new top of stack for the task. */ + " bx lr \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + "xSecureContextConst: .word xSecureContext \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq syscall_enter \n" - "cmp r2, %1 \n" - "beq syscall_enter_1 \n" - "cmp r2, %2 \n" - "beq syscall_exit \n" - "b vPortSVCHandler_C \n" - " \n" - "syscall_enter: \n" - " mov r1, lr \n" - " b vSystemCallEnter \n" - " \n" - "syscall_enter_1: \n" - " mov r1, lr \n" - " b vSystemCallEnter_1 \n" - " \n" - "syscall_exit: \n" - " mov r1, lr \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r1, [r0, #24] \n" + "ldrb r2, [r1, #-2] \n" + "cmp r2, %0 \n" + "blt syscall_enter \n" + "cmp r2, %1 \n" + "beq syscall_exit \n" + "b vPortSVCHandler_C \n" + " \n" + "syscall_enter: \n" + " mov r1, lr \n" + " b vSystemCallEnter \n" + " \n" + "syscall_exit: \n" + " mov r1, lr \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, svchandler_address_const \n" - " bx r1 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, svchandler_address_const \n" + " bx r1 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -587,8 +583,8 @@ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ ( ( " .syntax unified \n" " \n" - " svc %0 \n"/* Secure context is allocated in the supervisor call. */ - " bx lr \n"/* Return. */ + " svc %0 \n" /* Secure context is allocated in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory" ); } @@ -600,12 +596,12 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR ( " .syntax unified \n" " \n" - " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ - " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ - " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ + " ldr r2, [r0] \n" /* The first item in the TCB is the top of the stack. */ + " ldr r1, [r2] \n" /* The first item on the stack is the task's xSecureContext. */ + " cmp r1, #0 \n" /* Raise svc if task's xSecureContext is not NULL. */ " it ne \n" - " svcne %0 \n"/* Secure context is freed in the supervisor call. */ - " bx lr \n"/* Return. */ + " svcne %0 \n" /* Secure context is freed in the supervisor call. */ + " bx lr \n" /* Return. */ ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory" ); } diff --git a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c index 5c01e02d6..dca4ec1e4 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -38,2312 +38,2069 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -#if ( INCLUDE_xTaskDelayUntil == 1 ) + #if ( INCLUDE_xTaskDelayUntil == 1 ) -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, - const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskDelayUntilImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskDelayUntil_Unpriv \n" - " MPU_xTaskDelayUntil_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskDelayUntilImpl \n" - " MPU_xTaskDelayUntil_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskDelayUntilImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskDelayUntilImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskDelayUntil_Unpriv \n" + " MPU_xTaskDelayUntil_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskDelayUntilImpl \n" + " MPU_xTaskDelayUntil_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskDelayUntil ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ + #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskAbortDelay == 1 ) + #if ( INCLUDE_xTaskAbortDelay == 1 ) -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskAbortDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskAbortDelay_Unpriv \n" - " MPU_xTaskAbortDelay_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskAbortDelayImpl \n" - " MPU_xTaskAbortDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskAbortDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskAbortDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskAbortDelay_Unpriv \n" + " MPU_xTaskAbortDelay_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskAbortDelayImpl \n" + " MPU_xTaskAbortDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskAbortDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ + #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskDelay == 1 ) + #if ( INCLUDE_vTaskDelay == 1 ) -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskDelayImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskDelay_Unpriv \n" - " MPU_vTaskDelay_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskDelayImpl \n" - " MPU_vTaskDelay_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskDelayImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskDelay( const TickType_t xTicksToDelay ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskDelayImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskDelay_Unpriv \n" + " MPU_vTaskDelay_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskDelayImpl \n" + " MPU_vTaskDelay_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskDelay ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ + #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskPriorityGet == 1 ) + #if ( INCLUDE_uxTaskPriorityGet == 1 ) -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskPriorityGetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskPriorityGet_Unpriv \n" - " MPU_uxTaskPriorityGet_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskPriorityGetImpl \n" - " MPU_uxTaskPriorityGet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskPriorityGetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskPriorityGetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskPriorityGet_Unpriv \n" + " MPU_uxTaskPriorityGet_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskPriorityGetImpl \n" + " MPU_uxTaskPriorityGet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskPriorityGet ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ + #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_eTaskGetState == 1 ) + #if ( INCLUDE_eTaskGetState == 1 ) -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_eTaskGetStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_eTaskGetState_Unpriv \n" - " MPU_eTaskGetState_Priv: \n" - " pop {r0} \n" - " b MPU_eTaskGetStateImpl \n" - " MPU_eTaskGetState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_eTaskGetStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_eTaskGetStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_eTaskGetState_Unpriv \n" + " MPU_eTaskGetState_Priv: \n" + " pop {r0} \n" + " b MPU_eTaskGetStateImpl \n" + " MPU_eTaskGetState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_eTaskGetState ) : "memory" + ); + } -#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ + #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskGetInfo( TaskHandle_t xTask, - TaskStatus_t * pxTaskStatus, - BaseType_t xGetFreeStackSpace, - eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskGetInfoImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskGetInfo_Unpriv \n" - " MPU_vTaskGetInfo_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskGetInfoImpl \n" - " MPU_vTaskGetInfo_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskGetInfoImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskGetInfoImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskGetInfo_Unpriv \n" + " MPU_vTaskGetInfo_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskGetInfoImpl \n" + " MPU_vTaskGetInfo_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskGetInfo ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetIdleTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" - " MPU_xTaskGetIdleTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetIdleTaskHandleImpl \n" - " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetIdleTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetIdleTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetIdleTaskHandle_Unpriv \n" + " MPU_xTaskGetIdleTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetIdleTaskHandleImpl \n" + " MPU_xTaskGetIdleTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetIdleTaskHandle ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSuspendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSuspend_Unpriv \n" - " MPU_vTaskSuspend_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSuspendImpl \n" - " MPU_vTaskSuspend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSuspendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSuspendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSuspend_Unpriv \n" + " MPU_vTaskSuspend_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSuspendImpl \n" + " MPU_vTaskSuspend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSuspend ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_vTaskSuspend == 1 ) + #if ( INCLUDE_vTaskSuspend == 1 ) -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskResumeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskResume_Unpriv \n" - " MPU_vTaskResume_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskResumeImpl \n" - " MPU_vTaskResume_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskResumeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskResume( TaskHandle_t xTaskToResume ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskResumeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskResume_Unpriv \n" + " MPU_vTaskResume_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskResumeImpl \n" + " MPU_vTaskResume_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskResume ) : "memory" + ); + } -#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ + #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ -TickType_t MPU_xTaskGetTickCount( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTaskGetTickCount( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetTickCountImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetTickCount_Unpriv \n" - " MPU_xTaskGetTickCount_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetTickCountImpl \n" - " MPU_xTaskGetTickCount_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetTickCountImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTaskGetTickCount( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetTickCountImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetTickCount_Unpriv \n" + " MPU_xTaskGetTickCount_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetTickCountImpl \n" + " MPU_xTaskGetTickCount_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetTickCount ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetNumberOfTasksImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" - " MPU_uxTaskGetNumberOfTasks_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetNumberOfTasksImpl \n" - " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetNumberOfTasksImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetNumberOfTasksImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetNumberOfTasks_Unpriv \n" + " MPU_uxTaskGetNumberOfTasks_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetNumberOfTasksImpl \n" + " MPU_uxTaskGetNumberOfTasks_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetNumberOfTasks ) : "memory" + ); + } /*-----------------------------------------------------------*/ -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTaskGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTaskGetName_Unpriv \n" - " MPU_pcTaskGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTaskGetNameImpl \n" - " MPU_pcTaskGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTaskGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTaskGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTaskGetName_Unpriv \n" + " MPU_pcTaskGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTaskGetNameImpl \n" + " MPU_pcTaskGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTaskGetName ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimeCounterImpl \n" - " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimeCounterImpl \n" + " MPU_ulTaskGetRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configGENERATE_RUN_TIME_STATS == 1 ) + #if ( configGENERATE_RUN_TIME_STATS == 1 ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" - " MPU_ulTaskGetRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetRunTimePercentImpl \n" - " MPU_ulTaskGetRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetRunTimePercent_Unpriv \n" + " MPU_ulTaskGetRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetRunTimePercentImpl \n" + " MPU_ulTaskGetRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" - " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimePercentImpl \n" - " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimePercentImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimePercentImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimePercent_Unpriv \n" + " MPU_ulTaskGetIdleRunTimePercent_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimePercentImpl \n" + " MPU_ulTaskGetIdleRunTimePercent_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimePercent ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) + #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" - " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGetIdleRunTimeCounterImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv \n" + " MPU_ulTaskGetIdleRunTimeCounter_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGetIdleRunTimeCounterImpl \n" + " MPU_ulTaskGetIdleRunTimeCounter_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGetIdleRunTimeCounter ) : "memory" + ); + } -#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ + #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, - TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" - " MPU_vTaskSetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetApplicationTaskTagImpl \n" - " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetApplicationTaskTag_Unpriv \n" + " MPU_vTaskSetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetApplicationTaskTagImpl \n" + " MPU_vTaskSetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetApplicationTaskTagImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" - " MPU_xTaskGetApplicationTaskTag_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetApplicationTaskTagImpl \n" - " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetApplicationTaskTagImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetApplicationTaskTagImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetApplicationTaskTag_Unpriv \n" + " MPU_xTaskGetApplicationTaskTag_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetApplicationTaskTagImpl \n" + " MPU_xTaskGetApplicationTaskTag_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetApplicationTaskTag ) : "memory" + ); + } -#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ + #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, - BaseType_t xIndex, - void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" - " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv \n" + " MPU_vTaskSetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetThreadLocalStoragePointerImpl \n" + " MPU_vTaskSetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, - BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" - " pop {r0} \n" - " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTaskGetThreadLocalStoragePointerImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Priv: \n" + " pop {r0} \n" + " b MPU_pvTaskGetThreadLocalStoragePointerImpl \n" + " MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer ) : "memory" + ); + } -#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ + #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + #if ( configUSE_TRACE_FACILITY == 1 ) -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, - const UBaseType_t uxArraySize, - configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetSystemStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetSystemState_Unpriv \n" - " MPU_uxTaskGetSystemState_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetSystemStateImpl \n" - " MPU_uxTaskGetSystemState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetSystemStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetSystemStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetSystemState_Unpriv \n" + " MPU_uxTaskGetSystemState_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetSystemStateImpl \n" + " MPU_uxTaskGetSystemState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetSystemState ) : "memory" + ); + } -#endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ + #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMarkImpl \n" - " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMarkImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMarkImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMarkImpl \n" + " MPU_uxTaskGetStackHighWaterMark_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) + #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" - " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" - " pop {r0} \n" - " b MPU_uxTaskGetStackHighWaterMark2Impl \n" - " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTaskGetStackHighWaterMark2Impl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTaskGetStackHighWaterMark2Impl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTaskGetStackHighWaterMark2_Unpriv \n" + " MPU_uxTaskGetStackHighWaterMark2_Priv: \n" + " pop {r0} \n" + " b MPU_uxTaskGetStackHighWaterMark2Impl \n" + " MPU_uxTaskGetStackHighWaterMark2_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTaskGetStackHighWaterMark2 ) : "memory" + ); + } -#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ + #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) + #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" - " MPU_xTaskGetCurrentTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetCurrentTaskHandleImpl \n" - " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetCurrentTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetCurrentTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetCurrentTaskHandle_Unpriv \n" + " MPU_xTaskGetCurrentTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetCurrentTaskHandleImpl \n" + " MPU_xTaskGetCurrentTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetCurrentTaskHandle ) : "memory" + ); + } -#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ + #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + #if ( INCLUDE_xTaskGetSchedulerState == 1 ) -BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGetSchedulerState( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGetSchedulerStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGetSchedulerState_Unpriv \n" - " MPU_xTaskGetSchedulerState_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGetSchedulerStateImpl \n" - " MPU_xTaskGetSchedulerState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGetSchedulerStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGetSchedulerState( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGetSchedulerStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGetSchedulerState_Unpriv \n" + " MPU_xTaskGetSchedulerState_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGetSchedulerStateImpl \n" + " MPU_xTaskGetSchedulerState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGetSchedulerState ) : "memory" + ); + } -#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ + #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTaskSetTimeOutStateImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTaskSetTimeOutState_Unpriv \n" - " MPU_vTaskSetTimeOutState_Priv: \n" - " pop {r0} \n" - " b MPU_vTaskSetTimeOutStateImpl \n" - " MPU_vTaskSetTimeOutState_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTaskSetTimeOutStateImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTaskSetTimeOutStateImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTaskSetTimeOutState_Unpriv \n" + " MPU_vTaskSetTimeOutState_Priv: \n" + " pop {r0} \n" + " b MPU_vTaskSetTimeOutStateImpl \n" + " MPU_vTaskSetTimeOutState_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTaskSetTimeOutState ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, - TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskCheckForTimeOutImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskCheckForTimeOut_Unpriv \n" - " MPU_xTaskCheckForTimeOut_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskCheckForTimeOutImpl \n" - " MPU_xTaskCheckForTimeOut_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskCheckForTimeOutImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskCheckForTimeOutImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskCheckForTimeOut_Unpriv \n" + " MPU_xTaskCheckForTimeOut_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskCheckForTimeOutImpl \n" + " MPU_xTaskCheckForTimeOut_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskCheckForTimeOut ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotify_Unpriv \n" - " MPU_xTaskGenericNotify_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyImpl \n" - " MPU_xTaskGenericNotify_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotify_Unpriv \n" + " MPU_xTaskGenericNotify_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyImpl \n" + " MPU_xTaskGenericNotify_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotify ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyWaitImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyWait_Unpriv \n" - " MPU_xTaskGenericNotifyWait_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyWaitImpl \n" - " MPU_xTaskGenericNotifyWait_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyWaitImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyWaitImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyWait_Unpriv \n" + " MPU_xTaskGenericNotifyWait_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyWaitImpl \n" + " MPU_xTaskGenericNotifyWait_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyWait ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, - BaseType_t xClearCountOnExit, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" - " MPU_ulTaskGenericNotifyTake_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyTakeImpl \n" - " MPU_ulTaskGenericNotifyTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyTake_Unpriv \n" + " MPU_ulTaskGenericNotifyTake_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyTakeImpl \n" + " MPU_ulTaskGenericNotifyTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyTake ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTaskGenericNotifyStateClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" - " MPU_xTaskGenericNotifyStateClear_Priv: \n" - " pop {r0} \n" - " b MPU_xTaskGenericNotifyStateClearImpl \n" - " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTaskGenericNotifyStateClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTaskGenericNotifyStateClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTaskGenericNotifyStateClear_Unpriv \n" + " MPU_xTaskGenericNotifyStateClear_Priv: \n" + " pop {r0} \n" + " b MPU_xTaskGenericNotifyStateClearImpl \n" + " MPU_xTaskGenericNotifyStateClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTaskGenericNotifyStateClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TASK_NOTIFICATIONS == 1 ) + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, - UBaseType_t uxIndexToClear, - uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" - " MPU_ulTaskGenericNotifyValueClear_Priv: \n" - " pop {r0} \n" - " b MPU_ulTaskGenericNotifyValueClearImpl \n" - " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_ulTaskGenericNotifyValueClearImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_ulTaskGenericNotifyValueClearImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_ulTaskGenericNotifyValueClear_Unpriv \n" + " MPU_ulTaskGenericNotifyValueClear_Priv: \n" + " pop {r0} \n" + " b MPU_ulTaskGenericNotifyValueClearImpl \n" + " MPU_ulTaskGenericNotifyValueClear_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_ulTaskGenericNotifyValueClear ) : "memory" + ); + } -#endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ + #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, - const void * const pvItemToQueue, - TickType_t xTicksToWait, - const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGenericSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGenericSend_Unpriv \n" - " MPU_xQueueGenericSend_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGenericSendImpl \n" - " MPU_xQueueGenericSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGenericSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGenericSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGenericSend_Unpriv \n" + " MPU_xQueueGenericSend_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGenericSendImpl \n" + " MPU_xQueueGenericSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGenericSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueMessagesWaitingImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueMessagesWaiting_Unpriv \n" - " MPU_uxQueueMessagesWaiting_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueMessagesWaitingImpl \n" - " MPU_uxQueueMessagesWaiting_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueMessagesWaitingImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueMessagesWaitingImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueMessagesWaiting_Unpriv \n" + " MPU_uxQueueMessagesWaiting_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueMessagesWaitingImpl \n" + " MPU_uxQueueMessagesWaiting_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueMessagesWaiting ) : "memory" + ); + } /*-----------------------------------------------------------*/ -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxQueueSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxQueueSpacesAvailable_Unpriv \n" - " MPU_uxQueueSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_uxQueueSpacesAvailableImpl \n" - " MPU_uxQueueSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxQueueSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxQueueSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxQueueSpacesAvailable_Unpriv \n" + " MPU_uxQueueSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_uxQueueSpacesAvailableImpl \n" + " MPU_uxQueueSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxQueueSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueReceive_Unpriv \n" - " MPU_xQueueReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueReceiveImpl \n" - " MPU_xQueueReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueReceive_Unpriv \n" + " MPU_xQueueReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueReceiveImpl \n" + " MPU_xQueueReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, - void * const pvBuffer, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueuePeekImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueuePeek_Unpriv \n" - " MPU_xQueuePeek_Priv: \n" - " pop {r0} \n" - " b MPU_xQueuePeekImpl \n" - " MPU_xQueuePeek_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueuePeekImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueuePeekImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueuePeek_Unpriv \n" + " MPU_xQueuePeek_Priv: \n" + " pop {r0} \n" + " b MPU_xQueuePeekImpl \n" + " MPU_xQueuePeek_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueuePeek ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSemaphoreTakeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSemaphoreTake_Unpriv \n" - " MPU_xQueueSemaphoreTake_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSemaphoreTakeImpl \n" - " MPU_xQueueSemaphoreTake_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSemaphoreTakeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSemaphoreTakeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSemaphoreTake_Unpriv \n" + " MPU_xQueueSemaphoreTake_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSemaphoreTakeImpl \n" + " MPU_xQueueSemaphoreTake_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSemaphoreTake ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGetMutexHolderImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGetMutexHolder_Unpriv \n" - " MPU_xQueueGetMutexHolder_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGetMutexHolderImpl \n" - " MPU_xQueueGetMutexHolder_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGetMutexHolderImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGetMutexHolderImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGetMutexHolder_Unpriv \n" + " MPU_xQueueGetMutexHolder_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGetMutexHolderImpl \n" + " MPU_xQueueGetMutexHolder_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGetMutexHolder ) : "memory" + ); + } -#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ + #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueTakeMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" - " MPU_xQueueTakeMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueTakeMutexRecursiveImpl \n" - " MPU_xQueueTakeMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueTakeMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueTakeMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueTakeMutexRecursive_Unpriv \n" + " MPU_xQueueTakeMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueTakeMutexRecursiveImpl \n" + " MPU_xQueueTakeMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueTakeMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #if ( configUSE_RECURSIVE_MUTEXES == 1 ) -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueGiveMutexRecursiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" - " MPU_xQueueGiveMutexRecursive_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueGiveMutexRecursiveImpl \n" - " MPU_xQueueGiveMutexRecursive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueGiveMutexRecursiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueGiveMutexRecursiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueGiveMutexRecursive_Unpriv \n" + " MPU_xQueueGiveMutexRecursive_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueGiveMutexRecursiveImpl \n" + " MPU_xQueueGiveMutexRecursive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueGiveMutexRecursive ) : "memory" + ); + } -#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ + #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueSelectFromSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueSelectFromSet_Unpriv \n" - " MPU_xQueueSelectFromSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueSelectFromSetImpl \n" - " MPU_xQueueSelectFromSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueSelectFromSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueSelectFromSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueSelectFromSet_Unpriv \n" + " MPU_xQueueSelectFromSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueSelectFromSetImpl \n" + " MPU_xQueueSelectFromSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueSelectFromSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_QUEUE_SETS == 1 ) + #if ( configUSE_QUEUE_SETS == 1 ) -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, - QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xQueueAddToSetImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xQueueAddToSet_Unpriv \n" - " MPU_xQueueAddToSet_Priv: \n" - " pop {r0} \n" - " b MPU_xQueueAddToSetImpl \n" - " MPU_xQueueAddToSet_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xQueueAddToSetImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xQueueAddToSetImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xQueueAddToSet_Unpriv \n" + " MPU_xQueueAddToSet_Priv: \n" + " pop {r0} \n" + " b MPU_xQueueAddToSetImpl \n" + " MPU_xQueueAddToSet_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xQueueAddToSet ) : "memory" + ); + } -#endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, - const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueAddToRegistryImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueAddToRegistry_Unpriv \n" - " MPU_vQueueAddToRegistry_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueAddToRegistryImpl \n" - " MPU_vQueueAddToRegistry_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueAddToRegistryImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueAddToRegistryImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueAddToRegistry_Unpriv \n" + " MPU_vQueueAddToRegistry_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueAddToRegistryImpl \n" + " MPU_vQueueAddToRegistry_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueAddToRegistry ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vQueueUnregisterQueueImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vQueueUnregisterQueue_Unpriv \n" - " MPU_vQueueUnregisterQueue_Priv: \n" - " pop {r0} \n" - " b MPU_vQueueUnregisterQueueImpl \n" - " MPU_vQueueUnregisterQueue_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vQueueUnregisterQueueImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vQueueUnregisterQueueImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vQueueUnregisterQueue_Unpriv \n" + " MPU_vQueueUnregisterQueue_Priv: \n" + " pop {r0} \n" + " b MPU_vQueueUnregisterQueueImpl \n" + " MPU_vQueueUnregisterQueue_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vQueueUnregisterQueue ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configQUEUE_REGISTRY_SIZE > 0 ) + #if ( configQUEUE_REGISTRY_SIZE > 0 ) -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcQueueGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcQueueGetName_Unpriv \n" - " MPU_pcQueueGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcQueueGetNameImpl \n" - " MPU_pcQueueGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcQueueGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcQueueGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcQueueGetName_Unpriv \n" + " MPU_pcQueueGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcQueueGetNameImpl \n" + " MPU_pcQueueGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcQueueGetName ) : "memory" + ); + } -#endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ + #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pvTimerGetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pvTimerGetTimerID_Unpriv \n" - " MPU_pvTimerGetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_pvTimerGetTimerIDImpl \n" - " MPU_pvTimerGetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pvTimerGetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pvTimerGetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pvTimerGetTimerID_Unpriv \n" + " MPU_pvTimerGetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_pvTimerGetTimerIDImpl \n" + " MPU_pvTimerGetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pvTimerGetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, - void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetTimerIDImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetTimerID_Unpriv \n" - " MPU_vTimerSetTimerID_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetTimerIDImpl \n" - " MPU_vTimerSetTimerID_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetTimerIDImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetTimerIDImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetTimerID_Unpriv \n" + " MPU_vTimerSetTimerID_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetTimerIDImpl \n" + " MPU_vTimerSetTimerID_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetTimerID ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerIsTimerActiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerIsTimerActive_Unpriv \n" - " MPU_xTimerIsTimerActive_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerIsTimerActiveImpl \n" - " MPU_xTimerIsTimerActive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerIsTimerActiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerIsTimerActiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerIsTimerActive_Unpriv \n" + " MPU_xTimerIsTimerActive_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerIsTimerActiveImpl \n" + " MPU_xTimerIsTimerActive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerIsTimerActive ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetTimerDaemonTaskHandleImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetTimerDaemonTaskHandleImpl \n" + " MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGenericCommandImpl \n" - " \n" - " push {r0} \n" - " mrs r0, ipsr \n" - " cmp r0, #0 \n" - " bne MPU_xTimerGenericCommand_Priv \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " beq MPU_xTimerGenericCommand_Priv \n" - " MPU_xTimerGenericCommand_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGenericCommandImpl \n" - " svc %1 \n" - " bx lr \n" - " MPU_xTimerGenericCommand_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGenericCommandImpl \n" - " \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " push {r0} \n" + " mrs r0, ipsr \n" + " cmp r0, #0 \n" + " bne MPU_xTimerGenericCommand_Priv \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " beq MPU_xTimerGenericCommand_Priv \n" + " MPU_xTimerGenericCommand_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " MPU_xTimerGenericCommand_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGenericCommandPrivImpl \n" + " \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGenericCommand ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_pcTimerGetNameImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_pcTimerGetName_Unpriv \n" - " MPU_pcTimerGetName_Priv: \n" - " pop {r0} \n" - " b MPU_pcTimerGetNameImpl \n" - " MPU_pcTimerGetName_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_pcTimerGetNameImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_pcTimerGetNameImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_pcTimerGetName_Unpriv \n" + " MPU_pcTimerGetName_Priv: \n" + " pop {r0} \n" + " b MPU_pcTimerGetNameImpl \n" + " MPU_pcTimerGetName_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_pcTimerGetName ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vTimerSetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vTimerSetReloadMode_Unpriv \n" - " MPU_vTimerSetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_vTimerSetReloadModeImpl \n" - " MPU_vTimerSetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vTimerSetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const BaseType_t uxAutoReload ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vTimerSetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vTimerSetReloadMode_Unpriv \n" + " MPU_vTimerSetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_vTimerSetReloadModeImpl \n" + " MPU_vTimerSetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vTimerSetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetReloadMode_Unpriv \n" - " MPU_xTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetReloadModeImpl \n" - " MPU_xTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetReloadMode_Unpriv \n" + " MPU_xTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetReloadModeImpl \n" + " MPU_xTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxTimerGetReloadModeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxTimerGetReloadMode_Unpriv \n" - " MPU_uxTimerGetReloadMode_Priv: \n" - " pop {r0} \n" - " b MPU_uxTimerGetReloadModeImpl \n" - " MPU_uxTimerGetReloadMode_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxTimerGetReloadModeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxTimerGetReloadModeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxTimerGetReloadMode_Unpriv \n" + " MPU_uxTimerGetReloadMode_Priv: \n" + " pop {r0} \n" + " b MPU_uxTimerGetReloadModeImpl \n" + " MPU_uxTimerGetReloadMode_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxTimerGetReloadMode ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetPeriodImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetPeriod_Unpriv \n" - " MPU_xTimerGetPeriod_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetPeriodImpl \n" - " MPU_xTimerGetPeriod_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetPeriodImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetPeriodImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetPeriod_Unpriv \n" + " MPU_xTimerGetPeriod_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetPeriodImpl \n" + " MPU_xTimerGetPeriod_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetPeriod ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( configUSE_TIMERS == 1 ) + #if ( configUSE_TIMERS == 1 ) -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xTimerGetExpiryTimeImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xTimerGetExpiryTime_Unpriv \n" - " MPU_xTimerGetExpiryTime_Priv: \n" - " pop {r0} \n" - " b MPU_xTimerGetExpiryTimeImpl \n" - " MPU_xTimerGetExpiryTime_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xTimerGetExpiryTimeImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xTimerGetExpiryTimeImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xTimerGetExpiryTime_Unpriv \n" + " MPU_xTimerGetExpiryTime_Priv: \n" + " pop {r0} \n" + " b MPU_xTimerGetExpiryTimeImpl \n" + " MPU_xTimerGetExpiryTime_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xTimerGetExpiryTime ) : "memory" + ); + } -#endif /* if ( configUSE_TIMERS == 1 ) */ + #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupWaitBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupWaitBits_Unpriv \n" + " MPU_xEventGroupWaitBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupWaitBitsImpl \n" + " MPU_xEventGroupWaitBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupWaitBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupClearBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupClearBits_Unpriv \n" + " MPU_xEventGroupClearBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupClearBitsImpl \n" + " MPU_xEventGroupClearBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupClearBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSetBitsImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSetBits_Unpriv \n" + " MPU_xEventGroupSetBits_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSetBitsImpl \n" + " MPU_xEventGroupSetBits_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSetBits ) : "memory" + ); + } +/*-----------------------------------------------------------*/ + + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupWaitBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupWaitBits_Unpriv \n" - " MPU_xEventGroupWaitBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupWaitBitsImpl \n" - " MPU_xEventGroupWaitBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupWaitBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xEventGroupSyncImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xEventGroupSync_Unpriv \n" + " MPU_xEventGroupSync_Priv: \n" + " pop {r0} \n" + " b MPU_xEventGroupSyncImpl \n" + " MPU_xEventGroupSync_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xEventGroupSync ) : "memory" + ); + } /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToClear ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupClearBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupClearBits_Unpriv \n" - " MPU_xEventGroupClearBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupClearBitsImpl \n" - " MPU_xEventGroupClearBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupClearBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_uxEventGroupGetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_uxEventGroupGetNumber_Unpriv \n" + " MPU_uxEventGroupGetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_uxEventGroupGetNumberImpl \n" + " MPU_uxEventGroupGetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_uxEventGroupGetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + #if ( configUSE_TRACE_FACILITY == 1 ) -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSetBitsImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSetBits_Unpriv \n" - " MPU_xEventGroupSetBits_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSetBitsImpl \n" - " MPU_xEventGroupSetBits_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSetBitsImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; + + void MPU_vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_vEventGroupSetNumberImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_vEventGroupSetNumber_Unpriv \n" + " MPU_vEventGroupSetNumber_Priv: \n" + " pop {r0} \n" + " b MPU_vEventGroupSetNumberImpl \n" + " MPU_vEventGroupSetNumber_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_vEventGroupSetNumber ) : "memory" + ); + } + + #endif /*( configUSE_TRACE_FACILITY == 1 )*/ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToSet, - const EventBits_t uxBitsToWaitFor, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xEventGroupSyncImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xEventGroupSync_Unpriv \n" - " MPU_xEventGroupSync_Priv: \n" - " pop {r0} \n" - " b MPU_xEventGroupSyncImpl \n" - " MPU_xEventGroupSync_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xEventGroupSyncImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSendImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSend_Unpriv \n" + " MPU_xStreamBufferSend_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSendImpl \n" + " MPU_xStreamBufferSend_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSend ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_uxEventGroupGetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_uxEventGroupGetNumber_Unpriv \n" - " MPU_uxEventGroupGetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_uxEventGroupGetNumberImpl \n" - " MPU_uxEventGroupGetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_uxEventGroupGetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferReceiveImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferReceive_Unpriv \n" + " MPU_xStreamBufferReceive_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferReceiveImpl \n" + " MPU_xStreamBufferReceive_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferReceive ) : "memory" + ); + } /*-----------------------------------------------------------*/ -#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -void MPU_vEventGroupSetNumber( void * xEventGroup, - UBaseType_t uxEventGroupNumber ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_vEventGroupSetNumberImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_vEventGroupSetNumber_Unpriv \n" - " MPU_vEventGroupSetNumber_Priv: \n" - " pop {r0} \n" - " b MPU_vEventGroupSetNumberImpl \n" - " MPU_vEventGroupSetNumber_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_vEventGroupSetNumberImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} - -#endif /*( configUSE_TRACE_FACILITY == 1 )*/ + BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsFullImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsFull_Unpriv \n" + " MPU_xStreamBufferIsFull_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsFullImpl \n" + " MPU_xStreamBufferIsFull_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsFull ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, - const void * pvTxData, - size_t xDataLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSendImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSend_Unpriv \n" - " MPU_xStreamBufferSend_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSendImpl \n" - " MPU_xStreamBufferSend_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSendImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferIsEmptyImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferIsEmpty_Unpriv \n" + " MPU_xStreamBufferIsEmpty_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferIsEmptyImpl \n" + " MPU_xStreamBufferIsEmpty_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferIsEmpty ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, - void * pvRxData, - size_t xBufferLengthBytes, - TickType_t xTicksToWait ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferReceiveImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferReceive_Unpriv \n" - " MPU_xStreamBufferReceive_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferReceiveImpl \n" - " MPU_xStreamBufferReceive_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferReceiveImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSpacesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" + " MPU_xStreamBufferSpacesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSpacesAvailableImpl \n" + " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSpacesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsFullImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsFull_Unpriv \n" - " MPU_xStreamBufferIsFull_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsFullImpl \n" - " MPU_xStreamBufferIsFull_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsFullImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferBytesAvailableImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" + " MPU_xStreamBufferBytesAvailable_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferBytesAvailableImpl \n" + " MPU_xStreamBufferBytesAvailable_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferBytesAvailable ) : "memory" + ); + } /*-----------------------------------------------------------*/ -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferIsEmptyImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferIsEmpty_Unpriv \n" - " MPU_xStreamBufferIsEmpty_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferIsEmptyImpl \n" - " MPU_xStreamBufferIsEmpty_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferIsEmptyImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" + " MPU_xStreamBufferSetTriggerLevel_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferSetTriggerLevelImpl \n" + " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferSetTriggerLevel ) : "memory" + ); + } /*-----------------------------------------------------------*/ -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__( ( naked ) ) FREERTOS_SYSTEM_CALL; -size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSpacesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSpacesAvailable_Unpriv \n" - " MPU_xStreamBufferSpacesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSpacesAvailableImpl \n" - " MPU_xStreamBufferSpacesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSpacesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferBytesAvailableImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferBytesAvailable_Unpriv \n" - " MPU_xStreamBufferBytesAvailable_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferBytesAvailableImpl \n" - " MPU_xStreamBufferBytesAvailable_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferBytesAvailableImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, - size_t xTriggerLevel ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferSetTriggerLevelImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferSetTriggerLevel_Unpriv \n" - " MPU_xStreamBufferSetTriggerLevel_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferSetTriggerLevelImpl \n" - " MPU_xStreamBufferSetTriggerLevel_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferSetTriggerLevelImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} -/*-----------------------------------------------------------*/ - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) __attribute__ (( naked )) FREERTOS_SYSTEM_CALL; - -size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ -{ - __asm volatile - ( - " .syntax unified \n" - " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " \n" - " push {r0} \n" - " mrs r0, control \n" - " tst r0, #1 \n" - " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" - " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" - " pop {r0} \n" - " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" - " pop {r0} \n" - " svc %0 \n" - " bl MPU_xStreamBufferNextMessageLengthBytesImpl \n" - " svc %1 \n" - " bx lr \n" - " \n" - : : "i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" - ); -} + size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* __attribute__ (( naked )) FREERTOS_SYSTEM_CALL */ + { + __asm volatile + ( + " .syntax unified \n" + " .extern MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " \n" + " push {r0} \n" + " mrs r0, control \n" + " tst r0, #1 \n" + " bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv \n" + " MPU_xStreamBufferNextMessageLengthBytes_Priv: \n" + " pop {r0} \n" + " b MPU_xStreamBufferNextMessageLengthBytesImpl \n" + " MPU_xStreamBufferNextMessageLengthBytes_Unpriv: \n" + " pop {r0} \n" + " svc %0 \n" + " \n" + : : "i" ( SYSTEM_CALL_xStreamBufferNextMessageLengthBytes ) : "memory" + ); + } /*-----------------------------------------------------------*/ #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c index b6a86cfd2..9d5ff50fc 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c @@ -36,117 +36,120 @@ /* Portasm includes. */ #include "portasm.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the * header files. */ #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #if ( configENABLE_MPU == 1 ) -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " program_mpu_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context_first_task: \n" - " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs_first_task: \n" - " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " \n" - " restore_general_regs_first_task: \n" - " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ - " \n" - " restore_context_done_first_task: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " mov r0, #0 \n" - " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst2: .word pxCurrentTCB \n" - " xMPUCTRLConst2: .word 0xe000ed94 \n" - " xMAIR0Const2: .word 0xe000edc0 \n" - " xRNRConst2: .word 0xe000ed98 \n" - " xRBARConst2: .word 0xe000ed9c \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " program_mpu_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst2 \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + #if ( configTOTAL_MPU_REGIONS == 16 ) + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + #endif /* configTOTAL_MPU_REGIONS == 16 */ + " \n" + " ldr r1, xMPUCTRLConst2 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context_first_task: \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs_first_task: \n" + " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " \n" + " restore_general_regs_first_task: \n" + " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ + " \n" + " restore_context_done_first_task: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst2: .word pxCurrentTCB \n" + " xMPUCTRLConst2: .word 0xe000ed94 \n" + " xMAIR0Const2: .word 0xe000edc0 \n" + " xRNRConst2: .word 0xe000ed98 \n" + " xRBARConst2: .word 0xe000ed9c \n" + ); + } #else /* configENABLE_MPU */ -void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ - " \n" - " ldm r0!, {r1-r2} \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ - " msr psplim, r1 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ - " bx r2 \n"/* Finally, branch to EXC_RETURN. */ - " \n" - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - ); -} + void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ + " \n" + " ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ + " msr psplim, r1 \n" /* Set this task's PSPLIM value. */ + " movs r1, #2 \n" /* r1 = 2. */ + " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n" /* Discard everything up to r0. */ + " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" /* Ensure that interrupts are enabled when the first task starts. */ + " bx r2 \n" /* Finally, branch to EXC_RETURN. */ + " \n" + " .align 4 \n" + "pxCurrentTCBConst2: .word pxCurrentTCB \n" + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -157,12 +160,12 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " ite ne \n" - " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ - " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ - " bx lr \n"/* Return. */ + " movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ + " moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ + " bx lr \n" /* Return. */ " \n" " .align 4 \n" ::: "r0", "memory" @@ -176,10 +179,10 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* Read the CONTROL register. */ - " bic r0, #1 \n"/* Clear the bit 0. */ - " msr control, r0 \n"/* Write back the new CONTROL value. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* Read the CONTROL register. */ + " bic r0, #1 \n" /* Clear the bit 0. */ + " msr control, r0 \n" /* Write back the new CONTROL value. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -191,10 +194,10 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */ ( " .syntax unified \n" " \n" - " mrs r0, control \n"/* r0 = CONTROL. */ - " orr r0, #1 \n"/* r0 = r0 | 1. */ - " msr control, r0 \n"/* CONTROL = r0. */ - " bx lr \n"/* Return to the caller. */ + " mrs r0, control \n" /* r0 = CONTROL. */ + " orr r0, #1 \n" /* r0 = r0 | 1. */ + " msr control, r0 \n" /* CONTROL = r0. */ + " bx lr \n" /* Return to the caller. */ ::: "r0", "memory" ); } @@ -206,15 +209,15 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ ( " .syntax unified \n" " \n" - " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */ - " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */ - " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */ - " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */ - " cpsie i \n"/* Globally enable interrupts. */ + " ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ + " ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ + " ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ + " msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" - " svc %0 \n"/* System call to start the first task. */ + " svc %0 \n" /* System call to start the first task. */ " nop \n" " \n" " .align 4 \n" @@ -230,12 +233,12 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT ( " .syntax unified \n" " \n" - " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */ - " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ + " mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } @@ -247,10 +250,10 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att ( " .syntax unified \n" " \n" - " msr basepri, r0 \n"/* basepri = ulMask. */ + " msr basepri, r0 \n" /* basepri = ulMask. */ " dsb \n" " isb \n" - " bx lr \n"/* Return. */ + " bx lr \n" /* Return. */ ::: "memory" ); } @@ -258,246 +261,239 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att #if ( configENABLE_MPU == 1 ) -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ - " mrs r2, psp \n" /* r2 = PSP. */ - " \n" - " save_general_regs: \n" - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " add r2, r2, #0x20 \n" /* Move r2 to location where s0 is saved. */ - " tst lr, #0x10 \n" - " ittt eq \n" - " vstmiaeq r1!, {s16-s31} \n" /* Store s16-s31. */ - " vldmiaeq r2, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ - " vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */ - " sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " stmia r1!, {r4-r11} \n" /* Store r4-r11. */ - " ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ - " stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */ - " \n" - " save_special_regs: \n" - " mrs r3, psplim \n" /* r3 = PSPLIM. */ - " mrs r4, control \n" /* r4 = CONTROL. */ - " stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ - " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ - " \n" - " select_next_task: \n" - " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n" /* r0 = 0. */ - " msr basepri, r0 \n" /* Enable interrupts. */ - " \n" - " program_mpu: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ - " \n" - " dmb \n" /* Complete outstanding transfers before disabling MPU. */ - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ - " str r2, [r1] \n" /* Disable MPU. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ - " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ - " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r1, [r2] \n" /* Program MAIR0. */ - " \n" - " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ - " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ - " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ - " \n" - " movs r3, #4 \n" /* r3 = 4. */ - " str r3, [r1] \n" /* Program RNR = 4. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - #if ( configTOTAL_MPU_REGIONS == 16 ) - " movs r3, #8 \n" /* r3 = 8. */ - " str r3, [r1] \n" /* Program RNR = 8. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - " movs r3, #12 \n" /* r3 = 12. */ - " str r3, [r1] \n" /* Program RNR = 12. */ - " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ - #endif /* configTOTAL_MPU_REGIONS == 16 */ - " \n" - " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ - " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ - " str r2, [r1] \n" /* Enable MPU. */ - " dsb \n" /* Force memory writes before continuing. */ - " \n" - " restore_context: \n" - " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ - " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ - " \n" - " restore_special_regs: \n" - " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ - " msr psp, r2 \n" - " msr psplim, r3 \n" - " msr control, r4 \n" - " \n" - " restore_general_regs: \n" - " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ - " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ - " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n" - " ittt eq \n" - " vldmdbeq r1!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ - " vstmiaeq r2!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ - " vldmdbeq r1!, {s16-s31} \n" /* Restore s16-s31. */ - #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " restore_context_done: \n" - " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ - " bx lr \n" - " \n" - " .align 4 \n" - " pxCurrentTCBConst: .word pxCurrentTCB \n" - " xMPUCTRLConst: .word 0xe000ed94 \n" - " xMAIR0Const: .word 0xe000edc0 \n" - " xRNRConst: .word 0xe000ed98 \n" - " xRBARConst: .word 0xe000ed9c \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " ldr r1, [r0] \n" /* r1 = Location in TCB where the context should be saved. */ + " mrs r2, psp \n" /* r2 = PSP. */ + " \n" + " save_general_regs: \n" + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " add r2, r2, #0x20 \n" /* Move r2 to location where s0 is saved. */ + " tst lr, #0x10 \n" + " ittt eq \n" + " vstmiaeq r1!, {s16-s31} \n" /* Store s16-s31. */ + " vldmiaeq r2, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */ + " vstmiaeq r1!, {s0-s16} \n" /* Store hardware saved FP context. */ + " sub r2, r2, #0x20 \n" /* Set r2 back to the location of hardware saved context. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " stmia r1!, {r4-r11} \n" /* Store r4-r11. */ + " ldmia r2, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */ + " stmia r1!, {r4-r11} \n" /* Store the hardware saved context. */ + " \n" + " save_special_regs: \n" + " mrs r3, psplim \n" /* r3 = PSPLIM. */ + " mrs r4, control \n" /* r4 = CONTROL. */ + " stmia r1!, {r2-r4, lr} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ + " str r1, [r0] \n" /* Save the location from where the context should be restored as the first member of TCB. */ + " \n" + " select_next_task: \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " program_mpu: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB. */ + " \n" + " dmb \n" /* Complete outstanding transfers before disabling MPU. */ + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */ + " str r2, [r1] \n" /* Disable MPU. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */ + " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ + " ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r1, [r2] \n" /* Program MAIR0. */ + " \n" + " adds r0, #4 \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */ + " ldr r1, xRNRConst \n" /* r1 = 0xe000ed98 [Location of RNR]. */ + " ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ + " \n" + " movs r3, #4 \n" /* r3 = 4. */ + " str r3, [r1] \n" /* Program RNR = 4. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + #if ( configTOTAL_MPU_REGIONS == 16 ) + " movs r3, #8 \n" /* r3 = 8. */ + " str r3, [r1] \n" /* Program RNR = 8. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + " movs r3, #12 \n" /* r3 = 12. */ + " str r3, [r1] \n" /* Program RNR = 12. */ + " ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ + #endif /* configTOTAL_MPU_REGIONS == 16 */ + " \n" + " ldr r1, xMPUCTRLConst \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */ + " orr r2, #1 \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */ + " str r2, [r1] \n" /* Enable MPU. */ + " dsb \n" /* Force memory writes before continuing. */ + " \n" + " restore_context: \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r0, [r2] \n" /* r0 = pxCurrentTCB.*/ + " ldr r1, [r0] \n" /* r1 = Location of saved context in TCB. */ + " \n" + " restore_special_regs: \n" + " ldmdb r1!, {r2-r4, lr} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */ + " msr psp, r2 \n" + " msr psplim, r3 \n" + " msr control, r4 \n" + " \n" + " restore_general_regs: \n" + " ldmdb r1!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */ + " stmia r2!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */ + " ldmdb r1!, {r4-r11} \n" /* r4-r11 restored. */ + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + " tst lr, #0x10 \n" + " ittt eq \n" + " vldmdbeq r1!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */ + " vstmiaeq r2!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */ + " vldmdbeq r1!, {s16-s31} \n" /* Restore s16-s31. */ + #endif /* configENABLE_FPU || configENABLE_MVE */ + " \n" + " restore_context_done: \n" + " str r1, [r0] \n" /* Save the location where the context should be saved next as the first member of TCB. */ + " bx lr \n" + " \n" + " .align 4 \n" + " pxCurrentTCBConst: .word pxCurrentTCB \n" + " xMPUCTRLConst: .word 0xe000ed94 \n" + " xMAIR0Const: .word 0xe000edc0 \n" + " xRNRConst: .word 0xe000ed98 \n" + " xRBARConst: .word 0xe000ed9c \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #else /* configENABLE_MPU */ -void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " mrs r0, psp \n"/* Read PSP in r0. */ - " \n" + void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " mrs r0, psp \n" /* Read PSP in r0. */ + " \n" #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " it eq \n" - " vstmdbeq r0!, {s16-s31} \n"/* Store the additional FP context registers which are not saved automatically. */ + " vstmdbeq r0!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmdb r0!, {r2-r11} \n"/* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " str r0, [r1] \n"/* Save the new top of stack in TCB. */ - " \n" - " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ - " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ - " dsb \n" - " isb \n" - " bl vTaskSwitchContext \n" - " mov r0, #0 \n"/* r0 = 0. */ - " msr basepri, r0 \n"/* Enable interrupts. */ - " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r1, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r0, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ - " \n" - " ldmia r0!, {r2-r11} \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ - " \n" + " \n" + " mrs r2, psplim \n" /* r2 = PSPLIM. */ + " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ + " stmdb r0!, {r2-r11} \n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " str r0, [r1] \n" /* Save the new top of stack in TCB. */ + " \n" + " mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ + " msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" /* r0 = 0. */ + " msr basepri, r0 \n" /* Enable interrupts. */ + " \n" + " ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ + " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ + " \n" + " ldmia r0!, {r2-r11} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ + " \n" #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - " tst r3, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ + " tst r3, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */ " it eq \n" - " vldmiaeq r0!, {s16-s31} \n"/* Restore the additional FP context registers which are not restored automatically. */ + " vldmiaeq r0!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */ #endif /* configENABLE_FPU || configENABLE_MVE */ - " \n" - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " msr psp, r0 \n"/* Remember the new top of stack for the task. */ - " bx r3 \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) - ); -} + " \n" + " msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ + " msr psp, r0 \n" /* Remember the new top of stack for the task. */ + " bx r3 \n" + " \n" + " .align 4 \n" + "pxCurrentTCBConst: .word pxCurrentTCB \n" + ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + ); + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - ".syntax unified \n" - ".extern vPortSVCHandler_C \n" - ".extern vSystemCallEnter \n" - ".extern vSystemCallEnter_1 \n" - ".extern vSystemCallExit \n" - " \n" - "tst lr, #4 \n" - "ite eq \n" - "mrseq r0, msp \n" - "mrsne r0, psp \n" - " \n" - "ldr r1, [r0, #24] \n" - "ldrb r2, [r1, #-2] \n" - "cmp r2, %0 \n" - "beq syscall_enter \n" - "cmp r2, %1 \n" - "beq syscall_enter_1 \n" - "cmp r2, %2 \n" - "beq syscall_exit \n" - "b vPortSVCHandler_C \n" - " \n" - "syscall_enter: \n" - " mov r1, lr \n" - " b vSystemCallEnter \n" - " \n" - "syscall_enter_1: \n" - " mov r1, lr \n" - " b vSystemCallEnter_1 \n" - " \n" - "syscall_exit: \n" - " mov r1, lr \n" - " b vSystemCallExit \n" - " \n" - : /* No outputs. */ - :"i" ( portSVC_SYSTEM_CALL_ENTER ), "i" ( portSVC_SYSTEM_CALL_ENTER_1 ), "i" ( portSVC_SYSTEM_CALL_EXIT ) - : "r0", "r1", "r2", "memory" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + ".syntax unified \n" + ".extern vPortSVCHandler_C \n" + ".extern vSystemCallEnter \n" + ".extern vSystemCallExit \n" + " \n" + "tst lr, #4 \n" + "ite eq \n" + "mrseq r0, msp \n" + "mrsne r0, psp \n" + " \n" + "ldr r1, [r0, #24] \n" + "ldrb r2, [r1, #-2] \n" + "cmp r2, %0 \n" + "blt syscall_enter \n" + "cmp r2, %1 \n" + "beq syscall_exit \n" + "b vPortSVCHandler_C \n" + " \n" + "syscall_enter: \n" + " mov r1, lr \n" + " b vSystemCallEnter \n" + " \n" + "syscall_exit: \n" + " mov r1, lr \n" + " b vSystemCallExit \n" + " \n" + : /* No outputs. */ + : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT ) + : "r0", "r1", "r2", "memory" + ); + } #else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ -{ - __asm volatile - ( - " .syntax unified \n" - " \n" - " tst lr, #4 \n" - " ite eq \n" - " mrseq r0, msp \n" - " mrsne r0, psp \n" - " ldr r1, svchandler_address_const \n" - " bx r1 \n" - " \n" - " .align 4 \n" - "svchandler_address_const: .word vPortSVCHandler_C \n" - ); -} + void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ + { + __asm volatile + ( + " .syntax unified \n" + " \n" + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, svchandler_address_const \n" + " bx r1 \n" + " \n" + " .align 4 \n" + "svchandler_address_const: .word vPortSVCHandler_C \n" + ); + } #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S index ee26520b4..2ffb37043 100644 --- a/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -57,10 +54,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -75,10 +69,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -93,10 +84,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -111,10 +99,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -129,10 +114,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -147,10 +129,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -165,10 +144,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -183,10 +159,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -201,10 +174,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -219,10 +189,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -237,10 +204,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -255,10 +219,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -273,10 +234,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -291,10 +249,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -309,10 +264,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -327,10 +279,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -345,10 +294,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -363,10 +309,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -381,10 +324,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -399,10 +339,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -417,10 +354,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -435,10 +369,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -453,10 +384,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -471,10 +399,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -489,10 +414,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -507,10 +429,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -525,14 +444,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -543,14 +459,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -561,10 +474,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -579,10 +489,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -597,10 +504,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -615,10 +519,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -633,10 +534,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -651,10 +549,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -669,10 +564,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -687,10 +579,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -705,10 +594,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -723,10 +609,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -741,10 +624,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -759,10 +639,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -777,10 +654,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -795,10 +669,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -813,10 +684,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -831,10 +699,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -849,10 +714,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -867,10 +729,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -885,10 +744,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -903,10 +759,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -921,10 +774,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -939,14 +789,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0, r1} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -959,13 +806,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0, r1} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -981,10 +825,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -999,10 +840,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -1017,10 +855,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -1035,10 +870,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -1053,10 +885,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1071,14 +900,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -1089,10 +915,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1107,10 +930,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1125,10 +945,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1143,10 +960,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1161,10 +975,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1179,10 +990,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1197,10 +1005,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1215,10 +1020,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1233,10 +1035,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1251,10 +1050,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1269,10 +1065,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1287,10 +1080,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1305,10 +1095,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1323,10 +1110,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1532,9 +1316,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.s b/portable/IAR/ARM_CM23/non_secure/portasm.s index e89a80448..16a874393 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -33,6 +33,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -45,7 +48,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN SecureContext_LoadContext #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -95,7 +97,7 @@ vResetPrivilege: /*-----------------------------------------------------------*/ vPortAllocateSecureContext: - svc 0 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */ + svc 100 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ @@ -230,7 +232,7 @@ vStartFirstTask: cpsie i /* Globally enable interrupts. */ dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -482,21 +484,17 @@ SVC_Handler: b route_svc route_svc: - ldr r2, [r0, #24] - subs r2, #2 - ldrb r3, [r2, #0] - cmp r3, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq system_call_enter - cmp r3, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq system_call_enter_1 - cmp r3, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + ldr r3, [r0, #24] + subs r3, #2 + ldrb r2, [r3, #0] + cmp r2, #NUM_SYSTEM_CALLS + blt system_call_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq system_call_exit b vPortSVCHandler_C system_call_enter: b vSystemCallEnter - system_call_enter_1: - b vSystemCallEnter_1 system_call_exit: b vSystemCallExit @@ -523,7 +521,7 @@ vPortFreeSecureContext: bne free_secure_context /* Branch if r1 != 0. */ bx lr /* There is no secure context (xSecureContext is NULL). */ free_secure_context: - svc 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */ + svc 101 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S index ee26520b4..2ffb37043 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -57,10 +54,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -75,10 +69,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -93,10 +84,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -111,10 +99,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -129,10 +114,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -147,10 +129,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -165,10 +144,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -183,10 +159,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -201,10 +174,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -219,10 +189,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -237,10 +204,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -255,10 +219,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -273,10 +234,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -291,10 +249,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -309,10 +264,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -327,10 +279,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -345,10 +294,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -363,10 +309,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -381,10 +324,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -399,10 +339,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -417,10 +354,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -435,10 +369,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -453,10 +384,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -471,10 +399,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -489,10 +414,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -507,10 +429,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -525,14 +444,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -543,14 +459,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -561,10 +474,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -579,10 +489,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -597,10 +504,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -615,10 +519,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -633,10 +534,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -651,10 +549,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -669,10 +564,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -687,10 +579,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -705,10 +594,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -723,10 +609,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -741,10 +624,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -759,10 +639,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -777,10 +654,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -795,10 +669,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -813,10 +684,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -831,10 +699,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -849,10 +714,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -867,10 +729,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -885,10 +744,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -903,10 +759,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -921,10 +774,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -939,14 +789,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0, r1} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -959,13 +806,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0, r1} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -981,10 +825,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -999,10 +840,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -1017,10 +855,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -1035,10 +870,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -1053,10 +885,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1071,14 +900,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0, r1} mrs r0, control movs r1, #1 @@ -1089,10 +915,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1107,10 +930,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1125,10 +945,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1143,10 +960,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1161,10 +975,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1179,10 +990,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1197,10 +1005,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1215,10 +1020,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1233,10 +1035,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1251,10 +1050,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1269,10 +1065,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1287,10 +1080,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1305,10 +1095,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1323,10 +1110,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0, r1} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1532,9 +1316,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s index e1a10155d..082e14f3f 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -41,7 +44,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN vPortSVCHandler_C #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -216,7 +218,7 @@ vStartFirstTask: cpsie i /* Globally enable interrupts. */ dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ nop /*-----------------------------------------------------------*/ @@ -401,21 +403,17 @@ SVC_Handler: b route_svc route_svc: - ldr r2, [r0, #24] - subs r2, #2 - ldrb r3, [r2, #0] - cmp r3, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq system_call_enter - cmp r3, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq system_call_enter_1 - cmp r3, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + ldr r3, [r0, #24] + subs r3, #2 + ldrb r2, [r3, #0] + cmp r2, #NUM_SYSTEM_CALLS + blt system_call_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq system_call_exit b vPortSVCHandler_C system_call_enter: b vSystemCallEnter - system_call_enter_1: - b vSystemCallEnter_1 system_call_exit: b vSystemCallExit diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S index cbe6b4909..9ce253f73 100644 --- a/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -56,10 +53,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -73,10 +67,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -90,10 +81,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -124,10 +109,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -141,10 +123,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -175,10 +151,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -192,10 +165,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -209,10 +179,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -243,10 +207,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0} mrs r0, control tst r0, #1 @@ -515,14 +431,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0} mrs r0, control tst r0, #1 @@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -600,10 +501,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -651,10 +543,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -668,10 +557,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -770,10 +641,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -821,10 +683,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -855,10 +711,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -908,13 +755,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -929,10 +773,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -997,10 +829,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0} mrs r0, control tst r0, #1 @@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1082,10 +899,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1133,10 +941,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.s b/portable/IAR/ARM_CM33/non_secure/portasm.s index cc8f3cb6c..372cc19bf 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33/non_secure/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -44,7 +47,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN SecureContext_LoadContext #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -86,7 +88,7 @@ vResetPrivilege: /*-----------------------------------------------------------*/ vPortAllocateSecureContext: - svc 0 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */ + svc 100 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ @@ -205,7 +207,7 @@ vStartFirstTask: cpsie f dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -455,11 +457,9 @@ SVC_Handler: ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq syscall_enter - cmp r2, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq syscall_enter_1 - cmp r2, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq syscall_exit b vPortSVCHandler_C @@ -467,10 +467,6 @@ SVC_Handler: mov r1, lr b vSystemCallEnter - syscall_enter_1: - mov r1, lr - b vSystemCallEnter_1 - syscall_exit: mov r1, lr b vSystemCallExit @@ -493,7 +489,7 @@ vPortFreeSecureContext: ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */ cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */ it ne - svcne 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */ + svcne 101 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S index cbe6b4909..9ce253f73 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -56,10 +53,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -73,10 +67,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -90,10 +81,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -124,10 +109,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -141,10 +123,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -175,10 +151,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -192,10 +165,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -209,10 +179,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -243,10 +207,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0} mrs r0, control tst r0, #1 @@ -515,14 +431,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0} mrs r0, control tst r0, #1 @@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -600,10 +501,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -651,10 +543,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -668,10 +557,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -770,10 +641,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -821,10 +683,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -855,10 +711,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -908,13 +755,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -929,10 +773,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -997,10 +829,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0} mrs r0, control tst r0, #1 @@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1082,10 +899,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1133,10 +941,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s index c738cdde6..afb416a8e 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -41,7 +44,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN vPortSVCHandler_C #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -191,7 +193,7 @@ vStartFirstTask: cpsie f dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -371,11 +373,9 @@ SVC_Handler: ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq syscall_enter - cmp r2, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq syscall_enter_1 - cmp r2, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq syscall_exit b vPortSVCHandler_C @@ -383,10 +383,6 @@ SVC_Handler: mov r1, lr b vSystemCallEnter - syscall_enter_1: - mov r1, lr - b vSystemCallEnter_1 - syscall_exit: mov r1, lr b vSystemCallExit diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S index cbe6b4909..9ce253f73 100644 --- a/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -56,10 +53,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -73,10 +67,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -90,10 +81,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -124,10 +109,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -141,10 +123,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -175,10 +151,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -192,10 +165,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -209,10 +179,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -243,10 +207,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0} mrs r0, control tst r0, #1 @@ -515,14 +431,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0} mrs r0, control tst r0, #1 @@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -600,10 +501,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -651,10 +543,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -668,10 +557,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -770,10 +641,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -821,10 +683,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -855,10 +711,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -908,13 +755,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -929,10 +773,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -997,10 +829,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0} mrs r0, control tst r0, #1 @@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1082,10 +899,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1133,10 +941,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/IAR/ARM_CM35P/non_secure/port.c b/portable/IAR/ARM_CM35P/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/IAR/ARM_CM35P/non_secure/port.c +++ b/portable/IAR/ARM_CM35P/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/IAR/ARM_CM35P/non_secure/portasm.s b/portable/IAR/ARM_CM35P/non_secure/portasm.s index cc8f3cb6c..372cc19bf 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portasm.s +++ b/portable/IAR/ARM_CM35P/non_secure/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -44,7 +47,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN SecureContext_LoadContext #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -86,7 +88,7 @@ vResetPrivilege: /*-----------------------------------------------------------*/ vPortAllocateSecureContext: - svc 0 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */ + svc 100 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ @@ -205,7 +207,7 @@ vStartFirstTask: cpsie f dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -455,11 +457,9 @@ SVC_Handler: ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq syscall_enter - cmp r2, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq syscall_enter_1 - cmp r2, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq syscall_exit b vPortSVCHandler_C @@ -467,10 +467,6 @@ SVC_Handler: mov r1, lr b vSystemCallEnter - syscall_enter_1: - mov r1, lr - b vSystemCallEnter_1 - syscall_exit: mov r1, lr b vSystemCallExit @@ -493,7 +489,7 @@ vPortFreeSecureContext: ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */ cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */ it ne - svcne 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */ + svcne 101 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S index cbe6b4909..9ce253f73 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -56,10 +53,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -73,10 +67,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -90,10 +81,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -124,10 +109,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -141,10 +123,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -175,10 +151,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -192,10 +165,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -209,10 +179,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -243,10 +207,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0} mrs r0, control tst r0, #1 @@ -515,14 +431,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0} mrs r0, control tst r0, #1 @@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -600,10 +501,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -651,10 +543,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -668,10 +557,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -770,10 +641,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -821,10 +683,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -855,10 +711,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -908,13 +755,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -929,10 +773,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -997,10 +829,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0} mrs r0, control tst r0, #1 @@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1082,10 +899,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1133,10 +941,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s index c738cdde6..afb416a8e 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -41,7 +44,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN vPortSVCHandler_C #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -191,7 +193,7 @@ vStartFirstTask: cpsie f dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -371,11 +373,9 @@ SVC_Handler: ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq syscall_enter - cmp r2, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq syscall_enter_1 - cmp r2, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq syscall_exit b vPortSVCHandler_C @@ -383,10 +383,6 @@ SVC_Handler: mov r1, lr b vSystemCallEnter - syscall_enter_1: - mov r1, lr - b vSystemCallEnter_1 - syscall_exit: mov r1, lr b vSystemCallExit diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S index 4f450ca95..67cea9cc0 100644 --- a/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S @@ -32,6 +32,7 @@ * the code is included in C files but excluded by the preprocessor in assembly * files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" SECTION freertos_system_calls:CODE:NOROOT(2) THUMB @@ -41,10 +42,6 @@ #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 3 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 4 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 5 /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) @@ -60,10 +57,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -77,10 +71,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -94,10 +85,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -111,10 +99,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -128,10 +113,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -145,10 +127,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -162,10 +141,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -179,10 +155,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -196,10 +169,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -213,10 +183,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -230,10 +197,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -247,10 +211,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -264,10 +225,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -281,10 +239,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -298,10 +253,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -315,10 +267,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -332,10 +281,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -349,10 +295,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -366,10 +309,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -383,10 +323,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -400,10 +337,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -417,10 +351,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -434,10 +365,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -451,10 +379,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -468,10 +393,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -485,10 +407,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -502,14 +421,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0} mrs r0, control tst r0, #1 @@ -519,14 +435,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0} mrs r0, control tst r0, #1 @@ -536,10 +449,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -553,10 +463,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -570,10 +477,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -587,10 +491,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -604,10 +505,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -621,10 +519,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -638,10 +533,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -655,10 +547,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -672,10 +561,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -689,10 +575,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -706,10 +589,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -723,10 +603,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -740,10 +617,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -757,10 +631,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -774,10 +645,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -791,10 +659,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -808,10 +673,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -825,10 +687,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -842,10 +701,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -859,10 +715,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -876,10 +729,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -893,14 +743,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -912,13 +759,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -933,10 +777,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -950,10 +791,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -967,10 +805,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -984,10 +819,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -1001,10 +833,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1018,14 +847,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0} mrs r0, control tst r0, #1 @@ -1035,10 +861,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1052,10 +875,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1069,10 +889,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1086,10 +903,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1103,10 +917,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1120,10 +931,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1137,10 +945,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1154,10 +959,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1171,10 +973,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1188,10 +987,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1205,10 +1001,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1222,10 +1015,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1239,10 +1029,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1256,10 +1043,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1465,9 +1249,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c old mode 100755 new mode 100644 index 8116a992b..df3b35b53 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -41,6 +41,7 @@ /* Scheduler includes. */ #include "FreeRTOS.h" #include "task.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE @@ -232,31 +233,26 @@ extern void vPortRestoreContextOfFirstTask( void ) PRIVILEGED_FUNCTION; #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -269,7 +265,8 @@ extern void vPortRestoreContextOfFirstTask( void ) PRIVILEGED_FUNCTION; * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -359,10 +356,10 @@ void vPortSVCHandler_C( uint32_t * pulParam ) /* PRIVILEGED_FUNCTION */ uint8_t ucSVCNumber; uint32_t ulPC; - #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) + #if ( ( configUSE_MPU_WRAPPERS_V1 == 1 ) && ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) ) extern uint32_t __syscalls_flash_start__[]; extern uint32_t __syscalls_flash_end__[]; - #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + #endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 1 ) && ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) ) */ /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first * argument (r0) is pulParam[ 0 ]. */ @@ -388,26 +385,15 @@ void vPortSVCHandler_C( uint32_t * pulParam ) /* PRIVILEGED_FUNCTION */ break; - #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) - case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the - * svc was raised from any of the - * system calls. */ + #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) + #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) + case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the + * svc was raised from any of the + * system calls. */ - if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) ) - { - __asm volatile - ( - " mrs r1, control \n" /* Obtain current control value. */ - " bic r1, r1, #1 \n" /* Set privilege bit. */ - " msr control, r1 \n" /* Write back new control value. */ - ::: "r1", "memory" - ); - } - - break; - #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ - case portSVC_RAISE_PRIVILEGE: + if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) ) + { __asm volatile ( " mrs r1, control \n" /* Obtain current control value. */ @@ -415,299 +401,259 @@ void vPortSVCHandler_C( uint32_t * pulParam ) /* PRIVILEGED_FUNCTION */ " msr control, r1 \n" /* Write back new control value. */ ::: "r1", "memory" ); - break; - #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + } - default: /* Unknown SVC call. */ - break; + break; + #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + case portSVC_RAISE_PRIVILEGE: + __asm volatile + ( + " mrs r1, control \n" /* Obtain current control value. */ + " bic r1, r1, #1 \n" /* Set privilege bit. */ + " msr control, r1 \n" /* Write back new control value. */ + ::: "r1", "memory" + ); + break; + #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */ + + default: /* Unknown SVC call. */ + break; } } /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r1, control \n" /* Obtain current control value. */ + " bic r1, #1 \n" /* Clear nPRIV bit. */ + " msr control, r1 \n" /* Write back new control value. */ + ::: "r1", "memory" + ); + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; + } + else + { + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); + } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r1, control \n" /* Obtain current control value. */ - " bic r1, #1 \n" /* Clear nPRIV bit. */ - " msr control, r1 \n" /* Write back new control value. */ - ::: "r1", "memory" - ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Store the value of the Link Register before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r1, control \n" /* Obtain current control value. */ - " bic r1, #1 \n" /* Clear nPRIV bit. */ - " msr control, r1 \n" /* Write back new control value. */ - ::: "r1", "memory" - ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Store the value of the Link Register before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r1, control \n" /* Obtain current control value. */ + " orr r1, #1 \n" /* Set nPRIV bit. */ + " msr control, r1 \n" /* Write back new control value. */ + ::: "r1", "memory" + ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; + } + else + { + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r1, control \n" /* Obtain current control value. */ - " orr r1, #1 \n" /* Set nPRIV bit. */ - " msr control, r1 \n" /* Write back new control value. */ - ::: "r1", "memory" - ); - - /* Restore the stacked link register to what it was at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -736,7 +682,6 @@ BaseType_t xPortStartScheduler( void ) #if ( configENABLE_ERRATA_837070_WORKAROUND == 1 ) configASSERT( ( portCPUID == portCORTEX_M7_r0p1_ID ) || ( portCPUID == portCORTEX_M7_r0p0_ID ) ); #else - /* When using this port on a Cortex-M7 r0p0 or r0p1 core, define * configENABLE_ERRATA_837070_WORKAROUND to 1 in your * FreeRTOSConfig.h. */ @@ -793,22 +738,22 @@ BaseType_t xPortStartScheduler( void ) if( ulImplementedPrioBits == 8 ) { /* When the hardware implements 8 priority bits, there is no way for - * the software to configure PRIGROUP to not have sub-priorities. As - * a result, the least significant bit is always used for sub-priority - * and there are 128 preemption priorities and 2 sub-priorities. - * - * This may cause some confusion in some cases - for example, if - * configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4 - * priority interrupts will be masked in Critical Sections as those - * are at the same preemption priority. This may appear confusing as - * 4 is higher (numerically lower) priority than - * configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not - * have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY - * to 4, this confusion does not happen and the behaviour remains the same. - * - * The following assert ensures that the sub-priority bit in the - * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned - * confusion. */ + * the software to configure PRIGROUP to not have sub-priorities. As + * a result, the least significant bit is always used for sub-priority + * and there are 128 preemption priorities and 2 sub-priorities. + * + * This may cause some confusion in some cases - for example, if + * configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4 + * priority interrupts will be masked in Critical Sections as those + * are at the same preemption priority. This may appear confusing as + * 4 is higher (numerically lower) priority than + * configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not + * have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY + * to 4, this confusion does not happen and the behaviour remains the same. + * + * The following assert ensures that the sub-priority bit in the + * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned + * confusion. */ configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & 0x1U ) == 0U ); ulMaxPRIGROUPValue = 0; } @@ -1122,10 +1067,10 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); - xMPUSettings->xRegionSettings[ 0 ].ulRegionStartAddress = ( uint32_t ) __SRAM_segment_start__; - xMPUSettings->xRegionSettings[ 0 ].ulRegionEndAddress = ( uint32_t ) __SRAM_segment_end__; - xMPUSettings->xRegionSettings[ 0 ].ulRegionPermissions = ( tskMPU_READ_PERMISSION | - tskMPU_WRITE_PERMISSION ); + xMPUSettings->xRegionSettings[ 0 ].ulRegionStartAddress = ( uint32_t ) __SRAM_segment_start__; + xMPUSettings->xRegionSettings[ 0 ].ulRegionEndAddress = ( uint32_t ) __SRAM_segment_end__; + xMPUSettings->xRegionSettings[ 0 ].ulRegionPermissions = ( tskMPU_READ_PERMISSION | + tskMPU_WRITE_PERMISSION ); /* Invalidate user configurable regions. */ for( ul = 1UL; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) @@ -1163,7 +1108,6 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1UL ); xMPUSettings->xRegionSettings[ 0 ].ulRegionPermissions = ( tskMPU_READ_PERMISSION | tskMPU_WRITE_PERMISSION ); - } lIndex = 0; @@ -1185,14 +1129,16 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( xRegions[ lIndex ].ulParameters ) | ( portMPU_REGION_ENABLE ); - xMPUSettings->xRegionSettings[ ul ].ulRegionStartAddress = ( uint32_t) xRegions[ lIndex ].pvBaseAddress; + xMPUSettings->xRegionSettings[ ul ].ulRegionStartAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress; xMPUSettings->xRegionSettings[ ul ].ulRegionEndAddress = ( uint32_t ) ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1UL ); xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = 0UL; + if( ( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_READ_ONLY ) == portMPU_REGION_READ_ONLY ) || ( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) == portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) ) { xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = tskMPU_READ_PERMISSION; } + if( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_READ_WRITE ) == portMPU_REGION_READ_WRITE ) { xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = ( tskMPU_READ_PERMISSION | tskMPU_WRITE_PERMISSION ); diff --git a/portable/IAR/ARM_CM4F_MPU/portasm.s b/portable/IAR/ARM_CM4F_MPU/portasm.s index 4f7248918..f7ff75afa 100644 --- a/portable/IAR/ARM_CM4F_MPU/portasm.s +++ b/portable/IAR/ARM_CM4F_MPU/portasm.s @@ -32,6 +32,7 @@ To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include +#include RSEG CODE:CODE(2) thumb @@ -40,7 +41,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN vTaskSwitchContext EXTERN vPortSVCHandler_C EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit PUBLIC xPortPendSVHandler @@ -58,9 +58,8 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. #endif /* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 3 -#define portSVC_SYSTEM_CALL_ENTER_1 4 -#define portSVC_SYSTEM_CALL_EXIT 5 +#define portSVC_START_SCHEDULER 100 +#define portSVC_SYSTEM_CALL_EXIT 103 /*-----------------------------------------------------------*/ xPortPendSVHandler: @@ -164,10 +163,8 @@ vPortSVCHandler: ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #portSVC_SYSTEM_CALL_ENTER - beq syscall_enter - cmp r2, #portSVC_SYSTEM_CALL_ENTER_1 - beq syscall_enter_1 + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter cmp r2, #portSVC_SYSTEM_CALL_EXIT beq syscall_exit b vPortSVCHandler_C @@ -176,10 +173,6 @@ vPortSVCHandler: mov r1, lr b vSystemCallEnter - syscall_enter_1: - mov r1, lr - b vSystemCallEnter_1 - syscall_exit: mov r1, lr b vSystemCallExit @@ -218,7 +211,7 @@ vPortStartFirstTask: cpsie f dsb isb - svc 0 + svc #portSVC_START_SCHEDULER /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h index 1105b8ba8..48a08b598 100644 --- a/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -243,12 +243,10 @@ typedef struct MPU_SETTINGS /*-----------------------------------------------------------*/ /* SVC numbers for various services. */ -#define portSVC_START_SCHEDULER 0 -#define portSVC_YIELD 1 -#define portSVC_RAISE_PRIVILEGE 2 -#define portSVC_SYSTEM_CALL_ENTER 3 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 4 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 5 +#define portSVC_START_SCHEDULER 100 +#define portSVC_YIELD 101 +#define portSVC_RAISE_PRIVILEGE 102 +#define portSVC_SYSTEM_CALL_EXIT 103 /* Scheduler utilities. */ diff --git a/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S index cbe6b4909..9ce253f73 100644 --- a/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -56,10 +53,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -73,10 +67,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -90,10 +81,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -124,10 +109,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -141,10 +123,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -175,10 +151,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -192,10 +165,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -209,10 +179,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -243,10 +207,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0} mrs r0, control tst r0, #1 @@ -515,14 +431,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0} mrs r0, control tst r0, #1 @@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -600,10 +501,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -651,10 +543,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -668,10 +557,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -770,10 +641,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -821,10 +683,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -855,10 +711,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -908,13 +755,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -929,10 +773,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -997,10 +829,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0} mrs r0, control tst r0, #1 @@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1082,10 +899,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1133,10 +941,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/IAR/ARM_CM55/non_secure/port.c b/portable/IAR/ARM_CM55/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/IAR/ARM_CM55/non_secure/port.c +++ b/portable/IAR/ARM_CM55/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/IAR/ARM_CM55/non_secure/portasm.s b/portable/IAR/ARM_CM55/non_secure/portasm.s index cc8f3cb6c..372cc19bf 100644 --- a/portable/IAR/ARM_CM55/non_secure/portasm.s +++ b/portable/IAR/ARM_CM55/non_secure/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -44,7 +47,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN SecureContext_LoadContext #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -86,7 +88,7 @@ vResetPrivilege: /*-----------------------------------------------------------*/ vPortAllocateSecureContext: - svc 0 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */ + svc 100 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ @@ -205,7 +207,7 @@ vStartFirstTask: cpsie f dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -455,11 +457,9 @@ SVC_Handler: ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq syscall_enter - cmp r2, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq syscall_enter_1 - cmp r2, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq syscall_exit b vPortSVCHandler_C @@ -467,10 +467,6 @@ SVC_Handler: mov r1, lr b vSystemCallEnter - syscall_enter_1: - mov r1, lr - b vSystemCallEnter_1 - syscall_exit: mov r1, lr b vSystemCallExit @@ -493,7 +489,7 @@ vPortFreeSecureContext: ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */ cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */ it ne - svcne 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */ + svcne 101 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S index cbe6b4909..9ce253f73 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -56,10 +53,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -73,10 +67,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -90,10 +81,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -124,10 +109,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -141,10 +123,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -175,10 +151,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -192,10 +165,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -209,10 +179,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -243,10 +207,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0} mrs r0, control tst r0, #1 @@ -515,14 +431,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0} mrs r0, control tst r0, #1 @@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -600,10 +501,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -651,10 +543,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -668,10 +557,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -770,10 +641,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -821,10 +683,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -855,10 +711,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -908,13 +755,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -929,10 +773,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -997,10 +829,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0} mrs r0, control tst r0, #1 @@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1082,10 +899,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1133,10 +941,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s index c738cdde6..afb416a8e 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -41,7 +44,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN vPortSVCHandler_C #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -191,7 +193,7 @@ vStartFirstTask: cpsie f dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -371,11 +373,9 @@ SVC_Handler: ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq syscall_enter - cmp r2, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq syscall_enter_1 - cmp r2, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq syscall_exit b vPortSVCHandler_C @@ -383,10 +383,6 @@ SVC_Handler: mov r1, lr b vSystemCallEnter - syscall_enter_1: - mov r1, lr - b vSystemCallEnter_1 - syscall_exit: mov r1, lr b vSystemCallExit diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S index cbe6b4909..9ce253f73 100644 --- a/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -56,10 +53,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -73,10 +67,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -90,10 +81,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -124,10 +109,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -141,10 +123,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -175,10 +151,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -192,10 +165,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -209,10 +179,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -243,10 +207,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0} mrs r0, control tst r0, #1 @@ -515,14 +431,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0} mrs r0, control tst r0, #1 @@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -600,10 +501,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -651,10 +543,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -668,10 +557,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -770,10 +641,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -821,10 +683,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -855,10 +711,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -908,13 +755,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -929,10 +773,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -997,10 +829,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0} mrs r0, control tst r0, #1 @@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1082,10 +899,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1133,10 +941,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/IAR/ARM_CM85/non_secure/port.c b/portable/IAR/ARM_CM85/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/IAR/ARM_CM85/non_secure/port.c +++ b/portable/IAR/ARM_CM85/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/IAR/ARM_CM85/non_secure/portasm.s b/portable/IAR/ARM_CM85/non_secure/portasm.s index cc8f3cb6c..372cc19bf 100644 --- a/portable/IAR/ARM_CM85/non_secure/portasm.s +++ b/portable/IAR/ARM_CM85/non_secure/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -44,7 +47,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN SecureContext_LoadContext #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -86,7 +88,7 @@ vResetPrivilege: /*-----------------------------------------------------------*/ vPortAllocateSecureContext: - svc 0 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */ + svc 100 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ @@ -205,7 +207,7 @@ vStartFirstTask: cpsie f dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -455,11 +457,9 @@ SVC_Handler: ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq syscall_enter - cmp r2, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq syscall_enter_1 - cmp r2, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq syscall_exit b vPortSVCHandler_C @@ -467,10 +467,6 @@ SVC_Handler: mov r1, lr b vSystemCallEnter - syscall_enter_1: - mov r1, lr - b vSystemCallEnter_1 - syscall_exit: mov r1, lr b vSystemCallExit @@ -493,7 +489,7 @@ vPortFreeSecureContext: ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */ cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */ it ne - svcne 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */ + svcne 101 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */ bx lr /* Return. */ /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S index cbe6b4909..9ce253f73 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -32,15 +32,12 @@ /*-----------------------------------------------------------*/ #include "FreeRTOSConfig.h" +#include "mpu_syscall_numbers.h" #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif -/* These must be in sync with portmacro.h. */ -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) @@ -56,10 +53,7 @@ MPU_xTaskDelayUntil: b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskAbortDelay @@ -73,10 +67,7 @@ MPU_xTaskAbortDelay: b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskDelay @@ -90,10 +81,7 @@ MPU_vTaskDelay: b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskPriorityGet @@ -107,10 +95,7 @@ MPU_uxTaskPriorityGet: b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet /*-----------------------------------------------------------*/ PUBLIC MPU_eTaskGetState @@ -124,10 +109,7 @@ MPU_eTaskGetState: b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskGetInfo @@ -141,10 +123,7 @@ MPU_vTaskGetInfo: b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetIdleTaskHandle @@ -158,10 +137,7 @@ MPU_xTaskGetIdleTaskHandle: b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSuspend @@ -175,10 +151,7 @@ MPU_vTaskSuspend: b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskResume @@ -192,10 +165,7 @@ MPU_vTaskResume: b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetTickCount @@ -209,10 +179,7 @@ MPU_xTaskGetTickCount: b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetNumberOfTasks @@ -226,10 +193,7 @@ MPU_uxTaskGetNumberOfTasks: b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks /*-----------------------------------------------------------*/ PUBLIC MPU_pcTaskGetName @@ -243,10 +207,7 @@ MPU_pcTaskGetName: b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimeCounter @@ -260,10 +221,7 @@ MPU_ulTaskGetRunTimeCounter: b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetRunTimePercent @@ -277,10 +235,7 @@ MPU_ulTaskGetRunTimePercent: b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimePercent @@ -294,10 +249,7 @@ MPU_ulTaskGetIdleRunTimePercent: b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGetIdleRunTimeCounter @@ -311,10 +263,7 @@ MPU_ulTaskGetIdleRunTimeCounter: b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetApplicationTaskTag @@ -328,10 +277,7 @@ MPU_vTaskSetApplicationTaskTag: b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetApplicationTaskTag @@ -345,10 +291,7 @@ MPU_xTaskGetApplicationTaskTag: b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetThreadLocalStoragePointer @@ -362,10 +305,7 @@ MPU_vTaskSetThreadLocalStoragePointer: b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_pvTaskGetThreadLocalStoragePointer @@ -379,10 +319,7 @@ MPU_pvTaskGetThreadLocalStoragePointer: b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetSystemState @@ -396,10 +333,7 @@ MPU_uxTaskGetSystemState: b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark @@ -413,10 +347,7 @@ MPU_uxTaskGetStackHighWaterMark: b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark /*-----------------------------------------------------------*/ PUBLIC MPU_uxTaskGetStackHighWaterMark2 @@ -430,10 +361,7 @@ MPU_uxTaskGetStackHighWaterMark2: b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetCurrentTaskHandle @@ -447,10 +375,7 @@ MPU_xTaskGetCurrentTaskHandle: b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGetSchedulerState @@ -464,10 +389,7 @@ MPU_xTaskGetSchedulerState: b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState /*-----------------------------------------------------------*/ PUBLIC MPU_vTaskSetTimeOutState @@ -481,10 +403,7 @@ MPU_vTaskSetTimeOutState: b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskCheckForTimeOut @@ -498,14 +417,11 @@ MPU_xTaskCheckForTimeOut: b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotify -MPU_xTaskGenericNotify: + PUBLIC MPU_xTaskGenericNotifyEntry +MPU_xTaskGenericNotifyEntry: push {r0} mrs r0, control tst r0, #1 @@ -515,14 +431,11 @@ MPU_xTaskGenericNotify: b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify /*-----------------------------------------------------------*/ - PUBLIC MPU_xTaskGenericNotifyWait -MPU_xTaskGenericNotifyWait: + PUBLIC MPU_xTaskGenericNotifyWaitEntry +MPU_xTaskGenericNotifyWaitEntry: push {r0} mrs r0, control tst r0, #1 @@ -532,10 +445,7 @@ MPU_xTaskGenericNotifyWait: b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyTake @@ -549,10 +459,7 @@ MPU_ulTaskGenericNotifyTake: b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake /*-----------------------------------------------------------*/ PUBLIC MPU_xTaskGenericNotifyStateClear @@ -566,10 +473,7 @@ MPU_xTaskGenericNotifyStateClear: b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear /*-----------------------------------------------------------*/ PUBLIC MPU_ulTaskGenericNotifyValueClear @@ -583,10 +487,7 @@ MPU_ulTaskGenericNotifyValueClear: b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGenericSend @@ -600,10 +501,7 @@ MPU_xQueueGenericSend: b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueMessagesWaiting @@ -617,10 +515,7 @@ MPU_uxQueueMessagesWaiting: b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting /*-----------------------------------------------------------*/ PUBLIC MPU_uxQueueSpacesAvailable @@ -634,10 +529,7 @@ MPU_uxQueueSpacesAvailable: b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueReceive @@ -651,10 +543,7 @@ MPU_xQueueReceive: b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueuePeek @@ -668,10 +557,7 @@ MPU_xQueuePeek: b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSemaphoreTake @@ -685,10 +571,7 @@ MPU_xQueueSemaphoreTake: b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGetMutexHolder @@ -702,10 +585,7 @@ MPU_xQueueGetMutexHolder: b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueTakeMutexRecursive @@ -719,10 +599,7 @@ MPU_xQueueTakeMutexRecursive: b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueGiveMutexRecursive @@ -736,10 +613,7 @@ MPU_xQueueGiveMutexRecursive: b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueSelectFromSet @@ -753,10 +627,7 @@ MPU_xQueueSelectFromSet: b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet /*-----------------------------------------------------------*/ PUBLIC MPU_xQueueAddToSet @@ -770,10 +641,7 @@ MPU_xQueueAddToSet: b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueAddToRegistry @@ -787,10 +655,7 @@ MPU_vQueueAddToRegistry: b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry /*-----------------------------------------------------------*/ PUBLIC MPU_vQueueUnregisterQueue @@ -804,10 +669,7 @@ MPU_vQueueUnregisterQueue: b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue /*-----------------------------------------------------------*/ PUBLIC MPU_pcQueueGetName @@ -821,10 +683,7 @@ MPU_pcQueueGetName: b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName /*-----------------------------------------------------------*/ PUBLIC MPU_pvTimerGetTimerID @@ -838,10 +697,7 @@ MPU_pvTimerGetTimerID: b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetTimerID @@ -855,10 +711,7 @@ MPU_vTimerSetTimerID: b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerIsTimerActive @@ -872,10 +725,7 @@ MPU_xTimerIsTimerActive: b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetTimerDaemonTaskHandle @@ -889,14 +739,11 @@ MPU_xTimerGetTimerDaemonTaskHandle: b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle /*-----------------------------------------------------------*/ - PUBLIC MPU_xTimerGenericCommand -MPU_xTimerGenericCommand: + PUBLIC MPU_xTimerGenericCommandEntry +MPU_xTimerGenericCommandEntry: push {r0} /* This function can be called from ISR also and therefore, we need a check * to take privileged path, if called from ISR. */ @@ -908,13 +755,10 @@ MPU_xTimerGenericCommand: beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv: pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl /*-----------------------------------------------------------*/ @@ -929,10 +773,7 @@ MPU_pcTimerGetName: b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName /*-----------------------------------------------------------*/ PUBLIC MPU_vTimerSetReloadMode @@ -946,10 +787,7 @@ MPU_vTimerSetReloadMode: b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetReloadMode @@ -963,10 +801,7 @@ MPU_xTimerGetReloadMode: b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_uxTimerGetReloadMode @@ -980,10 +815,7 @@ MPU_uxTimerGetReloadMode: b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetPeriod @@ -997,10 +829,7 @@ MPU_xTimerGetPeriod: b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod /*-----------------------------------------------------------*/ PUBLIC MPU_xTimerGetExpiryTime @@ -1014,14 +843,11 @@ MPU_xTimerGetExpiryTime: b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime /*-----------------------------------------------------------*/ - PUBLIC MPU_xEventGroupWaitBits -MPU_xEventGroupWaitBits: + PUBLIC MPU_xEventGroupWaitBitsEntry +MPU_xEventGroupWaitBitsEntry: push {r0} mrs r0, control tst r0, #1 @@ -1031,10 +857,7 @@ MPU_xEventGroupWaitBits: b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupClearBits @@ -1048,10 +871,7 @@ MPU_xEventGroupClearBits: b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSetBits @@ -1065,10 +885,7 @@ MPU_xEventGroupSetBits: b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits /*-----------------------------------------------------------*/ PUBLIC MPU_xEventGroupSync @@ -1082,10 +899,7 @@ MPU_xEventGroupSync: b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync /*-----------------------------------------------------------*/ PUBLIC MPU_uxEventGroupGetNumber @@ -1099,10 +913,7 @@ MPU_uxEventGroupGetNumber: b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_vEventGroupSetNumber @@ -1116,10 +927,7 @@ MPU_vEventGroupSetNumber: b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSend @@ -1133,10 +941,7 @@ MPU_xStreamBufferSend: b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferReceive @@ -1150,10 +955,7 @@ MPU_xStreamBufferReceive: b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsFull @@ -1167,10 +969,7 @@ MPU_xStreamBufferIsFull: b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferIsEmpty @@ -1184,10 +983,7 @@ MPU_xStreamBufferIsEmpty: b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSpacesAvailable @@ -1201,10 +997,7 @@ MPU_xStreamBufferSpacesAvailable: b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferBytesAvailable @@ -1218,10 +1011,7 @@ MPU_xStreamBufferBytesAvailable: b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferSetTriggerLevel @@ -1235,10 +1025,7 @@ MPU_xStreamBufferSetTriggerLevel: b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel /*-----------------------------------------------------------*/ PUBLIC MPU_xStreamBufferNextMessageLengthBytes @@ -1252,10 +1039,7 @@ MPU_xStreamBufferNextMessageLengthBytes: b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv: pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes /*-----------------------------------------------------------*/ /* Default weak implementations in case one is not available from @@ -1461,9 +1245,9 @@ MPU_xTimerIsTimerActiveImpl: MPU_xTimerGetTimerDaemonTaskHandleImpl: b MPU_xTimerGetTimerDaemonTaskHandleImpl - PUBWEAK MPU_xTimerGenericCommandImpl -MPU_xTimerGenericCommandImpl: - b MPU_xTimerGenericCommandImpl + PUBWEAK MPU_xTimerGenericCommandPrivImpl +MPU_xTimerGenericCommandPrivImpl: + b MPU_xTimerGenericCommandPrivImpl PUBWEAK MPU_pcTimerGetNameImpl MPU_pcTimerGetNameImpl: diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c index 70a97cec3..4b1564397 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c @@ -35,8 +35,9 @@ #include "FreeRTOS.h" #include "task.h" -/* MPU wrappers includes. */ +/* MPU includes. */ #include "mpu_wrappers.h" +#include "mpu_syscall_numbers.h" /* Portasm includes. */ #include "portasm.h" @@ -216,11 +217,11 @@ /* Extract last address of the MPU region as encoded in the * RLAR (Region Limit Address Register) value. */ -#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ +#define portEXTRACT_LAST_ADDRESS_FROM_RLAR( rlar ) \ ( ( ( rlar ) & portMPU_RLAR_ADDRESS_MASK ) | ~portMPU_RLAR_ADDRESS_MASK ) /* Does addr lies within [start, end] address range? */ -#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ +#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \ ( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) ) /* Is the access request satisfied by the available permissions? */ @@ -422,31 +423,26 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -459,7 +455,8 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -813,7 +810,6 @@ static void prvTaskExitError( void ) static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */ { #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_functions_start__; @@ -983,7 +979,6 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO { #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __syscalls_flash_start__; @@ -1101,513 +1096,454 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; + + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Store the value of the PSPLIM register before the SVC was raised. + * We need to restore it when we exit from the system call. */ + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* Use the pulSystemCallStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Record if the hardware used padding to force the stack pointer + * to be double word aligned. */ + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + + /* Raise the privilege for the duration of the system call. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " bics r0, r1 \n" /* Clear nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vRequestSystemCallExit( void ) /* __attribute__( ( naked ) ) PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) - { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Store the value of the LR and PSPLIM registers before the SVC was raised. - * We need to restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* Use the pulSystemCallStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - - /* Raise the privilege for the duration of the system call. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " bics r0, r1 \n" /* Clear nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); + __asm volatile ( "svc %0 \n" ::"i" ( portSVC_SYSTEM_CALL_EXIT ) : "memory" ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being - * exported from linker scripts. */ - extern uint32_t * __syscalls_flash_start__; - extern uint32_t * __syscalls_flash_end__; - #else - /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - #endif /* #if defined( __ARMCC_VERSION ) */ - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i; - #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) + #if defined( __ARMCC_VERSION ) + /* Declaration when these variable are defined in code instead of being + * exported from linker scripts. */ + extern uint32_t * __privileged_functions_start__; + extern uint32_t * __privileged_functions_end__; + #else + /* Declaration when these variable are exported from linker scripts. */ + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + #endif /* #if defined( __ARMCC_VERSION ) */ + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) { - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - __asm volatile ( - " vpush {s0} \n" /* Trigger lazy stacking. */ - " vpop {s0} \n" /* Nullify the affect of the above instruction. */ - ::: "memory" - ); + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + __asm volatile + ( + " vpush {s0} \n" /* Trigger lazy stacking. */ + " vpop {s0} \n" /* Nullify the affect of the above instruction. */ + ::: "memory" + ); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + } + #else /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + { + ulStackFrameSize = 8; + } + #endif /* if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* Restore the PSPLIM register to what it was at the time of + * system call entry. */ + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; } else { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + + /* Drop the privilege before returning to the thread mode. */ + __asm volatile + ( + " mrs r0, control \n" /* Obtain current control value. */ + " movs r1, #1 \n" /* r1 = 1. */ + " orrs r0, r1 \n" /* Set nPRIV bit. */ + " msr control, r0 \n" /* Write back new control value. */ + ::: "r0", "r1", "memory" + ); } - #else - { - ulStackFrameSize = 8; - } - #endif /* configENABLE_FPU || configENABLE_MVE */ - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) ); - - /* Restore the LR and PSPLIM to what they were at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; - - /* Drop the privilege before returning to the thread mode. */ - __asm volatile ( - " mrs r0, control \n" /* Obtain current control value. */ - " movs r1, #1 \n" /* r1 = 1. */ - " orrs r0, r1 \n" /* Set nPRIV bit. */ - " msr control, r0 \n" /* Write back new control value. */ - ::: "r0", "r1", "memory" - ); } -} #endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configENABLE_MPU == 1 ) -BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ -{ - BaseType_t xTaskIsPrivileged = pdFALSE; - const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - - if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ { - xTaskIsPrivileged = pdTRUE; - } + BaseType_t xTaskIsPrivileged = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ - return xTaskIsPrivileged; -} + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xTaskIsPrivileged = pdTRUE; + } + + return xTaskIsPrivileged; + } #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ -#if( configENABLE_MPU == 1 ) +#if ( configENABLE_MPU == 1 ) -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters, - BaseType_t xRunPrivileged, - xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ -{ - uint32_t ulIndex = 0; - - xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ - ulIndex++; - - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ - ulIndex++; - - #if ( configENABLE_TRUSTZONE == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged, + xMPU_SETTINGS * xMPUSettings ) /* PRIVILEGED_FUNCTION */ { - xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + uint32_t ulIndex = 0; + + xMPUSettings->ulContext[ ulIndex ] = 0x04040404; /* r4. */ ulIndex++; - } - #endif /* configENABLE_TRUSTZONE */ - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ - ulIndex++; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ - ulIndex++; - if( xRunPrivileged == pdTRUE ) - { - xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x05050505; /* r5. */ ulIndex++; - } - else - { - xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); - xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + xMPUSettings->ulContext[ ulIndex ] = 0x06060606; /* r6. */ ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x07070707; /* r7. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x08080808; /* r8. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x09090909; /* r9. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x10101010; /* r10. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x11111111; /* r11. */ + ulIndex++; + + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pvParameters; /* r0. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x01010101; /* r1. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x02020202; /* r2. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x03030303; /* r3. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = 0x12121212; /* r12. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portTASK_RETURN_ADDRESS; /* LR. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxCode; /* PC. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_XPSR; /* xPSR. */ + ulIndex++; + + #if ( configENABLE_TRUSTZONE == 1 ) + { + xMPUSettings->ulContext[ ulIndex ] = portNO_SECURE_CONTEXT; /* xSecureContext. */ + ulIndex++; + } + #endif /* configENABLE_TRUSTZONE */ + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */ + ulIndex++; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */ + ulIndex++; + if( xRunPrivileged == pdTRUE ) + { + xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG; + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_PRIVILEGED; /* CONTROL. */ + ulIndex++; + } + else + { + xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG ); + xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) portINITIAL_CONTROL_UNPRIVILEGED; /* CONTROL. */ + ulIndex++; + } + xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ + ulIndex++; + + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + { + /* Ensure that the system call stack is double word aligned. */ + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); + xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + + ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & + ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); + + /* This is not NULL only for the duration of a system call. */ + xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } + #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ + + return &( xMPUSettings->ulContext[ ulIndex ] ); } - xMPUSettings->ulContext[ ulIndex ] = portINITIAL_EXC_RETURN; /* LR (EXC_RETURN). */ - ulIndex++; - - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - { - /* Ensure that the system call stack is double word aligned. */ - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ 0 ] ); - xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit = ( uint32_t * ) ( ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) + - ( uint32_t ) ( portBYTE_ALIGNMENT - 1 ) ) & - ( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) ); - - /* This is not NULL only for the duration of a system call. */ - xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL; - } - #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ - - return &( xMPUSettings->ulContext[ ulIndex ] ); -} #else /* configENABLE_MPU */ -StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, - StackType_t * pxEndOfStack, - TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ -{ - /* Simulate the stack frame as it would be created by a context switch - * interrupt. */ - #if ( portPRELOAD_REGISTERS == 0 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) /* PRIVILEGED_FUNCTION */ { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ - *pxTopOfStack = portINITIAL_EXC_RETURN; - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - - #if ( configENABLE_TRUSTZONE == 1 ) + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + #if ( portPRELOAD_REGISTERS == 0 ) { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #else /* portPRELOAD_REGISTERS */ - { - pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ - pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack -= 9; /* R11..R4, EXC_RETURN. */ + *pxTopOfStack = portINITIAL_EXC_RETURN; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - #if ( configENABLE_TRUSTZONE == 1 ) + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #else /* portPRELOAD_REGISTERS */ { + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR. */ pxTopOfStack--; - *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ - } - #endif /* configENABLE_TRUSTZONE */ - } - #endif /* portPRELOAD_REGISTERS */ + *pxTopOfStack = ( StackType_t ) pxCode; /* PC. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303UL; /* R3. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101UL; /* R1. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909UL; /* R09. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808UL; /* R08. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707UL; /* R07. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606UL; /* R06. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505UL; /* R05. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404UL; /* R04. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXC_RETURN; /* EXC_RETURN. */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxEndOfStack; /* Slot used to hold this task's PSPLIM value. */ - return pxTopOfStack; -} + #if ( configENABLE_TRUSTZONE == 1 ) + { + pxTopOfStack--; + *pxTopOfStack = portNO_SECURE_CONTEXT; /* Slot used to hold this task's xSecureContext value. */ + } + #endif /* configENABLE_TRUSTZONE */ + } + #endif /* portPRELOAD_REGISTERS */ + + return pxTopOfStack; + } #endif /* configENABLE_MPU */ /*-----------------------------------------------------------*/ @@ -1750,7 +1686,6 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ int32_t lIndex = 0; #if defined( __ARMCC_VERSION ) - /* Declaration when these variable are defined in code instead of being * exported from linker scripts. */ extern uint32_t * __privileged_sram_start__; diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s index c738cdde6..afb416a8e 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s @@ -32,6 +32,9 @@ the code is included in C files but excluded by the preprocessor in assembly files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ #include "FreeRTOSConfig.h" +/* System call numbers includes. */ +#include "mpu_syscall_numbers.h" + #ifndef configUSE_MPU_WRAPPERS_V1 #define configUSE_MPU_WRAPPERS_V1 0 #endif @@ -41,7 +44,6 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. EXTERN vPortSVCHandler_C #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) EXTERN vSystemCallEnter - EXTERN vSystemCallEnter_1 EXTERN vSystemCallExit #endif @@ -191,7 +193,7 @@ vStartFirstTask: cpsie f dsb isb - svc 2 /* System call to start the first task. portSVC_START_SCHEDULER = 2. */ + svc 102 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */ /*-----------------------------------------------------------*/ ulSetInterruptMask: @@ -371,11 +373,9 @@ SVC_Handler: ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #4 /* portSVC_SYSTEM_CALL_ENTER. */ - beq syscall_enter - cmp r2, #5 /* portSVC_SYSTEM_CALL_ENTER_1. */ - beq syscall_enter_1 - cmp r2, #6 /* portSVC_SYSTEM_CALL_EXIT. */ + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter + cmp r2, #104 /* portSVC_SYSTEM_CALL_EXIT. */ beq syscall_exit b vPortSVCHandler_C @@ -383,10 +383,6 @@ SVC_Handler: mov r1, lr b vSystemCallEnter - syscall_enter_1: - mov r1, lr - b vSystemCallEnter_1 - syscall_exit: mov r1, lr b vSystemCallExit diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h index 6e8864a45..2ef4c90c1 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -316,13 +316,12 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P /** * @brief SVC numbers. */ -#define portSVC_ALLOCATE_SECURE_CONTEXT 0 -#define portSVC_FREE_SECURE_CONTEXT 1 -#define portSVC_START_SCHEDULER 2 -#define portSVC_RAISE_PRIVILEGE 3 -#define portSVC_SYSTEM_CALL_ENTER 4 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 5 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 6 +#define portSVC_ALLOCATE_SECURE_CONTEXT 100 +#define portSVC_FREE_SECURE_CONTEXT 101 +#define portSVC_START_SCHEDULER 102 +#define portSVC_RAISE_PRIVILEGE 103 +#define portSVC_SYSTEM_CALL_EXIT 104 +#define portSVC_YIELD 105 /*-----------------------------------------------------------*/ /** diff --git a/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c b/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c index bcd73a0af..9c67e02e0 100644 --- a/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c +++ b/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c @@ -38,6 +38,8 @@ #include "timers.h" #include "event_groups.h" #include "stream_buffer.h" +#include "mpu_prototypes.h" +#include "mpu_syscall_numbers.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*-----------------------------------------------------------*/ @@ -64,10 +66,7 @@ MPU_xTaskDelayUntil_Priv b MPU_xTaskDelayUntilImpl MPU_xTaskDelayUntil_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskDelayUntilImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskDelayUntil } #endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ @@ -91,10 +90,7 @@ MPU_xTaskAbortDelay_Priv b MPU_xTaskAbortDelayImpl MPU_xTaskAbortDelay_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskAbortDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskAbortDelay } #endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ @@ -118,10 +114,7 @@ MPU_vTaskDelay_Priv b MPU_vTaskDelayImpl MPU_vTaskDelay_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskDelayImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskDelay } #endif /* if ( INCLUDE_vTaskDelay == 1 ) */ @@ -145,10 +138,7 @@ MPU_uxTaskPriorityGet_Priv b MPU_uxTaskPriorityGetImpl MPU_uxTaskPriorityGet_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskPriorityGetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskPriorityGet } #endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ @@ -172,10 +162,7 @@ MPU_eTaskGetState_Priv b MPU_eTaskGetStateImpl MPU_eTaskGetState_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_eTaskGetStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_eTaskGetState } #endif /* if ( INCLUDE_eTaskGetState == 1 ) */ @@ -205,10 +192,7 @@ MPU_vTaskGetInfo_Priv b MPU_vTaskGetInfoImpl MPU_vTaskGetInfo_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskGetInfoImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskGetInfo } #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ @@ -232,10 +216,7 @@ MPU_xTaskGetIdleTaskHandle_Priv b MPU_xTaskGetIdleTaskHandleImpl MPU_xTaskGetIdleTaskHandle_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetIdleTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetIdleTaskHandle } #endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ @@ -259,10 +240,7 @@ MPU_vTaskSuspend_Priv b MPU_vTaskSuspendImpl MPU_vTaskSuspend_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSuspendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSuspend } #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ @@ -286,10 +264,7 @@ MPU_vTaskResume_Priv b MPU_vTaskResumeImpl MPU_vTaskResume_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskResumeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskResume } #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ @@ -311,10 +286,7 @@ MPU_xTaskGetTickCount_Priv b MPU_xTaskGetTickCountImpl MPU_xTaskGetTickCount_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetTickCountImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetTickCount } /*-----------------------------------------------------------*/ @@ -334,10 +306,7 @@ MPU_uxTaskGetNumberOfTasks_Priv b MPU_uxTaskGetNumberOfTasksImpl MPU_uxTaskGetNumberOfTasks_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetNumberOfTasksImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetNumberOfTasks } /*-----------------------------------------------------------*/ @@ -357,10 +326,7 @@ MPU_pcTaskGetName_Priv b MPU_pcTaskGetNameImpl MPU_pcTaskGetName_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTaskGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTaskGetName } /*-----------------------------------------------------------*/ @@ -382,10 +348,7 @@ MPU_ulTaskGetRunTimeCounter_Priv b MPU_ulTaskGetRunTimeCounterImpl MPU_ulTaskGetRunTimeCounter_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimeCounter } #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ @@ -409,10 +372,7 @@ MPU_ulTaskGetRunTimePercent_Priv b MPU_ulTaskGetRunTimePercentImpl MPU_ulTaskGetRunTimePercent_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetRunTimePercent } #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) */ @@ -436,10 +396,7 @@ MPU_ulTaskGetIdleRunTimePercent_Priv b MPU_ulTaskGetIdleRunTimePercentImpl MPU_ulTaskGetIdleRunTimePercent_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimePercentImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent } #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ @@ -463,10 +420,7 @@ MPU_ulTaskGetIdleRunTimeCounter_Priv b MPU_ulTaskGetIdleRunTimeCounterImpl MPU_ulTaskGetIdleRunTimeCounter_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGetIdleRunTimeCounterImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter } #endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ @@ -492,10 +446,7 @@ MPU_vTaskSetApplicationTaskTag_Priv b MPU_vTaskSetApplicationTaskTagImpl MPU_vTaskSetApplicationTaskTag_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetApplicationTaskTag } #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ @@ -519,10 +470,7 @@ MPU_xTaskGetApplicationTaskTag_Priv b MPU_xTaskGetApplicationTaskTagImpl MPU_xTaskGetApplicationTaskTag_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetApplicationTaskTagImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetApplicationTaskTag } #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ @@ -550,10 +498,7 @@ MPU_vTaskSetThreadLocalStoragePointer_Priv b MPU_vTaskSetThreadLocalStoragePointerImpl MPU_vTaskSetThreadLocalStoragePointer_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer } #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ @@ -579,10 +524,7 @@ MPU_pvTaskGetThreadLocalStoragePointer_Priv b MPU_pvTaskGetThreadLocalStoragePointerImpl MPU_pvTaskGetThreadLocalStoragePointer_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTaskGetThreadLocalStoragePointerImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer } #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ @@ -610,10 +552,7 @@ MPU_uxTaskGetSystemState_Priv b MPU_uxTaskGetSystemStateImpl MPU_uxTaskGetSystemState_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetSystemStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetSystemState } #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ @@ -637,10 +576,7 @@ MPU_uxTaskGetStackHighWaterMark_Priv b MPU_uxTaskGetStackHighWaterMarkImpl MPU_uxTaskGetStackHighWaterMark_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMarkImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark } #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ @@ -664,10 +600,7 @@ MPU_uxTaskGetStackHighWaterMark2_Priv b MPU_uxTaskGetStackHighWaterMark2Impl MPU_uxTaskGetStackHighWaterMark2_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTaskGetStackHighWaterMark2Impl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2 } #endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ @@ -691,10 +624,7 @@ MPU_xTaskGetCurrentTaskHandle_Priv b MPU_xTaskGetCurrentTaskHandleImpl MPU_xTaskGetCurrentTaskHandle_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetCurrentTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle } #endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ @@ -718,10 +648,7 @@ MPU_xTaskGetSchedulerState_Priv b MPU_xTaskGetSchedulerStateImpl MPU_xTaskGetSchedulerState_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGetSchedulerStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGetSchedulerState } #endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ @@ -743,10 +670,7 @@ MPU_vTaskSetTimeOutState_Priv b MPU_vTaskSetTimeOutStateImpl MPU_vTaskSetTimeOutState_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTaskSetTimeOutStateImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTaskSetTimeOutState } /*-----------------------------------------------------------*/ @@ -768,26 +692,15 @@ MPU_xTaskCheckForTimeOut_Priv b MPU_xTaskCheckForTimeOutImpl MPU_xTaskCheckForTimeOut_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskCheckForTimeOutImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskCheckForTimeOut } /*-----------------------------------------------------------*/ #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) FREERTOS_SYSTEM_CALL; -__asm BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, - UBaseType_t uxIndexToNotify, - uint32_t ulValue, - eNotifyAction eAction, - uint32_t * pulPreviousNotificationValue ) /* FREERTOS_SYSTEM_CALL */ +__asm BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) /* FREERTOS_SYSTEM_CALL */ { PRESERVE8 extern MPU_xTaskGenericNotifyImpl @@ -801,10 +714,7 @@ MPU_xTaskGenericNotify_Priv b MPU_xTaskGenericNotifyImpl MPU_xTaskGenericNotify_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotify } #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ @@ -812,17 +722,9 @@ MPU_xTaskGenericNotify_Unpriv #if ( configUSE_TASK_NOTIFICATIONS == 1 ) -BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) FREERTOS_SYSTEM_CALL; -__asm BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, - uint32_t ulBitsToClearOnEntry, - uint32_t ulBitsToClearOnExit, - uint32_t * pulNotificationValue, - TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ +__asm BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) /* FREERTOS_SYSTEM_CALL */ { PRESERVE8 extern MPU_xTaskGenericNotifyWaitImpl @@ -836,10 +738,7 @@ MPU_xTaskGenericNotifyWait_Priv b MPU_xTaskGenericNotifyWaitImpl MPU_xTaskGenericNotifyWait_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTaskGenericNotifyWaitImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyWait } #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ @@ -867,10 +766,7 @@ MPU_ulTaskGenericNotifyTake_Priv b MPU_ulTaskGenericNotifyTakeImpl MPU_ulTaskGenericNotifyTake_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyTake } #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ @@ -896,10 +792,7 @@ MPU_xTaskGenericNotifyStateClear_Priv b MPU_xTaskGenericNotifyStateClearImpl MPU_xTaskGenericNotifyStateClear_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTaskGenericNotifyStateClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTaskGenericNotifyStateClear } #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ @@ -927,10 +820,7 @@ MPU_ulTaskGenericNotifyValueClear_Priv b MPU_ulTaskGenericNotifyValueClearImpl MPU_ulTaskGenericNotifyValueClear_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_ulTaskGenericNotifyValueClearImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear } #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ @@ -958,10 +848,7 @@ MPU_xQueueGenericSend_Priv b MPU_xQueueGenericSendImpl MPU_xQueueGenericSend_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGenericSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGenericSend } /*-----------------------------------------------------------*/ @@ -981,10 +868,7 @@ MPU_uxQueueMessagesWaiting_Priv b MPU_uxQueueMessagesWaitingImpl MPU_uxQueueMessagesWaiting_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueMessagesWaitingImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueMessagesWaiting } /*-----------------------------------------------------------*/ @@ -1004,10 +888,7 @@ MPU_uxQueueSpacesAvailable_Priv b MPU_uxQueueSpacesAvailableImpl MPU_uxQueueSpacesAvailable_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxQueueSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxQueueSpacesAvailable } /*-----------------------------------------------------------*/ @@ -1031,10 +912,7 @@ MPU_xQueueReceive_Priv b MPU_xQueueReceiveImpl MPU_xQueueReceive_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueReceive } /*-----------------------------------------------------------*/ @@ -1058,10 +936,7 @@ MPU_xQueuePeek_Priv b MPU_xQueuePeekImpl MPU_xQueuePeek_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueuePeekImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueuePeek } /*-----------------------------------------------------------*/ @@ -1083,10 +958,7 @@ MPU_xQueueSemaphoreTake_Priv b MPU_xQueueSemaphoreTakeImpl MPU_xQueueSemaphoreTake_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSemaphoreTakeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSemaphoreTake } /*-----------------------------------------------------------*/ @@ -1108,10 +980,7 @@ MPU_xQueueGetMutexHolder_Priv b MPU_xQueueGetMutexHolderImpl MPU_xQueueGetMutexHolder_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGetMutexHolderImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGetMutexHolder } #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ @@ -1137,10 +1006,7 @@ MPU_xQueueTakeMutexRecursive_Priv b MPU_xQueueTakeMutexRecursiveImpl MPU_xQueueTakeMutexRecursive_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueTakeMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueTakeMutexRecursive } #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ @@ -1164,10 +1030,7 @@ MPU_xQueueGiveMutexRecursive_Priv b MPU_xQueueGiveMutexRecursiveImpl MPU_xQueueGiveMutexRecursive_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueGiveMutexRecursiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueGiveMutexRecursive } #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ @@ -1193,10 +1056,7 @@ MPU_xQueueSelectFromSet_Priv b MPU_xQueueSelectFromSetImpl MPU_xQueueSelectFromSet_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueSelectFromSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueSelectFromSet } #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ @@ -1222,10 +1082,7 @@ MPU_xQueueAddToSet_Priv b MPU_xQueueAddToSetImpl MPU_xQueueAddToSet_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xQueueAddToSetImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xQueueAddToSet } #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ @@ -1251,10 +1108,7 @@ MPU_vQueueAddToRegistry_Priv b MPU_vQueueAddToRegistryImpl MPU_vQueueAddToRegistry_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueAddToRegistryImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueAddToRegistry } #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ @@ -1278,10 +1132,7 @@ MPU_vQueueUnregisterQueue_Priv b MPU_vQueueUnregisterQueueImpl MPU_vQueueUnregisterQueue_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vQueueUnregisterQueueImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vQueueUnregisterQueue } #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ @@ -1305,10 +1156,7 @@ MPU_pcQueueGetName_Priv b MPU_pcQueueGetNameImpl MPU_pcQueueGetName_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcQueueGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcQueueGetName } #endif /* if ( configQUEUE_REGISTRY_SIZE > 0 ) */ @@ -1332,10 +1180,7 @@ MPU_pvTimerGetTimerID_Priv b MPU_pvTimerGetTimerIDImpl MPU_pvTimerGetTimerID_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pvTimerGetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pvTimerGetTimerID } #endif /* if ( configUSE_TIMERS == 1 ) */ @@ -1361,10 +1206,7 @@ MPU_vTimerSetTimerID_Priv b MPU_vTimerSetTimerIDImpl MPU_vTimerSetTimerID_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetTimerIDImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetTimerID } #endif /* if ( configUSE_TIMERS == 1 ) */ @@ -1388,10 +1230,7 @@ MPU_xTimerIsTimerActive_Priv b MPU_xTimerIsTimerActiveImpl MPU_xTimerIsTimerActive_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerIsTimerActiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerIsTimerActive } #endif /* if ( configUSE_TIMERS == 1 ) */ @@ -1415,10 +1254,7 @@ MPU_xTimerGetTimerDaemonTaskHandle_Priv b MPU_xTimerGetTimerDaemonTaskHandleImpl MPU_xTimerGetTimerDaemonTaskHandle_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetTimerDaemonTaskHandleImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle } #endif /* if ( configUSE_TIMERS == 1 ) */ @@ -1426,20 +1262,12 @@ MPU_xTimerGetTimerDaemonTaskHandle_Unpriv #if ( configUSE_TIMERS == 1 ) -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) FREERTOS_SYSTEM_CALL; -__asm BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, - const BaseType_t xCommandID, - const TickType_t xOptionalValue, - BaseType_t * const pxHigherPriorityTaskWoken, - const TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ +__asm BaseType_t MPU_xTimerGenericCommandEntry( const xTimerGenericCommandParams_t * pxParams ) /* FREERTOS_SYSTEM_CALL */ { PRESERVE8 - extern MPU_xTimerGenericCommandImpl + extern MPU_xTimerGenericCommandPrivImpl push {r0} mrs r0, ipsr @@ -1450,13 +1278,10 @@ __asm BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, beq MPU_xTimerGenericCommand_Priv MPU_xTimerGenericCommand_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xTimerGenericCommandImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGenericCommand MPU_xTimerGenericCommand_Priv pop {r0} - b MPU_xTimerGenericCommandImpl + b MPU_xTimerGenericCommandPrivImpl } #endif /* if ( configUSE_TIMERS == 1 ) */ @@ -1480,10 +1305,7 @@ MPU_pcTimerGetName_Priv b MPU_pcTimerGetNameImpl MPU_pcTimerGetName_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_pcTimerGetNameImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_pcTimerGetName } #endif /* if ( configUSE_TIMERS == 1 ) */ @@ -1509,10 +1331,7 @@ MPU_vTimerSetReloadMode_Priv b MPU_vTimerSetReloadModeImpl MPU_vTimerSetReloadMode_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vTimerSetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vTimerSetReloadMode } #endif /* if ( configUSE_TIMERS == 1 ) */ @@ -1536,10 +1355,7 @@ MPU_xTimerGetReloadMode_Priv b MPU_xTimerGetReloadModeImpl MPU_xTimerGetReloadMode_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetReloadMode } #endif /* if ( configUSE_TIMERS == 1 ) */ @@ -1563,10 +1379,7 @@ MPU_uxTimerGetReloadMode_Priv b MPU_uxTimerGetReloadModeImpl MPU_uxTimerGetReloadMode_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxTimerGetReloadModeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxTimerGetReloadMode } #endif /* if ( configUSE_TIMERS == 1 ) */ @@ -1590,10 +1403,7 @@ MPU_xTimerGetPeriod_Priv b MPU_xTimerGetPeriodImpl MPU_xTimerGetPeriod_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetPeriodImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetPeriod } #endif /* if ( configUSE_TIMERS == 1 ) */ @@ -1617,26 +1427,15 @@ MPU_xTimerGetExpiryTime_Priv b MPU_xTimerGetExpiryTimeImpl MPU_xTimerGetExpiryTime_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xTimerGetExpiryTimeImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xTimerGetExpiryTime } #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) FREERTOS_SYSTEM_CALL; -__asm EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, - const EventBits_t uxBitsToWaitFor, - const BaseType_t xClearOnExit, - const BaseType_t xWaitForAllBits, - TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ +__asm EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) /* FREERTOS_SYSTEM_CALL */ { PRESERVE8 extern MPU_xEventGroupWaitBitsImpl @@ -1650,10 +1449,7 @@ MPU_xEventGroupWaitBits_Priv b MPU_xEventGroupWaitBitsImpl MPU_xEventGroupWaitBits_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER_1 - bl MPU_xEventGroupWaitBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupWaitBits } /*-----------------------------------------------------------*/ @@ -1675,10 +1471,7 @@ MPU_xEventGroupClearBits_Priv b MPU_xEventGroupClearBitsImpl MPU_xEventGroupClearBits_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupClearBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupClearBits } /*-----------------------------------------------------------*/ @@ -1700,10 +1493,7 @@ MPU_xEventGroupSetBits_Priv b MPU_xEventGroupSetBitsImpl MPU_xEventGroupSetBits_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSetBitsImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSetBits } /*-----------------------------------------------------------*/ @@ -1729,10 +1519,7 @@ MPU_xEventGroupSync_Priv b MPU_xEventGroupSyncImpl MPU_xEventGroupSync_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xEventGroupSyncImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xEventGroupSync } /*-----------------------------------------------------------*/ @@ -1754,10 +1541,7 @@ MPU_uxEventGroupGetNumber_Priv b MPU_uxEventGroupGetNumberImpl MPU_uxEventGroupGetNumber_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_uxEventGroupGetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_uxEventGroupGetNumber } #endif /*( configUSE_TRACE_FACILITY == 1 )*/ @@ -1783,10 +1567,7 @@ MPU_vEventGroupSetNumber_Priv b MPU_vEventGroupSetNumberImpl MPU_vEventGroupSetNumber_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_vEventGroupSetNumberImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_vEventGroupSetNumber } #endif /*( configUSE_TRACE_FACILITY == 1 )*/ @@ -1814,10 +1595,7 @@ MPU_xStreamBufferSend_Priv b MPU_xStreamBufferSendImpl MPU_xStreamBufferSend_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSendImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSend } /*-----------------------------------------------------------*/ @@ -1843,10 +1621,7 @@ MPU_xStreamBufferReceive_Priv b MPU_xStreamBufferReceiveImpl MPU_xStreamBufferReceive_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferReceiveImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferReceive } /*-----------------------------------------------------------*/ @@ -1866,10 +1641,7 @@ MPU_xStreamBufferIsFull_Priv b MPU_xStreamBufferIsFullImpl MPU_xStreamBufferIsFull_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsFullImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsFull } /*-----------------------------------------------------------*/ @@ -1889,10 +1661,7 @@ MPU_xStreamBufferIsEmpty_Priv b MPU_xStreamBufferIsEmptyImpl MPU_xStreamBufferIsEmpty_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferIsEmptyImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferIsEmpty } /*-----------------------------------------------------------*/ @@ -1912,10 +1681,7 @@ MPU_xStreamBufferSpacesAvailable_Priv b MPU_xStreamBufferSpacesAvailableImpl MPU_xStreamBufferSpacesAvailable_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSpacesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSpacesAvailable } /*-----------------------------------------------------------*/ @@ -1935,10 +1701,7 @@ MPU_xStreamBufferBytesAvailable_Priv b MPU_xStreamBufferBytesAvailableImpl MPU_xStreamBufferBytesAvailable_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferBytesAvailableImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferBytesAvailable } /*-----------------------------------------------------------*/ @@ -1960,10 +1723,7 @@ MPU_xStreamBufferSetTriggerLevel_Priv b MPU_xStreamBufferSetTriggerLevelImpl MPU_xStreamBufferSetTriggerLevel_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferSetTriggerLevelImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel } /*-----------------------------------------------------------*/ @@ -1983,10 +1743,7 @@ MPU_xStreamBufferNextMessageLengthBytes_Priv b MPU_xStreamBufferNextMessageLengthBytesImpl MPU_xStreamBufferNextMessageLengthBytes_Unpriv pop {r0} - svc #portSVC_SYSTEM_CALL_ENTER - bl MPU_xStreamBufferNextMessageLengthBytesImpl - svc #portSVC_SYSTEM_CALL_EXIT - bx lr + svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes } /*-----------------------------------------------------------*/ diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c old mode 100755 new mode 100644 index 95db1b76a..6702c4cd9 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -38,6 +38,7 @@ /* Scheduler includes. */ #include "FreeRTOS.h" #include "task.h" +#include "mpu_syscall_numbers.h" #ifndef __TARGET_FPU_VFP #error This port can only be used when the project options are configured to enable hardware floating point support. @@ -237,38 +238,37 @@ void vResetPrivilege( void ); void vPortExitCritical( void ) PRIVILEGED_FUNCTION; #endif +#if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + /** * @brief Triggers lazy stacking of FPU registers. */ -static void prvTriggerLazyStacking( void ) PRIVILEGED_FUNCTION; - -#if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with up to 4 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + static void prvTriggerLazyStacking( void ) PRIVILEGED_FUNCTION; #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - /** - * @brief Sets up the system call stack so that upon returning from - * SVC, the system call stack is used. - * - * It is used for the system calls with 5 parameters. - * - * @param pulTaskStack The current SP when the SVC was raised. - * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. - */ - void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; +/** + * @brief Sets up the system call stack so that upon returning from + * SVC, the system call stack is used. + * + * @param pulTaskStack The current SP when the SVC was raised. + * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. + * @param ucSystemCallNumber The system call number of the system call. + */ + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) PRIVILEGED_FUNCTION; + +#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ + +#if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + +/** + * @brief Raise SVC for exiting from a system call. + */ + void vRequestSystemCallExit( void ) PRIVILEGED_FUNCTION; #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -281,7 +281,8 @@ static void prvTriggerLazyStacking( void ) PRIVILEGED_FUNCTION; * @param pulSystemCallStack The current SP when the SVC was raised. * @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler. */ - void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION; + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) PRIVILEGED_FUNCTION; #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -351,12 +352,16 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, void vSVCHandler_C( uint32_t * pulParam ) { uint8_t ucSVCNumber; - uint32_t ulPC, ulReg; + uint32_t ulPC; - #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) + #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) + uint32_t ulReg; + #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */ + + #if ( ( configUSE_MPU_WRAPPERS_V1 == 1 ) && ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) ) extern uint32_t __syscalls_flash_start__; extern uint32_t __syscalls_flash_end__; - #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + #endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 1 ) && ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) ) */ /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first * argument (r0) is pulParam[ 0 ]. */ @@ -382,27 +387,15 @@ void vSVCHandler_C( uint32_t * pulParam ) break; - #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) - case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the - * svc was raised from any of the - * system calls. */ + #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) + #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) + case portSVC_RAISE_PRIVILEGE: /* Only raise the privilege, if the + * svc was raised from any of the + * system calls. */ - if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) ) - { - __asm - { - /* *INDENT-OFF* */ - mrs ulReg, control /* Obtain current control value. */ - bic ulReg, # 1 /* Set privilege bit. */ - msr control, ulReg /* Write back new control value. */ - /* *INDENT-ON* */ - } - } - - break; - #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ - case portSVC_RAISE_PRIVILEGE: + if( ( ulPC >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulPC <= ( uint32_t ) __syscalls_flash_end__ ) ) + { __asm { /* *INDENT-OFF* */ @@ -411,284 +404,253 @@ void vSVCHandler_C( uint32_t * pulParam ) msr control, ulReg /* Write back new control value. */ /* *INDENT-ON* */ } - break; - #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + } - default: /* Unknown SVC call. */ - break; + break; + #else /* if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + case portSVC_RAISE_PRIVILEGE: + __asm + { + /* *INDENT-OFF* */ + mrs ulReg, control /* Obtain current control value. */ + bic ulReg, # 1 /* Set privilege bit. */ + msr control, ulReg /* Write back new control value. */ + /* *INDENT-ON* */ + } + break; + #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ + #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */ + + default: /* Unknown SVC call. */ + break; } } /*-----------------------------------------------------------*/ -__asm void prvTriggerLazyStacking( void ) /* PRIVILEGED_FUNCTION */ -{ -/* *INDENT-OFF* */ - PRESERVE8 - - vpush {s0} /* Trigger lazy stacking. */ - vpop {s0} /* Nullify the affect of the above instruction. */ - -/* *INDENT-ON* */ -} -/*-----------------------------------------------------------*/ - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i, r1; - extern uint32_t __syscalls_flash_start__; - extern uint32_t __syscalls_flash_end__; - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + __asm void prvTriggerLazyStacking( void ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; + /* *INDENT-OFF* */ + PRESERVE8 - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); + vpush {s0} /* Trigger lazy stacking. */ + vpop {s0} /* Nullify the affect of the above instruction. */ - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - prvTriggerLazyStacking(); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - - /* Make space on the system call stack for the stack frame. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } - - /* Use the pulSystemCallStack in thread mode. */ - __asm - { - msr psp, pulSystemCallStack - }; - - /* Raise the privilege for the duration of the system call. */ - __asm - { - mrs r1, control /* Obtain current control value. */ - bic r1, #1 /* Clear nPRIV bit. */ - msr control, r1 /* Write back new control value. */ - }; - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Store the value of the Link Register before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; - } - else - { - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + /* *INDENT-ON* */ } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulSystemCallStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i, r1; - extern uint32_t __syscalls_flash_start__; - extern uint32_t __syscalls_flash_end__; - - ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + void vSystemCallEnter( uint32_t * pulTaskStack, + uint32_t ulLR, + uint8_t ucSystemCallNumber ) /* PRIVILEGED_FUNCTION */ { + extern TaskHandle_t pxCurrentTCB; + extern UBaseType_t uxSystemCallImplementations[ NUM_SYSTEM_CALLS ]; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulSystemCallStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i, r1; + extern uint32_t __syscalls_flash_start__; + extern uint32_t __syscalls_flash_end__; + + ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ]; pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* This is not NULL only for the duration of the system call. */ - configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ); - - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + /* Checks: + * 1. SVC is raised from the system call section (i.e. application is + * not raising SVC directly). + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as + * it is non-NULL only during the execution of a system call (i.e. + * between system call enter and exit). + * 3. System call is not for a kernel API disabled by the configuration + * in FreeRTOSConfig.h. + * 4. We do not need to check that ucSystemCallNumber is within range + * because the assembly SVC handler checks that before calling + * this function. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL ) && + ( uxSystemCallImplementations[ ucSystemCallNumber ] != ( UBaseType_t ) 0 ) ) { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - prvTriggerLazyStacking(); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } + pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack; - /* Make space on the system call stack for the stack frame and - * the parameter passed on the stack. We only need to copy one - * parameter but we still reserve 2 spaces to keep the stack - * double word aligned. */ - pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL; + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + prvTriggerLazyStacking(); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulSystemCallStack[ i ] = pulTaskStack[ i ]; - } + /* Make space on the system call stack for the stack frame. */ + pulSystemCallStack = pulSystemCallStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulSystemCallStack[ i ] = pulTaskStack[ i ]; + } + + /* Use the pulSystemCallStack in thread mode. */ + __asm + { + msr psp, pulSystemCallStack + }; + + /* Raise the privilege for the duration of the system call. */ + __asm + { + mrs r1, control /* Obtain current control value. */ + bic r1, #1 /* Clear nPRIV bit. */ + msr control, r1 /* Write back new control value. */ + }; + + /* Remember the location where we should copy the stack frame when we exit from + * the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; + + /* Store the value of the Link Register before the SVC was raised. + * It contains the address of the caller of the System Call entry + * point (i.e. the caller of the MPU_). We need to restore it + * when we exit from the system call. */ + pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; + + /* Start executing the system call upon returning from this handler. */ + pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ]; + + /* Raise a request to exit from the system call upon finishing the + * system call. */ + pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit; - /* Copy the parameter which is passed the stack. */ - if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ]; /* Record if the hardware used padding to force the stack pointer * to be double word aligned. */ - pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; + if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK ) + { + pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG; + } + else + { + pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); + } + + /* We ensure in pxPortInitialiseStack that the system call stack is + * double word aligned and therefore, there is no need of padding. + * Clear the bit[9] of stacked xPSR. */ + pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } - else - { - pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ]; - /* Record if the hardware used padding to force the stack pointer - * to be double word aligned. */ - pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG ); - } - - /* Use the pulSystemCallStack in thread mode. */ - __asm - { - msr psp, pulSystemCallStack - }; - - /* Raise the privilege for the duration of the system call. */ - __asm - { - mrs r1, control /* Obtain current control value. */ - bic r1, #1 /* Clear nPRIV bit. */ - msr control, r1 /* Write back new control value. */ - }; - - /* Remember the location where we should copy the stack frame when we exit from - * the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize; - - /* Store the value of the Link Register before the SVC was raised. We need to - * restore it when we exit from the system call. */ - pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - - /* We ensure in pxPortInitialiseStack that the system call stack is - * double word aligned and therefore, there is no need of padding. - * Clear the bit[9] of stacked xPSR. */ - pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) -void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ -{ - extern TaskHandle_t pxCurrentTCB; - xMPU_SETTINGS * pxMpuSettings; - uint32_t * pulTaskStack; - uint32_t ulStackFrameSize, ulSystemCallLocation, i, r1; - extern uint32_t __syscalls_flash_start__; - extern uint32_t __syscalls_flash_end__; - - ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; - - /* If the request did not come from the system call section, do nothing. */ - if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) && - ( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) ) + __asm void vRequestSystemCallExit( void ) /* PRIVILEGED_FUNCTION */ { - pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); - pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + PRESERVE8 - if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) - { - /* Extended frame i.e. FPU in use. */ - ulStackFrameSize = 26; - prvTriggerLazyStacking(); - } - else - { - /* Standard frame i.e. FPU not in use. */ - ulStackFrameSize = 8; - } - - /* Make space on the task stack for the stack frame. */ - pulTaskStack = pulTaskStack - ulStackFrameSize; - - /* Copy the stack frame. */ - for( i = 0; i < ulStackFrameSize; i++ ) - { - pulTaskStack[ i ] = pulSystemCallStack[ i ]; - } - - /* Use the pulTaskStack in thread mode. */ - __asm - { - msr psp, pulTaskStack - }; - - /* Drop the privilege before returning to the thread mode. */ - __asm - { - mrs r1, control /* Obtain current control value. */ - orr r1, #1 /* Set nPRIV bit. */ - msr control, r1 /* Write back new control value. */ - }; - - /* Restore the stacked link register to what it was at the time of - * system call entry. */ - pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - - /* If the hardware used padding to force the stack pointer - * to be double word aligned, set the stacked xPSR bit[9], - * otherwise clear it. */ - if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) - { - pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; - } - else - { - pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); - } - - /* This is not NULL only for the duration of the system call. */ - pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + svc #portSVC_SYSTEM_CALL_EXIT + } + +#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + + void vSystemCallExit( uint32_t * pulSystemCallStack, + uint32_t ulLR ) /* PRIVILEGED_FUNCTION */ + { + extern TaskHandle_t pxCurrentTCB; + xMPU_SETTINGS * pxMpuSettings; + uint32_t * pulTaskStack; + uint32_t ulStackFrameSize, ulSystemCallLocation, i, r1; + extern uint32_t __privileged_functions_start__; + extern uint32_t __privileged_functions_end__; + + ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ]; + pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB ); + + /* Checks: + * 1. SVC is raised from the privileged code (i.e. application is not + * raising SVC directly). This SVC is only raised from + * vRequestSystemCallExit which is in the privileged code section. + * 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must not be NULL - + * this means that we previously entered a system call and the + * application is not attempting to exit without entering a system + * call. + */ + if( ( ulSystemCallLocation >= ( uint32_t ) __privileged_functions_start__ ) && + ( ulSystemCallLocation <= ( uint32_t ) __privileged_functions_end__ ) && + ( pxMpuSettings->xSystemCallStackInfo.pulTaskStack != NULL ) ) + { + pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack; + + if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL ) + { + /* Extended frame i.e. FPU in use. */ + ulStackFrameSize = 26; + prvTriggerLazyStacking(); + } + else + { + /* Standard frame i.e. FPU not in use. */ + ulStackFrameSize = 8; + } + + /* Make space on the task stack for the stack frame. */ + pulTaskStack = pulTaskStack - ulStackFrameSize; + + /* Copy the stack frame. */ + for( i = 0; i < ulStackFrameSize; i++ ) + { + pulTaskStack[ i ] = pulSystemCallStack[ i ]; + } + + /* Use the pulTaskStack in thread mode. */ + __asm + { + msr psp, pulTaskStack + }; + + /* Drop the privilege before returning to the thread mode. */ + __asm + { + mrs r1, control /* Obtain current control value. */ + orr r1, #1 /* Set nPRIV bit. */ + msr control, r1 /* Write back new control value. */ + }; + + /* Return to the caller of the System Call entry point (i.e. the + * caller of the MPU_). */ + pulTaskStack[ portOFFSET_TO_PC ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + /* Ensure that LR has a valid value.*/ + pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; + + /* If the hardware used padding to force the stack pointer + * to be double word aligned, set the stacked xPSR bit[9], + * otherwise clear it. */ + if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG ) + { + pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK; + } + else + { + pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK ); + } + + /* This is not NULL only for the duration of the system call. */ + pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL; + } } -} #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -709,14 +671,13 @@ BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */ #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) +/* *INDENT-OFF* */ __asm void vPortSVCHandler( void ) { extern vSVCHandler_C extern vSystemCallEnter - extern vSystemCallEnter_1 extern vSystemCallExit -/* *INDENT-OFF* */ PRESERVE8 tst lr, #4 @@ -726,10 +687,8 @@ __asm void vPortSVCHandler( void ) ldr r1, [r0, #24] ldrb r2, [r1, #-2] - cmp r2, #portSVC_SYSTEM_CALL_ENTER - beq syscall_enter - cmp r2, #portSVC_SYSTEM_CALL_ENTER_1 - beq syscall_enter_1 + cmp r2, #NUM_SYSTEM_CALLS + blt syscall_enter cmp r2, #portSVC_SYSTEM_CALL_EXIT beq syscall_exit b vSVCHandler_C @@ -738,14 +697,9 @@ syscall_enter mov r1, lr b vSystemCallEnter -syscall_enter_1 - mov r1, lr - b vSystemCallEnter_1 - syscall_exit mov r1, lr b vSystemCallExit -/* *INDENT-ON* */ } #else /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ @@ -754,8 +708,7 @@ __asm void vPortSVCHandler( void ) { extern vSVCHandler_C -/* *INDENT-OFF* */ - PRESERVE8 + PRESERVE8 /* Assumes psp was in use. */ #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */ @@ -768,8 +721,8 @@ __asm void vPortSVCHandler( void ) #endif b vSVCHandler_C -/* *INDENT-ON* */ } +/* *INDENT-ON* */ #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ /*-----------------------------------------------------------*/ @@ -845,7 +798,6 @@ BaseType_t xPortStartScheduler( void ) #if ( configENABLE_ERRATA_837070_WORKAROUND == 1 ) configASSERT( ( portCPUID == portCORTEX_M7_r0p1_ID ) || ( portCPUID == portCORTEX_M7_r0p0_ID ) ); #else - /* When using this port on a Cortex-M7 r0p0 or r0p1 core, define * configENABLE_ERRATA_837070_WORKAROUND to 1 in your * FreeRTOSConfig.h. */ @@ -902,22 +854,22 @@ BaseType_t xPortStartScheduler( void ) if( ulImplementedPrioBits == 8 ) { /* When the hardware implements 8 priority bits, there is no way for - * the software to configure PRIGROUP to not have sub-priorities. As - * a result, the least significant bit is always used for sub-priority - * and there are 128 preemption priorities and 2 sub-priorities. - * - * This may cause some confusion in some cases - for example, if - * configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4 - * priority interrupts will be masked in Critical Sections as those - * are at the same preemption priority. This may appear confusing as - * 4 is higher (numerically lower) priority than - * configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not - * have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY - * to 4, this confusion does not happen and the behaviour remains the same. - * - * The following assert ensures that the sub-priority bit in the - * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned - * confusion. */ + * the software to configure PRIGROUP to not have sub-priorities. As + * a result, the least significant bit is always used for sub-priority + * and there are 128 preemption priorities and 2 sub-priorities. + * + * This may cause some confusion in some cases - for example, if + * configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4 + * priority interrupts will be masked in Critical Sections as those + * are at the same preemption priority. This may appear confusing as + * 4 is higher (numerically lower) priority than + * configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not + * have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY + * to 4, this confusion does not happen and the behaviour remains the same. + * + * The following assert ensures that the sub-priority bit in the + * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned + * confusion. */ configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & 0x1U ) == 0U ); ulMaxPRIGROUPValue = 0; } @@ -1024,7 +976,7 @@ void vPortEnterCritical( void ) portDISABLE_INTERRUPTS(); uxCriticalNesting++; } - #else /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ + #else /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ portDISABLE_INTERRUPTS(); uxCriticalNesting++; #endif /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ @@ -1062,7 +1014,7 @@ void vPortExitCritical( void ) portENABLE_INTERRUPTS(); } } - #else /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ + #else /* if ( configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS == 1 ) */ configASSERT( uxCriticalNesting ); uxCriticalNesting--; @@ -1228,8 +1180,6 @@ __asm void vPortEnableVFP( void ) orr r1, r1, #( 0xf << 20 ) /* Enable CP10 and CP11 coprocessors, then save back. */ str r1, [ r0 ] bx r14 - nop - nop /* *INDENT-ON* */ } /*-----------------------------------------------------------*/ @@ -1385,10 +1335,10 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); - xMPUSettings->xRegionSettings[ 0 ].ulRegionStartAddress = ( uint32_t ) __SRAM_segment_start__; - xMPUSettings->xRegionSettings[ 0 ].ulRegionEndAddress = ( uint32_t ) __SRAM_segment_end__; - xMPUSettings->xRegionSettings[ 0 ].ulRegionPermissions = ( tskMPU_READ_PERMISSION | - tskMPU_WRITE_PERMISSION ); + xMPUSettings->xRegionSettings[ 0 ].ulRegionStartAddress = ( uint32_t ) __SRAM_segment_start__; + xMPUSettings->xRegionSettings[ 0 ].ulRegionEndAddress = ( uint32_t ) __SRAM_segment_end__; + xMPUSettings->xRegionSettings[ 0 ].ulRegionPermissions = ( tskMPU_READ_PERMISSION | + tskMPU_WRITE_PERMISSION ); /* Invalidate user configurable regions. */ for( ul = 1UL; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) @@ -1450,11 +1400,13 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegionSettings[ ul ].ulRegionStartAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress; xMPUSettings->xRegionSettings[ ul ].ulRegionEndAddress = ( uint32_t ) ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1UL ); xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = 0UL; + if( ( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_READ_ONLY ) == portMPU_REGION_READ_ONLY ) || - ( ( xRegions[lIndex].ulParameters & portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) == portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) ) + ( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) == portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) ) { xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = tskMPU_READ_PERMISSION; } + if( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_READ_WRITE ) == portMPU_REGION_READ_WRITE ) { xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = ( tskMPU_READ_PERMISSION | tskMPU_WRITE_PERMISSION ); diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h index 6ec5f40c9..6a46c3085 100644 --- a/portable/RVDS/ARM_CM4_MPU/portmacro.h +++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h @@ -245,12 +245,10 @@ typedef struct MPU_SETTINGS /*-----------------------------------------------------------*/ /* SVC numbers for various services. */ -#define portSVC_START_SCHEDULER 0 -#define portSVC_YIELD 1 -#define portSVC_RAISE_PRIVILEGE 2 -#define portSVC_SYSTEM_CALL_ENTER 3 /* System calls with upto 4 parameters. */ -#define portSVC_SYSTEM_CALL_ENTER_1 4 /* System calls with 5 parameters. */ -#define portSVC_SYSTEM_CALL_EXIT 5 +#define portSVC_START_SCHEDULER 100 +#define portSVC_YIELD 101 +#define portSVC_RAISE_PRIVILEGE 102 +#define portSVC_SYSTEM_CALL_EXIT 103 /* Scheduler utilities. */ From 6b7d4cf41be3438177ae7104553f0c69d2f2d286 Mon Sep 17 00:00:00 2001 From: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Date: Thu, 23 Nov 2023 10:45:58 +0530 Subject: [PATCH 15/21] Add Access Control List to MPU ports (#897) This PR adds Access Control to kernel objects on a per task basis to MPU ports. The following needs to be defined in the `FreeRTOSConfig.h` to enable this feature: ```c ``` This PR adds the following new APIs: ```c void vGrantAccessToTask( TaskHandle_t xTask, TaskHandle_t xTaskToGrantAccess ); void vRevokeAccessToTask( TaskHandle_t xTask, TaskHandle_t xTaskToRevokeAccess ); void vGrantAccessToSemaphore( TaskHandle_t xTask, SemaphoreHandle_t xSemaphoreToGrantAccess ); void vRevokeAccessToSemaphore( TaskHandle_t xTask, SemaphoreHandle_t xSemaphoreToRevokeAccess ); void vGrantAccessToQueue( TaskHandle_t xTask, QueueHandle_t xQueueToGrantAccess ); void vRevokeAccessToQueue( TaskHandle_t xTask, QueueHandle_t xQueueToRevokeAccess ); void vGrantAccessToQueueSet( TaskHandle_t xTask, QueueSetHandle_t xQueueSetToGrantAccess ); void vRevokeAccessToQueueSet( TaskHandle_t xTask, QueueSetHandle_t xQueueSetToRevokeAccess ); void vGrantAccessToEventGroup( TaskHandle_t xTask, EventGroupHandle_t xEventGroupToGrantAccess ); void vRevokeAccessToEventGroup( TaskHandle_t xTask, EventGroupHandle_t xEventGroupToRevokeAccess ); void vGrantAccessToStreamBuffer( TaskHandle_t xTask, StreamBufferHandle_t xStreamBufferToGrantAccess ); void vRevokeAccessToStreamBuffer( TaskHandle_t xTask, StreamBufferHandle_t xStreamBufferToRevokeAccess ); void vGrantAccessToMessageBuffer( TaskHandle_t xTask, MessageBufferHandle_t xMessageBufferToGrantAccess ); void vRevokeAccessToMessageBuffer( TaskHandle_t xTask, MessageBufferHandle_t xMessageBufferToRevokeAccess ); void vGrantAccessToTimer( TaskHandle_t xTask, TimerHandle_t xTimerToGrantAccess ); void vRevokeAccessToTimer( TaskHandle_t xTask, TimerHandle_t xTimerToRevokeAccess ); ``` An unprivileged task by default has access to itself only and no other kernel object. The application writer needs to explicitly grant an unprivileged task access to all the kernel objects it needs. The best place to do that is before starting the scheduler when all the kernel objects are created. For example, let's say an unprivileged tasks needs access to a queue and an event group, the application writer needs to do the following: ```c vGrantAccessToQueue( xUnprivilegedTaskHandle, xQueue ); vGrantAccessToEventGroup( xUnprivilegedTaskHandle, xEventGroup ); ``` The application writer MUST revoke all the accesses before deleting a task. Failing to do so will result in undefined behavior. In the above example, the application writer needs to make the following 2 calls before deleting the task: ```c vRevokeAccessToQueue( xUnprivilegedTaskHandle, xQueue ); vRevokeAccessToEventGroup( xUnprivilegedTaskHandle, xEventGroup ); ``` --- include/FreeRTOS.h | 5 + include/mpu_wrappers.h | 29 + include/portable.h | 15 + include/task.h | 21 + portable/ARMv8M/non_secure/port.c | 110 +++ portable/ARMv8M/non_secure/portmacrocommon.h | 6 + portable/Common/mpu_wrappers.c | 4 + portable/Common/mpu_wrappers_v2.c | 891 +++++++++++++----- portable/GCC/ARM_CM23/non_secure/port.c | 110 +++ .../GCC/ARM_CM23/non_secure/portmacrocommon.h | 6 + portable/GCC/ARM_CM23_NTZ/non_secure/port.c | 110 +++ .../ARM_CM23_NTZ/non_secure/portmacrocommon.h | 6 + portable/GCC/ARM_CM33/non_secure/port.c | 110 +++ .../GCC/ARM_CM33/non_secure/portmacrocommon.h | 6 + portable/GCC/ARM_CM33_NTZ/non_secure/port.c | 110 +++ .../ARM_CM33_NTZ/non_secure/portmacrocommon.h | 6 + portable/GCC/ARM_CM35P/non_secure/port.c | 110 +++ .../ARM_CM35P/non_secure/portmacrocommon.h | 6 + portable/GCC/ARM_CM35P_NTZ/non_secure/port.c | 110 +++ .../non_secure/portmacrocommon.h | 6 + portable/GCC/ARM_CM3_MPU/port.c | 110 +++ portable/GCC/ARM_CM3_MPU/portmacro.h | 14 +- portable/GCC/ARM_CM4_MPU/port.c | 110 +++ portable/GCC/ARM_CM4_MPU/portmacro.h | 8 +- portable/GCC/ARM_CM55/non_secure/port.c | 110 +++ .../GCC/ARM_CM55/non_secure/portmacrocommon.h | 6 + portable/GCC/ARM_CM55_NTZ/non_secure/port.c | 110 +++ .../ARM_CM55_NTZ/non_secure/portmacrocommon.h | 6 + portable/GCC/ARM_CM85/non_secure/port.c | 110 +++ .../GCC/ARM_CM85/non_secure/portmacrocommon.h | 6 + portable/GCC/ARM_CM85_NTZ/non_secure/port.c | 110 +++ .../ARM_CM85_NTZ/non_secure/portmacrocommon.h | 6 + portable/IAR/ARM_CM23/non_secure/port.c | 110 +++ .../IAR/ARM_CM23/non_secure/portmacrocommon.h | 6 + portable/IAR/ARM_CM23_NTZ/non_secure/port.c | 110 +++ .../ARM_CM23_NTZ/non_secure/portmacrocommon.h | 6 + portable/IAR/ARM_CM33/non_secure/port.c | 110 +++ .../IAR/ARM_CM33/non_secure/portmacrocommon.h | 6 + portable/IAR/ARM_CM33_NTZ/non_secure/port.c | 110 +++ .../ARM_CM33_NTZ/non_secure/portmacrocommon.h | 6 + portable/IAR/ARM_CM35P/non_secure/port.c | 110 +++ .../ARM_CM35P/non_secure/portmacrocommon.h | 6 + portable/IAR/ARM_CM35P_NTZ/non_secure/port.c | 110 +++ .../non_secure/portmacrocommon.h | 6 + portable/IAR/ARM_CM4F_MPU/port.c | 110 +++ portable/IAR/ARM_CM4F_MPU/portmacro.h | 8 +- portable/IAR/ARM_CM55/non_secure/port.c | 110 +++ .../IAR/ARM_CM55/non_secure/portmacrocommon.h | 6 + portable/IAR/ARM_CM55_NTZ/non_secure/port.c | 110 +++ .../ARM_CM55_NTZ/non_secure/portmacrocommon.h | 6 + portable/IAR/ARM_CM85/non_secure/port.c | 110 +++ .../IAR/ARM_CM85/non_secure/portmacrocommon.h | 6 + portable/IAR/ARM_CM85_NTZ/non_secure/port.c | 110 +++ .../ARM_CM85_NTZ/non_secure/portmacrocommon.h | 6 + portable/RVDS/ARM_CM4_MPU/port.c | 113 ++- portable/RVDS/ARM_CM4_MPU/portmacro.h | 8 +- 56 files changed, 3645 insertions(+), 237 deletions(-) diff --git a/include/FreeRTOS.h b/include/FreeRTOS.h index 9228e071f..f09828255 100644 --- a/include/FreeRTOS.h +++ b/include/FreeRTOS.h @@ -86,6 +86,11 @@ #define configUSE_MPU_WRAPPERS_V1 0 #endif +/* Set configENABLE_ACCESS_CONTROL_LIST to 1 to enable access control list support. */ +#ifndef configENABLE_ACCESS_CONTROL_LIST + #define configENABLE_ACCESS_CONTROL_LIST 0 +#endif + /* Basic FreeRTOS definitions. */ #include "projdefs.h" diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h index db6356344..c7cdaa247 100644 --- a/include/mpu_wrappers.h +++ b/include/mpu_wrappers.h @@ -233,6 +233,35 @@ #define PRIVILEGED_DATA __attribute__( ( section( "privileged_data" ) ) ) #define FREERTOS_SYSTEM_CALL + + #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + #define vGrantAccessToTask( xTask, xTaskToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xTaskToGrantAccess ) ) + #define vRevokeAccessToTask( xTask, xTaskToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xTaskToRevokeAccess ) ) + + #define vGrantAccessToSemaphore( xTask, xSemaphoreToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xSemaphoreToGrantAccess ) ) + #define vRevokeAccessToSemaphore( xTask, xSemaphoreToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xSemaphoreToRevokeAccess ) ) + + #define vGrantAccessToQueue( xTask, xQueueToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueToGrantAccess ) ) + #define vRevokeAccessToQueue( xTask, xQueueToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueToRevokeAccess ) ) + + #define vGrantAccessToQueueSet( xTask, xQueueSetToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueSetToGrantAccess ) ) + #define vRevokeAccessToQueueSet( xTask, xQueueSetToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueSetToRevokeAccess ) ) + + #define vGrantAccessToEventGroup( xTask, xEventGroupToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xEventGroupToGrantAccess ) ) + #define vRevokeAccessToEventGroup( xTask, xEventGroupToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xEventGroupToRevokeAccess ) ) + + #define vGrantAccessToStreamBuffer( xTask, xStreamBufferToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xStreamBufferToGrantAccess ) ) + #define vRevokeAccessToStreamBuffer( xTask, xStreamBufferToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xStreamBufferToRevokeAccess ) ) + + #define vGrantAccessToMessageBuffer( xTask, xMessageBufferToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xMessageBufferToGrantAccess ) ) + #define vRevokeAccessToMessageBuffer( xTask, xMessageBufferToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xMessageBufferToRevokeAccess ) ) + + #define vGrantAccessToTimer( xTask, xTimerToGrantAccess ) vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xTimerToGrantAccess ) ) + #define vRevokeAccessToTimer( xTask, xTimerToRevokeAccess ) vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xTimerToRevokeAccess ) ) + + #endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ + #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ /* Ensure API functions go in the privileged execution section. */ diff --git a/include/portable.h b/include/portable.h index ebce9d6cf..8faeb738a 100644 --- a/include/portable.h +++ b/include/portable.h @@ -247,6 +247,21 @@ void vPortEndScheduler( void ) PRIVILEGED_FUNCTION; uint32_t ulAccessRequested ) PRIVILEGED_FUNCTION; #endif +/** + * @brief Checks if the calling task is authorized to access the given kernel object. + * + * @param lInternalIndexOfKernelObject The index of the kernel object in the kernel + * object handle pool. + * + * @return pdTRUE if the calling task is authorized to access the kernel object, + * pdFALSE otherwise. + */ +#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) PRIVILEGED_FUNCTION; + +#endif + /* *INDENT-OFF* */ #ifdef __cplusplus } diff --git a/include/task.h b/include/task.h index 9a198f2f4..fc600934d 100644 --- a/include/task.h +++ b/include/task.h @@ -3206,6 +3206,27 @@ void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNC #endif /* portUSING_MPU_WRAPPERS */ + +#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/* + * For internal use only. Grant/Revoke a task's access to a kernel object. + */ + void vGrantAccessToKernelObject( TaskHandle_t xExternalTaskHandle, + int32_t lExternalKernelObjectHandle ) PRIVILEGED_FUNCTION; + void vRevokeAccessToKernelObject( TaskHandle_t xExternalTaskHandle, + int32_t lExternalKernelObjectHandle ) PRIVILEGED_FUNCTION; + +/* + * For internal use only. Grant/Revoke a task's access to a kernel object. + */ + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) PRIVILEGED_FUNCTION; + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) PRIVILEGED_FUNCTION; + +#endif /* #if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ + /* *INDENT-OFF* */ #ifdef __cplusplus } diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portmacrocommon.h b/portable/ARMv8M/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/ARMv8M/non_secure/portmacrocommon.h +++ b/portable/ARMv8M/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index e6c8850ed..ac8251436 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -50,6 +50,10 @@ #if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 1 ) ) + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + #error Access control list is not available with this MPU wrapper. Please set configENABLE_ACCESS_CONTROL_LIST to 0. + #endif + #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) BaseType_t MPU_xTaskCreate( TaskFunction_t pvTaskCode, const char * const pcName, diff --git a/portable/Common/mpu_wrappers_v2.c b/portable/Common/mpu_wrappers_v2.c index bf3b8c9fc..90c977d6b 100644 --- a/portable/Common/mpu_wrappers_v2.c +++ b/portable/Common/mpu_wrappers_v2.c @@ -338,6 +338,76 @@ } /*-----------------------------------------------------------*/ + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + void vGrantAccessToKernelObject( TaskHandle_t xExternalTaskHandle, + int32_t lExternalKernelObjectHandle ) /* PRIVILEGED_FUNCTION */ + { + int32_t lExternalTaskIndex; + TaskHandle_t xInternalTaskHandle = NULL; + + if( IS_EXTERNAL_INDEX_VALID( lExternalKernelObjectHandle ) != pdFALSE ) + { + if( xExternalTaskHandle == NULL ) + { + vPortGrantAccessToKernelObject( xExternalTaskHandle, CONVERT_TO_INTERNAL_INDEX( lExternalKernelObjectHandle ) ); + } + else + { + lExternalTaskIndex = ( int32_t ) xExternalTaskHandle; + + if( IS_EXTERNAL_INDEX_VALID( lExternalTaskIndex ) != pdFALSE ) + { + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lExternalTaskIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + vPortGrantAccessToKernelObject( xInternalTaskHandle, + CONVERT_TO_INTERNAL_INDEX( lExternalKernelObjectHandle ) ); + } + } + } + } + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ +/*-----------------------------------------------------------*/ + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + void vRevokeAccessToKernelObject( TaskHandle_t xExternalTaskHandle, + int32_t lExternalKernelObjectHandle ) /* PRIVILEGED_FUNCTION */ + { + int32_t lExternalTaskIndex; + TaskHandle_t xInternalTaskHandle = NULL; + + if( IS_EXTERNAL_INDEX_VALID( lExternalKernelObjectHandle ) != pdFALSE ) + { + if( xExternalTaskHandle == NULL ) + { + vPortRevokeAccessToKernelObject( xExternalTaskHandle, CONVERT_TO_INTERNAL_INDEX( lExternalKernelObjectHandle ) ); + } + else + { + lExternalTaskIndex = ( int32_t ) xExternalTaskHandle; + + if( IS_EXTERNAL_INDEX_VALID( lExternalTaskIndex ) != pdFALSE ) + { + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lExternalTaskIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + vPortRevokeAccessToKernelObject( xInternalTaskHandle, + CONVERT_TO_INTERNAL_INDEX( lExternalKernelObjectHandle ) ); + } + } + } + } + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ +/*-----------------------------------------------------------*/ + #if ( configUSE_TIMERS == 1 ) static void MPU_TimerCallback( TimerHandle_t xInternalHandle ) /* PRIVILEGED_FUNCTION */ @@ -409,6 +479,7 @@ BaseType_t MPU_xTaskAbortDelayImpl( TaskHandle_t xTask ) /* PRIVILEGED_FUNCTION */ { BaseType_t xReturn = pdFAIL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; TaskHandle_t xInternalTaskHandle = NULL; int32_t lIndex; @@ -416,11 +487,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - xReturn = xTaskAbortDelay( xInternalTaskHandle ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + xReturn = xTaskAbortDelay( xInternalTaskHandle ); + } } } @@ -449,6 +525,7 @@ UBaseType_t MPU_uxTaskPriorityGetImpl( const TaskHandle_t pxTask ) /* PRIVILEGED_FUNCTION */ { UBaseType_t uxReturn = configMAX_PRIORITIES; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; @@ -462,11 +539,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - uxReturn = uxTaskPriorityGet( xInternalTaskHandle ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + uxReturn = uxTaskPriorityGet( xInternalTaskHandle ); + } } } } @@ -486,16 +568,22 @@ eTaskState eReturn = eInvalid; TaskHandle_t xInternalTaskHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; lIndex = ( int32_t ) pxTask; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - eReturn = eTaskGetState( xInternalTaskHandle ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + eReturn = eTaskGetState( xInternalTaskHandle ); + } } } @@ -520,6 +608,7 @@ int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; BaseType_t xIsTaskStatusWriteable = pdFALSE; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; xIsTaskStatusWriteable = xPortIsAuthorizedToAccessBuffer( pxTaskStatus, sizeof( TaskStatus_t ), @@ -537,11 +626,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - vTaskGetInfo( xInternalTaskHandle, pxTaskStatus, xGetFreeStackSpace, eState ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + vTaskGetInfo( xInternalTaskHandle, pxTaskStatus, xGetFreeStackSpace, eState ); + } } } } @@ -575,6 +669,7 @@ { int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; if( pxTaskToSuspend == NULL ) { @@ -594,11 +689,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - vTaskSuspend( xInternalTaskHandle ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + vTaskSuspend( xInternalTaskHandle ); + } } } } @@ -616,16 +716,22 @@ { int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; lIndex = ( int32_t ) pxTaskToResume; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - vTaskResume( xInternalTaskHandle ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + vTaskResume( xInternalTaskHandle ); + } } } } @@ -697,6 +803,7 @@ configRUN_TIME_COUNTER_TYPE xReturn = 0; int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; if( xTask == NULL ) { @@ -708,11 +815,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - xReturn = ulTaskGetRunTimeCounter( xInternalTaskHandle ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + xReturn = ulTaskGetRunTimeCounter( xInternalTaskHandle ); + } } } } @@ -732,6 +844,7 @@ configRUN_TIME_COUNTER_TYPE xReturn = 0; int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; if( xTask == NULL ) { @@ -743,11 +856,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - xReturn = ulTaskGetRunTimePercent( xInternalTaskHandle ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + xReturn = ulTaskGetRunTimePercent( xInternalTaskHandle ); + } } } } @@ -800,6 +918,7 @@ { TaskHandle_t xInternalTaskHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; if( xTask == NULL ) { @@ -811,11 +930,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - vTaskSetApplicationTaskTag( xInternalTaskHandle, pxTagValue ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + vTaskSetApplicationTaskTag( xInternalTaskHandle, pxTagValue ); + } } } } @@ -833,6 +957,7 @@ TaskHookFunction_t xReturn = NULL; int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; if( xTask == NULL ) { @@ -844,11 +969,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - xReturn = xTaskGetApplicationTaskTag( xInternalTaskHandle ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + xReturn = xTaskGetApplicationTaskTag( xInternalTaskHandle ); + } } } } @@ -871,6 +1001,7 @@ { int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; if( xTaskToSet == NULL ) { @@ -882,11 +1013,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - vTaskSetThreadLocalStoragePointer( xInternalTaskHandle, xIndex, pvValue ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + vTaskSetThreadLocalStoragePointer( xInternalTaskHandle, xIndex, pvValue ); + } } } } @@ -906,6 +1042,7 @@ void * pvReturn = NULL; int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; if( xTaskToQuery == NULL ) { @@ -917,11 +1054,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - pvReturn = pvTaskGetThreadLocalStoragePointer( xInternalTaskHandle, xIndex ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + pvReturn = pvTaskGetThreadLocalStoragePointer( xInternalTaskHandle, xIndex ); + } } } } @@ -983,6 +1125,7 @@ UBaseType_t uxReturn = 0; int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; if( xTask == NULL ) { @@ -994,11 +1137,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - uxReturn = uxTaskGetStackHighWaterMark( xInternalTaskHandle ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + uxReturn = uxTaskGetStackHighWaterMark( xInternalTaskHandle ); + } } } } @@ -1018,6 +1166,7 @@ configSTACK_DEPTH_TYPE uxReturn = 0; int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; if( xTask == NULL ) { @@ -1029,11 +1178,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - uxReturn = uxTaskGetStackHighWaterMark2( xInternalTaskHandle ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + uxReturn = uxTaskGetStackHighWaterMark2( xInternalTaskHandle ); + } } } } @@ -1167,6 +1321,7 @@ int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; BaseType_t xIsPreviousNotificationValueWriteable = pdFALSE; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; BaseType_t xAreParamsReadable = pdFALSE; if( pxParams != NULL ) @@ -1199,15 +1354,20 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - xReturn = xTaskGenericNotify( xInternalTaskHandle, - pxParams->uxIndexToNotify, - pxParams->ulValue, - pxParams->eAction, - pxParams->pulPreviousNotificationValue ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + xReturn = xTaskGenericNotify( xInternalTaskHandle, + pxParams->uxIndexToNotify, + pxParams->ulValue, + pxParams->eAction, + pxParams->pulPreviousNotificationValue ); + } } } } @@ -1320,6 +1480,7 @@ BaseType_t xReturn = pdFAIL; int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; if( uxIndexToClear < configTASK_NOTIFICATION_ARRAY_ENTRIES ) { @@ -1333,11 +1494,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - xReturn = xTaskGenericNotifyStateClear( xInternalTaskHandle, uxIndexToClear ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + xReturn = xTaskGenericNotifyStateClear( xInternalTaskHandle, uxIndexToClear ); + } } } } @@ -1362,6 +1528,7 @@ uint32_t ulReturn = 0; int32_t lIndex; TaskHandle_t xInternalTaskHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessTask = pdFALSE; if( uxIndexToClear < configTASK_NOTIFICATION_ARRAY_ENTRIES ) { @@ -1375,11 +1542,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTask = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTaskHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTask == pdTRUE ) { - ulReturn = ulTaskGenericNotifyValueClear( xInternalTaskHandle, uxIndexToClear, ulBitsToClear ); + xInternalTaskHandle = MPU_GetTaskHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTaskHandle != NULL ) + { + ulReturn = ulTaskGenericNotifyValueClear( xInternalTaskHandle, uxIndexToClear, ulBitsToClear ); + } } } } @@ -1463,6 +1635,17 @@ if( xInternalTaskHandle != NULL ) { MPU_StoreTaskHandleAtIndex( lIndex, xInternalTaskHandle ); + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + { + /* By default, an unprivileged task has access to itself. */ + if( ( uxPriority & portPRIVILEGE_BIT ) == 0 ) + { + vPortGrantAccessToKernelObject( xInternalTaskHandle, lIndex ); + } + } + #endif + xExternalTaskHandle = ( TaskHandle_t ) CONVERT_TO_EXTERNAL_INDEX( lIndex ); } else @@ -1628,6 +1811,16 @@ { MPU_StoreTaskHandleAtIndex( lIndex, xInternalTaskHandle ); + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + { + /* By default, an unprivileged task has access to itself. */ + if( ( pxTaskDefinition->uxPriority & portPRIVILEGE_BIT ) == 0 ) + { + vPortGrantAccessToKernelObject( xInternalTaskHandle, lIndex ); + } + } + #endif + if( pxCreatedTask != NULL ) { *pxCreatedTask = ( TaskHandle_t ) CONVERT_TO_EXTERNAL_INDEX( lIndex ); @@ -1664,6 +1857,16 @@ { MPU_StoreTaskHandleAtIndex( lIndex, xInternalTaskHandle ); + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + { + /* By default, an unprivileged task has access to itself. */ + if( ( pxTaskDefinition->uxPriority & portPRIVILEGE_BIT ) == 0 ) + { + vPortGrantAccessToKernelObject( xInternalTaskHandle, lIndex ); + } + } + #endif + if( pxCreatedTask != NULL ) { *pxCreatedTask = ( TaskHandle_t ) CONVERT_TO_EXTERNAL_INDEX( lIndex ); @@ -1909,36 +2112,42 @@ QueueHandle_t xInternalQueueHandle = NULL; BaseType_t xReturn = pdFAIL; BaseType_t xIsItemToQueueReadable = pdFALSE; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; UBaseType_t uxQueueItemSize, uxQueueLength; lIndex = ( int32_t ) xQueue; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); - uxQueueLength = uxQueueGetQueueLength( xInternalQueueHandle ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( ( !( ( pvItemToQueue == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) && - ( !( ( xCopyPosition == queueOVERWRITE ) && ( uxQueueLength != ( UBaseType_t ) 1U ) ) ) - #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) - #endif - ) + if( xInternalQueueHandle != NULL ) { - if( pvItemToQueue != NULL ) - { - xIsItemToQueueReadable = xPortIsAuthorizedToAccessBuffer( pvItemToQueue, - uxQueueGetQueueItemSize( xInternalQueueHandle ), - tskMPU_READ_PERMISSION ); - } + uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); + uxQueueLength = uxQueueGetQueueLength( xInternalQueueHandle ); - if( ( pvItemToQueue == NULL ) || ( xIsItemToQueueReadable == pdTRUE ) ) + if( ( !( ( pvItemToQueue == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) && + ( !( ( xCopyPosition == queueOVERWRITE ) && ( uxQueueLength != ( UBaseType_t ) 1U ) ) ) + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + #endif + ) { - xReturn = xQueueGenericSend( xInternalQueueHandle, pvItemToQueue, xTicksToWait, xCopyPosition ); + if( pvItemToQueue != NULL ) + { + xIsItemToQueueReadable = xPortIsAuthorizedToAccessBuffer( pvItemToQueue, + uxQueueGetQueueItemSize( xInternalQueueHandle ), + tskMPU_READ_PERMISSION ); + } + + if( ( pvItemToQueue == NULL ) || ( xIsItemToQueueReadable == pdTRUE ) ) + { + xReturn = xQueueGenericSend( xInternalQueueHandle, pvItemToQueue, xTicksToWait, xCopyPosition ); + } } } } @@ -1955,16 +2164,22 @@ int32_t lIndex; QueueHandle_t xInternalQueueHandle = NULL; UBaseType_t uxReturn = 0; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; lIndex = ( int32_t ) pxQueue; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - uxReturn = uxQueueMessagesWaiting( xInternalQueueHandle ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalQueueHandle != NULL ) + { + uxReturn = uxQueueMessagesWaiting( xInternalQueueHandle ); + } } } @@ -1979,16 +2194,22 @@ int32_t lIndex; QueueHandle_t xInternalQueueHandle = NULL; UBaseType_t uxReturn = 0; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; lIndex = ( int32_t ) xQueue; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - uxReturn = uxQueueSpacesAvailable( xInternalQueueHandle ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalQueueHandle != NULL ) + { + uxReturn = uxQueueSpacesAvailable( xInternalQueueHandle ); + } } } @@ -2008,31 +2229,37 @@ QueueHandle_t xInternalQueueHandle = NULL; BaseType_t xReturn = pdFAIL; BaseType_t xIsReceiveBufferWritable = pdFALSE; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; UBaseType_t uxQueueItemSize; lIndex = ( int32_t ) pxQueue; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( ( !( ( ( pvBuffer ) == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) - #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) - #endif - ) + if( xInternalQueueHandle != NULL ) { - xIsReceiveBufferWritable = xPortIsAuthorizedToAccessBuffer( pvBuffer, - uxQueueGetQueueItemSize( xInternalQueueHandle ), - tskMPU_WRITE_PERMISSION ); + uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); - if( xIsReceiveBufferWritable == pdTRUE ) + if( ( !( ( ( pvBuffer ) == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + #endif + ) { - xReturn = xQueueReceive( xInternalQueueHandle, pvBuffer, xTicksToWait ); + xIsReceiveBufferWritable = xPortIsAuthorizedToAccessBuffer( pvBuffer, + uxQueueGetQueueItemSize( xInternalQueueHandle ), + tskMPU_WRITE_PERMISSION ); + + if( xIsReceiveBufferWritable == pdTRUE ) + { + xReturn = xQueueReceive( xInternalQueueHandle, pvBuffer, xTicksToWait ); + } } } } @@ -2055,30 +2282,36 @@ BaseType_t xReturn = pdFAIL; BaseType_t xIsReceiveBufferWritable = pdFALSE; UBaseType_t uxQueueItemSize; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; lIndex = ( int32_t ) xQueue; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( ( !( ( ( pvBuffer ) == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) - #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) - #endif - ) + if( xInternalQueueHandle != NULL ) { - xIsReceiveBufferWritable = xPortIsAuthorizedToAccessBuffer( pvBuffer, - uxQueueGetQueueItemSize( xInternalQueueHandle ), - tskMPU_WRITE_PERMISSION ); + uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); - if( xIsReceiveBufferWritable == pdTRUE ) + if( ( !( ( ( pvBuffer ) == NULL ) && ( uxQueueItemSize != ( UBaseType_t ) 0U ) ) ) + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + #endif + ) { - xReturn = xQueuePeek( xInternalQueueHandle, pvBuffer, xTicksToWait ); + xIsReceiveBufferWritable = xPortIsAuthorizedToAccessBuffer( pvBuffer, + uxQueueGetQueueItemSize( xInternalQueueHandle ), + tskMPU_WRITE_PERMISSION ); + + if( xIsReceiveBufferWritable == pdTRUE ) + { + xReturn = xQueuePeek( xInternalQueueHandle, pvBuffer, xTicksToWait ); + } } } } @@ -2098,24 +2331,30 @@ QueueHandle_t xInternalQueueHandle = NULL; BaseType_t xReturn = pdFAIL; UBaseType_t uxQueueItemSize; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; lIndex = ( int32_t ) xQueue; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( ( uxQueueItemSize == 0 ) - #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) - #endif - ) + if( xInternalQueueHandle != NULL ) { - xReturn = xQueueSemaphoreTake( xInternalQueueHandle, xTicksToWait ); + uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); + + if( ( uxQueueItemSize == 0 ) + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + && ( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ) + #endif + ) + { + xReturn = xQueueSemaphoreTake( xInternalQueueHandle, xTicksToWait ); + } } } } @@ -2134,25 +2373,31 @@ TaskHandle_t xMutexHolderTaskExternalHandle = NULL; int32_t lIndex, lMutexHolderTaskIndex; QueueHandle_t xInternalQueueHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; lIndex = ( int32_t ) xSemaphore; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - xMutexHolderTaskInternalHandle = xQueueGetMutexHolder( xInternalQueueHandle ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xMutexHolderTaskInternalHandle != NULL ) + if( xInternalQueueHandle != NULL ) { - lMutexHolderTaskIndex = MPU_GetIndexForTaskHandle( xMutexHolderTaskInternalHandle ); + xMutexHolderTaskInternalHandle = xQueueGetMutexHolder( xInternalQueueHandle ); - if( lMutexHolderTaskIndex != -1 ) + if( xMutexHolderTaskInternalHandle != NULL ) { - xMutexHolderTaskExternalHandle = ( TaskHandle_t ) ( CONVERT_TO_EXTERNAL_INDEX( lMutexHolderTaskIndex ) ); + lMutexHolderTaskIndex = MPU_GetIndexForTaskHandle( xMutexHolderTaskInternalHandle ); + + if( lMutexHolderTaskIndex != -1 ) + { + xMutexHolderTaskExternalHandle = ( TaskHandle_t ) ( CONVERT_TO_EXTERNAL_INDEX( lMutexHolderTaskIndex ) ); + } } } } @@ -2173,6 +2418,7 @@ TickType_t xBlockTime ) /* PRIVILEGED_FUNCTION */ { BaseType_t xReturn = pdFAIL; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; int32_t lIndex; QueueHandle_t xInternalQueueHandle = NULL; UBaseType_t uxQueueItemSize; @@ -2181,15 +2427,20 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( uxQueueItemSize == 0 ) + if( xInternalQueueHandle != NULL ) { - xReturn = xQueueTakeMutexRecursive( xInternalQueueHandle, xBlockTime ); + uxQueueItemSize = uxQueueGetQueueItemSize( xInternalQueueHandle ); + + if( uxQueueItemSize == 0 ) + { + xReturn = xQueueTakeMutexRecursive( xInternalQueueHandle, xBlockTime ); + } } } } @@ -2207,6 +2458,7 @@ BaseType_t MPU_xQueueGiveMutexRecursiveImpl( QueueHandle_t xMutex ) /* PRIVILEGED_FUNCTION */ { BaseType_t xReturn = pdFAIL; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; int32_t lIndex; QueueHandle_t xInternalQueueHandle = NULL; @@ -2214,11 +2466,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - xReturn = xQueueGiveMutexRecursive( xInternalQueueHandle ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalQueueHandle != NULL ) + { + xReturn = xQueueGiveMutexRecursive( xInternalQueueHandle ); + } } } @@ -2240,24 +2497,30 @@ QueueSetMemberHandle_t xSelectedMemberInternal = NULL; QueueSetMemberHandle_t xSelectedMemberExternal = NULL; int32_t lIndexQueueSet, lIndexSelectedMember; + BaseType_t xCallingTaskIsAuthorizedToAccessQueueSet = pdFALSE; lIndexQueueSet = ( int32_t ) xQueueSet; if( IS_EXTERNAL_INDEX_VALID( lIndexQueueSet ) != pdFALSE ) { - xInternalQueueSetHandle = MPU_GetQueueSetHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndexQueueSet ) ); + xCallingTaskIsAuthorizedToAccessQueueSet = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndexQueueSet ) ); - if( xInternalQueueSetHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueueSet == pdTRUE ) { - xSelectedMemberInternal = xQueueSelectFromSet( xInternalQueueSetHandle, xBlockTimeTicks ); + xInternalQueueSetHandle = MPU_GetQueueSetHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndexQueueSet ) ); - if( xSelectedMemberInternal != NULL ) + if( xInternalQueueSetHandle != NULL ) { - lIndexSelectedMember = MPU_GetIndexForQueueSetMemberHandle( xSelectedMemberInternal ); + xSelectedMemberInternal = xQueueSelectFromSet( xInternalQueueSetHandle, xBlockTimeTicks ); - if( lIndexSelectedMember != -1 ) + if( xSelectedMemberInternal != NULL ) { - xSelectedMemberExternal = ( QueueSetMemberHandle_t ) ( CONVERT_TO_EXTERNAL_INDEX( lIndexSelectedMember ) ); + lIndexSelectedMember = MPU_GetIndexForQueueSetMemberHandle( xSelectedMemberInternal ); + + if( lIndexSelectedMember != -1 ) + { + xSelectedMemberExternal = ( QueueSetMemberHandle_t ) ( CONVERT_TO_EXTERNAL_INDEX( lIndexSelectedMember ) ); + } } } } @@ -2281,6 +2544,8 @@ QueueSetMemberHandle_t xInternalQueueSetMemberHandle = NULL; QueueSetHandle_t xInternalQueueSetHandle = NULL; int32_t lIndexQueueSet, lIndexQueueSetMember; + BaseType_t xCallingTaskIsAuthorizedToAccessQueueSet = pdFALSE; + BaseType_t xCallingTaskIsAuthorizedToAccessQueueSetMember = pdFALSE; lIndexQueueSet = ( int32_t ) xQueueSet; lIndexQueueSetMember = ( int32_t ) xQueueOrSemaphore; @@ -2288,12 +2553,18 @@ if( ( IS_EXTERNAL_INDEX_VALID( lIndexQueueSet ) != pdFALSE ) && ( IS_EXTERNAL_INDEX_VALID( lIndexQueueSetMember ) != pdFALSE ) ) { - xInternalQueueSetHandle = MPU_GetQueueSetHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndexQueueSet ) ); - xInternalQueueSetMemberHandle = MPU_GetQueueSetMemberHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndexQueueSetMember ) ); + xCallingTaskIsAuthorizedToAccessQueueSet = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndexQueueSet ) ); + xCallingTaskIsAuthorizedToAccessQueueSetMember = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndexQueueSetMember ) ); - if( ( xInternalQueueSetHandle != NULL ) && ( xInternalQueueSetMemberHandle != NULL ) ) + if( ( xCallingTaskIsAuthorizedToAccessQueueSet == pdTRUE ) && ( xCallingTaskIsAuthorizedToAccessQueueSetMember == pdTRUE ) ) { - xReturn = xQueueAddToSet( xInternalQueueSetMemberHandle, xInternalQueueSetHandle ); + xInternalQueueSetHandle = MPU_GetQueueSetHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndexQueueSet ) ); + xInternalQueueSetMemberHandle = MPU_GetQueueSetMemberHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndexQueueSetMember ) ); + + if( ( xInternalQueueSetHandle != NULL ) && ( xInternalQueueSetMemberHandle != NULL ) ) + { + xReturn = xQueueAddToSet( xInternalQueueSetMemberHandle, xInternalQueueSetHandle ); + } } } @@ -2313,16 +2584,22 @@ { int32_t lIndex; QueueHandle_t xInternalQueueHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; lIndex = ( int32_t ) xQueue; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - vQueueAddToRegistry( xInternalQueueHandle, pcName ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalQueueHandle != NULL ) + { + vQueueAddToRegistry( xInternalQueueHandle, pcName ); + } } } } @@ -2338,16 +2615,22 @@ { int32_t lIndex; QueueHandle_t xInternalQueueHandle = NULL; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; lIndex = ( int32_t ) xQueue; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - vQueueUnregisterQueue( xInternalQueueHandle ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalQueueHandle != NULL ) + { + vQueueUnregisterQueue( xInternalQueueHandle ); + } } } } @@ -2364,16 +2647,22 @@ const char * pcReturn = NULL; QueueHandle_t xInternalQueueHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessQueue = pdFALSE; lIndex = ( int32_t ) xQueue; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessQueue = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalQueueHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessQueue == pdTRUE ) { - pcReturn = pcQueueGetName( xInternalQueueHandle ); + xInternalQueueHandle = MPU_GetQueueHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalQueueHandle != NULL ) + { + pcReturn = pcQueueGetName( xInternalQueueHandle ); + } } } @@ -2971,16 +3260,22 @@ void * pvReturn = NULL; TimerHandle_t xInternalTimerHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessTimer = pdFALSE; lIndex = ( int32_t ) xTimer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTimer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTimerHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTimer == pdTRUE ) { - pvReturn = pvTimerGetTimerID( xInternalTimerHandle ); + xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTimerHandle != NULL ) + { + pvReturn = pvTimerGetTimerID( xInternalTimerHandle ); + } } } @@ -3000,16 +3295,22 @@ { TimerHandle_t xInternalTimerHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessTimer = pdFALSE; lIndex = ( int32_t ) xTimer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTimer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTimerHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTimer == pdTRUE ) { - vTimerSetTimerID( xInternalTimerHandle, pvNewID ); + xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTimerHandle != NULL ) + { + vTimerSetTimerID( xInternalTimerHandle, pvNewID ); + } } } } @@ -3026,16 +3327,22 @@ BaseType_t xReturn = pdFALSE; TimerHandle_t xInternalTimerHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessTimer = pdFALSE; lIndex = ( int32_t ) xTimer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTimer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTimerHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTimer == pdTRUE ) { - xReturn = xTimerIsTimerActive( xInternalTimerHandle ); + xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTimerHandle != NULL ) + { + xReturn = xTimerIsTimerActive( xInternalTimerHandle ); + } } } @@ -3091,6 +3398,7 @@ TimerHandle_t xInternalTimerHandle = NULL; int32_t lIndex; BaseType_t xIsHigherPriorityTaskWokenWriteable = pdFALSE; + BaseType_t xCallingTaskIsAuthorizedToAccessTimer = pdFALSE; BaseType_t xAreParamsReadable = pdFALSE; if( pxParams != NULL ) @@ -3116,15 +3424,20 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTimer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTimerHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTimer == pdTRUE ) { - xReturn = xTimerGenericCommand( xInternalTimerHandle, - pxParams->xCommandID, - pxParams->xOptionalValue, - pxParams->pxHigherPriorityTaskWoken, - pxParams->xTicksToWait ); + xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTimerHandle != NULL ) + { + xReturn = xTimerGenericCommand( xInternalTimerHandle, + pxParams->xCommandID, + pxParams->xOptionalValue, + pxParams->pxHigherPriorityTaskWoken, + pxParams->xTicksToWait ); + } } } } @@ -3175,16 +3488,22 @@ const char * pcReturn = NULL; TimerHandle_t xInternalTimerHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessTimer = pdFALSE; lIndex = ( int32_t ) xTimer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTimer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTimerHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTimer == pdTRUE ) { - pcReturn = pcTimerGetName( xInternalTimerHandle ); + xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTimerHandle != NULL ) + { + pcReturn = pcTimerGetName( xInternalTimerHandle ); + } } } @@ -3204,16 +3523,22 @@ { TimerHandle_t xInternalTimerHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessTimer = pdFALSE; lIndex = ( int32_t ) xTimer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTimer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTimerHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTimer == pdTRUE ) { - vTimerSetReloadMode( xInternalTimerHandle, uxAutoReload ); + xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTimerHandle != NULL ) + { + vTimerSetReloadMode( xInternalTimerHandle, uxAutoReload ); + } } } } @@ -3230,16 +3555,22 @@ BaseType_t xReturn = pdFALSE; TimerHandle_t xInternalTimerHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessTimer = pdFALSE; lIndex = ( int32_t ) xTimer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTimer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTimerHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTimer == pdTRUE ) { - xReturn = xTimerGetReloadMode( xInternalTimerHandle ); + xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTimerHandle != NULL ) + { + xReturn = xTimerGetReloadMode( xInternalTimerHandle ); + } } } @@ -3258,16 +3589,22 @@ UBaseType_t uxReturn = 0; TimerHandle_t xInternalTimerHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessTimer = pdFALSE; lIndex = ( int32_t ) xTimer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTimer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTimerHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTimer == pdTRUE ) { - uxReturn = uxTimerGetReloadMode( xInternalTimerHandle ); + xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTimerHandle != NULL ) + { + uxReturn = uxTimerGetReloadMode( xInternalTimerHandle ); + } } } @@ -3286,16 +3623,22 @@ TickType_t xReturn = 0; TimerHandle_t xInternalTimerHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessTimer = pdFALSE; lIndex = ( int32_t ) xTimer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTimer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTimerHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTimer == pdTRUE ) { - xReturn = xTimerGetPeriod( xInternalTimerHandle ); + xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTimerHandle != NULL ) + { + xReturn = xTimerGetPeriod( xInternalTimerHandle ); + } } } @@ -3314,16 +3657,22 @@ TickType_t xReturn = 0; TimerHandle_t xInternalTimerHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessTimer = pdFALSE; lIndex = ( int32_t ) xTimer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessTimer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalTimerHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessTimer == pdTRUE ) { - xReturn = xTimerGetExpiryTime( xInternalTimerHandle ); + xInternalTimerHandle = MPU_GetTimerHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalTimerHandle != NULL ) + { + xReturn = xTimerGetExpiryTime( xInternalTimerHandle ); + } } } @@ -3467,6 +3816,7 @@ EventBits_t xReturn = 0; EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessEventGroup = pdFALSE; BaseType_t xAreParamsReadable = pdFALSE; if( pxParams != NULL ) @@ -3489,15 +3839,20 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessEventGroup = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalEventGroupHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessEventGroup == pdTRUE ) { - xReturn = xEventGroupWaitBits( xInternalEventGroupHandle, - pxParams->uxBitsToWaitFor, - pxParams->xClearOnExit, - pxParams->xWaitForAllBits, - pxParams->xTicksToWait ); + xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalEventGroupHandle != NULL ) + { + xReturn = xEventGroupWaitBits( xInternalEventGroupHandle, + pxParams->uxBitsToWaitFor, + pxParams->xClearOnExit, + pxParams->xWaitForAllBits, + pxParams->xTicksToWait ); + } } } } @@ -3516,6 +3871,7 @@ EventBits_t xReturn = 0; EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessEventGroup = pdFALSE; if( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) { @@ -3523,11 +3879,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessEventGroup = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalEventGroupHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessEventGroup == pdTRUE ) { - xReturn = xEventGroupClearBits( xInternalEventGroupHandle, uxBitsToClear ); + xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalEventGroupHandle != NULL ) + { + xReturn = xEventGroupClearBits( xInternalEventGroupHandle, uxBitsToClear ); + } } } } @@ -3545,6 +3906,7 @@ EventBits_t xReturn = 0; EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessEventGroup = pdFALSE; if( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) { @@ -3552,11 +3914,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessEventGroup = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalEventGroupHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessEventGroup == pdTRUE ) { - xReturn = xEventGroupSetBits( xInternalEventGroupHandle, uxBitsToSet ); + xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalEventGroupHandle != NULL ) + { + xReturn = xEventGroupSetBits( xInternalEventGroupHandle, uxBitsToSet ); + } } } } @@ -3578,6 +3945,7 @@ EventBits_t xReturn = 0; EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessEventGroup = pdFALSE; if( ( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ) && ( uxBitsToWaitFor != 0 ) @@ -3590,11 +3958,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessEventGroup = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalEventGroupHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessEventGroup == pdTRUE ) { - xReturn = xEventGroupSync( xInternalEventGroupHandle, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); + xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalEventGroupHandle != NULL ) + { + xReturn = xEventGroupSync( xInternalEventGroupHandle, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); + } } } } @@ -3612,16 +3985,22 @@ UBaseType_t xReturn = 0; EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessEventGroup = pdFALSE; lIndex = ( int32_t ) xEventGroup; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessEventGroup = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalEventGroupHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessEventGroup == pdTRUE ) { - xReturn = uxEventGroupGetNumber( xInternalEventGroupHandle ); + xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalEventGroupHandle != NULL ) + { + xReturn = uxEventGroupGetNumber( xInternalEventGroupHandle ); + } } } @@ -3641,16 +4020,22 @@ { EventGroupHandle_t xInternalEventGroupHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessEventGroup = pdFALSE; lIndex = ( int32_t ) xEventGroup; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessEventGroup = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalEventGroupHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessEventGroup == pdTRUE ) { - vEventGroupSetNumber( xInternalEventGroupHandle, uxEventGroupNumber ); + xInternalEventGroupHandle = MPU_GetEventGroupHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalEventGroupHandle != NULL ) + { + vEventGroupSetNumber( xInternalEventGroupHandle, uxEventGroupNumber ); + } } } } @@ -3867,6 +4252,7 @@ StreamBufferHandle_t xInternalStreamBufferHandle = NULL; int32_t lIndex; BaseType_t xIsTxDataBufferReadable = pdFALSE; + BaseType_t xCallingTaskIsAuthorizedToAccessStreamBuffer = pdFALSE; if( pvTxData != NULL ) { @@ -3880,11 +4266,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessStreamBuffer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalStreamBufferHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessStreamBuffer == pdTRUE ) { - xReturn = xStreamBufferSend( xInternalStreamBufferHandle, pvTxData, xDataLengthBytes, xTicksToWait ); + xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalStreamBufferHandle != NULL ) + { + xReturn = xStreamBufferSend( xInternalStreamBufferHandle, pvTxData, xDataLengthBytes, xTicksToWait ); + } } } } @@ -3908,6 +4299,7 @@ StreamBufferHandle_t xInternalStreamBufferHandle = NULL; int32_t lIndex; BaseType_t xIsRxDataBufferWriteable = pdFALSE; + BaseType_t xCallingTaskIsAuthorizedToAccessStreamBuffer = pdFALSE; if( pvRxData != NULL ) { @@ -3921,11 +4313,16 @@ if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessStreamBuffer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalStreamBufferHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessStreamBuffer == pdTRUE ) { - xReturn = xStreamBufferReceive( xInternalStreamBufferHandle, pvRxData, xBufferLengthBytes, xTicksToWait ); + xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalStreamBufferHandle != NULL ) + { + xReturn = xStreamBufferReceive( xInternalStreamBufferHandle, pvRxData, xBufferLengthBytes, xTicksToWait ); + } } } } @@ -3942,16 +4339,22 @@ BaseType_t xReturn = pdFALSE; StreamBufferHandle_t xInternalStreamBufferHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessStreamBuffer = pdFALSE; lIndex = ( int32_t ) xStreamBuffer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessStreamBuffer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalStreamBufferHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessStreamBuffer == pdTRUE ) { - xReturn = xStreamBufferIsFull( xInternalStreamBufferHandle ); + xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalStreamBufferHandle != NULL ) + { + xReturn = xStreamBufferIsFull( xInternalStreamBufferHandle ); + } } } @@ -3966,16 +4369,22 @@ BaseType_t xReturn = pdFALSE; StreamBufferHandle_t xInternalStreamBufferHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessStreamBuffer = pdFALSE; lIndex = ( int32_t ) xStreamBuffer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessStreamBuffer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalStreamBufferHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessStreamBuffer == pdTRUE ) { - xReturn = xStreamBufferIsEmpty( xInternalStreamBufferHandle ); + xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalStreamBufferHandle != NULL ) + { + xReturn = xStreamBufferIsEmpty( xInternalStreamBufferHandle ); + } } } @@ -3990,16 +4399,22 @@ size_t xReturn = 0; StreamBufferHandle_t xInternalStreamBufferHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessStreamBuffer = pdFALSE; lIndex = ( int32_t ) xStreamBuffer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessStreamBuffer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalStreamBufferHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessStreamBuffer == pdTRUE ) { - xReturn = xStreamBufferSpacesAvailable( xInternalStreamBufferHandle ); + xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalStreamBufferHandle != NULL ) + { + xReturn = xStreamBufferSpacesAvailable( xInternalStreamBufferHandle ); + } } } @@ -4014,16 +4429,22 @@ size_t xReturn = 0; StreamBufferHandle_t xInternalStreamBufferHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessStreamBuffer = pdFALSE; lIndex = ( int32_t ) xStreamBuffer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessStreamBuffer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalStreamBufferHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessStreamBuffer == pdTRUE ) { - xReturn = xStreamBufferBytesAvailable( xInternalStreamBufferHandle ); + xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalStreamBufferHandle != NULL ) + { + xReturn = xStreamBufferBytesAvailable( xInternalStreamBufferHandle ); + } } } @@ -4040,16 +4461,22 @@ BaseType_t xReturn = pdFALSE; StreamBufferHandle_t xInternalStreamBufferHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessStreamBuffer = pdFALSE; lIndex = ( int32_t ) xStreamBuffer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessStreamBuffer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalStreamBufferHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessStreamBuffer == pdTRUE ) { - xReturn = xStreamBufferSetTriggerLevel( xInternalStreamBufferHandle, xTriggerLevel ); + xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalStreamBufferHandle != NULL ) + { + xReturn = xStreamBufferSetTriggerLevel( xInternalStreamBufferHandle, xTriggerLevel ); + } } } @@ -4064,16 +4491,22 @@ size_t xReturn = 0; StreamBufferHandle_t xInternalStreamBufferHandle = NULL; int32_t lIndex; + BaseType_t xCallingTaskIsAuthorizedToAccessStreamBuffer = pdFALSE; lIndex = ( int32_t ) xStreamBuffer; if( IS_EXTERNAL_INDEX_VALID( lIndex ) != pdFALSE ) { - xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + xCallingTaskIsAuthorizedToAccessStreamBuffer = xPortIsAuthorizedToAccessKernelObject( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); - if( xInternalStreamBufferHandle != NULL ) + if( xCallingTaskIsAuthorizedToAccessStreamBuffer == pdTRUE ) { - xReturn = xStreamBufferNextMessageLengthBytes( xInternalStreamBufferHandle ); + xInternalStreamBufferHandle = MPU_GetStreamBufferHandleAtIndex( CONVERT_TO_INTERNAL_INDEX( lIndex ) ); + + if( xInternalStreamBufferHandle != NULL ) + { + xReturn = xStreamBufferNextMessageLengthBytes( xInternalStreamBufferHandle ); + } } } diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/GCC/ARM_CM35P/non_secure/port.c b/portable/GCC/ARM_CM35P/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/GCC/ARM_CM35P/non_secure/port.c +++ b/portable/GCC/ARM_CM35P/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index fd00078c4..7131be066 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -252,6 +252,15 @@ BaseType_t xPortIsTaskPrivileged( void ) PRIVILEGED_FUNCTION; * switches can only occur when uxCriticalNesting is zero. */ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/* + * This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /* * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure * FreeRTOS API functions are not called from interrupts that have been assigned @@ -824,6 +833,12 @@ BaseType_t xPortStartScheduler( void ) /* Initialise the critical nesting count ready for the first task. */ uxCriticalNesting = 0; + #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ __asm volatile ( @@ -1367,3 +1382,98 @@ BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer, #endif /* configASSERT_DEFINED */ /*-----------------------------------------------------------*/ + +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h index cfc72b17e..e20c19ecd 100644 --- a/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -127,7 +127,10 @@ #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ - #define MAX_CONTEXT_SIZE 20 +#define MAX_CONTEXT_SIZE ( 20 ) + +/* Size of an Access Control List (ACL) entry in bits. */ +#define portACL_ENTRY_SIZE_BITS ( 32U ) /* Flags used for xMPU_SETTINGS.ulTaskFlags member. */ #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) @@ -140,10 +143,13 @@ uint32_t ulContext[ MAX_CONTEXT_SIZE ]; uint32_t ulTaskFlags; - #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) - xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; #endif - } xMPU_SETTINGS; + #endif +} xMPU_SETTINGS; /* Architecture specifics. */ #define portSTACK_GROWTH ( -1 ) diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index 2a94f04c5..bc058276d 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -277,6 +277,15 @@ BaseType_t xPortIsTaskPrivileged( void ) PRIVILEGED_FUNCTION; * switches can only occur when uxCriticalNesting is zero. */ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/* + * This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /* * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure * FreeRTOS API functions are not called from interrupts that have been assigned @@ -911,6 +920,12 @@ BaseType_t xPortStartScheduler( void ) /* Initialise the critical nesting count ready for the first task. */ uxCriticalNesting = 0; + #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); @@ -1538,3 +1553,98 @@ BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer, #endif /* configASSERT_DEFINED */ /*-----------------------------------------------------------*/ + +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h index c239ff5df..ef7bffebe 100644 --- a/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -216,7 +216,10 @@ typedef struct MPU_REGION_SETTINGS #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ -#define MAX_CONTEXT_SIZE 52 +#define MAX_CONTEXT_SIZE ( 52 ) + +/* Size of an Access Control List (ACL) entry in bits. */ +#define portACL_ENTRY_SIZE_BITS ( 32U ) /* Flags used for xMPU_SETTINGS.ulTaskFlags member. */ #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) @@ -231,6 +234,9 @@ typedef struct MPU_SETTINGS #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/GCC/ARM_CM55/non_secure/port.c b/portable/GCC/ARM_CM55/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/GCC/ARM_CM55/non_secure/port.c +++ b/portable/GCC/ARM_CM55/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/GCC/ARM_CM85/non_secure/port.c b/portable/GCC/ARM_CM85/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/GCC/ARM_CM85/non_secure/port.c +++ b/portable/GCC/ARM_CM85/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/IAR/ARM_CM35P/non_secure/port.c b/portable/IAR/ARM_CM35P/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/IAR/ARM_CM35P/non_secure/port.c +++ b/portable/IAR/ARM_CM35P/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index df3b35b53..990cf220b 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -283,6 +283,15 @@ BaseType_t xPortIsTaskPrivileged( void ) PRIVILEGED_FUNCTION; * variable. */ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/* + * This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /* * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure * FreeRTOS API functions are not called from interrupts that have been assigned @@ -787,6 +796,12 @@ BaseType_t xPortStartScheduler( void ) /* Initialise the critical nesting count ready for the first task. */ uxCriticalNesting = 0; + #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); @@ -1262,3 +1277,98 @@ BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer, #endif /* configASSERT_DEFINED */ /*-----------------------------------------------------------*/ + +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h index 48a08b598..cdb74085f 100644 --- a/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -218,7 +218,10 @@ typedef struct MPU_REGION_SETTINGS #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ -#define MAX_CONTEXT_SIZE 52 +#define MAX_CONTEXT_SIZE ( 52 ) + +/* Size of an Access Control List (ACL) entry in bits. */ +#define portACL_ENTRY_SIZE_BITS ( 32U ) /* Flags used for xMPU_SETTINGS.ulTaskFlags member. */ #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) @@ -233,6 +236,9 @@ typedef struct MPU_SETTINGS #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/IAR/ARM_CM55/non_secure/port.c b/portable/IAR/ARM_CM55/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/IAR/ARM_CM55/non_secure/port.c +++ b/portable/IAR/ARM_CM55/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/IAR/ARM_CM85/non_secure/port.c b/portable/IAR/ARM_CM85/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/IAR/ARM_CM85/non_secure/port.c +++ b/portable/IAR/ARM_CM85/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c index 4b1564397..f220a6d7e 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c @@ -472,6 +472,15 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV #endif /* configENABLE_MPU == 1 */ /*-----------------------------------------------------------*/ +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/** + * @brief This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif + /** * @brief Each task maintains its own interrupt status in the critical nesting * variable. @@ -1651,6 +1660,12 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Initialize the critical nesting count ready for the first task. */ ulCriticalNesting = 0; + #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Start the first task. */ vStartFirstTask(); @@ -1931,3 +1946,98 @@ BaseType_t xPortIsInsideInterrupt( void ) #endif /* #if ( ( configASSERT_DEFINED == 1 ) && ( portHAS_BASEPRI == 1 ) ) */ /*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h index 2ef4c90c1..816e34894 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -287,6 +287,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) +/* Size of an Access Control List (ACL) entry in bits. */ + #define portACL_ENTRY_SIZE_BITS ( 32U ) + typedef struct MPU_SETTINGS { uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ @@ -296,6 +299,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index 6702c4cd9..92c8aad9f 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -140,7 +140,16 @@ /* Each task maintains its own interrupt status in the critical nesting * variable. Note this is not saved as part of the task context as context * switches can only occur when uxCriticalNesting is zero. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +PRIVILEGED_DATA static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; + +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + +/* + * This variable is set to pdTRUE when the scheduler is started. + */ + PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE; + +#endif /* * Setup the timer to generate the tick interrupts. @@ -905,6 +914,12 @@ BaseType_t xPortStartScheduler( void ) /* Initialise the critical nesting count ready for the first task. */ uxCriticalNesting = 0; + #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + { + xSchedulerRunning = pdTRUE; + } + #endif + /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); @@ -1539,3 +1554,99 @@ __asm uint32_t prvPortGetIPSR( void ) } #endif /* configASSERT_DEFINED */ +/*-----------------------------------------------------------*/ + +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortGrantAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] |= ( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) + + void vPortRevokeAccessToKernelObject( TaskHandle_t xInternalTaskHandle, + int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + xMPU_SETTINGS * xTaskMpuSettings; + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + xTaskMpuSettings = xTaskGetMPUSettings( xInternalTaskHandle ); + + xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] &= ~( 1U << ulAccessControlListEntryBit ); + } + +#endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_MPU_WRAPPERS_V1 == 0 ) + + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + uint32_t ulAccessControlListEntryIndex, ulAccessControlListEntryBit; + BaseType_t xAccessGranted = pdFALSE; + const xMPU_SETTINGS * xTaskMpuSettings; + + if( xSchedulerRunning == pdFALSE ) + { + /* Grant access to all the kernel objects before the scheduler + * is started. It is necessary because there is no task running + * yet and therefore, we cannot use the permissions of any + * task. */ + xAccessGranted = pdTRUE; + } + else + { + xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */ + + ulAccessControlListEntryIndex = ( ( uint32_t ) lInternalIndexOfKernelObject / portACL_ENTRY_SIZE_BITS ); + ulAccessControlListEntryBit = ( ( uint32_t ) lInternalIndexOfKernelObject % portACL_ENTRY_SIZE_BITS ); + + if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG ) + { + xAccessGranted = pdTRUE; + } + else + { + if( ( xTaskMpuSettings->ulAccessControlList[ ulAccessControlListEntryIndex ] & ( 1U << ulAccessControlListEntryBit ) ) != 0 ) + { + xAccessGranted = pdTRUE; + } + } + } + + return xAccessGranted; + } + + #else /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + + BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) /* PRIVILEGED_FUNCTION */ + { + ( void ) lInternalIndexOfKernelObject; + + /* If Access Control List feature is not used, all the tasks have + * access to all the kernel objects. */ + return pdTRUE; + } + + #endif /* #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) */ + +#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ +/*-----------------------------------------------------------*/ diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h index 6a46c3085..b68af5a73 100644 --- a/portable/RVDS/ARM_CM4_MPU/portmacro.h +++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h @@ -216,7 +216,10 @@ typedef struct MPU_REGION_SETTINGS #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */ -#define MAX_CONTEXT_SIZE 52 +#define MAX_CONTEXT_SIZE ( 52 ) + +/* Size of an Access Control List (ACL) entry in bits. */ +#define portACL_ENTRY_SIZE_BITS ( 32U ) /* Flags used for xMPU_SETTINGS.ulTaskFlags member. */ #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) @@ -231,6 +234,9 @@ typedef struct MPU_SETTINGS #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; + #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) + uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; + #endif #endif } xMPU_SETTINGS; From 2f66e475fab35887f00c966c8ad87393b4036e93 Mon Sep 17 00:00:00 2001 From: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Date: Wed, 29 Nov 2023 19:15:07 +0530 Subject: [PATCH 16/21] Fix prototype of MPU_vTimerSetReloadMode (#911) Signed-off-by: Gaurav Aggarwal --- portable/Common/mpu_wrappers.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index ac8251436..e881681e0 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -1821,7 +1821,7 @@ #if ( configUSE_TIMERS == 1 ) void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, - const UBaseType_t uxAutoReload ) /* FREERTOS_SYSTEM_CALL */ + const BaseType_t uxAutoReload ) /* FREERTOS_SYSTEM_CALL */ { if( portIS_PRIVILEGED() == pdFALSE ) { From dfa52a70c5baf4a380a5d5abdd7efca205d46a44 Mon Sep 17 00:00:00 2001 From: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com> Date: Wed, 29 Nov 2023 19:42:18 +0530 Subject: [PATCH 17/21] Update History.txt for V10.6.2 (#912) * Update History.txt for V10.6.2 --- History.txt | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/History.txt b/History.txt index 588500150..87e795277 100644 --- a/History.txt +++ b/History.txt @@ -1,6 +1,19 @@ Documentation and download available at https://www.FreeRTOS.org/ -Changes between FreeRTOS V10.6.0 and FreeRTOS 10.6.1 released August 17, 2023 +Changes between FreeRTOS V10.6.1 and FreeRTOS V10.6.2 released November 29, 2023 + + + Add the following improvements to the new MPU wrapper (mpu_wrappers_v2.c) + introduced in version 10.6.0: + - Introduce Access Control List (ACL) feature to allow the application + writer to control an unprivileged task’s access to kernel objects. + - Update the system call entry mechanism to only require one Supervisor + Call (SVC) instruction. + - Wrap parameters for system calls with more than four parameters in a + struct to avoid special handling during system call entry. + - Fix 2 possible integer overflows. + - Convert some asserts to run time parameter checks. + +Changes between FreeRTOS V10.6.0 and FreeRTOS V10.6.1 released August 17, 2023 + Add runtime parameter checks to functions in mpu_wrappers_v2.c file. The same checks are already performed in API implementations using @@ -13,7 +26,7 @@ Changes between FreeRTOS V10.6.0 and FreeRTOS 10.6.1 released August 17, 2023 - Xinhui Shao, Yumeng Wei, Huaiyu Yan, Zhen Ling of School of Computer Science and Engineering, Southeast University, China. -Changes between FreeRTOS V10.5.1 and FreeRTOS 10.6.0 released July 13, 2023 +Changes between FreeRTOS V10.5.1 and FreeRTOS V10.6.0 released July 13, 2023 + Add a new MPU wrapper that places additional restrictions on unprivileged tasks. The following is the list of changes introduced with the new MPU From a86ae9b06e5f983734ba564c8dd25328dd51888a Mon Sep 17 00:00:00 2001 From: kar-rahul-aws Date: Wed, 29 Nov 2023 14:13:50 +0000 Subject: [PATCH 18/21] [AUTO][RELEASE]: Bump task.h version macros to "10.6.2" --- include/task.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/task.h b/include/task.h index fc600934d..c4924f6f6 100644 --- a/include/task.h +++ b/include/task.h @@ -53,10 +53,10 @@ * The tskKERNEL_VERSION_MAJOR, tskKERNEL_VERSION_MINOR, tskKERNEL_VERSION_BUILD * values will reflect the last released version number. */ -#define tskKERNEL_VERSION_NUMBER "V10.6.1" +#define tskKERNEL_VERSION_NUMBER "V10.6.2" #define tskKERNEL_VERSION_MAJOR 10 #define tskKERNEL_VERSION_MINOR 6 -#define tskKERNEL_VERSION_BUILD 1 +#define tskKERNEL_VERSION_BUILD 2 /* MPU region parameters passed in ulParameters * of MemoryRegion_t struct. */ From ef7b253b56c9788077f5ecd6c9deb4021923d646 Mon Sep 17 00:00:00 2001 From: kar-rahul-aws Date: Wed, 29 Nov 2023 14:13:51 +0000 Subject: [PATCH 19/21] [AUTO][RELEASE]: Bump file header version to "10.6.2" --- .github/scripts/kernel_checker.py | 4 ++-- croutine.c | 2 +- event_groups.c | 2 +- include/FreeRTOS.h | 2 +- include/StackMacros.h | 2 +- include/atomic.h | 2 +- include/croutine.h | 2 +- include/deprecated_definitions.h | 2 +- include/event_groups.h | 2 +- include/list.h | 2 +- include/message_buffer.h | 2 +- include/mpu_prototypes.h | 2 +- include/mpu_syscall_numbers.h | 2 +- include/mpu_wrappers.h | 2 +- include/newlib-freertos.h | 2 +- include/picolibc-freertos.h | 2 +- include/portable.h | 2 +- include/projdefs.h | 2 +- include/queue.h | 2 +- include/semphr.h | 2 +- include/stack_macros.h | 2 +- include/stdint.readme | 2 +- include/stream_buffer.h | 2 +- include/task.h | 2 +- include/timers.h | 2 +- list.c | 2 +- portable/ARMv8M/copy_files.py | 2 +- portable/ARMv8M/non_secure/port.c | 2 +- .../non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h | 2 +- .../portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h | 2 +- .../non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h | 2 +- .../portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h | 2 +- .../non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h | 2 +- .../portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h | 2 +- .../non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h | 2 +- .../portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h | 2 +- portable/ARMv8M/non_secure/portasm.h | 2 +- portable/ARMv8M/non_secure/portmacrocommon.h | 2 +- .../context/portable/GCC/ARM_CM23/secure_context_port.c | 2 +- .../context/portable/GCC/ARM_CM33/secure_context_port.c | 2 +- .../context/portable/IAR/ARM_CM23/secure_context_port_asm.s | 2 +- .../context/portable/IAR/ARM_CM33/secure_context_port_asm.s | 2 +- portable/ARMv8M/secure/context/secure_context.c | 2 +- portable/ARMv8M/secure/context/secure_context.h | 2 +- portable/ARMv8M/secure/heap/secure_heap.c | 2 +- portable/ARMv8M/secure/heap/secure_heap.h | 2 +- portable/ARMv8M/secure/init/secure_init.c | 2 +- portable/ARMv8M/secure/init/secure_init.h | 2 +- portable/ARMv8M/secure/macros/secure_port_macros.h | 2 +- portable/BCC/16BitDOS/Flsh186/port.c | 2 +- portable/BCC/16BitDOS/Flsh186/prtmacro.h | 2 +- portable/BCC/16BitDOS/PC/port.c | 2 +- portable/BCC/16BitDOS/PC/prtmacro.h | 2 +- portable/BCC/16BitDOS/common/portasm.h | 2 +- portable/BCC/16BitDOS/common/portcomn.c | 2 +- portable/CCS/ARM_CM3/port.c | 2 +- portable/CCS/ARM_CM3/portasm.asm | 2 +- portable/CCS/ARM_CM3/portmacro.h | 2 +- portable/CCS/ARM_CM4F/port.c | 2 +- portable/CCS/ARM_CM4F/portasm.asm | 2 +- portable/CCS/ARM_CM4F/portmacro.h | 2 +- portable/CCS/ARM_Cortex-R4/port.c | 2 +- portable/CCS/ARM_Cortex-R4/portASM.asm | 2 +- portable/CCS/ARM_Cortex-R4/portmacro.h | 2 +- portable/CCS/MSP430X/data_model.h | 2 +- portable/CCS/MSP430X/port.c | 2 +- portable/CCS/MSP430X/portext.asm | 2 +- portable/CCS/MSP430X/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V1/port.c | 2 +- portable/CodeWarrior/ColdFire_V1/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V1/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V2/port.c | 2 +- portable/CodeWarrior/ColdFire_V2/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V2/portmacro.h | 2 +- portable/CodeWarrior/HCS12/port.c | 2 +- portable/CodeWarrior/HCS12/portmacro.h | 2 +- portable/Common/mpu_wrappers.c | 2 +- portable/Common/mpu_wrappers_v2.c | 2 +- portable/GCC/ARM7_AT91FR40008/port.c | 2 +- portable/GCC/ARM7_AT91FR40008/portISR.c | 2 +- portable/GCC/ARM7_AT91FR40008/portmacro.h | 2 +- portable/GCC/ARM7_AT91SAM7S/port.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portISR.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portmacro.h | 2 +- portable/GCC/ARM7_LPC2000/port.c | 2 +- portable/GCC/ARM7_LPC2000/portISR.c | 2 +- portable/GCC/ARM7_LPC2000/portmacro.h | 2 +- portable/GCC/ARM7_LPC23xx/port.c | 2 +- portable/GCC/ARM7_LPC23xx/portISR.c | 2 +- portable/GCC/ARM7_LPC23xx/portmacro.h | 2 +- portable/GCC/ARM_CA53_64_BIT/port.c | 2 +- portable/GCC/ARM_CA53_64_BIT/portASM.S | 2 +- portable/GCC/ARM_CA53_64_BIT/portmacro.h | 2 +- portable/GCC/ARM_CA53_64_BIT_SRE/port.c | 2 +- portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S | 2 +- portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h | 2 +- portable/GCC/ARM_CA9/port.c | 2 +- portable/GCC/ARM_CA9/portASM.S | 2 +- portable/GCC/ARM_CA9/portmacro.h | 2 +- portable/GCC/ARM_CM0/port.c | 2 +- portable/GCC/ARM_CM0/portmacro.h | 2 +- portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM23/non_secure/port.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM23/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context.c | 2 +- portable/GCC/ARM_CM23/secure/secure_context.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM23/secure/secure_init.c | 2 +- portable/GCC/ARM_CM23/secure/secure_init.h | 2 +- portable/GCC/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM3/port.c | 2 +- portable/GCC/ARM_CM3/portmacro.h | 2 +- portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM33/non_secure/port.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM33/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context.c | 2 +- portable/GCC/ARM_CM33/secure/secure_context.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM33/secure/secure_init.c | 2 +- portable/GCC/ARM_CM33/secure/secure_init.h | 2 +- portable/GCC/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM35P/non_secure/port.c | 2 +- portable/GCC/ARM_CM35P/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM35P/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM35P/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_context.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_context.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_init.c | 2 +- portable/GCC/ARM_CM35P/secure/secure_init.h | 2 +- portable/GCC/ARM_CM35P/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM3_MPU/port.c | 2 +- portable/GCC/ARM_CM3_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM4F/port.c | 2 +- portable/GCC/ARM_CM4F/portmacro.h | 2 +- portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM4_MPU/port.c | 2 +- portable/GCC/ARM_CM4_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM55/non_secure/port.c | 2 +- portable/GCC/ARM_CM55/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM55/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM55/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM55/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM55/secure/secure_context.c | 2 +- portable/GCC/ARM_CM55/secure/secure_context.h | 2 +- portable/GCC/ARM_CM55/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM55/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM55/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM55/secure/secure_init.c | 2 +- portable/GCC/ARM_CM55/secure/secure_init.h | 2 +- portable/GCC/ARM_CM55/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM7/r0p1/port.c | 2 +- portable/GCC/ARM_CM7/r0p1/portmacro.h | 2 +- portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM85/non_secure/port.c | 2 +- portable/GCC/ARM_CM85/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM85/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM85/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM85/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CM85/secure/secure_context.c | 2 +- portable/GCC/ARM_CM85/secure/secure_context.h | 2 +- portable/GCC/ARM_CM85/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM85/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM85/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM85/secure/secure_init.c | 2 +- portable/GCC/ARM_CM85/secure/secure_init.h | 2 +- portable/GCC/ARM_CM85/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h | 2 +- portable/GCC/ARM_CR5/port.c | 2 +- portable/GCC/ARM_CR5/portASM.S | 2 +- portable/GCC/ARM_CR5/portmacro.h | 2 +- portable/GCC/ARM_CRx_No_GIC/port.c | 2 +- portable/GCC/ARM_CRx_No_GIC/portASM.S | 2 +- portable/GCC/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/GCC/ATMega323/port.c | 2 +- portable/GCC/ATMega323/portmacro.h | 2 +- portable/GCC/AVR32_UC3/exception.S | 2 +- portable/GCC/AVR32_UC3/port.c | 2 +- portable/GCC/AVR32_UC3/portmacro.h | 2 +- portable/GCC/CORTUS_APS3/port.c | 2 +- portable/GCC/CORTUS_APS3/portmacro.h | 2 +- portable/GCC/ColdFire_V2/port.c | 2 +- portable/GCC/ColdFire_V2/portasm.S | 2 +- portable/GCC/ColdFire_V2/portmacro.h | 2 +- portable/GCC/H8S2329/port.c | 2 +- portable/GCC/H8S2329/portmacro.h | 2 +- portable/GCC/HCS12/port.c | 2 +- portable/GCC/HCS12/portmacro.h | 2 +- portable/GCC/IA32_flat/ISR_Support.h | 2 +- portable/GCC/IA32_flat/port.c | 2 +- portable/GCC/IA32_flat/portASM.S | 2 +- portable/GCC/IA32_flat/portmacro.h | 2 +- portable/GCC/MSP430F449/port.c | 2 +- portable/GCC/MSP430F449/portmacro.h | 2 +- portable/GCC/MicroBlaze/port.c | 2 +- portable/GCC/MicroBlaze/portasm.s | 2 +- portable/GCC/MicroBlaze/portmacro.h | 2 +- portable/GCC/MicroBlazeV8/port.c | 2 +- portable/GCC/MicroBlazeV8/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV8/portasm.S | 2 +- portable/GCC/MicroBlazeV8/portmacro.h | 2 +- portable/GCC/MicroBlazeV9/port.c | 2 +- portable/GCC/MicroBlazeV9/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV9/portasm.S | 2 +- portable/GCC/MicroBlazeV9/portmacro.h | 2 +- portable/GCC/NiosII/port.c | 2 +- portable/GCC/NiosII/port_asm.S | 2 +- portable/GCC/NiosII/portmacro.h | 2 +- portable/GCC/PPC405_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC405_Xilinx/port.c | 2 +- portable/GCC/PPC405_Xilinx/portasm.S | 2 +- portable/GCC/PPC405_Xilinx/portmacro.h | 2 +- portable/GCC/PPC440_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC440_Xilinx/port.c | 2 +- portable/GCC/PPC440_Xilinx/portasm.S | 2 +- portable/GCC/PPC440_Xilinx/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/GCC/RISC-V/port.c | 2 +- portable/GCC/RISC-V/portASM.S | 2 +- portable/GCC/RISC-V/portContext.h | 2 +- portable/GCC/RISC-V/portmacro.h | 2 +- portable/GCC/RL78/isr_support.h | 2 +- portable/GCC/RL78/port.c | 2 +- portable/GCC/RL78/portasm.S | 2 +- portable/GCC/RL78/portmacro.h | 2 +- portable/GCC/RX100/port.c | 2 +- portable/GCC/RX100/portmacro.h | 2 +- portable/GCC/RX200/port.c | 2 +- portable/GCC/RX200/portmacro.h | 2 +- portable/GCC/RX600/port.c | 2 +- portable/GCC/RX600/portmacro.h | 2 +- portable/GCC/RX600v2/port.c | 2 +- portable/GCC/RX600v2/portmacro.h | 2 +- portable/GCC/RX700v3_DPFPU/port.c | 2 +- portable/GCC/RX700v3_DPFPU/portmacro.h | 2 +- portable/GCC/STR75x/port.c | 2 +- portable/GCC/STR75x/portISR.c | 2 +- portable/GCC/STR75x/portmacro.h | 2 +- portable/GCC/TriCore_1782/port.c | 2 +- portable/GCC/TriCore_1782/portmacro.h | 2 +- portable/GCC/TriCore_1782/porttrap.c | 2 +- portable/IAR/78K0R/ISR_Support.h | 2 +- portable/IAR/78K0R/port.c | 2 +- portable/IAR/78K0R/portasm.s26 | 2 +- portable/IAR/78K0R/portmacro.h | 2 +- portable/IAR/ARM_CA5_No_GIC/port.c | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.h | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CA5_No_GIC/portmacro.h | 2 +- portable/IAR/ARM_CA9/port.c | 2 +- portable/IAR/ARM_CA9/portASM.h | 2 +- portable/IAR/ARM_CA9/portASM.s | 2 +- portable/IAR/ARM_CA9/portmacro.h | 2 +- portable/IAR/ARM_CM0/port.c | 2 +- portable/IAR/ARM_CM0/portasm.s | 2 +- portable/IAR/ARM_CM0/portmacro.h | 2 +- portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM23/non_secure/port.c | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM23/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context.c | 2 +- portable/IAR/ARM_CM23/secure/secure_context.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM23/secure/secure_init.c | 2 +- portable/IAR/ARM_CM23/secure/secure_init.h | 2 +- portable/IAR/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM3/port.c | 2 +- portable/IAR/ARM_CM3/portasm.s | 2 +- portable/IAR/ARM_CM3/portmacro.h | 2 +- portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM33/non_secure/port.c | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM33/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context.c | 2 +- portable/IAR/ARM_CM33/secure/secure_context.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM33/secure/secure_init.c | 2 +- portable/IAR/ARM_CM33/secure/secure_init.h | 2 +- portable/IAR/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM35P/non_secure/port.c | 2 +- portable/IAR/ARM_CM35P/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM35P/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM35P/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_context.c | 2 +- portable/IAR/ARM_CM35P/secure/secure_context.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM35P/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM35P/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_init.c | 2 +- portable/IAR/ARM_CM35P/secure/secure_init.h | 2 +- portable/IAR/ARM_CM35P/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM4F/port.c | 2 +- portable/IAR/ARM_CM4F/portasm.s | 2 +- portable/IAR/ARM_CM4F/portmacro.h | 2 +- portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM4F_MPU/port.c | 2 +- portable/IAR/ARM_CM4F_MPU/portasm.s | 2 +- portable/IAR/ARM_CM4F_MPU/portmacro.h | 2 +- portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM55/non_secure/port.c | 2 +- portable/IAR/ARM_CM55/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM55/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM55/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM55/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM55/secure/secure_context.c | 2 +- portable/IAR/ARM_CM55/secure/secure_context.h | 2 +- portable/IAR/ARM_CM55/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM55/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM55/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM55/secure/secure_init.c | 2 +- portable/IAR/ARM_CM55/secure/secure_init.h | 2 +- portable/IAR/ARM_CM55/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM7/r0p1/port.c | 2 +- portable/IAR/ARM_CM7/r0p1/portasm.s | 2 +- portable/IAR/ARM_CM7/r0p1/portmacro.h | 2 +- portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM85/non_secure/port.c | 2 +- portable/IAR/ARM_CM85/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM85/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM85/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM85/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CM85/secure/secure_context.c | 2 +- portable/IAR/ARM_CM85/secure/secure_context.h | 2 +- portable/IAR/ARM_CM85/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM85/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM85/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM85/secure/secure_init.c | 2 +- portable/IAR/ARM_CM85/secure/secure_init.h | 2 +- portable/IAR/ARM_CM85/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h | 2 +- portable/IAR/ARM_CRx_No_GIC/port.c | 2 +- portable/IAR/ARM_CRx_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/IAR/ATMega323/port.c | 2 +- portable/IAR/ATMega323/portmacro.h | 2 +- portable/IAR/ATMega323/portmacro.s90 | 2 +- portable/IAR/AVR32_UC3/exception.s82 | 2 +- portable/IAR/AVR32_UC3/port.c | 2 +- portable/IAR/AVR32_UC3/portmacro.h | 2 +- portable/IAR/AVR32_UC3/read.c | 2 +- portable/IAR/AVR32_UC3/write.c | 2 +- portable/IAR/AVR_AVRDx/port.c | 2 +- portable/IAR/AVR_AVRDx/porthardware.h | 2 +- portable/IAR/AVR_AVRDx/portmacro.h | 2 +- portable/IAR/AVR_AVRDx/portmacro.s90 | 2 +- portable/IAR/AVR_Mega0/port.c | 2 +- portable/IAR/AVR_Mega0/porthardware.h | 2 +- portable/IAR/AVR_Mega0/portmacro.h | 2 +- portable/IAR/AVR_Mega0/portmacro.s90 | 2 +- portable/IAR/AtmelSAM7S64/ISR_Support.h | 2 +- portable/IAR/AtmelSAM7S64/port.c | 2 +- portable/IAR/AtmelSAM7S64/portasm.s79 | 2 +- portable/IAR/AtmelSAM7S64/portmacro.h | 2 +- portable/IAR/AtmelSAM9XE/ISR_Support.h | 2 +- portable/IAR/AtmelSAM9XE/port.c | 2 +- portable/IAR/AtmelSAM9XE/portasm.s79 | 2 +- portable/IAR/AtmelSAM9XE/portmacro.h | 2 +- portable/IAR/LPC2000/ISR_Support.h | 2 +- portable/IAR/LPC2000/port.c | 2 +- portable/IAR/LPC2000/portasm.s79 | 2 +- portable/IAR/LPC2000/portmacro.h | 2 +- portable/IAR/MSP430/port.c | 2 +- portable/IAR/MSP430/portasm.h | 2 +- portable/IAR/MSP430/portext.s43 | 2 +- portable/IAR/MSP430/portmacro.h | 2 +- portable/IAR/MSP430X/data_model.h | 2 +- portable/IAR/MSP430X/port.c | 2 +- portable/IAR/MSP430X/portext.s43 | 2 +- portable/IAR/MSP430X/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/IAR/RISC-V/port.c | 2 +- portable/IAR/RISC-V/portASM.s | 2 +- portable/IAR/RISC-V/portContext.h | 2 +- portable/IAR/RISC-V/portmacro.h | 2 +- portable/IAR/RL78/port.c | 2 +- portable/IAR/RL78/portasm.s | 2 +- portable/IAR/RL78/portmacro.h | 2 +- portable/IAR/RX100/port.c | 2 +- portable/IAR/RX100/port_asm.s | 2 +- portable/IAR/RX100/portmacro.h | 2 +- portable/IAR/RX600/port.c | 2 +- portable/IAR/RX600/port_asm.s | 2 +- portable/IAR/RX600/portmacro.h | 2 +- portable/IAR/RX700v3_DPFPU/port.c | 2 +- portable/IAR/RX700v3_DPFPU/portmacro.h | 2 +- portable/IAR/RXv2/port.c | 2 +- portable/IAR/RXv2/port_asm.s | 2 +- portable/IAR/RXv2/portmacro.h | 2 +- portable/IAR/STR71x/ISR_Support.h | 2 +- portable/IAR/STR71x/port.c | 2 +- portable/IAR/STR71x/portasm.s79 | 2 +- portable/IAR/STR71x/portmacro.h | 2 +- portable/IAR/STR75x/ISR_Support.h | 2 +- portable/IAR/STR75x/port.c | 2 +- portable/IAR/STR75x/portasm.s79 | 2 +- portable/IAR/STR75x/portmacro.h | 2 +- portable/IAR/STR91x/ISR_Support.h | 2 +- portable/IAR/STR91x/port.c | 2 +- portable/IAR/STR91x/portasm.s79 | 2 +- portable/IAR/STR91x/portmacro.h | 2 +- portable/IAR/V850ES/ISR_Support.h | 2 +- portable/IAR/V850ES/port.c | 2 +- portable/IAR/V850ES/portasm.s85 | 2 +- portable/IAR/V850ES/portasm_Fx3.s85 | 2 +- portable/IAR/V850ES/portasm_Hx2.s85 | 2 +- portable/IAR/V850ES/portmacro.h | 2 +- portable/MPLAB/PIC18F/port.c | 2 +- portable/MPLAB/PIC18F/portmacro.h | 2 +- portable/MPLAB/PIC24_dsPIC/port.c | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S | 2 +- portable/MPLAB/PIC24_dsPIC/portmacro.h | 2 +- portable/MPLAB/PIC32MEC14xx/ISR_Support.h | 2 +- portable/MPLAB/PIC32MEC14xx/port.c | 2 +- portable/MPLAB/PIC32MEC14xx/port_asm.S | 2 +- portable/MPLAB/PIC32MEC14xx/portmacro.h | 2 +- portable/MPLAB/PIC32MX/ISR_Support.h | 2 +- portable/MPLAB/PIC32MX/port.c | 2 +- portable/MPLAB/PIC32MX/port_asm.S | 2 +- portable/MPLAB/PIC32MX/portmacro.h | 2 +- portable/MPLAB/PIC32MZ/ISR_Support.h | 2 +- portable/MPLAB/PIC32MZ/port.c | 2 +- portable/MPLAB/PIC32MZ/port_asm.S | 2 +- portable/MPLAB/PIC32MZ/portmacro.h | 2 +- portable/MSVC-MingW/port.c | 2 +- portable/MSVC-MingW/portmacro.h | 2 +- portable/MemMang/heap_1.c | 2 +- portable/MemMang/heap_2.c | 2 +- portable/MemMang/heap_3.c | 2 +- portable/MemMang/heap_4.c | 2 +- portable/MemMang/heap_5.c | 2 +- portable/MikroC/ARM_CM4F/port.c | 2 +- portable/MikroC/ARM_CM4F/portmacro.h | 2 +- portable/Paradigm/Tern_EE/large_untested/port.c | 2 +- portable/Paradigm/Tern_EE/large_untested/portasm.h | 2 +- portable/Paradigm/Tern_EE/large_untested/portmacro.h | 2 +- portable/Paradigm/Tern_EE/small/port.c | 2 +- portable/Paradigm/Tern_EE/small/portasm.h | 2 +- portable/Paradigm/Tern_EE/small/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/port.c | 2 +- portable/RVDS/ARM7_LPC21xx/portASM.s | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.inc | 2 +- portable/RVDS/ARM_CA9/port.c | 2 +- portable/RVDS/ARM_CA9/portASM.s | 2 +- portable/RVDS/ARM_CA9/portmacro.h | 2 +- portable/RVDS/ARM_CA9/portmacro.inc | 2 +- portable/RVDS/ARM_CM0/port.c | 2 +- portable/RVDS/ARM_CM0/portmacro.h | 2 +- portable/RVDS/ARM_CM3/port.c | 2 +- portable/RVDS/ARM_CM3/portmacro.h | 2 +- portable/RVDS/ARM_CM4F/port.c | 2 +- portable/RVDS/ARM_CM4F/portmacro.h | 2 +- portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c | 2 +- portable/RVDS/ARM_CM4_MPU/port.c | 2 +- portable/RVDS/ARM_CM4_MPU/portmacro.h | 2 +- portable/RVDS/ARM_CM7/r0p1/port.c | 2 +- portable/RVDS/ARM_CM7/r0p1/portmacro.h | 2 +- portable/Renesas/RX100/port.c | 2 +- portable/Renesas/RX100/port_asm.src | 2 +- portable/Renesas/RX100/portmacro.h | 2 +- portable/Renesas/RX200/port.c | 2 +- portable/Renesas/RX200/port_asm.src | 2 +- portable/Renesas/RX200/portmacro.h | 2 +- portable/Renesas/RX600/port.c | 2 +- portable/Renesas/RX600/port_asm.src | 2 +- portable/Renesas/RX600/portmacro.h | 2 +- portable/Renesas/RX600v2/port.c | 2 +- portable/Renesas/RX600v2/port_asm.src | 2 +- portable/Renesas/RX600v2/portmacro.h | 2 +- portable/Renesas/RX700v3_DPFPU/port.c | 2 +- portable/Renesas/RX700v3_DPFPU/port_asm.src | 2 +- portable/Renesas/RX700v3_DPFPU/portmacro.h | 2 +- portable/Renesas/SH2A_FPU/ISR_Support.inc | 2 +- portable/Renesas/SH2A_FPU/port.c | 2 +- portable/Renesas/SH2A_FPU/portasm.src | 2 +- portable/Renesas/SH2A_FPU/portmacro.h | 2 +- portable/Rowley/MSP430F449/port.c | 2 +- portable/Rowley/MSP430F449/portasm.h | 2 +- portable/Rowley/MSP430F449/portext.asm | 2 +- portable/Rowley/MSP430F449/portmacro.h | 2 +- portable/SDCC/Cygnal/port.c | 2 +- portable/SDCC/Cygnal/portmacro.h | 2 +- portable/Softune/MB91460/__STD_LIB_sbrk.c | 2 +- portable/Softune/MB91460/port.c | 2 +- portable/Softune/MB91460/portmacro.h | 2 +- portable/Softune/MB96340/__STD_LIB_sbrk.c | 2 +- portable/Softune/MB96340/port.c | 2 +- portable/Softune/MB96340/portmacro.h | 2 +- portable/Tasking/ARM_CM4F/port.c | 2 +- portable/Tasking/ARM_CM4F/port_asm.asm | 2 +- portable/Tasking/ARM_CM4F/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/port.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_v1/port.c | 2 +- portable/ThirdParty/GCC/ARC_v1/portmacro.h | 2 +- portable/ThirdParty/GCC/ATmega/port.c | 2 +- portable/ThirdParty/GCC/ATmega/portmacro.h | 2 +- portable/ThirdParty/GCC/Posix/port.c | 2 +- portable/ThirdParty/GCC/Posix/portmacro.h | 2 +- portable/ThirdParty/GCC/Posix/utils/wait_for_event.c | 2 +- portable/ThirdParty/GCC/Posix/utils/wait_for_event.h | 2 +- portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c | 2 +- portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h | 2 +- portable/ThirdParty/GCC/RP2040/include/portmacro.h | 2 +- portable/ThirdParty/GCC/RP2040/include/rp2040_config.h | 2 +- portable/ThirdParty/GCC/RP2040/port.c | 2 +- .../ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h | 2 +- portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h | 2 +- portable/ThirdParty/GCC/Xtensa_ESP32/port.c | 2 +- portable/ThirdParty/XCC/Xtensa/port.c | 2 +- portable/ThirdParty/XCC/Xtensa/portasm.S | 2 +- portable/ThirdParty/XCC/Xtensa/portbenchmark.h | 2 +- portable/ThirdParty/XCC/Xtensa/portclib.c | 2 +- portable/ThirdParty/XCC/Xtensa/portmacro.h | 2 +- portable/ThirdParty/XCC/Xtensa/porttrace.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_api.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_config.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_context.S | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_context.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_init.c | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_intr.c | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_timer.h | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S | 2 +- portable/WizC/PIC18/Drivers/Tick/Tick.c | 2 +- portable/WizC/PIC18/Drivers/Tick/isrTick.c | 2 +- portable/WizC/PIC18/addFreeRTOS.h | 2 +- portable/WizC/PIC18/port.c | 2 +- portable/WizC/PIC18/portmacro.h | 2 +- portable/oWatcom/16BitDOS/Flsh186/port.c | 2 +- portable/oWatcom/16BitDOS/Flsh186/portmacro.h | 2 +- portable/oWatcom/16BitDOS/PC/port.c | 2 +- portable/oWatcom/16BitDOS/PC/portmacro.h | 2 +- portable/oWatcom/16BitDOS/common/portasm.h | 2 +- portable/oWatcom/16BitDOS/common/portcomn.c | 2 +- queue.c | 2 +- stream_buffer.c | 2 +- tasks.c | 2 +- timers.c | 2 +- 658 files changed, 659 insertions(+), 659 deletions(-) diff --git a/.github/scripts/kernel_checker.py b/.github/scripts/kernel_checker.py index 697561ab4..c7ec77de9 100755 --- a/.github/scripts/kernel_checker.py +++ b/.github/scripts/kernel_checker.py @@ -1,6 +1,6 @@ #!/usr/bin/env python3 #/* -# * FreeRTOS Kernel V10.6.1 +# * FreeRTOS Kernel V10.6.2 # * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * SPDX-License-Identifier: MIT @@ -99,7 +99,7 @@ KERNEL_THIRD_PARTY_PATTERNS = [ KERNEL_HEADER = [ '/*\n', - ' * FreeRTOS Kernel V10.6.1\n', + ' * FreeRTOS Kernel V10.6.2\n', ' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n', ' *\n', ' * SPDX-License-Identifier: MIT\n', diff --git a/croutine.c b/croutine.c index 754140291..559276c52 100644 --- a/croutine.c +++ b/croutine.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/event_groups.c b/event_groups.c index 7e4a402bc..e337f13bd 100644 --- a/event_groups.c +++ b/event_groups.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/FreeRTOS.h b/include/FreeRTOS.h index f09828255..4a19f932c 100644 --- a/include/FreeRTOS.h +++ b/include/FreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/StackMacros.h b/include/StackMacros.h index 6ee27b801..006068c7e 100644 --- a/include/StackMacros.h +++ b/include/StackMacros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/atomic.h b/include/atomic.h index 1aa50e64a..033edce3a 100644 --- a/include/atomic.h +++ b/include/atomic.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/croutine.h b/include/croutine.h index 349deeab3..df50f870e 100644 --- a/include/croutine.h +++ b/include/croutine.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/deprecated_definitions.h b/include/deprecated_definitions.h index c8087a1fd..6a25d063b 100644 --- a/include/deprecated_definitions.h +++ b/include/deprecated_definitions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/event_groups.h b/include/event_groups.h index a205a982d..a5c723d40 100644 --- a/include/event_groups.h +++ b/include/event_groups.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/list.h b/include/list.h index 43f3bd503..62c6238f6 100644 --- a/include/list.h +++ b/include/list.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/message_buffer.h b/include/message_buffer.h index f5c296c3e..136445d00 100644 --- a/include/message_buffer.h +++ b/include/message_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/mpu_prototypes.h b/include/mpu_prototypes.h index 40a9441e3..354b94e41 100644 --- a/include/mpu_prototypes.h +++ b/include/mpu_prototypes.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/mpu_syscall_numbers.h b/include/mpu_syscall_numbers.h index b056d0e54..03c3ebd45 100644 --- a/include/mpu_syscall_numbers.h +++ b/include/mpu_syscall_numbers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h index c7cdaa247..bc19e0db5 100644 --- a/include/mpu_wrappers.h +++ b/include/mpu_wrappers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/newlib-freertos.h b/include/newlib-freertos.h index 1377f41db..b6911c9bf 100644 --- a/include/newlib-freertos.h +++ b/include/newlib-freertos.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/picolibc-freertos.h b/include/picolibc-freertos.h index 91edeae22..63f692726 100644 --- a/include/picolibc-freertos.h +++ b/include/picolibc-freertos.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/portable.h b/include/portable.h index 8faeb738a..ec11f0f4d 100644 --- a/include/portable.h +++ b/include/portable.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/projdefs.h b/include/projdefs.h index 8ee566ce1..4c4633395 100644 --- a/include/projdefs.h +++ b/include/projdefs.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/queue.h b/include/queue.h index d0a3032c6..836adf58d 100644 --- a/include/queue.h +++ b/include/queue.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/semphr.h b/include/semphr.h index 5ca43d6c3..46ac85a9d 100644 --- a/include/semphr.h +++ b/include/semphr.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/stack_macros.h b/include/stack_macros.h index 7a32e059c..354400d45 100644 --- a/include/stack_macros.h +++ b/include/stack_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/stdint.readme b/include/stdint.readme index 3442ba92d..11664f308 100644 --- a/include/stdint.readme +++ b/include/stdint.readme @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/stream_buffer.h b/include/stream_buffer.h index 84abc9688..48ca266d6 100644 --- a/include/stream_buffer.h +++ b/include/stream_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/task.h b/include/task.h index c4924f6f6..1207e18c8 100644 --- a/include/task.h +++ b/include/task.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/include/timers.h b/include/timers.h index 9d5f4dde9..0900edb2a 100644 --- a/include/timers.h +++ b/include/timers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/list.c b/list.c index 8cff42e83..6129affbe 100644 --- a/list.c +++ b/list.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/copy_files.py b/portable/ARMv8M/copy_files.py index 8d501543c..c48a0c692 100644 --- a/portable/ARMv8M/copy_files.py +++ b/portable/ARMv8M/copy_files.py @@ -1,5 +1,5 @@ #/* -# * FreeRTOS Kernel V10.6.1 +# * FreeRTOS Kernel V10.6.2 # * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c index 4323feffe..b8164a001 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index dc1d60d43..b23defe79 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h index 148c5c45e..d8dab9285 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c index 4323feffe..b8164a001 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c index a6ab28b6b..b90da71f3 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h index 148c5c45e..d8dab9285 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c index dca4ec1e4..d247c92e0 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c index 54de64d36..7431c98f1 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h index 171ff1503..cc798707e 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c index dca4ec1e4..d247c92e0 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c index 9d5ff50fc..b3f6a0aac 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h index 171ff1503..cc798707e 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h index 091c33c73..557b542eb 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h index 16c6dc7c2..880205cb1 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h index 4e8ad06d4..f606f817d 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S index 2ffb37043..4d805f3e2 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s index 16a874393..3c1788998 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h index af894a78d..19d7556fb 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S index 2ffb37043..4d805f3e2 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s index 082e14f3f..cef6b8a66 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h index af894a78d..19d7556fb 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S index 9ce253f73..ef180bd91 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s index 372cc19bf..530910341 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h index b78f957d3..5afc234c1 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S index 9ce253f73..ef180bd91 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s index afb416a8e..00ee5a5cb 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h index b7c487cd2..84e86d9f9 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h index 05ac91399..247468478 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h index 7e7d6450b..d8d08f155 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h index d970c79fe..4f7cf2bc0 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portasm.h b/portable/ARMv8M/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/ARMv8M/non_secure/portasm.h +++ b/portable/ARMv8M/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/non_secure/portmacrocommon.h b/portable/ARMv8M/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/ARMv8M/non_secure/portmacrocommon.h +++ b/portable/ARMv8M/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c index bf62892a7..ce3534010 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c index 541cd1c2d..d70822c06 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s index afa0bf5d1..1e4b3a57a 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s index 620dfc3fc..0da3e0f12 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c index e02585e68..e37dd9672 100644 --- a/portable/ARMv8M/secure/context/secure_context.c +++ b/portable/ARMv8M/secure/context/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/context/secure_context.h b/portable/ARMv8M/secure/context/secure_context.h index 872f4767c..2220ea646 100644 --- a/portable/ARMv8M/secure/context/secure_context.h +++ b/portable/ARMv8M/secure/context/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/heap/secure_heap.c b/portable/ARMv8M/secure/heap/secure_heap.c index 0a452b6a0..19f7c2354 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.c +++ b/portable/ARMv8M/secure/heap/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/heap/secure_heap.h b/portable/ARMv8M/secure/heap/secure_heap.h index b95ab4214..75c9cb00b 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.h +++ b/portable/ARMv8M/secure/heap/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/init/secure_init.c b/portable/ARMv8M/secure/init/secure_init.c index 419b91e62..f93bfce95 100644 --- a/portable/ARMv8M/secure/init/secure_init.c +++ b/portable/ARMv8M/secure/init/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/init/secure_init.h b/portable/ARMv8M/secure/init/secure_init.h index 6017dc15a..e6c9da0b4 100644 --- a/portable/ARMv8M/secure/init/secure_init.h +++ b/portable/ARMv8M/secure/init/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ARMv8M/secure/macros/secure_port_macros.h b/portable/ARMv8M/secure/macros/secure_port_macros.h index 335f24fbc..d7ac5833c 100644 --- a/portable/ARMv8M/secure/macros/secure_port_macros.h +++ b/portable/ARMv8M/secure/macros/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/Flsh186/port.c b/portable/BCC/16BitDOS/Flsh186/port.c index c0fb7c91a..827f458cc 100644 --- a/portable/BCC/16BitDOS/Flsh186/port.c +++ b/portable/BCC/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/Flsh186/prtmacro.h b/portable/BCC/16BitDOS/Flsh186/prtmacro.h index 73479f57e..3ae68e6db 100644 --- a/portable/BCC/16BitDOS/Flsh186/prtmacro.h +++ b/portable/BCC/16BitDOS/Flsh186/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/PC/port.c b/portable/BCC/16BitDOS/PC/port.c index 78e4f369a..ec5845e8d 100644 --- a/portable/BCC/16BitDOS/PC/port.c +++ b/portable/BCC/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/PC/prtmacro.h b/portable/BCC/16BitDOS/PC/prtmacro.h index 0ecebb4c4..03118cefd 100644 --- a/portable/BCC/16BitDOS/PC/prtmacro.h +++ b/portable/BCC/16BitDOS/PC/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/common/portasm.h b/portable/BCC/16BitDOS/common/portasm.h index fab1c71eb..bc2941a40 100644 --- a/portable/BCC/16BitDOS/common/portasm.h +++ b/portable/BCC/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/BCC/16BitDOS/common/portcomn.c b/portable/BCC/16BitDOS/common/portcomn.c index 879dfb25b..ff3049645 100644 --- a/portable/BCC/16BitDOS/common/portcomn.c +++ b/portable/BCC/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM3/port.c b/portable/CCS/ARM_CM3/port.c index 7b6da107b..3ba7d68ca 100755 --- a/portable/CCS/ARM_CM3/port.c +++ b/portable/CCS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM3/portasm.asm b/portable/CCS/ARM_CM3/portasm.asm index 6c9bdb7fe..59b495fb2 100644 --- a/portable/CCS/ARM_CM3/portasm.asm +++ b/portable/CCS/ARM_CM3/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM3/portmacro.h b/portable/CCS/ARM_CM3/portmacro.h index 165dc01e7..f4cc7d267 100644 --- a/portable/CCS/ARM_CM3/portmacro.h +++ b/portable/CCS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM4F/port.c b/portable/CCS/ARM_CM4F/port.c index 577862067..bb245ec04 100755 --- a/portable/CCS/ARM_CM4F/port.c +++ b/portable/CCS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM4F/portasm.asm b/portable/CCS/ARM_CM4F/portasm.asm index 602426f01..9f604bd22 100644 --- a/portable/CCS/ARM_CM4F/portasm.asm +++ b/portable/CCS/ARM_CM4F/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_CM4F/portmacro.h b/portable/CCS/ARM_CM4F/portmacro.h index 721874133..a72893fef 100644 --- a/portable/CCS/ARM_CM4F/portmacro.h +++ b/portable/CCS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_Cortex-R4/port.c b/portable/CCS/ARM_Cortex-R4/port.c index e0088dc81..535c96ae5 100644 --- a/portable/CCS/ARM_Cortex-R4/port.c +++ b/portable/CCS/ARM_Cortex-R4/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_Cortex-R4/portASM.asm b/portable/CCS/ARM_Cortex-R4/portASM.asm index b077f662f..c837408db 100644 --- a/portable/CCS/ARM_Cortex-R4/portASM.asm +++ b/portable/CCS/ARM_Cortex-R4/portASM.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/ARM_Cortex-R4/portmacro.h b/portable/CCS/ARM_Cortex-R4/portmacro.h index 6eaf01eb6..33e3b8852 100644 --- a/portable/CCS/ARM_Cortex-R4/portmacro.h +++ b/portable/CCS/ARM_Cortex-R4/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/data_model.h b/portable/CCS/MSP430X/data_model.h index 877579e17..0c341d3fd 100644 --- a/portable/CCS/MSP430X/data_model.h +++ b/portable/CCS/MSP430X/data_model.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/port.c b/portable/CCS/MSP430X/port.c index 894716bfb..16c5a635c 100644 --- a/portable/CCS/MSP430X/port.c +++ b/portable/CCS/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/portext.asm b/portable/CCS/MSP430X/portext.asm index 3f5ba64b9..76dc984b7 100644 --- a/portable/CCS/MSP430X/portext.asm +++ b/portable/CCS/MSP430X/portext.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/CCS/MSP430X/portmacro.h b/portable/CCS/MSP430X/portmacro.h index eed0bd2fb..f9df74561 100644 --- a/portable/CCS/MSP430X/portmacro.h +++ b/portable/CCS/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V1/port.c b/portable/CodeWarrior/ColdFire_V1/port.c index cf281bb85..00c5e5dbf 100644 --- a/portable/CodeWarrior/ColdFire_V1/port.c +++ b/portable/CodeWarrior/ColdFire_V1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V1/portasm.S b/portable/CodeWarrior/ColdFire_V1/portasm.S index 0ca06a1a0..06ac417aa 100644 --- a/portable/CodeWarrior/ColdFire_V1/portasm.S +++ b/portable/CodeWarrior/ColdFire_V1/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V1/portmacro.h b/portable/CodeWarrior/ColdFire_V1/portmacro.h index dde2ccbe2..ebaa9b916 100644 --- a/portable/CodeWarrior/ColdFire_V1/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V2/port.c b/portable/CodeWarrior/ColdFire_V2/port.c index 168840de9..4e65f9a6d 100644 --- a/portable/CodeWarrior/ColdFire_V2/port.c +++ b/portable/CodeWarrior/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V2/portasm.S b/portable/CodeWarrior/ColdFire_V2/portasm.S index 3382c8895..b9e9e9e6a 100644 --- a/portable/CodeWarrior/ColdFire_V2/portasm.S +++ b/portable/CodeWarrior/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/ColdFire_V2/portmacro.h b/portable/CodeWarrior/ColdFire_V2/portmacro.h index e785dee65..26806616a 100644 --- a/portable/CodeWarrior/ColdFire_V2/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/HCS12/port.c b/portable/CodeWarrior/HCS12/port.c index 80e69a8da..bab292f9a 100644 --- a/portable/CodeWarrior/HCS12/port.c +++ b/portable/CodeWarrior/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/CodeWarrior/HCS12/portmacro.h b/portable/CodeWarrior/HCS12/portmacro.h index 6871f7633..76ac8ed73 100644 --- a/portable/CodeWarrior/HCS12/portmacro.h +++ b/portable/CodeWarrior/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index e881681e0..17efcdbce 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Common/mpu_wrappers_v2.c b/portable/Common/mpu_wrappers_v2.c index 90c977d6b..f82762dc6 100644 --- a/portable/Common/mpu_wrappers_v2.c +++ b/portable/Common/mpu_wrappers_v2.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91FR40008/port.c b/portable/GCC/ARM7_AT91FR40008/port.c index 3d1d1ace8..19463b0cd 100644 --- a/portable/GCC/ARM7_AT91FR40008/port.c +++ b/portable/GCC/ARM7_AT91FR40008/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91FR40008/portISR.c b/portable/GCC/ARM7_AT91FR40008/portISR.c index d02660ec8..923186a82 100644 --- a/portable/GCC/ARM7_AT91FR40008/portISR.c +++ b/portable/GCC/ARM7_AT91FR40008/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91FR40008/portmacro.h b/portable/GCC/ARM7_AT91FR40008/portmacro.h index ea0f2d1c1..3a45ac93b 100644 --- a/portable/GCC/ARM7_AT91FR40008/portmacro.h +++ b/portable/GCC/ARM7_AT91FR40008/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91SAM7S/port.c b/portable/GCC/ARM7_AT91SAM7S/port.c index ba3846b47..9a111a957 100644 --- a/portable/GCC/ARM7_AT91SAM7S/port.c +++ b/portable/GCC/ARM7_AT91SAM7S/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91SAM7S/portISR.c b/portable/GCC/ARM7_AT91SAM7S/portISR.c index 8dd92a236..5e7cc8e39 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portISR.c +++ b/portable/GCC/ARM7_AT91SAM7S/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/portable/GCC/ARM7_AT91SAM7S/portmacro.h index 05e404527..fe17c6388 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portmacro.h +++ b/portable/GCC/ARM7_AT91SAM7S/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC2000/port.c b/portable/GCC/ARM7_LPC2000/port.c index 3efc13658..37ad4c8f3 100644 --- a/portable/GCC/ARM7_LPC2000/port.c +++ b/portable/GCC/ARM7_LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC2000/portISR.c b/portable/GCC/ARM7_LPC2000/portISR.c index 69bee162b..5510ab42d 100644 --- a/portable/GCC/ARM7_LPC2000/portISR.c +++ b/portable/GCC/ARM7_LPC2000/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC2000/portmacro.h b/portable/GCC/ARM7_LPC2000/portmacro.h index 2a674cc94..fb074355b 100644 --- a/portable/GCC/ARM7_LPC2000/portmacro.h +++ b/portable/GCC/ARM7_LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC23xx/port.c b/portable/GCC/ARM7_LPC23xx/port.c index 7d4cddaac..2e293dcd3 100644 --- a/portable/GCC/ARM7_LPC23xx/port.c +++ b/portable/GCC/ARM7_LPC23xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC23xx/portISR.c b/portable/GCC/ARM7_LPC23xx/portISR.c index a79401e1e..01084f7bf 100644 --- a/portable/GCC/ARM7_LPC23xx/portISR.c +++ b/portable/GCC/ARM7_LPC23xx/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM7_LPC23xx/portmacro.h b/portable/GCC/ARM7_LPC23xx/portmacro.h index 5c1ab3859..75bbe480c 100644 --- a/portable/GCC/ARM7_LPC23xx/portmacro.h +++ b/portable/GCC/ARM7_LPC23xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT/port.c b/portable/GCC/ARM_CA53_64_BIT/port.c index fd0913e8e..36f55d4d9 100644 --- a/portable/GCC/ARM_CA53_64_BIT/port.c +++ b/portable/GCC/ARM_CA53_64_BIT/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT/portASM.S b/portable/GCC/ARM_CA53_64_BIT/portASM.S index ef46b4eb3..3422f0f20 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portASM.S +++ b/portable/GCC/ARM_CA53_64_BIT/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT/portmacro.h b/portable/GCC/ARM_CA53_64_BIT/portmacro.h index c5a16809e..fd6366065 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portmacro.h +++ b/portable/GCC/ARM_CA53_64_BIT/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT_SRE/port.c b/portable/GCC/ARM_CA53_64_BIT_SRE/port.c index 20beb4eed..db39a2fd6 100644 --- a/portable/GCC/ARM_CA53_64_BIT_SRE/port.c +++ b/portable/GCC/ARM_CA53_64_BIT_SRE/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S b/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S index e1e133e6a..491a32f0a 100644 --- a/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S +++ b/portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h b/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h index 067f8b37a..f401f7dfc 100644 --- a/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h +++ b/portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA9/port.c b/portable/GCC/ARM_CA9/port.c index f0f0853f9..79fa32d10 100644 --- a/portable/GCC/ARM_CA9/port.c +++ b/portable/GCC/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA9/portASM.S b/portable/GCC/ARM_CA9/portASM.S index 39c980143..c9eb16d77 100644 --- a/portable/GCC/ARM_CA9/portASM.S +++ b/portable/GCC/ARM_CA9/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CA9/portmacro.h b/portable/GCC/ARM_CA9/portmacro.h index b68f4aaea..a88b3d8f2 100644 --- a/portable/GCC/ARM_CA9/portmacro.h +++ b/portable/GCC/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM0/port.c b/portable/GCC/ARM_CM0/port.c index 40c01f2b9..063a33ef6 100644 --- a/portable/GCC/ARM_CM0/port.c +++ b/portable/GCC/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM0/portmacro.h b/portable/GCC/ARM_CM0/portmacro.h index 75d01d095..46f308d85 100644 --- a/portable/GCC/ARM_CM0/portmacro.h +++ b/portable/GCC/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c index 4323feffe..b8164a001 100644 --- a/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index dc1d60d43..b23defe79 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.h b/portable/GCC/ARM_CM23/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portmacro.h b/portable/GCC/ARM_CM23/non_secure/portmacro.h index 148c5c45e..d8dab9285 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c index e02585e68..e37dd9672 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/portable/GCC/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_context.h b/portable/GCC/ARM_CM23/secure/secure_context.h index 872f4767c..2220ea646 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.h +++ b/portable/GCC/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_context_port.c b/portable/GCC/ARM_CM23/secure/secure_context_port.c index bf62892a7..ce3534010 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM23/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.c b/portable/GCC/ARM_CM23/secure/secure_heap.c index 0a452b6a0..19f7c2354 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.c +++ b/portable/GCC/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.h b/portable/GCC/ARM_CM23/secure/secure_heap.h index b95ab4214..75c9cb00b 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.h +++ b/portable/GCC/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_init.c b/portable/GCC/ARM_CM23/secure/secure_init.c index 419b91e62..f93bfce95 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.c +++ b/portable/GCC/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_init.h b/portable/GCC/ARM_CM23/secure/secure_init.h index 6017dc15a..e6c9da0b4 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.h +++ b/portable/GCC/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23/secure/secure_port_macros.h b/portable/GCC/ARM_CM23/secure/secure_port_macros.h index 335f24fbc..d7ac5833c 100644 --- a/portable/GCC/ARM_CM23/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c index 4323feffe..b8164a001 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index a6ab28b6b..b90da71f3 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h index 148c5c45e..d8dab9285 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3/port.c b/portable/GCC/ARM_CM3/port.c index b9cdd7214..cae2c5355 100755 --- a/portable/GCC/ARM_CM3/port.c +++ b/portable/GCC/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3/portmacro.h b/portable/GCC/ARM_CM3/portmacro.h index 794d4bcba..bdedf5a60 100644 --- a/portable/GCC/ARM_CM3/portmacro.h +++ b/portable/GCC/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c index dca4ec1e4..d247c92e0 100644 --- a/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.c b/portable/GCC/ARM_CM33/non_secure/portasm.c index 54de64d36..7431c98f1 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.h b/portable/GCC/ARM_CM33/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portmacro.h b/portable/GCC/ARM_CM33/non_secure/portmacro.h index 171ff1503..cc798707e 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c index e02585e68..e37dd9672 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/portable/GCC/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_context.h b/portable/GCC/ARM_CM33/secure/secure_context.h index 872f4767c..2220ea646 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.h +++ b/portable/GCC/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_context_port.c b/portable/GCC/ARM_CM33/secure/secure_context_port.c index 541cd1c2d..d70822c06 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM33/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.c b/portable/GCC/ARM_CM33/secure/secure_heap.c index 0a452b6a0..19f7c2354 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.c +++ b/portable/GCC/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.h b/portable/GCC/ARM_CM33/secure/secure_heap.h index b95ab4214..75c9cb00b 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.h +++ b/portable/GCC/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_init.c b/portable/GCC/ARM_CM33/secure/secure_init.c index 419b91e62..f93bfce95 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.c +++ b/portable/GCC/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_init.h b/portable/GCC/ARM_CM33/secure/secure_init.h index 6017dc15a..e6c9da0b4 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.h +++ b/portable/GCC/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33/secure/secure_port_macros.h b/portable/GCC/ARM_CM33/secure/secure_port_macros.h index 335f24fbc..d7ac5833c 100644 --- a/portable/GCC/ARM_CM33/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c index dca4ec1e4..d247c92e0 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c index 9d5ff50fc..b3f6a0aac 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h index 171ff1503..cc798707e 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c index dca4ec1e4..d247c92e0 100644 --- a/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/port.c b/portable/GCC/ARM_CM35P/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/GCC/ARM_CM35P/non_secure/port.c +++ b/portable/GCC/ARM_CM35P/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portasm.c b/portable/GCC/ARM_CM35P/non_secure/portasm.c index 54de64d36..7431c98f1 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portasm.c +++ b/portable/GCC/ARM_CM35P/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portasm.h b/portable/GCC/ARM_CM35P/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portasm.h +++ b/portable/GCC/ARM_CM35P/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portmacro.h b/portable/GCC/ARM_CM35P/non_secure/portmacro.h index 091c33c73..557b542eb 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM35P/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_context.c b/portable/GCC/ARM_CM35P/secure/secure_context.c index e02585e68..e37dd9672 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_context.c +++ b/portable/GCC/ARM_CM35P/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_context.h b/portable/GCC/ARM_CM35P/secure/secure_context.h index 872f4767c..2220ea646 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_context.h +++ b/portable/GCC/ARM_CM35P/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_context_port.c b/portable/GCC/ARM_CM35P/secure/secure_context_port.c index 541cd1c2d..d70822c06 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM35P/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_heap.c b/portable/GCC/ARM_CM35P/secure/secure_heap.c index 0a452b6a0..19f7c2354 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_heap.c +++ b/portable/GCC/ARM_CM35P/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_heap.h b/portable/GCC/ARM_CM35P/secure/secure_heap.h index b95ab4214..75c9cb00b 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_heap.h +++ b/portable/GCC/ARM_CM35P/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_init.c b/portable/GCC/ARM_CM35P/secure/secure_init.c index 419b91e62..f93bfce95 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_init.c +++ b/portable/GCC/ARM_CM35P/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_init.h b/portable/GCC/ARM_CM35P/secure/secure_init.h index 6017dc15a..e6c9da0b4 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_init.h +++ b/portable/GCC/ARM_CM35P/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P/secure/secure_port_macros.h b/portable/GCC/ARM_CM35P/secure/secure_port_macros.h index 335f24fbc..d7ac5833c 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM35P/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c index dca4ec1e4..d247c92e0 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c index 9d5ff50fc..b3f6a0aac 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h index 091c33c73..557b542eb 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c index 33e2a8670..7aa81666d 100644 --- a/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index 7131be066..f99acf5e1 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h index e20c19ecd..170a58c77 100644 --- a/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4F/port.c b/portable/GCC/ARM_CM4F/port.c index a456b0064..73430b5bf 100755 --- a/portable/GCC/ARM_CM4F/port.c +++ b/portable/GCC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4F/portmacro.h b/portable/GCC/ARM_CM4F/portmacro.h index 411fb6cc2..ec9cfc99f 100644 --- a/portable/GCC/ARM_CM4F/portmacro.h +++ b/portable/GCC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c index 33e2a8670..7aa81666d 100644 --- a/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index bc058276d..575c5accb 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h index ef7bffebe..e76c68712 100644 --- a/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c index dca4ec1e4..d247c92e0 100644 --- a/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/port.c b/portable/GCC/ARM_CM55/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/GCC/ARM_CM55/non_secure/port.c +++ b/portable/GCC/ARM_CM55/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portasm.c b/portable/GCC/ARM_CM55/non_secure/portasm.c index 54de64d36..7431c98f1 100644 --- a/portable/GCC/ARM_CM55/non_secure/portasm.c +++ b/portable/GCC/ARM_CM55/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portasm.h b/portable/GCC/ARM_CM55/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/GCC/ARM_CM55/non_secure/portasm.h +++ b/portable/GCC/ARM_CM55/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portmacro.h b/portable/GCC/ARM_CM55/non_secure/portmacro.h index 16c6dc7c2..880205cb1 100644 --- a/portable/GCC/ARM_CM55/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM55/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_context.c b/portable/GCC/ARM_CM55/secure/secure_context.c index e02585e68..e37dd9672 100644 --- a/portable/GCC/ARM_CM55/secure/secure_context.c +++ b/portable/GCC/ARM_CM55/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_context.h b/portable/GCC/ARM_CM55/secure/secure_context.h index 872f4767c..2220ea646 100644 --- a/portable/GCC/ARM_CM55/secure/secure_context.h +++ b/portable/GCC/ARM_CM55/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_context_port.c b/portable/GCC/ARM_CM55/secure/secure_context_port.c index 541cd1c2d..d70822c06 100644 --- a/portable/GCC/ARM_CM55/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM55/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_heap.c b/portable/GCC/ARM_CM55/secure/secure_heap.c index 0a452b6a0..19f7c2354 100644 --- a/portable/GCC/ARM_CM55/secure/secure_heap.c +++ b/portable/GCC/ARM_CM55/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_heap.h b/portable/GCC/ARM_CM55/secure/secure_heap.h index b95ab4214..75c9cb00b 100644 --- a/portable/GCC/ARM_CM55/secure/secure_heap.h +++ b/portable/GCC/ARM_CM55/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_init.c b/portable/GCC/ARM_CM55/secure/secure_init.c index 419b91e62..f93bfce95 100644 --- a/portable/GCC/ARM_CM55/secure/secure_init.c +++ b/portable/GCC/ARM_CM55/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_init.h b/portable/GCC/ARM_CM55/secure/secure_init.h index 6017dc15a..e6c9da0b4 100644 --- a/portable/GCC/ARM_CM55/secure/secure_init.h +++ b/portable/GCC/ARM_CM55/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55/secure/secure_port_macros.h b/portable/GCC/ARM_CM55/secure/secure_port_macros.h index 335f24fbc..d7ac5833c 100644 --- a/portable/GCC/ARM_CM55/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM55/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c index dca4ec1e4..d247c92e0 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c index 9d5ff50fc..b3f6a0aac 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h index 16c6dc7c2..880205cb1 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM7/r0p1/port.c b/portable/GCC/ARM_CM7/r0p1/port.c index 7bb959da0..afd4baa8e 100755 --- a/portable/GCC/ARM_CM7/r0p1/port.c +++ b/portable/GCC/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM7/r0p1/portmacro.h b/portable/GCC/ARM_CM7/r0p1/portmacro.h index f5c9cf835..8f08bd072 100644 --- a/portable/GCC/ARM_CM7/r0p1/portmacro.h +++ b/portable/GCC/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c index dca4ec1e4..d247c92e0 100644 --- a/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/port.c b/portable/GCC/ARM_CM85/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/GCC/ARM_CM85/non_secure/port.c +++ b/portable/GCC/ARM_CM85/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portasm.c b/portable/GCC/ARM_CM85/non_secure/portasm.c index 54de64d36..7431c98f1 100644 --- a/portable/GCC/ARM_CM85/non_secure/portasm.c +++ b/portable/GCC/ARM_CM85/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portasm.h b/portable/GCC/ARM_CM85/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/GCC/ARM_CM85/non_secure/portasm.h +++ b/portable/GCC/ARM_CM85/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portmacro.h b/portable/GCC/ARM_CM85/non_secure/portmacro.h index 4e8ad06d4..f606f817d 100644 --- a/portable/GCC/ARM_CM85/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM85/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_context.c b/portable/GCC/ARM_CM85/secure/secure_context.c index e02585e68..e37dd9672 100644 --- a/portable/GCC/ARM_CM85/secure/secure_context.c +++ b/portable/GCC/ARM_CM85/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_context.h b/portable/GCC/ARM_CM85/secure/secure_context.h index 872f4767c..2220ea646 100644 --- a/portable/GCC/ARM_CM85/secure/secure_context.h +++ b/portable/GCC/ARM_CM85/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_context_port.c b/portable/GCC/ARM_CM85/secure/secure_context_port.c index 541cd1c2d..d70822c06 100644 --- a/portable/GCC/ARM_CM85/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM85/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_heap.c b/portable/GCC/ARM_CM85/secure/secure_heap.c index 0a452b6a0..19f7c2354 100644 --- a/portable/GCC/ARM_CM85/secure/secure_heap.c +++ b/portable/GCC/ARM_CM85/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_heap.h b/portable/GCC/ARM_CM85/secure/secure_heap.h index b95ab4214..75c9cb00b 100644 --- a/portable/GCC/ARM_CM85/secure/secure_heap.h +++ b/portable/GCC/ARM_CM85/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_init.c b/portable/GCC/ARM_CM85/secure/secure_init.c index 419b91e62..f93bfce95 100644 --- a/portable/GCC/ARM_CM85/secure/secure_init.c +++ b/portable/GCC/ARM_CM85/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_init.h b/portable/GCC/ARM_CM85/secure/secure_init.h index 6017dc15a..e6c9da0b4 100644 --- a/portable/GCC/ARM_CM85/secure/secure_init.h +++ b/portable/GCC/ARM_CM85/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85/secure/secure_port_macros.h b/portable/GCC/ARM_CM85/secure/secure_port_macros.h index 335f24fbc..d7ac5833c 100644 --- a/portable/GCC/ARM_CM85/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM85/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c b/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c index dca4ec1e4..d247c92e0 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c index 9d5ff50fc..b3f6a0aac 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h index 4e8ad06d4..f606f817d 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CR5/port.c b/portable/GCC/ARM_CR5/port.c index e9242cd28..e675bdf4d 100644 --- a/portable/GCC/ARM_CR5/port.c +++ b/portable/GCC/ARM_CR5/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CR5/portASM.S b/portable/GCC/ARM_CR5/portASM.S index 12e85689d..debc22f11 100644 --- a/portable/GCC/ARM_CR5/portASM.S +++ b/portable/GCC/ARM_CR5/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CR5/portmacro.h b/portable/GCC/ARM_CR5/portmacro.h index 6095fda71..374e11d5a 100644 --- a/portable/GCC/ARM_CR5/portmacro.h +++ b/portable/GCC/ARM_CR5/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CRx_No_GIC/port.c b/portable/GCC/ARM_CRx_No_GIC/port.c index c36bbbcf5..75d0bf710 100644 --- a/portable/GCC/ARM_CRx_No_GIC/port.c +++ b/portable/GCC/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CRx_No_GIC/portASM.S b/portable/GCC/ARM_CRx_No_GIC/portASM.S index f3f46b00b..e837af53d 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portASM.S +++ b/portable/GCC/ARM_CRx_No_GIC/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ARM_CRx_No_GIC/portmacro.h b/portable/GCC/ARM_CRx_No_GIC/portmacro.h index fc7721154..f0f7cb5b2 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portmacro.h +++ b/portable/GCC/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ATMega323/port.c b/portable/GCC/ATMega323/port.c index ed3ace5d7..c2b242520 100644 --- a/portable/GCC/ATMega323/port.c +++ b/portable/GCC/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ATMega323/portmacro.h b/portable/GCC/ATMega323/portmacro.h index 2c8af1471..78d2b6020 100644 --- a/portable/GCC/ATMega323/portmacro.h +++ b/portable/GCC/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/AVR32_UC3/exception.S b/portable/GCC/AVR32_UC3/exception.S index d32cea7c2..df99bac08 100644 --- a/portable/GCC/AVR32_UC3/exception.S +++ b/portable/GCC/AVR32_UC3/exception.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/GCC/AVR32_UC3/port.c b/portable/GCC/AVR32_UC3/port.c index e39491d2d..c0533c3b1 100644 --- a/portable/GCC/AVR32_UC3/port.c +++ b/portable/GCC/AVR32_UC3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/GCC/AVR32_UC3/portmacro.h b/portable/GCC/AVR32_UC3/portmacro.h index 6394f640d..9f07d6291 100644 --- a/portable/GCC/AVR32_UC3/portmacro.h +++ b/portable/GCC/AVR32_UC3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/GCC/CORTUS_APS3/port.c b/portable/GCC/CORTUS_APS3/port.c index 115659d0e..e1687b743 100644 --- a/portable/GCC/CORTUS_APS3/port.c +++ b/portable/GCC/CORTUS_APS3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/CORTUS_APS3/portmacro.h b/portable/GCC/CORTUS_APS3/portmacro.h index 6db48de46..4ed01c896 100644 --- a/portable/GCC/CORTUS_APS3/portmacro.h +++ b/portable/GCC/CORTUS_APS3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ColdFire_V2/port.c b/portable/GCC/ColdFire_V2/port.c index 7c77f6128..04afbc173 100644 --- a/portable/GCC/ColdFire_V2/port.c +++ b/portable/GCC/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ColdFire_V2/portasm.S b/portable/GCC/ColdFire_V2/portasm.S index f7cf7b5ea..67c548790 100644 --- a/portable/GCC/ColdFire_V2/portasm.S +++ b/portable/GCC/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/ColdFire_V2/portmacro.h b/portable/GCC/ColdFire_V2/portmacro.h index 66ced0902..9fb44ccc3 100644 --- a/portable/GCC/ColdFire_V2/portmacro.h +++ b/portable/GCC/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/H8S2329/port.c b/portable/GCC/H8S2329/port.c index e2097611a..c897f1263 100644 --- a/portable/GCC/H8S2329/port.c +++ b/portable/GCC/H8S2329/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/H8S2329/portmacro.h b/portable/GCC/H8S2329/portmacro.h index 808232740..035265587 100644 --- a/portable/GCC/H8S2329/portmacro.h +++ b/portable/GCC/H8S2329/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/HCS12/port.c b/portable/GCC/HCS12/port.c index 2af4ba5ed..7b47eb36d 100644 --- a/portable/GCC/HCS12/port.c +++ b/portable/GCC/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/HCS12/portmacro.h b/portable/GCC/HCS12/portmacro.h index a3b29f530..a732f4cda 100644 --- a/portable/GCC/HCS12/portmacro.h +++ b/portable/GCC/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/ISR_Support.h b/portable/GCC/IA32_flat/ISR_Support.h index b6b61626d..76e2e5513 100644 --- a/portable/GCC/IA32_flat/ISR_Support.h +++ b/portable/GCC/IA32_flat/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/port.c b/portable/GCC/IA32_flat/port.c index 8deb5e7ac..8ecb60efc 100644 --- a/portable/GCC/IA32_flat/port.c +++ b/portable/GCC/IA32_flat/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/portASM.S b/portable/GCC/IA32_flat/portASM.S index 09af0e55f..8bf03db3f 100644 --- a/portable/GCC/IA32_flat/portASM.S +++ b/portable/GCC/IA32_flat/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/IA32_flat/portmacro.h b/portable/GCC/IA32_flat/portmacro.h index 85c727efd..823d96a28 100644 --- a/portable/GCC/IA32_flat/portmacro.h +++ b/portable/GCC/IA32_flat/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MSP430F449/port.c b/portable/GCC/MSP430F449/port.c index 41a4790f6..d9d31915f 100644 --- a/portable/GCC/MSP430F449/port.c +++ b/portable/GCC/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MSP430F449/portmacro.h b/portable/GCC/MSP430F449/portmacro.h index 71686df18..29fa5318e 100644 --- a/portable/GCC/MSP430F449/portmacro.h +++ b/portable/GCC/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlaze/port.c b/portable/GCC/MicroBlaze/port.c index 256990813..ac1b84390 100644 --- a/portable/GCC/MicroBlaze/port.c +++ b/portable/GCC/MicroBlaze/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlaze/portasm.s b/portable/GCC/MicroBlaze/portasm.s index 62cfd7082..1ae0ef751 100644 --- a/portable/GCC/MicroBlaze/portasm.s +++ b/portable/GCC/MicroBlaze/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlaze/portmacro.h b/portable/GCC/MicroBlaze/portmacro.h index 8e3b1ef5d..d741b16f7 100644 --- a/portable/GCC/MicroBlaze/portmacro.h +++ b/portable/GCC/MicroBlaze/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/port.c b/portable/GCC/MicroBlazeV8/port.c index d542c3010..a542675c0 100644 --- a/portable/GCC/MicroBlazeV8/port.c +++ b/portable/GCC/MicroBlazeV8/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/port_exceptions.c b/portable/GCC/MicroBlazeV8/port_exceptions.c index 975397ca6..2c6221dc5 100644 --- a/portable/GCC/MicroBlazeV8/port_exceptions.c +++ b/portable/GCC/MicroBlazeV8/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/portasm.S b/portable/GCC/MicroBlazeV8/portasm.S index 45feb40ec..47fb86955 100644 --- a/portable/GCC/MicroBlazeV8/portasm.S +++ b/portable/GCC/MicroBlazeV8/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV8/portmacro.h b/portable/GCC/MicroBlazeV8/portmacro.h index d4fdbd76a..728731265 100644 --- a/portable/GCC/MicroBlazeV8/portmacro.h +++ b/portable/GCC/MicroBlazeV8/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/port.c b/portable/GCC/MicroBlazeV9/port.c index d50b1655c..e0b6e91dc 100644 --- a/portable/GCC/MicroBlazeV9/port.c +++ b/portable/GCC/MicroBlazeV9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/port_exceptions.c b/portable/GCC/MicroBlazeV9/port_exceptions.c index 975397ca6..2c6221dc5 100644 --- a/portable/GCC/MicroBlazeV9/port_exceptions.c +++ b/portable/GCC/MicroBlazeV9/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/portasm.S b/portable/GCC/MicroBlazeV9/portasm.S index 35dea4d97..24b7743cf 100644 --- a/portable/GCC/MicroBlazeV9/portasm.S +++ b/portable/GCC/MicroBlazeV9/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/MicroBlazeV9/portmacro.h b/portable/GCC/MicroBlazeV9/portmacro.h index e2d56f028..684ae49b4 100644 --- a/portable/GCC/MicroBlazeV9/portmacro.h +++ b/portable/GCC/MicroBlazeV9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/NiosII/port.c b/portable/GCC/NiosII/port.c index cc01bd590..8ecf1d23e 100644 --- a/portable/GCC/NiosII/port.c +++ b/portable/GCC/NiosII/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/NiosII/port_asm.S b/portable/GCC/NiosII/port_asm.S index 6af89842c..23bb73f24 100644 --- a/portable/GCC/NiosII/port_asm.S +++ b/portable/GCC/NiosII/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/NiosII/portmacro.h b/portable/GCC/NiosII/portmacro.h index f156e8a63..c20698e41 100644 --- a/portable/GCC/NiosII/portmacro.h +++ b/portable/GCC/NiosII/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/FPU_Macros.h b/portable/GCC/PPC405_Xilinx/FPU_Macros.h index 8016ffea5..153892add 100644 --- a/portable/GCC/PPC405_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC405_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/port.c b/portable/GCC/PPC405_Xilinx/port.c index e5c214a01..cba0f916b 100644 --- a/portable/GCC/PPC405_Xilinx/port.c +++ b/portable/GCC/PPC405_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/portasm.S b/portable/GCC/PPC405_Xilinx/portasm.S index 9e0e2f274..26dcc5622 100644 --- a/portable/GCC/PPC405_Xilinx/portasm.S +++ b/portable/GCC/PPC405_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC405_Xilinx/portmacro.h b/portable/GCC/PPC405_Xilinx/portmacro.h index 6c968e389..0c119cbc5 100644 --- a/portable/GCC/PPC405_Xilinx/portmacro.h +++ b/portable/GCC/PPC405_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/FPU_Macros.h b/portable/GCC/PPC440_Xilinx/FPU_Macros.h index 8016ffea5..153892add 100644 --- a/portable/GCC/PPC440_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC440_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/port.c b/portable/GCC/PPC440_Xilinx/port.c index 357e761c1..6201d6738 100644 --- a/portable/GCC/PPC440_Xilinx/port.c +++ b/portable/GCC/PPC440_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/portasm.S b/portable/GCC/PPC440_Xilinx/portasm.S index 9e0e2f274..26dcc5622 100644 --- a/portable/GCC/PPC440_Xilinx/portasm.S +++ b/portable/GCC/PPC440_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/PPC440_Xilinx/portmacro.h b/portable/GCC/PPC440_Xilinx/portmacro.h index 6c968e389..0c119cbc5 100644 --- a/portable/GCC/PPC440_Xilinx/portmacro.h +++ b/portable/GCC/PPC440_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h index 2eb743f0b..3a2629906 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index b52b47565..322e263f4 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h index c8616fa63..c47b5923d 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index c35c9168f..9d905487c 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/port.c b/portable/GCC/RISC-V/port.c index fbfba405b..caec66972 100644 --- a/portable/GCC/RISC-V/port.c +++ b/portable/GCC/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/portASM.S b/portable/GCC/RISC-V/portASM.S index 3b5e3b08e..150e91633 100644 --- a/portable/GCC/RISC-V/portASM.S +++ b/portable/GCC/RISC-V/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/portContext.h b/portable/GCC/RISC-V/portContext.h index 851342337..8e855796a 100644 --- a/portable/GCC/RISC-V/portContext.h +++ b/portable/GCC/RISC-V/portContext.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RISC-V/portmacro.h b/portable/GCC/RISC-V/portmacro.h index 8f0a8f64f..163b72334 100644 --- a/portable/GCC/RISC-V/portmacro.h +++ b/portable/GCC/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/isr_support.h b/portable/GCC/RL78/isr_support.h index 29163a4d8..61e3502a9 100644 --- a/portable/GCC/RL78/isr_support.h +++ b/portable/GCC/RL78/isr_support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/port.c b/portable/GCC/RL78/port.c index 601e3aad9..5ad8394d7 100644 --- a/portable/GCC/RL78/port.c +++ b/portable/GCC/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/portasm.S b/portable/GCC/RL78/portasm.S index ddf890d3e..49ff24a75 100644 --- a/portable/GCC/RL78/portasm.S +++ b/portable/GCC/RL78/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RL78/portmacro.h b/portable/GCC/RL78/portmacro.h index 61b00c4dd..6e59572a4 100644 --- a/portable/GCC/RL78/portmacro.h +++ b/portable/GCC/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX100/port.c b/portable/GCC/RX100/port.c index 48887147e..f7ef152c4 100644 --- a/portable/GCC/RX100/port.c +++ b/portable/GCC/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX100/portmacro.h b/portable/GCC/RX100/portmacro.h index f0ddd4738..eab1f353e 100644 --- a/portable/GCC/RX100/portmacro.h +++ b/portable/GCC/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX200/port.c b/portable/GCC/RX200/port.c index 60f3c3ae2..d41ee89b0 100644 --- a/portable/GCC/RX200/port.c +++ b/portable/GCC/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX200/portmacro.h b/portable/GCC/RX200/portmacro.h index c32c979ed..726882ac8 100644 --- a/portable/GCC/RX200/portmacro.h +++ b/portable/GCC/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600/port.c b/portable/GCC/RX600/port.c index ceb63c48a..a0c85cdb1 100644 --- a/portable/GCC/RX600/port.c +++ b/portable/GCC/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600/portmacro.h b/portable/GCC/RX600/portmacro.h index 9f93f15a1..344afea1e 100644 --- a/portable/GCC/RX600/portmacro.h +++ b/portable/GCC/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600v2/port.c b/portable/GCC/RX600v2/port.c index f9d83bfd4..c6a00d2a0 100644 --- a/portable/GCC/RX600v2/port.c +++ b/portable/GCC/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX600v2/portmacro.h b/portable/GCC/RX600v2/portmacro.h index 9f93f15a1..344afea1e 100644 --- a/portable/GCC/RX600v2/portmacro.h +++ b/portable/GCC/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX700v3_DPFPU/port.c b/portable/GCC/RX700v3_DPFPU/port.c index a7fa28d95..2f47d3017 100644 --- a/portable/GCC/RX700v3_DPFPU/port.c +++ b/portable/GCC/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/RX700v3_DPFPU/portmacro.h b/portable/GCC/RX700v3_DPFPU/portmacro.h index ec912cca2..5b17ccfcb 100644 --- a/portable/GCC/RX700v3_DPFPU/portmacro.h +++ b/portable/GCC/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/STR75x/port.c b/portable/GCC/STR75x/port.c index 8dc092d29..781c8e2de 100644 --- a/portable/GCC/STR75x/port.c +++ b/portable/GCC/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/STR75x/portISR.c b/portable/GCC/STR75x/portISR.c index 9f2a8c236..016cfc603 100644 --- a/portable/GCC/STR75x/portISR.c +++ b/portable/GCC/STR75x/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/STR75x/portmacro.h b/portable/GCC/STR75x/portmacro.h index 420f84648..91b4daa79 100644 --- a/portable/GCC/STR75x/portmacro.h +++ b/portable/GCC/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/TriCore_1782/port.c b/portable/GCC/TriCore_1782/port.c index 7140bbee1..8675fdefa 100644 --- a/portable/GCC/TriCore_1782/port.c +++ b/portable/GCC/TriCore_1782/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/TriCore_1782/portmacro.h b/portable/GCC/TriCore_1782/portmacro.h index e758143d3..9dc74a6c8 100644 --- a/portable/GCC/TriCore_1782/portmacro.h +++ b/portable/GCC/TriCore_1782/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/GCC/TriCore_1782/porttrap.c b/portable/GCC/TriCore_1782/porttrap.c index 9258cf60b..a3acb88d5 100644 --- a/portable/GCC/TriCore_1782/porttrap.c +++ b/portable/GCC/TriCore_1782/porttrap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/ISR_Support.h b/portable/IAR/78K0R/ISR_Support.h index b3c399174..abee1e6e0 100644 --- a/portable/IAR/78K0R/ISR_Support.h +++ b/portable/IAR/78K0R/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/port.c b/portable/IAR/78K0R/port.c index b71d7dad5..1d8bb9d17 100644 --- a/portable/IAR/78K0R/port.c +++ b/portable/IAR/78K0R/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/portasm.s26 b/portable/IAR/78K0R/portasm.s26 index 60b09e2f2..69a4501d4 100644 --- a/portable/IAR/78K0R/portasm.s26 +++ b/portable/IAR/78K0R/portasm.s26 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/78K0R/portmacro.h b/portable/IAR/78K0R/portmacro.h index 48a5f6ffa..23e1856c1 100644 --- a/portable/IAR/78K0R/portmacro.h +++ b/portable/IAR/78K0R/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/port.c b/portable/IAR/ARM_CA5_No_GIC/port.c index 0beeeed16..bd4d324d0 100644 --- a/portable/IAR/ARM_CA5_No_GIC/port.c +++ b/portable/IAR/ARM_CA5_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.h b/portable/IAR/ARM_CA5_No_GIC/portASM.h index c400b113a..dc299e727 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.h +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.s b/portable/IAR/ARM_CA5_No_GIC/portASM.s index 4db7b8d73..8c3aa9f0e 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.s +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA5_No_GIC/portmacro.h b/portable/IAR/ARM_CA5_No_GIC/portmacro.h index 7ecb41374..5695b6040 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CA5_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/port.c b/portable/IAR/ARM_CA9/port.c index 493f9df8b..b9126a92f 100644 --- a/portable/IAR/ARM_CA9/port.c +++ b/portable/IAR/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/portASM.h b/portable/IAR/ARM_CA9/portASM.h index 9e706604a..31229b76e 100644 --- a/portable/IAR/ARM_CA9/portASM.h +++ b/portable/IAR/ARM_CA9/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/portASM.s b/portable/IAR/ARM_CA9/portASM.s index 50500f6cb..e9c87c6be 100644 --- a/portable/IAR/ARM_CA9/portASM.s +++ b/portable/IAR/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CA9/portmacro.h b/portable/IAR/ARM_CA9/portmacro.h index 8fbe9374d..244fd41d6 100644 --- a/portable/IAR/ARM_CA9/portmacro.h +++ b/portable/IAR/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM0/port.c b/portable/IAR/ARM_CM0/port.c index b5f374ccf..b9999a028 100644 --- a/portable/IAR/ARM_CM0/port.c +++ b/portable/IAR/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM0/portasm.s b/portable/IAR/ARM_CM0/portasm.s index c6407bee1..8b5caf299 100644 --- a/portable/IAR/ARM_CM0/portasm.s +++ b/portable/IAR/ARM_CM0/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM0/portmacro.h b/portable/IAR/ARM_CM0/portmacro.h index 60412021d..e0ccf6bc4 100644 --- a/portable/IAR/ARM_CM0/portmacro.h +++ b/portable/IAR/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S index 2ffb37043..4d805f3e2 100644 --- a/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.h b/portable/IAR/ARM_CM23/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.s b/portable/IAR/ARM_CM23/non_secure/portasm.s index 16a874393..3c1788998 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portmacro.h b/portable/IAR/ARM_CM23/non_secure/portmacro.h index af894a78d..19d7556fb 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c index e02585e68..e37dd9672 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/portable/IAR/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_context.h b/portable/IAR/ARM_CM23/secure/secure_context.h index 872f4767c..2220ea646 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.h +++ b/portable/IAR/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s index afa0bf5d1..1e4b3a57a 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.c b/portable/IAR/ARM_CM23/secure/secure_heap.c index 0a452b6a0..19f7c2354 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.c +++ b/portable/IAR/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.h b/portable/IAR/ARM_CM23/secure/secure_heap.h index b95ab4214..75c9cb00b 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.h +++ b/portable/IAR/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_init.c b/portable/IAR/ARM_CM23/secure/secure_init.c index 419b91e62..f93bfce95 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.c +++ b/portable/IAR/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_init.h b/portable/IAR/ARM_CM23/secure/secure_init.h index 6017dc15a..e6c9da0b4 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.h +++ b/portable/IAR/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23/secure/secure_port_macros.h b/portable/IAR/ARM_CM23/secure/secure_port_macros.h index 335f24fbc..d7ac5833c 100644 --- a/portable/IAR/ARM_CM23/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S index 2ffb37043..4d805f3e2 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s index 082e14f3f..cef6b8a66 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h index af894a78d..19d7556fb 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM3/port.c b/portable/IAR/ARM_CM3/port.c index e41ddc57a..10ce8632a 100755 --- a/portable/IAR/ARM_CM3/port.c +++ b/portable/IAR/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM3/portasm.s b/portable/IAR/ARM_CM3/portasm.s index 614e44380..dfaabc3b3 100644 --- a/portable/IAR/ARM_CM3/portasm.s +++ b/portable/IAR/ARM_CM3/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM3/portmacro.h b/portable/IAR/ARM_CM3/portmacro.h index 31d09bc73..3e67345b1 100644 --- a/portable/IAR/ARM_CM3/portmacro.h +++ b/portable/IAR/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S index 9ce253f73..ef180bd91 100644 --- a/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.h b/portable/IAR/ARM_CM33/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.s b/portable/IAR/ARM_CM33/non_secure/portasm.s index 372cc19bf..530910341 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portmacro.h b/portable/IAR/ARM_CM33/non_secure/portmacro.h index b78f957d3..5afc234c1 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c index e02585e68..e37dd9672 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/portable/IAR/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_context.h b/portable/IAR/ARM_CM33/secure/secure_context.h index 872f4767c..2220ea646 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.h +++ b/portable/IAR/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s index 620dfc3fc..0da3e0f12 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.c b/portable/IAR/ARM_CM33/secure/secure_heap.c index 0a452b6a0..19f7c2354 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.c +++ b/portable/IAR/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.h b/portable/IAR/ARM_CM33/secure/secure_heap.h index b95ab4214..75c9cb00b 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.h +++ b/portable/IAR/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_init.c b/portable/IAR/ARM_CM33/secure/secure_init.c index 419b91e62..f93bfce95 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.c +++ b/portable/IAR/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_init.h b/portable/IAR/ARM_CM33/secure/secure_init.h index 6017dc15a..e6c9da0b4 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.h +++ b/portable/IAR/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33/secure/secure_port_macros.h b/portable/IAR/ARM_CM33/secure/secure_port_macros.h index 335f24fbc..d7ac5833c 100644 --- a/portable/IAR/ARM_CM33/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S index 9ce253f73..ef180bd91 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s index afb416a8e..00ee5a5cb 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h index b7c487cd2..84e86d9f9 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S index 9ce253f73..ef180bd91 100644 --- a/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/port.c b/portable/IAR/ARM_CM35P/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/IAR/ARM_CM35P/non_secure/port.c +++ b/portable/IAR/ARM_CM35P/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portasm.h b/portable/IAR/ARM_CM35P/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portasm.h +++ b/portable/IAR/ARM_CM35P/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portasm.s b/portable/IAR/ARM_CM35P/non_secure/portasm.s index 372cc19bf..530910341 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portasm.s +++ b/portable/IAR/ARM_CM35P/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portmacro.h b/portable/IAR/ARM_CM35P/non_secure/portmacro.h index 05ac91399..247468478 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM35P/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_context.c b/portable/IAR/ARM_CM35P/secure/secure_context.c index e02585e68..e37dd9672 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_context.c +++ b/portable/IAR/ARM_CM35P/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_context.h b/portable/IAR/ARM_CM35P/secure/secure_context.h index 872f4767c..2220ea646 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_context.h +++ b/portable/IAR/ARM_CM35P/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s index 620dfc3fc..0da3e0f12 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM35P/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_heap.c b/portable/IAR/ARM_CM35P/secure/secure_heap.c index 0a452b6a0..19f7c2354 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_heap.c +++ b/portable/IAR/ARM_CM35P/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_heap.h b/portable/IAR/ARM_CM35P/secure/secure_heap.h index b95ab4214..75c9cb00b 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_heap.h +++ b/portable/IAR/ARM_CM35P/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_init.c b/portable/IAR/ARM_CM35P/secure/secure_init.c index 419b91e62..f93bfce95 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_init.c +++ b/portable/IAR/ARM_CM35P/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_init.h b/portable/IAR/ARM_CM35P/secure/secure_init.h index 6017dc15a..e6c9da0b4 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_init.h +++ b/portable/IAR/ARM_CM35P/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P/secure/secure_port_macros.h b/portable/IAR/ARM_CM35P/secure/secure_port_macros.h index 335f24fbc..d7ac5833c 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM35P/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S index 9ce253f73..ef180bd91 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s index afb416a8e..00ee5a5cb 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h index 05ac91399..247468478 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F/port.c b/portable/IAR/ARM_CM4F/port.c index 24700e279..692400b2a 100755 --- a/portable/IAR/ARM_CM4F/port.c +++ b/portable/IAR/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F/portasm.s b/portable/IAR/ARM_CM4F/portasm.s index a4fe34e3d..89b72b259 100644 --- a/portable/IAR/ARM_CM4F/portasm.s +++ b/portable/IAR/ARM_CM4F/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F/portmacro.h b/portable/IAR/ARM_CM4F/portmacro.h index 36f49f7fd..92cb7c770 100644 --- a/portable/IAR/ARM_CM4F/portmacro.h +++ b/portable/IAR/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S index 67cea9cc0..276a1cf00 100644 --- a/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index 990cf220b..518dfbccd 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/portasm.s b/portable/IAR/ARM_CM4F_MPU/portasm.s index f7ff75afa..0da9a4f97 100644 --- a/portable/IAR/ARM_CM4F_MPU/portasm.s +++ b/portable/IAR/ARM_CM4F_MPU/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h index cdb74085f..cae9bcc73 100644 --- a/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S index 9ce253f73..ef180bd91 100644 --- a/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/port.c b/portable/IAR/ARM_CM55/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/IAR/ARM_CM55/non_secure/port.c +++ b/portable/IAR/ARM_CM55/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portasm.h b/portable/IAR/ARM_CM55/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/IAR/ARM_CM55/non_secure/portasm.h +++ b/portable/IAR/ARM_CM55/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portasm.s b/portable/IAR/ARM_CM55/non_secure/portasm.s index 372cc19bf..530910341 100644 --- a/portable/IAR/ARM_CM55/non_secure/portasm.s +++ b/portable/IAR/ARM_CM55/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portmacro.h b/portable/IAR/ARM_CM55/non_secure/portmacro.h index 7e7d6450b..d8d08f155 100644 --- a/portable/IAR/ARM_CM55/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM55/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_context.c b/portable/IAR/ARM_CM55/secure/secure_context.c index e02585e68..e37dd9672 100644 --- a/portable/IAR/ARM_CM55/secure/secure_context.c +++ b/portable/IAR/ARM_CM55/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_context.h b/portable/IAR/ARM_CM55/secure/secure_context.h index 872f4767c..2220ea646 100644 --- a/portable/IAR/ARM_CM55/secure/secure_context.h +++ b/portable/IAR/ARM_CM55/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s index 620dfc3fc..0da3e0f12 100644 --- a/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM55/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_heap.c b/portable/IAR/ARM_CM55/secure/secure_heap.c index 0a452b6a0..19f7c2354 100644 --- a/portable/IAR/ARM_CM55/secure/secure_heap.c +++ b/portable/IAR/ARM_CM55/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_heap.h b/portable/IAR/ARM_CM55/secure/secure_heap.h index b95ab4214..75c9cb00b 100644 --- a/portable/IAR/ARM_CM55/secure/secure_heap.h +++ b/portable/IAR/ARM_CM55/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_init.c b/portable/IAR/ARM_CM55/secure/secure_init.c index 419b91e62..f93bfce95 100644 --- a/portable/IAR/ARM_CM55/secure/secure_init.c +++ b/portable/IAR/ARM_CM55/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_init.h b/portable/IAR/ARM_CM55/secure/secure_init.h index 6017dc15a..e6c9da0b4 100644 --- a/portable/IAR/ARM_CM55/secure/secure_init.h +++ b/portable/IAR/ARM_CM55/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55/secure/secure_port_macros.h b/portable/IAR/ARM_CM55/secure/secure_port_macros.h index 335f24fbc..d7ac5833c 100644 --- a/portable/IAR/ARM_CM55/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM55/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S index 9ce253f73..ef180bd91 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s index afb416a8e..00ee5a5cb 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h index 7e7d6450b..d8d08f155 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM7/r0p1/port.c b/portable/IAR/ARM_CM7/r0p1/port.c index 25376d24e..a04532b07 100755 --- a/portable/IAR/ARM_CM7/r0p1/port.c +++ b/portable/IAR/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM7/r0p1/portasm.s b/portable/IAR/ARM_CM7/r0p1/portasm.s index 3303067e2..19cc6cdc3 100644 --- a/portable/IAR/ARM_CM7/r0p1/portasm.s +++ b/portable/IAR/ARM_CM7/r0p1/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM7/r0p1/portmacro.h b/portable/IAR/ARM_CM7/r0p1/portmacro.h index 757b02c1e..f93146e8f 100644 --- a/portable/IAR/ARM_CM7/r0p1/portmacro.h +++ b/portable/IAR/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S index 9ce253f73..ef180bd91 100644 --- a/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/port.c b/portable/IAR/ARM_CM85/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/IAR/ARM_CM85/non_secure/port.c +++ b/portable/IAR/ARM_CM85/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portasm.h b/portable/IAR/ARM_CM85/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/IAR/ARM_CM85/non_secure/portasm.h +++ b/portable/IAR/ARM_CM85/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portasm.s b/portable/IAR/ARM_CM85/non_secure/portasm.s index 372cc19bf..530910341 100644 --- a/portable/IAR/ARM_CM85/non_secure/portasm.s +++ b/portable/IAR/ARM_CM85/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portmacro.h b/portable/IAR/ARM_CM85/non_secure/portmacro.h index d970c79fe..4f7cf2bc0 100644 --- a/portable/IAR/ARM_CM85/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM85/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_context.c b/portable/IAR/ARM_CM85/secure/secure_context.c index e02585e68..e37dd9672 100644 --- a/portable/IAR/ARM_CM85/secure/secure_context.c +++ b/portable/IAR/ARM_CM85/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_context.h b/portable/IAR/ARM_CM85/secure/secure_context.h index 872f4767c..2220ea646 100644 --- a/portable/IAR/ARM_CM85/secure/secure_context.h +++ b/portable/IAR/ARM_CM85/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s index 620dfc3fc..0da3e0f12 100644 --- a/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM85/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_heap.c b/portable/IAR/ARM_CM85/secure/secure_heap.c index 0a452b6a0..19f7c2354 100644 --- a/portable/IAR/ARM_CM85/secure/secure_heap.c +++ b/portable/IAR/ARM_CM85/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_heap.h b/portable/IAR/ARM_CM85/secure/secure_heap.h index b95ab4214..75c9cb00b 100644 --- a/portable/IAR/ARM_CM85/secure/secure_heap.h +++ b/portable/IAR/ARM_CM85/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_init.c b/portable/IAR/ARM_CM85/secure/secure_init.c index 419b91e62..f93bfce95 100644 --- a/portable/IAR/ARM_CM85/secure/secure_init.c +++ b/portable/IAR/ARM_CM85/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_init.h b/portable/IAR/ARM_CM85/secure/secure_init.h index 6017dc15a..e6c9da0b4 100644 --- a/portable/IAR/ARM_CM85/secure/secure_init.h +++ b/portable/IAR/ARM_CM85/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85/secure/secure_port_macros.h b/portable/IAR/ARM_CM85/secure/secure_port_macros.h index 335f24fbc..d7ac5833c 100644 --- a/portable/IAR/ARM_CM85/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM85/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S b/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S index 9ce253f73..ef180bd91 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c index f220a6d7e..9712ac353 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h index a75857fc2..f64ceb525 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s index afb416a8e..00ee5a5cb 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h index d970c79fe..4f7cf2bc0 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h index 816e34894..6f666da22 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CRx_No_GIC/port.c b/portable/IAR/ARM_CRx_No_GIC/port.c index 983bacb10..bd810aab3 100644 --- a/portable/IAR/ARM_CRx_No_GIC/port.c +++ b/portable/IAR/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CRx_No_GIC/portASM.s b/portable/IAR/ARM_CRx_No_GIC/portASM.s index 13c0c3170..bc9f112cb 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portASM.s +++ b/portable/IAR/ARM_CRx_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ARM_CRx_No_GIC/portmacro.h b/portable/IAR/ARM_CRx_No_GIC/portmacro.h index ba3532e5d..a7dce0f83 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ATMega323/port.c b/portable/IAR/ATMega323/port.c index cd8ec9e4a..0b93e5d85 100644 --- a/portable/IAR/ATMega323/port.c +++ b/portable/IAR/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ATMega323/portmacro.h b/portable/IAR/ATMega323/portmacro.h index 0138ab62c..2bbd50042 100644 --- a/portable/IAR/ATMega323/portmacro.h +++ b/portable/IAR/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/ATMega323/portmacro.s90 b/portable/IAR/ATMega323/portmacro.s90 index 772e82f12..631b9afe8 100644 --- a/portable/IAR/ATMega323/portmacro.s90 +++ b/portable/IAR/ATMega323/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR32_UC3/exception.s82 b/portable/IAR/AVR32_UC3/exception.s82 index 083931725..d884fae49 100644 --- a/portable/IAR/AVR32_UC3/exception.s82 +++ b/portable/IAR/AVR32_UC3/exception.s82 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/port.c b/portable/IAR/AVR32_UC3/port.c index 3d94c8f40..805d7ce71 100644 --- a/portable/IAR/AVR32_UC3/port.c +++ b/portable/IAR/AVR32_UC3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/portmacro.h b/portable/IAR/AVR32_UC3/portmacro.h index 0f9fa3a05..ad5b9d1a3 100644 --- a/portable/IAR/AVR32_UC3/portmacro.h +++ b/portable/IAR/AVR32_UC3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/read.c b/portable/IAR/AVR32_UC3/read.c index d2e6e07af..329382e6a 100644 --- a/portable/IAR/AVR32_UC3/read.c +++ b/portable/IAR/AVR32_UC3/read.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR32_UC3/write.c b/portable/IAR/AVR32_UC3/write.c index 3253fcc64..7ce7f2e03 100644 --- a/portable/IAR/AVR32_UC3/write.c +++ b/portable/IAR/AVR32_UC3/write.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT AND BSD-3-Clause diff --git a/portable/IAR/AVR_AVRDx/port.c b/portable/IAR/AVR_AVRDx/port.c index 20cfa7fc5..9baad85b6 100644 --- a/portable/IAR/AVR_AVRDx/port.c +++ b/portable/IAR/AVR_AVRDx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_AVRDx/porthardware.h b/portable/IAR/AVR_AVRDx/porthardware.h index 6cdb46a61..be222e2c2 100644 --- a/portable/IAR/AVR_AVRDx/porthardware.h +++ b/portable/IAR/AVR_AVRDx/porthardware.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_AVRDx/portmacro.h b/portable/IAR/AVR_AVRDx/portmacro.h index ad1763a80..404253bd5 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.h +++ b/portable/IAR/AVR_AVRDx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_AVRDx/portmacro.s90 b/portable/IAR/AVR_AVRDx/portmacro.s90 index baba7a6bd..5cf302ff4 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.s90 +++ b/portable/IAR/AVR_AVRDx/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/port.c b/portable/IAR/AVR_Mega0/port.c index 3acd46d5d..839f2a965 100644 --- a/portable/IAR/AVR_Mega0/port.c +++ b/portable/IAR/AVR_Mega0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/porthardware.h b/portable/IAR/AVR_Mega0/porthardware.h index cc46d70d0..4e39ad3e0 100644 --- a/portable/IAR/AVR_Mega0/porthardware.h +++ b/portable/IAR/AVR_Mega0/porthardware.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/portmacro.h b/portable/IAR/AVR_Mega0/portmacro.h index ad1763a80..404253bd5 100644 --- a/portable/IAR/AVR_Mega0/portmacro.h +++ b/portable/IAR/AVR_Mega0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AVR_Mega0/portmacro.s90 b/portable/IAR/AVR_Mega0/portmacro.s90 index f329d6ace..ed847773d 100644 --- a/portable/IAR/AVR_Mega0/portmacro.s90 +++ b/portable/IAR/AVR_Mega0/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/ISR_Support.h b/portable/IAR/AtmelSAM7S64/ISR_Support.h index f3b452f1e..f6b701a11 100644 --- a/portable/IAR/AtmelSAM7S64/ISR_Support.h +++ b/portable/IAR/AtmelSAM7S64/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/port.c b/portable/IAR/AtmelSAM7S64/port.c index ec27daf08..8dc479cf5 100644 --- a/portable/IAR/AtmelSAM7S64/port.c +++ b/portable/IAR/AtmelSAM7S64/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/portasm.s79 b/portable/IAR/AtmelSAM7S64/portasm.s79 index 4f5afbc52..b1733d959 100644 --- a/portable/IAR/AtmelSAM7S64/portasm.s79 +++ b/portable/IAR/AtmelSAM7S64/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM7S64/portmacro.h b/portable/IAR/AtmelSAM7S64/portmacro.h index 46989f3e7..131d77009 100644 --- a/portable/IAR/AtmelSAM7S64/portmacro.h +++ b/portable/IAR/AtmelSAM7S64/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/ISR_Support.h b/portable/IAR/AtmelSAM9XE/ISR_Support.h index a57d64e1a..f28ce85b1 100644 --- a/portable/IAR/AtmelSAM9XE/ISR_Support.h +++ b/portable/IAR/AtmelSAM9XE/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/port.c b/portable/IAR/AtmelSAM9XE/port.c index 9b539ff08..483dceda2 100644 --- a/portable/IAR/AtmelSAM9XE/port.c +++ b/portable/IAR/AtmelSAM9XE/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/portasm.s79 b/portable/IAR/AtmelSAM9XE/portasm.s79 index 237d62eb8..ed0bbf450 100644 --- a/portable/IAR/AtmelSAM9XE/portasm.s79 +++ b/portable/IAR/AtmelSAM9XE/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/AtmelSAM9XE/portmacro.h b/portable/IAR/AtmelSAM9XE/portmacro.h index 4202a6db5..3878f973b 100644 --- a/portable/IAR/AtmelSAM9XE/portmacro.h +++ b/portable/IAR/AtmelSAM9XE/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/ISR_Support.h b/portable/IAR/LPC2000/ISR_Support.h index f3b452f1e..f6b701a11 100644 --- a/portable/IAR/LPC2000/ISR_Support.h +++ b/portable/IAR/LPC2000/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/port.c b/portable/IAR/LPC2000/port.c index 1fee8db2a..55ef3e3d2 100644 --- a/portable/IAR/LPC2000/port.c +++ b/portable/IAR/LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/portasm.s79 b/portable/IAR/LPC2000/portasm.s79 index 3a103b0ee..e6a1b7cfa 100644 --- a/portable/IAR/LPC2000/portasm.s79 +++ b/portable/IAR/LPC2000/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/LPC2000/portmacro.h b/portable/IAR/LPC2000/portmacro.h index 18b6a2160..2ef544913 100644 --- a/portable/IAR/LPC2000/portmacro.h +++ b/portable/IAR/LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/port.c b/portable/IAR/MSP430/port.c index e9c94b519..ff78ad4c3 100644 --- a/portable/IAR/MSP430/port.c +++ b/portable/IAR/MSP430/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/portasm.h b/portable/IAR/MSP430/portasm.h index ab7e82848..34b91e6d5 100644 --- a/portable/IAR/MSP430/portasm.h +++ b/portable/IAR/MSP430/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/portext.s43 b/portable/IAR/MSP430/portext.s43 index 74bef0681..43e634cc2 100644 --- a/portable/IAR/MSP430/portext.s43 +++ b/portable/IAR/MSP430/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430/portmacro.h b/portable/IAR/MSP430/portmacro.h index 045577442..f93c4c451 100644 --- a/portable/IAR/MSP430/portmacro.h +++ b/portable/IAR/MSP430/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/data_model.h b/portable/IAR/MSP430X/data_model.h index 85762171f..b2b39bc3f 100644 --- a/portable/IAR/MSP430X/data_model.h +++ b/portable/IAR/MSP430X/data_model.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/port.c b/portable/IAR/MSP430X/port.c index de61f77c1..90bb8af64 100644 --- a/portable/IAR/MSP430X/port.c +++ b/portable/IAR/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/portext.s43 b/portable/IAR/MSP430X/portext.s43 index ca4aeac6b..25560c7df 100644 --- a/portable/IAR/MSP430X/portext.s43 +++ b/portable/IAR/MSP430X/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/MSP430X/portmacro.h b/portable/IAR/MSP430X/portmacro.h index 3c5fa13bf..d0fce750e 100644 --- a/portable/IAR/MSP430X/portmacro.h +++ b/portable/IAR/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 0a00cf28c..33446058f 100644 --- a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/port.c b/portable/IAR/RISC-V/port.c index 6044d85b2..79c32213e 100644 --- a/portable/IAR/RISC-V/port.c +++ b/portable/IAR/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/portASM.s b/portable/IAR/RISC-V/portASM.s index 1cd99edd8..1ca9e2d4c 100644 --- a/portable/IAR/RISC-V/portASM.s +++ b/portable/IAR/RISC-V/portASM.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/portContext.h b/portable/IAR/RISC-V/portContext.h index e381ab512..da6af471b 100644 --- a/portable/IAR/RISC-V/portContext.h +++ b/portable/IAR/RISC-V/portContext.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RISC-V/portmacro.h b/portable/IAR/RISC-V/portmacro.h index 003667c1d..1e0cbc2ee 100644 --- a/portable/IAR/RISC-V/portmacro.h +++ b/portable/IAR/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RL78/port.c b/portable/IAR/RL78/port.c index 51853e2ba..8f221bd69 100644 --- a/portable/IAR/RL78/port.c +++ b/portable/IAR/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RL78/portasm.s b/portable/IAR/RL78/portasm.s index b8dc11d33..184c78cda 100644 --- a/portable/IAR/RL78/portasm.s +++ b/portable/IAR/RL78/portasm.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RL78/portmacro.h b/portable/IAR/RL78/portmacro.h index 9cd3ef315..a9da5a118 100644 --- a/portable/IAR/RL78/portmacro.h +++ b/portable/IAR/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX100/port.c b/portable/IAR/RX100/port.c index 224807e06..6af4d859f 100644 --- a/portable/IAR/RX100/port.c +++ b/portable/IAR/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX100/port_asm.s b/portable/IAR/RX100/port_asm.s index c7a37671d..0389b702c 100644 --- a/portable/IAR/RX100/port_asm.s +++ b/portable/IAR/RX100/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX100/portmacro.h b/portable/IAR/RX100/portmacro.h index 9fe1c937f..513d0f0f7 100644 --- a/portable/IAR/RX100/portmacro.h +++ b/portable/IAR/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX600/port.c b/portable/IAR/RX600/port.c index bf14aca07..b7aa568d4 100644 --- a/portable/IAR/RX600/port.c +++ b/portable/IAR/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX600/port_asm.s b/portable/IAR/RX600/port_asm.s index 3f8894f29..066620ad9 100644 --- a/portable/IAR/RX600/port_asm.s +++ b/portable/IAR/RX600/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX600/portmacro.h b/portable/IAR/RX600/portmacro.h index 764f86ac2..bb2b8344b 100644 --- a/portable/IAR/RX600/portmacro.h +++ b/portable/IAR/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX700v3_DPFPU/port.c b/portable/IAR/RX700v3_DPFPU/port.c index d87ea29ec..e383ab565 100644 --- a/portable/IAR/RX700v3_DPFPU/port.c +++ b/portable/IAR/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RX700v3_DPFPU/portmacro.h b/portable/IAR/RX700v3_DPFPU/portmacro.h index e85f51e7b..5cb3de128 100644 --- a/portable/IAR/RX700v3_DPFPU/portmacro.h +++ b/portable/IAR/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RXv2/port.c b/portable/IAR/RXv2/port.c index c526ccbe9..1599c8bef 100644 --- a/portable/IAR/RXv2/port.c +++ b/portable/IAR/RXv2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RXv2/port_asm.s b/portable/IAR/RXv2/port_asm.s index 50039f2b0..6c7b6e16e 100644 --- a/portable/IAR/RXv2/port_asm.s +++ b/portable/IAR/RXv2/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/RXv2/portmacro.h b/portable/IAR/RXv2/portmacro.h index 0aedddbf2..d9d02233a 100644 --- a/portable/IAR/RXv2/portmacro.h +++ b/portable/IAR/RXv2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/ISR_Support.h b/portable/IAR/STR71x/ISR_Support.h index f3b452f1e..f6b701a11 100644 --- a/portable/IAR/STR71x/ISR_Support.h +++ b/portable/IAR/STR71x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/port.c b/portable/IAR/STR71x/port.c index bb5fd6d42..4496b7dfd 100644 --- a/portable/IAR/STR71x/port.c +++ b/portable/IAR/STR71x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/portasm.s79 b/portable/IAR/STR71x/portasm.s79 index eb7302d74..9939edab3 100644 --- a/portable/IAR/STR71x/portasm.s79 +++ b/portable/IAR/STR71x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR71x/portmacro.h b/portable/IAR/STR71x/portmacro.h index 07d12e140..379bfe51c 100644 --- a/portable/IAR/STR71x/portmacro.h +++ b/portable/IAR/STR71x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/ISR_Support.h b/portable/IAR/STR75x/ISR_Support.h index f3b452f1e..f6b701a11 100644 --- a/portable/IAR/STR75x/ISR_Support.h +++ b/portable/IAR/STR75x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/port.c b/portable/IAR/STR75x/port.c index 195d298bd..2b2a78f2c 100644 --- a/portable/IAR/STR75x/port.c +++ b/portable/IAR/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/portasm.s79 b/portable/IAR/STR75x/portasm.s79 index d7bfa3fd3..45a1f4280 100644 --- a/portable/IAR/STR75x/portasm.s79 +++ b/portable/IAR/STR75x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR75x/portmacro.h b/portable/IAR/STR75x/portmacro.h index 2435c14a1..297fee6f5 100644 --- a/portable/IAR/STR75x/portmacro.h +++ b/portable/IAR/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/ISR_Support.h b/portable/IAR/STR91x/ISR_Support.h index 2893b9b6e..e27236ce0 100644 --- a/portable/IAR/STR91x/ISR_Support.h +++ b/portable/IAR/STR91x/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/port.c b/portable/IAR/STR91x/port.c index bcf01b5d2..0127ca042 100644 --- a/portable/IAR/STR91x/port.c +++ b/portable/IAR/STR91x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/portasm.s79 b/portable/IAR/STR91x/portasm.s79 index f2347cdbf..bb9d45082 100644 --- a/portable/IAR/STR91x/portasm.s79 +++ b/portable/IAR/STR91x/portasm.s79 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/STR91x/portmacro.h b/portable/IAR/STR91x/portmacro.h index c17b45cd1..852baec99 100644 --- a/portable/IAR/STR91x/portmacro.h +++ b/portable/IAR/STR91x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/ISR_Support.h b/portable/IAR/V850ES/ISR_Support.h index c2813301f..aa66708c9 100644 --- a/portable/IAR/V850ES/ISR_Support.h +++ b/portable/IAR/V850ES/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/port.c b/portable/IAR/V850ES/port.c index e8be642dc..ed0601c11 100644 --- a/portable/IAR/V850ES/port.c +++ b/portable/IAR/V850ES/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portasm.s85 b/portable/IAR/V850ES/portasm.s85 index 9f8224f4a..9627e1f4f 100644 --- a/portable/IAR/V850ES/portasm.s85 +++ b/portable/IAR/V850ES/portasm.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portasm_Fx3.s85 b/portable/IAR/V850ES/portasm_Fx3.s85 index 505040191..e20477ed6 100644 --- a/portable/IAR/V850ES/portasm_Fx3.s85 +++ b/portable/IAR/V850ES/portasm_Fx3.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portasm_Hx2.s85 b/portable/IAR/V850ES/portasm_Hx2.s85 index e340afe86..9e0275c3d 100644 --- a/portable/IAR/V850ES/portasm_Hx2.s85 +++ b/portable/IAR/V850ES/portasm_Hx2.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/IAR/V850ES/portmacro.h b/portable/IAR/V850ES/portmacro.h index cef73fb4c..3b9fe731c 100644 --- a/portable/IAR/V850ES/portmacro.h +++ b/portable/IAR/V850ES/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC18F/port.c b/portable/MPLAB/PIC18F/port.c index 3fbf3d5e0..d6949d4f4 100644 --- a/portable/MPLAB/PIC18F/port.c +++ b/portable/MPLAB/PIC18F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC18F/portmacro.h b/portable/MPLAB/PIC18F/portmacro.h index d7954e814..517d3dc0b 100644 --- a/portable/MPLAB/PIC18F/portmacro.h +++ b/portable/MPLAB/PIC18F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/port.c b/portable/MPLAB/PIC24_dsPIC/port.c index 9f63cba0e..3ba3d2bce 100644 --- a/portable/MPLAB/PIC24_dsPIC/port.c +++ b/portable/MPLAB/PIC24_dsPIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S index dd9b1e761..e9b9476dc 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S index 575064151..f1fbcb0bd 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC24_dsPIC/portmacro.h b/portable/MPLAB/PIC24_dsPIC/portmacro.h index e75e7eef2..bc7a1d758 100644 --- a/portable/MPLAB/PIC24_dsPIC/portmacro.h +++ b/portable/MPLAB/PIC24_dsPIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h index 2f43d5589..d3d368056 100644 --- a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h +++ b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/port.c b/portable/MPLAB/PIC32MEC14xx/port.c index 38121b311..161016b4b 100644 --- a/portable/MPLAB/PIC32MEC14xx/port.c +++ b/portable/MPLAB/PIC32MEC14xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/port_asm.S b/portable/MPLAB/PIC32MEC14xx/port_asm.S index 594f989ec..7da7b78bd 100644 --- a/portable/MPLAB/PIC32MEC14xx/port_asm.S +++ b/portable/MPLAB/PIC32MEC14xx/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MEC14xx/portmacro.h b/portable/MPLAB/PIC32MEC14xx/portmacro.h index 915518334..3ce89b8ab 100644 --- a/portable/MPLAB/PIC32MEC14xx/portmacro.h +++ b/portable/MPLAB/PIC32MEC14xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/ISR_Support.h b/portable/MPLAB/PIC32MX/ISR_Support.h index 7ee811f2f..7d0cc2fc2 100644 --- a/portable/MPLAB/PIC32MX/ISR_Support.h +++ b/portable/MPLAB/PIC32MX/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/port.c b/portable/MPLAB/PIC32MX/port.c index 1e9eb6cb3..716348867 100644 --- a/portable/MPLAB/PIC32MX/port.c +++ b/portable/MPLAB/PIC32MX/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/port_asm.S b/portable/MPLAB/PIC32MX/port_asm.S index ab3c994af..d0b8878e9 100644 --- a/portable/MPLAB/PIC32MX/port_asm.S +++ b/portable/MPLAB/PIC32MX/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MX/portmacro.h b/portable/MPLAB/PIC32MX/portmacro.h index 0fd9d68d3..1cd24e0ba 100644 --- a/portable/MPLAB/PIC32MX/portmacro.h +++ b/portable/MPLAB/PIC32MX/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/ISR_Support.h b/portable/MPLAB/PIC32MZ/ISR_Support.h index 81542d800..fd5d71ae5 100644 --- a/portable/MPLAB/PIC32MZ/ISR_Support.h +++ b/portable/MPLAB/PIC32MZ/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/port.c b/portable/MPLAB/PIC32MZ/port.c index a59dca1cb..a56e8dda3 100644 --- a/portable/MPLAB/PIC32MZ/port.c +++ b/portable/MPLAB/PIC32MZ/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/port_asm.S b/portable/MPLAB/PIC32MZ/port_asm.S index 885974311..c4bfce31d 100644 --- a/portable/MPLAB/PIC32MZ/port_asm.S +++ b/portable/MPLAB/PIC32MZ/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MPLAB/PIC32MZ/portmacro.h b/portable/MPLAB/PIC32MZ/portmacro.h index 400a30338..7e2a14d26 100644 --- a/portable/MPLAB/PIC32MZ/portmacro.h +++ b/portable/MPLAB/PIC32MZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MSVC-MingW/port.c b/portable/MSVC-MingW/port.c index 4b196d627..55618fe09 100644 --- a/portable/MSVC-MingW/port.c +++ b/portable/MSVC-MingW/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MSVC-MingW/portmacro.h b/portable/MSVC-MingW/portmacro.h index 64942caff..c79e57bfe 100644 --- a/portable/MSVC-MingW/portmacro.h +++ b/portable/MSVC-MingW/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_1.c b/portable/MemMang/heap_1.c index 15e3335fb..da11bfcc5 100644 --- a/portable/MemMang/heap_1.c +++ b/portable/MemMang/heap_1.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_2.c b/portable/MemMang/heap_2.c index 4b966558f..9f363f151 100644 --- a/portable/MemMang/heap_2.c +++ b/portable/MemMang/heap_2.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_3.c b/portable/MemMang/heap_3.c index ba7c67309..f0ecc9600 100644 --- a/portable/MemMang/heap_3.c +++ b/portable/MemMang/heap_3.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_4.c b/portable/MemMang/heap_4.c index e662da25a..013364f30 100644 --- a/portable/MemMang/heap_4.c +++ b/portable/MemMang/heap_4.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MemMang/heap_5.c b/portable/MemMang/heap_5.c index f627b7421..79b3a8a5b 100644 --- a/portable/MemMang/heap_5.c +++ b/portable/MemMang/heap_5.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MikroC/ARM_CM4F/port.c b/portable/MikroC/ARM_CM4F/port.c index 84d1c6dd5..d488c1307 100755 --- a/portable/MikroC/ARM_CM4F/port.c +++ b/portable/MikroC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/MikroC/ARM_CM4F/portmacro.h b/portable/MikroC/ARM_CM4F/portmacro.h index 5b156d8f2..545af2b32 100644 --- a/portable/MikroC/ARM_CM4F/portmacro.h +++ b/portable/MikroC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/large_untested/port.c b/portable/Paradigm/Tern_EE/large_untested/port.c index 77184fa92..db7c790f7 100644 --- a/portable/Paradigm/Tern_EE/large_untested/port.c +++ b/portable/Paradigm/Tern_EE/large_untested/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/large_untested/portasm.h b/portable/Paradigm/Tern_EE/large_untested/portasm.h index ab8b9e735..6e88f768a 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portasm.h +++ b/portable/Paradigm/Tern_EE/large_untested/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/large_untested/portmacro.h b/portable/Paradigm/Tern_EE/large_untested/portmacro.h index 60ae23cfd..40712f2e8 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portmacro.h +++ b/portable/Paradigm/Tern_EE/large_untested/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/small/port.c b/portable/Paradigm/Tern_EE/small/port.c index 871830044..ddd96d549 100644 --- a/portable/Paradigm/Tern_EE/small/port.c +++ b/portable/Paradigm/Tern_EE/small/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/small/portasm.h b/portable/Paradigm/Tern_EE/small/portasm.h index f2b54fac6..b72a90f37 100644 --- a/portable/Paradigm/Tern_EE/small/portasm.h +++ b/portable/Paradigm/Tern_EE/small/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Paradigm/Tern_EE/small/portmacro.h b/portable/Paradigm/Tern_EE/small/portmacro.h index 6d318ad8e..771df324e 100644 --- a/portable/Paradigm/Tern_EE/small/portmacro.h +++ b/portable/Paradigm/Tern_EE/small/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/port.c b/portable/RVDS/ARM7_LPC21xx/port.c index 43c5247a0..5a5f51783 100644 --- a/portable/RVDS/ARM7_LPC21xx/port.c +++ b/portable/RVDS/ARM7_LPC21xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/portASM.s b/portable/RVDS/ARM7_LPC21xx/portASM.s index 09c241caa..3d291ebac 100644 --- a/portable/RVDS/ARM7_LPC21xx/portASM.s +++ b/portable/RVDS/ARM7_LPC21xx/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.h b/portable/RVDS/ARM7_LPC21xx/portmacro.h index ec738d510..95ba4dc05 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.h +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.inc b/portable/RVDS/ARM7_LPC21xx/portmacro.inc index 6ff33fa2b..0be2c18bc 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.inc +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/port.c b/portable/RVDS/ARM_CA9/port.c index d75b9a786..d41813121 100644 --- a/portable/RVDS/ARM_CA9/port.c +++ b/portable/RVDS/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/portASM.s b/portable/RVDS/ARM_CA9/portASM.s index 8a9070d82..bd36f2ebe 100644 --- a/portable/RVDS/ARM_CA9/portASM.s +++ b/portable/RVDS/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/portmacro.h b/portable/RVDS/ARM_CA9/portmacro.h index 08203256b..35e48871e 100644 --- a/portable/RVDS/ARM_CA9/portmacro.h +++ b/portable/RVDS/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CA9/portmacro.inc b/portable/RVDS/ARM_CA9/portmacro.inc index 86f792c7b..cfcdc581f 100644 --- a/portable/RVDS/ARM_CA9/portmacro.inc +++ b/portable/RVDS/ARM_CA9/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM0/port.c b/portable/RVDS/ARM_CM0/port.c index d55129653..169e262ff 100644 --- a/portable/RVDS/ARM_CM0/port.c +++ b/portable/RVDS/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM0/portmacro.h b/portable/RVDS/ARM_CM0/portmacro.h index 555ac8df8..e75c8efa7 100644 --- a/portable/RVDS/ARM_CM0/portmacro.h +++ b/portable/RVDS/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM3/port.c b/portable/RVDS/ARM_CM3/port.c index 3f91efcfe..d39491dd2 100755 --- a/portable/RVDS/ARM_CM3/port.c +++ b/portable/RVDS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM3/portmacro.h b/portable/RVDS/ARM_CM3/portmacro.h index f95841ee5..245522068 100644 --- a/portable/RVDS/ARM_CM3/portmacro.h +++ b/portable/RVDS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4F/port.c b/portable/RVDS/ARM_CM4F/port.c index d1393c696..05ef20ca9 100755 --- a/portable/RVDS/ARM_CM4F/port.c +++ b/portable/RVDS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4F/portmacro.h b/portable/RVDS/ARM_CM4F/portmacro.h index df09a66fc..d79c9b425 100644 --- a/portable/RVDS/ARM_CM4F/portmacro.h +++ b/portable/RVDS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c b/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c index 9c67e02e0..80f0ee1bb 100644 --- a/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c +++ b/portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index 92c8aad9f..b5c4cb916 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h index b68af5a73..0f300434d 100644 --- a/portable/RVDS/ARM_CM4_MPU/portmacro.h +++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM7/r0p1/port.c b/portable/RVDS/ARM_CM7/r0p1/port.c index 721c04773..2e1bdfc5b 100755 --- a/portable/RVDS/ARM_CM7/r0p1/port.c +++ b/portable/RVDS/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/RVDS/ARM_CM7/r0p1/portmacro.h b/portable/RVDS/ARM_CM7/r0p1/portmacro.h index 8dae3407a..19301dd9f 100644 --- a/portable/RVDS/ARM_CM7/r0p1/portmacro.h +++ b/portable/RVDS/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX100/port.c b/portable/Renesas/RX100/port.c index a04876302..38718d7de 100644 --- a/portable/Renesas/RX100/port.c +++ b/portable/Renesas/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX100/port_asm.src b/portable/Renesas/RX100/port_asm.src index a216e917e..e0a9e9376 100644 --- a/portable/Renesas/RX100/port_asm.src +++ b/portable/Renesas/RX100/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX100/portmacro.h b/portable/Renesas/RX100/portmacro.h index eb5242e93..d8ab9474b 100644 --- a/portable/Renesas/RX100/portmacro.h +++ b/portable/Renesas/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX200/port.c b/portable/Renesas/RX200/port.c index 0d06f9ab1..4264889d1 100644 --- a/portable/Renesas/RX200/port.c +++ b/portable/Renesas/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX200/port_asm.src b/portable/Renesas/RX200/port_asm.src index a216e917e..e0a9e9376 100644 --- a/portable/Renesas/RX200/port_asm.src +++ b/portable/Renesas/RX200/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX200/portmacro.h b/portable/Renesas/RX200/portmacro.h index 7c204ea5e..84dab7145 100644 --- a/portable/Renesas/RX200/portmacro.h +++ b/portable/Renesas/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600/port.c b/portable/Renesas/RX600/port.c index 4ef917159..415ea318a 100644 --- a/portable/Renesas/RX600/port.c +++ b/portable/Renesas/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600/port_asm.src b/portable/Renesas/RX600/port_asm.src index a216e917e..e0a9e9376 100644 --- a/portable/Renesas/RX600/port_asm.src +++ b/portable/Renesas/RX600/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600/portmacro.h b/portable/Renesas/RX600/portmacro.h index 7c82fe642..afad13592 100644 --- a/portable/Renesas/RX600/portmacro.h +++ b/portable/Renesas/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600v2/port.c b/portable/Renesas/RX600v2/port.c index 46daffa36..df1b8f2c2 100644 --- a/portable/Renesas/RX600v2/port.c +++ b/portable/Renesas/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600v2/port_asm.src b/portable/Renesas/RX600v2/port_asm.src index ad851df56..18066a63e 100644 --- a/portable/Renesas/RX600v2/port_asm.src +++ b/portable/Renesas/RX600v2/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX600v2/portmacro.h b/portable/Renesas/RX600v2/portmacro.h index 178b39e54..71da3da4d 100644 --- a/portable/Renesas/RX600v2/portmacro.h +++ b/portable/Renesas/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX700v3_DPFPU/port.c b/portable/Renesas/RX700v3_DPFPU/port.c index 80aa603eb..7ec44c05e 100644 --- a/portable/Renesas/RX700v3_DPFPU/port.c +++ b/portable/Renesas/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX700v3_DPFPU/port_asm.src b/portable/Renesas/RX700v3_DPFPU/port_asm.src index ad851df56..18066a63e 100644 --- a/portable/Renesas/RX700v3_DPFPU/port_asm.src +++ b/portable/Renesas/RX700v3_DPFPU/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/RX700v3_DPFPU/portmacro.h b/portable/Renesas/RX700v3_DPFPU/portmacro.h index 480896b3c..4aae682cd 100644 --- a/portable/Renesas/RX700v3_DPFPU/portmacro.h +++ b/portable/Renesas/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/ISR_Support.inc b/portable/Renesas/SH2A_FPU/ISR_Support.inc index f46f27cb1..811ffee87 100644 --- a/portable/Renesas/SH2A_FPU/ISR_Support.inc +++ b/portable/Renesas/SH2A_FPU/ISR_Support.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/port.c b/portable/Renesas/SH2A_FPU/port.c index 09edf4d6e..105f243e6 100644 --- a/portable/Renesas/SH2A_FPU/port.c +++ b/portable/Renesas/SH2A_FPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/portasm.src b/portable/Renesas/SH2A_FPU/portasm.src index 291422f34..c0af9ba7d 100644 --- a/portable/Renesas/SH2A_FPU/portasm.src +++ b/portable/Renesas/SH2A_FPU/portasm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Renesas/SH2A_FPU/portmacro.h b/portable/Renesas/SH2A_FPU/portmacro.h index b3610f514..8cce0588a 100644 --- a/portable/Renesas/SH2A_FPU/portmacro.h +++ b/portable/Renesas/SH2A_FPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/port.c b/portable/Rowley/MSP430F449/port.c index 09c22c9e4..77cf0ca30 100644 --- a/portable/Rowley/MSP430F449/port.c +++ b/portable/Rowley/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/portasm.h b/portable/Rowley/MSP430F449/portasm.h index a9ae8f7fc..12ff46bbe 100644 --- a/portable/Rowley/MSP430F449/portasm.h +++ b/portable/Rowley/MSP430F449/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/portext.asm b/portable/Rowley/MSP430F449/portext.asm index 22bdd81fd..eef7afe62 100644 --- a/portable/Rowley/MSP430F449/portext.asm +++ b/portable/Rowley/MSP430F449/portext.asm @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Rowley/MSP430F449/portmacro.h b/portable/Rowley/MSP430F449/portmacro.h index ee6c9fc59..8c8d290e4 100644 --- a/portable/Rowley/MSP430F449/portmacro.h +++ b/portable/Rowley/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/SDCC/Cygnal/port.c b/portable/SDCC/Cygnal/port.c index 978bd8016..b2d4b466d 100644 --- a/portable/SDCC/Cygnal/port.c +++ b/portable/SDCC/Cygnal/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/SDCC/Cygnal/portmacro.h b/portable/SDCC/Cygnal/portmacro.h index 2314be932..03fa6c3c1 100644 --- a/portable/SDCC/Cygnal/portmacro.h +++ b/portable/SDCC/Cygnal/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB91460/__STD_LIB_sbrk.c b/portable/Softune/MB91460/__STD_LIB_sbrk.c index ec38320f4..a1678d819 100644 --- a/portable/Softune/MB91460/__STD_LIB_sbrk.c +++ b/portable/Softune/MB91460/__STD_LIB_sbrk.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB91460/port.c b/portable/Softune/MB91460/port.c index b5fa088f0..77c23a6f4 100644 --- a/portable/Softune/MB91460/port.c +++ b/portable/Softune/MB91460/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB91460/portmacro.h b/portable/Softune/MB91460/portmacro.h index 28cb52479..274195278 100644 --- a/portable/Softune/MB91460/portmacro.h +++ b/portable/Softune/MB91460/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB96340/__STD_LIB_sbrk.c b/portable/Softune/MB96340/__STD_LIB_sbrk.c index ec38320f4..a1678d819 100644 --- a/portable/Softune/MB96340/__STD_LIB_sbrk.c +++ b/portable/Softune/MB96340/__STD_LIB_sbrk.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB96340/port.c b/portable/Softune/MB96340/port.c index f8d7f8dbe..a748a3ea5 100644 --- a/portable/Softune/MB96340/port.c +++ b/portable/Softune/MB96340/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Softune/MB96340/portmacro.h b/portable/Softune/MB96340/portmacro.h index 9acb16c28..2ccbb90bb 100644 --- a/portable/Softune/MB96340/portmacro.h +++ b/portable/Softune/MB96340/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Tasking/ARM_CM4F/port.c b/portable/Tasking/ARM_CM4F/port.c index 6985a92ae..b5967d352 100755 --- a/portable/Tasking/ARM_CM4F/port.c +++ b/portable/Tasking/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/Tasking/ARM_CM4F/port_asm.asm b/portable/Tasking/ARM_CM4F/port_asm.asm index 16c75f5b2..f47139e5d 100644 --- a/portable/Tasking/ARM_CM4F/port_asm.asm +++ b/portable/Tasking/ARM_CM4F/port_asm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.6.1 +; * FreeRTOS Kernel V10.6.2 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * SPDX-License-Identifier: MIT diff --git a/portable/Tasking/ARM_CM4F/portmacro.h b/portable/Tasking/ARM_CM4F/portmacro.h index 815ce8271..152709198 100644 --- a/portable/Tasking/ARM_CM4F/portmacro.h +++ b/portable/Tasking/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c index e395d03bf..69807a10f 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h index 8f7539e2d..8fe536328 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s index 5664694c9..b12ccde46 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c index 319a8d765..cce374cc0 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/port.c b/portable/ThirdParty/GCC/ARC_EM_HS/port.c index 875854492..8ef46685e 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/port.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h index ffc3160e3..9c58240a6 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c index e395d03bf..69807a10f 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h index 8f7539e2d..8fe536328 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_support.s b/portable/ThirdParty/GCC/ARC_v1/arc_support.s index cc2a27d07..4215cb622 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_v1/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/port.c b/portable/ThirdParty/GCC/ARC_v1/port.c index a7d2e7268..5fce18719 100644 --- a/portable/ThirdParty/GCC/ARC_v1/port.c +++ b/portable/ThirdParty/GCC/ARC_v1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ARC_v1/portmacro.h b/portable/ThirdParty/GCC/ARC_v1/portmacro.h index 39ee710dc..6036735b3 100644 --- a/portable/ThirdParty/GCC/ARC_v1/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_v1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ATmega/port.c b/portable/ThirdParty/GCC/ATmega/port.c index 3891de2b0..308ebc73d 100644 --- a/portable/ThirdParty/GCC/ATmega/port.c +++ b/portable/ThirdParty/GCC/ATmega/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/ATmega/portmacro.h b/portable/ThirdParty/GCC/ATmega/portmacro.h index 8a018927a..6e7e795cd 100644 --- a/portable/ThirdParty/GCC/ATmega/portmacro.h +++ b/portable/ThirdParty/GCC/ATmega/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/port.c b/portable/ThirdParty/GCC/Posix/port.c index 3d744fe8f..d3b3fecf8 100644 --- a/portable/ThirdParty/GCC/Posix/port.c +++ b/portable/ThirdParty/GCC/Posix/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Cambridge Consultants Ltd. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/portmacro.h b/portable/ThirdParty/GCC/Posix/portmacro.h index b1447dbff..27ba82de2 100644 --- a/portable/ThirdParty/GCC/Posix/portmacro.h +++ b/portable/ThirdParty/GCC/Posix/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright 2020 Cambridge Consultants Ltd. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c index 1af2d6f22..a0d71ab70 100644 --- a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c +++ b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h index d535bad2e..6584d765c 100644 --- a/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h +++ b/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c b/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c index 347814958..fe384aa5a 100644 --- a/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c +++ b/portable/ThirdParty/GCC/RP2040/idle_task_static_memory.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h b/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h index c6b98c781..ca0022562 100644 --- a/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h +++ b/portable/ThirdParty/GCC/RP2040/include/freertos_sdk_config.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/include/portmacro.h b/portable/ThirdParty/GCC/RP2040/include/portmacro.h index a15a48e50..5fc9c3bdb 100644 --- a/portable/ThirdParty/GCC/RP2040/include/portmacro.h +++ b/portable/ThirdParty/GCC/RP2040/include/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h b/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h index a869e5658..0e97f98fc 100644 --- a/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h +++ b/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/RP2040/port.c b/portable/ThirdParty/GCC/RP2040/port.c index e75a6dcaa..ada8d8421 100644 --- a/portable/ThirdParty/GCC/RP2040/port.c +++ b/portable/ThirdParty/GCC/RP2040/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. * diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h index 051ca017d..822edb895 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/FreeRTOSConfig_arch.h @@ -6,7 +6,7 @@ * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD */ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h index 7435323b7..179b0f538 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h @@ -7,7 +7,7 @@ * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD */ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/port.c b/portable/ThirdParty/GCC/Xtensa_ESP32/port.c index f4705ba31..83ae40720 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/port.c +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/port.c @@ -7,7 +7,7 @@ * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD */ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/XCC/Xtensa/port.c b/portable/ThirdParty/XCC/Xtensa/port.c index c74839d98..e64456280 100644 --- a/portable/ThirdParty/XCC/Xtensa/port.c +++ b/portable/ThirdParty/XCC/Xtensa/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portasm.S b/portable/ThirdParty/XCC/Xtensa/portasm.S index 4d457a870..fb4e29428 100644 --- a/portable/ThirdParty/XCC/Xtensa/portasm.S +++ b/portable/ThirdParty/XCC/Xtensa/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portbenchmark.h b/portable/ThirdParty/XCC/Xtensa/portbenchmark.h index 7ad06e1e0..6202165f8 100644 --- a/portable/ThirdParty/XCC/Xtensa/portbenchmark.h +++ b/portable/ThirdParty/XCC/Xtensa/portbenchmark.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portclib.c b/portable/ThirdParty/XCC/Xtensa/portclib.c index 426a73ed1..671fd0a4f 100644 --- a/portable/ThirdParty/XCC/Xtensa/portclib.c +++ b/portable/ThirdParty/XCC/Xtensa/portclib.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/portmacro.h b/portable/ThirdParty/XCC/Xtensa/portmacro.h index 8c65780ce..eda36f246 100644 --- a/portable/ThirdParty/XCC/Xtensa/portmacro.h +++ b/portable/ThirdParty/XCC/Xtensa/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/porttrace.h b/portable/ThirdParty/XCC/Xtensa/porttrace.h index e1ae9c3ce..0be91af6e 100644 --- a/portable/ThirdParty/XCC/Xtensa/porttrace.h +++ b/portable/ThirdParty/XCC/Xtensa/porttrace.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_api.h b/portable/ThirdParty/XCC/Xtensa/xtensa_api.h index b096c15fd..16c51f807 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_api.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_api.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_config.h b/portable/ThirdParty/XCC/Xtensa/xtensa_config.h index ee15e8a99..041378f5c 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_config.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_config.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_context.S b/portable/ThirdParty/XCC/Xtensa/xtensa_context.S index d73ce8356..cd23aba87 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_context.S +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_context.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_context.h b/portable/ThirdParty/XCC/Xtensa/xtensa_context.h index 5b1504e2a..028efcfe5 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_context.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_init.c b/portable/ThirdParty/XCC/Xtensa/xtensa_init.c index c932af334..4c8ad2a5d 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_init.c +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c b/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c index dc8814350..1644df50f 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S b/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S index 0b71b1b10..8737a4ba8 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c b/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c index 3b0b7f059..b3727fee9 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h b/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h index 5caab93f0..6d6b3fb62 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h b/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h index e22eb567d..037a78b41 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_timer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S b/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S index d1d73bb7f..355e2d50f 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * diff --git a/portable/WizC/PIC18/Drivers/Tick/Tick.c b/portable/WizC/PIC18/Drivers/Tick/Tick.c index 12b5a3be6..0116a0a94 100644 --- a/portable/WizC/PIC18/Drivers/Tick/Tick.c +++ b/portable/WizC/PIC18/Drivers/Tick/Tick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/Drivers/Tick/isrTick.c b/portable/WizC/PIC18/Drivers/Tick/isrTick.c index f1f43b454..09e9a3f7f 100644 --- a/portable/WizC/PIC18/Drivers/Tick/isrTick.c +++ b/portable/WizC/PIC18/Drivers/Tick/isrTick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/addFreeRTOS.h b/portable/WizC/PIC18/addFreeRTOS.h index 3c302d58a..bb4227dae 100644 --- a/portable/WizC/PIC18/addFreeRTOS.h +++ b/portable/WizC/PIC18/addFreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/port.c b/portable/WizC/PIC18/port.c index 3015b9574..9f80512c1 100644 --- a/portable/WizC/PIC18/port.c +++ b/portable/WizC/PIC18/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/WizC/PIC18/portmacro.h b/portable/WizC/PIC18/portmacro.h index 2b883a184..40f43efa2 100644 --- a/portable/WizC/PIC18/portmacro.h +++ b/portable/WizC/PIC18/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/Flsh186/port.c b/portable/oWatcom/16BitDOS/Flsh186/port.c index 810c7275d..c8e99c470 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/port.c +++ b/portable/oWatcom/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h index 69a18c785..db5f279c6 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h +++ b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/PC/port.c b/portable/oWatcom/16BitDOS/PC/port.c index 16139e1b4..0d9238c47 100644 --- a/portable/oWatcom/16BitDOS/PC/port.c +++ b/portable/oWatcom/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/PC/portmacro.h b/portable/oWatcom/16BitDOS/PC/portmacro.h index 47fc988d0..4fb320715 100644 --- a/portable/oWatcom/16BitDOS/PC/portmacro.h +++ b/portable/oWatcom/16BitDOS/PC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/common/portasm.h b/portable/oWatcom/16BitDOS/common/portasm.h index 8fd8af12d..da987073b 100644 --- a/portable/oWatcom/16BitDOS/common/portasm.h +++ b/portable/oWatcom/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/portable/oWatcom/16BitDOS/common/portcomn.c b/portable/oWatcom/16BitDOS/common/portcomn.c index a0dc870db..083726b17 100644 --- a/portable/oWatcom/16BitDOS/common/portcomn.c +++ b/portable/oWatcom/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/queue.c b/queue.c index 65cf7a3a1..40edbe466 100644 --- a/queue.c +++ b/queue.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/stream_buffer.c b/stream_buffer.c index 085e22620..53208acee 100644 --- a/stream_buffer.c +++ b/stream_buffer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/tasks.c b/tasks.c index 7f0c3ce5c..afb70092e 100644 --- a/tasks.c +++ b/tasks.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT diff --git a/timers.c b/timers.c index 1d0c63355..d5012adcb 100644 --- a/timers.c +++ b/timers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.6.1 + * FreeRTOS Kernel V10.6.2 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * SPDX-License-Identifier: MIT From 650025f22786cd38ae23e5becd0220cf77a0d618 Mon Sep 17 00:00:00 2001 From: kar-rahul-aws Date: Wed, 29 Nov 2023 14:13:52 +0000 Subject: [PATCH 20/21] [AUTO][RELEASE]: Update version number in manifest.yml --- manifest.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest.yml b/manifest.yml index 4a19fce3d..437a9be16 100644 --- a/manifest.yml +++ b/manifest.yml @@ -1,4 +1,4 @@ name : "FreeRTOS-Kernel" -version: "v10.6.1" +version: "v10.6.2" description: "FreeRTOS Kernel." license: "MIT" From 18ed8886fe3eed9dbe433a82cdc62ce5dc0315eb Mon Sep 17 00:00:00 2001 From: kar-rahul-aws Date: Wed, 29 Nov 2023 14:13:55 +0000 Subject: [PATCH 21/21] [AUTO][RELEASE]: Update SBOM --- sbom.spdx | 3086 ++++++++++++++++++++++++++--------------------------- 1 file changed, 1543 insertions(+), 1543 deletions(-) diff --git a/sbom.spdx b/sbom.spdx index 5ee618ef6..7c37b2231 100644 --- a/sbom.spdx +++ b/sbom.spdx @@ -2,1699 +2,369 @@ SPDXVersion: SPDX-2.2 DataLicense: CC0-1.0 SPDXID: SPDXRef-DOCUMENT DocumentName: FreeRTOS-Kernel -DocumentNamespace: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/v10.6.1/sbom.spdx +DocumentNamespace: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/v10.6.2/sbom.spdx Creator: Amazon Web Services -Created: 2023-08-17T17:14:08Z +Created: 2023-11-29T14:13:55Z CreatorComment: NOASSERTION DocumentComment: NOASSERTION PackageName: FreeRTOS-Kernel SPDXID: SPDXRef-Package-FreeRTOS-Kernel -PackageVersion: v10.6.1 -PackageDownloadLocation: https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/v10.6.1 +PackageVersion: v10.6.2 +PackageDownloadLocation: https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/v10.6.2 PackageLicenseConcluded: MIT FilesAnalyzed: True -PackageVerificationCode: 57c35c7fda5aab4af2f747061307de7b5c574dcf +PackageVerificationCode: 904a15b039bf2c5432fee2e92006d0bc45048cd8 PackageCopyrightText: NOASSERTION PackageSummary: NOASSERTION PackageDescription: FreeRTOS Kernel. -FileName: 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