Merge d1605b581b into d03233f209

fix warnings from "gcc -Wconversion"

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>

.github/workflows/ci.yml

@@ -7,7 +7,7 @@ on:
   workflow_dispatch:
 jobs:
   formatting:
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     steps:
       - uses: actions/checkout@v4.1.1
       - name: Check Formatting of FreeRTOS-Kernel Files

.github/workflows/formatting.yml

@@ -16,10 +16,11 @@ jobs:
     if: ${{ github.event.issue.pull_request &&
         ( ( github.event.comment.body == '/bot run uncrustify' ) ||
           ( github.event.comment.body == '/bot run formatting' ) ) }}
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     steps:
     - name: Apply Formatting Fix
       id: check-formatting
       uses: FreeRTOS/CI-CD-Github-Actions/formatting-bot@main
       with:
         exclude-dirs: portable
+          

.github/workflows/kernel-checks.yml

@@ -5,7 +5,7 @@ on: [push, pull_request]
 jobs:
   kernel-checker:
     name: FreeRTOS Kernel Header Checks
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     steps:
       # Install python 3
       - name: Tool Setup

.github/workflows/unit-tests.yml

@@ -3,7 +3,7 @@ on: [push, pull_request]
 
 jobs:
   run:
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     steps:
     - name: Checkout Parent Repository
       uses: actions/checkout@v4.1.1

examples/template_configuration/FreeRTOSConfig.h

@@ -415,6 +415,8 @@
  * number of the failing assert (for example, "vAssertCalled( __FILE__, __LINE__
  * )" or it can simple disable interrupts and sit in a loop to halt all
  * execution on the failing line for viewing in a debugger. */
+
+/* *INDENT-OFF* */
 #define configASSERT( x )         \
     if( ( x ) == 0 )              \
     {                             \
@@ -422,6 +424,7 @@
         for( ; ; )                \
         ;                         \
     }
+/* *INDENT-ON* */
 
 /******************************************************************************/
 /* FreeRTOS MPU specific definitions. *****************************************/

include/croutine.h

@@ -246,7 +246,10 @@ void vCoRoutineSchedule( void );
  * \defgroup crSTART crSTART
  * \ingroup Tasks
  */
+
+/* *INDENT-OFF* */
 #define crEND()    }
+/* *INDENT-ON* */
 
 /*
  * These macros are intended for internal use by the co-routine implementation

portable/Common/mpu_wrappers_v2.c

@@ -1059,8 +1059,8 @@
                                                   configRUN_TIME_COUNTER_TYPE * pulTotalRunTime ) /* PRIVILEGED_FUNCTION */
         {
             UBaseType_t uxReturn = 0;
-            UBaseType_t xIsTaskStatusArrayWriteable = pdFALSE;
+            BaseType_t xIsTaskStatusArrayWriteable = pdFALSE;
-            UBaseType_t xIsTotalRunTimeWriteable = pdFALSE;
+            BaseType_t xIsTotalRunTimeWriteable = pdFALSE;
             uint32_t ulArraySize = ( uint32_t ) uxArraySize;
             uint32_t ulTaskStatusSize = ( uint32_t ) sizeof( TaskStatus_t );
 

portable/GCC/ARM_AARCH64/port.c

@@ -170,6 +170,9 @@ __attribute__( ( used ) ) const uint64_t ullICCEOIR = portICCEOIR_END_OF_INTERRU
 __attribute__( ( used ) ) const uint64_t ullICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS;
 __attribute__( ( used ) ) const uint64_t ullICCPMR = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS;
 __attribute__( ( used ) ) const uint64_t ullMaxAPIPriorityMask = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
+__attribute__( ( used ) ) const uint64_t ullICCHPPIR = portICCHPPIR_HIGHEST_PRIORITY_INTERRUPT_REGISTER_ADDRESS;
+__attribute__( ( used ) ) const uint64_t ullICCAIAR = portICCAIAR_ALIASED_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS;
+__attribute__( ( used ) ) const uint64_t ullICCAEOIR = portICCAEOIR_ALIASED_END_OF_INTERRUPT_REGISTER_ADDRESS;
 
 /*-----------------------------------------------------------*/
 

portable/GCC/ARM_AARCH64/portASM.S

@@ -307,13 +307,34 @@ FreeRTOS_IRQ_Handler:
     /* Maintain the interrupt nesting information across the function call. */
     STP     X1, X5, [SP, #-0x10]!
 
-    /* Read value from the interrupt acknowledge register, which is stored in W0
+    /* Read value from the HPPI register 
-    for future parameter and interrupt clearing use. */
+     * In GIC v2, the HPPI register will contain:
-    LDR     X2, ullICCIARConst
+     *  - 0x3FF on GIC ack or spurious IRQ
-    LDR     X3, [X2]
+     *  - 0x3FE on pending IRQ within Group 1 (IRQ, non-secure)
-    LDR     W0, [X3]    /* ICCIAR in W0 as parameter. */
+     *  - IRQn on pending IRQ within Group 0 (FIQ, secure)
+     *
+     * X0 to contain IRQn
+     * X1 to contain IRQn Group number
+     */
+    LDR     X2, ullICCHPPIRConst
+    LDR     X2, [X2]
+    LDR     W3, [X2]
+    CMP     W3, #0x3FE
+    B.NE    1f
+    
+    /*      if IRQn Group 1, AIAR contains IRQn */
+2:  LDR     X2, ullICCAIARConst
+    MOV     X1, #1
+    B       0f
+    
+    /*      if IRQn Group 0, IAR contains IRQn */
+1:  LDR     X2, ullICCIARConst
+    MOV     X1, #0
 
-    /* Maintain the ICCIAR value across the function call. */
+0:  LDR     W2, [X2]
+    LDR     W0, [X2]
+
+    /* Maintain the IRQn value across the function call. */
     STP     X0, X1, [SP, #-0x10]!
 
     /* Call the C handler. */
@@ -324,12 +345,25 @@ FreeRTOS_IRQ_Handler:
     DSB     SY
     ISB     SY
 
-    /* Restore the ICCIAR value. */
+    /* Restore the IRqn value. */
     LDP     X0, X1, [SP], #0x10
 
-    /* End IRQ processing by writing ICCIAR to the EOI register. */
+    /* End IRQ processing by writing to the EOI register. 
-    LDR     X4, ullICCEOIRConst
+     * In GIV v2, the EOI register to be used depends on the interrupt group:
-    LDR     X4, [X4]
+     *  - IRQn Group 0 -> EOI
+     *  - IRQn Group 1 -> AEOI
+     */
+    CMP     X1, #1
+    B.NE    1f
+
+    /*      if IRQn Group 1, use AEOIR */
+2:  LDR     X4, ullICCAEOIRConst
+    B       0f
+
+    /*      if IRQn Group 0, use EOIR */
+1:  LDR     X4, ullICCEOIRConst
+
+0:  LDR     W4, [X4]
     STR     W0, [X4]
 
     /* Restore the critical nesting count. */
@@ -420,6 +454,9 @@ ullPortInterruptNestingConst: .dword ullPortInterruptNesting
 ullPortYieldRequiredConst: .dword ullPortYieldRequired
 ullICCIARConst: .dword ullICCIAR
 ullICCEOIRConst: .dword ullICCEOIR
+ullICCHPPIRConst: .dword ullICCHPPIR
+ullICCAIARConst: .dword ullICCAIAR
+ullICCAEOIRConst: .dword ullICCAEOIR
 vApplicationIRQHandlerConst: .word vApplicationIRQHandler
 
 

portable/GCC/ARM_AARCH64/portmacro.h

@@ -204,14 +204,21 @@ void FreeRTOS_Tick_Handler( void );
 #define portICCEOIR_END_OF_INTERRUPT_OFFSET                  ( 0x10 )
 #define portICCBPR_BINARY_POINT_OFFSET                       ( 0x08 )
 #define portICCRPR_RUNNING_PRIORITY_OFFSET                   ( 0x14 )
+#define portICCHPPIR_HIGHEST_PRIORITY_INTERRUPT_OFFSET       ( 0x18 )
+#define portICCAIAR_ALIASED_INTERRUPT_ACKNOWLEDGE_OFFSET     ( 0x20 )
+#define portICCAEOIR_ALIASED_END_OF_INTERRUPT_OFFSET         ( 0x24 )
+
+#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS              ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )
+#define portICCPMR_PRIORITY_MASK_REGISTER                           ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
+#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS           ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )
+#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS               ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )
+#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS                   ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )
+#define portICCBPR_BINARY_POINT_REGISTER                            ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )
+#define portICCRPR_RUNNING_PRIORITY_REGISTER                        ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )
+#define portICCHPPIR_HIGHEST_PRIORITY_INTERRUPT_REGISTER_ADDRESS    ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCHPPIR_HIGHEST_PRIORITY_INTERRUPT_OFFSET )
+#define portICCAIAR_ALIASED_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS  ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCAIAR_ALIASED_INTERRUPT_ACKNOWLEDGE_OFFSET )
+#define portICCAEOIR_ALIASED_END_OF_INTERRUPT_REGISTER_ADDRESS      ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCAEOIR_ALIASED_END_OF_INTERRUPT_OFFSET )
 
-#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS       ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )
-#define portICCPMR_PRIORITY_MASK_REGISTER                    ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
-#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS    ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )
-#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS        ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )
-#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS            ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )
-#define portICCBPR_BINARY_POINT_REGISTER                     ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )
-#define portICCRPR_RUNNING_PRIORITY_REGISTER                 ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )
 
 #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 

portable/MPLAB/PIC32MZ/port.c

@@ -234,6 +234,11 @@ __attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
 {
 const uint32_t ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1UL;
 
+    /* PR1 is 16-bit. Ensure that the configPERIPHERAL_CLOCK_HZ and
+     * configTICK_RATE_HZ are defined such that ulCompareMatch value would fit
+     * in 16-bits. */
+    configASSERT( ( ulCompareMatch & 0xFFFF0000 ) == 0 );
+
     T1CON = 0x0000;
     T1CONbits.TCKPS = portPRESCALE_BITS;
     PR1 = ulCompareMatch;