From 66466793d5baf1e42c1a92d7a9c3f7d69c24662f Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Wed, 18 Aug 2021 16:21:55 -0700 Subject: [PATCH 01/24] Pre-allocate secure-side context structures This commit improves ARMv8-M security by pre-allocating secure-side task context structures and changing how tasks reference a secure-side context structure when calling a secure function. The new configuration constant secureconfigMAX_SECURE_CONTEXTS sets the number of secure context structures to pre-allocate. secureconfigMAX_SECURE_CONTEXTS defaults to 8 if left undefined. Signed-off-by: Gaurav Aggarwal --- .../GCC/ARM_CM23/secure_context_port.c | 72 +++++---- .../GCC/ARM_CM33/secure_context_port.c | 73 +++++---- .../IAR/ARM_CM23/secure_context_port.c | 48 ------ .../IAR/ARM_CM23/secure_context_port_asm.s | 74 +++++---- .../IAR/ARM_CM33/secure_context_port.c | 48 ------ .../IAR/ARM_CM33/secure_context_port_asm.s | 75 +++++---- .../ARMv8M/secure/context/secure_context.c | 151 ++++++++++++++---- .../ARMv8M/secure/context/secure_context.h | 22 ++- portable/ARMv8M/secure/heap/secure_heap.c | 4 +- portable/GCC/ARM_CM23/secure/secure_context.c | 151 ++++++++++++++---- portable/GCC/ARM_CM23/secure/secure_context.h | 22 ++- .../GCC/ARM_CM23/secure/secure_context_port.c | 72 +++++---- portable/GCC/ARM_CM23/secure/secure_heap.c | 4 +- portable/GCC/ARM_CM33/secure/secure_context.c | 151 ++++++++++++++---- portable/GCC/ARM_CM33/secure/secure_context.h | 22 ++- .../GCC/ARM_CM33/secure/secure_context_port.c | 73 +++++---- portable/GCC/ARM_CM33/secure/secure_heap.c | 4 +- portable/IAR/ARM_CM23/secure/secure_context.c | 151 ++++++++++++++---- portable/IAR/ARM_CM23/secure/secure_context.h | 22 ++- .../IAR/ARM_CM23/secure/secure_context_port.c | 48 ------ .../ARM_CM23/secure/secure_context_port_asm.s | 74 +++++---- portable/IAR/ARM_CM23/secure/secure_heap.c | 4 +- portable/IAR/ARM_CM33/secure/secure_context.c | 151 ++++++++++++++---- portable/IAR/ARM_CM33/secure/secure_context.h | 22 ++- .../IAR/ARM_CM33/secure/secure_context_port.c | 48 ------ .../ARM_CM33/secure/secure_context_port_asm.s | 75 +++++---- portable/IAR/ARM_CM33/secure/secure_heap.c | 4 +- 27 files changed, 1012 insertions(+), 653 deletions(-) delete mode 100644 portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c delete mode 100644 portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c delete mode 100644 portable/IAR/ARM_CM23/secure/secure_context_port.c delete mode 100644 portable/IAR/ARM_CM33/secure/secure_context_port.c diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c index ade0abf83..9629775de 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c @@ -35,56 +35,60 @@ #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. #endif -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) { - /* xSecureContextHandle value is in r0. */ + /* pxSecureContext value is in r0. */ __asm volatile ( - " .syntax unified \n" - " \n" - " mrs r1, ipsr \n"/* r1 = IPSR. */ - " cbz r1, load_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */ - " ldmia r0!, {r1, r2} \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */ + " .syntax unified \n" + " \n" + " mrs r1, ipsr \n" /* r1 = IPSR. */ + " cbz r1, load_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ + " ldmia r0!, {r1, r2} \n" /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */ + " \n" #if ( configENABLE_MPU == 1 ) - " ldmia r1!, {r3} \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */ - " msr control, r3 \n"/* CONTROL = r3. */ + " ldmia r1!, {r3} \n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */ + " msr control, r3 \n" /* CONTROL = r3. */ #endif /* configENABLE_MPU */ - " msr psplim, r2 \n"/* PSPLIM = r2. */ - " msr psp, r1 \n"/* PSP = r1. */ - " \n" - " load_ctx_therad_mode: \n" - " nop \n" - " \n" + " \n" + " msr psplim, r2 \n" /* PSPLIM = r2. */ + " msr psp, r1 \n" /* PSP = r1. */ + " \n" + " load_ctx_therad_mode: \n" + " bx lr \n" + " \n" ::: "r0", "r1", "r2" ); } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ) { - /* xSecureContextHandle value is in r0. */ + /* pxSecureContext value is in r0. */ __asm volatile ( - " .syntax unified \n" - " \n" - " mrs r1, ipsr \n"/* r1 = IPSR. */ - " cbz r1, save_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */ - " mrs r1, psp \n"/* r1 = PSP. */ + " .syntax unified \n" + " \n" + " mrs r1, ipsr \n" /* r1 = IPSR. */ + " cbz r1, save_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ + " mrs r1, psp \n" /* r1 = PSP. */ + " \n" #if ( configENABLE_MPU == 1 ) - " mrs r2, control \n"/* r2 = CONTROL. */ - " subs r1, r1, #4 \n"/* Make space for the CONTROL value on the stack. */ - " str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ - " stmia r1!, {r2} \n"/* Store CONTROL value on the stack. */ + " mrs r2, control \n" /* r2 = CONTROL. */ + " subs r1, r1, #4 \n" /* Make space for the CONTROL value on the stack. */ + " str r1, [r0] \n" /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ + " stmia r1!, {r2} \n" /* Store CONTROL value on the stack. */ #else /* configENABLE_MPU */ - " str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ + " str r1, [r0] \n" /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ #endif /* configENABLE_MPU */ - " movs r1, %0 \n"/* r1 = securecontextNO_STACK. */ - " msr psplim, r1 \n"/* PSPLIM = securecontextNO_STACK. */ - " msr psp, r1 \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ - " \n" - " save_ctx_therad_mode: \n" - " nop \n" - " \n" + " \n" + " movs r1, %0 \n" /* r1 = securecontextNO_STACK. */ + " msr psplim, r1 \n" /* PSPLIM = securecontextNO_STACK. */ + " msr psp, r1 \n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + " \n" + " save_ctx_therad_mode: \n" + " bx lr \n" + " \n" ::"i" ( securecontextNO_STACK ) : "r1", "memory" ); } diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c index 64b2e7a43..be5bbd2d1 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c @@ -31,57 +31,62 @@ /* Secure port macros. */ #include "secure_port_macros.h" -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) { - /* xSecureContextHandle value is in r0. */ + /* pxSecureContext value is in r0. */ __asm volatile ( - " .syntax unified \n" - " \n" - " mrs r1, ipsr \n"/* r1 = IPSR. */ - " cbz r1, load_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */ - " ldmia r0!, {r1, r2} \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */ + " .syntax unified \n" + " \n" + " mrs r1, ipsr \n" /* r1 = IPSR. */ + " cbz r1, load_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ + " ldmia r0!, {r1, r2} \n" /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */ + " \n" #if ( configENABLE_MPU == 1 ) - " ldmia r1!, {r3} \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */ - " msr control, r3 \n"/* CONTROL = r3. */ + " ldmia r1!, {r3} \n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */ + " msr control, r3 \n" /* CONTROL = r3. */ #endif /* configENABLE_MPU */ - " msr psplim, r2 \n"/* PSPLIM = r2. */ - " msr psp, r1 \n"/* PSP = r1. */ - " \n" - " load_ctx_therad_mode: \n" - " nop \n" - " \n" + " \n" + " msr psplim, r2 \n" /* PSPLIM = r2. */ + " msr psp, r1 \n" /* PSP = r1. */ + " \n" + " load_ctx_therad_mode: \n" + " bx lr \n" + " \n" ::: "r0", "r1", "r2" ); } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ) { - /* xSecureContextHandle value is in r0. */ + /* pxSecureContext value is in r0. */ __asm volatile ( - " .syntax unified \n" - " \n" - " mrs r1, ipsr \n"/* r1 = IPSR. */ - " cbz r1, save_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */ - " mrs r1, psp \n"/* r1 = PSP. */ + " .syntax unified \n" + " \n" + " mrs r1, ipsr \n" /* r1 = IPSR. */ + " cbz r1, save_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ + " mrs r1, psp \n" /* r1 = PSP. */ + " \n" #if ( configENABLE_FPU == 1 ) - " vstmdb r1!, {s0} \n"/* Trigger the defferred stacking of FPU registers. */ - " vldmia r1!, {s0} \n"/* Nullify the effect of the pervious statement. */ + " vstmdb r1!, {s0} \n" /* Trigger the defferred stacking of FPU registers. */ + " vldmia r1!, {s0} \n" /* Nullify the effect of the pervious statement. */ #endif /* configENABLE_FPU */ + " \n" #if ( configENABLE_MPU == 1 ) - " mrs r2, control \n"/* r2 = CONTROL. */ - " stmdb r1!, {r2} \n"/* Store CONTROL value on the stack. */ + " mrs r2, control \n" /* r2 = CONTROL. */ + " stmdb r1!, {r2} \n" /* Store CONTROL value on the stack. */ #endif /* configENABLE_MPU */ - " str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ - " movs r1, %0 \n"/* r1 = securecontextNO_STACK. */ - " msr psplim, r1 \n"/* PSPLIM = securecontextNO_STACK. */ - " msr psp, r1 \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ - " \n" - " save_ctx_therad_mode: \n" - " nop \n" - " \n" + " \n" + " str r1, [r0] \n" /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ + " movs r1, %0 \n" /* r1 = securecontextNO_STACK. */ + " msr psplim, r1 \n" /* PSPLIM = securecontextNO_STACK. */ + " msr psp, r1 \n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + " \n" + " save_ctx_therad_mode: \n" + " bx lr \n" + " \n" ::"i" ( securecontextNO_STACK ) : "r1", "memory" ); } diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c deleted file mode 100644 index 455b90c1e..000000000 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * FreeRTOS Kernel V10.4.3 - * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * https://www.FreeRTOS.org - * https://github.com/FreeRTOS - * - * 1 tab == 4 spaces! - */ - -/* Secure context includes. */ -#include "secure_context.h" - -/* Secure port macros. */ -#include "secure_port_macros.h" - -/* Functions implemented in assembler file. */ -extern void SecureContext_LoadContextAsm( SecureContextHandle_t xSecureContextHandle ); -extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHandle ); - -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) -{ - SecureContext_LoadContextAsm( xSecureContextHandle ); -} -/*-----------------------------------------------------------*/ - -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) -{ - SecureContext_SaveContextAsm( xSecureContextHandle ); -} -/*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s index 1f793f205..6864e1dfb 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s @@ -25,52 +25,56 @@ * 1 tab == 4 spaces! */ - SECTION .text:CODE:NOROOT(2) - THUMB + SECTION .text:CODE:NOROOT(2) + THUMB - PUBLIC SecureContext_LoadContextAsm - PUBLIC SecureContext_SaveContextAsm + PUBLIC SecureContext_LoadContextAsm + PUBLIC SecureContext_SaveContextAsm #if ( configENABLE_FPU == 1 ) - #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. + #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. #endif /*-----------------------------------------------------------*/ SecureContext_LoadContextAsm: - /* xSecureContextHandle value is in r0. */ - mrs r1, ipsr /* r1 = IPSR. */ - cbz r1, load_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ - ldmia r0!, {r1, r2} /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */ -#if ( configENABLE_MPU == 1 ) - ldmia r1!, {r3} /* Read CONTROL register value from task's stack. r3 = CONTROL. */ - msr control, r3 /* CONTROL = r3. */ -#endif /* configENABLE_MPU */ - msr psplim, r2 /* PSPLIM = r2. */ - msr psp, r1 /* PSP = r1. */ + /* pxSecureContext value is in r0. */ + mrs r1, ipsr /* r1 = IPSR. */ + cbz r1, load_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ + ldmia r0!, {r1, r2} /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */ - load_ctx_therad_mode: - bx lr +#if ( configENABLE_MPU == 1 ) + ldmia r1!, {r3} /* Read CONTROL register value from task's stack. r3 = CONTROL. */ + msr control, r3 /* CONTROL = r3. */ +#endif /* configENABLE_MPU */ + + msr psplim, r2 /* PSPLIM = r2. */ + msr psp, r1 /* PSP = r1. */ + + load_ctx_therad_mode: + bx lr /*-----------------------------------------------------------*/ SecureContext_SaveContextAsm: - /* xSecureContextHandle value is in r0. */ - mrs r1, ipsr /* r1 = IPSR. */ - cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ - mrs r1, psp /* r1 = PSP. */ -#if ( configENABLE_MPU == 1 ) - mrs r2, control /* r2 = CONTROL. */ - subs r1, r1, #4 /* Make space for the CONTROL value on the stack. */ - str r1, [r0] /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ - stmia r1!, {r2} /* Store CONTROL value on the stack. */ -#else /* configENABLE_MPU */ - str r1, [r0] /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ -#endif /* configENABLE_MPU */ - movs r1, #0 /* r1 = securecontextNO_STACK. */ - msr psplim, r1 /* PSPLIM = securecontextNO_STACK. */ - msr psp, r1 /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + /* pxSecureContext value is in r0. */ + mrs r1, ipsr /* r1 = IPSR. */ + cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ + mrs r1, psp /* r1 = PSP. */ - save_ctx_therad_mode: - bx lr +#if ( configENABLE_MPU == 1 ) + mrs r2, control /* r2 = CONTROL. */ + subs r1, r1, #4 /* Make space for the CONTROL value on the stack. */ + str r1, [r0] /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ + stmia r1!, {r2} /* Store CONTROL value on the stack. */ +#else /* configENABLE_MPU */ + str r1, [r0] /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ +#endif /* configENABLE_MPU */ + + movs r1, #0 /* r1 = securecontextNO_STACK. */ + msr psplim, r1 /* PSPLIM = securecontextNO_STACK. */ + msr psp, r1 /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + + save_ctx_therad_mode: + bx lr /*-----------------------------------------------------------*/ - END + END diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c deleted file mode 100644 index 455b90c1e..000000000 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * FreeRTOS Kernel V10.4.3 - * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * https://www.FreeRTOS.org - * https://github.com/FreeRTOS - * - * 1 tab == 4 spaces! - */ - -/* Secure context includes. */ -#include "secure_context.h" - -/* Secure port macros. */ -#include "secure_port_macros.h" - -/* Functions implemented in assembler file. */ -extern void SecureContext_LoadContextAsm( SecureContextHandle_t xSecureContextHandle ); -extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHandle ); - -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) -{ - SecureContext_LoadContextAsm( xSecureContextHandle ); -} -/*-----------------------------------------------------------*/ - -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) -{ - SecureContext_SaveContextAsm( xSecureContextHandle ); -} -/*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s index d2c599d65..714e0b05a 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s @@ -25,49 +25,54 @@ * 1 tab == 4 spaces! */ - SECTION .text:CODE:NOROOT(2) - THUMB + SECTION .text:CODE:NOROOT(2) + THUMB - PUBLIC SecureContext_LoadContextAsm - PUBLIC SecureContext_SaveContextAsm + PUBLIC SecureContext_LoadContextAsm + PUBLIC SecureContext_SaveContextAsm /*-----------------------------------------------------------*/ SecureContext_LoadContextAsm: - /* xSecureContextHandle value is in r0. */ - mrs r1, ipsr /* r1 = IPSR. */ - cbz r1, load_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ - ldmia r0!, {r1, r2} /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */ -#if ( configENABLE_MPU == 1 ) - ldmia r1!, {r3} /* Read CONTROL register value from task's stack. r3 = CONTROL. */ - msr control, r3 /* CONTROL = r3. */ -#endif /* configENABLE_MPU */ - msr psplim, r2 /* PSPLIM = r2. */ - msr psp, r1 /* PSP = r1. */ + /* pxSecureContext value is in r0. */ + mrs r1, ipsr /* r1 = IPSR. */ + cbz r1, load_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ + ldmia r0!, {r1, r2} /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */ - load_ctx_therad_mode: - bx lr +#if ( configENABLE_MPU == 1 ) + ldmia r1!, {r3} /* Read CONTROL register value from task's stack. r3 = CONTROL. */ + msr control, r3 /* CONTROL = r3. */ +#endif /* configENABLE_MPU */ + + msr psplim, r2 /* PSPLIM = r2. */ + msr psp, r1 /* PSP = r1. */ + + load_ctx_therad_mode: + bx lr /*-----------------------------------------------------------*/ SecureContext_SaveContextAsm: - /* xSecureContextHandle value is in r0. */ - mrs r1, ipsr /* r1 = IPSR. */ - cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ - mrs r1, psp /* r1 = PSP. */ -#if ( configENABLE_FPU == 1 ) - vstmdb r1!, {s0} /* Trigger the defferred stacking of FPU registers. */ - vldmia r1!, {s0} /* Nullify the effect of the pervious statement. */ -#endif /* configENABLE_FPU */ -#if ( configENABLE_MPU == 1 ) - mrs r2, control /* r2 = CONTROL. */ - stmdb r1!, {r2} /* Store CONTROL value on the stack. */ -#endif /* configENABLE_MPU */ - str r1, [r0] /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ - movs r1, #0 /* r1 = securecontextNO_STACK. */ - msr psplim, r1 /* PSPLIM = securecontextNO_STACK. */ - msr psp, r1 /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + /* pxSecureContext value is in r0. */ + mrs r1, ipsr /* r1 = IPSR. */ + cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ + mrs r1, psp /* r1 = PSP. */ - save_ctx_therad_mode: - bx lr +#if ( configENABLE_FPU == 1 ) + vstmdb r1!, {s0} /* Trigger the defferred stacking of FPU registers. */ + vldmia r1!, {s0} /* Nullify the effect of the pervious statement. */ +#endif /* configENABLE_FPU */ + +#if ( configENABLE_MPU == 1 ) + mrs r2, control /* r2 = CONTROL. */ + stmdb r1!, {r2} /* Store CONTROL value on the stack. */ +#endif /* configENABLE_MPU */ + + str r1, [r0] /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ + movs r1, #0 /* r1 = securecontextNO_STACK. */ + msr psplim, r1 /* PSPLIM = securecontextNO_STACK. */ + msr psp, r1 /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + + save_ctx_therad_mode: + bx lr /*-----------------------------------------------------------*/ - END + END diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c index 046bf4e51..e3d2cdecc 100644 --- a/portable/ARMv8M/secure/context/secure_context.c +++ b/portable/ARMv8M/secure/context/secure_context.c @@ -49,25 +49,74 @@ * Bit[1] - 1 --> Thread mode uses PSP. */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 + +/** + * @brief Invalid context ID. + */ +#define securecontextINVALID_CONTEXT_ID 0UL + +/** + * @brief Maximum number of secure contexts. + */ +#ifndef secureconfigMAX_SECURE_CONTEXTS + #define secureconfigMAX_SECURE_CONTEXTS 8UL +#endif /*-----------------------------------------------------------*/ /** - * @brief Structure to represent secure context. - * - * @note Since stack grows down, pucStackStart is the highest address while - * pucStackLimit is the first addess of the allocated memory. + * @brief Pre-allocated array of secure contexts. */ -typedef struct SecureContext +SecureContext_t xSecureContexts[ secureconfigMAX_SECURE_CONTEXTS ]; +/*-----------------------------------------------------------*/ + +/** + * @brief Get a free context from the secure context pool (xSecureContexts). + * + * @return Index of a free context in the xSecureContexts array. + */ +static uint32_t ulGetSecureContext( void ); + +/** + * @brief Return the secure context to the secure context pool (xSecureContexts). + * + * @param[in] ulSecureContextIndex Index of the context in the xSecureContexts array. + */ +static void vReturnSecureContext( uint32_t ulSecureContextIndex ); + +/* These are implemented in assembly. */ +extern void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ); +extern void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ); +/*-----------------------------------------------------------*/ + +static uint32_t ulGetSecureContext( void ) { - uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ - uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ - uint8_t * pucStackStart; /**< First location of the stack memory. */ -} SecureContext_t; + uint32_t ulSecureContextIndex; + + for( ulSecureContextIndex = 0; ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS; ulSecureContextIndex++ ) + { + if( ( xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer == NULL ) && + ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == NULL ) && + ( xSecureContexts[ ulSecureContextIndex ].pucStackStart == NULL ) ) + { + break; + } + } + + return ulSecureContextIndex; +} +/*-----------------------------------------------------------*/ + +static void vReturnSecureContext( uint32_t ulSecureContextIndex ) +{ + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = NULL; + xSecureContexts[ ulSecureContextIndex ].pucStackLimit = NULL; + xSecureContexts[ ulSecureContextIndex ].pucStackStart = NULL; +} /*-----------------------------------------------------------*/ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) { - uint32_t ulIPSR; + uint32_t ulIPSR, i; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); @@ -80,6 +129,14 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportSET_PSPLIM( securecontextNO_STACK ); secureportSET_PSP( securecontextNO_STACK ); + /* Initialize all secure contexts. */ + for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ ) + { + xSecureContexts[ i ].pucCurrentStackPointer = NULL; + xSecureContexts[ i ].pucStackLimit = NULL; + xSecureContexts[ i ].pucStackStart = NULL; + } + #if ( configENABLE_MPU == 1 ) { /* Configure thread mode to use PSP and to be unprivileged. */ @@ -87,7 +144,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) } #else /* configENABLE_MPU */ { - /* Configure thread mode to use PSP and to be privileged.. */ + /* Configure thread mode to use PSP and to be privileged. */ secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED ); } #endif /* configENABLE_MPU */ @@ -103,8 +160,8 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) #endif /* configENABLE_MPU */ { uint8_t * pucStackMemory = NULL; - uint32_t ulIPSR; - SecureContextHandle_t xSecureContextHandle = NULL; + uint32_t ulIPSR, ulSecureContextIndex; + SecureContextHandle_t xSecureContextHandle; #if ( configENABLE_MPU == 1 ) uint32_t * pulCurrentStackPointer = NULL; @@ -117,10 +174,11 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * when the processor is running in the Thread Mode. */ if( ulIPSR != 0 ) { - /* Allocate the context structure. */ - xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) ); + /* Ontain a free secure context. */ + ulSecureContextIndex = ulGetSecureContext(); - if( xSecureContextHandle != NULL ) + /* Were we able to get a free context? */ + if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) { /* Allocate the stack space. */ pucStackMemory = pvPortMalloc( ulSecureStackSize ); @@ -133,18 +191,18 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * pointer before writing i.e. if stack pointer is 0x2, a push * operation will decrement the stack pointer to 0x1 and then * write at 0x1. */ - xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize; + xSecureContexts[ ulSecureContextIndex ].pucStackStart = pucStackMemory + ulSecureStackSize; /* The stack cannot go beyond this location. This value is * programmed in the PSPLIM register on context switch.*/ - xSecureContextHandle->pucStackLimit = pucStackMemory; + xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; #if ( configENABLE_MPU == 1 ) { /* Store the correct CONTROL value for the task on the stack. * This value is programmed in the CONTROL register on * context switch. */ - pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; + pulCurrentStackPointer = ( uint32_t * ) xSecureContexts[ ulSecureContextIndex ].pucStackStart; pulCurrentStackPointer--; if( ulIsTaskPrivileged ) @@ -158,22 +216,22 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Store the current stack pointer. This value is programmed in * the PSP register on context switch. */ - xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer; + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer; } #else /* configENABLE_MPU */ { /* Current SP is set to the starting of the stack. This * value programmed in the PSP register on context switch. */ - xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart; + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = xSecureContexts[ ulSecureContextIndex ].pucStackStart; } #endif /* configENABLE_MPU */ + + /* Ensure to never return 0 as a valid context handle. */ + xSecureContextHandle = ulSecureContextIndex + 1UL; } else { - /* Free the context to avoid memory leak and make sure to return - * NULL to indicate failure. */ - vPortFree( xSecureContextHandle ); - xSecureContextHandle = NULL; + xSecureContextHandle = securecontextINVALID_CONTEXT_ID; } } } @@ -184,7 +242,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ) { - uint32_t ulIPSR; + uint32_t ulIPSR, ulSecureContextIndex; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); @@ -193,14 +251,43 @@ secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandl * when the processor is running in the Thread Mode. */ if( ulIPSR != 0 ) { - /* Ensure that valid parameters are passed. */ - secureportASSERT( xSecureContextHandle != NULL ); + /* Only free if a valid context handle is passed. */ + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; - /* Free the stack space. */ - vPortFree( xSecureContextHandle->pucStackLimit ); + /* Free the stack space. */ + vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); - /* Free the context itself. */ - vPortFree( xSecureContextHandle ); + /* Return the context back to the free contexts pool. */ + vReturnSecureContext( ulSecureContextIndex ); + } + } +} +/*-----------------------------------------------------------*/ + +secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +{ + uint32_t ulSecureContextIndex; + + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; + + SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } +} +/*-----------------------------------------------------------*/ + +secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +{ + uint32_t ulSecureContextIndex; + + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; + + SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); } } /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/secure/context/secure_context.h b/portable/ARMv8M/secure/context/secure_context.h index 532a407d1..2ae78593f 100644 --- a/portable/ARMv8M/secure/context/secure_context.h +++ b/portable/ARMv8M/secure/context/secure_context.h @@ -35,15 +35,29 @@ #include "FreeRTOSConfig.h" /** - * @brief PSP value when no task's context is loaded. + * @brief PSP value when no secure context is loaded. */ #define securecontextNO_STACK 0x0 +/*-----------------------------------------------------------*/ /** - * @brief Opaque handle. + * @brief Structure to represent a secure context. + * + * @note Since stack grows down, pucStackStart is the highest address while + * pucStackLimit is the first address of the allocated memory. */ -struct SecureContext; -typedef struct SecureContext * SecureContextHandle_t; +typedef struct SecureContext +{ + uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ + uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ + uint8_t * pucStackStart; /**< First location of the stack memory. */ +} SecureContext_t; +/*-----------------------------------------------------------*/ + +/** + * @brief Opaque handle for a secure context. + */ +typedef uint32_t SecureContextHandle_t; /*-----------------------------------------------------------*/ /** diff --git a/portable/ARMv8M/secure/heap/secure_heap.c b/portable/ARMv8M/secure/heap/secure_heap.c index 82dbd9ec3..3b380a9c0 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.c +++ b/portable/ARMv8M/secure/heap/secure_heap.c @@ -37,7 +37,9 @@ /** * @brief Total heap size. */ -#define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) ) +#ifndef secureconfigTOTAL_HEAP_SIZE + #define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) ) +#endif /* No test marker by default. */ #ifndef mtCOVERAGE_TEST_MARKER diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c index 046bf4e51..e3d2cdecc 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/portable/GCC/ARM_CM23/secure/secure_context.c @@ -49,25 +49,74 @@ * Bit[1] - 1 --> Thread mode uses PSP. */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 + +/** + * @brief Invalid context ID. + */ +#define securecontextINVALID_CONTEXT_ID 0UL + +/** + * @brief Maximum number of secure contexts. + */ +#ifndef secureconfigMAX_SECURE_CONTEXTS + #define secureconfigMAX_SECURE_CONTEXTS 8UL +#endif /*-----------------------------------------------------------*/ /** - * @brief Structure to represent secure context. - * - * @note Since stack grows down, pucStackStart is the highest address while - * pucStackLimit is the first addess of the allocated memory. + * @brief Pre-allocated array of secure contexts. */ -typedef struct SecureContext +SecureContext_t xSecureContexts[ secureconfigMAX_SECURE_CONTEXTS ]; +/*-----------------------------------------------------------*/ + +/** + * @brief Get a free context from the secure context pool (xSecureContexts). + * + * @return Index of a free context in the xSecureContexts array. + */ +static uint32_t ulGetSecureContext( void ); + +/** + * @brief Return the secure context to the secure context pool (xSecureContexts). + * + * @param[in] ulSecureContextIndex Index of the context in the xSecureContexts array. + */ +static void vReturnSecureContext( uint32_t ulSecureContextIndex ); + +/* These are implemented in assembly. */ +extern void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ); +extern void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ); +/*-----------------------------------------------------------*/ + +static uint32_t ulGetSecureContext( void ) { - uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ - uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ - uint8_t * pucStackStart; /**< First location of the stack memory. */ -} SecureContext_t; + uint32_t ulSecureContextIndex; + + for( ulSecureContextIndex = 0; ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS; ulSecureContextIndex++ ) + { + if( ( xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer == NULL ) && + ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == NULL ) && + ( xSecureContexts[ ulSecureContextIndex ].pucStackStart == NULL ) ) + { + break; + } + } + + return ulSecureContextIndex; +} +/*-----------------------------------------------------------*/ + +static void vReturnSecureContext( uint32_t ulSecureContextIndex ) +{ + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = NULL; + xSecureContexts[ ulSecureContextIndex ].pucStackLimit = NULL; + xSecureContexts[ ulSecureContextIndex ].pucStackStart = NULL; +} /*-----------------------------------------------------------*/ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) { - uint32_t ulIPSR; + uint32_t ulIPSR, i; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); @@ -80,6 +129,14 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportSET_PSPLIM( securecontextNO_STACK ); secureportSET_PSP( securecontextNO_STACK ); + /* Initialize all secure contexts. */ + for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ ) + { + xSecureContexts[ i ].pucCurrentStackPointer = NULL; + xSecureContexts[ i ].pucStackLimit = NULL; + xSecureContexts[ i ].pucStackStart = NULL; + } + #if ( configENABLE_MPU == 1 ) { /* Configure thread mode to use PSP and to be unprivileged. */ @@ -87,7 +144,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) } #else /* configENABLE_MPU */ { - /* Configure thread mode to use PSP and to be privileged.. */ + /* Configure thread mode to use PSP and to be privileged. */ secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED ); } #endif /* configENABLE_MPU */ @@ -103,8 +160,8 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) #endif /* configENABLE_MPU */ { uint8_t * pucStackMemory = NULL; - uint32_t ulIPSR; - SecureContextHandle_t xSecureContextHandle = NULL; + uint32_t ulIPSR, ulSecureContextIndex; + SecureContextHandle_t xSecureContextHandle; #if ( configENABLE_MPU == 1 ) uint32_t * pulCurrentStackPointer = NULL; @@ -117,10 +174,11 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * when the processor is running in the Thread Mode. */ if( ulIPSR != 0 ) { - /* Allocate the context structure. */ - xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) ); + /* Ontain a free secure context. */ + ulSecureContextIndex = ulGetSecureContext(); - if( xSecureContextHandle != NULL ) + /* Were we able to get a free context? */ + if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) { /* Allocate the stack space. */ pucStackMemory = pvPortMalloc( ulSecureStackSize ); @@ -133,18 +191,18 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * pointer before writing i.e. if stack pointer is 0x2, a push * operation will decrement the stack pointer to 0x1 and then * write at 0x1. */ - xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize; + xSecureContexts[ ulSecureContextIndex ].pucStackStart = pucStackMemory + ulSecureStackSize; /* The stack cannot go beyond this location. This value is * programmed in the PSPLIM register on context switch.*/ - xSecureContextHandle->pucStackLimit = pucStackMemory; + xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; #if ( configENABLE_MPU == 1 ) { /* Store the correct CONTROL value for the task on the stack. * This value is programmed in the CONTROL register on * context switch. */ - pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; + pulCurrentStackPointer = ( uint32_t * ) xSecureContexts[ ulSecureContextIndex ].pucStackStart; pulCurrentStackPointer--; if( ulIsTaskPrivileged ) @@ -158,22 +216,22 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Store the current stack pointer. This value is programmed in * the PSP register on context switch. */ - xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer; + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer; } #else /* configENABLE_MPU */ { /* Current SP is set to the starting of the stack. This * value programmed in the PSP register on context switch. */ - xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart; + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = xSecureContexts[ ulSecureContextIndex ].pucStackStart; } #endif /* configENABLE_MPU */ + + /* Ensure to never return 0 as a valid context handle. */ + xSecureContextHandle = ulSecureContextIndex + 1UL; } else { - /* Free the context to avoid memory leak and make sure to return - * NULL to indicate failure. */ - vPortFree( xSecureContextHandle ); - xSecureContextHandle = NULL; + xSecureContextHandle = securecontextINVALID_CONTEXT_ID; } } } @@ -184,7 +242,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ) { - uint32_t ulIPSR; + uint32_t ulIPSR, ulSecureContextIndex; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); @@ -193,14 +251,43 @@ secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandl * when the processor is running in the Thread Mode. */ if( ulIPSR != 0 ) { - /* Ensure that valid parameters are passed. */ - secureportASSERT( xSecureContextHandle != NULL ); + /* Only free if a valid context handle is passed. */ + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; - /* Free the stack space. */ - vPortFree( xSecureContextHandle->pucStackLimit ); + /* Free the stack space. */ + vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); - /* Free the context itself. */ - vPortFree( xSecureContextHandle ); + /* Return the context back to the free contexts pool. */ + vReturnSecureContext( ulSecureContextIndex ); + } + } +} +/*-----------------------------------------------------------*/ + +secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +{ + uint32_t ulSecureContextIndex; + + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; + + SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } +} +/*-----------------------------------------------------------*/ + +secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +{ + uint32_t ulSecureContextIndex; + + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; + + SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); } } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM23/secure/secure_context.h b/portable/GCC/ARM_CM23/secure/secure_context.h index 532a407d1..2ae78593f 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.h +++ b/portable/GCC/ARM_CM23/secure/secure_context.h @@ -35,15 +35,29 @@ #include "FreeRTOSConfig.h" /** - * @brief PSP value when no task's context is loaded. + * @brief PSP value when no secure context is loaded. */ #define securecontextNO_STACK 0x0 +/*-----------------------------------------------------------*/ /** - * @brief Opaque handle. + * @brief Structure to represent a secure context. + * + * @note Since stack grows down, pucStackStart is the highest address while + * pucStackLimit is the first address of the allocated memory. */ -struct SecureContext; -typedef struct SecureContext * SecureContextHandle_t; +typedef struct SecureContext +{ + uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ + uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ + uint8_t * pucStackStart; /**< First location of the stack memory. */ +} SecureContext_t; +/*-----------------------------------------------------------*/ + +/** + * @brief Opaque handle for a secure context. + */ +typedef uint32_t SecureContextHandle_t; /*-----------------------------------------------------------*/ /** diff --git a/portable/GCC/ARM_CM23/secure/secure_context_port.c b/portable/GCC/ARM_CM23/secure/secure_context_port.c index ade0abf83..9629775de 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM23/secure/secure_context_port.c @@ -35,56 +35,60 @@ #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. #endif -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) { - /* xSecureContextHandle value is in r0. */ + /* pxSecureContext value is in r0. */ __asm volatile ( - " .syntax unified \n" - " \n" - " mrs r1, ipsr \n"/* r1 = IPSR. */ - " cbz r1, load_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */ - " ldmia r0!, {r1, r2} \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */ + " .syntax unified \n" + " \n" + " mrs r1, ipsr \n" /* r1 = IPSR. */ + " cbz r1, load_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ + " ldmia r0!, {r1, r2} \n" /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */ + " \n" #if ( configENABLE_MPU == 1 ) - " ldmia r1!, {r3} \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */ - " msr control, r3 \n"/* CONTROL = r3. */ + " ldmia r1!, {r3} \n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */ + " msr control, r3 \n" /* CONTROL = r3. */ #endif /* configENABLE_MPU */ - " msr psplim, r2 \n"/* PSPLIM = r2. */ - " msr psp, r1 \n"/* PSP = r1. */ - " \n" - " load_ctx_therad_mode: \n" - " nop \n" - " \n" + " \n" + " msr psplim, r2 \n" /* PSPLIM = r2. */ + " msr psp, r1 \n" /* PSP = r1. */ + " \n" + " load_ctx_therad_mode: \n" + " bx lr \n" + " \n" ::: "r0", "r1", "r2" ); } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ) { - /* xSecureContextHandle value is in r0. */ + /* pxSecureContext value is in r0. */ __asm volatile ( - " .syntax unified \n" - " \n" - " mrs r1, ipsr \n"/* r1 = IPSR. */ - " cbz r1, save_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */ - " mrs r1, psp \n"/* r1 = PSP. */ + " .syntax unified \n" + " \n" + " mrs r1, ipsr \n" /* r1 = IPSR. */ + " cbz r1, save_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ + " mrs r1, psp \n" /* r1 = PSP. */ + " \n" #if ( configENABLE_MPU == 1 ) - " mrs r2, control \n"/* r2 = CONTROL. */ - " subs r1, r1, #4 \n"/* Make space for the CONTROL value on the stack. */ - " str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ - " stmia r1!, {r2} \n"/* Store CONTROL value on the stack. */ + " mrs r2, control \n" /* r2 = CONTROL. */ + " subs r1, r1, #4 \n" /* Make space for the CONTROL value on the stack. */ + " str r1, [r0] \n" /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ + " stmia r1!, {r2} \n" /* Store CONTROL value on the stack. */ #else /* configENABLE_MPU */ - " str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ + " str r1, [r0] \n" /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ #endif /* configENABLE_MPU */ - " movs r1, %0 \n"/* r1 = securecontextNO_STACK. */ - " msr psplim, r1 \n"/* PSPLIM = securecontextNO_STACK. */ - " msr psp, r1 \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ - " \n" - " save_ctx_therad_mode: \n" - " nop \n" - " \n" + " \n" + " movs r1, %0 \n" /* r1 = securecontextNO_STACK. */ + " msr psplim, r1 \n" /* PSPLIM = securecontextNO_STACK. */ + " msr psp, r1 \n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + " \n" + " save_ctx_therad_mode: \n" + " bx lr \n" + " \n" ::"i" ( securecontextNO_STACK ) : "r1", "memory" ); } diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.c b/portable/GCC/ARM_CM23/secure/secure_heap.c index 82dbd9ec3..3b380a9c0 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.c +++ b/portable/GCC/ARM_CM23/secure/secure_heap.c @@ -37,7 +37,9 @@ /** * @brief Total heap size. */ -#define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) ) +#ifndef secureconfigTOTAL_HEAP_SIZE + #define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) ) +#endif /* No test marker by default. */ #ifndef mtCOVERAGE_TEST_MARKER diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c index 046bf4e51..e3d2cdecc 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/portable/GCC/ARM_CM33/secure/secure_context.c @@ -49,25 +49,74 @@ * Bit[1] - 1 --> Thread mode uses PSP. */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 + +/** + * @brief Invalid context ID. + */ +#define securecontextINVALID_CONTEXT_ID 0UL + +/** + * @brief Maximum number of secure contexts. + */ +#ifndef secureconfigMAX_SECURE_CONTEXTS + #define secureconfigMAX_SECURE_CONTEXTS 8UL +#endif /*-----------------------------------------------------------*/ /** - * @brief Structure to represent secure context. - * - * @note Since stack grows down, pucStackStart is the highest address while - * pucStackLimit is the first addess of the allocated memory. + * @brief Pre-allocated array of secure contexts. */ -typedef struct SecureContext +SecureContext_t xSecureContexts[ secureconfigMAX_SECURE_CONTEXTS ]; +/*-----------------------------------------------------------*/ + +/** + * @brief Get a free context from the secure context pool (xSecureContexts). + * + * @return Index of a free context in the xSecureContexts array. + */ +static uint32_t ulGetSecureContext( void ); + +/** + * @brief Return the secure context to the secure context pool (xSecureContexts). + * + * @param[in] ulSecureContextIndex Index of the context in the xSecureContexts array. + */ +static void vReturnSecureContext( uint32_t ulSecureContextIndex ); + +/* These are implemented in assembly. */ +extern void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ); +extern void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ); +/*-----------------------------------------------------------*/ + +static uint32_t ulGetSecureContext( void ) { - uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ - uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ - uint8_t * pucStackStart; /**< First location of the stack memory. */ -} SecureContext_t; + uint32_t ulSecureContextIndex; + + for( ulSecureContextIndex = 0; ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS; ulSecureContextIndex++ ) + { + if( ( xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer == NULL ) && + ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == NULL ) && + ( xSecureContexts[ ulSecureContextIndex ].pucStackStart == NULL ) ) + { + break; + } + } + + return ulSecureContextIndex; +} +/*-----------------------------------------------------------*/ + +static void vReturnSecureContext( uint32_t ulSecureContextIndex ) +{ + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = NULL; + xSecureContexts[ ulSecureContextIndex ].pucStackLimit = NULL; + xSecureContexts[ ulSecureContextIndex ].pucStackStart = NULL; +} /*-----------------------------------------------------------*/ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) { - uint32_t ulIPSR; + uint32_t ulIPSR, i; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); @@ -80,6 +129,14 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportSET_PSPLIM( securecontextNO_STACK ); secureportSET_PSP( securecontextNO_STACK ); + /* Initialize all secure contexts. */ + for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ ) + { + xSecureContexts[ i ].pucCurrentStackPointer = NULL; + xSecureContexts[ i ].pucStackLimit = NULL; + xSecureContexts[ i ].pucStackStart = NULL; + } + #if ( configENABLE_MPU == 1 ) { /* Configure thread mode to use PSP and to be unprivileged. */ @@ -87,7 +144,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) } #else /* configENABLE_MPU */ { - /* Configure thread mode to use PSP and to be privileged.. */ + /* Configure thread mode to use PSP and to be privileged. */ secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED ); } #endif /* configENABLE_MPU */ @@ -103,8 +160,8 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) #endif /* configENABLE_MPU */ { uint8_t * pucStackMemory = NULL; - uint32_t ulIPSR; - SecureContextHandle_t xSecureContextHandle = NULL; + uint32_t ulIPSR, ulSecureContextIndex; + SecureContextHandle_t xSecureContextHandle; #if ( configENABLE_MPU == 1 ) uint32_t * pulCurrentStackPointer = NULL; @@ -117,10 +174,11 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * when the processor is running in the Thread Mode. */ if( ulIPSR != 0 ) { - /* Allocate the context structure. */ - xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) ); + /* Ontain a free secure context. */ + ulSecureContextIndex = ulGetSecureContext(); - if( xSecureContextHandle != NULL ) + /* Were we able to get a free context? */ + if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) { /* Allocate the stack space. */ pucStackMemory = pvPortMalloc( ulSecureStackSize ); @@ -133,18 +191,18 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * pointer before writing i.e. if stack pointer is 0x2, a push * operation will decrement the stack pointer to 0x1 and then * write at 0x1. */ - xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize; + xSecureContexts[ ulSecureContextIndex ].pucStackStart = pucStackMemory + ulSecureStackSize; /* The stack cannot go beyond this location. This value is * programmed in the PSPLIM register on context switch.*/ - xSecureContextHandle->pucStackLimit = pucStackMemory; + xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; #if ( configENABLE_MPU == 1 ) { /* Store the correct CONTROL value for the task on the stack. * This value is programmed in the CONTROL register on * context switch. */ - pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; + pulCurrentStackPointer = ( uint32_t * ) xSecureContexts[ ulSecureContextIndex ].pucStackStart; pulCurrentStackPointer--; if( ulIsTaskPrivileged ) @@ -158,22 +216,22 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Store the current stack pointer. This value is programmed in * the PSP register on context switch. */ - xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer; + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer; } #else /* configENABLE_MPU */ { /* Current SP is set to the starting of the stack. This * value programmed in the PSP register on context switch. */ - xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart; + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = xSecureContexts[ ulSecureContextIndex ].pucStackStart; } #endif /* configENABLE_MPU */ + + /* Ensure to never return 0 as a valid context handle. */ + xSecureContextHandle = ulSecureContextIndex + 1UL; } else { - /* Free the context to avoid memory leak and make sure to return - * NULL to indicate failure. */ - vPortFree( xSecureContextHandle ); - xSecureContextHandle = NULL; + xSecureContextHandle = securecontextINVALID_CONTEXT_ID; } } } @@ -184,7 +242,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ) { - uint32_t ulIPSR; + uint32_t ulIPSR, ulSecureContextIndex; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); @@ -193,14 +251,43 @@ secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandl * when the processor is running in the Thread Mode. */ if( ulIPSR != 0 ) { - /* Ensure that valid parameters are passed. */ - secureportASSERT( xSecureContextHandle != NULL ); + /* Only free if a valid context handle is passed. */ + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; - /* Free the stack space. */ - vPortFree( xSecureContextHandle->pucStackLimit ); + /* Free the stack space. */ + vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); - /* Free the context itself. */ - vPortFree( xSecureContextHandle ); + /* Return the context back to the free contexts pool. */ + vReturnSecureContext( ulSecureContextIndex ); + } + } +} +/*-----------------------------------------------------------*/ + +secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +{ + uint32_t ulSecureContextIndex; + + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; + + SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } +} +/*-----------------------------------------------------------*/ + +secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +{ + uint32_t ulSecureContextIndex; + + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; + + SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); } } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM33/secure/secure_context.h b/portable/GCC/ARM_CM33/secure/secure_context.h index 532a407d1..2ae78593f 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.h +++ b/portable/GCC/ARM_CM33/secure/secure_context.h @@ -35,15 +35,29 @@ #include "FreeRTOSConfig.h" /** - * @brief PSP value when no task's context is loaded. + * @brief PSP value when no secure context is loaded. */ #define securecontextNO_STACK 0x0 +/*-----------------------------------------------------------*/ /** - * @brief Opaque handle. + * @brief Structure to represent a secure context. + * + * @note Since stack grows down, pucStackStart is the highest address while + * pucStackLimit is the first address of the allocated memory. */ -struct SecureContext; -typedef struct SecureContext * SecureContextHandle_t; +typedef struct SecureContext +{ + uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ + uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ + uint8_t * pucStackStart; /**< First location of the stack memory. */ +} SecureContext_t; +/*-----------------------------------------------------------*/ + +/** + * @brief Opaque handle for a secure context. + */ +typedef uint32_t SecureContextHandle_t; /*-----------------------------------------------------------*/ /** diff --git a/portable/GCC/ARM_CM33/secure/secure_context_port.c b/portable/GCC/ARM_CM33/secure/secure_context_port.c index 64b2e7a43..be5bbd2d1 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM33/secure/secure_context_port.c @@ -31,57 +31,62 @@ /* Secure port macros. */ #include "secure_port_macros.h" -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) { - /* xSecureContextHandle value is in r0. */ + /* pxSecureContext value is in r0. */ __asm volatile ( - " .syntax unified \n" - " \n" - " mrs r1, ipsr \n"/* r1 = IPSR. */ - " cbz r1, load_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */ - " ldmia r0!, {r1, r2} \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */ + " .syntax unified \n" + " \n" + " mrs r1, ipsr \n" /* r1 = IPSR. */ + " cbz r1, load_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ + " ldmia r0!, {r1, r2} \n" /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */ + " \n" #if ( configENABLE_MPU == 1 ) - " ldmia r1!, {r3} \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */ - " msr control, r3 \n"/* CONTROL = r3. */ + " ldmia r1!, {r3} \n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */ + " msr control, r3 \n" /* CONTROL = r3. */ #endif /* configENABLE_MPU */ - " msr psplim, r2 \n"/* PSPLIM = r2. */ - " msr psp, r1 \n"/* PSP = r1. */ - " \n" - " load_ctx_therad_mode: \n" - " nop \n" - " \n" + " \n" + " msr psplim, r2 \n" /* PSPLIM = r2. */ + " msr psp, r1 \n" /* PSP = r1. */ + " \n" + " load_ctx_therad_mode: \n" + " bx lr \n" + " \n" ::: "r0", "r1", "r2" ); } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ) { - /* xSecureContextHandle value is in r0. */ + /* pxSecureContext value is in r0. */ __asm volatile ( - " .syntax unified \n" - " \n" - " mrs r1, ipsr \n"/* r1 = IPSR. */ - " cbz r1, save_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */ - " mrs r1, psp \n"/* r1 = PSP. */ + " .syntax unified \n" + " \n" + " mrs r1, ipsr \n" /* r1 = IPSR. */ + " cbz r1, save_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ + " mrs r1, psp \n" /* r1 = PSP. */ + " \n" #if ( configENABLE_FPU == 1 ) - " vstmdb r1!, {s0} \n"/* Trigger the defferred stacking of FPU registers. */ - " vldmia r1!, {s0} \n"/* Nullify the effect of the pervious statement. */ + " vstmdb r1!, {s0} \n" /* Trigger the defferred stacking of FPU registers. */ + " vldmia r1!, {s0} \n" /* Nullify the effect of the pervious statement. */ #endif /* configENABLE_FPU */ + " \n" #if ( configENABLE_MPU == 1 ) - " mrs r2, control \n"/* r2 = CONTROL. */ - " stmdb r1!, {r2} \n"/* Store CONTROL value on the stack. */ + " mrs r2, control \n" /* r2 = CONTROL. */ + " stmdb r1!, {r2} \n" /* Store CONTROL value on the stack. */ #endif /* configENABLE_MPU */ - " str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ - " movs r1, %0 \n"/* r1 = securecontextNO_STACK. */ - " msr psplim, r1 \n"/* PSPLIM = securecontextNO_STACK. */ - " msr psp, r1 \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ - " \n" - " save_ctx_therad_mode: \n" - " nop \n" - " \n" + " \n" + " str r1, [r0] \n" /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ + " movs r1, %0 \n" /* r1 = securecontextNO_STACK. */ + " msr psplim, r1 \n" /* PSPLIM = securecontextNO_STACK. */ + " msr psp, r1 \n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + " \n" + " save_ctx_therad_mode: \n" + " bx lr \n" + " \n" ::"i" ( securecontextNO_STACK ) : "r1", "memory" ); } diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.c b/portable/GCC/ARM_CM33/secure/secure_heap.c index 82dbd9ec3..3b380a9c0 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.c +++ b/portable/GCC/ARM_CM33/secure/secure_heap.c @@ -37,7 +37,9 @@ /** * @brief Total heap size. */ -#define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) ) +#ifndef secureconfigTOTAL_HEAP_SIZE + #define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) ) +#endif /* No test marker by default. */ #ifndef mtCOVERAGE_TEST_MARKER diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c index 046bf4e51..e3d2cdecc 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/portable/IAR/ARM_CM23/secure/secure_context.c @@ -49,25 +49,74 @@ * Bit[1] - 1 --> Thread mode uses PSP. */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 + +/** + * @brief Invalid context ID. + */ +#define securecontextINVALID_CONTEXT_ID 0UL + +/** + * @brief Maximum number of secure contexts. + */ +#ifndef secureconfigMAX_SECURE_CONTEXTS + #define secureconfigMAX_SECURE_CONTEXTS 8UL +#endif /*-----------------------------------------------------------*/ /** - * @brief Structure to represent secure context. - * - * @note Since stack grows down, pucStackStart is the highest address while - * pucStackLimit is the first addess of the allocated memory. + * @brief Pre-allocated array of secure contexts. */ -typedef struct SecureContext +SecureContext_t xSecureContexts[ secureconfigMAX_SECURE_CONTEXTS ]; +/*-----------------------------------------------------------*/ + +/** + * @brief Get a free context from the secure context pool (xSecureContexts). + * + * @return Index of a free context in the xSecureContexts array. + */ +static uint32_t ulGetSecureContext( void ); + +/** + * @brief Return the secure context to the secure context pool (xSecureContexts). + * + * @param[in] ulSecureContextIndex Index of the context in the xSecureContexts array. + */ +static void vReturnSecureContext( uint32_t ulSecureContextIndex ); + +/* These are implemented in assembly. */ +extern void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ); +extern void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ); +/*-----------------------------------------------------------*/ + +static uint32_t ulGetSecureContext( void ) { - uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ - uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ - uint8_t * pucStackStart; /**< First location of the stack memory. */ -} SecureContext_t; + uint32_t ulSecureContextIndex; + + for( ulSecureContextIndex = 0; ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS; ulSecureContextIndex++ ) + { + if( ( xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer == NULL ) && + ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == NULL ) && + ( xSecureContexts[ ulSecureContextIndex ].pucStackStart == NULL ) ) + { + break; + } + } + + return ulSecureContextIndex; +} +/*-----------------------------------------------------------*/ + +static void vReturnSecureContext( uint32_t ulSecureContextIndex ) +{ + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = NULL; + xSecureContexts[ ulSecureContextIndex ].pucStackLimit = NULL; + xSecureContexts[ ulSecureContextIndex ].pucStackStart = NULL; +} /*-----------------------------------------------------------*/ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) { - uint32_t ulIPSR; + uint32_t ulIPSR, i; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); @@ -80,6 +129,14 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportSET_PSPLIM( securecontextNO_STACK ); secureportSET_PSP( securecontextNO_STACK ); + /* Initialize all secure contexts. */ + for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ ) + { + xSecureContexts[ i ].pucCurrentStackPointer = NULL; + xSecureContexts[ i ].pucStackLimit = NULL; + xSecureContexts[ i ].pucStackStart = NULL; + } + #if ( configENABLE_MPU == 1 ) { /* Configure thread mode to use PSP and to be unprivileged. */ @@ -87,7 +144,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) } #else /* configENABLE_MPU */ { - /* Configure thread mode to use PSP and to be privileged.. */ + /* Configure thread mode to use PSP and to be privileged. */ secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED ); } #endif /* configENABLE_MPU */ @@ -103,8 +160,8 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) #endif /* configENABLE_MPU */ { uint8_t * pucStackMemory = NULL; - uint32_t ulIPSR; - SecureContextHandle_t xSecureContextHandle = NULL; + uint32_t ulIPSR, ulSecureContextIndex; + SecureContextHandle_t xSecureContextHandle; #if ( configENABLE_MPU == 1 ) uint32_t * pulCurrentStackPointer = NULL; @@ -117,10 +174,11 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * when the processor is running in the Thread Mode. */ if( ulIPSR != 0 ) { - /* Allocate the context structure. */ - xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) ); + /* Ontain a free secure context. */ + ulSecureContextIndex = ulGetSecureContext(); - if( xSecureContextHandle != NULL ) + /* Were we able to get a free context? */ + if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) { /* Allocate the stack space. */ pucStackMemory = pvPortMalloc( ulSecureStackSize ); @@ -133,18 +191,18 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * pointer before writing i.e. if stack pointer is 0x2, a push * operation will decrement the stack pointer to 0x1 and then * write at 0x1. */ - xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize; + xSecureContexts[ ulSecureContextIndex ].pucStackStart = pucStackMemory + ulSecureStackSize; /* The stack cannot go beyond this location. This value is * programmed in the PSPLIM register on context switch.*/ - xSecureContextHandle->pucStackLimit = pucStackMemory; + xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; #if ( configENABLE_MPU == 1 ) { /* Store the correct CONTROL value for the task on the stack. * This value is programmed in the CONTROL register on * context switch. */ - pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; + pulCurrentStackPointer = ( uint32_t * ) xSecureContexts[ ulSecureContextIndex ].pucStackStart; pulCurrentStackPointer--; if( ulIsTaskPrivileged ) @@ -158,22 +216,22 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Store the current stack pointer. This value is programmed in * the PSP register on context switch. */ - xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer; + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer; } #else /* configENABLE_MPU */ { /* Current SP is set to the starting of the stack. This * value programmed in the PSP register on context switch. */ - xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart; + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = xSecureContexts[ ulSecureContextIndex ].pucStackStart; } #endif /* configENABLE_MPU */ + + /* Ensure to never return 0 as a valid context handle. */ + xSecureContextHandle = ulSecureContextIndex + 1UL; } else { - /* Free the context to avoid memory leak and make sure to return - * NULL to indicate failure. */ - vPortFree( xSecureContextHandle ); - xSecureContextHandle = NULL; + xSecureContextHandle = securecontextINVALID_CONTEXT_ID; } } } @@ -184,7 +242,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ) { - uint32_t ulIPSR; + uint32_t ulIPSR, ulSecureContextIndex; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); @@ -193,14 +251,43 @@ secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandl * when the processor is running in the Thread Mode. */ if( ulIPSR != 0 ) { - /* Ensure that valid parameters are passed. */ - secureportASSERT( xSecureContextHandle != NULL ); + /* Only free if a valid context handle is passed. */ + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; - /* Free the stack space. */ - vPortFree( xSecureContextHandle->pucStackLimit ); + /* Free the stack space. */ + vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); - /* Free the context itself. */ - vPortFree( xSecureContextHandle ); + /* Return the context back to the free contexts pool. */ + vReturnSecureContext( ulSecureContextIndex ); + } + } +} +/*-----------------------------------------------------------*/ + +secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +{ + uint32_t ulSecureContextIndex; + + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; + + SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } +} +/*-----------------------------------------------------------*/ + +secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +{ + uint32_t ulSecureContextIndex; + + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; + + SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); } } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM23/secure/secure_context.h b/portable/IAR/ARM_CM23/secure/secure_context.h index 532a407d1..2ae78593f 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.h +++ b/portable/IAR/ARM_CM23/secure/secure_context.h @@ -35,15 +35,29 @@ #include "FreeRTOSConfig.h" /** - * @brief PSP value when no task's context is loaded. + * @brief PSP value when no secure context is loaded. */ #define securecontextNO_STACK 0x0 +/*-----------------------------------------------------------*/ /** - * @brief Opaque handle. + * @brief Structure to represent a secure context. + * + * @note Since stack grows down, pucStackStart is the highest address while + * pucStackLimit is the first address of the allocated memory. */ -struct SecureContext; -typedef struct SecureContext * SecureContextHandle_t; +typedef struct SecureContext +{ + uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ + uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ + uint8_t * pucStackStart; /**< First location of the stack memory. */ +} SecureContext_t; +/*-----------------------------------------------------------*/ + +/** + * @brief Opaque handle for a secure context. + */ +typedef uint32_t SecureContextHandle_t; /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port.c b/portable/IAR/ARM_CM23/secure/secure_context_port.c deleted file mode 100644 index 455b90c1e..000000000 --- a/portable/IAR/ARM_CM23/secure/secure_context_port.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * FreeRTOS Kernel V10.4.3 - * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * https://www.FreeRTOS.org - * https://github.com/FreeRTOS - * - * 1 tab == 4 spaces! - */ - -/* Secure context includes. */ -#include "secure_context.h" - -/* Secure port macros. */ -#include "secure_port_macros.h" - -/* Functions implemented in assembler file. */ -extern void SecureContext_LoadContextAsm( SecureContextHandle_t xSecureContextHandle ); -extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHandle ); - -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) -{ - SecureContext_LoadContextAsm( xSecureContextHandle ); -} -/*-----------------------------------------------------------*/ - -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) -{ - SecureContext_SaveContextAsm( xSecureContextHandle ); -} -/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s index 1f793f205..6864e1dfb 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s @@ -25,52 +25,56 @@ * 1 tab == 4 spaces! */ - SECTION .text:CODE:NOROOT(2) - THUMB + SECTION .text:CODE:NOROOT(2) + THUMB - PUBLIC SecureContext_LoadContextAsm - PUBLIC SecureContext_SaveContextAsm + PUBLIC SecureContext_LoadContextAsm + PUBLIC SecureContext_SaveContextAsm #if ( configENABLE_FPU == 1 ) - #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. + #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. #endif /*-----------------------------------------------------------*/ SecureContext_LoadContextAsm: - /* xSecureContextHandle value is in r0. */ - mrs r1, ipsr /* r1 = IPSR. */ - cbz r1, load_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ - ldmia r0!, {r1, r2} /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */ -#if ( configENABLE_MPU == 1 ) - ldmia r1!, {r3} /* Read CONTROL register value from task's stack. r3 = CONTROL. */ - msr control, r3 /* CONTROL = r3. */ -#endif /* configENABLE_MPU */ - msr psplim, r2 /* PSPLIM = r2. */ - msr psp, r1 /* PSP = r1. */ + /* pxSecureContext value is in r0. */ + mrs r1, ipsr /* r1 = IPSR. */ + cbz r1, load_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ + ldmia r0!, {r1, r2} /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */ - load_ctx_therad_mode: - bx lr +#if ( configENABLE_MPU == 1 ) + ldmia r1!, {r3} /* Read CONTROL register value from task's stack. r3 = CONTROL. */ + msr control, r3 /* CONTROL = r3. */ +#endif /* configENABLE_MPU */ + + msr psplim, r2 /* PSPLIM = r2. */ + msr psp, r1 /* PSP = r1. */ + + load_ctx_therad_mode: + bx lr /*-----------------------------------------------------------*/ SecureContext_SaveContextAsm: - /* xSecureContextHandle value is in r0. */ - mrs r1, ipsr /* r1 = IPSR. */ - cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ - mrs r1, psp /* r1 = PSP. */ -#if ( configENABLE_MPU == 1 ) - mrs r2, control /* r2 = CONTROL. */ - subs r1, r1, #4 /* Make space for the CONTROL value on the stack. */ - str r1, [r0] /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ - stmia r1!, {r2} /* Store CONTROL value on the stack. */ -#else /* configENABLE_MPU */ - str r1, [r0] /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ -#endif /* configENABLE_MPU */ - movs r1, #0 /* r1 = securecontextNO_STACK. */ - msr psplim, r1 /* PSPLIM = securecontextNO_STACK. */ - msr psp, r1 /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + /* pxSecureContext value is in r0. */ + mrs r1, ipsr /* r1 = IPSR. */ + cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ + mrs r1, psp /* r1 = PSP. */ - save_ctx_therad_mode: - bx lr +#if ( configENABLE_MPU == 1 ) + mrs r2, control /* r2 = CONTROL. */ + subs r1, r1, #4 /* Make space for the CONTROL value on the stack. */ + str r1, [r0] /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ + stmia r1!, {r2} /* Store CONTROL value on the stack. */ +#else /* configENABLE_MPU */ + str r1, [r0] /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ +#endif /* configENABLE_MPU */ + + movs r1, #0 /* r1 = securecontextNO_STACK. */ + msr psplim, r1 /* PSPLIM = securecontextNO_STACK. */ + msr psp, r1 /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + + save_ctx_therad_mode: + bx lr /*-----------------------------------------------------------*/ - END + END diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.c b/portable/IAR/ARM_CM23/secure/secure_heap.c index 82dbd9ec3..3b380a9c0 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.c +++ b/portable/IAR/ARM_CM23/secure/secure_heap.c @@ -37,7 +37,9 @@ /** * @brief Total heap size. */ -#define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) ) +#ifndef secureconfigTOTAL_HEAP_SIZE + #define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) ) +#endif /* No test marker by default. */ #ifndef mtCOVERAGE_TEST_MARKER diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c index 046bf4e51..e3d2cdecc 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/portable/IAR/ARM_CM33/secure/secure_context.c @@ -49,25 +49,74 @@ * Bit[1] - 1 --> Thread mode uses PSP. */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 + +/** + * @brief Invalid context ID. + */ +#define securecontextINVALID_CONTEXT_ID 0UL + +/** + * @brief Maximum number of secure contexts. + */ +#ifndef secureconfigMAX_SECURE_CONTEXTS + #define secureconfigMAX_SECURE_CONTEXTS 8UL +#endif /*-----------------------------------------------------------*/ /** - * @brief Structure to represent secure context. - * - * @note Since stack grows down, pucStackStart is the highest address while - * pucStackLimit is the first addess of the allocated memory. + * @brief Pre-allocated array of secure contexts. */ -typedef struct SecureContext +SecureContext_t xSecureContexts[ secureconfigMAX_SECURE_CONTEXTS ]; +/*-----------------------------------------------------------*/ + +/** + * @brief Get a free context from the secure context pool (xSecureContexts). + * + * @return Index of a free context in the xSecureContexts array. + */ +static uint32_t ulGetSecureContext( void ); + +/** + * @brief Return the secure context to the secure context pool (xSecureContexts). + * + * @param[in] ulSecureContextIndex Index of the context in the xSecureContexts array. + */ +static void vReturnSecureContext( uint32_t ulSecureContextIndex ); + +/* These are implemented in assembly. */ +extern void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ); +extern void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ); +/*-----------------------------------------------------------*/ + +static uint32_t ulGetSecureContext( void ) { - uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ - uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ - uint8_t * pucStackStart; /**< First location of the stack memory. */ -} SecureContext_t; + uint32_t ulSecureContextIndex; + + for( ulSecureContextIndex = 0; ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS; ulSecureContextIndex++ ) + { + if( ( xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer == NULL ) && + ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == NULL ) && + ( xSecureContexts[ ulSecureContextIndex ].pucStackStart == NULL ) ) + { + break; + } + } + + return ulSecureContextIndex; +} +/*-----------------------------------------------------------*/ + +static void vReturnSecureContext( uint32_t ulSecureContextIndex ) +{ + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = NULL; + xSecureContexts[ ulSecureContextIndex ].pucStackLimit = NULL; + xSecureContexts[ ulSecureContextIndex ].pucStackStart = NULL; +} /*-----------------------------------------------------------*/ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) { - uint32_t ulIPSR; + uint32_t ulIPSR, i; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); @@ -80,6 +129,14 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportSET_PSPLIM( securecontextNO_STACK ); secureportSET_PSP( securecontextNO_STACK ); + /* Initialize all secure contexts. */ + for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ ) + { + xSecureContexts[ i ].pucCurrentStackPointer = NULL; + xSecureContexts[ i ].pucStackLimit = NULL; + xSecureContexts[ i ].pucStackStart = NULL; + } + #if ( configENABLE_MPU == 1 ) { /* Configure thread mode to use PSP and to be unprivileged. */ @@ -87,7 +144,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) } #else /* configENABLE_MPU */ { - /* Configure thread mode to use PSP and to be privileged.. */ + /* Configure thread mode to use PSP and to be privileged. */ secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED ); } #endif /* configENABLE_MPU */ @@ -103,8 +160,8 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) #endif /* configENABLE_MPU */ { uint8_t * pucStackMemory = NULL; - uint32_t ulIPSR; - SecureContextHandle_t xSecureContextHandle = NULL; + uint32_t ulIPSR, ulSecureContextIndex; + SecureContextHandle_t xSecureContextHandle; #if ( configENABLE_MPU == 1 ) uint32_t * pulCurrentStackPointer = NULL; @@ -117,10 +174,11 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * when the processor is running in the Thread Mode. */ if( ulIPSR != 0 ) { - /* Allocate the context structure. */ - xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) ); + /* Ontain a free secure context. */ + ulSecureContextIndex = ulGetSecureContext(); - if( xSecureContextHandle != NULL ) + /* Were we able to get a free context? */ + if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) { /* Allocate the stack space. */ pucStackMemory = pvPortMalloc( ulSecureStackSize ); @@ -133,18 +191,18 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * pointer before writing i.e. if stack pointer is 0x2, a push * operation will decrement the stack pointer to 0x1 and then * write at 0x1. */ - xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize; + xSecureContexts[ ulSecureContextIndex ].pucStackStart = pucStackMemory + ulSecureStackSize; /* The stack cannot go beyond this location. This value is * programmed in the PSPLIM register on context switch.*/ - xSecureContextHandle->pucStackLimit = pucStackMemory; + xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; #if ( configENABLE_MPU == 1 ) { /* Store the correct CONTROL value for the task on the stack. * This value is programmed in the CONTROL register on * context switch. */ - pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; + pulCurrentStackPointer = ( uint32_t * ) xSecureContexts[ ulSecureContextIndex ].pucStackStart; pulCurrentStackPointer--; if( ulIsTaskPrivileged ) @@ -158,22 +216,22 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Store the current stack pointer. This value is programmed in * the PSP register on context switch. */ - xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer; + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer; } #else /* configENABLE_MPU */ { /* Current SP is set to the starting of the stack. This * value programmed in the PSP register on context switch. */ - xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart; + xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = xSecureContexts[ ulSecureContextIndex ].pucStackStart; } #endif /* configENABLE_MPU */ + + /* Ensure to never return 0 as a valid context handle. */ + xSecureContextHandle = ulSecureContextIndex + 1UL; } else { - /* Free the context to avoid memory leak and make sure to return - * NULL to indicate failure. */ - vPortFree( xSecureContextHandle ); - xSecureContextHandle = NULL; + xSecureContextHandle = securecontextINVALID_CONTEXT_ID; } } } @@ -184,7 +242,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ) { - uint32_t ulIPSR; + uint32_t ulIPSR, ulSecureContextIndex; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); @@ -193,14 +251,43 @@ secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandl * when the processor is running in the Thread Mode. */ if( ulIPSR != 0 ) { - /* Ensure that valid parameters are passed. */ - secureportASSERT( xSecureContextHandle != NULL ); + /* Only free if a valid context handle is passed. */ + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; - /* Free the stack space. */ - vPortFree( xSecureContextHandle->pucStackLimit ); + /* Free the stack space. */ + vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); - /* Free the context itself. */ - vPortFree( xSecureContextHandle ); + /* Return the context back to the free contexts pool. */ + vReturnSecureContext( ulSecureContextIndex ); + } + } +} +/*-----------------------------------------------------------*/ + +secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +{ + uint32_t ulSecureContextIndex; + + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; + + SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } +} +/*-----------------------------------------------------------*/ + +secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +{ + uint32_t ulSecureContextIndex; + + if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) + { + ulSecureContextIndex = xSecureContextHandle - 1UL; + + SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); } } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33/secure/secure_context.h b/portable/IAR/ARM_CM33/secure/secure_context.h index 532a407d1..2ae78593f 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.h +++ b/portable/IAR/ARM_CM33/secure/secure_context.h @@ -35,15 +35,29 @@ #include "FreeRTOSConfig.h" /** - * @brief PSP value when no task's context is loaded. + * @brief PSP value when no secure context is loaded. */ #define securecontextNO_STACK 0x0 +/*-----------------------------------------------------------*/ /** - * @brief Opaque handle. + * @brief Structure to represent a secure context. + * + * @note Since stack grows down, pucStackStart is the highest address while + * pucStackLimit is the first address of the allocated memory. */ -struct SecureContext; -typedef struct SecureContext * SecureContextHandle_t; +typedef struct SecureContext +{ + uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ + uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ + uint8_t * pucStackStart; /**< First location of the stack memory. */ +} SecureContext_t; +/*-----------------------------------------------------------*/ + +/** + * @brief Opaque handle for a secure context. + */ +typedef uint32_t SecureContextHandle_t; /*-----------------------------------------------------------*/ /** diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port.c b/portable/IAR/ARM_CM33/secure/secure_context_port.c deleted file mode 100644 index 455b90c1e..000000000 --- a/portable/IAR/ARM_CM33/secure/secure_context_port.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * FreeRTOS Kernel V10.4.3 - * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * https://www.FreeRTOS.org - * https://github.com/FreeRTOS - * - * 1 tab == 4 spaces! - */ - -/* Secure context includes. */ -#include "secure_context.h" - -/* Secure port macros. */ -#include "secure_port_macros.h" - -/* Functions implemented in assembler file. */ -extern void SecureContext_LoadContextAsm( SecureContextHandle_t xSecureContextHandle ); -extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHandle ); - -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) -{ - SecureContext_LoadContextAsm( xSecureContextHandle ); -} -/*-----------------------------------------------------------*/ - -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) -{ - SecureContext_SaveContextAsm( xSecureContextHandle ); -} -/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s index d2c599d65..714e0b05a 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s @@ -25,49 +25,54 @@ * 1 tab == 4 spaces! */ - SECTION .text:CODE:NOROOT(2) - THUMB + SECTION .text:CODE:NOROOT(2) + THUMB - PUBLIC SecureContext_LoadContextAsm - PUBLIC SecureContext_SaveContextAsm + PUBLIC SecureContext_LoadContextAsm + PUBLIC SecureContext_SaveContextAsm /*-----------------------------------------------------------*/ SecureContext_LoadContextAsm: - /* xSecureContextHandle value is in r0. */ - mrs r1, ipsr /* r1 = IPSR. */ - cbz r1, load_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ - ldmia r0!, {r1, r2} /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */ -#if ( configENABLE_MPU == 1 ) - ldmia r1!, {r3} /* Read CONTROL register value from task's stack. r3 = CONTROL. */ - msr control, r3 /* CONTROL = r3. */ -#endif /* configENABLE_MPU */ - msr psplim, r2 /* PSPLIM = r2. */ - msr psp, r1 /* PSP = r1. */ + /* pxSecureContext value is in r0. */ + mrs r1, ipsr /* r1 = IPSR. */ + cbz r1, load_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ + ldmia r0!, {r1, r2} /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */ - load_ctx_therad_mode: - bx lr +#if ( configENABLE_MPU == 1 ) + ldmia r1!, {r3} /* Read CONTROL register value from task's stack. r3 = CONTROL. */ + msr control, r3 /* CONTROL = r3. */ +#endif /* configENABLE_MPU */ + + msr psplim, r2 /* PSPLIM = r2. */ + msr psp, r1 /* PSP = r1. */ + + load_ctx_therad_mode: + bx lr /*-----------------------------------------------------------*/ SecureContext_SaveContextAsm: - /* xSecureContextHandle value is in r0. */ - mrs r1, ipsr /* r1 = IPSR. */ - cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ - mrs r1, psp /* r1 = PSP. */ -#if ( configENABLE_FPU == 1 ) - vstmdb r1!, {s0} /* Trigger the defferred stacking of FPU registers. */ - vldmia r1!, {s0} /* Nullify the effect of the pervious statement. */ -#endif /* configENABLE_FPU */ -#if ( configENABLE_MPU == 1 ) - mrs r2, control /* r2 = CONTROL. */ - stmdb r1!, {r2} /* Store CONTROL value on the stack. */ -#endif /* configENABLE_MPU */ - str r1, [r0] /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ - movs r1, #0 /* r1 = securecontextNO_STACK. */ - msr psplim, r1 /* PSPLIM = securecontextNO_STACK. */ - msr psp, r1 /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + /* pxSecureContext value is in r0. */ + mrs r1, ipsr /* r1 = IPSR. */ + cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ + mrs r1, psp /* r1 = PSP. */ - save_ctx_therad_mode: - bx lr +#if ( configENABLE_FPU == 1 ) + vstmdb r1!, {s0} /* Trigger the defferred stacking of FPU registers. */ + vldmia r1!, {s0} /* Nullify the effect of the pervious statement. */ +#endif /* configENABLE_FPU */ + +#if ( configENABLE_MPU == 1 ) + mrs r2, control /* r2 = CONTROL. */ + stmdb r1!, {r2} /* Store CONTROL value on the stack. */ +#endif /* configENABLE_MPU */ + + str r1, [r0] /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ + movs r1, #0 /* r1 = securecontextNO_STACK. */ + msr psplim, r1 /* PSPLIM = securecontextNO_STACK. */ + msr psp, r1 /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ + + save_ctx_therad_mode: + bx lr /*-----------------------------------------------------------*/ - END + END diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.c b/portable/IAR/ARM_CM33/secure/secure_heap.c index 82dbd9ec3..3b380a9c0 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.c +++ b/portable/IAR/ARM_CM33/secure/secure_heap.c @@ -37,7 +37,9 @@ /** * @brief Total heap size. */ -#define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) ) +#ifndef secureconfigTOTAL_HEAP_SIZE + #define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) ) +#endif /* No test marker by default. */ #ifndef mtCOVERAGE_TEST_MARKER From f87404b56f292dea8b9258511df4618bc9f92b68 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Wed, 18 Aug 2021 17:31:22 -0700 Subject: [PATCH 02/24] Associate secure context with task handle The secure side context management code now checks that the secure context being saved or restored belongs to the task being switched-out or switched-in respectively. Signed-off-by: Gaurav Aggarwal --- portable/ARMv8M/non_secure/port.c | 17 +- .../portable/GCC/ARM_CM23/portasm.c | 386 +++++++++--------- .../portable/GCC/ARM_CM33/portasm.c | 319 ++++++++------- .../portable/IAR/ARM_CM23/portasm.s | 193 +++++---- .../portable/IAR/ARM_CM23_NTZ/portasm.s | 6 + .../portable/IAR/ARM_CM33/portasm.s | 163 ++++---- .../GCC/ARM_CM23/secure_context_port.c | 3 + .../GCC/ARM_CM33/secure_context_port.c | 3 + .../IAR/ARM_CM23/secure_context_port_asm.s | 7 + .../IAR/ARM_CM33/secure_context_port_asm.s | 7 + .../ARMv8M/secure/context/secure_context.c | 113 +++-- .../ARMv8M/secure/context/secure_context.h | 20 +- portable/ARMv8M/secure/heap/secure_heap.c | 6 - portable/ARMv8M/secure/heap/secure_heap.h | 14 + .../ARMv8M/secure/macros/secure_port_macros.h | 6 + portable/Common/mpu_wrappers.c | 27 -- portable/GCC/ARM_CM23/non_secure/port.c | 17 +- portable/GCC/ARM_CM23/non_secure/portasm.c | 386 +++++++++--------- portable/GCC/ARM_CM23/secure/secure_context.c | 113 +++-- portable/GCC/ARM_CM23/secure/secure_context.h | 20 +- .../GCC/ARM_CM23/secure/secure_context_port.c | 3 + portable/GCC/ARM_CM23/secure/secure_heap.c | 6 - portable/GCC/ARM_CM23/secure/secure_heap.h | 14 + .../GCC/ARM_CM23/secure/secure_port_macros.h | 6 + portable/GCC/ARM_CM23_NTZ/non_secure/port.c | 17 +- portable/GCC/ARM_CM33/non_secure/port.c | 17 +- portable/GCC/ARM_CM33/non_secure/portasm.c | 319 ++++++++------- portable/GCC/ARM_CM33/secure/secure_context.c | 113 +++-- portable/GCC/ARM_CM33/secure/secure_context.h | 20 +- .../GCC/ARM_CM33/secure/secure_context_port.c | 3 + portable/GCC/ARM_CM33/secure/secure_heap.c | 6 - portable/GCC/ARM_CM33/secure/secure_heap.h | 14 + .../GCC/ARM_CM33/secure/secure_port_macros.h | 6 + portable/GCC/ARM_CM33_NTZ/non_secure/port.c | 17 +- portable/IAR/ARM_CM23/non_secure/port.c | 17 +- portable/IAR/ARM_CM23/non_secure/portasm.s | 193 +++++---- portable/IAR/ARM_CM23/secure/secure_context.c | 113 +++-- portable/IAR/ARM_CM23/secure/secure_context.h | 20 +- .../ARM_CM23/secure/secure_context_port_asm.s | 7 + portable/IAR/ARM_CM23/secure/secure_heap.c | 6 - portable/IAR/ARM_CM23/secure/secure_heap.h | 14 + .../IAR/ARM_CM23/secure/secure_port_macros.h | 6 + portable/IAR/ARM_CM23_NTZ/non_secure/port.c | 17 +- .../IAR/ARM_CM23_NTZ/non_secure/portasm.s | 6 + portable/IAR/ARM_CM33/non_secure/port.c | 17 +- portable/IAR/ARM_CM33/non_secure/portasm.s | 163 ++++---- portable/IAR/ARM_CM33/secure/secure_context.c | 113 +++-- portable/IAR/ARM_CM33/secure/secure_context.h | 20 +- .../ARM_CM33/secure/secure_context_port_asm.s | 7 + portable/IAR/ARM_CM33/secure/secure_heap.c | 6 - portable/IAR/ARM_CM33/secure/secure_heap.h | 14 + .../IAR/ARM_CM33/secure/secure_port_macros.h | 6 + portable/IAR/ARM_CM33_NTZ/non_secure/port.c | 17 +- 53 files changed, 1796 insertions(+), 1353 deletions(-) diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index b4639dfe8..dfc895417 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -779,7 +779,8 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0, ulR1; + extern TaskHandle_t pxCurrentTCB; #if ( configENABLE_MPU == 1 ) uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ @@ -810,25 +811,27 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged, pxCurrentTCB ); } #else /* if ( configENABLE_MPU == 1 ) */ { /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); + xSecureContext = SecureContext_AllocateContext( ulR0, pxCurrentTCB ); } #endif /* configENABLE_MPU */ - configASSERT( xSecureContext != NULL ); - SecureContext_LoadContext( xSecureContext ); + configASSERT( xSecureContext != securecontextINVALID_CONTEXT_ID ); + SecureContext_LoadContext( xSecureContext, pxCurrentTCB ); break; case portSVC_FREE_SECURE_CONTEXT: - /* R0 contains the secure context handle to be freed. */ + /* R0 contains TCB being freed and R1 contains the secure + * context handle to be freed. */ ulR0 = pulCallerStackAddress[ 0 ]; + ulR1 = pulCallerStackAddress[ 1 ]; /* Free the secure context. */ - SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 ); + SecureContext_FreeContext( ( SecureContextHandle_t ) ulR1, ( void * ) ulR0 ); break; #endif /* configENABLE_TRUSTZONE */ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index 5276d8fac..20e18ca15 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -54,79 +54,79 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_ " ldr r0, [r3] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " \n" #if ( configENABLE_MPU == 1 ) - " dmb \n"/* Complete outstanding transfers before disabling MPU. */ - " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " movs r5, #1 \n"/* r5 = 1. */ - " bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ - " str r4, [r2] \n"/* Disable MPU. */ - " \n" - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r4, [r2] \n"/* Program MAIR0. */ - " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */ - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ - " movs r5, #4 \n"/* r5 = 4. */ - " str r5, [r2] \n"/* Program RNR = 4. */ - " ldmia r3!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */ - " movs r5, #5 \n"/* r5 = 5. */ - " str r5, [r2] \n"/* Program RNR = 5. */ - " ldmia r3!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */ - " movs r5, #6 \n"/* r5 = 6. */ - " str r5, [r2] \n"/* Program RNR = 6. */ - " ldmia r3!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */ - " movs r5, #7 \n"/* r5 = 7. */ - " str r5, [r2] \n"/* Program RNR = 7. */ - " ldmia r3!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " movs r5, #1 \n"/* r5 = 1. */ - " orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ - " str r4, [r2] \n"/* Enable MPU. */ - " dsb \n"/* Force memory writes before continuing. */ + " dmb \n"/* Complete outstanding transfers before disabling MPU. */ + " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ + " movs r5, #1 \n"/* r5 = 1. */ + " bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ + " str r4, [r2] \n"/* Disable MPU. */ + " \n" + " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ + " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r4, [r2] \n"/* Program MAIR0. */ + " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */ + " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ + " movs r5, #4 \n"/* r5 = 4. */ + " str r5, [r2] \n"/* Program RNR = 4. */ + " ldmia r3!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */ + " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ + " stmia r4!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */ + " movs r5, #5 \n"/* r5 = 5. */ + " str r5, [r2] \n"/* Program RNR = 5. */ + " ldmia r3!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */ + " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ + " stmia r4!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */ + " movs r5, #6 \n"/* r5 = 6. */ + " str r5, [r2] \n"/* Program RNR = 6. */ + " ldmia r3!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */ + " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ + " stmia r4!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */ + " movs r5, #7 \n"/* r5 = 7. */ + " str r5, [r2] \n"/* Program RNR = 7. */ + " ldmia r3!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */ + " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ + " stmia r4!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ + " movs r5, #1 \n"/* r5 = 1. */ + " orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ + " str r4, [r2] \n"/* Enable MPU. */ + " dsb \n"/* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ " \n" #if ( configENABLE_MPU == 1 ) - " ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */ - " ldr r5, xSecureContextConst2 \n" - " str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ - " msr control, r3 \n"/* Set this task's CONTROL value. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " bx r4 \n"/* Finally, branch to EXC_RETURN. */ + " ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */ + " ldr r5, xSecureContextConst2 \n" + " str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ + " msr control, r3 \n"/* Set this task's CONTROL value. */ + " adds r0, #32 \n"/* Discard everything up to r0. */ + " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ + " isb \n" + " bx r4 \n"/* Finally, branch to EXC_RETURN. */ #else /* configENABLE_MPU */ - " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ - " ldr r4, xSecureContextConst2 \n" - " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " bx r3 \n"/* Finally, branch to EXC_RETURN. */ + " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ + " ldr r4, xSecureContextConst2 \n" + " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ + " movs r1, #2 \n"/* r1 = 2. */ + " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n"/* Discard everything up to r0. */ + " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ + " isb \n" + " bx r3 \n"/* Finally, branch to EXC_RETURN. */ #endif /* configENABLE_MPU */ " \n" " .align 4 \n" "pxCurrentTCBConst2: .word pxCurrentTCB \n" "xSecureContextConst2: .word xSecureContext \n" #if ( configENABLE_MPU == 1 ) - "xMPUCTRLConst2: .word 0xe000ed94 \n" - "xMAIR0Const2: .word 0xe000edc0 \n" - "xRNRConst2: .word 0xe000ed98 \n" - "xRBARConst2: .word 0xe000ed9c \n" + "xMPUCTRLConst2: .word 0xe000ed94 \n" + "xMAIR0Const2: .word 0xe000edc0 \n" + "xRNRConst2: .word 0xe000ed98 \n" + "xRBARConst2: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ ); } @@ -232,64 +232,66 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ " .extern SecureContext_SaveContext \n" " .extern SecureContext_LoadContext \n" " \n" - " mrs r1, psp \n"/* Read PSP in r1. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r2] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/ + " mrs r2, psp \n"/* Read PSP in r2. */ " \n" " cbz r0, save_ns_context \n"/* No secure context to save. */ " push {r0-r2, r14} \n" - " bl SecureContext_SaveContext \n" + " bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ " pop {r0-r3} \n"/* LR is now in r3. */ " mov lr, r3 \n"/* LR = r3. */ - " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r2, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ #if ( configENABLE_MPU == 1 ) - " subs r1, r1, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mrs r3, control \n"/* r3 = CONTROL. */ - " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ - " stmia r1!, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " subs r2, r2, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mrs r3, control \n"/* r3 = CONTROL. */ + " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - " subs r1, r1, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r1!, {r0, r2-r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ + " subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ " b select_next_task \n" " \n" " save_ns_context: \n" " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r2, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ #if ( configENABLE_MPU == 1 ) - " subs r1, r1, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " adds r1, r1, #16 \n"/* r1 = r1 + 16. */ - " stmia r1!, {r4-r7} \n"/* Store the low registers that are not saved automatically. */ - " mov r4, r8 \n"/* r4 = r8. */ - " mov r5, r9 \n"/* r5 = r9. */ - " mov r6, r10 \n"/* r6 = r10. */ - " mov r7, r11 \n"/* r7 = r11. */ - " stmia r1!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mrs r3, control \n"/* r3 = CONTROL. */ - " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ - " subs r1, r1, #48 \n"/* r1 = r1 - 48. */ - " stmia r1!, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " subs r2, r2, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " adds r2, r2, #16 \n"/* r2 = r2 + 16. */ + " stmia r2!, {r4-r7} \n"/* Store the low registers that are not saved automatically. */ + " mov r4, r8 \n"/* r4 = r8. */ + " mov r5, r9 \n"/* r5 = r9. */ + " mov r6, r10 \n"/* r6 = r10. */ + " mov r7, r11 \n"/* r7 = r11. */ + " stmia r2!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mrs r3, control \n"/* r3 = CONTROL. */ + " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ + " subs r2, r2, #48 \n"/* r2 = r2 - 48. */ + " stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - " subs r1, r1, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r1!, {r0, r2-r7} \n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ - " mov r4, r8 \n"/* r4 = r8. */ - " mov r5, r9 \n"/* r5 = r9. */ - " mov r6, r10 \n"/* r6 = r10. */ - " mov r7, r11 \n"/* r7 = r11. */ - " stmia r1!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ + " subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3-r7} \n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ + " mov r4, r8 \n"/* r4 = r8. */ + " mov r5, r9 \n"/* r5 = r9. */ + " mov r6, r10 \n"/* r6 = r10. */ + " mov r7, r11 \n"/* r7 = r11. */ + " stmia r2!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ #endif /* configENABLE_MPU */ " \n" " select_next_task: \n" @@ -297,106 +299,110 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ " bl vTaskSwitchContext \n" " cpsie i \n" " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r3, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r1, [r3] \n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ " \n" #if ( configENABLE_MPU == 1 ) - " dmb \n"/* Complete outstanding transfers before disabling MPU. */ - " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " movs r5, #1 \n"/* r5 = 1. */ - " bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ - " str r4, [r2] \n"/* Disable MPU. */ - " \n" - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ - " ldr r2, xMAIR0Const \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r4, [r2] \n"/* Program MAIR0. */ - " ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */ - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ - " movs r5, #4 \n"/* r5 = 4. */ - " str r5, [r2] \n"/* Program RNR = 4. */ - " ldmia r3!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */ - " movs r5, #5 \n"/* r5 = 5. */ - " str r5, [r2] \n"/* Program RNR = 5. */ - " ldmia r3!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */ - " movs r5, #6 \n"/* r5 = 6. */ - " str r5, [r2] \n"/* Program RNR = 6. */ - " ldmia r3!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */ - " movs r5, #7 \n"/* r5 = 7. */ - " str r5, [r2] \n"/* Program RNR = 7. */ - " ldmia r3!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " movs r5, #1 \n"/* r5 = 1. */ - " orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ - " str r4, [r2] \n"/* Enable MPU. */ - " dsb \n"/* Force memory writes before continuing. */ + " dmb \n"/* Complete outstanding transfers before disabling MPU. */ + " ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */ + " movs r5, #1 \n"/* r5 = 1. */ + " bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ + " str r4, [r3] \n"/* Disable MPU. */ + " \n" + " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ + " ldr r4, [r1] \n"/* r4 = *r1 i.e. r4 = MAIR0. */ + " ldr r3, xMAIR0Const \n"/* r3 = 0xe000edc0 [Location of MAIR0]. */ + " str r4, [r3] \n"/* Program MAIR0. */ + " ldr r4, xRNRConst \n"/* r4 = 0xe000ed98 [Location of RNR]. */ + " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ + " movs r5, #4 \n"/* r5 = 4. */ + " str r5, [r4] \n"/* Program RNR = 4. */ + " ldmia r1!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */ + " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */ + " stmia r3!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */ + " movs r5, #5 \n"/* r5 = 5. */ + " str r5, [r4] \n"/* Program RNR = 5. */ + " ldmia r1!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */ + " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */ + " stmia r3!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */ + " movs r5, #6 \n"/* r5 = 6. */ + " str r5, [r4] \n"/* Program RNR = 6. */ + " ldmia r1!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */ + " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */ + " stmia r3!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */ + " movs r5, #7 \n"/* r5 = 7. */ + " str r5, [r4] \n"/* Program RNR = 7. */ + " ldmia r1!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */ + " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */ + " stmia r3!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */ + " movs r5, #1 \n"/* r5 = 1. */ + " orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ + " str r4, [r3] \n"/* Enable MPU. */ + " dsb \n"/* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ " \n" #if ( configENABLE_MPU == 1 ) - " ldmia r1!, {r0, r2-r4} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */ - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " msr control, r3 \n"/* Restore the CONTROL register value for the task. */ - " mov lr, r4 \n"/* LR = r4. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r2] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " push {r1,r4} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. */ - " pop {r1,r4} \n" - " mov lr, r4 \n"/* LR = r4. */ - " lsls r2, r4, #25 \n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" + " ldmia r2!, {r0, r1, r3, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */ + " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ + " msr control, r3 \n"/* Restore the CONTROL register value for the task. */ + " mov lr, r4 \n"/* LR = r4. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n"/* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n"/* LR = r4. */ + " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ + " bx lr \n" #else /* configENABLE_MPU */ - " ldmia r1!, {r0, r2-r3} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */ - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " mov lr, r3 \n"/* LR = r3. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r2] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " push {r1,r3} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. */ - " pop {r1,r3} \n" - " mov lr, r3 \n"/* LR = r3. */ - " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" + " ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ + " mov lr, r4 \n"/* LR = r4. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n"/* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n"/* LR = r4. */ + " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ + " bx lr \n" #endif /* configENABLE_MPU */ " \n" " restore_ns_context: \n" - " adds r1, r1, #16 \n"/* Move to the high registers. */ - " ldmia r1!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */ + " adds r2, r2, #16 \n"/* Move to the high registers. */ + " ldmia r2!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */ " mov r8, r4 \n"/* r8 = r4. */ " mov r9, r5 \n"/* r9 = r5. */ " mov r10, r6 \n"/* r10 = r6. */ " mov r11, r7 \n"/* r11 = r7. */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ - " subs r1, r1, #32 \n"/* Go back to the low registers. */ - " ldmia r1!, {r4-r7} \n"/* Restore the low registers that are not automatically restored. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ + " subs r2, r2, #32 \n"/* Go back to the low registers. */ + " ldmia r2!, {r4-r7} \n"/* Restore the low registers that are not automatically restored. */ " bx lr \n" " \n" " .align 4 \n" "pxCurrentTCBConst: .word pxCurrentTCB \n" "xSecureContextConst: .word xSecureContext \n" #if ( configENABLE_MPU == 1 ) - "xMPUCTRLConst: .word 0xe000ed94 \n" - "xMAIR0Const: .word 0xe000edc0 \n" - "xRNRConst: .word 0xe000ed98 \n" - "xRBARConst: .word 0xe000ed9c \n" + "xMPUCTRLConst: .word 0xe000ed94 \n" + "xMAIR0Const: .word 0xe000edc0 \n" + "xRNRConst: .word 0xe000ed98 \n" + "xRBARConst: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ ); } @@ -439,9 +445,9 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR { __asm volatile ( - " ldr r1, [r0] \n"/* The first item in the TCB is the top of the stack. */ - " ldr r0, [r1] \n"/* The first item on the stack is the task's xSecureContext. */ - " cmp r0, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ + " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ + " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ + " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ " beq free_secure_context \n" " bx lr \n"/* There is no secure context (xSecureContext is NULL). */ " free_secure_context: \n" diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c index aaab4cfa8..8848dd786 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c @@ -50,66 +50,66 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_ " ldr r0, [r3] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " \n" #if ( configENABLE_MPU == 1 ) - " dmb \n"/* Complete outstanding transfers before disabling MPU. */ - " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ - " str r4, [r2] \n"/* Disable MPU. */ - " \n" - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r4, [r2] \n"/* Program MAIR0. */ - " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */ - " movs r4, #4 \n"/* r4 = 4. */ - " str r4, [r2] \n"/* Program RNR = 4. */ - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ - " ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */ - " ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ - " str r4, [r2] \n"/* Enable MPU. */ - " dsb \n"/* Force memory writes before continuing. */ + " dmb \n"/* Complete outstanding transfers before disabling MPU. */ + " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ + " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ + " str r4, [r2] \n"/* Disable MPU. */ + " \n" + " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ + " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r4, [r2] \n"/* Program MAIR0. */ + " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */ + " movs r4, #4 \n"/* r4 = 4. */ + " str r4, [r2] \n"/* Program RNR = 4. */ + " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ + " ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */ + " ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ + " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ + " str r4, [r2] \n"/* Enable MPU. */ + " dsb \n"/* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ " \n" #if ( configENABLE_MPU == 1 ) - " ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */ - " ldr r5, xSecureContextConst2 \n" - " str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ - " msr control, r3 \n"/* Set this task's CONTROL value. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ - " bx r4 \n"/* Finally, branch to EXC_RETURN. */ + " ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */ + " ldr r5, xSecureContextConst2 \n" + " str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ + " msr control, r3 \n"/* Set this task's CONTROL value. */ + " adds r0, #32 \n"/* Discard everything up to r0. */ + " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ + " bx r4 \n"/* Finally, branch to EXC_RETURN. */ #else /* configENABLE_MPU */ - " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ - " ldr r4, xSecureContextConst2 \n" - " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ - " bx r3 \n"/* Finally, branch to EXC_RETURN. */ + " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ + " ldr r4, xSecureContextConst2 \n" + " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ + " movs r1, #2 \n"/* r1 = 2. */ + " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n"/* Discard everything up to r0. */ + " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ + " bx r3 \n"/* Finally, branch to EXC_RETURN. */ #endif /* configENABLE_MPU */ " \n" " .align 4 \n" "pxCurrentTCBConst2: .word pxCurrentTCB \n" "xSecureContextConst2: .word xSecureContext \n" #if ( configENABLE_MPU == 1 ) - "xMPUCTRLConst2: .word 0xe000ed94 \n" - "xMAIR0Const2: .word 0xe000edc0 \n" - "xRNRConst2: .word 0xe000ed98 \n" - "xRBARConst2: .word 0xe000ed9c \n" + "xMPUCTRLConst2: .word 0xe000ed94 \n" + "xMAIR0Const2: .word 0xe000edc0 \n" + "xRNRConst2: .word 0xe000ed98 \n" + "xRBARConst2: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ ); } @@ -216,62 +216,65 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ " .extern SecureContext_SaveContext \n" " .extern SecureContext_LoadContext \n" " \n" - " mrs r1, psp \n"/* Read PSP in r1. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r2] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " mrs r2, psp \n"/* Read PSP in r2. */ " \n" " cbz r0, save_ns_context \n"/* No secure context to save. */ " push {r0-r2, r14} \n" - " bl SecureContext_SaveContext \n" + " bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ " pop {r0-r3} \n"/* LR is now in r3. */ " mov lr, r3 \n"/* LR = r3. */ - " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " \n" " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r2, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB.*/ #if ( configENABLE_MPU == 1 ) - " subs r1, r1, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mrs r3, control \n"/* r3 = CONTROL. */ - " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ - " stmia r1!, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " subs r2, r2, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mrs r3, control \n"/* r3 = CONTROL. */ + " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - " subs r1, r1, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r1!, {r0, r2-r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ + " subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ " b select_next_task \n" " \n" " save_ns_context: \n" " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r2, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ #if ( configENABLE_FPU == 1 ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ - " it eq \n" - " vstmdbeq r1!, {s16-s31} \n"/* Store the FPU registers which are not saved automatically. */ + " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ + " it eq \n" + " vstmdbeq r2!, {s16-s31} \n"/* Store the FPU registers which are not saved automatically. */ #endif /* configENABLE_FPU */ #if ( configENABLE_MPU == 1 ) - " subs r1, r1, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " adds r1, r1, #16 \n"/* r1 = r1 + 16. */ - " stm r1, {r4-r11} \n"/* Store the registers that are not saved automatically. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mrs r3, control \n"/* r3 = CONTROL. */ - " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ - " subs r1, r1, #16 \n"/* r1 = r1 - 16. */ - " stm r1, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " subs r2, r2, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " adds r2, r2, #16 \n"/* r2 = r2 + 16. */ + " stm r2, {r4-r11} \n"/* Store the registers that are not saved automatically. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mrs r3, control \n"/* r3 = CONTROL. */ + " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ + " subs r2, r2, #16 \n"/* r2 = r2 - 16. */ + " stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - " subs r1, r1, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " adds r1, r1, #12 \n"/* r1 = r1 + 12. */ - " stm r1, {r4-r11} \n"/* Store the registers that are not saved automatically. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " subs r1, r1, #12 \n"/* r1 = r1 - 12. */ - " stmia r1!, {r0, r2-r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ + " subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " adds r2, r2, #12 \n"/* r2 = r2 + 12. */ + " stm r2, {r4-r11} \n"/* Store the registers that are not saved automatically. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ + " subs r2, r2, #12 \n"/* r2 = r2 - 12. */ + " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ " \n" " select_next_task: \n" @@ -283,87 +286,91 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ " mov r0, #0 \n"/* r0 = 0. */ " msr basepri, r0 \n"/* Enable interrupts. */ " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r3, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r1, [r3] \n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ " \n" #if ( configENABLE_MPU == 1 ) - " dmb \n"/* Complete outstanding transfers before disabling MPU. */ - " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ - " str r4, [r2] \n"/* Disable MPU. */ - " \n" - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ - " ldr r2, xMAIR0Const \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r4, [r2] \n"/* Program MAIR0. */ - " ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */ - " movs r4, #4 \n"/* r4 = 4. */ - " str r4, [r2] \n"/* Program RNR = 4. */ - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ - " ldr r2, xRBARConst \n"/* r2 = 0xe000ed9c [Location of RBAR]. */ - " ldmia r3!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ - " str r4, [r2] \n"/* Enable MPU. */ - " dsb \n"/* Force memory writes before continuing. */ + " dmb \n"/* Complete outstanding transfers before disabling MPU. */ + " ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */ + " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ + " str r4, [r3] \n"/* Disable MPU. */ + " \n" + " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ + " ldr r4, [r1] \n"/* r4 = *r1 i.e. r4 = MAIR0. */ + " ldr r3, xMAIR0Const \n"/* r3 = 0xe000edc0 [Location of MAIR0]. */ + " str r4, [r3] \n"/* Program MAIR0. */ + " ldr r3, xRNRConst \n"/* r3 = 0xe000ed98 [Location of RNR]. */ + " movs r4, #4 \n"/* r4 = 4. */ + " str r4, [r3] \n"/* Program RNR = 4. */ + " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ + " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */ + " ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r3!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + " ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */ + " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ + " str r4, [r3] \n"/* Enable MPU. */ + " dsb \n"/* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ " \n" #if ( configENABLE_MPU == 1 ) - " ldmia r1!, {r0, r2-r4} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */ - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " msr control, r3 \n"/* Restore the CONTROL register value for the task. */ - " mov lr, r4 \n"/* LR = r4. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r2] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " push {r1,r4} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. */ - " pop {r1,r4} \n" - " mov lr, r4 \n"/* LR = r4. */ - " lsls r2, r4, #25 \n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" + " ldmia r2!, {r0, r1, r3, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */ + " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ + " msr control, r3 \n"/* Restore the CONTROL register value for the task. */ + " mov lr, r4 \n"/* LR = r4. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n"/* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n"/* LR = r4. */ + " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ + " bx lr \n" #else /* configENABLE_MPU */ - " ldmia r1!, {r0, r2-r3} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */ - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " mov lr, r3 \n"/* LR = r3. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r2] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " push {r1,r3} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. */ - " pop {r1,r3} \n" - " mov lr, r3 \n"/* LR = r3. */ - " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" + " ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ + " mov lr, r4 \n"/* LR = r4. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n"/* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n"/* LR = r4. */ + " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ + " bx lr \n" #endif /* configENABLE_MPU */ " \n" " restore_ns_context: \n" - " ldmia r1!, {r4-r11} \n"/* Restore the registers that are not automatically restored. */ + " ldmia r2!, {r4-r11} \n"/* Restore the registers that are not automatically restored. */ #if ( configENABLE_FPU == 1 ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ - " it eq \n" - " vldmiaeq r1!, {s16-s31} \n"/* Restore the FPU registers which are not restored automatically. */ + " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ + " it eq \n" + " vldmiaeq r2!, {s16-s31} \n"/* Restore the FPU registers which are not restored automatically. */ #endif /* configENABLE_FPU */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ " bx lr \n" " \n" " .align 4 \n" "pxCurrentTCBConst: .word pxCurrentTCB \n" "xSecureContextConst: .word xSecureContext \n" #if ( configENABLE_MPU == 1 ) - "xMPUCTRLConst: .word 0xe000ed94 \n" - "xMAIR0Const: .word 0xe000edc0 \n" - "xRNRConst: .word 0xe000ed98 \n" - "xRBARConst: .word 0xe000ed9c \n" + "xMPUCTRLConst: .word 0xe000ed94 \n" + "xMAIR0Const: .word 0xe000edc0 \n" + "xRNRConst: .word 0xe000ed98 \n" + "xRBARConst: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ); @@ -402,9 +409,9 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR { __asm volatile ( - " ldr r1, [r0] \n"/* The first item in the TCB is the top of the stack. */ - " ldr r0, [r1] \n"/* The first item on the stack is the task's xSecureContext. */ - " cmp r0, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ + " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ + " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ + " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ " it ne \n" " svcne %0 \n"/* Secure context is freed in the supervisor call. */ " bx lr \n"/* Return. */ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s index 8003b45d0..6c6fcc6b4 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s @@ -25,6 +25,13 @@ * 1 tab == 4 spaces! */ +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" + EXTERN pxCurrentTCB EXTERN xSecureContext EXTERN vTaskSwitchContext @@ -193,64 +200,66 @@ vClearInterruptMask: /*-----------------------------------------------------------*/ PendSV_Handler: - mrs r1, psp /* Read PSP in r1. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - ldr r0, [r2] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + ldr r0, [r3] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + mrs r2, psp /* Read PSP in r2. */ cbz r0, save_ns_context /* No secure context to save. */ push {r0-r2, r14} - bl SecureContext_SaveContext + bl SecureContext_SaveContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ pop {r0-r3} /* LR is now in r3. */ mov lr, r3 /* LR = r3. */ - lsls r2, r3, #25 /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl save_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + lsls r1, r3, #25 /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl save_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r2, [r3] /* Read pxCurrentTCB. */ + ldr r1, [r3] /* Read pxCurrentTCB. */ #if ( configENABLE_MPU == 1 ) - subs r1, r1, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + mrs r1, psplim /* r1 = PSPLIM. */ mrs r3, control /* r3 = CONTROL. */ mov r4, lr /* r4 = LR/EXC_RETURN. */ - stmia r1!, {r0, r2-r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - subs r1, r1, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + mrs r1, psplim /* r1 = PSPLIM. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ - stmia r1!, {r0, r2-r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ + stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ b select_next_task save_ns_context: ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r2, [r3] /* Read pxCurrentTCB. */ + ldr r1, [r3] /* Read pxCurrentTCB. */ #if ( configENABLE_MPU == 1 ) - subs r1, r1, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - adds r1, r1, #16 /* r1 = r1 + 16. */ - stmia r1!, {r4-r7} /* Store the low registers that are not saved automatically. */ + subs r2, r2, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + adds r2, r2, #16 /* r2 = r2 + 16. */ + stmia r2!, {r4-r7} /* Store the low registers that are not saved automatically. */ mov r4, r8 /* r4 = r8. */ mov r5, r9 /* r5 = r9. */ mov r6, r10 /* r6 = r10. */ mov r7, r11 /* r7 = r11. */ - stmia r1!, {r4-r7} /* Store the high registers that are not saved automatically. */ - mrs r2, psplim /* r2 = PSPLIM. */ + stmia r2!, {r4-r7} /* Store the high registers that are not saved automatically. */ + mrs r1, psplim /* r1 = PSPLIM. */ mrs r3, control /* r3 = CONTROL. */ mov r4, lr /* r4 = LR/EXC_RETURN. */ - subs r1, r1, #48 /* r1 = r1 - 48. */ - stmia r1!, {r0, r2-r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + subs r2, r2, #48 /* r2 = r2 - 48. */ + stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - subs r1, r1, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + mrs r1, psplim /* r1 = PSPLIM. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ - stmia r1!, {r0, r2-r7} /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ + stmia r2!, {r0, r1, r3-r7} /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ mov r4, r8 /* r4 = r8. */ mov r5, r9 /* r5 = r9. */ mov r6, r10 /* r6 = r10. */ mov r7, r11 /* r7 = r11. */ - stmia r1!, {r4-r7} /* Store the high registers that are not saved automatically. */ + stmia r2!, {r4-r7} /* Store the high registers that are not saved automatically. */ #endif /* configENABLE_MPU */ select_next_task: @@ -258,96 +267,100 @@ PendSV_Handler: bl vTaskSwitchContext cpsie i - ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r3, [r2] /* Read pxCurrentTCB. */ - ldr r1, [r3] /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + ldr r2, [r1] /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ #if ( configENABLE_MPU == 1 ) dmb /* Complete outstanding transfers before disabling MPU. */ - ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - ldr r4, [r2] /* Read the value of MPU_CTRL. */ + ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + ldr r4, [r3] /* Read the value of MPU_CTRL. */ movs r5, #1 /* r5 = 1. */ bics r4, r5 /* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ - str r4, [r2] /* Disable MPU. */ + str r4, [r3] /* Disable MPU. */ - adds r3, #4 /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - ldr r4, [r3] /* r4 = *r3 i.e. r4 = MAIR0. */ - ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */ - str r4, [r2] /* Program MAIR0. */ - ldr r2, =0xe000ed98 /* r2 = 0xe000ed98 [Location of RNR]. */ - adds r3, #4 /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ + adds r1, #4 /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ + ldr r4, [r1] /* r4 = *r1 i.e. r4 = MAIR0. */ + ldr r3, =0xe000edc0 /* r3 = 0xe000edc0 [Location of MAIR0]. */ + str r4, [r3] /* Program MAIR0. */ + ldr r4, =0xe000ed98 /* r4 = 0xe000ed98 [Location of RNR]. */ + adds r1, #4 /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ movs r5, #4 /* r5 = 4. */ - str r5, [r2] /* Program RNR = 4. */ - ldmia r3!, {r6,r7} /* Read first set of RBAR/RLAR from TCB. */ - ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */ - stmia r4!, {r6,r7} /* Write first set of RBAR/RLAR registers. */ + str r5, [r4] /* Program RNR = 4. */ + ldmia r1!, {r6,r7} /* Read first set of RBAR/RLAR from TCB. */ + ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */ + stmia r3!, {r6,r7} /* Write first set of RBAR/RLAR registers. */ movs r5, #5 /* r5 = 5. */ - str r5, [r2] /* Program RNR = 5. */ - ldmia r3!, {r6,r7} /* Read second set of RBAR/RLAR from TCB. */ - ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */ - stmia r4!, {r6,r7} /* Write second set of RBAR/RLAR registers. */ + str r5, [r4] /* Program RNR = 5. */ + ldmia r1!, {r6,r7} /* Read second set of RBAR/RLAR from TCB. */ + ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */ + stmia r3!, {r6,r7} /* Write second set of RBAR/RLAR registers. */ movs r5, #6 /* r5 = 6. */ - str r5, [r2] /* Program RNR = 6. */ - ldmia r3!, {r6,r7} /* Read third set of RBAR/RLAR from TCB. */ - ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */ - stmia r4!, {r6,r7} /* Write third set of RBAR/RLAR registers. */ + str r5, [r4] /* Program RNR = 6. */ + ldmia r1!, {r6,r7} /* Read third set of RBAR/RLAR from TCB. */ + ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */ + stmia r3!, {r6,r7} /* Write third set of RBAR/RLAR registers. */ movs r5, #7 /* r5 = 7. */ - str r5, [r2] /* Program RNR = 7. */ - ldmia r3!, {r6,r7} /* Read fourth set of RBAR/RLAR from TCB. */ - ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */ - stmia r4!, {r6,r7} /* Write fourth set of RBAR/RLAR registers. */ + str r5, [r4] /* Program RNR = 7. */ + ldmia r1!, {r6,r7} /* Read fourth set of RBAR/RLAR from TCB. */ + ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */ + stmia r3!, {r6,r7} /* Write fourth set of RBAR/RLAR registers. */ - ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - ldr r4, [r2] /* Read the value of MPU_CTRL. */ + ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + ldr r4, [r3] /* Read the value of MPU_CTRL. */ movs r5, #1 /* r5 = 1. */ orrs r4, r5 /* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ - str r4, [r2] /* Enable MPU. */ + str r4, [r3] /* Enable MPU. */ dsb /* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ #if ( configENABLE_MPU == 1 ) - ldmia r1!, {r0, r2-r4} /* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */ - msr psplim, r2 /* Restore the PSPLIM register value for the task. */ + ldmia r2!, {r0, r1, r3, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */ + msr psplim, r1 /* Restore the PSPLIM register value for the task. */ msr control, r3 /* Restore the CONTROL register value for the task. */ mov lr, r4 /* LR = r4. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - str r0, [r2] /* Restore the task's xSecureContext. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + str r0, [r3] /* Restore the task's xSecureContext. */ cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */ - push {r1,r4} - bl SecureContext_LoadContext /* Restore the secure context. */ - pop {r1,r4} + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + push {r2, r4} + bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + pop {r2, r4} mov lr, r4 /* LR = r4. */ - lsls r2, r4, #25 /* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl restore_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - msr psp, r1 /* Remember the new top of stack for the task. */ + lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + msr psp, r2 /* Remember the new top of stack for the task. */ bx lr #else /* configENABLE_MPU */ - ldmia r1!, {r0, r2-r3} /* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */ - msr psplim, r2 /* Restore the PSPLIM register value for the task. */ - mov lr, r3 /* LR = r3. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - str r0, [r2] /* Restore the task's xSecureContext. */ + ldmia r2!, {r0, r1, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + msr psplim, r1 /* Restore the PSPLIM register value for the task. */ + mov lr, r4 /* LR = r4. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + str r0, [r3] /* Restore the task's xSecureContext. */ cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */ - push {r1,r3} - bl SecureContext_LoadContext /* Restore the secure context. */ - pop {r1,r3} - mov lr, r3 /* LR = r3. */ - lsls r2, r3, #25 /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl restore_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - msr psp, r1 /* Remember the new top of stack for the task. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + push {r2, r4} + bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + pop {r2, r4} + mov lr, r4 /* LR = r4. */ + lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + msr psp, r2 /* Remember the new top of stack for the task. */ bx lr #endif /* configENABLE_MPU */ restore_ns_context: - adds r1, r1, #16 /* Move to the high registers. */ - ldmia r1!, {r4-r7} /* Restore the high registers that are not automatically restored. */ + adds r2, r2, #16 /* Move to the high registers. */ + ldmia r2!, {r4-r7} /* Restore the high registers that are not automatically restored. */ mov r8, r4 /* r8 = r4. */ mov r9, r5 /* r9 = r5. */ mov r10, r6 /* r10 = r6. */ mov r11, r7 /* r11 = r7. */ - msr psp, r1 /* Remember the new top of stack for the task. */ - subs r1, r1, #32 /* Go back to the low registers. */ - ldmia r1!, {r4-r7} /* Restore the low registers that are not automatically restored. */ + msr psp, r2 /* Remember the new top of stack for the task. */ + subs r2, r2, #32 /* Go back to the low registers. */ + ldmia r2!, {r4-r7} /* Restore the low registers that are not automatically restored. */ bx lr /*-----------------------------------------------------------*/ @@ -364,9 +377,9 @@ SVC_Handler: /*-----------------------------------------------------------*/ vPortFreeSecureContext: - ldr r1, [r0] /* The first item in the TCB is the top of the stack. */ - ldr r0, [r1] /* The first item on the stack is the task's xSecureContext. */ - cmp r0, #0 /* Raise svc if task's xSecureContext is not NULL. */ + ldr r2, [r0] /* The first item in the TCB is the top of the stack. */ + ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */ + cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */ beq free_secure_context bx lr /* There is no secure context (xSecureContext is NULL). */ free_secure_context: diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s index 6e911bd26..89ff193b7 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s @@ -24,6 +24,12 @@ * * 1 tab == 4 spaces! */ +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" EXTERN pxCurrentTCB EXTERN vTaskSwitchContext diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s index 6b125b209..9b5296ad9 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s @@ -183,62 +183,65 @@ vClearInterruptMask: /*-----------------------------------------------------------*/ PendSV_Handler: - mrs r1, psp /* Read PSP in r1. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - ldr r0, [r2] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + ldr r0, [r3] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + mrs r2, psp /* Read PSP in r2. */ cbz r0, save_ns_context /* No secure context to save. */ push {r0-r2, r14} - bl SecureContext_SaveContext + bl SecureContext_SaveContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ pop {r0-r3} /* LR is now in r3. */ mov lr, r3 /* LR = r3. */ - lsls r2, r3, #25 /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl save_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + lsls r1, r3, #25 /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl save_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r2, [r3] /* Read pxCurrentTCB. */ + ldr r1, [r3] /* Read pxCurrentTCB. */ #if ( configENABLE_MPU == 1 ) - subs r1, r1, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + mrs r1, psplim /* r1 = PSPLIM. */ mrs r3, control /* r3 = CONTROL. */ mov r4, lr /* r4 = LR/EXC_RETURN. */ - stmia r1!, {r0, r2-r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - subs r1, r1, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + mrs r1, psplim /* r1 = PSPLIM. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ - stmia r1!, {r0, r2-r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ + stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ b select_next_task save_ns_context: ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r2, [r3] /* Read pxCurrentTCB. */ + ldr r1, [r3] /* Read pxCurrentTCB. */ #if ( configENABLE_FPU == 1 ) tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ it eq - vstmdbeq r1!, {s16-s31} /* Store the FPU registers which are not saved automatically. */ + vstmdbeq r2!, {s16-s31} /* Store the FPU registers which are not saved automatically. */ #endif /* configENABLE_FPU */ #if ( configENABLE_MPU == 1 ) - subs r1, r1, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - adds r1, r1, #16 /* r1 = r1 + 16. */ - stm r1, {r4-r11} /* Store the registers that are not saved automatically. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + adds r2, r2, #16 /* r2 = r2 + 16. */ + stm r2, {r4-r11} /* Store the registers that are not saved automatically. */ + mrs r1, psplim /* r1 = PSPLIM. */ mrs r3, control /* r3 = CONTROL. */ mov r4, lr /* r4 = LR/EXC_RETURN. */ - subs r1, r1, #16 /* r1 = r1 - 16. */ - stm r1, {r0, r2-r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + subs r2, r2, #16 /* r2 = r2 - 16. */ + stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - subs r1, r1, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - adds r1, r1, #12 /* r1 = r1 + 12. */ - stm r1, {r4-r11} /* Store the registers that are not saved automatically. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + adds r2, r2, #12 /* r2 = r2 + 12. */ + stm r2, {r4-r11} /* Store the registers that are not saved automatically. */ + mrs r1, psplim /* r1 = PSPLIM. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ - subs r1, r1, #12 /* r1 = r1 - 12. */ - stmia r1!, {r0, r2-r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ + subs r2, r2, #12 /* r2 = r2 - 12. */ + stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ select_next_task: @@ -250,77 +253,81 @@ PendSV_Handler: mov r0, #0 /* r0 = 0. */ msr basepri, r0 /* Enable interrupts. */ - ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r3, [r2] /* Read pxCurrentTCB. */ - ldr r1, [r3] /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + ldr r2, [r1] /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ #if ( configENABLE_MPU == 1 ) dmb /* Complete outstanding transfers before disabling MPU. */ - ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - ldr r4, [r2] /* Read the value of MPU_CTRL. */ + ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + ldr r4, [r3] /* Read the value of MPU_CTRL. */ bic r4, r4, #1 /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ - str r4, [r2] /* Disable MPU. */ + str r4, [r3] /* Disable MPU. */ - adds r3, #4 /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - ldr r4, [r3] /* r4 = *r3 i.e. r4 = MAIR0. */ - ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */ - str r4, [r2] /* Program MAIR0. */ - ldr r2, =0xe000ed98 /* r2 = 0xe000ed98 [Location of RNR]. */ + adds r1, #4 /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ + ldr r4, [r1] /* r4 = *r1 i.e. r4 = MAIR0. */ + ldr r3, =0xe000edc0 /* r3 = 0xe000edc0 [Location of MAIR0]. */ + str r4, [r3] /* Program MAIR0. */ + ldr r3, =0xe000ed98 /* r3 = 0xe000ed98 [Location of RNR]. */ movs r4, #4 /* r4 = 4. */ - str r4, [r2] /* Program RNR = 4. */ - adds r3, #4 /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ - ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */ - ldmia r3!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */ - stmia r2!, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */ + str r4, [r3] /* Program RNR = 4. */ + adds r1, #4 /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ + ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */ + ldmia r1!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */ + stmia r3!, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */ - ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - ldr r4, [r2] /* Read the value of MPU_CTRL. */ + ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + ldr r4, [r3] /* Read the value of MPU_CTRL. */ orr r4, r4, #1 /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ - str r4, [r2] /* Enable MPU. */ + str r4, [r3] /* Enable MPU. */ dsb /* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ #if ( configENABLE_MPU == 1 ) - ldmia r1!, {r0, r2-r4} /* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */ - msr psplim, r2 /* Restore the PSPLIM register value for the task. */ + ldmia r2!, {r0, r1, r3, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */ + msr psplim, r1 /* Restore the PSPLIM register value for the task. */ msr control, r3 /* Restore the CONTROL register value for the task. */ mov lr, r4 /* LR = r4. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - str r0, [r2] /* Restore the task's xSecureContext. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + str r0, [r3] /* Restore the task's xSecureContext. */ cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */ - push {r1,r4} - bl SecureContext_LoadContext /* Restore the secure context. */ - pop {r1,r4} + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + push {r2, r4} + bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + pop {r2, r4} mov lr, r4 /* LR = r4. */ - lsls r2, r4, #25 /* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl restore_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - msr psp, r1 /* Remember the new top of stack for the task. */ + lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + msr psp, r2 /* Remember the new top of stack for the task. */ bx lr #else /* configENABLE_MPU */ - ldmia r1!, {r0, r2-r3} /* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */ - msr psplim, r2 /* Restore the PSPLIM register value for the task. */ - mov lr, r3 /* LR = r3. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - str r0, [r2] /* Restore the task's xSecureContext. */ + ldmia r2!, {r0, r1, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + msr psplim, r1 /* Restore the PSPLIM register value for the task. */ + mov lr, r4 /* LR = r4. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + str r0, [r3] /* Restore the task's xSecureContext. */ cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */ - push {r1,r3} - bl SecureContext_LoadContext /* Restore the secure context. */ - pop {r1,r3} - mov lr, r3 /* LR = r3. */ - lsls r2, r3, #25 /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl restore_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - msr psp, r1 /* Remember the new top of stack for the task. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + push {r2, r4} + bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + pop {r2, r4} + mov lr, r4 /* LR = r4. */ + lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + msr psp, r2 /* Remember the new top of stack for the task. */ bx lr #endif /* configENABLE_MPU */ restore_ns_context: - ldmia r1!, {r4-r11} /* Restore the registers that are not automatically restored. */ + ldmia r2!, {r4-r11} /* Restore the registers that are not automatically restored. */ #if ( configENABLE_FPU == 1 ) tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ it eq - vldmiaeq r1!, {s16-s31} /* Restore the FPU registers which are not restored automatically. */ + vldmiaeq r2!, {s16-s31} /* Restore the FPU registers which are not restored automatically. */ #endif /* configENABLE_FPU */ - msr psp, r1 /* Remember the new top of stack for the task. */ + msr psp, r2 /* Remember the new top of stack for the task. */ bx lr /*-----------------------------------------------------------*/ @@ -334,9 +341,9 @@ SVC_Handler: vPortFreeSecureContext: /* r0 = uint32_t *pulTCB. */ - ldr r1, [r0] /* The first item in the TCB is the top of the stack. */ - ldr r0, [r1] /* The first item on the stack is the task's xSecureContext. */ - cmp r0, #0 /* Raise svc if task's xSecureContext is not NULL. */ + ldr r2, [r0] /* The first item in the TCB is the top of the stack. */ + ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */ + cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */ it ne svcne 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */ bx lr /* Return. */ diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c index 9629775de..9dc324c9c 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c @@ -35,6 +35,9 @@ #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. #endif +void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) ); +void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) ); + void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) { /* pxSecureContext value is in r0. */ diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c index be5bbd2d1..3e3858911 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c @@ -31,6 +31,9 @@ /* Secure port macros. */ #include "secure_port_macros.h" +void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) ); +void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) ); + void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) { /* pxSecureContext value is in r0. */ diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s index 6864e1dfb..c0f8062bc 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s @@ -28,6 +28,13 @@ SECTION .text:CODE:NOROOT(2) THUMB +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" + PUBLIC SecureContext_LoadContextAsm PUBLIC SecureContext_SaveContextAsm diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s index 714e0b05a..8efbb73f8 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s @@ -28,6 +28,13 @@ SECTION .text:CODE:NOROOT(2) THUMB +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" + PUBLIC SecureContext_LoadContextAsm PUBLIC SecureContext_SaveContextAsm /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c index e3d2cdecc..884976374 100644 --- a/portable/ARMv8M/secure/context/secure_context.c +++ b/portable/ARMv8M/secure/context/secure_context.c @@ -50,11 +50,6 @@ */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 -/** - * @brief Invalid context ID. - */ -#define securecontextINVALID_CONTEXT_ID 0UL - /** * @brief Maximum number of secure contexts. */ @@ -70,11 +65,15 @@ SecureContext_t xSecureContexts[ secureconfigMAX_SECURE_CONTEXTS ]; /*-----------------------------------------------------------*/ /** - * @brief Get a free context from the secure context pool (xSecureContexts). + * @brief Get a free secure context for a task from the secure context pool (xSecureContexts). * - * @return Index of a free context in the xSecureContexts array. + * This function ensures that only one secure context is allocated for a task. + * + * @param[in] pvTaskHandle The task handle for which the secure context is allocated. + * + * @return Index of a free secure context in the xSecureContexts array. */ -static uint32_t ulGetSecureContext( void ); +static uint32_t ulGetSecureContext( void * pvTaskHandle ); /** * @brief Return the secure context to the secure context pool (xSecureContexts). @@ -88,16 +87,26 @@ extern void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ); extern void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ); /*-----------------------------------------------------------*/ -static uint32_t ulGetSecureContext( void ) +static uint32_t ulGetSecureContext( void * pvTaskHandle ) { - uint32_t ulSecureContextIndex; + /* Start with invalid index. */ + uint32_t i, ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS; - for( ulSecureContextIndex = 0; ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS; ulSecureContextIndex++ ) + for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ ) { - if( ( xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer == NULL ) && - ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == NULL ) && - ( xSecureContexts[ ulSecureContextIndex ].pucStackStart == NULL ) ) + if( ( xSecureContexts[ i ].pucCurrentStackPointer == NULL ) && + ( xSecureContexts[ i ].pucStackLimit == NULL ) && + ( xSecureContexts[ i ].pucStackStart == NULL ) && + ( xSecureContexts[ i ].pvTaskHandle == NULL ) && + ( ulSecureContextIndex == secureconfigMAX_SECURE_CONTEXTS ) ) { + ulSecureContextIndex = i; + } + else if( xSecureContexts[ i ].pvTaskHandle == pvTaskHandle ) + { + /* A task can only have one secure context. Do not allocate a second + * context for the same task. */ + ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS; break; } } @@ -111,20 +120,25 @@ static void vReturnSecureContext( uint32_t ulSecureContextIndex ) xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = NULL; xSecureContexts[ ulSecureContextIndex ].pucStackLimit = NULL; xSecureContexts[ ulSecureContextIndex ].pucStackStart = NULL; + xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = NULL; } /*-----------------------------------------------------------*/ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) { uint32_t ulIPSR, i; + static uint32_t ulSecureContextsInitialized = 0; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); /* Do nothing if the processor is running in the Thread Mode. IPSR is zero * when the processor is running in the Thread Mode. */ - if( ulIPSR != 0 ) + if( ( ulIPSR != 0 ) && ( ulSecureContextsInitialized == 0 ) ) { + /* Ensure to initialize secure contexts only once. */ + ulSecureContextsInitialized = 1; + /* No stack for thread mode until a task's context is loaded. */ secureportSET_PSPLIM( securecontextNO_STACK ); secureportSET_PSP( securecontextNO_STACK ); @@ -135,6 +149,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) xSecureContexts[ i ].pucCurrentStackPointer = NULL; xSecureContexts[ i ].pucStackLimit = NULL; xSecureContexts[ i ].pucStackStart = NULL; + xSecureContexts[ i ].pvTaskHandle = NULL; } #if ( configENABLE_MPU == 1 ) @@ -154,28 +169,35 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) #if ( configENABLE_MPU == 1 ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, - uint32_t ulIsTaskPrivileged ) + uint32_t ulIsTaskPrivileged, + void * pvTaskHandle ) #else /* configENABLE_MPU */ - secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ) + secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, + void * pvTaskHandle ) #endif /* configENABLE_MPU */ { uint8_t * pucStackMemory = NULL; + uint8_t * pucStackLimit; uint32_t ulIPSR, ulSecureContextIndex; - SecureContextHandle_t xSecureContextHandle; + SecureContextHandle_t xSecureContextHandle = securecontextINVALID_CONTEXT_ID; #if ( configENABLE_MPU == 1 ) uint32_t * pulCurrentStackPointer = NULL; #endif /* configENABLE_MPU */ - /* Read the Interrupt Program Status Register (IPSR) value. */ + /* Read the Interrupt Program Status Register (IPSR) and Process Stack Limit + * Register (PSPLIM) value. */ secureportREAD_IPSR( ulIPSR ); + secureportREAD_PSPLIM( pucStackLimit ); /* Do nothing if the processor is running in the Thread Mode. IPSR is zero - * when the processor is running in the Thread Mode. */ - if( ulIPSR != 0 ) + * when the processor is running in the Thread Mode. + * Also do nothing, if a secure context us already loaded. PSPLIM is set to + * securecontextNO_STACK when no secure context is loaded. */ + if( ( ulIPSR != 0 ) && ( pucStackLimit == securecontextNO_STACK ) ) { /* Ontain a free secure context. */ - ulSecureContextIndex = ulGetSecureContext(); + ulSecureContextIndex = ulGetSecureContext( pvTaskHandle ); /* Were we able to get a free context? */ if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) @@ -197,6 +219,8 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * programmed in the PSPLIM register on context switch.*/ xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; + xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = pvTaskHandle; + #if ( configENABLE_MPU == 1 ) { /* Store the correct CONTROL value for the task on the stack. @@ -229,10 +253,6 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Ensure to never return 0 as a valid context handle. */ xSecureContextHandle = ulSecureContextIndex + 1UL; } - else - { - xSecureContextHandle = securecontextINVALID_CONTEXT_ID; - } } } @@ -240,7 +260,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { uint32_t ulIPSR, ulSecureContextIndex; @@ -256,38 +276,61 @@ secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandl { ulSecureContextIndex = xSecureContextHandle - 1UL; - /* Free the stack space. */ - vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); + /* Ensure that the secure context being deleted is associated with + * the task. */ + if( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) + { + /* Free the stack space. */ + vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); - /* Return the context back to the free contexts pool. */ - vReturnSecureContext( ulSecureContextIndex ); + /* Return the secure context back to the free secure contexts pool. */ + vReturnSecureContext( ulSecureContextIndex ); + } } } } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { + uint8_t * pucStackLimit; uint32_t ulSecureContextIndex; if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) { ulSecureContextIndex = xSecureContextHandle - 1UL; - SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + secureportREAD_PSPLIM( pucStackLimit ); + + /* Ensure that no secure context is loaded and the task is loading it's + * own context. */ + if( ( pucStackLimit == securecontextNO_STACK ) && + ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) + { + SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } } } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { + uint8_t * pucStackLimit; uint32_t ulSecureContextIndex; if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) { ulSecureContextIndex = xSecureContextHandle - 1UL; - SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + secureportREAD_PSPLIM( pucStackLimit ); + + /* Ensure that task's context is loaded and the task is saving it's own + * context. */ + if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && + ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) + { + SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } } } /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/secure/context/secure_context.h b/portable/ARMv8M/secure/context/secure_context.h index 2ae78593f..b586f9710 100644 --- a/portable/ARMv8M/secure/context/secure_context.h +++ b/portable/ARMv8M/secure/context/secure_context.h @@ -37,7 +37,12 @@ /** * @brief PSP value when no secure context is loaded. */ -#define securecontextNO_STACK 0x0 +#define securecontextNO_STACK 0x0 + +/** + * @brief Invalid context ID. + */ +#define securecontextINVALID_CONTEXT_ID 0UL /*-----------------------------------------------------------*/ /** @@ -51,6 +56,7 @@ typedef struct SecureContext uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ uint8_t * pucStackStart; /**< First location of the stack memory. */ + void * pvTaskHandle; /**< Task handle of the task this context is associated with. */ } SecureContext_t; /*-----------------------------------------------------------*/ @@ -85,9 +91,11 @@ void SecureContext_Init( void ); */ #if ( configENABLE_MPU == 1 ) SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, - uint32_t ulIsTaskPrivileged ); + uint32_t ulIsTaskPrivileged, + void * pvTaskHandle ); #else /* configENABLE_MPU */ - SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ); + SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, + void * pvTaskHandle ); #endif /* configENABLE_MPU */ /** @@ -99,7 +107,7 @@ void SecureContext_Init( void ); * @param[in] xSecureContextHandle Context handle corresponding to the * context to be freed. */ -void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); /** * @brief Loads the given context. @@ -110,7 +118,7 @@ void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ); * @param[in] xSecureContextHandle Context handle corresponding to the context * to be loaded. */ -void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); /** * @brief Saves the given context. @@ -121,6 +129,6 @@ void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ); * @param[in] xSecureContextHandle Context handle corresponding to the context * to be saved. */ -void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); #endif /* __SECURE_CONTEXT_H__ */ diff --git a/portable/ARMv8M/secure/heap/secure_heap.c b/portable/ARMv8M/secure/heap/secure_heap.c index 3b380a9c0..28494b7c4 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.c +++ b/portable/ARMv8M/secure/heap/secure_heap.c @@ -448,9 +448,3 @@ size_t xPortGetMinimumEverFreeHeapSize( void ) return xMinimumEverFreeBytesRemaining; } /*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* This just exists to keep the linker quiet. */ -} -/*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/secure/heap/secure_heap.h b/portable/ARMv8M/secure/heap/secure_heap.h index fa78046e5..253e8b9f2 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.h +++ b/portable/ARMv8M/secure/heap/secure_heap.h @@ -48,4 +48,18 @@ void * pvPortMalloc( size_t xWantedSize ); */ void vPortFree( void * pv ); +/** + * @brief Get the free heap size. + * + * @return Free heap size. + */ +size_t xPortGetFreeHeapSize( void ); + +/** + * @brief Get the minimum ever free heap size. + * + * @return Minimum ever free heap size. + */ +size_t xPortGetMinimumEverFreeHeapSize( void ); + #endif /* __SECURE_HEAP_H__ */ diff --git a/portable/ARMv8M/secure/macros/secure_port_macros.h b/portable/ARMv8M/secure/macros/secure_port_macros.h index 7b8dbedc2..5ed052433 100644 --- a/portable/ARMv8M/secure/macros/secure_port_macros.h +++ b/portable/ARMv8M/secure/macros/secure_port_macros.h @@ -67,6 +67,12 @@ #define secureportSET_PSP( pucCurrentStackPointer ) \ __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) ) +/** + * @brief Read the PSPLIM value in the given variable. + */ +#define secureportREAD_PSPLIM( pucOutStackLimit ) \ + __asm volatile ( "mrs %0, psplim" : "=r" ( pucOutStackLimit ) ) + /** * @brief Set the PSPLIM to the given value. */ diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index ec82c675c..d861511ec 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -921,33 +921,6 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ } /*-----------------------------------------------------------*/ -#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - void MPU_vPortInitialiseBlocks( void ) /* FREERTOS_SYSTEM_CALL */ - { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); - - vPortInitialiseBlocks(); - - vPortResetPrivilege( xRunningPrivileged ); - } -#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ -/*-----------------------------------------------------------*/ - -#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - size_t MPU_xPortGetFreeHeapSize( void ) /* FREERTOS_SYSTEM_CALL */ - { - size_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); - - xReturn = xPortGetFreeHeapSize(); - - vPortResetPrivilege( xRunningPrivileged ); - - return xReturn; - } -#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ -/*-----------------------------------------------------------*/ - #if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index 852a11ce3..447aa67d2 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -779,7 +779,8 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0, ulR1; + extern TaskHandle_t pxCurrentTCB; #if ( configENABLE_MPU == 1 ) uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ @@ -810,25 +811,27 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged, pxCurrentTCB ); } #else /* if ( configENABLE_MPU == 1 ) */ { /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); + xSecureContext = SecureContext_AllocateContext( ulR0, pxCurrentTCB ); } #endif /* configENABLE_MPU */ - configASSERT( xSecureContext != NULL ); - SecureContext_LoadContext( xSecureContext ); + configASSERT( xSecureContext != securecontextINVALID_CONTEXT_ID ); + SecureContext_LoadContext( xSecureContext, pxCurrentTCB ); break; case portSVC_FREE_SECURE_CONTEXT: - /* R0 contains the secure context handle to be freed. */ + /* R0 contains TCB being freed and R1 contains the secure + * context handle to be freed. */ ulR0 = pulCallerStackAddress[ 0 ]; + ulR1 = pulCallerStackAddress[ 1 ]; /* Free the secure context. */ - SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 ); + SecureContext_FreeContext( ( SecureContextHandle_t ) ulR1, ( void * ) ulR0 ); break; #endif /* configENABLE_TRUSTZONE */ diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index 5276d8fac..20e18ca15 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -54,79 +54,79 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_ " ldr r0, [r3] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " \n" #if ( configENABLE_MPU == 1 ) - " dmb \n"/* Complete outstanding transfers before disabling MPU. */ - " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " movs r5, #1 \n"/* r5 = 1. */ - " bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ - " str r4, [r2] \n"/* Disable MPU. */ - " \n" - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r4, [r2] \n"/* Program MAIR0. */ - " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */ - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ - " movs r5, #4 \n"/* r5 = 4. */ - " str r5, [r2] \n"/* Program RNR = 4. */ - " ldmia r3!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */ - " movs r5, #5 \n"/* r5 = 5. */ - " str r5, [r2] \n"/* Program RNR = 5. */ - " ldmia r3!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */ - " movs r5, #6 \n"/* r5 = 6. */ - " str r5, [r2] \n"/* Program RNR = 6. */ - " ldmia r3!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */ - " movs r5, #7 \n"/* r5 = 7. */ - " str r5, [r2] \n"/* Program RNR = 7. */ - " ldmia r3!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " movs r5, #1 \n"/* r5 = 1. */ - " orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ - " str r4, [r2] \n"/* Enable MPU. */ - " dsb \n"/* Force memory writes before continuing. */ + " dmb \n"/* Complete outstanding transfers before disabling MPU. */ + " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ + " movs r5, #1 \n"/* r5 = 1. */ + " bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ + " str r4, [r2] \n"/* Disable MPU. */ + " \n" + " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ + " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r4, [r2] \n"/* Program MAIR0. */ + " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */ + " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ + " movs r5, #4 \n"/* r5 = 4. */ + " str r5, [r2] \n"/* Program RNR = 4. */ + " ldmia r3!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */ + " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ + " stmia r4!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */ + " movs r5, #5 \n"/* r5 = 5. */ + " str r5, [r2] \n"/* Program RNR = 5. */ + " ldmia r3!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */ + " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ + " stmia r4!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */ + " movs r5, #6 \n"/* r5 = 6. */ + " str r5, [r2] \n"/* Program RNR = 6. */ + " ldmia r3!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */ + " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ + " stmia r4!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */ + " movs r5, #7 \n"/* r5 = 7. */ + " str r5, [r2] \n"/* Program RNR = 7. */ + " ldmia r3!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */ + " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ + " stmia r4!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ + " movs r5, #1 \n"/* r5 = 1. */ + " orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ + " str r4, [r2] \n"/* Enable MPU. */ + " dsb \n"/* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ " \n" #if ( configENABLE_MPU == 1 ) - " ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */ - " ldr r5, xSecureContextConst2 \n" - " str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ - " msr control, r3 \n"/* Set this task's CONTROL value. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " bx r4 \n"/* Finally, branch to EXC_RETURN. */ + " ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */ + " ldr r5, xSecureContextConst2 \n" + " str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ + " msr control, r3 \n"/* Set this task's CONTROL value. */ + " adds r0, #32 \n"/* Discard everything up to r0. */ + " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ + " isb \n" + " bx r4 \n"/* Finally, branch to EXC_RETURN. */ #else /* configENABLE_MPU */ - " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ - " ldr r4, xSecureContextConst2 \n" - " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " bx r3 \n"/* Finally, branch to EXC_RETURN. */ + " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ + " ldr r4, xSecureContextConst2 \n" + " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ + " movs r1, #2 \n"/* r1 = 2. */ + " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n"/* Discard everything up to r0. */ + " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ + " isb \n" + " bx r3 \n"/* Finally, branch to EXC_RETURN. */ #endif /* configENABLE_MPU */ " \n" " .align 4 \n" "pxCurrentTCBConst2: .word pxCurrentTCB \n" "xSecureContextConst2: .word xSecureContext \n" #if ( configENABLE_MPU == 1 ) - "xMPUCTRLConst2: .word 0xe000ed94 \n" - "xMAIR0Const2: .word 0xe000edc0 \n" - "xRNRConst2: .word 0xe000ed98 \n" - "xRBARConst2: .word 0xe000ed9c \n" + "xMPUCTRLConst2: .word 0xe000ed94 \n" + "xMAIR0Const2: .word 0xe000edc0 \n" + "xRNRConst2: .word 0xe000ed98 \n" + "xRBARConst2: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ ); } @@ -232,64 +232,66 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ " .extern SecureContext_SaveContext \n" " .extern SecureContext_LoadContext \n" " \n" - " mrs r1, psp \n"/* Read PSP in r1. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r2] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/ + " mrs r2, psp \n"/* Read PSP in r2. */ " \n" " cbz r0, save_ns_context \n"/* No secure context to save. */ " push {r0-r2, r14} \n" - " bl SecureContext_SaveContext \n" + " bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ " pop {r0-r3} \n"/* LR is now in r3. */ " mov lr, r3 \n"/* LR = r3. */ - " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r2, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ #if ( configENABLE_MPU == 1 ) - " subs r1, r1, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mrs r3, control \n"/* r3 = CONTROL. */ - " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ - " stmia r1!, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " subs r2, r2, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mrs r3, control \n"/* r3 = CONTROL. */ + " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - " subs r1, r1, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r1!, {r0, r2-r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ + " subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ " b select_next_task \n" " \n" " save_ns_context: \n" " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r2, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ #if ( configENABLE_MPU == 1 ) - " subs r1, r1, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " adds r1, r1, #16 \n"/* r1 = r1 + 16. */ - " stmia r1!, {r4-r7} \n"/* Store the low registers that are not saved automatically. */ - " mov r4, r8 \n"/* r4 = r8. */ - " mov r5, r9 \n"/* r5 = r9. */ - " mov r6, r10 \n"/* r6 = r10. */ - " mov r7, r11 \n"/* r7 = r11. */ - " stmia r1!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mrs r3, control \n"/* r3 = CONTROL. */ - " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ - " subs r1, r1, #48 \n"/* r1 = r1 - 48. */ - " stmia r1!, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " subs r2, r2, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " adds r2, r2, #16 \n"/* r2 = r2 + 16. */ + " stmia r2!, {r4-r7} \n"/* Store the low registers that are not saved automatically. */ + " mov r4, r8 \n"/* r4 = r8. */ + " mov r5, r9 \n"/* r5 = r9. */ + " mov r6, r10 \n"/* r6 = r10. */ + " mov r7, r11 \n"/* r7 = r11. */ + " stmia r2!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mrs r3, control \n"/* r3 = CONTROL. */ + " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ + " subs r2, r2, #48 \n"/* r2 = r2 - 48. */ + " stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - " subs r1, r1, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r1!, {r0, r2-r7} \n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ - " mov r4, r8 \n"/* r4 = r8. */ - " mov r5, r9 \n"/* r5 = r9. */ - " mov r6, r10 \n"/* r6 = r10. */ - " mov r7, r11 \n"/* r7 = r11. */ - " stmia r1!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ + " subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3-r7} \n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ + " mov r4, r8 \n"/* r4 = r8. */ + " mov r5, r9 \n"/* r5 = r9. */ + " mov r6, r10 \n"/* r6 = r10. */ + " mov r7, r11 \n"/* r7 = r11. */ + " stmia r2!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */ #endif /* configENABLE_MPU */ " \n" " select_next_task: \n" @@ -297,106 +299,110 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ " bl vTaskSwitchContext \n" " cpsie i \n" " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r3, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r1, [r3] \n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ " \n" #if ( configENABLE_MPU == 1 ) - " dmb \n"/* Complete outstanding transfers before disabling MPU. */ - " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " movs r5, #1 \n"/* r5 = 1. */ - " bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ - " str r4, [r2] \n"/* Disable MPU. */ - " \n" - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ - " ldr r2, xMAIR0Const \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r4, [r2] \n"/* Program MAIR0. */ - " ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */ - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ - " movs r5, #4 \n"/* r5 = 4. */ - " str r5, [r2] \n"/* Program RNR = 4. */ - " ldmia r3!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */ - " movs r5, #5 \n"/* r5 = 5. */ - " str r5, [r2] \n"/* Program RNR = 5. */ - " ldmia r3!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */ - " movs r5, #6 \n"/* r5 = 6. */ - " str r5, [r2] \n"/* Program RNR = 6. */ - " ldmia r3!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */ - " movs r5, #7 \n"/* r5 = 7. */ - " str r5, [r2] \n"/* Program RNR = 7. */ - " ldmia r3!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */ - " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */ - " stmia r4!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */ - " \n" - " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " movs r5, #1 \n"/* r5 = 1. */ - " orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ - " str r4, [r2] \n"/* Enable MPU. */ - " dsb \n"/* Force memory writes before continuing. */ + " dmb \n"/* Complete outstanding transfers before disabling MPU. */ + " ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */ + " movs r5, #1 \n"/* r5 = 1. */ + " bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ + " str r4, [r3] \n"/* Disable MPU. */ + " \n" + " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ + " ldr r4, [r1] \n"/* r4 = *r1 i.e. r4 = MAIR0. */ + " ldr r3, xMAIR0Const \n"/* r3 = 0xe000edc0 [Location of MAIR0]. */ + " str r4, [r3] \n"/* Program MAIR0. */ + " ldr r4, xRNRConst \n"/* r4 = 0xe000ed98 [Location of RNR]. */ + " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ + " movs r5, #4 \n"/* r5 = 4. */ + " str r5, [r4] \n"/* Program RNR = 4. */ + " ldmia r1!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */ + " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */ + " stmia r3!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */ + " movs r5, #5 \n"/* r5 = 5. */ + " str r5, [r4] \n"/* Program RNR = 5. */ + " ldmia r1!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */ + " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */ + " stmia r3!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */ + " movs r5, #6 \n"/* r5 = 6. */ + " str r5, [r4] \n"/* Program RNR = 6. */ + " ldmia r1!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */ + " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */ + " stmia r3!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */ + " movs r5, #7 \n"/* r5 = 7. */ + " str r5, [r4] \n"/* Program RNR = 7. */ + " ldmia r1!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */ + " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */ + " stmia r3!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */ + " \n" + " ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */ + " movs r5, #1 \n"/* r5 = 1. */ + " orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ + " str r4, [r3] \n"/* Enable MPU. */ + " dsb \n"/* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ " \n" #if ( configENABLE_MPU == 1 ) - " ldmia r1!, {r0, r2-r4} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */ - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " msr control, r3 \n"/* Restore the CONTROL register value for the task. */ - " mov lr, r4 \n"/* LR = r4. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r2] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " push {r1,r4} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. */ - " pop {r1,r4} \n" - " mov lr, r4 \n"/* LR = r4. */ - " lsls r2, r4, #25 \n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" + " ldmia r2!, {r0, r1, r3, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */ + " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ + " msr control, r3 \n"/* Restore the CONTROL register value for the task. */ + " mov lr, r4 \n"/* LR = r4. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n"/* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n"/* LR = r4. */ + " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ + " bx lr \n" #else /* configENABLE_MPU */ - " ldmia r1!, {r0, r2-r3} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */ - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " mov lr, r3 \n"/* LR = r3. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r2] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " push {r1,r3} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. */ - " pop {r1,r3} \n" - " mov lr, r3 \n"/* LR = r3. */ - " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" + " ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ + " mov lr, r4 \n"/* LR = r4. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n"/* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n"/* LR = r4. */ + " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ + " bx lr \n" #endif /* configENABLE_MPU */ " \n" " restore_ns_context: \n" - " adds r1, r1, #16 \n"/* Move to the high registers. */ - " ldmia r1!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */ + " adds r2, r2, #16 \n"/* Move to the high registers. */ + " ldmia r2!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */ " mov r8, r4 \n"/* r8 = r4. */ " mov r9, r5 \n"/* r9 = r5. */ " mov r10, r6 \n"/* r10 = r6. */ " mov r11, r7 \n"/* r11 = r7. */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ - " subs r1, r1, #32 \n"/* Go back to the low registers. */ - " ldmia r1!, {r4-r7} \n"/* Restore the low registers that are not automatically restored. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ + " subs r2, r2, #32 \n"/* Go back to the low registers. */ + " ldmia r2!, {r4-r7} \n"/* Restore the low registers that are not automatically restored. */ " bx lr \n" " \n" " .align 4 \n" "pxCurrentTCBConst: .word pxCurrentTCB \n" "xSecureContextConst: .word xSecureContext \n" #if ( configENABLE_MPU == 1 ) - "xMPUCTRLConst: .word 0xe000ed94 \n" - "xMAIR0Const: .word 0xe000edc0 \n" - "xRNRConst: .word 0xe000ed98 \n" - "xRBARConst: .word 0xe000ed9c \n" + "xMPUCTRLConst: .word 0xe000ed94 \n" + "xMAIR0Const: .word 0xe000edc0 \n" + "xRNRConst: .word 0xe000ed98 \n" + "xRBARConst: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ ); } @@ -439,9 +445,9 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR { __asm volatile ( - " ldr r1, [r0] \n"/* The first item in the TCB is the top of the stack. */ - " ldr r0, [r1] \n"/* The first item on the stack is the task's xSecureContext. */ - " cmp r0, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ + " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ + " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ + " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ " beq free_secure_context \n" " bx lr \n"/* There is no secure context (xSecureContext is NULL). */ " free_secure_context: \n" diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c index e3d2cdecc..884976374 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/portable/GCC/ARM_CM23/secure/secure_context.c @@ -50,11 +50,6 @@ */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 -/** - * @brief Invalid context ID. - */ -#define securecontextINVALID_CONTEXT_ID 0UL - /** * @brief Maximum number of secure contexts. */ @@ -70,11 +65,15 @@ SecureContext_t xSecureContexts[ secureconfigMAX_SECURE_CONTEXTS ]; /*-----------------------------------------------------------*/ /** - * @brief Get a free context from the secure context pool (xSecureContexts). + * @brief Get a free secure context for a task from the secure context pool (xSecureContexts). * - * @return Index of a free context in the xSecureContexts array. + * This function ensures that only one secure context is allocated for a task. + * + * @param[in] pvTaskHandle The task handle for which the secure context is allocated. + * + * @return Index of a free secure context in the xSecureContexts array. */ -static uint32_t ulGetSecureContext( void ); +static uint32_t ulGetSecureContext( void * pvTaskHandle ); /** * @brief Return the secure context to the secure context pool (xSecureContexts). @@ -88,16 +87,26 @@ extern void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ); extern void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ); /*-----------------------------------------------------------*/ -static uint32_t ulGetSecureContext( void ) +static uint32_t ulGetSecureContext( void * pvTaskHandle ) { - uint32_t ulSecureContextIndex; + /* Start with invalid index. */ + uint32_t i, ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS; - for( ulSecureContextIndex = 0; ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS; ulSecureContextIndex++ ) + for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ ) { - if( ( xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer == NULL ) && - ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == NULL ) && - ( xSecureContexts[ ulSecureContextIndex ].pucStackStart == NULL ) ) + if( ( xSecureContexts[ i ].pucCurrentStackPointer == NULL ) && + ( xSecureContexts[ i ].pucStackLimit == NULL ) && + ( xSecureContexts[ i ].pucStackStart == NULL ) && + ( xSecureContexts[ i ].pvTaskHandle == NULL ) && + ( ulSecureContextIndex == secureconfigMAX_SECURE_CONTEXTS ) ) { + ulSecureContextIndex = i; + } + else if( xSecureContexts[ i ].pvTaskHandle == pvTaskHandle ) + { + /* A task can only have one secure context. Do not allocate a second + * context for the same task. */ + ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS; break; } } @@ -111,20 +120,25 @@ static void vReturnSecureContext( uint32_t ulSecureContextIndex ) xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = NULL; xSecureContexts[ ulSecureContextIndex ].pucStackLimit = NULL; xSecureContexts[ ulSecureContextIndex ].pucStackStart = NULL; + xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = NULL; } /*-----------------------------------------------------------*/ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) { uint32_t ulIPSR, i; + static uint32_t ulSecureContextsInitialized = 0; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); /* Do nothing if the processor is running in the Thread Mode. IPSR is zero * when the processor is running in the Thread Mode. */ - if( ulIPSR != 0 ) + if( ( ulIPSR != 0 ) && ( ulSecureContextsInitialized == 0 ) ) { + /* Ensure to initialize secure contexts only once. */ + ulSecureContextsInitialized = 1; + /* No stack for thread mode until a task's context is loaded. */ secureportSET_PSPLIM( securecontextNO_STACK ); secureportSET_PSP( securecontextNO_STACK ); @@ -135,6 +149,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) xSecureContexts[ i ].pucCurrentStackPointer = NULL; xSecureContexts[ i ].pucStackLimit = NULL; xSecureContexts[ i ].pucStackStart = NULL; + xSecureContexts[ i ].pvTaskHandle = NULL; } #if ( configENABLE_MPU == 1 ) @@ -154,28 +169,35 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) #if ( configENABLE_MPU == 1 ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, - uint32_t ulIsTaskPrivileged ) + uint32_t ulIsTaskPrivileged, + void * pvTaskHandle ) #else /* configENABLE_MPU */ - secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ) + secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, + void * pvTaskHandle ) #endif /* configENABLE_MPU */ { uint8_t * pucStackMemory = NULL; + uint8_t * pucStackLimit; uint32_t ulIPSR, ulSecureContextIndex; - SecureContextHandle_t xSecureContextHandle; + SecureContextHandle_t xSecureContextHandle = securecontextINVALID_CONTEXT_ID; #if ( configENABLE_MPU == 1 ) uint32_t * pulCurrentStackPointer = NULL; #endif /* configENABLE_MPU */ - /* Read the Interrupt Program Status Register (IPSR) value. */ + /* Read the Interrupt Program Status Register (IPSR) and Process Stack Limit + * Register (PSPLIM) value. */ secureportREAD_IPSR( ulIPSR ); + secureportREAD_PSPLIM( pucStackLimit ); /* Do nothing if the processor is running in the Thread Mode. IPSR is zero - * when the processor is running in the Thread Mode. */ - if( ulIPSR != 0 ) + * when the processor is running in the Thread Mode. + * Also do nothing, if a secure context us already loaded. PSPLIM is set to + * securecontextNO_STACK when no secure context is loaded. */ + if( ( ulIPSR != 0 ) && ( pucStackLimit == securecontextNO_STACK ) ) { /* Ontain a free secure context. */ - ulSecureContextIndex = ulGetSecureContext(); + ulSecureContextIndex = ulGetSecureContext( pvTaskHandle ); /* Were we able to get a free context? */ if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) @@ -197,6 +219,8 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * programmed in the PSPLIM register on context switch.*/ xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; + xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = pvTaskHandle; + #if ( configENABLE_MPU == 1 ) { /* Store the correct CONTROL value for the task on the stack. @@ -229,10 +253,6 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Ensure to never return 0 as a valid context handle. */ xSecureContextHandle = ulSecureContextIndex + 1UL; } - else - { - xSecureContextHandle = securecontextINVALID_CONTEXT_ID; - } } } @@ -240,7 +260,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { uint32_t ulIPSR, ulSecureContextIndex; @@ -256,38 +276,61 @@ secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandl { ulSecureContextIndex = xSecureContextHandle - 1UL; - /* Free the stack space. */ - vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); + /* Ensure that the secure context being deleted is associated with + * the task. */ + if( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) + { + /* Free the stack space. */ + vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); - /* Return the context back to the free contexts pool. */ - vReturnSecureContext( ulSecureContextIndex ); + /* Return the secure context back to the free secure contexts pool. */ + vReturnSecureContext( ulSecureContextIndex ); + } } } } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { + uint8_t * pucStackLimit; uint32_t ulSecureContextIndex; if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) { ulSecureContextIndex = xSecureContextHandle - 1UL; - SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + secureportREAD_PSPLIM( pucStackLimit ); + + /* Ensure that no secure context is loaded and the task is loading it's + * own context. */ + if( ( pucStackLimit == securecontextNO_STACK ) && + ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) + { + SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } } } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { + uint8_t * pucStackLimit; uint32_t ulSecureContextIndex; if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) { ulSecureContextIndex = xSecureContextHandle - 1UL; - SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + secureportREAD_PSPLIM( pucStackLimit ); + + /* Ensure that task's context is loaded and the task is saving it's own + * context. */ + if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && + ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) + { + SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } } } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM23/secure/secure_context.h b/portable/GCC/ARM_CM23/secure/secure_context.h index 2ae78593f..b586f9710 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.h +++ b/portable/GCC/ARM_CM23/secure/secure_context.h @@ -37,7 +37,12 @@ /** * @brief PSP value when no secure context is loaded. */ -#define securecontextNO_STACK 0x0 +#define securecontextNO_STACK 0x0 + +/** + * @brief Invalid context ID. + */ +#define securecontextINVALID_CONTEXT_ID 0UL /*-----------------------------------------------------------*/ /** @@ -51,6 +56,7 @@ typedef struct SecureContext uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ uint8_t * pucStackStart; /**< First location of the stack memory. */ + void * pvTaskHandle; /**< Task handle of the task this context is associated with. */ } SecureContext_t; /*-----------------------------------------------------------*/ @@ -85,9 +91,11 @@ void SecureContext_Init( void ); */ #if ( configENABLE_MPU == 1 ) SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, - uint32_t ulIsTaskPrivileged ); + uint32_t ulIsTaskPrivileged, + void * pvTaskHandle ); #else /* configENABLE_MPU */ - SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ); + SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, + void * pvTaskHandle ); #endif /* configENABLE_MPU */ /** @@ -99,7 +107,7 @@ void SecureContext_Init( void ); * @param[in] xSecureContextHandle Context handle corresponding to the * context to be freed. */ -void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); /** * @brief Loads the given context. @@ -110,7 +118,7 @@ void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ); * @param[in] xSecureContextHandle Context handle corresponding to the context * to be loaded. */ -void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); /** * @brief Saves the given context. @@ -121,6 +129,6 @@ void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ); * @param[in] xSecureContextHandle Context handle corresponding to the context * to be saved. */ -void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); #endif /* __SECURE_CONTEXT_H__ */ diff --git a/portable/GCC/ARM_CM23/secure/secure_context_port.c b/portable/GCC/ARM_CM23/secure/secure_context_port.c index 9629775de..9dc324c9c 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM23/secure/secure_context_port.c @@ -35,6 +35,9 @@ #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. #endif +void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) ); +void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) ); + void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) { /* pxSecureContext value is in r0. */ diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.c b/portable/GCC/ARM_CM23/secure/secure_heap.c index 3b380a9c0..28494b7c4 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.c +++ b/portable/GCC/ARM_CM23/secure/secure_heap.c @@ -448,9 +448,3 @@ size_t xPortGetMinimumEverFreeHeapSize( void ) return xMinimumEverFreeBytesRemaining; } /*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* This just exists to keep the linker quiet. */ -} -/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.h b/portable/GCC/ARM_CM23/secure/secure_heap.h index fa78046e5..253e8b9f2 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.h +++ b/portable/GCC/ARM_CM23/secure/secure_heap.h @@ -48,4 +48,18 @@ void * pvPortMalloc( size_t xWantedSize ); */ void vPortFree( void * pv ); +/** + * @brief Get the free heap size. + * + * @return Free heap size. + */ +size_t xPortGetFreeHeapSize( void ); + +/** + * @brief Get the minimum ever free heap size. + * + * @return Minimum ever free heap size. + */ +size_t xPortGetMinimumEverFreeHeapSize( void ); + #endif /* __SECURE_HEAP_H__ */ diff --git a/portable/GCC/ARM_CM23/secure/secure_port_macros.h b/portable/GCC/ARM_CM23/secure/secure_port_macros.h index 7b8dbedc2..5ed052433 100644 --- a/portable/GCC/ARM_CM23/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM23/secure/secure_port_macros.h @@ -67,6 +67,12 @@ #define secureportSET_PSP( pucCurrentStackPointer ) \ __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) ) +/** + * @brief Read the PSPLIM value in the given variable. + */ +#define secureportREAD_PSPLIM( pucOutStackLimit ) \ + __asm volatile ( "mrs %0, psplim" : "=r" ( pucOutStackLimit ) ) + /** * @brief Set the PSPLIM to the given value. */ diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index b4639dfe8..dfc895417 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -779,7 +779,8 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0, ulR1; + extern TaskHandle_t pxCurrentTCB; #if ( configENABLE_MPU == 1 ) uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ @@ -810,25 +811,27 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged, pxCurrentTCB ); } #else /* if ( configENABLE_MPU == 1 ) */ { /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); + xSecureContext = SecureContext_AllocateContext( ulR0, pxCurrentTCB ); } #endif /* configENABLE_MPU */ - configASSERT( xSecureContext != NULL ); - SecureContext_LoadContext( xSecureContext ); + configASSERT( xSecureContext != securecontextINVALID_CONTEXT_ID ); + SecureContext_LoadContext( xSecureContext, pxCurrentTCB ); break; case portSVC_FREE_SECURE_CONTEXT: - /* R0 contains the secure context handle to be freed. */ + /* R0 contains TCB being freed and R1 contains the secure + * context handle to be freed. */ ulR0 = pulCallerStackAddress[ 0 ]; + ulR1 = pulCallerStackAddress[ 1 ]; /* Free the secure context. */ - SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 ); + SecureContext_FreeContext( ( SecureContextHandle_t ) ulR1, ( void * ) ulR0 ); break; #endif /* configENABLE_TRUSTZONE */ diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index b4639dfe8..dfc895417 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -779,7 +779,8 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0, ulR1; + extern TaskHandle_t pxCurrentTCB; #if ( configENABLE_MPU == 1 ) uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ @@ -810,25 +811,27 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged, pxCurrentTCB ); } #else /* if ( configENABLE_MPU == 1 ) */ { /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); + xSecureContext = SecureContext_AllocateContext( ulR0, pxCurrentTCB ); } #endif /* configENABLE_MPU */ - configASSERT( xSecureContext != NULL ); - SecureContext_LoadContext( xSecureContext ); + configASSERT( xSecureContext != securecontextINVALID_CONTEXT_ID ); + SecureContext_LoadContext( xSecureContext, pxCurrentTCB ); break; case portSVC_FREE_SECURE_CONTEXT: - /* R0 contains the secure context handle to be freed. */ + /* R0 contains TCB being freed and R1 contains the secure + * context handle to be freed. */ ulR0 = pulCallerStackAddress[ 0 ]; + ulR1 = pulCallerStackAddress[ 1 ]; /* Free the secure context. */ - SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 ); + SecureContext_FreeContext( ( SecureContextHandle_t ) ulR1, ( void * ) ulR0 ); break; #endif /* configENABLE_TRUSTZONE */ diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.c b/portable/GCC/ARM_CM33/non_secure/portasm.c index aaab4cfa8..8848dd786 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33/non_secure/portasm.c @@ -50,66 +50,66 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_ " ldr r0, [r3] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " \n" #if ( configENABLE_MPU == 1 ) - " dmb \n"/* Complete outstanding transfers before disabling MPU. */ - " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ - " str r4, [r2] \n"/* Disable MPU. */ - " \n" - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ - " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r4, [r2] \n"/* Program MAIR0. */ - " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */ - " movs r4, #4 \n"/* r4 = 4. */ - " str r4, [r2] \n"/* Program RNR = 4. */ - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ - " ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */ - " ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */ - " stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ - " str r4, [r2] \n"/* Enable MPU. */ - " dsb \n"/* Force memory writes before continuing. */ + " dmb \n"/* Complete outstanding transfers before disabling MPU. */ + " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ + " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ + " str r4, [r2] \n"/* Disable MPU. */ + " \n" + " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ + " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ + " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ + " str r4, [r2] \n"/* Program MAIR0. */ + " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */ + " movs r4, #4 \n"/* r4 = 4. */ + " str r4, [r2] \n"/* Program RNR = 4. */ + " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ + " ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */ + " ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */ + " stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ + " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ + " str r4, [r2] \n"/* Enable MPU. */ + " dsb \n"/* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ " \n" #if ( configENABLE_MPU == 1 ) - " ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */ - " ldr r5, xSecureContextConst2 \n" - " str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ - " msr control, r3 \n"/* Set this task's CONTROL value. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ - " bx r4 \n"/* Finally, branch to EXC_RETURN. */ + " ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */ + " ldr r5, xSecureContextConst2 \n" + " str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ + " msr control, r3 \n"/* Set this task's CONTROL value. */ + " adds r0, #32 \n"/* Discard everything up to r0. */ + " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ + " bx r4 \n"/* Finally, branch to EXC_RETURN. */ #else /* configENABLE_MPU */ - " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ - " ldr r4, xSecureContextConst2 \n" - " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ - " movs r1, #2 \n"/* r1 = 2. */ - " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ - " adds r0, #32 \n"/* Discard everything up to r0. */ - " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ - " isb \n" - " mov r0, #0 \n" - " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ - " bx r3 \n"/* Finally, branch to EXC_RETURN. */ + " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ + " ldr r4, xSecureContextConst2 \n" + " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */ + " msr psplim, r2 \n"/* Set this task's PSPLIM value. */ + " movs r1, #2 \n"/* r1 = 2. */ + " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */ + " adds r0, #32 \n"/* Discard everything up to r0. */ + " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n"/* Ensure that interrupts are enabled when the first task starts. */ + " bx r3 \n"/* Finally, branch to EXC_RETURN. */ #endif /* configENABLE_MPU */ " \n" " .align 4 \n" "pxCurrentTCBConst2: .word pxCurrentTCB \n" "xSecureContextConst2: .word xSecureContext \n" #if ( configENABLE_MPU == 1 ) - "xMPUCTRLConst2: .word 0xe000ed94 \n" - "xMAIR0Const2: .word 0xe000edc0 \n" - "xRNRConst2: .word 0xe000ed98 \n" - "xRBARConst2: .word 0xe000ed9c \n" + "xMPUCTRLConst2: .word 0xe000ed94 \n" + "xMAIR0Const2: .word 0xe000edc0 \n" + "xRNRConst2: .word 0xe000ed98 \n" + "xRBARConst2: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ ); } @@ -216,62 +216,65 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ " .extern SecureContext_SaveContext \n" " .extern SecureContext_LoadContext \n" " \n" - " mrs r1, psp \n"/* Read PSP in r1. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " ldr r0, [r2] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " ldr r0, [r3] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + " mrs r2, psp \n"/* Read PSP in r2. */ " \n" " cbz r0, save_ns_context \n"/* No secure context to save. */ " push {r0-r2, r14} \n" - " bl SecureContext_SaveContext \n" + " bl SecureContext_SaveContext \n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ " pop {r0-r3} \n"/* LR is now in r3. */ " mov lr, r3 \n"/* LR = r3. */ - " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " lsls r1, r3, #25 \n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " \n" " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r2, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB.*/ #if ( configENABLE_MPU == 1 ) - " subs r1, r1, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mrs r3, control \n"/* r3 = CONTROL. */ - " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ - " stmia r1!, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " subs r2, r2, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mrs r3, control \n"/* r3 = CONTROL. */ + " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - " subs r1, r1, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " stmia r1!, {r0, r2-r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ + " subs r2, r2, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ + " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ " b select_next_task \n" " \n" " save_ns_context: \n" " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r2, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ #if ( configENABLE_FPU == 1 ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ - " it eq \n" - " vstmdbeq r1!, {s16-s31} \n"/* Store the FPU registers which are not saved automatically. */ + " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ + " it eq \n" + " vstmdbeq r2!, {s16-s31} \n"/* Store the FPU registers which are not saved automatically. */ #endif /* configENABLE_FPU */ #if ( configENABLE_MPU == 1 ) - " subs r1, r1, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " adds r1, r1, #16 \n"/* r1 = r1 + 16. */ - " stm r1, {r4-r11} \n"/* Store the registers that are not saved automatically. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mrs r3, control \n"/* r3 = CONTROL. */ - " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ - " subs r1, r1, #16 \n"/* r1 = r1 - 16. */ - " stm r1, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + " subs r2, r2, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " adds r2, r2, #16 \n"/* r2 = r2 + 16. */ + " stm r2, {r4-r11} \n"/* Store the registers that are not saved automatically. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mrs r3, control \n"/* r3 = CONTROL. */ + " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */ + " subs r2, r2, #16 \n"/* r2 = r2 - 16. */ + " stmia r2!, {r0, r1, r3, r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - " subs r1, r1, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - " str r1, [r2] \n"/* Save the new top of stack in TCB. */ - " adds r1, r1, #12 \n"/* r1 = r1 + 12. */ - " stm r1, {r4-r11} \n"/* Store the registers that are not saved automatically. */ - " mrs r2, psplim \n"/* r2 = PSPLIM. */ - " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ - " subs r1, r1, #12 \n"/* r1 = r1 - 12. */ - " stmia r1!, {r0, r2-r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ + " subs r2, r2, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + " str r2, [r1] \n"/* Save the new top of stack in TCB. */ + " adds r2, r2, #12 \n"/* r2 = r2 + 12. */ + " stm r2, {r4-r11} \n"/* Store the registers that are not saved automatically. */ + " mrs r1, psplim \n"/* r1 = PSPLIM. */ + " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */ + " subs r2, r2, #12 \n"/* r2 = r2 - 12. */ + " stmia r2!, {r0, r1, r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ " \n" " select_next_task: \n" @@ -283,87 +286,91 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ " mov r0, #0 \n"/* r0 = 0. */ " msr basepri, r0 \n"/* Enable interrupts. */ " \n" - " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - " ldr r3, [r2] \n"/* Read pxCurrentTCB. */ - " ldr r1, [r3] \n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " ldr r2, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ " \n" #if ( configENABLE_MPU == 1 ) - " dmb \n"/* Complete outstanding transfers before disabling MPU. */ - " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ - " str r4, [r2] \n"/* Disable MPU. */ - " \n" - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */ - " ldr r2, xMAIR0Const \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */ - " str r4, [r2] \n"/* Program MAIR0. */ - " ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */ - " movs r4, #4 \n"/* r4 = 4. */ - " str r4, [r2] \n"/* Program RNR = 4. */ - " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ - " ldr r2, xRBARConst \n"/* r2 = 0xe000ed9c [Location of RBAR]. */ - " ldmia r3!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */ - " stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */ - " \n" - " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */ - " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ - " str r4, [r2] \n"/* Enable MPU. */ - " dsb \n"/* Force memory writes before continuing. */ + " dmb \n"/* Complete outstanding transfers before disabling MPU. */ + " ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */ + " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ + " str r4, [r3] \n"/* Disable MPU. */ + " \n" + " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ + " ldr r4, [r1] \n"/* r4 = *r1 i.e. r4 = MAIR0. */ + " ldr r3, xMAIR0Const \n"/* r3 = 0xe000edc0 [Location of MAIR0]. */ + " str r4, [r3] \n"/* Program MAIR0. */ + " ldr r3, xRNRConst \n"/* r3 = 0xe000ed98 [Location of RNR]. */ + " movs r4, #4 \n"/* r4 = 4. */ + " str r4, [r3] \n"/* Program RNR = 4. */ + " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ + " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */ + " ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */ + " stmia r3!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */ + " \n" + " ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + " ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */ + " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ + " str r4, [r3] \n"/* Enable MPU. */ + " dsb \n"/* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ " \n" #if ( configENABLE_MPU == 1 ) - " ldmia r1!, {r0, r2-r4} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */ - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " msr control, r3 \n"/* Restore the CONTROL register value for the task. */ - " mov lr, r4 \n"/* LR = r4. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r2] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " push {r1,r4} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. */ - " pop {r1,r4} \n" - " mov lr, r4 \n"/* LR = r4. */ - " lsls r2, r4, #25 \n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" + " ldmia r2!, {r0, r1, r3, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */ + " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ + " msr control, r3 \n"/* Restore the CONTROL register value for the task. */ + " mov lr, r4 \n"/* LR = r4. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n"/* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n"/* LR = r4. */ + " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ + " bx lr \n" #else /* configENABLE_MPU */ - " ldmia r1!, {r0, r2-r3} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */ - " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */ - " mov lr, r3 \n"/* LR = r3. */ - " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ - " str r0, [r2] \n"/* Restore the task's xSecureContext. */ - " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ - " push {r1,r3} \n" - " bl SecureContext_LoadContext \n"/* Restore the secure context. */ - " pop {r1,r3} \n" - " mov lr, r3 \n"/* LR = r3. */ - " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ - " bx lr \n" + " ldmia r2!, {r0, r1, r4} \n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */ + " mov lr, r4 \n"/* LR = r4. */ + " ldr r3, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */ + " str r0, [r3] \n"/* Restore the task's xSecureContext. */ + " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */ + " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + " ldr r1, [r3] \n"/* Read pxCurrentTCB. */ + " push {r2, r4} \n" + " bl SecureContext_LoadContext \n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + " pop {r2, r4} \n" + " mov lr, r4 \n"/* LR = r4. */ + " lsls r1, r4, #25 \n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ + " bx lr \n" #endif /* configENABLE_MPU */ " \n" " restore_ns_context: \n" - " ldmia r1!, {r4-r11} \n"/* Restore the registers that are not automatically restored. */ + " ldmia r2!, {r4-r11} \n"/* Restore the registers that are not automatically restored. */ #if ( configENABLE_FPU == 1 ) - " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ - " it eq \n" - " vldmiaeq r1!, {s16-s31} \n"/* Restore the FPU registers which are not restored automatically. */ + " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ + " it eq \n" + " vldmiaeq r2!, {s16-s31} \n"/* Restore the FPU registers which are not restored automatically. */ #endif /* configENABLE_FPU */ - " msr psp, r1 \n"/* Remember the new top of stack for the task. */ + " msr psp, r2 \n"/* Remember the new top of stack for the task. */ " bx lr \n" " \n" " .align 4 \n" "pxCurrentTCBConst: .word pxCurrentTCB \n" "xSecureContextConst: .word xSecureContext \n" #if ( configENABLE_MPU == 1 ) - "xMPUCTRLConst: .word 0xe000ed94 \n" - "xMAIR0Const: .word 0xe000edc0 \n" - "xRNRConst: .word 0xe000ed98 \n" - "xRBARConst: .word 0xe000ed9c \n" + "xMPUCTRLConst: .word 0xe000ed94 \n" + "xMAIR0Const: .word 0xe000edc0 \n" + "xRNRConst: .word 0xe000ed98 \n" + "xRBARConst: .word 0xe000ed9c \n" #endif /* configENABLE_MPU */ ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ); @@ -402,9 +409,9 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR { __asm volatile ( - " ldr r1, [r0] \n"/* The first item in the TCB is the top of the stack. */ - " ldr r0, [r1] \n"/* The first item on the stack is the task's xSecureContext. */ - " cmp r0, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ + " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ + " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ + " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ " it ne \n" " svcne %0 \n"/* Secure context is freed in the supervisor call. */ " bx lr \n"/* Return. */ diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c index e3d2cdecc..884976374 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/portable/GCC/ARM_CM33/secure/secure_context.c @@ -50,11 +50,6 @@ */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 -/** - * @brief Invalid context ID. - */ -#define securecontextINVALID_CONTEXT_ID 0UL - /** * @brief Maximum number of secure contexts. */ @@ -70,11 +65,15 @@ SecureContext_t xSecureContexts[ secureconfigMAX_SECURE_CONTEXTS ]; /*-----------------------------------------------------------*/ /** - * @brief Get a free context from the secure context pool (xSecureContexts). + * @brief Get a free secure context for a task from the secure context pool (xSecureContexts). * - * @return Index of a free context in the xSecureContexts array. + * This function ensures that only one secure context is allocated for a task. + * + * @param[in] pvTaskHandle The task handle for which the secure context is allocated. + * + * @return Index of a free secure context in the xSecureContexts array. */ -static uint32_t ulGetSecureContext( void ); +static uint32_t ulGetSecureContext( void * pvTaskHandle ); /** * @brief Return the secure context to the secure context pool (xSecureContexts). @@ -88,16 +87,26 @@ extern void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ); extern void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ); /*-----------------------------------------------------------*/ -static uint32_t ulGetSecureContext( void ) +static uint32_t ulGetSecureContext( void * pvTaskHandle ) { - uint32_t ulSecureContextIndex; + /* Start with invalid index. */ + uint32_t i, ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS; - for( ulSecureContextIndex = 0; ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS; ulSecureContextIndex++ ) + for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ ) { - if( ( xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer == NULL ) && - ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == NULL ) && - ( xSecureContexts[ ulSecureContextIndex ].pucStackStart == NULL ) ) + if( ( xSecureContexts[ i ].pucCurrentStackPointer == NULL ) && + ( xSecureContexts[ i ].pucStackLimit == NULL ) && + ( xSecureContexts[ i ].pucStackStart == NULL ) && + ( xSecureContexts[ i ].pvTaskHandle == NULL ) && + ( ulSecureContextIndex == secureconfigMAX_SECURE_CONTEXTS ) ) { + ulSecureContextIndex = i; + } + else if( xSecureContexts[ i ].pvTaskHandle == pvTaskHandle ) + { + /* A task can only have one secure context. Do not allocate a second + * context for the same task. */ + ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS; break; } } @@ -111,20 +120,25 @@ static void vReturnSecureContext( uint32_t ulSecureContextIndex ) xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = NULL; xSecureContexts[ ulSecureContextIndex ].pucStackLimit = NULL; xSecureContexts[ ulSecureContextIndex ].pucStackStart = NULL; + xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = NULL; } /*-----------------------------------------------------------*/ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) { uint32_t ulIPSR, i; + static uint32_t ulSecureContextsInitialized = 0; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); /* Do nothing if the processor is running in the Thread Mode. IPSR is zero * when the processor is running in the Thread Mode. */ - if( ulIPSR != 0 ) + if( ( ulIPSR != 0 ) && ( ulSecureContextsInitialized == 0 ) ) { + /* Ensure to initialize secure contexts only once. */ + ulSecureContextsInitialized = 1; + /* No stack for thread mode until a task's context is loaded. */ secureportSET_PSPLIM( securecontextNO_STACK ); secureportSET_PSP( securecontextNO_STACK ); @@ -135,6 +149,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) xSecureContexts[ i ].pucCurrentStackPointer = NULL; xSecureContexts[ i ].pucStackLimit = NULL; xSecureContexts[ i ].pucStackStart = NULL; + xSecureContexts[ i ].pvTaskHandle = NULL; } #if ( configENABLE_MPU == 1 ) @@ -154,28 +169,35 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) #if ( configENABLE_MPU == 1 ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, - uint32_t ulIsTaskPrivileged ) + uint32_t ulIsTaskPrivileged, + void * pvTaskHandle ) #else /* configENABLE_MPU */ - secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ) + secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, + void * pvTaskHandle ) #endif /* configENABLE_MPU */ { uint8_t * pucStackMemory = NULL; + uint8_t * pucStackLimit; uint32_t ulIPSR, ulSecureContextIndex; - SecureContextHandle_t xSecureContextHandle; + SecureContextHandle_t xSecureContextHandle = securecontextINVALID_CONTEXT_ID; #if ( configENABLE_MPU == 1 ) uint32_t * pulCurrentStackPointer = NULL; #endif /* configENABLE_MPU */ - /* Read the Interrupt Program Status Register (IPSR) value. */ + /* Read the Interrupt Program Status Register (IPSR) and Process Stack Limit + * Register (PSPLIM) value. */ secureportREAD_IPSR( ulIPSR ); + secureportREAD_PSPLIM( pucStackLimit ); /* Do nothing if the processor is running in the Thread Mode. IPSR is zero - * when the processor is running in the Thread Mode. */ - if( ulIPSR != 0 ) + * when the processor is running in the Thread Mode. + * Also do nothing, if a secure context us already loaded. PSPLIM is set to + * securecontextNO_STACK when no secure context is loaded. */ + if( ( ulIPSR != 0 ) && ( pucStackLimit == securecontextNO_STACK ) ) { /* Ontain a free secure context. */ - ulSecureContextIndex = ulGetSecureContext(); + ulSecureContextIndex = ulGetSecureContext( pvTaskHandle ); /* Were we able to get a free context? */ if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) @@ -197,6 +219,8 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * programmed in the PSPLIM register on context switch.*/ xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; + xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = pvTaskHandle; + #if ( configENABLE_MPU == 1 ) { /* Store the correct CONTROL value for the task on the stack. @@ -229,10 +253,6 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Ensure to never return 0 as a valid context handle. */ xSecureContextHandle = ulSecureContextIndex + 1UL; } - else - { - xSecureContextHandle = securecontextINVALID_CONTEXT_ID; - } } } @@ -240,7 +260,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { uint32_t ulIPSR, ulSecureContextIndex; @@ -256,38 +276,61 @@ secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandl { ulSecureContextIndex = xSecureContextHandle - 1UL; - /* Free the stack space. */ - vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); + /* Ensure that the secure context being deleted is associated with + * the task. */ + if( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) + { + /* Free the stack space. */ + vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); - /* Return the context back to the free contexts pool. */ - vReturnSecureContext( ulSecureContextIndex ); + /* Return the secure context back to the free secure contexts pool. */ + vReturnSecureContext( ulSecureContextIndex ); + } } } } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { + uint8_t * pucStackLimit; uint32_t ulSecureContextIndex; if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) { ulSecureContextIndex = xSecureContextHandle - 1UL; - SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + secureportREAD_PSPLIM( pucStackLimit ); + + /* Ensure that no secure context is loaded and the task is loading it's + * own context. */ + if( ( pucStackLimit == securecontextNO_STACK ) && + ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) + { + SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } } } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { + uint8_t * pucStackLimit; uint32_t ulSecureContextIndex; if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) { ulSecureContextIndex = xSecureContextHandle - 1UL; - SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + secureportREAD_PSPLIM( pucStackLimit ); + + /* Ensure that task's context is loaded and the task is saving it's own + * context. */ + if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && + ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) + { + SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } } } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM33/secure/secure_context.h b/portable/GCC/ARM_CM33/secure/secure_context.h index 2ae78593f..b586f9710 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.h +++ b/portable/GCC/ARM_CM33/secure/secure_context.h @@ -37,7 +37,12 @@ /** * @brief PSP value when no secure context is loaded. */ -#define securecontextNO_STACK 0x0 +#define securecontextNO_STACK 0x0 + +/** + * @brief Invalid context ID. + */ +#define securecontextINVALID_CONTEXT_ID 0UL /*-----------------------------------------------------------*/ /** @@ -51,6 +56,7 @@ typedef struct SecureContext uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ uint8_t * pucStackStart; /**< First location of the stack memory. */ + void * pvTaskHandle; /**< Task handle of the task this context is associated with. */ } SecureContext_t; /*-----------------------------------------------------------*/ @@ -85,9 +91,11 @@ void SecureContext_Init( void ); */ #if ( configENABLE_MPU == 1 ) SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, - uint32_t ulIsTaskPrivileged ); + uint32_t ulIsTaskPrivileged, + void * pvTaskHandle ); #else /* configENABLE_MPU */ - SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ); + SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, + void * pvTaskHandle ); #endif /* configENABLE_MPU */ /** @@ -99,7 +107,7 @@ void SecureContext_Init( void ); * @param[in] xSecureContextHandle Context handle corresponding to the * context to be freed. */ -void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); /** * @brief Loads the given context. @@ -110,7 +118,7 @@ void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ); * @param[in] xSecureContextHandle Context handle corresponding to the context * to be loaded. */ -void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); /** * @brief Saves the given context. @@ -121,6 +129,6 @@ void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ); * @param[in] xSecureContextHandle Context handle corresponding to the context * to be saved. */ -void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); #endif /* __SECURE_CONTEXT_H__ */ diff --git a/portable/GCC/ARM_CM33/secure/secure_context_port.c b/portable/GCC/ARM_CM33/secure/secure_context_port.c index be5bbd2d1..3e3858911 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM33/secure/secure_context_port.c @@ -31,6 +31,9 @@ /* Secure port macros. */ #include "secure_port_macros.h" +void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) ); +void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) ); + void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) { /* pxSecureContext value is in r0. */ diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.c b/portable/GCC/ARM_CM33/secure/secure_heap.c index 3b380a9c0..28494b7c4 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.c +++ b/portable/GCC/ARM_CM33/secure/secure_heap.c @@ -448,9 +448,3 @@ size_t xPortGetMinimumEverFreeHeapSize( void ) return xMinimumEverFreeBytesRemaining; } /*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* This just exists to keep the linker quiet. */ -} -/*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.h b/portable/GCC/ARM_CM33/secure/secure_heap.h index fa78046e5..253e8b9f2 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.h +++ b/portable/GCC/ARM_CM33/secure/secure_heap.h @@ -48,4 +48,18 @@ void * pvPortMalloc( size_t xWantedSize ); */ void vPortFree( void * pv ); +/** + * @brief Get the free heap size. + * + * @return Free heap size. + */ +size_t xPortGetFreeHeapSize( void ); + +/** + * @brief Get the minimum ever free heap size. + * + * @return Minimum ever free heap size. + */ +size_t xPortGetMinimumEverFreeHeapSize( void ); + #endif /* __SECURE_HEAP_H__ */ diff --git a/portable/GCC/ARM_CM33/secure/secure_port_macros.h b/portable/GCC/ARM_CM33/secure/secure_port_macros.h index 7b8dbedc2..5ed052433 100644 --- a/portable/GCC/ARM_CM33/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM33/secure/secure_port_macros.h @@ -67,6 +67,12 @@ #define secureportSET_PSP( pucCurrentStackPointer ) \ __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) ) +/** + * @brief Read the PSPLIM value in the given variable. + */ +#define secureportREAD_PSPLIM( pucOutStackLimit ) \ + __asm volatile ( "mrs %0, psplim" : "=r" ( pucOutStackLimit ) ) + /** * @brief Set the PSPLIM to the given value. */ diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index 852a11ce3..447aa67d2 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -779,7 +779,8 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0, ulR1; + extern TaskHandle_t pxCurrentTCB; #if ( configENABLE_MPU == 1 ) uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ @@ -810,25 +811,27 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged, pxCurrentTCB ); } #else /* if ( configENABLE_MPU == 1 ) */ { /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); + xSecureContext = SecureContext_AllocateContext( ulR0, pxCurrentTCB ); } #endif /* configENABLE_MPU */ - configASSERT( xSecureContext != NULL ); - SecureContext_LoadContext( xSecureContext ); + configASSERT( xSecureContext != securecontextINVALID_CONTEXT_ID ); + SecureContext_LoadContext( xSecureContext, pxCurrentTCB ); break; case portSVC_FREE_SECURE_CONTEXT: - /* R0 contains the secure context handle to be freed. */ + /* R0 contains TCB being freed and R1 contains the secure + * context handle to be freed. */ ulR0 = pulCallerStackAddress[ 0 ]; + ulR1 = pulCallerStackAddress[ 1 ]; /* Free the secure context. */ - SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 ); + SecureContext_FreeContext( ( SecureContextHandle_t ) ulR1, ( void * ) ulR0 ); break; #endif /* configENABLE_TRUSTZONE */ diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index 852a11ce3..447aa67d2 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -779,7 +779,8 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0, ulR1; + extern TaskHandle_t pxCurrentTCB; #if ( configENABLE_MPU == 1 ) uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ @@ -810,25 +811,27 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged, pxCurrentTCB ); } #else /* if ( configENABLE_MPU == 1 ) */ { /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); + xSecureContext = SecureContext_AllocateContext( ulR0, pxCurrentTCB ); } #endif /* configENABLE_MPU */ - configASSERT( xSecureContext != NULL ); - SecureContext_LoadContext( xSecureContext ); + configASSERT( xSecureContext != securecontextINVALID_CONTEXT_ID ); + SecureContext_LoadContext( xSecureContext, pxCurrentTCB ); break; case portSVC_FREE_SECURE_CONTEXT: - /* R0 contains the secure context handle to be freed. */ + /* R0 contains TCB being freed and R1 contains the secure + * context handle to be freed. */ ulR0 = pulCallerStackAddress[ 0 ]; + ulR1 = pulCallerStackAddress[ 1 ]; /* Free the secure context. */ - SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 ); + SecureContext_FreeContext( ( SecureContextHandle_t ) ulR1, ( void * ) ulR0 ); break; #endif /* configENABLE_TRUSTZONE */ diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.s b/portable/IAR/ARM_CM23/non_secure/portasm.s index 8003b45d0..6c6fcc6b4 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -25,6 +25,13 @@ * 1 tab == 4 spaces! */ +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" + EXTERN pxCurrentTCB EXTERN xSecureContext EXTERN vTaskSwitchContext @@ -193,64 +200,66 @@ vClearInterruptMask: /*-----------------------------------------------------------*/ PendSV_Handler: - mrs r1, psp /* Read PSP in r1. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - ldr r0, [r2] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + ldr r0, [r3] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + mrs r2, psp /* Read PSP in r2. */ cbz r0, save_ns_context /* No secure context to save. */ push {r0-r2, r14} - bl SecureContext_SaveContext + bl SecureContext_SaveContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ pop {r0-r3} /* LR is now in r3. */ mov lr, r3 /* LR = r3. */ - lsls r2, r3, #25 /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl save_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + lsls r1, r3, #25 /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl save_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r2, [r3] /* Read pxCurrentTCB. */ + ldr r1, [r3] /* Read pxCurrentTCB. */ #if ( configENABLE_MPU == 1 ) - subs r1, r1, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + mrs r1, psplim /* r1 = PSPLIM. */ mrs r3, control /* r3 = CONTROL. */ mov r4, lr /* r4 = LR/EXC_RETURN. */ - stmia r1!, {r0, r2-r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - subs r1, r1, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + mrs r1, psplim /* r1 = PSPLIM. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ - stmia r1!, {r0, r2-r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ + stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ b select_next_task save_ns_context: ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r2, [r3] /* Read pxCurrentTCB. */ + ldr r1, [r3] /* Read pxCurrentTCB. */ #if ( configENABLE_MPU == 1 ) - subs r1, r1, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - adds r1, r1, #16 /* r1 = r1 + 16. */ - stmia r1!, {r4-r7} /* Store the low registers that are not saved automatically. */ + subs r2, r2, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + adds r2, r2, #16 /* r2 = r2 + 16. */ + stmia r2!, {r4-r7} /* Store the low registers that are not saved automatically. */ mov r4, r8 /* r4 = r8. */ mov r5, r9 /* r5 = r9. */ mov r6, r10 /* r6 = r10. */ mov r7, r11 /* r7 = r11. */ - stmia r1!, {r4-r7} /* Store the high registers that are not saved automatically. */ - mrs r2, psplim /* r2 = PSPLIM. */ + stmia r2!, {r4-r7} /* Store the high registers that are not saved automatically. */ + mrs r1, psplim /* r1 = PSPLIM. */ mrs r3, control /* r3 = CONTROL. */ mov r4, lr /* r4 = LR/EXC_RETURN. */ - subs r1, r1, #48 /* r1 = r1 - 48. */ - stmia r1!, {r0, r2-r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + subs r2, r2, #48 /* r2 = r2 - 48. */ + stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - subs r1, r1, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + mrs r1, psplim /* r1 = PSPLIM. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ - stmia r1!, {r0, r2-r7} /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ + stmia r2!, {r0, r1, r3-r7} /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ mov r4, r8 /* r4 = r8. */ mov r5, r9 /* r5 = r9. */ mov r6, r10 /* r6 = r10. */ mov r7, r11 /* r7 = r11. */ - stmia r1!, {r4-r7} /* Store the high registers that are not saved automatically. */ + stmia r2!, {r4-r7} /* Store the high registers that are not saved automatically. */ #endif /* configENABLE_MPU */ select_next_task: @@ -258,96 +267,100 @@ PendSV_Handler: bl vTaskSwitchContext cpsie i - ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r3, [r2] /* Read pxCurrentTCB. */ - ldr r1, [r3] /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + ldr r2, [r1] /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ #if ( configENABLE_MPU == 1 ) dmb /* Complete outstanding transfers before disabling MPU. */ - ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - ldr r4, [r2] /* Read the value of MPU_CTRL. */ + ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + ldr r4, [r3] /* Read the value of MPU_CTRL. */ movs r5, #1 /* r5 = 1. */ bics r4, r5 /* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ - str r4, [r2] /* Disable MPU. */ + str r4, [r3] /* Disable MPU. */ - adds r3, #4 /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - ldr r4, [r3] /* r4 = *r3 i.e. r4 = MAIR0. */ - ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */ - str r4, [r2] /* Program MAIR0. */ - ldr r2, =0xe000ed98 /* r2 = 0xe000ed98 [Location of RNR]. */ - adds r3, #4 /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ + adds r1, #4 /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ + ldr r4, [r1] /* r4 = *r1 i.e. r4 = MAIR0. */ + ldr r3, =0xe000edc0 /* r3 = 0xe000edc0 [Location of MAIR0]. */ + str r4, [r3] /* Program MAIR0. */ + ldr r4, =0xe000ed98 /* r4 = 0xe000ed98 [Location of RNR]. */ + adds r1, #4 /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ movs r5, #4 /* r5 = 4. */ - str r5, [r2] /* Program RNR = 4. */ - ldmia r3!, {r6,r7} /* Read first set of RBAR/RLAR from TCB. */ - ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */ - stmia r4!, {r6,r7} /* Write first set of RBAR/RLAR registers. */ + str r5, [r4] /* Program RNR = 4. */ + ldmia r1!, {r6,r7} /* Read first set of RBAR/RLAR from TCB. */ + ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */ + stmia r3!, {r6,r7} /* Write first set of RBAR/RLAR registers. */ movs r5, #5 /* r5 = 5. */ - str r5, [r2] /* Program RNR = 5. */ - ldmia r3!, {r6,r7} /* Read second set of RBAR/RLAR from TCB. */ - ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */ - stmia r4!, {r6,r7} /* Write second set of RBAR/RLAR registers. */ + str r5, [r4] /* Program RNR = 5. */ + ldmia r1!, {r6,r7} /* Read second set of RBAR/RLAR from TCB. */ + ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */ + stmia r3!, {r6,r7} /* Write second set of RBAR/RLAR registers. */ movs r5, #6 /* r5 = 6. */ - str r5, [r2] /* Program RNR = 6. */ - ldmia r3!, {r6,r7} /* Read third set of RBAR/RLAR from TCB. */ - ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */ - stmia r4!, {r6,r7} /* Write third set of RBAR/RLAR registers. */ + str r5, [r4] /* Program RNR = 6. */ + ldmia r1!, {r6,r7} /* Read third set of RBAR/RLAR from TCB. */ + ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */ + stmia r3!, {r6,r7} /* Write third set of RBAR/RLAR registers. */ movs r5, #7 /* r5 = 7. */ - str r5, [r2] /* Program RNR = 7. */ - ldmia r3!, {r6,r7} /* Read fourth set of RBAR/RLAR from TCB. */ - ldr r4, =0xe000ed9c /* r4 = 0xe000ed9c [Location of RBAR]. */ - stmia r4!, {r6,r7} /* Write fourth set of RBAR/RLAR registers. */ + str r5, [r4] /* Program RNR = 7. */ + ldmia r1!, {r6,r7} /* Read fourth set of RBAR/RLAR from TCB. */ + ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */ + stmia r3!, {r6,r7} /* Write fourth set of RBAR/RLAR registers. */ - ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - ldr r4, [r2] /* Read the value of MPU_CTRL. */ + ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + ldr r4, [r3] /* Read the value of MPU_CTRL. */ movs r5, #1 /* r5 = 1. */ orrs r4, r5 /* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ - str r4, [r2] /* Enable MPU. */ + str r4, [r3] /* Enable MPU. */ dsb /* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ #if ( configENABLE_MPU == 1 ) - ldmia r1!, {r0, r2-r4} /* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */ - msr psplim, r2 /* Restore the PSPLIM register value for the task. */ + ldmia r2!, {r0, r1, r3, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */ + msr psplim, r1 /* Restore the PSPLIM register value for the task. */ msr control, r3 /* Restore the CONTROL register value for the task. */ mov lr, r4 /* LR = r4. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - str r0, [r2] /* Restore the task's xSecureContext. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + str r0, [r3] /* Restore the task's xSecureContext. */ cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */ - push {r1,r4} - bl SecureContext_LoadContext /* Restore the secure context. */ - pop {r1,r4} + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + push {r2, r4} + bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + pop {r2, r4} mov lr, r4 /* LR = r4. */ - lsls r2, r4, #25 /* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl restore_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - msr psp, r1 /* Remember the new top of stack for the task. */ + lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + msr psp, r2 /* Remember the new top of stack for the task. */ bx lr #else /* configENABLE_MPU */ - ldmia r1!, {r0, r2-r3} /* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */ - msr psplim, r2 /* Restore the PSPLIM register value for the task. */ - mov lr, r3 /* LR = r3. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - str r0, [r2] /* Restore the task's xSecureContext. */ + ldmia r2!, {r0, r1, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + msr psplim, r1 /* Restore the PSPLIM register value for the task. */ + mov lr, r4 /* LR = r4. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + str r0, [r3] /* Restore the task's xSecureContext. */ cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */ - push {r1,r3} - bl SecureContext_LoadContext /* Restore the secure context. */ - pop {r1,r3} - mov lr, r3 /* LR = r3. */ - lsls r2, r3, #25 /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl restore_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - msr psp, r1 /* Remember the new top of stack for the task. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + push {r2, r4} + bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + pop {r2, r4} + mov lr, r4 /* LR = r4. */ + lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + msr psp, r2 /* Remember the new top of stack for the task. */ bx lr #endif /* configENABLE_MPU */ restore_ns_context: - adds r1, r1, #16 /* Move to the high registers. */ - ldmia r1!, {r4-r7} /* Restore the high registers that are not automatically restored. */ + adds r2, r2, #16 /* Move to the high registers. */ + ldmia r2!, {r4-r7} /* Restore the high registers that are not automatically restored. */ mov r8, r4 /* r8 = r4. */ mov r9, r5 /* r9 = r5. */ mov r10, r6 /* r10 = r6. */ mov r11, r7 /* r11 = r7. */ - msr psp, r1 /* Remember the new top of stack for the task. */ - subs r1, r1, #32 /* Go back to the low registers. */ - ldmia r1!, {r4-r7} /* Restore the low registers that are not automatically restored. */ + msr psp, r2 /* Remember the new top of stack for the task. */ + subs r2, r2, #32 /* Go back to the low registers. */ + ldmia r2!, {r4-r7} /* Restore the low registers that are not automatically restored. */ bx lr /*-----------------------------------------------------------*/ @@ -364,9 +377,9 @@ SVC_Handler: /*-----------------------------------------------------------*/ vPortFreeSecureContext: - ldr r1, [r0] /* The first item in the TCB is the top of the stack. */ - ldr r0, [r1] /* The first item on the stack is the task's xSecureContext. */ - cmp r0, #0 /* Raise svc if task's xSecureContext is not NULL. */ + ldr r2, [r0] /* The first item in the TCB is the top of the stack. */ + ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */ + cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */ beq free_secure_context bx lr /* There is no secure context (xSecureContext is NULL). */ free_secure_context: diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c index e3d2cdecc..884976374 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/portable/IAR/ARM_CM23/secure/secure_context.c @@ -50,11 +50,6 @@ */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 -/** - * @brief Invalid context ID. - */ -#define securecontextINVALID_CONTEXT_ID 0UL - /** * @brief Maximum number of secure contexts. */ @@ -70,11 +65,15 @@ SecureContext_t xSecureContexts[ secureconfigMAX_SECURE_CONTEXTS ]; /*-----------------------------------------------------------*/ /** - * @brief Get a free context from the secure context pool (xSecureContexts). + * @brief Get a free secure context for a task from the secure context pool (xSecureContexts). * - * @return Index of a free context in the xSecureContexts array. + * This function ensures that only one secure context is allocated for a task. + * + * @param[in] pvTaskHandle The task handle for which the secure context is allocated. + * + * @return Index of a free secure context in the xSecureContexts array. */ -static uint32_t ulGetSecureContext( void ); +static uint32_t ulGetSecureContext( void * pvTaskHandle ); /** * @brief Return the secure context to the secure context pool (xSecureContexts). @@ -88,16 +87,26 @@ extern void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ); extern void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ); /*-----------------------------------------------------------*/ -static uint32_t ulGetSecureContext( void ) +static uint32_t ulGetSecureContext( void * pvTaskHandle ) { - uint32_t ulSecureContextIndex; + /* Start with invalid index. */ + uint32_t i, ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS; - for( ulSecureContextIndex = 0; ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS; ulSecureContextIndex++ ) + for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ ) { - if( ( xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer == NULL ) && - ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == NULL ) && - ( xSecureContexts[ ulSecureContextIndex ].pucStackStart == NULL ) ) + if( ( xSecureContexts[ i ].pucCurrentStackPointer == NULL ) && + ( xSecureContexts[ i ].pucStackLimit == NULL ) && + ( xSecureContexts[ i ].pucStackStart == NULL ) && + ( xSecureContexts[ i ].pvTaskHandle == NULL ) && + ( ulSecureContextIndex == secureconfigMAX_SECURE_CONTEXTS ) ) { + ulSecureContextIndex = i; + } + else if( xSecureContexts[ i ].pvTaskHandle == pvTaskHandle ) + { + /* A task can only have one secure context. Do not allocate a second + * context for the same task. */ + ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS; break; } } @@ -111,20 +120,25 @@ static void vReturnSecureContext( uint32_t ulSecureContextIndex ) xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = NULL; xSecureContexts[ ulSecureContextIndex ].pucStackLimit = NULL; xSecureContexts[ ulSecureContextIndex ].pucStackStart = NULL; + xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = NULL; } /*-----------------------------------------------------------*/ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) { uint32_t ulIPSR, i; + static uint32_t ulSecureContextsInitialized = 0; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); /* Do nothing if the processor is running in the Thread Mode. IPSR is zero * when the processor is running in the Thread Mode. */ - if( ulIPSR != 0 ) + if( ( ulIPSR != 0 ) && ( ulSecureContextsInitialized == 0 ) ) { + /* Ensure to initialize secure contexts only once. */ + ulSecureContextsInitialized = 1; + /* No stack for thread mode until a task's context is loaded. */ secureportSET_PSPLIM( securecontextNO_STACK ); secureportSET_PSP( securecontextNO_STACK ); @@ -135,6 +149,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) xSecureContexts[ i ].pucCurrentStackPointer = NULL; xSecureContexts[ i ].pucStackLimit = NULL; xSecureContexts[ i ].pucStackStart = NULL; + xSecureContexts[ i ].pvTaskHandle = NULL; } #if ( configENABLE_MPU == 1 ) @@ -154,28 +169,35 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) #if ( configENABLE_MPU == 1 ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, - uint32_t ulIsTaskPrivileged ) + uint32_t ulIsTaskPrivileged, + void * pvTaskHandle ) #else /* configENABLE_MPU */ - secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ) + secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, + void * pvTaskHandle ) #endif /* configENABLE_MPU */ { uint8_t * pucStackMemory = NULL; + uint8_t * pucStackLimit; uint32_t ulIPSR, ulSecureContextIndex; - SecureContextHandle_t xSecureContextHandle; + SecureContextHandle_t xSecureContextHandle = securecontextINVALID_CONTEXT_ID; #if ( configENABLE_MPU == 1 ) uint32_t * pulCurrentStackPointer = NULL; #endif /* configENABLE_MPU */ - /* Read the Interrupt Program Status Register (IPSR) value. */ + /* Read the Interrupt Program Status Register (IPSR) and Process Stack Limit + * Register (PSPLIM) value. */ secureportREAD_IPSR( ulIPSR ); + secureportREAD_PSPLIM( pucStackLimit ); /* Do nothing if the processor is running in the Thread Mode. IPSR is zero - * when the processor is running in the Thread Mode. */ - if( ulIPSR != 0 ) + * when the processor is running in the Thread Mode. + * Also do nothing, if a secure context us already loaded. PSPLIM is set to + * securecontextNO_STACK when no secure context is loaded. */ + if( ( ulIPSR != 0 ) && ( pucStackLimit == securecontextNO_STACK ) ) { /* Ontain a free secure context. */ - ulSecureContextIndex = ulGetSecureContext(); + ulSecureContextIndex = ulGetSecureContext( pvTaskHandle ); /* Were we able to get a free context? */ if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) @@ -197,6 +219,8 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * programmed in the PSPLIM register on context switch.*/ xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; + xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = pvTaskHandle; + #if ( configENABLE_MPU == 1 ) { /* Store the correct CONTROL value for the task on the stack. @@ -229,10 +253,6 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Ensure to never return 0 as a valid context handle. */ xSecureContextHandle = ulSecureContextIndex + 1UL; } - else - { - xSecureContextHandle = securecontextINVALID_CONTEXT_ID; - } } } @@ -240,7 +260,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { uint32_t ulIPSR, ulSecureContextIndex; @@ -256,38 +276,61 @@ secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandl { ulSecureContextIndex = xSecureContextHandle - 1UL; - /* Free the stack space. */ - vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); + /* Ensure that the secure context being deleted is associated with + * the task. */ + if( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) + { + /* Free the stack space. */ + vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); - /* Return the context back to the free contexts pool. */ - vReturnSecureContext( ulSecureContextIndex ); + /* Return the secure context back to the free secure contexts pool. */ + vReturnSecureContext( ulSecureContextIndex ); + } } } } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { + uint8_t * pucStackLimit; uint32_t ulSecureContextIndex; if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) { ulSecureContextIndex = xSecureContextHandle - 1UL; - SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + secureportREAD_PSPLIM( pucStackLimit ); + + /* Ensure that no secure context is loaded and the task is loading it's + * own context. */ + if( ( pucStackLimit == securecontextNO_STACK ) && + ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) + { + SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } } } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { + uint8_t * pucStackLimit; uint32_t ulSecureContextIndex; if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) { ulSecureContextIndex = xSecureContextHandle - 1UL; - SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + secureportREAD_PSPLIM( pucStackLimit ); + + /* Ensure that task's context is loaded and the task is saving it's own + * context. */ + if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && + ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) + { + SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } } } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM23/secure/secure_context.h b/portable/IAR/ARM_CM23/secure/secure_context.h index 2ae78593f..b586f9710 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.h +++ b/portable/IAR/ARM_CM23/secure/secure_context.h @@ -37,7 +37,12 @@ /** * @brief PSP value when no secure context is loaded. */ -#define securecontextNO_STACK 0x0 +#define securecontextNO_STACK 0x0 + +/** + * @brief Invalid context ID. + */ +#define securecontextINVALID_CONTEXT_ID 0UL /*-----------------------------------------------------------*/ /** @@ -51,6 +56,7 @@ typedef struct SecureContext uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ uint8_t * pucStackStart; /**< First location of the stack memory. */ + void * pvTaskHandle; /**< Task handle of the task this context is associated with. */ } SecureContext_t; /*-----------------------------------------------------------*/ @@ -85,9 +91,11 @@ void SecureContext_Init( void ); */ #if ( configENABLE_MPU == 1 ) SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, - uint32_t ulIsTaskPrivileged ); + uint32_t ulIsTaskPrivileged, + void * pvTaskHandle ); #else /* configENABLE_MPU */ - SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ); + SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, + void * pvTaskHandle ); #endif /* configENABLE_MPU */ /** @@ -99,7 +107,7 @@ void SecureContext_Init( void ); * @param[in] xSecureContextHandle Context handle corresponding to the * context to be freed. */ -void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); /** * @brief Loads the given context. @@ -110,7 +118,7 @@ void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ); * @param[in] xSecureContextHandle Context handle corresponding to the context * to be loaded. */ -void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); /** * @brief Saves the given context. @@ -121,6 +129,6 @@ void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ); * @param[in] xSecureContextHandle Context handle corresponding to the context * to be saved. */ -void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); #endif /* __SECURE_CONTEXT_H__ */ diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s index 6864e1dfb..c0f8062bc 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s @@ -28,6 +28,13 @@ SECTION .text:CODE:NOROOT(2) THUMB +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" + PUBLIC SecureContext_LoadContextAsm PUBLIC SecureContext_SaveContextAsm diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.c b/portable/IAR/ARM_CM23/secure/secure_heap.c index 3b380a9c0..28494b7c4 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.c +++ b/portable/IAR/ARM_CM23/secure/secure_heap.c @@ -448,9 +448,3 @@ size_t xPortGetMinimumEverFreeHeapSize( void ) return xMinimumEverFreeBytesRemaining; } /*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* This just exists to keep the linker quiet. */ -} -/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.h b/portable/IAR/ARM_CM23/secure/secure_heap.h index fa78046e5..253e8b9f2 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.h +++ b/portable/IAR/ARM_CM23/secure/secure_heap.h @@ -48,4 +48,18 @@ void * pvPortMalloc( size_t xWantedSize ); */ void vPortFree( void * pv ); +/** + * @brief Get the free heap size. + * + * @return Free heap size. + */ +size_t xPortGetFreeHeapSize( void ); + +/** + * @brief Get the minimum ever free heap size. + * + * @return Minimum ever free heap size. + */ +size_t xPortGetMinimumEverFreeHeapSize( void ); + #endif /* __SECURE_HEAP_H__ */ diff --git a/portable/IAR/ARM_CM23/secure/secure_port_macros.h b/portable/IAR/ARM_CM23/secure/secure_port_macros.h index 7b8dbedc2..5ed052433 100644 --- a/portable/IAR/ARM_CM23/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM23/secure/secure_port_macros.h @@ -67,6 +67,12 @@ #define secureportSET_PSP( pucCurrentStackPointer ) \ __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) ) +/** + * @brief Read the PSPLIM value in the given variable. + */ +#define secureportREAD_PSPLIM( pucOutStackLimit ) \ + __asm volatile ( "mrs %0, psplim" : "=r" ( pucOutStackLimit ) ) + /** * @brief Set the PSPLIM to the given value. */ diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index 852a11ce3..447aa67d2 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -779,7 +779,8 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0, ulR1; + extern TaskHandle_t pxCurrentTCB; #if ( configENABLE_MPU == 1 ) uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ @@ -810,25 +811,27 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged, pxCurrentTCB ); } #else /* if ( configENABLE_MPU == 1 ) */ { /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); + xSecureContext = SecureContext_AllocateContext( ulR0, pxCurrentTCB ); } #endif /* configENABLE_MPU */ - configASSERT( xSecureContext != NULL ); - SecureContext_LoadContext( xSecureContext ); + configASSERT( xSecureContext != securecontextINVALID_CONTEXT_ID ); + SecureContext_LoadContext( xSecureContext, pxCurrentTCB ); break; case portSVC_FREE_SECURE_CONTEXT: - /* R0 contains the secure context handle to be freed. */ + /* R0 contains TCB being freed and R1 contains the secure + * context handle to be freed. */ ulR0 = pulCallerStackAddress[ 0 ]; + ulR1 = pulCallerStackAddress[ 1 ]; /* Free the secure context. */ - SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 ); + SecureContext_FreeContext( ( SecureContextHandle_t ) ulR1, ( void * ) ulR0 ); break; #endif /* configENABLE_TRUSTZONE */ diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s index 6e911bd26..89ff193b7 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s @@ -24,6 +24,12 @@ * * 1 tab == 4 spaces! */ +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" EXTERN pxCurrentTCB EXTERN vTaskSwitchContext diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index 852a11ce3..447aa67d2 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -779,7 +779,8 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0, ulR1; + extern TaskHandle_t pxCurrentTCB; #if ( configENABLE_MPU == 1 ) uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ @@ -810,25 +811,27 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged, pxCurrentTCB ); } #else /* if ( configENABLE_MPU == 1 ) */ { /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); + xSecureContext = SecureContext_AllocateContext( ulR0, pxCurrentTCB ); } #endif /* configENABLE_MPU */ - configASSERT( xSecureContext != NULL ); - SecureContext_LoadContext( xSecureContext ); + configASSERT( xSecureContext != securecontextINVALID_CONTEXT_ID ); + SecureContext_LoadContext( xSecureContext, pxCurrentTCB ); break; case portSVC_FREE_SECURE_CONTEXT: - /* R0 contains the secure context handle to be freed. */ + /* R0 contains TCB being freed and R1 contains the secure + * context handle to be freed. */ ulR0 = pulCallerStackAddress[ 0 ]; + ulR1 = pulCallerStackAddress[ 1 ]; /* Free the secure context. */ - SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 ); + SecureContext_FreeContext( ( SecureContextHandle_t ) ulR1, ( void * ) ulR0 ); break; #endif /* configENABLE_TRUSTZONE */ diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.s b/portable/IAR/ARM_CM33/non_secure/portasm.s index 6b125b209..9b5296ad9 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33/non_secure/portasm.s @@ -183,62 +183,65 @@ vClearInterruptMask: /*-----------------------------------------------------------*/ PendSV_Handler: - mrs r1, psp /* Read PSP in r1. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - ldr r0, [r2] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + ldr r0, [r3] /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */ + mrs r2, psp /* Read PSP in r2. */ cbz r0, save_ns_context /* No secure context to save. */ push {r0-r2, r14} - bl SecureContext_SaveContext + bl SecureContext_SaveContext /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ pop {r0-r3} /* LR is now in r3. */ mov lr, r3 /* LR = r3. */ - lsls r2, r3, #25 /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl save_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + lsls r1, r3, #25 /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl save_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r2, [r3] /* Read pxCurrentTCB. */ + ldr r1, [r3] /* Read pxCurrentTCB. */ #if ( configENABLE_MPU == 1 ) - subs r1, r1, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #16 /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + mrs r1, psplim /* r1 = PSPLIM. */ mrs r3, control /* r3 = CONTROL. */ mov r4, lr /* r4 = LR/EXC_RETURN. */ - stmia r1!, {r0, r2-r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - subs r1, r1, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + mrs r1, psplim /* r1 = PSPLIM. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ - stmia r1!, {r0, r2-r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ + stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ b select_next_task save_ns_context: ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r2, [r3] /* Read pxCurrentTCB. */ + ldr r1, [r3] /* Read pxCurrentTCB. */ #if ( configENABLE_FPU == 1 ) tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ it eq - vstmdbeq r1!, {s16-s31} /* Store the FPU registers which are not saved automatically. */ + vstmdbeq r2!, {s16-s31} /* Store the FPU registers which are not saved automatically. */ #endif /* configENABLE_FPU */ #if ( configENABLE_MPU == 1 ) - subs r1, r1, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - adds r1, r1, #16 /* r1 = r1 + 16. */ - stm r1, {r4-r11} /* Store the registers that are not saved automatically. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #48 /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + adds r2, r2, #16 /* r2 = r2 + 16. */ + stm r2, {r4-r11} /* Store the registers that are not saved automatically. */ + mrs r1, psplim /* r1 = PSPLIM. */ mrs r3, control /* r3 = CONTROL. */ mov r4, lr /* r4 = LR/EXC_RETURN. */ - subs r1, r1, #16 /* r1 = r1 - 16. */ - stm r1, {r0, r2-r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ + subs r2, r2, #16 /* r2 = r2 - 16. */ + stmia r2!, {r0, r1, r3, r4} /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ #else /* configENABLE_MPU */ - subs r1, r1, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ - str r1, [r2] /* Save the new top of stack in TCB. */ - adds r1, r1, #12 /* r1 = r1 + 12. */ - stm r1, {r4-r11} /* Store the registers that are not saved automatically. */ - mrs r2, psplim /* r2 = PSPLIM. */ + subs r2, r2, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ + str r2, [r1] /* Save the new top of stack in TCB. */ + adds r2, r2, #12 /* r2 = r2 + 12. */ + stm r2, {r4-r11} /* Store the registers that are not saved automatically. */ + mrs r1, psplim /* r1 = PSPLIM. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ - subs r1, r1, #12 /* r1 = r1 - 12. */ - stmia r1!, {r0, r2-r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ + subs r2, r2, #12 /* r2 = r2 - 12. */ + stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ #endif /* configENABLE_MPU */ select_next_task: @@ -250,77 +253,81 @@ PendSV_Handler: mov r0, #0 /* r0 = 0. */ msr basepri, r0 /* Enable interrupts. */ - ldr r2, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ - ldr r3, [r2] /* Read pxCurrentTCB. */ - ldr r1, [r3] /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + ldr r2, [r1] /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ #if ( configENABLE_MPU == 1 ) dmb /* Complete outstanding transfers before disabling MPU. */ - ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - ldr r4, [r2] /* Read the value of MPU_CTRL. */ + ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + ldr r4, [r3] /* Read the value of MPU_CTRL. */ bic r4, r4, #1 /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ - str r4, [r2] /* Disable MPU. */ + str r4, [r3] /* Disable MPU. */ - adds r3, #4 /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ - ldr r4, [r3] /* r4 = *r3 i.e. r4 = MAIR0. */ - ldr r2, =0xe000edc0 /* r2 = 0xe000edc0 [Location of MAIR0]. */ - str r4, [r2] /* Program MAIR0. */ - ldr r2, =0xe000ed98 /* r2 = 0xe000ed98 [Location of RNR]. */ + adds r1, #4 /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ + ldr r4, [r1] /* r4 = *r1 i.e. r4 = MAIR0. */ + ldr r3, =0xe000edc0 /* r3 = 0xe000edc0 [Location of MAIR0]. */ + str r4, [r3] /* Program MAIR0. */ + ldr r3, =0xe000ed98 /* r3 = 0xe000ed98 [Location of RNR]. */ movs r4, #4 /* r4 = 4. */ - str r4, [r2] /* Program RNR = 4. */ - adds r3, #4 /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ - ldr r2, =0xe000ed9c /* r2 = 0xe000ed9c [Location of RBAR]. */ - ldmia r3!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */ - stmia r2!, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */ + str r4, [r3] /* Program RNR = 4. */ + adds r1, #4 /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ + ldr r3, =0xe000ed9c /* r3 = 0xe000ed9c [Location of RBAR]. */ + ldmia r1!, {r4-r11} /* Read 4 sets of RBAR/RLAR registers from TCB. */ + stmia r3!, {r4-r11} /* Write 4 set of RBAR/RLAR registers using alias registers. */ - ldr r2, =0xe000ed94 /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ - ldr r4, [r2] /* Read the value of MPU_CTRL. */ + ldr r3, =0xe000ed94 /* r3 = 0xe000ed94 [Location of MPU_CTRL]. */ + ldr r4, [r3] /* Read the value of MPU_CTRL. */ orr r4, r4, #1 /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ - str r4, [r2] /* Enable MPU. */ + str r4, [r3] /* Enable MPU. */ dsb /* Force memory writes before continuing. */ #endif /* configENABLE_MPU */ #if ( configENABLE_MPU == 1 ) - ldmia r1!, {r0, r2-r4} /* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */ - msr psplim, r2 /* Restore the PSPLIM register value for the task. */ + ldmia r2!, {r0, r1, r3, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */ + msr psplim, r1 /* Restore the PSPLIM register value for the task. */ msr control, r3 /* Restore the CONTROL register value for the task. */ mov lr, r4 /* LR = r4. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - str r0, [r2] /* Restore the task's xSecureContext. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + str r0, [r3] /* Restore the task's xSecureContext. */ cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */ - push {r1,r4} - bl SecureContext_LoadContext /* Restore the secure context. */ - pop {r1,r4} + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + push {r2, r4} + bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + pop {r2, r4} mov lr, r4 /* LR = r4. */ - lsls r2, r4, #25 /* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl restore_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - msr psp, r1 /* Remember the new top of stack for the task. */ + lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + msr psp, r2 /* Remember the new top of stack for the task. */ bx lr #else /* configENABLE_MPU */ - ldmia r1!, {r0, r2-r3} /* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */ - msr psplim, r2 /* Restore the PSPLIM register value for the task. */ - mov lr, r3 /* LR = r3. */ - ldr r2, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ - str r0, [r2] /* Restore the task's xSecureContext. */ + ldmia r2!, {r0, r1, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ + msr psplim, r1 /* Restore the PSPLIM register value for the task. */ + mov lr, r4 /* LR = r4. */ + ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ + str r0, [r3] /* Restore the task's xSecureContext. */ cbz r0, restore_ns_context /* If there is no secure context for the task, restore the non-secure context. */ - push {r1,r3} - bl SecureContext_LoadContext /* Restore the secure context. */ - pop {r1,r3} - mov lr, r3 /* LR = r3. */ - lsls r2, r3, #25 /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ - bpl restore_ns_context /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ - msr psp, r1 /* Remember the new top of stack for the task. */ + ldr r3, =pxCurrentTCB /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ + ldr r1, [r3] /* Read pxCurrentTCB. */ + push {r2, r4} + bl SecureContext_LoadContext /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */ + pop {r2, r4} + mov lr, r4 /* LR = r4. */ + lsls r1, r4, #25 /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ + bpl restore_ns_context /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ + msr psp, r2 /* Remember the new top of stack for the task. */ bx lr #endif /* configENABLE_MPU */ restore_ns_context: - ldmia r1!, {r4-r11} /* Restore the registers that are not automatically restored. */ + ldmia r2!, {r4-r11} /* Restore the registers that are not automatically restored. */ #if ( configENABLE_FPU == 1 ) tst lr, #0x10 /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ it eq - vldmiaeq r1!, {s16-s31} /* Restore the FPU registers which are not restored automatically. */ + vldmiaeq r2!, {s16-s31} /* Restore the FPU registers which are not restored automatically. */ #endif /* configENABLE_FPU */ - msr psp, r1 /* Remember the new top of stack for the task. */ + msr psp, r2 /* Remember the new top of stack for the task. */ bx lr /*-----------------------------------------------------------*/ @@ -334,9 +341,9 @@ SVC_Handler: vPortFreeSecureContext: /* r0 = uint32_t *pulTCB. */ - ldr r1, [r0] /* The first item in the TCB is the top of the stack. */ - ldr r0, [r1] /* The first item on the stack is the task's xSecureContext. */ - cmp r0, #0 /* Raise svc if task's xSecureContext is not NULL. */ + ldr r2, [r0] /* The first item in the TCB is the top of the stack. */ + ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */ + cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */ it ne svcne 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */ bx lr /* Return. */ diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c index e3d2cdecc..884976374 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/portable/IAR/ARM_CM33/secure/secure_context.c @@ -50,11 +50,6 @@ */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 -/** - * @brief Invalid context ID. - */ -#define securecontextINVALID_CONTEXT_ID 0UL - /** * @brief Maximum number of secure contexts. */ @@ -70,11 +65,15 @@ SecureContext_t xSecureContexts[ secureconfigMAX_SECURE_CONTEXTS ]; /*-----------------------------------------------------------*/ /** - * @brief Get a free context from the secure context pool (xSecureContexts). + * @brief Get a free secure context for a task from the secure context pool (xSecureContexts). * - * @return Index of a free context in the xSecureContexts array. + * This function ensures that only one secure context is allocated for a task. + * + * @param[in] pvTaskHandle The task handle for which the secure context is allocated. + * + * @return Index of a free secure context in the xSecureContexts array. */ -static uint32_t ulGetSecureContext( void ); +static uint32_t ulGetSecureContext( void * pvTaskHandle ); /** * @brief Return the secure context to the secure context pool (xSecureContexts). @@ -88,16 +87,26 @@ extern void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ); extern void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ); /*-----------------------------------------------------------*/ -static uint32_t ulGetSecureContext( void ) +static uint32_t ulGetSecureContext( void * pvTaskHandle ) { - uint32_t ulSecureContextIndex; + /* Start with invalid index. */ + uint32_t i, ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS; - for( ulSecureContextIndex = 0; ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS; ulSecureContextIndex++ ) + for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ ) { - if( ( xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer == NULL ) && - ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == NULL ) && - ( xSecureContexts[ ulSecureContextIndex ].pucStackStart == NULL ) ) + if( ( xSecureContexts[ i ].pucCurrentStackPointer == NULL ) && + ( xSecureContexts[ i ].pucStackLimit == NULL ) && + ( xSecureContexts[ i ].pucStackStart == NULL ) && + ( xSecureContexts[ i ].pvTaskHandle == NULL ) && + ( ulSecureContextIndex == secureconfigMAX_SECURE_CONTEXTS ) ) { + ulSecureContextIndex = i; + } + else if( xSecureContexts[ i ].pvTaskHandle == pvTaskHandle ) + { + /* A task can only have one secure context. Do not allocate a second + * context for the same task. */ + ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS; break; } } @@ -111,20 +120,25 @@ static void vReturnSecureContext( uint32_t ulSecureContextIndex ) xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = NULL; xSecureContexts[ ulSecureContextIndex ].pucStackLimit = NULL; xSecureContexts[ ulSecureContextIndex ].pucStackStart = NULL; + xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = NULL; } /*-----------------------------------------------------------*/ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) { uint32_t ulIPSR, i; + static uint32_t ulSecureContextsInitialized = 0; /* Read the Interrupt Program Status Register (IPSR) value. */ secureportREAD_IPSR( ulIPSR ); /* Do nothing if the processor is running in the Thread Mode. IPSR is zero * when the processor is running in the Thread Mode. */ - if( ulIPSR != 0 ) + if( ( ulIPSR != 0 ) && ( ulSecureContextsInitialized == 0 ) ) { + /* Ensure to initialize secure contexts only once. */ + ulSecureContextsInitialized = 1; + /* No stack for thread mode until a task's context is loaded. */ secureportSET_PSPLIM( securecontextNO_STACK ); secureportSET_PSP( securecontextNO_STACK ); @@ -135,6 +149,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) xSecureContexts[ i ].pucCurrentStackPointer = NULL; xSecureContexts[ i ].pucStackLimit = NULL; xSecureContexts[ i ].pucStackStart = NULL; + xSecureContexts[ i ].pvTaskHandle = NULL; } #if ( configENABLE_MPU == 1 ) @@ -154,28 +169,35 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) #if ( configENABLE_MPU == 1 ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, - uint32_t ulIsTaskPrivileged ) + uint32_t ulIsTaskPrivileged, + void * pvTaskHandle ) #else /* configENABLE_MPU */ - secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ) + secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, + void * pvTaskHandle ) #endif /* configENABLE_MPU */ { uint8_t * pucStackMemory = NULL; + uint8_t * pucStackLimit; uint32_t ulIPSR, ulSecureContextIndex; - SecureContextHandle_t xSecureContextHandle; + SecureContextHandle_t xSecureContextHandle = securecontextINVALID_CONTEXT_ID; #if ( configENABLE_MPU == 1 ) uint32_t * pulCurrentStackPointer = NULL; #endif /* configENABLE_MPU */ - /* Read the Interrupt Program Status Register (IPSR) value. */ + /* Read the Interrupt Program Status Register (IPSR) and Process Stack Limit + * Register (PSPLIM) value. */ secureportREAD_IPSR( ulIPSR ); + secureportREAD_PSPLIM( pucStackLimit ); /* Do nothing if the processor is running in the Thread Mode. IPSR is zero - * when the processor is running in the Thread Mode. */ - if( ulIPSR != 0 ) + * when the processor is running in the Thread Mode. + * Also do nothing, if a secure context us already loaded. PSPLIM is set to + * securecontextNO_STACK when no secure context is loaded. */ + if( ( ulIPSR != 0 ) && ( pucStackLimit == securecontextNO_STACK ) ) { /* Ontain a free secure context. */ - ulSecureContextIndex = ulGetSecureContext(); + ulSecureContextIndex = ulGetSecureContext( pvTaskHandle ); /* Were we able to get a free context? */ if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) @@ -197,6 +219,8 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) * programmed in the PSPLIM register on context switch.*/ xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; + xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = pvTaskHandle; + #if ( configENABLE_MPU == 1 ) { /* Store the correct CONTROL value for the task on the stack. @@ -229,10 +253,6 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Ensure to never return 0 as a valid context handle. */ xSecureContextHandle = ulSecureContextIndex + 1UL; } - else - { - xSecureContextHandle = securecontextINVALID_CONTEXT_ID; - } } } @@ -240,7 +260,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { uint32_t ulIPSR, ulSecureContextIndex; @@ -256,38 +276,61 @@ secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandl { ulSecureContextIndex = xSecureContextHandle - 1UL; - /* Free the stack space. */ - vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); + /* Ensure that the secure context being deleted is associated with + * the task. */ + if( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) + { + /* Free the stack space. */ + vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit ); - /* Return the context back to the free contexts pool. */ - vReturnSecureContext( ulSecureContextIndex ); + /* Return the secure context back to the free secure contexts pool. */ + vReturnSecureContext( ulSecureContextIndex ); + } } } } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { + uint8_t * pucStackLimit; uint32_t ulSecureContextIndex; if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) { ulSecureContextIndex = xSecureContextHandle - 1UL; - SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + secureportREAD_PSPLIM( pucStackLimit ); + + /* Ensure that no secure context is loaded and the task is loading it's + * own context. */ + if( ( pucStackLimit == securecontextNO_STACK ) && + ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) + { + SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } } } /*-----------------------------------------------------------*/ -secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) +secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ) { + uint8_t * pucStackLimit; uint32_t ulSecureContextIndex; if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) ) { ulSecureContextIndex = xSecureContextHandle - 1UL; - SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + secureportREAD_PSPLIM( pucStackLimit ); + + /* Ensure that task's context is loaded and the task is saving it's own + * context. */ + if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && + ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) + { + SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) ); + } } } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33/secure/secure_context.h b/portable/IAR/ARM_CM33/secure/secure_context.h index 2ae78593f..b586f9710 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.h +++ b/portable/IAR/ARM_CM33/secure/secure_context.h @@ -37,7 +37,12 @@ /** * @brief PSP value when no secure context is loaded. */ -#define securecontextNO_STACK 0x0 +#define securecontextNO_STACK 0x0 + +/** + * @brief Invalid context ID. + */ +#define securecontextINVALID_CONTEXT_ID 0UL /*-----------------------------------------------------------*/ /** @@ -51,6 +56,7 @@ typedef struct SecureContext uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ uint8_t * pucStackStart; /**< First location of the stack memory. */ + void * pvTaskHandle; /**< Task handle of the task this context is associated with. */ } SecureContext_t; /*-----------------------------------------------------------*/ @@ -85,9 +91,11 @@ void SecureContext_Init( void ); */ #if ( configENABLE_MPU == 1 ) SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, - uint32_t ulIsTaskPrivileged ); + uint32_t ulIsTaskPrivileged, + void * pvTaskHandle ); #else /* configENABLE_MPU */ - SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ); + SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, + void * pvTaskHandle ); #endif /* configENABLE_MPU */ /** @@ -99,7 +107,7 @@ void SecureContext_Init( void ); * @param[in] xSecureContextHandle Context handle corresponding to the * context to be freed. */ -void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); /** * @brief Loads the given context. @@ -110,7 +118,7 @@ void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ); * @param[in] xSecureContextHandle Context handle corresponding to the context * to be loaded. */ -void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); /** * @brief Saves the given context. @@ -121,6 +129,6 @@ void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ); * @param[in] xSecureContextHandle Context handle corresponding to the context * to be saved. */ -void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ); +void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle ); #endif /* __SECURE_CONTEXT_H__ */ diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s index 714e0b05a..8efbb73f8 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s @@ -28,6 +28,13 @@ SECTION .text:CODE:NOROOT(2) THUMB +/* Including FreeRTOSConfig.h here will cause build errors if the header file +contains code not understood by the assembler - for example the 'extern' keyword. +To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so +the code is included in C files but excluded by the preprocessor in assembly +files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ +#include "FreeRTOSConfig.h" + PUBLIC SecureContext_LoadContextAsm PUBLIC SecureContext_SaveContextAsm /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.c b/portable/IAR/ARM_CM33/secure/secure_heap.c index 3b380a9c0..28494b7c4 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.c +++ b/portable/IAR/ARM_CM33/secure/secure_heap.c @@ -448,9 +448,3 @@ size_t xPortGetMinimumEverFreeHeapSize( void ) return xMinimumEverFreeBytesRemaining; } /*-----------------------------------------------------------*/ - -void vPortInitialiseBlocks( void ) -{ - /* This just exists to keep the linker quiet. */ -} -/*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.h b/portable/IAR/ARM_CM33/secure/secure_heap.h index fa78046e5..253e8b9f2 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.h +++ b/portable/IAR/ARM_CM33/secure/secure_heap.h @@ -48,4 +48,18 @@ void * pvPortMalloc( size_t xWantedSize ); */ void vPortFree( void * pv ); +/** + * @brief Get the free heap size. + * + * @return Free heap size. + */ +size_t xPortGetFreeHeapSize( void ); + +/** + * @brief Get the minimum ever free heap size. + * + * @return Minimum ever free heap size. + */ +size_t xPortGetMinimumEverFreeHeapSize( void ); + #endif /* __SECURE_HEAP_H__ */ diff --git a/portable/IAR/ARM_CM33/secure/secure_port_macros.h b/portable/IAR/ARM_CM33/secure/secure_port_macros.h index 7b8dbedc2..5ed052433 100644 --- a/portable/IAR/ARM_CM33/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM33/secure/secure_port_macros.h @@ -67,6 +67,12 @@ #define secureportSET_PSP( pucCurrentStackPointer ) \ __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) ) +/** + * @brief Read the PSPLIM value in the given variable. + */ +#define secureportREAD_PSPLIM( pucOutStackLimit ) \ + __asm volatile ( "mrs %0, psplim" : "=r" ( pucOutStackLimit ) ) + /** * @brief Set the PSPLIM to the given value. */ diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index 852a11ce3..447aa67d2 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -779,7 +779,8 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0, ulR1; + extern TaskHandle_t pxCurrentTCB; #if ( configENABLE_MPU == 1 ) uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ @@ -810,25 +811,27 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged, pxCurrentTCB ); } #else /* if ( configENABLE_MPU == 1 ) */ { /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); + xSecureContext = SecureContext_AllocateContext( ulR0, pxCurrentTCB ); } #endif /* configENABLE_MPU */ - configASSERT( xSecureContext != NULL ); - SecureContext_LoadContext( xSecureContext ); + configASSERT( xSecureContext != securecontextINVALID_CONTEXT_ID ); + SecureContext_LoadContext( xSecureContext, pxCurrentTCB ); break; case portSVC_FREE_SECURE_CONTEXT: - /* R0 contains the secure context handle to be freed. */ + /* R0 contains TCB being freed and R1 contains the secure + * context handle to be freed. */ ulR0 = pulCallerStackAddress[ 0 ]; + ulR1 = pulCallerStackAddress[ 1 ]; /* Free the secure context. */ - SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 ); + SecureContext_FreeContext( ( SecureContextHandle_t ) ulR1, ( void * ) ulR0 ); break; #endif /* configENABLE_TRUSTZONE */ From faa92f7df2652bd1fe4bdac82853f4e4c65a1598 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Wed, 18 Aug 2021 17:36:55 -0700 Subject: [PATCH 03/24] Implement secure stack sealing as per ARM's recommendation Signed-off-by: Gaurav Aggarwal --- .../ARMv8M/secure/context/secure_context.c | 24 +++++++++++++++---- portable/GCC/ARM_CM23/secure/secure_context.c | 24 +++++++++++++++---- portable/GCC/ARM_CM33/secure/secure_context.c | 24 +++++++++++++++---- portable/IAR/ARM_CM23/secure/secure_context.c | 24 +++++++++++++++---- portable/IAR/ARM_CM33/secure/secure_context.c | 24 +++++++++++++++---- 5 files changed, 95 insertions(+), 25 deletions(-) diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c index 884976374..759ea3690 100644 --- a/portable/ARMv8M/secure/context/secure_context.c +++ b/portable/ARMv8M/secure/context/secure_context.c @@ -50,6 +50,16 @@ */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 +/** + * @brief Size of stack seal values in bytes. + */ +#define securecontextSTACK_SEAL_SIZE 8 + +/** + * @brief Stack seal value as recommended by ARM. + */ +#define securecontextSTACK_SEAL_VALUE 0xFEF5EDA5 + /** * @brief Maximum number of secure contexts. */ @@ -203,18 +213,22 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) { /* Allocate the stack space. */ - pucStackMemory = pvPortMalloc( ulSecureStackSize ); + pucStackMemory = pvPortMalloc( ulSecureStackSize + securecontextSTACK_SEAL_SIZE ); if( pucStackMemory != NULL ) { /* Since stack grows down, the starting point will be the last * location. Note that this location is next to the last - * allocated byte because the hardware decrements the stack - * pointer before writing i.e. if stack pointer is 0x2, a push - * operation will decrement the stack pointer to 0x1 and then - * write at 0x1. */ + * allocated byte for stack (excluding the space for seal values) + * because the hardware decrements the stack pointer before + * writing i.e. if stack pointer is 0x2, a push operation will + * decrement the stack pointer to 0x1 and then write at 0x1. */ xSecureContexts[ ulSecureContextIndex ].pucStackStart = pucStackMemory + ulSecureStackSize; + /* Seal the created secure process stack. */ + *( uint32_t * )( pucStackMemory + ulSecureStackSize ) = securecontextSTACK_SEAL_VALUE; + *( uint32_t * )( pucStackMemory + ulSecureStackSize + 4 ) = securecontextSTACK_SEAL_VALUE; + /* The stack cannot go beyond this location. This value is * programmed in the PSPLIM register on context switch.*/ xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c index 884976374..759ea3690 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/portable/GCC/ARM_CM23/secure/secure_context.c @@ -50,6 +50,16 @@ */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 +/** + * @brief Size of stack seal values in bytes. + */ +#define securecontextSTACK_SEAL_SIZE 8 + +/** + * @brief Stack seal value as recommended by ARM. + */ +#define securecontextSTACK_SEAL_VALUE 0xFEF5EDA5 + /** * @brief Maximum number of secure contexts. */ @@ -203,18 +213,22 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) { /* Allocate the stack space. */ - pucStackMemory = pvPortMalloc( ulSecureStackSize ); + pucStackMemory = pvPortMalloc( ulSecureStackSize + securecontextSTACK_SEAL_SIZE ); if( pucStackMemory != NULL ) { /* Since stack grows down, the starting point will be the last * location. Note that this location is next to the last - * allocated byte because the hardware decrements the stack - * pointer before writing i.e. if stack pointer is 0x2, a push - * operation will decrement the stack pointer to 0x1 and then - * write at 0x1. */ + * allocated byte for stack (excluding the space for seal values) + * because the hardware decrements the stack pointer before + * writing i.e. if stack pointer is 0x2, a push operation will + * decrement the stack pointer to 0x1 and then write at 0x1. */ xSecureContexts[ ulSecureContextIndex ].pucStackStart = pucStackMemory + ulSecureStackSize; + /* Seal the created secure process stack. */ + *( uint32_t * )( pucStackMemory + ulSecureStackSize ) = securecontextSTACK_SEAL_VALUE; + *( uint32_t * )( pucStackMemory + ulSecureStackSize + 4 ) = securecontextSTACK_SEAL_VALUE; + /* The stack cannot go beyond this location. This value is * programmed in the PSPLIM register on context switch.*/ xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c index 884976374..759ea3690 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/portable/GCC/ARM_CM33/secure/secure_context.c @@ -50,6 +50,16 @@ */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 +/** + * @brief Size of stack seal values in bytes. + */ +#define securecontextSTACK_SEAL_SIZE 8 + +/** + * @brief Stack seal value as recommended by ARM. + */ +#define securecontextSTACK_SEAL_VALUE 0xFEF5EDA5 + /** * @brief Maximum number of secure contexts. */ @@ -203,18 +213,22 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) { /* Allocate the stack space. */ - pucStackMemory = pvPortMalloc( ulSecureStackSize ); + pucStackMemory = pvPortMalloc( ulSecureStackSize + securecontextSTACK_SEAL_SIZE ); if( pucStackMemory != NULL ) { /* Since stack grows down, the starting point will be the last * location. Note that this location is next to the last - * allocated byte because the hardware decrements the stack - * pointer before writing i.e. if stack pointer is 0x2, a push - * operation will decrement the stack pointer to 0x1 and then - * write at 0x1. */ + * allocated byte for stack (excluding the space for seal values) + * because the hardware decrements the stack pointer before + * writing i.e. if stack pointer is 0x2, a push operation will + * decrement the stack pointer to 0x1 and then write at 0x1. */ xSecureContexts[ ulSecureContextIndex ].pucStackStart = pucStackMemory + ulSecureStackSize; + /* Seal the created secure process stack. */ + *( uint32_t * )( pucStackMemory + ulSecureStackSize ) = securecontextSTACK_SEAL_VALUE; + *( uint32_t * )( pucStackMemory + ulSecureStackSize + 4 ) = securecontextSTACK_SEAL_VALUE; + /* The stack cannot go beyond this location. This value is * programmed in the PSPLIM register on context switch.*/ xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c index 884976374..759ea3690 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/portable/IAR/ARM_CM23/secure/secure_context.c @@ -50,6 +50,16 @@ */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 +/** + * @brief Size of stack seal values in bytes. + */ +#define securecontextSTACK_SEAL_SIZE 8 + +/** + * @brief Stack seal value as recommended by ARM. + */ +#define securecontextSTACK_SEAL_VALUE 0xFEF5EDA5 + /** * @brief Maximum number of secure contexts. */ @@ -203,18 +213,22 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) { /* Allocate the stack space. */ - pucStackMemory = pvPortMalloc( ulSecureStackSize ); + pucStackMemory = pvPortMalloc( ulSecureStackSize + securecontextSTACK_SEAL_SIZE ); if( pucStackMemory != NULL ) { /* Since stack grows down, the starting point will be the last * location. Note that this location is next to the last - * allocated byte because the hardware decrements the stack - * pointer before writing i.e. if stack pointer is 0x2, a push - * operation will decrement the stack pointer to 0x1 and then - * write at 0x1. */ + * allocated byte for stack (excluding the space for seal values) + * because the hardware decrements the stack pointer before + * writing i.e. if stack pointer is 0x2, a push operation will + * decrement the stack pointer to 0x1 and then write at 0x1. */ xSecureContexts[ ulSecureContextIndex ].pucStackStart = pucStackMemory + ulSecureStackSize; + /* Seal the created secure process stack. */ + *( uint32_t * )( pucStackMemory + ulSecureStackSize ) = securecontextSTACK_SEAL_VALUE; + *( uint32_t * )( pucStackMemory + ulSecureStackSize + 4 ) = securecontextSTACK_SEAL_VALUE; + /* The stack cannot go beyond this location. This value is * programmed in the PSPLIM register on context switch.*/ xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c index 884976374..759ea3690 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/portable/IAR/ARM_CM33/secure/secure_context.c @@ -50,6 +50,16 @@ */ #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 +/** + * @brief Size of stack seal values in bytes. + */ +#define securecontextSTACK_SEAL_SIZE 8 + +/** + * @brief Stack seal value as recommended by ARM. + */ +#define securecontextSTACK_SEAL_VALUE 0xFEF5EDA5 + /** * @brief Maximum number of secure contexts. */ @@ -203,18 +213,22 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS ) { /* Allocate the stack space. */ - pucStackMemory = pvPortMalloc( ulSecureStackSize ); + pucStackMemory = pvPortMalloc( ulSecureStackSize + securecontextSTACK_SEAL_SIZE ); if( pucStackMemory != NULL ) { /* Since stack grows down, the starting point will be the last * location. Note that this location is next to the last - * allocated byte because the hardware decrements the stack - * pointer before writing i.e. if stack pointer is 0x2, a push - * operation will decrement the stack pointer to 0x1 and then - * write at 0x1. */ + * allocated byte for stack (excluding the space for seal values) + * because the hardware decrements the stack pointer before + * writing i.e. if stack pointer is 0x2, a push operation will + * decrement the stack pointer to 0x1 and then write at 0x1. */ xSecureContexts[ ulSecureContextIndex ].pucStackStart = pucStackMemory + ulSecureStackSize; + /* Seal the created secure process stack. */ + *( uint32_t * )( pucStackMemory + ulSecureStackSize ) = securecontextSTACK_SEAL_VALUE; + *( uint32_t * )( pucStackMemory + ulSecureStackSize + 4 ) = securecontextSTACK_SEAL_VALUE; + /* The stack cannot go beyond this location. This value is * programmed in the PSPLIM register on context switch.*/ xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory; From 8341ffdc614cc5210fe86459c1004af4e8adac4c Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Wed, 18 Aug 2021 17:46:27 -0700 Subject: [PATCH 04/24] Fix free secure context for Cortex-M23 ports Update the branching condition to correctly free secure context when there is one. Signed-off-by: Gaurav Aggarwal --- .../ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.c | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.s | 2 +- tasks.c | 9 ++++++++- 5 files changed, 12 insertions(+), 5 deletions(-) diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index 20e18ca15..b0c8a6f61 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -448,7 +448,7 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ - " beq free_secure_context \n" + " bne free_secure_context \n"/* Branch if r1 != 0. */ " bx lr \n"/* There is no secure context (xSecureContext is NULL). */ " free_secure_context: \n" " svc %0 \n"/* Secure context is freed in the supervisor call. */ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s index 6c6fcc6b4..d3a25cd0d 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s @@ -380,7 +380,7 @@ vPortFreeSecureContext: ldr r2, [r0] /* The first item in the TCB is the top of the stack. */ ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */ cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */ - beq free_secure_context + bne free_secure_context /* Branch if r1 != 0. */ bx lr /* There is no secure context (xSecureContext is NULL). */ free_secure_context: svc 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */ diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index 20e18ca15..b0c8a6f61 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -448,7 +448,7 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR " ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */ " ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */ " cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */ - " beq free_secure_context \n" + " bne free_secure_context \n"/* Branch if r1 != 0. */ " bx lr \n"/* There is no secure context (xSecureContext is NULL). */ " free_secure_context: \n" " svc %0 \n"/* Secure context is freed in the supervisor call. */ diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.s b/portable/IAR/ARM_CM23/non_secure/portasm.s index 6c6fcc6b4..d3a25cd0d 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -380,7 +380,7 @@ vPortFreeSecureContext: ldr r2, [r0] /* The first item in the TCB is the top of the stack. */ ldr r1, [r2] /* The first item on the stack is the task's xSecureContext. */ cmp r1, #0 /* Raise svc if task's xSecureContext is not NULL. */ - beq free_secure_context + bne free_secure_context /* Branch if r1 != 0. */ bx lr /* There is no secure context (xSecureContext is NULL). */ free_secure_context: svc 1 /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */ diff --git a/tasks.c b/tasks.c index 884005af0..073a09750 100644 --- a/tasks.c +++ b/tasks.c @@ -1216,7 +1216,6 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) { --uxCurrentNumberOfTasks; traceTASK_DELETE( pxTCB ); - prvDeleteTCB( pxTCB ); /* Reset the next expected unblock time in case it referred to * the task that has just been deleted. */ @@ -1225,6 +1224,14 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) } taskEXIT_CRITICAL(); + /* If the task is not deleting itself, call prvDeleteTCB from outside of + * critical section. If a task deletes itself, prvDeleteTCB is called + * from prvCheckTasksWaitingTermination which is called from Idle task. */ + if( pxTCB != pxCurrentTCB ) + { + prvDeleteTCB( pxTCB ); + } + /* Force a reschedule if it is the currently running task that has just * been deleted. */ if( xSchedulerRunning != pdFALSE ) From 0ab31da2fdc68a84e2924574753b0eb135e92b1d Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Thu, 19 Aug 2021 10:45:18 -0700 Subject: [PATCH 05/24] Update History.txt for 10.4.3 LTS Patch 1 Signed-off-by: Gaurav Aggarwal --- History.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/History.txt b/History.txt index 6dcf3ce31..026c539bb 100644 --- a/History.txt +++ b/History.txt @@ -1,5 +1,21 @@ Documentation and download available at https://www.FreeRTOS.org/ +Changes between FreeRTOS V10.4.3 and FreeRTOS V10.4.3 LTS Patch 1 + + + ARMv8-M secure-side port: Tasks that call secure functions from the + non-secure side of an ARMv8-M MCU (ARM Cortex-M23 and Cortex-M33) have two + contexts – one on the non-secure side and one on the secure-side. Previous + versions of the FreeRTOS ARMv8-M secure-side ports allocated the structures + that reference secure-side contexts at run time. Now the structures are + allocated statically at compile time. The change necessitates the + introduction of the secureconfigMAX_SECURE_CONTEXTS configuration constant, + which sets the number of statically allocated secure contexts. + secureconfigMAX_SECURE_CONTEXTS defaults to 8 if left undefined. + Applications that only use FreeRTOS code on the non-secure side, such as + those running third-party code on the secure side, are not affected by + this change. + + Changes between FreeRTOS V10.4.2 and FreeRTOS V10.4.3 released December 14 2020 V10.4.3 is included in the 202012.00 LTS release. Learn more at https:/freertos.org/lts-libraries.html From fedc1652f41123ae646a73fe99ee58ebc4facfe2 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Thu, 19 Aug 2021 11:22:49 -0700 Subject: [PATCH 06/24] [AUTO][RELEASE]: Bump task.h version macros to "10.4.3 LTS Patch 1" --- include/task.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/task.h b/include/task.h index 66c99c56f..56d118444 100644 --- a/include/task.h +++ b/include/task.h @@ -44,7 +44,7 @@ * MACROS AND DEFINITIONS *----------------------------------------------------------*/ -#define tskKERNEL_VERSION_NUMBER "V10.4.3" +#define tskKERNEL_VERSION_NUMBER "V10.4.3 LTS Patch 1" #define tskKERNEL_VERSION_MAJOR 10 #define tskKERNEL_VERSION_MINOR 4 #define tskKERNEL_VERSION_BUILD 3 @@ -2758,7 +2758,7 @@ void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION; * // spent in the Blocked state does not exceed MAX_TIME_TO_WAIT. This * // continues until either the buffer contains at least uxWantedBytes bytes, * // or the total amount of time spent in the Blocked state reaches - * // MAX_TIME_TO_WAIT – at which point the task reads however many bytes are + * // MAX_TIME_TO_WAIT - at which point the task reads however many bytes are * // available up to a maximum of uxWantedBytes. * * size_t xUART_Receive( uint8_t *pucBuffer, size_t uxWantedBytes ) From dff28505b7a6dc5a694bd4f9267637e734adbbd2 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Thu, 19 Aug 2021 11:22:55 -0700 Subject: [PATCH 07/24] [AUTO][RELEASE]: Bump file header version to "10.4.3 LTS Patch 1" --- croutine.c | 2 +- event_groups.c | 2 +- include/FreeRTOS.h | 2 +- include/StackMacros.h | 2 +- include/atomic.h | 2 +- include/croutine.h | 2 +- include/deprecated_definitions.h | 2 +- include/event_groups.h | 2 +- include/list.h | 2 +- include/message_buffer.h | 2 +- include/mpu_prototypes.h | 2 +- include/mpu_wrappers.h | 2 +- include/portable.h | 2 +- include/projdefs.h | 2 +- include/queue.h | 2 +- include/semphr.h | 2 +- include/stack_macros.h | 2 +- include/stdint.readme | 2 +- include/stream_buffer.h | 2 +- include/task.h | 2 +- include/timers.h | 2 +- list.c | 2 +- portable/ARMv8M/copy_files.py | 2 +- portable/ARMv8M/non_secure/port.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portasm.h | 2 +- .../secure/context/portable/GCC/ARM_CM23/secure_context_port.c | 2 +- .../secure/context/portable/GCC/ARM_CM33/secure_context_port.c | 2 +- .../context/portable/IAR/ARM_CM23/secure_context_port_asm.s | 2 +- .../context/portable/IAR/ARM_CM33/secure_context_port_asm.s | 2 +- portable/ARMv8M/secure/context/secure_context.c | 2 +- portable/ARMv8M/secure/context/secure_context.h | 2 +- portable/ARMv8M/secure/heap/secure_heap.c | 2 +- portable/ARMv8M/secure/heap/secure_heap.h | 2 +- portable/ARMv8M/secure/init/secure_init.c | 2 +- portable/ARMv8M/secure/init/secure_init.h | 2 +- portable/ARMv8M/secure/macros/secure_port_macros.h | 2 +- portable/BCC/16BitDOS/Flsh186/port.c | 2 +- portable/BCC/16BitDOS/Flsh186/prtmacro.h | 2 +- portable/BCC/16BitDOS/PC/port.c | 2 +- portable/BCC/16BitDOS/PC/prtmacro.h | 2 +- portable/BCC/16BitDOS/common/portasm.h | 2 +- portable/BCC/16BitDOS/common/portcomn.c | 2 +- portable/CCS/ARM_CM3/port.c | 2 +- portable/CCS/ARM_CM3/portasm.asm | 2 +- portable/CCS/ARM_CM3/portmacro.h | 2 +- portable/CCS/ARM_CM4F/port.c | 2 +- portable/CCS/ARM_CM4F/portasm.asm | 2 +- portable/CCS/ARM_CM4F/portmacro.h | 2 +- portable/CCS/ARM_Cortex-R4/port.c | 2 +- portable/CCS/ARM_Cortex-R4/portASM.asm | 2 +- portable/CCS/ARM_Cortex-R4/portmacro.h | 2 +- portable/CCS/MSP430X/data_model.h | 2 +- portable/CCS/MSP430X/port.c | 2 +- portable/CCS/MSP430X/portext.asm | 2 +- portable/CCS/MSP430X/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V1/port.c | 2 +- portable/CodeWarrior/ColdFire_V1/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V1/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V2/port.c | 2 +- portable/CodeWarrior/ColdFire_V2/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V2/portmacro.h | 2 +- portable/CodeWarrior/HCS12/port.c | 2 +- portable/CodeWarrior/HCS12/portmacro.h | 2 +- portable/Common/mpu_wrappers.c | 2 +- portable/GCC/ARM7_AT91FR40008/port.c | 2 +- portable/GCC/ARM7_AT91FR40008/portISR.c | 2 +- portable/GCC/ARM7_AT91FR40008/portmacro.h | 2 +- portable/GCC/ARM7_AT91SAM7S/port.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portISR.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portmacro.h | 2 +- portable/GCC/ARM7_LPC2000/port.c | 2 +- portable/GCC/ARM7_LPC2000/portISR.c | 2 +- portable/GCC/ARM7_LPC2000/portmacro.h | 2 +- portable/GCC/ARM7_LPC23xx/port.c | 2 +- portable/GCC/ARM7_LPC23xx/portISR.c | 2 +- portable/GCC/ARM7_LPC23xx/portmacro.h | 2 +- portable/GCC/ARM_CA53_64_BIT/port.c | 2 +- portable/GCC/ARM_CA53_64_BIT/portASM.S | 2 +- portable/GCC/ARM_CA53_64_BIT/portmacro.h | 2 +- portable/GCC/ARM_CA9/port.c | 2 +- portable/GCC/ARM_CA9/portASM.S | 2 +- portable/GCC/ARM_CA9/portmacro.h | 2 +- portable/GCC/ARM_CM0/port.c | 2 +- portable/GCC/ARM_CM0/portmacro.h | 2 +- portable/GCC/ARM_CM23/non_secure/port.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context.c | 2 +- portable/GCC/ARM_CM23/secure/secure_context.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM23/secure/secure_init.c | 2 +- portable/GCC/ARM_CM23/secure/secure_init.h | 2 +- portable/GCC/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM3/port.c | 2 +- portable/GCC/ARM_CM3/portmacro.h | 2 +- portable/GCC/ARM_CM33/non_secure/port.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context.c | 2 +- portable/GCC/ARM_CM33/secure/secure_context.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM33/secure/secure_init.c | 2 +- portable/GCC/ARM_CM33/secure/secure_init.h | 2 +- portable/GCC/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM3_MPU/port.c | 2 +- portable/GCC/ARM_CM3_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM4F/port.c | 2 +- portable/GCC/ARM_CM4F/portmacro.h | 2 +- portable/GCC/ARM_CM4_MPU/port.c | 2 +- portable/GCC/ARM_CM4_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM7/r0p1/port.c | 2 +- portable/GCC/ARM_CM7/r0p1/portmacro.h | 2 +- portable/GCC/ARM_CR5/port.c | 2 +- portable/GCC/ARM_CR5/portASM.S | 2 +- portable/GCC/ARM_CR5/portmacro.h | 2 +- portable/GCC/ARM_CRx_No_GIC/port.c | 2 +- portable/GCC/ARM_CRx_No_GIC/portASM.S | 2 +- portable/GCC/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/GCC/ATMega323/port.c | 2 +- portable/GCC/ATMega323/portmacro.h | 2 +- portable/GCC/AVR32_UC3/port.c | 2 +- portable/GCC/AVR32_UC3/portmacro.h | 2 +- portable/GCC/AVR_AVRDx/port.c | 2 +- portable/GCC/AVR_AVRDx/portmacro.h | 2 +- portable/GCC/AVR_Mega0/port.c | 2 +- portable/GCC/AVR_Mega0/portmacro.h | 2 +- portable/GCC/CORTUS_APS3/port.c | 2 +- portable/GCC/CORTUS_APS3/portmacro.h | 2 +- portable/GCC/ColdFire_V2/port.c | 2 +- portable/GCC/ColdFire_V2/portasm.S | 2 +- portable/GCC/ColdFire_V2/portmacro.h | 2 +- portable/GCC/H8S2329/port.c | 2 +- portable/GCC/H8S2329/portmacro.h | 2 +- portable/GCC/HCS12/port.c | 2 +- portable/GCC/HCS12/portmacro.h | 2 +- portable/GCC/IA32_flat/ISR_Support.h | 2 +- portable/GCC/IA32_flat/port.c | 2 +- portable/GCC/IA32_flat/portASM.S | 2 +- portable/GCC/IA32_flat/portmacro.h | 2 +- portable/GCC/MSP430F449/port.c | 2 +- portable/GCC/MSP430F449/portmacro.h | 2 +- portable/GCC/MicroBlaze/port.c | 2 +- portable/GCC/MicroBlaze/portasm.s | 2 +- portable/GCC/MicroBlaze/portmacro.h | 2 +- portable/GCC/MicroBlazeV8/port.c | 2 +- portable/GCC/MicroBlazeV8/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV8/portasm.S | 2 +- portable/GCC/MicroBlazeV8/portmacro.h | 2 +- portable/GCC/MicroBlazeV9/port.c | 2 +- portable/GCC/MicroBlazeV9/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV9/portasm.S | 2 +- portable/GCC/MicroBlazeV9/portmacro.h | 2 +- portable/GCC/NiosII/port.c | 2 +- portable/GCC/NiosII/port_asm.S | 2 +- portable/GCC/NiosII/portmacro.h | 2 +- portable/GCC/PPC405_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC405_Xilinx/port.c | 2 +- portable/GCC/PPC405_Xilinx/portasm.S | 2 +- portable/GCC/PPC405_Xilinx/portmacro.h | 2 +- portable/GCC/PPC440_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC440_Xilinx/port.c | 2 +- portable/GCC/PPC440_Xilinx/portasm.S | 2 +- portable/GCC/PPC440_Xilinx/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/GCC/RISC-V/port.c | 2 +- portable/GCC/RISC-V/portASM.S | 2 +- portable/GCC/RISC-V/portmacro.h | 2 +- portable/GCC/RL78/isr_support.h | 2 +- portable/GCC/RL78/port.c | 2 +- portable/GCC/RL78/portasm.S | 2 +- portable/GCC/RL78/portmacro.h | 2 +- portable/GCC/RX100/port.c | 2 +- portable/GCC/RX100/portmacro.h | 2 +- portable/GCC/RX200/port.c | 2 +- portable/GCC/RX200/portmacro.h | 2 +- portable/GCC/RX600/port.c | 2 +- portable/GCC/RX600/portmacro.h | 2 +- portable/GCC/RX600v2/port.c | 2 +- portable/GCC/RX600v2/portmacro.h | 2 +- portable/GCC/RX700v3_DPFPU/port.c | 2 +- portable/GCC/RX700v3_DPFPU/portmacro.h | 2 +- portable/GCC/STR75x/port.c | 2 +- portable/GCC/STR75x/portISR.c | 2 +- portable/GCC/STR75x/portmacro.h | 2 +- portable/GCC/TriCore_1782/port.c | 2 +- portable/GCC/TriCore_1782/portmacro.h | 2 +- portable/GCC/TriCore_1782/porttrap.c | 2 +- portable/IAR/78K0R/ISR_Support.h | 2 +- portable/IAR/78K0R/port.c | 2 +- portable/IAR/78K0R/portasm.s26 | 2 +- portable/IAR/78K0R/portmacro.h | 2 +- portable/IAR/ARM_CA5_No_GIC/port.c | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.h | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CA5_No_GIC/portmacro.h | 2 +- portable/IAR/ARM_CA9/port.c | 2 +- portable/IAR/ARM_CA9/portASM.h | 2 +- portable/IAR/ARM_CA9/portASM.s | 2 +- portable/IAR/ARM_CA9/portmacro.h | 2 +- portable/IAR/ARM_CM0/port.c | 2 +- portable/IAR/ARM_CM0/portasm.s | 2 +- portable/IAR/ARM_CM0/portmacro.h | 2 +- portable/IAR/ARM_CM23/non_secure/port.c | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context.c | 2 +- portable/IAR/ARM_CM23/secure/secure_context.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM23/secure/secure_init.c | 2 +- portable/IAR/ARM_CM23/secure/secure_init.h | 2 +- portable/IAR/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM3/port.c | 2 +- portable/IAR/ARM_CM3/portasm.s | 2 +- portable/IAR/ARM_CM3/portmacro.h | 2 +- portable/IAR/ARM_CM33/non_secure/port.c | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context.c | 2 +- portable/IAR/ARM_CM33/secure/secure_context.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM33/secure/secure_init.c | 2 +- portable/IAR/ARM_CM33/secure/secure_init.h | 2 +- portable/IAR/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM4F/port.c | 2 +- portable/IAR/ARM_CM4F/portasm.s | 2 +- portable/IAR/ARM_CM4F/portmacro.h | 2 +- portable/IAR/ARM_CM4F_MPU/port.c | 2 +- portable/IAR/ARM_CM4F_MPU/portasm.s | 2 +- portable/IAR/ARM_CM4F_MPU/portmacro.h | 2 +- portable/IAR/ARM_CM7/r0p1/port.c | 2 +- portable/IAR/ARM_CM7/r0p1/portasm.s | 2 +- portable/IAR/ARM_CM7/r0p1/portmacro.h | 2 +- portable/IAR/ARM_CRx_No_GIC/port.c | 2 +- portable/IAR/ARM_CRx_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/IAR/ATMega323/port.c | 2 +- portable/IAR/ATMega323/portmacro.h | 2 +- portable/IAR/ATMega323/portmacro.s90 | 2 +- portable/IAR/AVR32_UC3/port.c | 2 +- portable/IAR/AVR32_UC3/portmacro.h | 2 +- portable/IAR/AVR_AVRDx/port.c | 2 +- portable/IAR/AVR_AVRDx/portmacro.h | 2 +- portable/IAR/AVR_AVRDx/portmacro.s90 | 2 +- portable/IAR/AVR_Mega0/port.c | 2 +- portable/IAR/AVR_Mega0/portmacro.h | 2 +- portable/IAR/AVR_Mega0/portmacro.s90 | 2 +- portable/IAR/AtmelSAM7S64/ISR_Support.h | 2 +- portable/IAR/AtmelSAM7S64/port.c | 2 +- portable/IAR/AtmelSAM7S64/portasm.s79 | 2 +- portable/IAR/AtmelSAM7S64/portmacro.h | 2 +- portable/IAR/AtmelSAM9XE/port.c | 2 +- portable/IAR/AtmelSAM9XE/portmacro.h | 2 +- portable/IAR/LPC2000/ISR_Support.h | 2 +- portable/IAR/LPC2000/port.c | 2 +- portable/IAR/LPC2000/portasm.s79 | 2 +- portable/IAR/LPC2000/portmacro.h | 2 +- portable/IAR/MSP430/port.c | 2 +- portable/IAR/MSP430/portasm.h | 2 +- portable/IAR/MSP430/portext.s43 | 2 +- portable/IAR/MSP430/portmacro.h | 2 +- portable/IAR/MSP430X/data_model.h | 2 +- portable/IAR/MSP430X/port.c | 2 +- portable/IAR/MSP430X/portext.s43 | 2 +- portable/IAR/MSP430X/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/IAR/RISC-V/port.c | 2 +- portable/IAR/RISC-V/portASM.s | 2 +- portable/IAR/RISC-V/portmacro.h | 2 +- portable/IAR/RL78/ISR_Support.h | 2 +- portable/IAR/RL78/port.c | 2 +- portable/IAR/RL78/portasm.s87 | 2 +- portable/IAR/RL78/portmacro.h | 2 +- portable/IAR/RX100/port.c | 2 +- portable/IAR/RX100/port_asm.s | 2 +- portable/IAR/RX100/portmacro.h | 2 +- portable/IAR/RX600/port.c | 2 +- portable/IAR/RX600/port_asm.s | 2 +- portable/IAR/RX600/portmacro.h | 2 +- portable/IAR/RX700v3_DPFPU/port.c | 2 +- portable/IAR/RX700v3_DPFPU/portmacro.h | 2 +- portable/IAR/RXv2/port.c | 2 +- portable/IAR/RXv2/port_asm.s | 2 +- portable/IAR/RXv2/portmacro.h | 2 +- portable/IAR/STR71x/ISR_Support.h | 2 +- portable/IAR/STR71x/port.c | 2 +- portable/IAR/STR71x/portasm.s79 | 2 +- portable/IAR/STR71x/portmacro.h | 2 +- portable/IAR/STR75x/ISR_Support.h | 2 +- portable/IAR/STR75x/port.c | 2 +- portable/IAR/STR75x/portasm.s79 | 2 +- portable/IAR/STR75x/portmacro.h | 2 +- portable/IAR/STR91x/ISR_Support.h | 2 +- portable/IAR/STR91x/port.c | 2 +- portable/IAR/STR91x/portasm.s79 | 2 +- portable/IAR/STR91x/portmacro.h | 2 +- portable/IAR/V850ES/ISR_Support.h | 2 +- portable/IAR/V850ES/port.c | 2 +- portable/IAR/V850ES/portasm.s85 | 2 +- portable/IAR/V850ES/portasm_Fx3.s85 | 2 +- portable/IAR/V850ES/portasm_Hx2.s85 | 2 +- portable/IAR/V850ES/portmacro.h | 2 +- portable/MPLAB/PIC18F/port.c | 2 +- portable/MPLAB/PIC18F/portmacro.h | 2 +- portable/MPLAB/PIC24_dsPIC/port.c | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S | 2 +- portable/MPLAB/PIC24_dsPIC/portmacro.h | 2 +- portable/MPLAB/PIC32MEC14xx/ISR_Support.h | 2 +- portable/MPLAB/PIC32MEC14xx/port.c | 2 +- portable/MPLAB/PIC32MEC14xx/port_asm.S | 2 +- portable/MPLAB/PIC32MEC14xx/portmacro.h | 2 +- portable/MPLAB/PIC32MX/ISR_Support.h | 2 +- portable/MPLAB/PIC32MX/port.c | 2 +- portable/MPLAB/PIC32MX/port_asm.S | 2 +- portable/MPLAB/PIC32MX/portmacro.h | 2 +- portable/MPLAB/PIC32MZ/ISR_Support.h | 2 +- portable/MPLAB/PIC32MZ/port.c | 2 +- portable/MPLAB/PIC32MZ/port_asm.S | 2 +- portable/MPLAB/PIC32MZ/portmacro.h | 2 +- portable/MSVC-MingW/port.c | 2 +- portable/MSVC-MingW/portmacro.h | 2 +- portable/MemMang/heap_1.c | 2 +- portable/MemMang/heap_2.c | 2 +- portable/MemMang/heap_3.c | 2 +- portable/MemMang/heap_4.c | 2 +- portable/MemMang/heap_5.c | 2 +- portable/MikroC/ARM_CM4F/port.c | 2 +- portable/MikroC/ARM_CM4F/portmacro.h | 2 +- portable/Paradigm/Tern_EE/large_untested/port.c | 2 +- portable/Paradigm/Tern_EE/large_untested/portasm.h | 2 +- portable/Paradigm/Tern_EE/large_untested/portmacro.h | 2 +- portable/Paradigm/Tern_EE/small/port.c | 2 +- portable/Paradigm/Tern_EE/small/portasm.h | 2 +- portable/Paradigm/Tern_EE/small/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/port.c | 2 +- portable/RVDS/ARM7_LPC21xx/portASM.s | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.inc | 2 +- portable/RVDS/ARM_CA9/port.c | 2 +- portable/RVDS/ARM_CA9/portASM.s | 2 +- portable/RVDS/ARM_CA9/portmacro.h | 2 +- portable/RVDS/ARM_CA9/portmacro.inc | 2 +- portable/RVDS/ARM_CM0/port.c | 2 +- portable/RVDS/ARM_CM0/portmacro.h | 2 +- portable/RVDS/ARM_CM3/port.c | 2 +- portable/RVDS/ARM_CM3/portmacro.h | 2 +- portable/RVDS/ARM_CM4F/port.c | 2 +- portable/RVDS/ARM_CM4F/portmacro.h | 2 +- portable/RVDS/ARM_CM4_MPU/port.c | 2 +- portable/RVDS/ARM_CM4_MPU/portmacro.h | 2 +- portable/RVDS/ARM_CM7/r0p1/port.c | 2 +- portable/RVDS/ARM_CM7/r0p1/portmacro.h | 2 +- portable/Renesas/RX100/port.c | 2 +- portable/Renesas/RX100/port_asm.src | 2 +- portable/Renesas/RX100/portmacro.h | 2 +- portable/Renesas/RX200/port.c | 2 +- portable/Renesas/RX200/port_asm.src | 2 +- portable/Renesas/RX200/portmacro.h | 2 +- portable/Renesas/RX600/port.c | 2 +- portable/Renesas/RX600/port_asm.src | 2 +- portable/Renesas/RX600/portmacro.h | 2 +- portable/Renesas/RX600v2/port.c | 2 +- portable/Renesas/RX600v2/port_asm.src | 2 +- portable/Renesas/RX600v2/portmacro.h | 2 +- portable/Renesas/RX700v3_DPFPU/port.c | 2 +- portable/Renesas/RX700v3_DPFPU/port_asm.src | 2 +- portable/Renesas/RX700v3_DPFPU/portmacro.h | 2 +- portable/Renesas/SH2A_FPU/ISR_Support.inc | 2 +- portable/Renesas/SH2A_FPU/port.c | 2 +- portable/Renesas/SH2A_FPU/portasm.src | 2 +- portable/Renesas/SH2A_FPU/portmacro.h | 2 +- portable/Rowley/MSP430F449/port.c | 2 +- portable/Rowley/MSP430F449/portasm.h | 2 +- portable/Rowley/MSP430F449/portext.asm | 2 +- portable/Rowley/MSP430F449/portmacro.h | 2 +- portable/SDCC/Cygnal/port.c | 2 +- portable/SDCC/Cygnal/portmacro.h | 2 +- portable/Softune/MB91460/port.c | 2 +- portable/Softune/MB91460/portmacro.h | 2 +- portable/Softune/MB96340/port.c | 2 +- portable/Softune/MB96340/portmacro.h | 2 +- portable/Tasking/ARM_CM4F/port.c | 2 +- portable/Tasking/ARM_CM4F/port_asm.asm | 2 +- portable/Tasking/ARM_CM4F/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/port.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_v1/port.c | 2 +- portable/ThirdParty/GCC/ARC_v1/portmacro.h | 2 +- portable/ThirdParty/GCC/ATmega/port.c | 2 +- portable/ThirdParty/GCC/ATmega/portmacro.h | 2 +- portable/ThirdParty/GCC/Posix/port.c | 2 +- portable/ThirdParty/GCC/Posix/portmacro.h | 2 +- portable/ThirdParty/XCC/Xtensa/port.c | 2 +- portable/ThirdParty/XCC/Xtensa/portmacro.h | 2 +- portable/WizC/PIC18/Drivers/Tick/Tick.c | 2 +- portable/WizC/PIC18/Drivers/Tick/isrTick.c | 2 +- portable/WizC/PIC18/addFreeRTOS.h | 2 +- portable/WizC/PIC18/port.c | 2 +- portable/WizC/PIC18/portmacro.h | 2 +- portable/oWatcom/16BitDOS/Flsh186/port.c | 2 +- portable/oWatcom/16BitDOS/Flsh186/portmacro.h | 2 +- portable/oWatcom/16BitDOS/PC/port.c | 2 +- portable/oWatcom/16BitDOS/PC/portmacro.h | 2 +- portable/oWatcom/16BitDOS/common/portasm.h | 2 +- portable/oWatcom/16BitDOS/common/portcomn.c | 2 +- queue.c | 2 +- stream_buffer.c | 2 +- tasks.c | 2 +- timers.c | 2 +- 461 files changed, 461 insertions(+), 461 deletions(-) diff --git a/croutine.c b/croutine.c index 64574e3d8..f57e8aa89 100644 --- a/croutine.c +++ b/croutine.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/event_groups.c b/event_groups.c index 0ee799067..04f5839a0 100644 --- a/event_groups.c +++ b/event_groups.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/FreeRTOS.h b/include/FreeRTOS.h index 5e443a629..61a45ab06 100644 --- a/include/FreeRTOS.h +++ b/include/FreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/StackMacros.h b/include/StackMacros.h index dde8136f2..5f0923133 100644 --- a/include/StackMacros.h +++ b/include/StackMacros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/atomic.h b/include/atomic.h index cd1fd1b0e..6d63bd459 100644 --- a/include/atomic.h +++ b/include/atomic.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/croutine.h b/include/croutine.h index 4e7b53401..ff99ffbba 100644 --- a/include/croutine.h +++ b/include/croutine.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/deprecated_definitions.h b/include/deprecated_definitions.h index efa8a87a3..149d3ce06 100644 --- a/include/deprecated_definitions.h +++ b/include/deprecated_definitions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/event_groups.h b/include/event_groups.h index 70ba8d1bc..fb8a7896b 100644 --- a/include/event_groups.h +++ b/include/event_groups.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/list.h b/include/list.h index d8a498841..e4d8f6ec4 100644 --- a/include/list.h +++ b/include/list.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/message_buffer.h b/include/message_buffer.h index a9d21ce69..0c623c4c3 100644 --- a/include/message_buffer.h +++ b/include/message_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/mpu_prototypes.h b/include/mpu_prototypes.h index 61f885d62..e55a9b327 100644 --- a/include/mpu_prototypes.h +++ b/include/mpu_prototypes.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h index a5c081ff7..14b712eea 100644 --- a/include/mpu_wrappers.h +++ b/include/mpu_wrappers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/portable.h b/include/portable.h index 4f4c1d52a..54d2fb840 100644 --- a/include/portable.h +++ b/include/portable.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/projdefs.h b/include/projdefs.h index fd9072c5c..13702c497 100644 --- a/include/projdefs.h +++ b/include/projdefs.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/queue.h b/include/queue.h index 37ad23c7e..9af7227bf 100644 --- a/include/queue.h +++ b/include/queue.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/semphr.h b/include/semphr.h index 525a8ec16..3448b78c1 100644 --- a/include/semphr.h +++ b/include/semphr.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/stack_macros.h b/include/stack_macros.h index c8ef4bd35..5cdb28f04 100644 --- a/include/stack_macros.h +++ b/include/stack_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/stdint.readme b/include/stdint.readme index b1bb60eac..2e77f47f2 100644 --- a/include/stdint.readme +++ b/include/stdint.readme @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/stream_buffer.h b/include/stream_buffer.h index 89f6dfb20..d2cf42d7f 100644 --- a/include/stream_buffer.h +++ b/include/stream_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/task.h b/include/task.h index 56d118444..ad5b5f56b 100644 --- a/include/task.h +++ b/include/task.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/timers.h b/include/timers.h index f767d5c5a..453988bbd 100644 --- a/include/timers.h +++ b/include/timers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/list.c b/list.c index 17a4e903e..80e62cc71 100644 --- a/list.c +++ b/list.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/copy_files.py b/portable/ARMv8M/copy_files.py index 73252e8c7..7fb938119 100644 --- a/portable/ARMv8M/copy_files.py +++ b/portable/ARMv8M/copy_files.py @@ -1,5 +1,5 @@ #/* -# * FreeRTOS Kernel V10.4.3 +# * FreeRTOS Kernel V10.4.3 LTS Patch 1 # * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index dfc895417..f83648d19 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index b0c8a6f61..131abe1e6 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h index 61cd152f7..eb4b3dd38 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c index ef8f3e443..c1f1e38f5 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h index 61cd152f7..eb4b3dd38 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c index 8848dd786..110f5f920 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h index 8e3b0b3cd..fc24117c8 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c index 98927a7e7..3f67b9e23 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h index 8e3b0b3cd..fc24117c8 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s index d3a25cd0d..cc6eee075 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h index b36dc1f9c..899098358 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s index 89ff193b7..c068f80f0 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h index 315e7122a..3bffd21ad 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s index 9b5296ad9..9e4205d5e 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h index e3fa10af0..fd9a9fde4 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s index b65f0f41c..50efdb301 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h index e3fa10af0..fd9a9fde4 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portasm.h b/portable/ARMv8M/non_secure/portasm.h index b01f17124..165c9d3ea 100644 --- a/portable/ARMv8M/non_secure/portasm.h +++ b/portable/ARMv8M/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c index 9dc324c9c..28220ba58 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c index 3e3858911..6c7ec746f 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s index c0f8062bc..eb8fbcd5c 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s index 8efbb73f8..c92a8af65 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c index 759ea3690..bd73c5795 100644 --- a/portable/ARMv8M/secure/context/secure_context.c +++ b/portable/ARMv8M/secure/context/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/secure_context.h b/portable/ARMv8M/secure/context/secure_context.h index b586f9710..1069db151 100644 --- a/portable/ARMv8M/secure/context/secure_context.h +++ b/portable/ARMv8M/secure/context/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/heap/secure_heap.c b/portable/ARMv8M/secure/heap/secure_heap.c index 28494b7c4..bfb88c971 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.c +++ b/portable/ARMv8M/secure/heap/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/heap/secure_heap.h b/portable/ARMv8M/secure/heap/secure_heap.h index 253e8b9f2..a89e5b334 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.h +++ b/portable/ARMv8M/secure/heap/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/init/secure_init.c b/portable/ARMv8M/secure/init/secure_init.c index 4e6018d0f..d78346391 100644 --- a/portable/ARMv8M/secure/init/secure_init.c +++ b/portable/ARMv8M/secure/init/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/init/secure_init.h b/portable/ARMv8M/secure/init/secure_init.h index 39deb36ae..9d021f741 100644 --- a/portable/ARMv8M/secure/init/secure_init.h +++ b/portable/ARMv8M/secure/init/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/macros/secure_port_macros.h b/portable/ARMv8M/secure/macros/secure_port_macros.h index 5ed052433..7faf15190 100644 --- a/portable/ARMv8M/secure/macros/secure_port_macros.h +++ b/portable/ARMv8M/secure/macros/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/Flsh186/port.c b/portable/BCC/16BitDOS/Flsh186/port.c index dba83d267..01e37d0ef 100644 --- a/portable/BCC/16BitDOS/Flsh186/port.c +++ b/portable/BCC/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/Flsh186/prtmacro.h b/portable/BCC/16BitDOS/Flsh186/prtmacro.h index 57ae421fc..e7f275ff7 100644 --- a/portable/BCC/16BitDOS/Flsh186/prtmacro.h +++ b/portable/BCC/16BitDOS/Flsh186/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/PC/port.c b/portable/BCC/16BitDOS/PC/port.c index c837ad708..37edd53f7 100644 --- a/portable/BCC/16BitDOS/PC/port.c +++ b/portable/BCC/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/PC/prtmacro.h b/portable/BCC/16BitDOS/PC/prtmacro.h index 0daf40044..8c922679b 100644 --- a/portable/BCC/16BitDOS/PC/prtmacro.h +++ b/portable/BCC/16BitDOS/PC/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/common/portasm.h b/portable/BCC/16BitDOS/common/portasm.h index 83193de9f..5dddc21d1 100644 --- a/portable/BCC/16BitDOS/common/portasm.h +++ b/portable/BCC/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/common/portcomn.c b/portable/BCC/16BitDOS/common/portcomn.c index be7e2e146..2ab92e312 100644 --- a/portable/BCC/16BitDOS/common/portcomn.c +++ b/portable/BCC/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM3/port.c b/portable/CCS/ARM_CM3/port.c index 790b2626d..20b53fd93 100644 --- a/portable/CCS/ARM_CM3/port.c +++ b/portable/CCS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM3/portasm.asm b/portable/CCS/ARM_CM3/portasm.asm index 940e1b0e0..aede25970 100644 --- a/portable/CCS/ARM_CM3/portasm.asm +++ b/portable/CCS/ARM_CM3/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM3/portmacro.h b/portable/CCS/ARM_CM3/portmacro.h index 3bbf3ced6..ea3f6d5fb 100644 --- a/portable/CCS/ARM_CM3/portmacro.h +++ b/portable/CCS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM4F/port.c b/portable/CCS/ARM_CM4F/port.c index 15fcdc537..c0f4a8854 100644 --- a/portable/CCS/ARM_CM4F/port.c +++ b/portable/CCS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM4F/portasm.asm b/portable/CCS/ARM_CM4F/portasm.asm index 20cbdd401..c62743ca5 100644 --- a/portable/CCS/ARM_CM4F/portasm.asm +++ b/portable/CCS/ARM_CM4F/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM4F/portmacro.h b/portable/CCS/ARM_CM4F/portmacro.h index f13537dda..eb625d786 100644 --- a/portable/CCS/ARM_CM4F/portmacro.h +++ b/portable/CCS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_Cortex-R4/port.c b/portable/CCS/ARM_Cortex-R4/port.c index 698f1c80a..b76b8c3ac 100644 --- a/portable/CCS/ARM_Cortex-R4/port.c +++ b/portable/CCS/ARM_Cortex-R4/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_Cortex-R4/portASM.asm b/portable/CCS/ARM_Cortex-R4/portASM.asm index 76e2b7126..085e303bb 100644 --- a/portable/CCS/ARM_Cortex-R4/portASM.asm +++ b/portable/CCS/ARM_Cortex-R4/portASM.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_Cortex-R4/portmacro.h b/portable/CCS/ARM_Cortex-R4/portmacro.h index 7989f187c..5553f1532 100644 --- a/portable/CCS/ARM_Cortex-R4/portmacro.h +++ b/portable/CCS/ARM_Cortex-R4/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/data_model.h b/portable/CCS/MSP430X/data_model.h index 400705c3a..3216ee0a9 100644 --- a/portable/CCS/MSP430X/data_model.h +++ b/portable/CCS/MSP430X/data_model.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/port.c b/portable/CCS/MSP430X/port.c index 5536c4e7a..44607f438 100644 --- a/portable/CCS/MSP430X/port.c +++ b/portable/CCS/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/portext.asm b/portable/CCS/MSP430X/portext.asm index 81de6eac7..5216e4649 100644 --- a/portable/CCS/MSP430X/portext.asm +++ b/portable/CCS/MSP430X/portext.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/portmacro.h b/portable/CCS/MSP430X/portmacro.h index 83daecf91..2d3b14fd9 100644 --- a/portable/CCS/MSP430X/portmacro.h +++ b/portable/CCS/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V1/port.c b/portable/CodeWarrior/ColdFire_V1/port.c index 502ccb2ae..37bcc6989 100644 --- a/portable/CodeWarrior/ColdFire_V1/port.c +++ b/portable/CodeWarrior/ColdFire_V1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V1/portasm.S b/portable/CodeWarrior/ColdFire_V1/portasm.S index b722b3148..aef052b8b 100644 --- a/portable/CodeWarrior/ColdFire_V1/portasm.S +++ b/portable/CodeWarrior/ColdFire_V1/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V1/portmacro.h b/portable/CodeWarrior/ColdFire_V1/portmacro.h index 0edd3a105..d84bbaac0 100644 --- a/portable/CodeWarrior/ColdFire_V1/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V2/port.c b/portable/CodeWarrior/ColdFire_V2/port.c index 28692f44e..760bba5fc 100644 --- a/portable/CodeWarrior/ColdFire_V2/port.c +++ b/portable/CodeWarrior/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V2/portasm.S b/portable/CodeWarrior/ColdFire_V2/portasm.S index 0e7e581df..5d0700b73 100644 --- a/portable/CodeWarrior/ColdFire_V2/portasm.S +++ b/portable/CodeWarrior/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V2/portmacro.h b/portable/CodeWarrior/ColdFire_V2/portmacro.h index 6afa38d3d..4ff294222 100644 --- a/portable/CodeWarrior/ColdFire_V2/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/HCS12/port.c b/portable/CodeWarrior/HCS12/port.c index 94caaae67..907532bf5 100644 --- a/portable/CodeWarrior/HCS12/port.c +++ b/portable/CodeWarrior/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/HCS12/portmacro.h b/portable/CodeWarrior/HCS12/portmacro.h index f231d776d..30171d33e 100644 --- a/portable/CodeWarrior/HCS12/portmacro.h +++ b/portable/CodeWarrior/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index d861511ec..48d1def72 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91FR40008/port.c b/portable/GCC/ARM7_AT91FR40008/port.c index 4b71df5ee..1a6845ebc 100644 --- a/portable/GCC/ARM7_AT91FR40008/port.c +++ b/portable/GCC/ARM7_AT91FR40008/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91FR40008/portISR.c b/portable/GCC/ARM7_AT91FR40008/portISR.c index 32498c6db..d66958028 100644 --- a/portable/GCC/ARM7_AT91FR40008/portISR.c +++ b/portable/GCC/ARM7_AT91FR40008/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91FR40008/portmacro.h b/portable/GCC/ARM7_AT91FR40008/portmacro.h index a72538f96..3aa0a69e9 100644 --- a/portable/GCC/ARM7_AT91FR40008/portmacro.h +++ b/portable/GCC/ARM7_AT91FR40008/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91SAM7S/port.c b/portable/GCC/ARM7_AT91SAM7S/port.c index fca0dc799..a80812256 100644 --- a/portable/GCC/ARM7_AT91SAM7S/port.c +++ b/portable/GCC/ARM7_AT91SAM7S/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91SAM7S/portISR.c b/portable/GCC/ARM7_AT91SAM7S/portISR.c index 197e201b7..1b33ea21c 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portISR.c +++ b/portable/GCC/ARM7_AT91SAM7S/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/portable/GCC/ARM7_AT91SAM7S/portmacro.h index 97ab4deed..d2ee2b37f 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portmacro.h +++ b/portable/GCC/ARM7_AT91SAM7S/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC2000/port.c b/portable/GCC/ARM7_LPC2000/port.c index abc481046..97f56e1a7 100644 --- a/portable/GCC/ARM7_LPC2000/port.c +++ b/portable/GCC/ARM7_LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC2000/portISR.c b/portable/GCC/ARM7_LPC2000/portISR.c index 4b5c8b250..04148ff2d 100644 --- a/portable/GCC/ARM7_LPC2000/portISR.c +++ b/portable/GCC/ARM7_LPC2000/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC2000/portmacro.h b/portable/GCC/ARM7_LPC2000/portmacro.h index 7ee62d1b2..60ecdb31c 100644 --- a/portable/GCC/ARM7_LPC2000/portmacro.h +++ b/portable/GCC/ARM7_LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC23xx/port.c b/portable/GCC/ARM7_LPC23xx/port.c index f93d04a37..4036ee958 100644 --- a/portable/GCC/ARM7_LPC23xx/port.c +++ b/portable/GCC/ARM7_LPC23xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC23xx/portISR.c b/portable/GCC/ARM7_LPC23xx/portISR.c index 99d4803f7..293b15475 100644 --- a/portable/GCC/ARM7_LPC23xx/portISR.c +++ b/portable/GCC/ARM7_LPC23xx/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC23xx/portmacro.h b/portable/GCC/ARM7_LPC23xx/portmacro.h index db8331f2d..cf56e23b6 100644 --- a/portable/GCC/ARM7_LPC23xx/portmacro.h +++ b/portable/GCC/ARM7_LPC23xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA53_64_BIT/port.c b/portable/GCC/ARM_CA53_64_BIT/port.c index 63ea94c4c..3e673190e 100644 --- a/portable/GCC/ARM_CA53_64_BIT/port.c +++ b/portable/GCC/ARM_CA53_64_BIT/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA53_64_BIT/portASM.S b/portable/GCC/ARM_CA53_64_BIT/portASM.S index 80cb574f0..dec4cfe4e 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portASM.S +++ b/portable/GCC/ARM_CA53_64_BIT/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA53_64_BIT/portmacro.h b/portable/GCC/ARM_CA53_64_BIT/portmacro.h index 8215504cb..6df470490 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portmacro.h +++ b/portable/GCC/ARM_CA53_64_BIT/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA9/port.c b/portable/GCC/ARM_CA9/port.c index 3b62283ca..e02eacf4f 100644 --- a/portable/GCC/ARM_CA9/port.c +++ b/portable/GCC/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA9/portASM.S b/portable/GCC/ARM_CA9/portASM.S index d3aff1e35..c719257f5 100644 --- a/portable/GCC/ARM_CA9/portASM.S +++ b/portable/GCC/ARM_CA9/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA9/portmacro.h b/portable/GCC/ARM_CA9/portmacro.h index 3da0b91d4..540f7dfc5 100644 --- a/portable/GCC/ARM_CA9/portmacro.h +++ b/portable/GCC/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM0/port.c b/portable/GCC/ARM_CM0/port.c index bad10db40..6b96336b7 100644 --- a/portable/GCC/ARM_CM0/port.c +++ b/portable/GCC/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM0/portmacro.h b/portable/GCC/ARM_CM0/portmacro.h index 29806b6d7..b6c69dbe8 100644 --- a/portable/GCC/ARM_CM0/portmacro.h +++ b/portable/GCC/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index 447aa67d2..c9f28ce2b 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index b0c8a6f61..131abe1e6 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.h b/portable/GCC/ARM_CM23/non_secure/portasm.h index b01f17124..165c9d3ea 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/portmacro.h b/portable/GCC/ARM_CM23/non_secure/portmacro.h index 61cd152f7..eb4b3dd38 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c index 759ea3690..bd73c5795 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/portable/GCC/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_context.h b/portable/GCC/ARM_CM23/secure/secure_context.h index b586f9710..1069db151 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.h +++ b/portable/GCC/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_context_port.c b/portable/GCC/ARM_CM23/secure/secure_context_port.c index 9dc324c9c..28220ba58 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM23/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.c b/portable/GCC/ARM_CM23/secure/secure_heap.c index 28494b7c4..bfb88c971 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.c +++ b/portable/GCC/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.h b/portable/GCC/ARM_CM23/secure/secure_heap.h index 253e8b9f2..a89e5b334 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.h +++ b/portable/GCC/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_init.c b/portable/GCC/ARM_CM23/secure/secure_init.c index 4e6018d0f..d78346391 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.c +++ b/portable/GCC/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_init.h b/portable/GCC/ARM_CM23/secure/secure_init.h index 39deb36ae..9d021f741 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.h +++ b/portable/GCC/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_port_macros.h b/portable/GCC/ARM_CM23/secure/secure_port_macros.h index 5ed052433..7faf15190 100644 --- a/portable/GCC/ARM_CM23/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index dfc895417..f83648d19 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index ef8f3e443..c1f1e38f5 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h index b01f17124..165c9d3ea 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h index 61cd152f7..eb4b3dd38 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3/port.c b/portable/GCC/ARM_CM3/port.c index c8c3c5f4b..d4735dc4c 100644 --- a/portable/GCC/ARM_CM3/port.c +++ b/portable/GCC/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3/portmacro.h b/portable/GCC/ARM_CM3/portmacro.h index 3140278fb..40d04155c 100644 --- a/portable/GCC/ARM_CM3/portmacro.h +++ b/portable/GCC/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index dfc895417..f83648d19 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.c b/portable/GCC/ARM_CM33/non_secure/portasm.c index 8848dd786..110f5f920 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.h b/portable/GCC/ARM_CM33/non_secure/portasm.h index b01f17124..165c9d3ea 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/portmacro.h b/portable/GCC/ARM_CM33/non_secure/portmacro.h index 8e3b0b3cd..fc24117c8 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c index 759ea3690..bd73c5795 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/portable/GCC/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_context.h b/portable/GCC/ARM_CM33/secure/secure_context.h index b586f9710..1069db151 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.h +++ b/portable/GCC/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_context_port.c b/portable/GCC/ARM_CM33/secure/secure_context_port.c index 3e3858911..6c7ec746f 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM33/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.c b/portable/GCC/ARM_CM33/secure/secure_heap.c index 28494b7c4..bfb88c971 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.c +++ b/portable/GCC/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.h b/portable/GCC/ARM_CM33/secure/secure_heap.h index 253e8b9f2..a89e5b334 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.h +++ b/portable/GCC/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_init.c b/portable/GCC/ARM_CM33/secure/secure_init.c index 4e6018d0f..d78346391 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.c +++ b/portable/GCC/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_init.h b/portable/GCC/ARM_CM33/secure/secure_init.h index 39deb36ae..9d021f741 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.h +++ b/portable/GCC/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_port_macros.h b/portable/GCC/ARM_CM33/secure/secure_port_macros.h index 5ed052433..7faf15190 100644 --- a/portable/GCC/ARM_CM33/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index 447aa67d2..c9f28ce2b 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c index 98927a7e7..3f67b9e23 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h index b01f17124..165c9d3ea 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h index 8e3b0b3cd..fc24117c8 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index a1f70dd34..e66a7c323 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h index 865a9cb8a..e0024bd27 100644 --- a/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4F/port.c b/portable/GCC/ARM_CM4F/port.c index 9f7fb08d1..a44c06e87 100644 --- a/portable/GCC/ARM_CM4F/port.c +++ b/portable/GCC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4F/portmacro.h b/portable/GCC/ARM_CM4F/portmacro.h index 46e467709..9b1723703 100644 --- a/portable/GCC/ARM_CM4F/portmacro.h +++ b/portable/GCC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index 8ca0ab58d..a1d8809b5 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h index a070356f5..b2e3ea04b 100644 --- a/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM7/r0p1/port.c b/portable/GCC/ARM_CM7/r0p1/port.c index e30e07670..93df85f4b 100644 --- a/portable/GCC/ARM_CM7/r0p1/port.c +++ b/portable/GCC/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM7/r0p1/portmacro.h b/portable/GCC/ARM_CM7/r0p1/portmacro.h index 4aae2be6c..459092060 100644 --- a/portable/GCC/ARM_CM7/r0p1/portmacro.h +++ b/portable/GCC/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CR5/port.c b/portable/GCC/ARM_CR5/port.c index de80c2ed9..6bd9eb2dd 100644 --- a/portable/GCC/ARM_CR5/port.c +++ b/portable/GCC/ARM_CR5/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CR5/portASM.S b/portable/GCC/ARM_CR5/portASM.S index 4925911dc..5f5ceb89d 100644 --- a/portable/GCC/ARM_CR5/portASM.S +++ b/portable/GCC/ARM_CR5/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CR5/portmacro.h b/portable/GCC/ARM_CR5/portmacro.h index 200fcc0e9..b3f127a9d 100644 --- a/portable/GCC/ARM_CR5/portmacro.h +++ b/portable/GCC/ARM_CR5/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CRx_No_GIC/port.c b/portable/GCC/ARM_CRx_No_GIC/port.c index 6f1872327..1ad3e0278 100644 --- a/portable/GCC/ARM_CRx_No_GIC/port.c +++ b/portable/GCC/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CRx_No_GIC/portASM.S b/portable/GCC/ARM_CRx_No_GIC/portASM.S index 415f8d9bf..08630ef05 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portASM.S +++ b/portable/GCC/ARM_CRx_No_GIC/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CRx_No_GIC/portmacro.h b/portable/GCC/ARM_CRx_No_GIC/portmacro.h index 51c5c9508..a2ecdf02b 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portmacro.h +++ b/portable/GCC/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ATMega323/port.c b/portable/GCC/ATMega323/port.c index e423ab6aa..15121da24 100644 --- a/portable/GCC/ATMega323/port.c +++ b/portable/GCC/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ATMega323/portmacro.h b/portable/GCC/ATMega323/portmacro.h index 482fc8ea6..b517fdbe7 100644 --- a/portable/GCC/ATMega323/portmacro.h +++ b/portable/GCC/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR32_UC3/port.c b/portable/GCC/AVR32_UC3/port.c index 0603c916d..fe4250bef 100644 --- a/portable/GCC/AVR32_UC3/port.c +++ b/portable/GCC/AVR32_UC3/port.c @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR32_UC3/portmacro.h b/portable/GCC/AVR32_UC3/portmacro.h index ad26b87e6..6b7d43e5e 100644 --- a/portable/GCC/AVR32_UC3/portmacro.h +++ b/portable/GCC/AVR32_UC3/portmacro.h @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_AVRDx/port.c b/portable/GCC/AVR_AVRDx/port.c index 8bf9474d6..70e8a85b0 100644 --- a/portable/GCC/AVR_AVRDx/port.c +++ b/portable/GCC/AVR_AVRDx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_AVRDx/portmacro.h b/portable/GCC/AVR_AVRDx/portmacro.h index 93fa73c4c..7312081d6 100644 --- a/portable/GCC/AVR_AVRDx/portmacro.h +++ b/portable/GCC/AVR_AVRDx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_Mega0/port.c b/portable/GCC/AVR_Mega0/port.c index 2d80384a5..3068028e8 100644 --- a/portable/GCC/AVR_Mega0/port.c +++ b/portable/GCC/AVR_Mega0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_Mega0/portmacro.h b/portable/GCC/AVR_Mega0/portmacro.h index 1181d7184..0155cc9f6 100644 --- a/portable/GCC/AVR_Mega0/portmacro.h +++ b/portable/GCC/AVR_Mega0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/CORTUS_APS3/port.c b/portable/GCC/CORTUS_APS3/port.c index 04ff76410..467e093d6 100644 --- a/portable/GCC/CORTUS_APS3/port.c +++ b/portable/GCC/CORTUS_APS3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/CORTUS_APS3/portmacro.h b/portable/GCC/CORTUS_APS3/portmacro.h index f0ac6b03c..58af4e7c0 100644 --- a/portable/GCC/CORTUS_APS3/portmacro.h +++ b/portable/GCC/CORTUS_APS3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ColdFire_V2/port.c b/portable/GCC/ColdFire_V2/port.c index 5c513eea9..abfef1eff 100644 --- a/portable/GCC/ColdFire_V2/port.c +++ b/portable/GCC/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ColdFire_V2/portasm.S b/portable/GCC/ColdFire_V2/portasm.S index e929c62a6..986006866 100644 --- a/portable/GCC/ColdFire_V2/portasm.S +++ b/portable/GCC/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ColdFire_V2/portmacro.h b/portable/GCC/ColdFire_V2/portmacro.h index 69f9b4de8..fc687b2ec 100644 --- a/portable/GCC/ColdFire_V2/portmacro.h +++ b/portable/GCC/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/H8S2329/port.c b/portable/GCC/H8S2329/port.c index f357a6403..2ae90227e 100644 --- a/portable/GCC/H8S2329/port.c +++ b/portable/GCC/H8S2329/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/H8S2329/portmacro.h b/portable/GCC/H8S2329/portmacro.h index 27159c2ae..811b273a0 100644 --- a/portable/GCC/H8S2329/portmacro.h +++ b/portable/GCC/H8S2329/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/HCS12/port.c b/portable/GCC/HCS12/port.c index 78b541a88..a45120f79 100644 --- a/portable/GCC/HCS12/port.c +++ b/portable/GCC/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/HCS12/portmacro.h b/portable/GCC/HCS12/portmacro.h index bbfe2da65..fa6f44839 100644 --- a/portable/GCC/HCS12/portmacro.h +++ b/portable/GCC/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/ISR_Support.h b/portable/GCC/IA32_flat/ISR_Support.h index df07dace0..bdeef7706 100644 --- a/portable/GCC/IA32_flat/ISR_Support.h +++ b/portable/GCC/IA32_flat/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/port.c b/portable/GCC/IA32_flat/port.c index d9f501370..b66ab05f5 100644 --- a/portable/GCC/IA32_flat/port.c +++ b/portable/GCC/IA32_flat/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/portASM.S b/portable/GCC/IA32_flat/portASM.S index af682cd07..04ef067d0 100644 --- a/portable/GCC/IA32_flat/portASM.S +++ b/portable/GCC/IA32_flat/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/portmacro.h b/portable/GCC/IA32_flat/portmacro.h index 5420d652a..5a7f6427d 100644 --- a/portable/GCC/IA32_flat/portmacro.h +++ b/portable/GCC/IA32_flat/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MSP430F449/port.c b/portable/GCC/MSP430F449/port.c index 1d2e23f07..f69d04786 100644 --- a/portable/GCC/MSP430F449/port.c +++ b/portable/GCC/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MSP430F449/portmacro.h b/portable/GCC/MSP430F449/portmacro.h index e2c0f7ebb..183d2990d 100644 --- a/portable/GCC/MSP430F449/portmacro.h +++ b/portable/GCC/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlaze/port.c b/portable/GCC/MicroBlaze/port.c index 41bd5b811..152d2526b 100644 --- a/portable/GCC/MicroBlaze/port.c +++ b/portable/GCC/MicroBlaze/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlaze/portasm.s b/portable/GCC/MicroBlaze/portasm.s index ddb525e95..9a1e59dd7 100644 --- a/portable/GCC/MicroBlaze/portasm.s +++ b/portable/GCC/MicroBlaze/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlaze/portmacro.h b/portable/GCC/MicroBlaze/portmacro.h index 0c1f0bd8a..56e65094b 100644 --- a/portable/GCC/MicroBlaze/portmacro.h +++ b/portable/GCC/MicroBlaze/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/port.c b/portable/GCC/MicroBlazeV8/port.c index 03ff93c6c..79e1dc0d4 100644 --- a/portable/GCC/MicroBlazeV8/port.c +++ b/portable/GCC/MicroBlazeV8/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/port_exceptions.c b/portable/GCC/MicroBlazeV8/port_exceptions.c index 47a639d82..6aac71c80 100644 --- a/portable/GCC/MicroBlazeV8/port_exceptions.c +++ b/portable/GCC/MicroBlazeV8/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/portasm.S b/portable/GCC/MicroBlazeV8/portasm.S index 924370323..12fab3fbf 100644 --- a/portable/GCC/MicroBlazeV8/portasm.S +++ b/portable/GCC/MicroBlazeV8/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/portmacro.h b/portable/GCC/MicroBlazeV8/portmacro.h index 298576131..a4f8c423a 100644 --- a/portable/GCC/MicroBlazeV8/portmacro.h +++ b/portable/GCC/MicroBlazeV8/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/port.c b/portable/GCC/MicroBlazeV9/port.c index 8035415be..752a4d23c 100644 --- a/portable/GCC/MicroBlazeV9/port.c +++ b/portable/GCC/MicroBlazeV9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/port_exceptions.c b/portable/GCC/MicroBlazeV9/port_exceptions.c index 47a639d82..6aac71c80 100644 --- a/portable/GCC/MicroBlazeV9/port_exceptions.c +++ b/portable/GCC/MicroBlazeV9/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/portasm.S b/portable/GCC/MicroBlazeV9/portasm.S index 924370323..12fab3fbf 100644 --- a/portable/GCC/MicroBlazeV9/portasm.S +++ b/portable/GCC/MicroBlazeV9/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/portmacro.h b/portable/GCC/MicroBlazeV9/portmacro.h index 298576131..a4f8c423a 100644 --- a/portable/GCC/MicroBlazeV9/portmacro.h +++ b/portable/GCC/MicroBlazeV9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/NiosII/port.c b/portable/GCC/NiosII/port.c index 1d2da1efd..652b9b74c 100644 --- a/portable/GCC/NiosII/port.c +++ b/portable/GCC/NiosII/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/NiosII/port_asm.S b/portable/GCC/NiosII/port_asm.S index e04aac19f..f5695dffd 100644 --- a/portable/GCC/NiosII/port_asm.S +++ b/portable/GCC/NiosII/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/NiosII/portmacro.h b/portable/GCC/NiosII/portmacro.h index 5d47cf8df..2ede9a3a8 100644 --- a/portable/GCC/NiosII/portmacro.h +++ b/portable/GCC/NiosII/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/FPU_Macros.h b/portable/GCC/PPC405_Xilinx/FPU_Macros.h index dfd1e4921..d92e0a832 100644 --- a/portable/GCC/PPC405_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC405_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/port.c b/portable/GCC/PPC405_Xilinx/port.c index f0f9b2aee..fd58b7f5e 100644 --- a/portable/GCC/PPC405_Xilinx/port.c +++ b/portable/GCC/PPC405_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/portasm.S b/portable/GCC/PPC405_Xilinx/portasm.S index 409964ff3..d4849cd75 100644 --- a/portable/GCC/PPC405_Xilinx/portasm.S +++ b/portable/GCC/PPC405_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/portmacro.h b/portable/GCC/PPC405_Xilinx/portmacro.h index 6d1eb6e1c..60ad4903e 100644 --- a/portable/GCC/PPC405_Xilinx/portmacro.h +++ b/portable/GCC/PPC405_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/FPU_Macros.h b/portable/GCC/PPC440_Xilinx/FPU_Macros.h index dfd1e4921..d92e0a832 100644 --- a/portable/GCC/PPC440_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC440_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/port.c b/portable/GCC/PPC440_Xilinx/port.c index ebaa68e8d..2358b6d05 100644 --- a/portable/GCC/PPC440_Xilinx/port.c +++ b/portable/GCC/PPC440_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/portasm.S b/portable/GCC/PPC440_Xilinx/portasm.S index 409964ff3..d4849cd75 100644 --- a/portable/GCC/PPC440_Xilinx/portasm.S +++ b/portable/GCC/PPC440_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/portmacro.h b/portable/GCC/PPC440_Xilinx/portmacro.h index 6d1eb6e1c..60ad4903e 100644 --- a/portable/GCC/PPC440_Xilinx/portmacro.h +++ b/portable/GCC/PPC440_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h index bbf4bf1da..ff60e0763 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index bd1ba2103..6bdd172bd 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/port.c b/portable/GCC/RISC-V/port.c index 8a8970c3a..543d7b36f 100644 --- a/portable/GCC/RISC-V/port.c +++ b/portable/GCC/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/portASM.S b/portable/GCC/RISC-V/portASM.S index 8b6868460..b5e93e180 100644 --- a/portable/GCC/RISC-V/portASM.S +++ b/portable/GCC/RISC-V/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/portmacro.h b/portable/GCC/RISC-V/portmacro.h index 803c16c0c..f2646d975 100644 --- a/portable/GCC/RISC-V/portmacro.h +++ b/portable/GCC/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/isr_support.h b/portable/GCC/RL78/isr_support.h index 37a8f3e44..c8fa808d0 100644 --- a/portable/GCC/RL78/isr_support.h +++ b/portable/GCC/RL78/isr_support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/port.c b/portable/GCC/RL78/port.c index 6fc711cb5..b156db15f 100644 --- a/portable/GCC/RL78/port.c +++ b/portable/GCC/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/portasm.S b/portable/GCC/RL78/portasm.S index 3242f6f4d..39fb17258 100644 --- a/portable/GCC/RL78/portasm.S +++ b/portable/GCC/RL78/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/portmacro.h b/portable/GCC/RL78/portmacro.h index 6d16f358c..337914780 100644 --- a/portable/GCC/RL78/portmacro.h +++ b/portable/GCC/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX100/port.c b/portable/GCC/RX100/port.c index d5199d961..1232adfbf 100644 --- a/portable/GCC/RX100/port.c +++ b/portable/GCC/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX100/portmacro.h b/portable/GCC/RX100/portmacro.h index bd85457b9..3cdc4b72d 100644 --- a/portable/GCC/RX100/portmacro.h +++ b/portable/GCC/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX200/port.c b/portable/GCC/RX200/port.c index 905a82b73..3f4493bc9 100644 --- a/portable/GCC/RX200/port.c +++ b/portable/GCC/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX200/portmacro.h b/portable/GCC/RX200/portmacro.h index 03cf6cbc0..b185efd67 100644 --- a/portable/GCC/RX200/portmacro.h +++ b/portable/GCC/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600/port.c b/portable/GCC/RX600/port.c index fe01a5a4d..097299557 100644 --- a/portable/GCC/RX600/port.c +++ b/portable/GCC/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600/portmacro.h b/portable/GCC/RX600/portmacro.h index c21caedb8..dd75166ea 100644 --- a/portable/GCC/RX600/portmacro.h +++ b/portable/GCC/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600v2/port.c b/portable/GCC/RX600v2/port.c index d7bb4ed25..b5540cb29 100644 --- a/portable/GCC/RX600v2/port.c +++ b/portable/GCC/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600v2/portmacro.h b/portable/GCC/RX600v2/portmacro.h index c21caedb8..dd75166ea 100644 --- a/portable/GCC/RX600v2/portmacro.h +++ b/portable/GCC/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX700v3_DPFPU/port.c b/portable/GCC/RX700v3_DPFPU/port.c index 1a77b58b8..c4fac1166 100644 --- a/portable/GCC/RX700v3_DPFPU/port.c +++ b/portable/GCC/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX700v3_DPFPU/portmacro.h b/portable/GCC/RX700v3_DPFPU/portmacro.h index c8191ea3c..57b28376a 100644 --- a/portable/GCC/RX700v3_DPFPU/portmacro.h +++ b/portable/GCC/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/STR75x/port.c b/portable/GCC/STR75x/port.c index 059417245..499761396 100644 --- a/portable/GCC/STR75x/port.c +++ b/portable/GCC/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/STR75x/portISR.c b/portable/GCC/STR75x/portISR.c index f2a6f0283..409e48bdd 100644 --- a/portable/GCC/STR75x/portISR.c +++ b/portable/GCC/STR75x/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/STR75x/portmacro.h b/portable/GCC/STR75x/portmacro.h index 825620f90..55b5b6c1b 100644 --- a/portable/GCC/STR75x/portmacro.h +++ b/portable/GCC/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/TriCore_1782/port.c b/portable/GCC/TriCore_1782/port.c index 3d8c32d3e..01674c638 100644 --- a/portable/GCC/TriCore_1782/port.c +++ b/portable/GCC/TriCore_1782/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/TriCore_1782/portmacro.h b/portable/GCC/TriCore_1782/portmacro.h index 521d78836..fb55f4860 100644 --- a/portable/GCC/TriCore_1782/portmacro.h +++ b/portable/GCC/TriCore_1782/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/TriCore_1782/porttrap.c b/portable/GCC/TriCore_1782/porttrap.c index a53e95f7b..630db20e3 100644 --- a/portable/GCC/TriCore_1782/porttrap.c +++ b/portable/GCC/TriCore_1782/porttrap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/ISR_Support.h b/portable/IAR/78K0R/ISR_Support.h index 9e39621e4..886d19b4a 100644 --- a/portable/IAR/78K0R/ISR_Support.h +++ b/portable/IAR/78K0R/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/port.c b/portable/IAR/78K0R/port.c index fea8b7926..a7c1d29e6 100644 --- a/portable/IAR/78K0R/port.c +++ b/portable/IAR/78K0R/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/portasm.s26 b/portable/IAR/78K0R/portasm.s26 index 408f18bfa..8993aa3a5 100644 --- a/portable/IAR/78K0R/portasm.s26 +++ b/portable/IAR/78K0R/portasm.s26 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/portmacro.h b/portable/IAR/78K0R/portmacro.h index 116261186..1d22ea562 100644 --- a/portable/IAR/78K0R/portmacro.h +++ b/portable/IAR/78K0R/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/port.c b/portable/IAR/ARM_CA5_No_GIC/port.c index 47f88af28..b5ea7ecd5 100644 --- a/portable/IAR/ARM_CA5_No_GIC/port.c +++ b/portable/IAR/ARM_CA5_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.h b/portable/IAR/ARM_CA5_No_GIC/portASM.h index 6a7709c42..81125aa3f 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.h +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.s b/portable/IAR/ARM_CA5_No_GIC/portASM.s index 115b705fb..0d51d563f 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.s +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/portmacro.h b/portable/IAR/ARM_CA5_No_GIC/portmacro.h index 66fb73015..3aadcb7b4 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CA5_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/port.c b/portable/IAR/ARM_CA9/port.c index eb396a29a..c28271aab 100644 --- a/portable/IAR/ARM_CA9/port.c +++ b/portable/IAR/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/portASM.h b/portable/IAR/ARM_CA9/portASM.h index 4170c2efa..d98af6ae0 100644 --- a/portable/IAR/ARM_CA9/portASM.h +++ b/portable/IAR/ARM_CA9/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/portASM.s b/portable/IAR/ARM_CA9/portASM.s index 0186eb490..5dbeaca33 100644 --- a/portable/IAR/ARM_CA9/portASM.s +++ b/portable/IAR/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/portmacro.h b/portable/IAR/ARM_CA9/portmacro.h index dd78c1a46..03faf575a 100644 --- a/portable/IAR/ARM_CA9/portmacro.h +++ b/portable/IAR/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM0/port.c b/portable/IAR/ARM_CM0/port.c index 39d745144..85dcb44c4 100644 --- a/portable/IAR/ARM_CM0/port.c +++ b/portable/IAR/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM0/portasm.s b/portable/IAR/ARM_CM0/portasm.s index f1fdc17ff..862b29d4d 100644 --- a/portable/IAR/ARM_CM0/portasm.s +++ b/portable/IAR/ARM_CM0/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM0/portmacro.h b/portable/IAR/ARM_CM0/portmacro.h index 5c5cab78e..33ef0b861 100644 --- a/portable/IAR/ARM_CM0/portmacro.h +++ b/portable/IAR/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index 447aa67d2..c9f28ce2b 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.h b/portable/IAR/ARM_CM23/non_secure/portasm.h index b01f17124..165c9d3ea 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.s b/portable/IAR/ARM_CM23/non_secure/portasm.s index d3a25cd0d..cc6eee075 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/portmacro.h b/portable/IAR/ARM_CM23/non_secure/portmacro.h index b36dc1f9c..899098358 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c index 759ea3690..bd73c5795 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/portable/IAR/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_context.h b/portable/IAR/ARM_CM23/secure/secure_context.h index b586f9710..1069db151 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.h +++ b/portable/IAR/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s index c0f8062bc..eb8fbcd5c 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.c b/portable/IAR/ARM_CM23/secure/secure_heap.c index 28494b7c4..bfb88c971 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.c +++ b/portable/IAR/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.h b/portable/IAR/ARM_CM23/secure/secure_heap.h index 253e8b9f2..a89e5b334 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.h +++ b/portable/IAR/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_init.c b/portable/IAR/ARM_CM23/secure/secure_init.c index 4e6018d0f..d78346391 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.c +++ b/portable/IAR/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_init.h b/portable/IAR/ARM_CM23/secure/secure_init.h index 39deb36ae..9d021f741 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.h +++ b/portable/IAR/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_port_macros.h b/portable/IAR/ARM_CM23/secure/secure_port_macros.h index 5ed052433..7faf15190 100644 --- a/portable/IAR/ARM_CM23/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index 447aa67d2..c9f28ce2b 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h index b01f17124..165c9d3ea 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s index 89ff193b7..c068f80f0 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h index 315e7122a..3bffd21ad 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM3/port.c b/portable/IAR/ARM_CM3/port.c index 3066af473..043d7f975 100644 --- a/portable/IAR/ARM_CM3/port.c +++ b/portable/IAR/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM3/portasm.s b/portable/IAR/ARM_CM3/portasm.s index 7c8676ca1..165682d22 100644 --- a/portable/IAR/ARM_CM3/portasm.s +++ b/portable/IAR/ARM_CM3/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM3/portmacro.h b/portable/IAR/ARM_CM3/portmacro.h index 1d390c05f..1e4f35059 100644 --- a/portable/IAR/ARM_CM3/portmacro.h +++ b/portable/IAR/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index 447aa67d2..c9f28ce2b 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.h b/portable/IAR/ARM_CM33/non_secure/portasm.h index b01f17124..165c9d3ea 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.s b/portable/IAR/ARM_CM33/non_secure/portasm.s index 9b5296ad9..9e4205d5e 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/portmacro.h b/portable/IAR/ARM_CM33/non_secure/portmacro.h index e3fa10af0..fd9a9fde4 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c index 759ea3690..bd73c5795 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/portable/IAR/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_context.h b/portable/IAR/ARM_CM33/secure/secure_context.h index b586f9710..1069db151 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.h +++ b/portable/IAR/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s index 8efbb73f8..c92a8af65 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.c b/portable/IAR/ARM_CM33/secure/secure_heap.c index 28494b7c4..bfb88c971 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.c +++ b/portable/IAR/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.h b/portable/IAR/ARM_CM33/secure/secure_heap.h index 253e8b9f2..a89e5b334 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.h +++ b/portable/IAR/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_init.c b/portable/IAR/ARM_CM33/secure/secure_init.c index 4e6018d0f..d78346391 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.c +++ b/portable/IAR/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_init.h b/portable/IAR/ARM_CM33/secure/secure_init.h index 39deb36ae..9d021f741 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.h +++ b/portable/IAR/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_port_macros.h b/portable/IAR/ARM_CM33/secure/secure_port_macros.h index 5ed052433..7faf15190 100644 --- a/portable/IAR/ARM_CM33/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index 447aa67d2..c9f28ce2b 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h index b01f17124..165c9d3ea 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s index b65f0f41c..50efdb301 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h index e3fa10af0..fd9a9fde4 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F/port.c b/portable/IAR/ARM_CM4F/port.c index 3da7fe2fa..ba927b4d8 100644 --- a/portable/IAR/ARM_CM4F/port.c +++ b/portable/IAR/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F/portasm.s b/portable/IAR/ARM_CM4F/portasm.s index 768b62f45..2748874ca 100644 --- a/portable/IAR/ARM_CM4F/portasm.s +++ b/portable/IAR/ARM_CM4F/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F/portmacro.h b/portable/IAR/ARM_CM4F/portmacro.h index 3b44bc896..f10992e45 100644 --- a/portable/IAR/ARM_CM4F/portmacro.h +++ b/portable/IAR/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index 56ff07ce9..6e69acd6f 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F_MPU/portasm.s b/portable/IAR/ARM_CM4F_MPU/portasm.s index e86f5dcdd..ec6c87fdb 100644 --- a/portable/IAR/ARM_CM4F_MPU/portasm.s +++ b/portable/IAR/ARM_CM4F_MPU/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h index d7cadbef3..0483eb8ee 100644 --- a/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM7/r0p1/port.c b/portable/IAR/ARM_CM7/r0p1/port.c index 9dbec7916..4e859c160 100644 --- a/portable/IAR/ARM_CM7/r0p1/port.c +++ b/portable/IAR/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM7/r0p1/portasm.s b/portable/IAR/ARM_CM7/r0p1/portasm.s index 786e0c957..723069334 100644 --- a/portable/IAR/ARM_CM7/r0p1/portasm.s +++ b/portable/IAR/ARM_CM7/r0p1/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM7/r0p1/portmacro.h b/portable/IAR/ARM_CM7/r0p1/portmacro.h index ed864731d..ac13d8043 100644 --- a/portable/IAR/ARM_CM7/r0p1/portmacro.h +++ b/portable/IAR/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CRx_No_GIC/port.c b/portable/IAR/ARM_CRx_No_GIC/port.c index abcc15537..c4585a209 100644 --- a/portable/IAR/ARM_CRx_No_GIC/port.c +++ b/portable/IAR/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CRx_No_GIC/portASM.s b/portable/IAR/ARM_CRx_No_GIC/portASM.s index 3c9f0f8d5..eb6c23eca 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portASM.s +++ b/portable/IAR/ARM_CRx_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CRx_No_GIC/portmacro.h b/portable/IAR/ARM_CRx_No_GIC/portmacro.h index 32f9397d2..d8dc3e5e9 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ATMega323/port.c b/portable/IAR/ATMega323/port.c index d04a2932b..e69a0aaf0 100644 --- a/portable/IAR/ATMega323/port.c +++ b/portable/IAR/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ATMega323/portmacro.h b/portable/IAR/ATMega323/portmacro.h index 97695e2b6..d71d121e4 100644 --- a/portable/IAR/ATMega323/portmacro.h +++ b/portable/IAR/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ATMega323/portmacro.s90 b/portable/IAR/ATMega323/portmacro.s90 index 35f58287e..138ead54f 100644 --- a/portable/IAR/ATMega323/portmacro.s90 +++ b/portable/IAR/ATMega323/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR32_UC3/port.c b/portable/IAR/AVR32_UC3/port.c index c5dab4978..899e00904 100644 --- a/portable/IAR/AVR32_UC3/port.c +++ b/portable/IAR/AVR32_UC3/port.c @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR32_UC3/portmacro.h b/portable/IAR/AVR32_UC3/portmacro.h index 8961f4699..9988115fc 100644 --- a/portable/IAR/AVR32_UC3/portmacro.h +++ b/portable/IAR/AVR32_UC3/portmacro.h @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_AVRDx/port.c b/portable/IAR/AVR_AVRDx/port.c index e72f0ae30..83d1da0a4 100644 --- a/portable/IAR/AVR_AVRDx/port.c +++ b/portable/IAR/AVR_AVRDx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_AVRDx/portmacro.h b/portable/IAR/AVR_AVRDx/portmacro.h index c0bc8039d..bfb82ad19 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.h +++ b/portable/IAR/AVR_AVRDx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_AVRDx/portmacro.s90 b/portable/IAR/AVR_AVRDx/portmacro.s90 index 27400d5d5..a92b4728f 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.s90 +++ b/portable/IAR/AVR_AVRDx/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_Mega0/port.c b/portable/IAR/AVR_Mega0/port.c index 8520d41c2..9c77ee80b 100644 --- a/portable/IAR/AVR_Mega0/port.c +++ b/portable/IAR/AVR_Mega0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_Mega0/portmacro.h b/portable/IAR/AVR_Mega0/portmacro.h index c0bc8039d..bfb82ad19 100644 --- a/portable/IAR/AVR_Mega0/portmacro.h +++ b/portable/IAR/AVR_Mega0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_Mega0/portmacro.s90 b/portable/IAR/AVR_Mega0/portmacro.s90 index 6ffbef072..a575fe5e8 100644 --- a/portable/IAR/AVR_Mega0/portmacro.s90 +++ b/portable/IAR/AVR_Mega0/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/ISR_Support.h b/portable/IAR/AtmelSAM7S64/ISR_Support.h index f16c59224..ad299e84c 100644 --- a/portable/IAR/AtmelSAM7S64/ISR_Support.h +++ b/portable/IAR/AtmelSAM7S64/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/port.c b/portable/IAR/AtmelSAM7S64/port.c index b3dc0c953..4ca9a0ef2 100644 --- a/portable/IAR/AtmelSAM7S64/port.c +++ b/portable/IAR/AtmelSAM7S64/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/portasm.s79 b/portable/IAR/AtmelSAM7S64/portasm.s79 index b2f5a3fec..1af156519 100644 --- a/portable/IAR/AtmelSAM7S64/portasm.s79 +++ b/portable/IAR/AtmelSAM7S64/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/portmacro.h b/portable/IAR/AtmelSAM7S64/portmacro.h index 16bb7072e..6c7d58c60 100644 --- a/portable/IAR/AtmelSAM7S64/portmacro.h +++ b/portable/IAR/AtmelSAM7S64/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM9XE/port.c b/portable/IAR/AtmelSAM9XE/port.c index 8e65038d2..6ecaa2ece 100644 --- a/portable/IAR/AtmelSAM9XE/port.c +++ b/portable/IAR/AtmelSAM9XE/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM9XE/portmacro.h b/portable/IAR/AtmelSAM9XE/portmacro.h index e9d62cd4e..140a14fba 100644 --- a/portable/IAR/AtmelSAM9XE/portmacro.h +++ b/portable/IAR/AtmelSAM9XE/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/ISR_Support.h b/portable/IAR/LPC2000/ISR_Support.h index f16c59224..ad299e84c 100644 --- a/portable/IAR/LPC2000/ISR_Support.h +++ b/portable/IAR/LPC2000/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/port.c b/portable/IAR/LPC2000/port.c index 0be2c0b9e..8ff5a91c6 100644 --- a/portable/IAR/LPC2000/port.c +++ b/portable/IAR/LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/portasm.s79 b/portable/IAR/LPC2000/portasm.s79 index f25a57c68..e20559f38 100644 --- a/portable/IAR/LPC2000/portasm.s79 +++ b/portable/IAR/LPC2000/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/portmacro.h b/portable/IAR/LPC2000/portmacro.h index d38690384..2cff7d1e7 100644 --- a/portable/IAR/LPC2000/portmacro.h +++ b/portable/IAR/LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/port.c b/portable/IAR/MSP430/port.c index 3c8cfc3b9..ecae1d14a 100644 --- a/portable/IAR/MSP430/port.c +++ b/portable/IAR/MSP430/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/portasm.h b/portable/IAR/MSP430/portasm.h index 4e726d3f9..40de1368d 100644 --- a/portable/IAR/MSP430/portasm.h +++ b/portable/IAR/MSP430/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/portext.s43 b/portable/IAR/MSP430/portext.s43 index ee747f3c3..0c1ab7d5a 100644 --- a/portable/IAR/MSP430/portext.s43 +++ b/portable/IAR/MSP430/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/portmacro.h b/portable/IAR/MSP430/portmacro.h index f68d271aa..716f942c3 100644 --- a/portable/IAR/MSP430/portmacro.h +++ b/portable/IAR/MSP430/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/data_model.h b/portable/IAR/MSP430X/data_model.h index 89d871d7c..b47219f4f 100644 --- a/portable/IAR/MSP430X/data_model.h +++ b/portable/IAR/MSP430X/data_model.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/port.c b/portable/IAR/MSP430X/port.c index a6feab8d7..6be3815b5 100644 --- a/portable/IAR/MSP430X/port.c +++ b/portable/IAR/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/portext.s43 b/portable/IAR/MSP430X/portext.s43 index a1eede9f1..96b59d947 100644 --- a/portable/IAR/MSP430X/portext.s43 +++ b/portable/IAR/MSP430X/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/portmacro.h b/portable/IAR/MSP430X/portmacro.h index 30bfeef39..c97473962 100644 --- a/portable/IAR/MSP430X/portmacro.h +++ b/portable/IAR/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 37edd6a7c..527880695 100644 --- a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/port.c b/portable/IAR/RISC-V/port.c index e4123df2a..f88554aaf 100644 --- a/portable/IAR/RISC-V/port.c +++ b/portable/IAR/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/portASM.s b/portable/IAR/RISC-V/portASM.s index b2beaaeec..63443a432 100644 --- a/portable/IAR/RISC-V/portASM.s +++ b/portable/IAR/RISC-V/portASM.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/portmacro.h b/portable/IAR/RISC-V/portmacro.h index 6899fec62..ab8779b41 100644 --- a/portable/IAR/RISC-V/portmacro.h +++ b/portable/IAR/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/ISR_Support.h b/portable/IAR/RL78/ISR_Support.h index 3ca3b85a9..d65fb2462 100644 --- a/portable/IAR/RL78/ISR_Support.h +++ b/portable/IAR/RL78/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/port.c b/portable/IAR/RL78/port.c index 024721387..c6121107d 100644 --- a/portable/IAR/RL78/port.c +++ b/portable/IAR/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/portasm.s87 b/portable/IAR/RL78/portasm.s87 index 4f23f4576..1a5bdb533 100644 --- a/portable/IAR/RL78/portasm.s87 +++ b/portable/IAR/RL78/portasm.s87 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/portmacro.h b/portable/IAR/RL78/portmacro.h index e2d18893e..202a158fb 100644 --- a/portable/IAR/RL78/portmacro.h +++ b/portable/IAR/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX100/port.c b/portable/IAR/RX100/port.c index 6677dd6fe..9e91c709c 100644 --- a/portable/IAR/RX100/port.c +++ b/portable/IAR/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX100/port_asm.s b/portable/IAR/RX100/port_asm.s index dcf184dab..6ba3b2d2f 100644 --- a/portable/IAR/RX100/port_asm.s +++ b/portable/IAR/RX100/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX100/portmacro.h b/portable/IAR/RX100/portmacro.h index b3f95714f..afc8dcf24 100644 --- a/portable/IAR/RX100/portmacro.h +++ b/portable/IAR/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX600/port.c b/portable/IAR/RX600/port.c index 29af0f4e2..88f3d7057 100644 --- a/portable/IAR/RX600/port.c +++ b/portable/IAR/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX600/port_asm.s b/portable/IAR/RX600/port_asm.s index f0b7690b3..66b7637a0 100644 --- a/portable/IAR/RX600/port_asm.s +++ b/portable/IAR/RX600/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX600/portmacro.h b/portable/IAR/RX600/portmacro.h index e6a762e10..df46baf28 100644 --- a/portable/IAR/RX600/portmacro.h +++ b/portable/IAR/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX700v3_DPFPU/port.c b/portable/IAR/RX700v3_DPFPU/port.c index 83a5f405c..500f2a057 100644 --- a/portable/IAR/RX700v3_DPFPU/port.c +++ b/portable/IAR/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX700v3_DPFPU/portmacro.h b/portable/IAR/RX700v3_DPFPU/portmacro.h index df458778e..a214817d4 100644 --- a/portable/IAR/RX700v3_DPFPU/portmacro.h +++ b/portable/IAR/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RXv2/port.c b/portable/IAR/RXv2/port.c index fd81f5dce..fb9d9d00b 100644 --- a/portable/IAR/RXv2/port.c +++ b/portable/IAR/RXv2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RXv2/port_asm.s b/portable/IAR/RXv2/port_asm.s index 5313755e0..2981068f0 100644 --- a/portable/IAR/RXv2/port_asm.s +++ b/portable/IAR/RXv2/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RXv2/portmacro.h b/portable/IAR/RXv2/portmacro.h index 6a0602a39..952e759f7 100644 --- a/portable/IAR/RXv2/portmacro.h +++ b/portable/IAR/RXv2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/ISR_Support.h b/portable/IAR/STR71x/ISR_Support.h index f16c59224..ad299e84c 100644 --- a/portable/IAR/STR71x/ISR_Support.h +++ b/portable/IAR/STR71x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/port.c b/portable/IAR/STR71x/port.c index 88a1a218d..53530c890 100644 --- a/portable/IAR/STR71x/port.c +++ b/portable/IAR/STR71x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/portasm.s79 b/portable/IAR/STR71x/portasm.s79 index 943b814ac..4fa7e3fb4 100644 --- a/portable/IAR/STR71x/portasm.s79 +++ b/portable/IAR/STR71x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/portmacro.h b/portable/IAR/STR71x/portmacro.h index 5e75a1d34..98a6363ed 100644 --- a/portable/IAR/STR71x/portmacro.h +++ b/portable/IAR/STR71x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/ISR_Support.h b/portable/IAR/STR75x/ISR_Support.h index f16c59224..ad299e84c 100644 --- a/portable/IAR/STR75x/ISR_Support.h +++ b/portable/IAR/STR75x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/port.c b/portable/IAR/STR75x/port.c index 49871fe5b..e89318fdb 100644 --- a/portable/IAR/STR75x/port.c +++ b/portable/IAR/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/portasm.s79 b/portable/IAR/STR75x/portasm.s79 index df40a700d..92a2a54e5 100644 --- a/portable/IAR/STR75x/portasm.s79 +++ b/portable/IAR/STR75x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/portmacro.h b/portable/IAR/STR75x/portmacro.h index 89652b1c7..335852cee 100644 --- a/portable/IAR/STR75x/portmacro.h +++ b/portable/IAR/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/ISR_Support.h b/portable/IAR/STR91x/ISR_Support.h index a4f3544ce..631aa6e57 100644 --- a/portable/IAR/STR91x/ISR_Support.h +++ b/portable/IAR/STR91x/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/port.c b/portable/IAR/STR91x/port.c index 59cd0a7c0..677f5a8a2 100644 --- a/portable/IAR/STR91x/port.c +++ b/portable/IAR/STR91x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/portasm.s79 b/portable/IAR/STR91x/portasm.s79 index 146d8d7cf..02f99ff0b 100644 --- a/portable/IAR/STR91x/portasm.s79 +++ b/portable/IAR/STR91x/portasm.s79 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/portmacro.h b/portable/IAR/STR91x/portmacro.h index 494093404..5ae486f1c 100644 --- a/portable/IAR/STR91x/portmacro.h +++ b/portable/IAR/STR91x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/ISR_Support.h b/portable/IAR/V850ES/ISR_Support.h index f1f97eecc..93c844462 100644 --- a/portable/IAR/V850ES/ISR_Support.h +++ b/portable/IAR/V850ES/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/port.c b/portable/IAR/V850ES/port.c index 2172f542f..7c8b0011e 100644 --- a/portable/IAR/V850ES/port.c +++ b/portable/IAR/V850ES/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portasm.s85 b/portable/IAR/V850ES/portasm.s85 index aca09debf..ddb510de6 100644 --- a/portable/IAR/V850ES/portasm.s85 +++ b/portable/IAR/V850ES/portasm.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portasm_Fx3.s85 b/portable/IAR/V850ES/portasm_Fx3.s85 index f8cd6f2ac..bb0b44e55 100644 --- a/portable/IAR/V850ES/portasm_Fx3.s85 +++ b/portable/IAR/V850ES/portasm_Fx3.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portasm_Hx2.s85 b/portable/IAR/V850ES/portasm_Hx2.s85 index cc831bbb8..76d95b072 100644 --- a/portable/IAR/V850ES/portasm_Hx2.s85 +++ b/portable/IAR/V850ES/portasm_Hx2.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portmacro.h b/portable/IAR/V850ES/portmacro.h index 8f808c6df..998d4e4b1 100644 --- a/portable/IAR/V850ES/portmacro.h +++ b/portable/IAR/V850ES/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC18F/port.c b/portable/MPLAB/PIC18F/port.c index b25500713..5397785b0 100644 --- a/portable/MPLAB/PIC18F/port.c +++ b/portable/MPLAB/PIC18F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC18F/portmacro.h b/portable/MPLAB/PIC18F/portmacro.h index e19473617..9248c36ca 100644 --- a/portable/MPLAB/PIC18F/portmacro.h +++ b/portable/MPLAB/PIC18F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/port.c b/portable/MPLAB/PIC24_dsPIC/port.c index fc43c6222..d9f9cb927 100644 --- a/portable/MPLAB/PIC24_dsPIC/port.c +++ b/portable/MPLAB/PIC24_dsPIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S index 87e8a2ce9..d9eafcf5d 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S index f9273b494..8bf363c07 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/portmacro.h b/portable/MPLAB/PIC24_dsPIC/portmacro.h index b237d2dc4..c8976844c 100644 --- a/portable/MPLAB/PIC24_dsPIC/portmacro.h +++ b/portable/MPLAB/PIC24_dsPIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h index c5047d7bc..4930d0af0 100644 --- a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h +++ b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/port.c b/portable/MPLAB/PIC32MEC14xx/port.c index 108f26347..5b17bff69 100644 --- a/portable/MPLAB/PIC32MEC14xx/port.c +++ b/portable/MPLAB/PIC32MEC14xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/port_asm.S b/portable/MPLAB/PIC32MEC14xx/port_asm.S index fea944380..a8bba22ab 100644 --- a/portable/MPLAB/PIC32MEC14xx/port_asm.S +++ b/portable/MPLAB/PIC32MEC14xx/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/portmacro.h b/portable/MPLAB/PIC32MEC14xx/portmacro.h index 2b9562623..7e50f9e48 100644 --- a/portable/MPLAB/PIC32MEC14xx/portmacro.h +++ b/portable/MPLAB/PIC32MEC14xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/ISR_Support.h b/portable/MPLAB/PIC32MX/ISR_Support.h index 4409fde21..57415ac86 100644 --- a/portable/MPLAB/PIC32MX/ISR_Support.h +++ b/portable/MPLAB/PIC32MX/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/port.c b/portable/MPLAB/PIC32MX/port.c index dc98f4aa7..f62382d59 100644 --- a/portable/MPLAB/PIC32MX/port.c +++ b/portable/MPLAB/PIC32MX/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/port_asm.S b/portable/MPLAB/PIC32MX/port_asm.S index 6271543e2..db907e377 100644 --- a/portable/MPLAB/PIC32MX/port_asm.S +++ b/portable/MPLAB/PIC32MX/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/portmacro.h b/portable/MPLAB/PIC32MX/portmacro.h index 0495e1828..0733f1b2f 100644 --- a/portable/MPLAB/PIC32MX/portmacro.h +++ b/portable/MPLAB/PIC32MX/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/ISR_Support.h b/portable/MPLAB/PIC32MZ/ISR_Support.h index 73e7b589b..e94376fd3 100644 --- a/portable/MPLAB/PIC32MZ/ISR_Support.h +++ b/portable/MPLAB/PIC32MZ/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/port.c b/portable/MPLAB/PIC32MZ/port.c index 3225dde7f..daee09de0 100644 --- a/portable/MPLAB/PIC32MZ/port.c +++ b/portable/MPLAB/PIC32MZ/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/port_asm.S b/portable/MPLAB/PIC32MZ/port_asm.S index 020b2c488..18943f8d4 100644 --- a/portable/MPLAB/PIC32MZ/port_asm.S +++ b/portable/MPLAB/PIC32MZ/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/portmacro.h b/portable/MPLAB/PIC32MZ/portmacro.h index 58c423658..8bf42130a 100644 --- a/portable/MPLAB/PIC32MZ/portmacro.h +++ b/portable/MPLAB/PIC32MZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MSVC-MingW/port.c b/portable/MSVC-MingW/port.c index 48f15e75e..16092577c 100644 --- a/portable/MSVC-MingW/port.c +++ b/portable/MSVC-MingW/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MSVC-MingW/portmacro.h b/portable/MSVC-MingW/portmacro.h index 55ece9f6c..cfb047a79 100644 --- a/portable/MSVC-MingW/portmacro.h +++ b/portable/MSVC-MingW/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_1.c b/portable/MemMang/heap_1.c index a1e96bdf3..0da18e0cc 100644 --- a/portable/MemMang/heap_1.c +++ b/portable/MemMang/heap_1.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_2.c b/portable/MemMang/heap_2.c index 42fdaa961..6ae88e5d5 100644 --- a/portable/MemMang/heap_2.c +++ b/portable/MemMang/heap_2.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_3.c b/portable/MemMang/heap_3.c index 677fefb65..c2e8e6ba6 100644 --- a/portable/MemMang/heap_3.c +++ b/portable/MemMang/heap_3.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_4.c b/portable/MemMang/heap_4.c index e4e52a808..87995dc63 100644 --- a/portable/MemMang/heap_4.c +++ b/portable/MemMang/heap_4.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_5.c b/portable/MemMang/heap_5.c index 52390f596..026e3fad3 100644 --- a/portable/MemMang/heap_5.c +++ b/portable/MemMang/heap_5.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MikroC/ARM_CM4F/port.c b/portable/MikroC/ARM_CM4F/port.c index e079395e9..6071fd849 100644 --- a/portable/MikroC/ARM_CM4F/port.c +++ b/portable/MikroC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MikroC/ARM_CM4F/portmacro.h b/portable/MikroC/ARM_CM4F/portmacro.h index 6a9a9ce05..8fb4e7a89 100644 --- a/portable/MikroC/ARM_CM4F/portmacro.h +++ b/portable/MikroC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/large_untested/port.c b/portable/Paradigm/Tern_EE/large_untested/port.c index e4017b9ca..60aa61e17 100644 --- a/portable/Paradigm/Tern_EE/large_untested/port.c +++ b/portable/Paradigm/Tern_EE/large_untested/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/large_untested/portasm.h b/portable/Paradigm/Tern_EE/large_untested/portasm.h index ed37545ce..b6213b57e 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portasm.h +++ b/portable/Paradigm/Tern_EE/large_untested/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/large_untested/portmacro.h b/portable/Paradigm/Tern_EE/large_untested/portmacro.h index ffe264e0f..923d6bb62 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portmacro.h +++ b/portable/Paradigm/Tern_EE/large_untested/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/small/port.c b/portable/Paradigm/Tern_EE/small/port.c index c949b8eb4..aac067fbb 100644 --- a/portable/Paradigm/Tern_EE/small/port.c +++ b/portable/Paradigm/Tern_EE/small/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/small/portasm.h b/portable/Paradigm/Tern_EE/small/portasm.h index 521e4045a..826baaa99 100644 --- a/portable/Paradigm/Tern_EE/small/portasm.h +++ b/portable/Paradigm/Tern_EE/small/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/small/portmacro.h b/portable/Paradigm/Tern_EE/small/portmacro.h index dd7265ac4..07a32c2a7 100644 --- a/portable/Paradigm/Tern_EE/small/portmacro.h +++ b/portable/Paradigm/Tern_EE/small/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/port.c b/portable/RVDS/ARM7_LPC21xx/port.c index 408932624..2203788f9 100644 --- a/portable/RVDS/ARM7_LPC21xx/port.c +++ b/portable/RVDS/ARM7_LPC21xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/portASM.s b/portable/RVDS/ARM7_LPC21xx/portASM.s index 92967e0f2..f5d77b2f6 100644 --- a/portable/RVDS/ARM7_LPC21xx/portASM.s +++ b/portable/RVDS/ARM7_LPC21xx/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.h b/portable/RVDS/ARM7_LPC21xx/portmacro.h index 6c672304d..663b9c4b7 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.h +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.inc b/portable/RVDS/ARM7_LPC21xx/portmacro.inc index ffdfab0ac..3b6cfab69 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.inc +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/port.c b/portable/RVDS/ARM_CA9/port.c index 9219e8142..b3c6f1c7e 100644 --- a/portable/RVDS/ARM_CA9/port.c +++ b/portable/RVDS/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/portASM.s b/portable/RVDS/ARM_CA9/portASM.s index dfde98ad8..2b9ccbf17 100644 --- a/portable/RVDS/ARM_CA9/portASM.s +++ b/portable/RVDS/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/portmacro.h b/portable/RVDS/ARM_CA9/portmacro.h index 38a977884..f61ab880c 100644 --- a/portable/RVDS/ARM_CA9/portmacro.h +++ b/portable/RVDS/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/portmacro.inc b/portable/RVDS/ARM_CA9/portmacro.inc index cf2557f84..8a5725a49 100644 --- a/portable/RVDS/ARM_CA9/portmacro.inc +++ b/portable/RVDS/ARM_CA9/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM0/port.c b/portable/RVDS/ARM_CM0/port.c index c4a4d3604..3cbdb5f03 100644 --- a/portable/RVDS/ARM_CM0/port.c +++ b/portable/RVDS/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM0/portmacro.h b/portable/RVDS/ARM_CM0/portmacro.h index a6c88c806..7308abc53 100644 --- a/portable/RVDS/ARM_CM0/portmacro.h +++ b/portable/RVDS/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM3/port.c b/portable/RVDS/ARM_CM3/port.c index 014c4b596..d489b8d5d 100644 --- a/portable/RVDS/ARM_CM3/port.c +++ b/portable/RVDS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM3/portmacro.h b/portable/RVDS/ARM_CM3/portmacro.h index 5b6ba433a..e1e5e33a2 100644 --- a/portable/RVDS/ARM_CM3/portmacro.h +++ b/portable/RVDS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4F/port.c b/portable/RVDS/ARM_CM4F/port.c index c01589ca8..604634cc9 100644 --- a/portable/RVDS/ARM_CM4F/port.c +++ b/portable/RVDS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4F/portmacro.h b/portable/RVDS/ARM_CM4F/portmacro.h index 0fddf402a..98a3ed75b 100644 --- a/portable/RVDS/ARM_CM4F/portmacro.h +++ b/portable/RVDS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index c09b1c6f1..a94f378c8 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h index 7cc5bbf48..126007fda 100644 --- a/portable/RVDS/ARM_CM4_MPU/portmacro.h +++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM7/r0p1/port.c b/portable/RVDS/ARM_CM7/r0p1/port.c index 25e5f5aad..ca97a6697 100644 --- a/portable/RVDS/ARM_CM7/r0p1/port.c +++ b/portable/RVDS/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM7/r0p1/portmacro.h b/portable/RVDS/ARM_CM7/r0p1/portmacro.h index 82671b107..2186033f8 100644 --- a/portable/RVDS/ARM_CM7/r0p1/portmacro.h +++ b/portable/RVDS/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX100/port.c b/portable/Renesas/RX100/port.c index 0b8bf8e83..b8e4add6f 100644 --- a/portable/Renesas/RX100/port.c +++ b/portable/Renesas/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX100/port_asm.src b/portable/Renesas/RX100/port_asm.src index 05631c9ad..239875b9d 100644 --- a/portable/Renesas/RX100/port_asm.src +++ b/portable/Renesas/RX100/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX100/portmacro.h b/portable/Renesas/RX100/portmacro.h index b0fdcf927..49f3495e3 100644 --- a/portable/Renesas/RX100/portmacro.h +++ b/portable/Renesas/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX200/port.c b/portable/Renesas/RX200/port.c index 776237261..3c8b0345f 100644 --- a/portable/Renesas/RX200/port.c +++ b/portable/Renesas/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX200/port_asm.src b/portable/Renesas/RX200/port_asm.src index 05631c9ad..239875b9d 100644 --- a/portable/Renesas/RX200/port_asm.src +++ b/portable/Renesas/RX200/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX200/portmacro.h b/portable/Renesas/RX200/portmacro.h index 17bcf60af..46ac15761 100644 --- a/portable/Renesas/RX200/portmacro.h +++ b/portable/Renesas/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600/port.c b/portable/Renesas/RX600/port.c index de7a557f5..5d29f38e9 100644 --- a/portable/Renesas/RX600/port.c +++ b/portable/Renesas/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600/port_asm.src b/portable/Renesas/RX600/port_asm.src index 05631c9ad..239875b9d 100644 --- a/portable/Renesas/RX600/port_asm.src +++ b/portable/Renesas/RX600/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600/portmacro.h b/portable/Renesas/RX600/portmacro.h index 2e49aa582..0009ffdf9 100644 --- a/portable/Renesas/RX600/portmacro.h +++ b/portable/Renesas/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600v2/port.c b/portable/Renesas/RX600v2/port.c index 16a7d8a87..27125d854 100644 --- a/portable/Renesas/RX600v2/port.c +++ b/portable/Renesas/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600v2/port_asm.src b/portable/Renesas/RX600v2/port_asm.src index 459432ee9..29466124b 100644 --- a/portable/Renesas/RX600v2/port_asm.src +++ b/portable/Renesas/RX600v2/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600v2/portmacro.h b/portable/Renesas/RX600v2/portmacro.h index 2ad54658f..80bd24034 100644 --- a/portable/Renesas/RX600v2/portmacro.h +++ b/portable/Renesas/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX700v3_DPFPU/port.c b/portable/Renesas/RX700v3_DPFPU/port.c index 1d708a3ed..c2df93181 100644 --- a/portable/Renesas/RX700v3_DPFPU/port.c +++ b/portable/Renesas/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX700v3_DPFPU/port_asm.src b/portable/Renesas/RX700v3_DPFPU/port_asm.src index ba6e3b7f6..b94492f7a 100644 --- a/portable/Renesas/RX700v3_DPFPU/port_asm.src +++ b/portable/Renesas/RX700v3_DPFPU/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX700v3_DPFPU/portmacro.h b/portable/Renesas/RX700v3_DPFPU/portmacro.h index f576e817a..1eb9d1257 100644 --- a/portable/Renesas/RX700v3_DPFPU/portmacro.h +++ b/portable/Renesas/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/ISR_Support.inc b/portable/Renesas/SH2A_FPU/ISR_Support.inc index 30edf9039..a6c2fea07 100644 --- a/portable/Renesas/SH2A_FPU/ISR_Support.inc +++ b/portable/Renesas/SH2A_FPU/ISR_Support.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/port.c b/portable/Renesas/SH2A_FPU/port.c index 6b54d15a9..0e1fe2c6d 100644 --- a/portable/Renesas/SH2A_FPU/port.c +++ b/portable/Renesas/SH2A_FPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/portasm.src b/portable/Renesas/SH2A_FPU/portasm.src index e2c175813..539974210 100644 --- a/portable/Renesas/SH2A_FPU/portasm.src +++ b/portable/Renesas/SH2A_FPU/portasm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/portmacro.h b/portable/Renesas/SH2A_FPU/portmacro.h index d7ccc1f14..278e796b8 100644 --- a/portable/Renesas/SH2A_FPU/portmacro.h +++ b/portable/Renesas/SH2A_FPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/port.c b/portable/Rowley/MSP430F449/port.c index 0c6028354..4483140b5 100644 --- a/portable/Rowley/MSP430F449/port.c +++ b/portable/Rowley/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/portasm.h b/portable/Rowley/MSP430F449/portasm.h index 63fd246fa..3fba121cc 100644 --- a/portable/Rowley/MSP430F449/portasm.h +++ b/portable/Rowley/MSP430F449/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/portext.asm b/portable/Rowley/MSP430F449/portext.asm index a0567c217..3902033eb 100644 --- a/portable/Rowley/MSP430F449/portext.asm +++ b/portable/Rowley/MSP430F449/portext.asm @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/portmacro.h b/portable/Rowley/MSP430F449/portmacro.h index bd8780ff0..253cb69c4 100644 --- a/portable/Rowley/MSP430F449/portmacro.h +++ b/portable/Rowley/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/SDCC/Cygnal/port.c b/portable/SDCC/Cygnal/port.c index c7ca00f4d..1c6c98e27 100644 --- a/portable/SDCC/Cygnal/port.c +++ b/portable/SDCC/Cygnal/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/SDCC/Cygnal/portmacro.h b/portable/SDCC/Cygnal/portmacro.h index 0c51e5620..40bb75eee 100644 --- a/portable/SDCC/Cygnal/portmacro.h +++ b/portable/SDCC/Cygnal/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB91460/port.c b/portable/Softune/MB91460/port.c index b8faac0fb..8c4209631 100644 --- a/portable/Softune/MB91460/port.c +++ b/portable/Softune/MB91460/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB91460/portmacro.h b/portable/Softune/MB91460/portmacro.h index 6f4bcf2c0..8ea39641d 100644 --- a/portable/Softune/MB91460/portmacro.h +++ b/portable/Softune/MB91460/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB96340/port.c b/portable/Softune/MB96340/port.c index 813db1023..f3671b774 100644 --- a/portable/Softune/MB96340/port.c +++ b/portable/Softune/MB96340/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB96340/portmacro.h b/portable/Softune/MB96340/portmacro.h index 941cd2a9d..ebb7995dc 100644 --- a/portable/Softune/MB96340/portmacro.h +++ b/portable/Softune/MB96340/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Tasking/ARM_CM4F/port.c b/portable/Tasking/ARM_CM4F/port.c index 76b570fd0..f4d666e93 100644 --- a/portable/Tasking/ARM_CM4F/port.c +++ b/portable/Tasking/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Tasking/ARM_CM4F/port_asm.asm b/portable/Tasking/ARM_CM4F/port_asm.asm index 2069ad44f..c9ae7125c 100644 --- a/portable/Tasking/ARM_CM4F/port_asm.asm +++ b/portable/Tasking/ARM_CM4F/port_asm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 +; * FreeRTOS Kernel V10.4.3 LTS Patch 1 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Tasking/ARM_CM4F/portmacro.h b/portable/Tasking/ARM_CM4F/portmacro.h index b2a48e814..1b55056a1 100644 --- a/portable/Tasking/ARM_CM4F/portmacro.h +++ b/portable/Tasking/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c index 9e6b565d1..8ea07d910 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h index 29a70389e..8588f9c3e 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s index ba1e911cc..513f4008d 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c index 1762d4ac6..b4d001f08 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/port.c b/portable/ThirdParty/GCC/ARC_EM_HS/port.c index 86f63f1e7..19698958c 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/port.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h index 728b21bf4..118a5045d 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c index 9e6b565d1..8ea07d910 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h index 29a70389e..8588f9c3e 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_support.s b/portable/ThirdParty/GCC/ARC_v1/arc_support.s index 06d6125b3..24ec13f24 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_v1/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/port.c b/portable/ThirdParty/GCC/ARC_v1/port.c index a99313af1..5458ee356 100644 --- a/portable/ThirdParty/GCC/ARC_v1/port.c +++ b/portable/ThirdParty/GCC/ARC_v1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/portmacro.h b/portable/ThirdParty/GCC/ARC_v1/portmacro.h index 73f8c2937..9fd395fe5 100644 --- a/portable/ThirdParty/GCC/ARC_v1/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_v1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ATmega/port.c b/portable/ThirdParty/GCC/ATmega/port.c index 8ad81b128..4be977a44 100644 --- a/portable/ThirdParty/GCC/ATmega/port.c +++ b/portable/ThirdParty/GCC/ATmega/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ATmega/portmacro.h b/portable/ThirdParty/GCC/ATmega/portmacro.h index 46b743105..ccc76e48a 100644 --- a/portable/ThirdParty/GCC/ATmega/portmacro.h +++ b/portable/ThirdParty/GCC/ATmega/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Posix/port.c b/portable/ThirdParty/GCC/Posix/port.c index 05d89ff14..066bbe5f1 100644 --- a/portable/ThirdParty/GCC/Posix/port.c +++ b/portable/ThirdParty/GCC/Posix/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Posix/portmacro.h b/portable/ThirdParty/GCC/Posix/portmacro.h index 3f96b409e..51f9ae40b 100644 --- a/portable/ThirdParty/GCC/Posix/portmacro.h +++ b/portable/ThirdParty/GCC/Posix/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright 2020 Cambridge Consultants Ltd. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/XCC/Xtensa/port.c b/portable/ThirdParty/XCC/Xtensa/port.c index e1d9651ac..8d3377278 100644 --- a/portable/ThirdParty/XCC/Xtensa/port.c +++ b/portable/ThirdParty/XCC/Xtensa/port.c @@ -1,6 +1,6 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/XCC/Xtensa/portmacro.h b/portable/ThirdParty/XCC/Xtensa/portmacro.h index 6e1ea1604..b2522d44b 100644 --- a/portable/ThirdParty/XCC/Xtensa/portmacro.h +++ b/portable/ThirdParty/XCC/Xtensa/portmacro.h @@ -1,6 +1,6 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/Drivers/Tick/Tick.c b/portable/WizC/PIC18/Drivers/Tick/Tick.c index 680f38e67..30502aaab 100644 --- a/portable/WizC/PIC18/Drivers/Tick/Tick.c +++ b/portable/WizC/PIC18/Drivers/Tick/Tick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/Drivers/Tick/isrTick.c b/portable/WizC/PIC18/Drivers/Tick/isrTick.c index 67b5b585c..e137b35ea 100644 --- a/portable/WizC/PIC18/Drivers/Tick/isrTick.c +++ b/portable/WizC/PIC18/Drivers/Tick/isrTick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/addFreeRTOS.h b/portable/WizC/PIC18/addFreeRTOS.h index e1a441e93..518dd521c 100644 --- a/portable/WizC/PIC18/addFreeRTOS.h +++ b/portable/WizC/PIC18/addFreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/port.c b/portable/WizC/PIC18/port.c index a44ee892c..9b099ea0d 100644 --- a/portable/WizC/PIC18/port.c +++ b/portable/WizC/PIC18/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/portmacro.h b/portable/WizC/PIC18/portmacro.h index 65f88a151..7d108c9e2 100644 --- a/portable/WizC/PIC18/portmacro.h +++ b/portable/WizC/PIC18/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/Flsh186/port.c b/portable/oWatcom/16BitDOS/Flsh186/port.c index 460995e9e..837bf2377 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/port.c +++ b/portable/oWatcom/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h index 6b8f2593b..f73ae0dc9 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h +++ b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/PC/port.c b/portable/oWatcom/16BitDOS/PC/port.c index 97aabd7e2..a69aafeb4 100644 --- a/portable/oWatcom/16BitDOS/PC/port.c +++ b/portable/oWatcom/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/PC/portmacro.h b/portable/oWatcom/16BitDOS/PC/portmacro.h index fd5322478..311c5b6b0 100644 --- a/portable/oWatcom/16BitDOS/PC/portmacro.h +++ b/portable/oWatcom/16BitDOS/PC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/common/portasm.h b/portable/oWatcom/16BitDOS/common/portasm.h index 50a724c4b..a2148af1c 100644 --- a/portable/oWatcom/16BitDOS/common/portasm.h +++ b/portable/oWatcom/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/common/portcomn.c b/portable/oWatcom/16BitDOS/common/portcomn.c index 2b00fe022..0c997dbd3 100644 --- a/portable/oWatcom/16BitDOS/common/portcomn.c +++ b/portable/oWatcom/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/queue.c b/queue.c index 7ed8e9878..f856f12a9 100644 --- a/queue.c +++ b/queue.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/stream_buffer.c b/stream_buffer.c index 5c6a47e2c..1b79198fe 100644 --- a/stream_buffer.c +++ b/stream_buffer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/tasks.c b/tasks.c index 073a09750..78f92b84d 100644 --- a/tasks.c +++ b/tasks.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/timers.c b/timers.c index eb4229695..803b12d85 100644 --- a/timers.c +++ b/timers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 + * FreeRTOS Kernel V10.4.3 LTS Patch 1 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of From 628059b775ba7e0e5d7492291035c6f7c9870be5 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Fri, 10 Sep 2021 11:53:24 -0700 Subject: [PATCH 08/24] Update History.txt Signed-off-by: Gaurav Aggarwal --- History.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/History.txt b/History.txt index 026c539bb..979366d17 100644 --- a/History.txt +++ b/History.txt @@ -1,6 +1,8 @@ Documentation and download available at https://www.FreeRTOS.org/ -Changes between FreeRTOS V10.4.3 and FreeRTOS V10.4.3 LTS Patch 1 +Changes between FreeRTOS V10.4.3 and FreeRTOS V10.4.3 LTS Patch 1 released September 10 2021 + + See https://www.FreeRTOS.org/FreeRTOS-V10.4.5.html + ARMv8-M secure-side port: Tasks that call secure functions from the non-secure side of an ARMv8-M MCU (ARM Cortex-M23 and Cortex-M33) have two From ba505118219b94ced30fb8961287216e74f8fe80 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Wed, 6 Oct 2021 19:13:48 -0700 Subject: [PATCH 09/24] Change xPortRaisePrivilege and vPortResetPrivilege to macros This prevents non-kernel code from calling these functions. Signed-off-by: Gaurav Aggarwal --- include/mpu_wrappers.h | 32 ++- portable/Common/mpu_wrappers.c | 466 ++++++++++++++++++------------- portable/GCC/ARM_CM3_MPU/port.c | 17 +- portable/GCC/ARM_CM4_MPU/port.c | 17 +- portable/IAR/ARM_CM4F_MPU/port.c | 21 +- portable/RVDS/ARM_CM4_MPU/port.c | 17 +- 6 files changed, 337 insertions(+), 233 deletions(-) diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h index 14b712eea..8fbce8e9b 100644 --- a/include/mpu_wrappers.h +++ b/include/mpu_wrappers.h @@ -165,11 +165,41 @@ #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ -/* Ensure API functions go in the privileged execution section. */ + /* Ensure API functions go in the privileged execution section. */ #define PRIVILEGED_FUNCTION __attribute__( ( section( "privileged_functions" ) ) ) #define PRIVILEGED_DATA __attribute__( ( section( "privileged_data" ) ) ) #define FREERTOS_SYSTEM_CALL __attribute__( ( section( "freertos_system_calls" ) ) ) + /** + * @brief Calls the port specific code to raise the privilege. + * + * Sets xRunningPrivileged to pdFALSE if privilege was raised, else sets + * it to pdTRUE. + */ + #define xPortRaisePrivilege( xRunningPrivileged ) \ + { \ + /* Check whether the processor is already privileged. */ \ + xRunningPrivileged = portIS_PRIVILEGED(); \ + \ + /* If the processor is not already privileged, raise privilege. */ \ + if( xRunningPrivileged == pdFALSE ) \ + { \ + portRAISE_PRIVILEGE(); \ + } \ + } + + /** + * @brief If xRunningPrivileged is not pdTRUE, calls the port specific + * code to reset the privilege, otherwise does nothing. + */ + #define vPortResetPrivilege( xRunningPrivileged ) \ + { \ + if( xRunningPrivileged == pdFALSE ) \ + { \ + portRESET_PRIVILEGE(); \ + } \ + } + #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ #else /* portUSING_MPU_WRAPPERS */ diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index 48d1def72..571676a24 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -44,45 +44,6 @@ #include "mpu_prototypes.h" #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -/** - * @brief Calls the port specific code to raise the privilege. - * - * @return pdFALSE if privilege was raised, pdTRUE otherwise. - */ -BaseType_t xPortRaisePrivilege( void ) FREERTOS_SYSTEM_CALL; - -/** - * @brief If xRunningPrivileged is not pdTRUE, calls the port specific - * code to reset the privilege, otherwise does nothing. - */ -void vPortResetPrivilege( BaseType_t xRunningPrivileged ); -/*-----------------------------------------------------------*/ - -BaseType_t xPortRaisePrivilege( void ) /* FREERTOS_SYSTEM_CALL */ -{ - BaseType_t xRunningPrivileged; - - /* Check whether the processor is already privileged. */ - xRunningPrivileged = portIS_PRIVILEGED(); - - /* If the processor is not already privileged, raise privilege. */ - if( xRunningPrivileged == pdFALSE ) - { - portRAISE_PRIVILEGE(); - } - - return xRunningPrivileged; -} -/*-----------------------------------------------------------*/ - -void vPortResetPrivilege( BaseType_t xRunningPrivileged ) -{ - if( xRunningPrivileged == pdFALSE ) - { - portRESET_PRIVILEGE(); - } -} /*-----------------------------------------------------------*/ #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) @@ -93,11 +54,12 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged ) UBaseType_t uxPriority, TaskHandle_t * pxCreatedTask ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ @@ -113,10 +75,12 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged ) StaticTask_t * const pxTaskBuffer ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* configSUPPORT_STATIC_ALLOCATION */ @@ -125,8 +89,9 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged ) #if ( INCLUDE_vTaskDelete == 1 ) void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskDelete( pxTaskToDelete ); vPortResetPrivilege( xRunningPrivileged ); } @@ -137,34 +102,37 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged ) BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); - BaseType_t xReturn; + BaseType_t xRunningPrivileged, xReturn; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( INCLUDE_xTaskDelayUntil == 1 ) */ /*-----------------------------------------------------------*/ #if ( INCLUDE_xTaskAbortDelay == 1 ) BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskAbortDelay( xTask ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( INCLUDE_xTaskAbortDelay == 1 ) */ /*-----------------------------------------------------------*/ #if ( INCLUDE_vTaskDelay == 1 ) void MPU_vTaskDelay( TickType_t xTicksToDelay ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskDelay( xTicksToDelay ); vPortResetPrivilege( xRunningPrivileged ); } @@ -175,38 +143,43 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged ) UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t pxTask ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); uxReturn = uxTaskPriorityGet( pxTask ); vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; } -#endif +#endif /* if ( INCLUDE_uxTaskPriorityGet == 1 ) */ /*-----------------------------------------------------------*/ #if ( INCLUDE_vTaskPrioritySet == 1 ) void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskPrioritySet( pxTask, uxNewPriority ); vPortResetPrivilege( xRunningPrivileged ); } -#endif +#endif /* if ( INCLUDE_vTaskPrioritySet == 1 ) */ /*-----------------------------------------------------------*/ #if ( INCLUDE_eTaskGetState == 1 ) eTaskState MPU_eTaskGetState( TaskHandle_t pxTask ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); eTaskState eReturn; + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); eReturn = eTaskGetState( pxTask ); vPortResetPrivilege( xRunningPrivileged ); + return eReturn; } -#endif +#endif /* if ( INCLUDE_eTaskGetState == 1 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_TRACE_FACILITY == 1 ) @@ -215,8 +188,9 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged ) BaseType_t xGetFreeStackSpace, eTaskState eState ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskGetInfo( xTask, pxTaskStatus, xGetFreeStackSpace, eState ); vPortResetPrivilege( xRunningPrivileged ); } @@ -227,20 +201,23 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged ) TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskGetIdleTaskHandle(); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) */ /*-----------------------------------------------------------*/ #if ( INCLUDE_vTaskSuspend == 1 ) void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskSuspend( pxTaskToSuspend ); vPortResetPrivilege( xRunningPrivileged ); } @@ -250,8 +227,9 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged ) #if ( INCLUDE_vTaskSuspend == 1 ) void MPU_vTaskResume( TaskHandle_t pxTaskToResume ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskResume( pxTaskToResume ); vPortResetPrivilege( xRunningPrivileged ); } @@ -260,8 +238,9 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged ) void MPU_vTaskSuspendAll( void ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskSuspendAll(); vPortResetPrivilege( xRunningPrivileged ); } @@ -269,11 +248,12 @@ void MPU_vTaskSuspendAll( void ) /* FREERTOS_SYSTEM_CALL */ BaseType_t MPU_xTaskResumeAll( void ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskResumeAll(); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } /*-----------------------------------------------------------*/ @@ -281,10 +261,12 @@ BaseType_t MPU_xTaskResumeAll( void ) /* FREERTOS_SYSTEM_CALL */ TickType_t MPU_xTaskGetTickCount( void ) /* FREERTOS_SYSTEM_CALL */ { TickType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskGetTickCount(); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } /*-----------------------------------------------------------*/ @@ -292,10 +274,12 @@ TickType_t MPU_xTaskGetTickCount( void ) /* FREERTOS_SYSTEM_CALL */ UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); uxReturn = uxTaskGetNumberOfTasks(); vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; } /*-----------------------------------------------------------*/ @@ -303,10 +287,12 @@ UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* FREERTOS_SYSTEM_CALL */ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ { char * pcReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); pcReturn = pcTaskGetName( xTaskToQuery ); vPortResetPrivilege( xRunningPrivileged ); + return pcReturn; } /*-----------------------------------------------------------*/ @@ -315,20 +301,23 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskGetHandle( pcNameToQuery ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( INCLUDE_xTaskGetHandle == 1 ) */ /*-----------------------------------------------------------*/ #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) void MPU_vTaskList( char * pcWriteBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskList( pcWriteBuffer ); vPortResetPrivilege( xRunningPrivileged ); } @@ -338,8 +327,9 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) void MPU_vTaskGetRunTimeStats( char * pcWriteBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskGetRunTimeStats( pcWriteBuffer ); vPortResetPrivilege( xRunningPrivileged ); } @@ -350,38 +340,43 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) /* FREERTOS_SYSTEM_CALL */ { uint32_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = ulTaskGetIdleRunTimeCounter(); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) */ /*-----------------------------------------------------------*/ #if ( configUSE_APPLICATION_TASK_TAG == 1 ) void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskSetApplicationTaskTag( xTask, pxTagValue ); vPortResetPrivilege( xRunningPrivileged ); } -#endif +#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_APPLICATION_TASK_TAG == 1 ) TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */ { TaskHookFunction_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskGetApplicationTaskTag( xTask ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) @@ -389,12 +384,13 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ BaseType_t xIndex, void * pvValue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskSetThreadLocalStoragePointer( xTaskToSet, xIndex, pvValue ); vPortResetPrivilege( xRunningPrivileged ); } -#endif +#endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) @@ -402,10 +398,12 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ BaseType_t xIndex ) /* FREERTOS_SYSTEM_CALL */ { void * pvReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); pvReturn = pvTaskGetThreadLocalStoragePointer( xTaskToQuery, xIndex ); vPortResetPrivilege( xRunningPrivileged ); + return pvReturn; } #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ @@ -415,11 +413,12 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void * pvParameter ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ @@ -431,10 +430,12 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ uint32_t * pulTotalRunTime ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime ); vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; } #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ @@ -442,11 +443,12 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskCatchUpTicks( xTicksToCatchUp ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } /*-----------------------------------------------------------*/ @@ -455,58 +457,66 @@ BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTE UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); uxReturn = uxTaskGetStackHighWaterMark( xTask ); vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; } -#endif +#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) */ /*-----------------------------------------------------------*/ #if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */ { configSTACK_DEPTH_TYPE uxReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); uxReturn = uxTaskGetStackHighWaterMark2( xTask ); vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; } -#endif +#endif /* if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 )) +#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskGetCurrentTaskHandle(); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */ /*-----------------------------------------------------------*/ #if ( INCLUDE_xTaskGetSchedulerState == 1 ) BaseType_t MPU_xTaskGetSchedulerState( void ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskGetSchedulerState(); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( INCLUDE_xTaskGetSchedulerState == 1 ) */ /*-----------------------------------------------------------*/ void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTaskSetTimeOutState( pxTimeOut ); vPortResetPrivilege( xRunningPrivileged ); } @@ -515,11 +525,12 @@ void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* FREERTOS_SYSTEM_ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } /*-----------------------------------------------------------*/ @@ -531,11 +542,12 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, eNotifyAction eAction, uint32_t * pulPreviousNotificationValue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskGenericNotify( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ @@ -548,11 +560,12 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, uint32_t * pulNotificationValue, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskGenericNotifyWait( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ @@ -564,10 +577,12 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { uint32_t ulReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); ulReturn = ulTaskGenericNotifyTake( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); + return ulReturn; } #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ @@ -577,11 +592,12 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, UBaseType_t uxIndexToClear ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTaskGenericNotifyStateClear( xTask, uxIndexToClear ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ @@ -593,10 +609,12 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, uint32_t ulBitsToClear ) /* FREERTOS_SYSTEM_CALL */ { uint32_t ulReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); ulReturn = ulTaskGenericNotifyValueClear( xTask, uxIndexToClear, ulBitsToClear ); vPortResetPrivilege( xRunningPrivileged ); + return ulReturn; } #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */ @@ -608,10 +626,12 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) */ @@ -625,10 +645,12 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, const uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueGenericCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxStaticQueue, ucQueueType ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */ @@ -637,11 +659,12 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueGenericReset( pxQueue, xNewQueue ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } /*-----------------------------------------------------------*/ @@ -651,33 +674,38 @@ BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } /*-----------------------------------------------------------*/ UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); UBaseType_t uxReturn; + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); uxReturn = uxQueueMessagesWaiting( pxQueue ); vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; } /*-----------------------------------------------------------*/ UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); UBaseType_t uxReturn; + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); uxReturn = uxQueueSpacesAvailable( xQueue ); vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; } /*-----------------------------------------------------------*/ @@ -686,11 +714,12 @@ BaseType_t MPU_xQueueReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); - BaseType_t xReturn; + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueReceive( pxQueue, pvBuffer, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } /*-----------------------------------------------------------*/ @@ -699,11 +728,12 @@ BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); - BaseType_t xReturn; + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueuePeek( xQueue, pvBuffer, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } /*-----------------------------------------------------------*/ @@ -711,11 +741,12 @@ BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); - BaseType_t xReturn; + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueSemaphoreTake( xQueue, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } /*-----------------------------------------------------------*/ @@ -723,27 +754,31 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, #if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); void * xReturn; + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueGetMutexHolder( xSemaphore ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */ /*-----------------------------------------------------------*/ #if ( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueCreateMutex( ucQueueType ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */ /*-----------------------------------------------------------*/ #if ( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) @@ -751,10 +786,12 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, StaticQueue_t * pxStaticQueue ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueCreateMutexStatic( ucQueueType, pxStaticQueue ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) */ @@ -765,10 +802,12 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, UBaseType_t uxInitialCount ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */ @@ -781,10 +820,12 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, StaticQueue_t * pxStaticQueue ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueCreateCountingSemaphoreStatic( uxMaxCount, uxInitialCount, pxStaticQueue ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) */ @@ -794,11 +835,12 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ @@ -807,27 +849,30 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, #if ( configUSE_RECURSIVE_MUTEXES == 1 ) BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueGiveMutexRecursive( xMutex ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( configUSE_RECURSIVE_MUTEXES == 1 ) */ /*-----------------------------------------------------------*/ #if ( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength ) /* FREERTOS_SYSTEM_CALL */ { QueueSetHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueCreateSet( uxEventQueueLength ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } -#endif +#endif /* if ( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */ /*-----------------------------------------------------------*/ #if ( configUSE_QUEUE_SETS == 1 ) @@ -835,10 +880,12 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xBlockTimeTicks ) /* FREERTOS_SYSTEM_CALL */ { QueueSetMemberHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ @@ -848,11 +895,12 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ @@ -862,11 +910,12 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet ); vPortResetPrivilege( xRunningPrivileged ); + return xReturn; } #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ @@ -876,36 +925,37 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char * pcName ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vQueueAddToRegistry( xQueue, pcName ); - vPortResetPrivilege( xRunningPrivileged ); } -#endif +#endif /* if configQUEUE_REGISTRY_SIZE > 0 */ /*-----------------------------------------------------------*/ #if configQUEUE_REGISTRY_SIZE > 0 void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vQueueUnregisterQueue( xQueue ); - vPortResetPrivilege( xRunningPrivileged ); } -#endif +#endif /* if configQUEUE_REGISTRY_SIZE > 0 */ /*-----------------------------------------------------------*/ #if configQUEUE_REGISTRY_SIZE > 0 const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); const char * pcReturn; + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); pcReturn = pcQueueGetName( xQueue ); - vPortResetPrivilege( xRunningPrivileged ); + return pcReturn; } #endif /* if configQUEUE_REGISTRY_SIZE > 0 */ @@ -913,10 +963,10 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vQueueDelete( xQueue ); - vPortResetPrivilege( xRunningPrivileged ); } /*-----------------------------------------------------------*/ @@ -929,8 +979,9 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ TimerCallbackFunction_t pxCallbackFunction ) /* FREERTOS_SYSTEM_CALL */ { TimerHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ); vPortResetPrivilege( xRunningPrivileged ); @@ -948,8 +999,9 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ StaticTimer_t * pxTimerBuffer ) /* FREERTOS_SYSTEM_CALL */ { TimerHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -962,8 +1014,9 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { void * pvReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); pvReturn = pvTimerGetTimerID( xTimer ); vPortResetPrivilege( xRunningPrivileged ); @@ -976,20 +1029,21 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void * pvNewID ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTimerSetTimerID( xTimer, pvNewID ); vPortResetPrivilege( xRunningPrivileged ); } -#endif +#endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_TIMERS == 1 ) BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTimerIsTimerActive( xTimer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1002,8 +1056,9 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTimerGetTimerDaemonTaskHandle(); vPortResetPrivilege( xRunningPrivileged ); @@ -1018,9 +1073,9 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ uint32_t ulParameter2, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); @@ -1033,33 +1088,37 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vTimerSetReloadMode( xTimer, uxAutoReload ); vPortResetPrivilege( xRunningPrivileged ); } -#endif +#endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_TIMERS == 1 ) UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); UBaseType_t uxReturn; + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); uxReturn = uxTimerGetReloadMode( xTimer ); vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; } -#endif +#endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ #if ( configUSE_TIMERS == 1 ) const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { const char * pcReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); pcReturn = pcTimerGetName( xTimer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1072,8 +1131,9 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { TickType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTimerGetPeriod( xTimer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1086,8 +1146,9 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { TickType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTimerGetExpiryTime( xTimer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1104,8 +1165,9 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ const TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xTimerGenericCommand( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); @@ -1118,8 +1180,9 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ EventGroupHandle_t MPU_xEventGroupCreate( void ) /* FREERTOS_SYSTEM_CALL */ { EventGroupHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xEventGroupCreate(); vPortResetPrivilege( xRunningPrivileged ); @@ -1132,8 +1195,9 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) /* FREERTOS_SYSTEM_CALL */ { EventGroupHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xEventGroupCreateStatic( pxEventGroupBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1149,8 +1213,9 @@ EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); @@ -1162,8 +1227,9 @@ EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xEventGroupClearBits( xEventGroup, uxBitsToClear ); vPortResetPrivilege( xRunningPrivileged ); @@ -1175,8 +1241,9 @@ EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xEventGroupSetBits( xEventGroup, uxBitsToSet ); vPortResetPrivilege( xRunningPrivileged ); @@ -1190,8 +1257,9 @@ EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); @@ -1201,8 +1269,9 @@ EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vEventGroupDelete( xEventGroup ); vPortResetPrivilege( xRunningPrivileged ); } @@ -1214,8 +1283,9 @@ size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { size_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xStreamBufferSend( xStreamBuffer, pvTxData, xDataLengthBytes, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); @@ -1226,8 +1296,9 @@ size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { size_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xStreamBufferNextMessageLengthBytes( xStreamBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1241,8 +1312,9 @@ size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { size_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xStreamBufferReceive( xStreamBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); @@ -1252,8 +1324,9 @@ size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); vStreamBufferDelete( xStreamBuffer ); vPortResetPrivilege( xRunningPrivileged ); } @@ -1261,9 +1334,9 @@ void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_S BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xStreamBufferIsFull( xStreamBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1273,9 +1346,9 @@ BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* FREE BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xStreamBufferIsEmpty( xStreamBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1285,9 +1358,9 @@ BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* FRE BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xStreamBufferReset( xStreamBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1298,8 +1371,9 @@ BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) /* FREER size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { size_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xStreamBufferSpacesAvailable( xStreamBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1310,8 +1384,9 @@ size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { size_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xStreamBufferBytesAvailable( xStreamBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1322,9 +1397,9 @@ size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xReturn, xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xStreamBufferSetTriggerLevel( xStreamBuffer, xTriggerLevel ); vPortResetPrivilege( xRunningPrivileged ); @@ -1338,8 +1413,9 @@ BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, BaseType_t xIsMessageBuffer ) /* FREERTOS_SYSTEM_CALL */ { StreamBufferHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1356,8 +1432,9 @@ BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, StaticStreamBuffer_t * const pxStaticStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { StreamBufferHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); xReturn = xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer, pucStreamBufferStorageArea, pxStaticStreamBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1372,13 +1449,14 @@ BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, * must take the same format as those above whereby the privilege state on exit * equals the privilege state on entry. For example: * + * void MPU_FunctionName( [parameters ] ) FREERTOS_SYSTEM_CALL; * void MPU_FunctionName( [parameters ] ) * { - * BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + * BaseType_t xRunningPrivileged; * - * FunctionName( [parameters ] ); - * - * vPortResetPrivilege( xRunningPrivileged ); + * xPortRaisePrivilege( xRunningPrivileged ); + * FunctionName( [parameters ] ); + * vPortResetPrivilege( xRunningPrivileged ); * } */ diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index e66a7c323..49a84e542 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -158,17 +158,14 @@ BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) ); void vResetPrivilege( void ) __attribute__( ( naked ) ); /** - * @brief Calls the port specific code to raise the privilege. - * - * @return pdFALSE if privilege was raised, pdTRUE otherwise. + * @brief Enter critical section. */ -extern BaseType_t xPortRaisePrivilege( void ); +void vPortEnterCritical( void ) FREERTOS_SYSTEM_CALL; /** - * @brief If xRunningPrivileged is not pdTRUE, calls the port specific - * code to reset the privilege, otherwise does nothing. + * @brief Exit from critical section. */ -extern void vPortResetPrivilege( BaseType_t xRunningPrivileged ); +void vPortExitCritical( void ) FREERTOS_SYSTEM_CALL; /*-----------------------------------------------------------*/ /* Each task maintains its own interrupt status in the critical nesting @@ -481,7 +478,8 @@ void vPortEndScheduler( void ) void vPortEnterCritical( void ) { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); portDISABLE_INTERRUPTS(); uxCriticalNesting++; @@ -492,7 +490,8 @@ void vPortEnterCritical( void ) void vPortExitCritical( void ) { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); configASSERT( uxCriticalNesting ); uxCriticalNesting--; diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index a1d8809b5..90f215683 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -171,17 +171,14 @@ BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) ); void vResetPrivilege( void ) __attribute__( ( naked ) ); /** - * @brief Calls the port specific code to raise the privilege. - * - * @return pdFALSE if privilege was raised, pdTRUE otherwise. + * @brief Enter critical section. */ -extern BaseType_t xPortRaisePrivilege( void ); +void vPortEnterCritical( void ) FREERTOS_SYSTEM_CALL; /** - * @brief If xRunningPrivileged is not pdTRUE, calls the port specific - * code to reset the privilege, otherwise does nothing. + * @brief Exit from critical section. */ -extern void vPortResetPrivilege( BaseType_t xRunningPrivileged ); +void vPortExitCritical( void ) FREERTOS_SYSTEM_CALL; /*-----------------------------------------------------------*/ /* Each task maintains its own interrupt status in the critical nesting @@ -517,7 +514,8 @@ void vPortEndScheduler( void ) void vPortEnterCritical( void ) { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); portDISABLE_INTERRUPTS(); uxCriticalNesting++; @@ -528,7 +526,8 @@ void vPortEnterCritical( void ) void vPortExitCritical( void ) { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); configASSERT( uxCriticalNesting ); uxCriticalNesting--; diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index 6e69acd6f..0c6ac2af6 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -184,17 +184,14 @@ void vPortSVCHandler_C( uint32_t * pulParam ); extern void vPortRestoreContextOfFirstTask( void ) PRIVILEGED_FUNCTION; /** - * @brief Calls the port specific code to raise the privilege. - * - * @return pdFALSE if privilege was raised, pdTRUE otherwise. + * @brief Enter critical section. */ -extern BaseType_t xPortRaisePrivilege( void ); +void vPortEnterCritical( void ) FREERTOS_SYSTEM_CALL; /** - * @brief If xRunningPrivileged is not pdTRUE, calls the port specific - * code to reset the privilege, otherwise does nothing. + * @brief Exit from critical section. */ -extern void vPortResetPrivilege( BaseType_t xRunningPrivileged ); +void vPortExitCritical( void ) FREERTOS_SYSTEM_CALL; /*-----------------------------------------------------------*/ /* Each task maintains its own interrupt status in the critical nesting @@ -445,13 +442,12 @@ void vPortEndScheduler( void ) void vPortEnterCritical( void ) { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); portDISABLE_INTERRUPTS(); uxCriticalNesting++; - vPortResetPrivilege( xRunningPrivileged ); - /* This is not the interrupt safe version of the enter critical function so * assert() if it is being called from an interrupt context. Only API * functions that end in "FromISR" can be used in an interrupt. Only assert if @@ -461,12 +457,15 @@ void vPortEnterCritical( void ) { configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 ); } + + vPortResetPrivilege( xRunningPrivileged ); } /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); configASSERT( uxCriticalNesting ); diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index a94f378c8..72538a473 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -185,17 +185,14 @@ BaseType_t xIsPrivileged( void ); void vResetPrivilege( void ); /** - * @brief Calls the port specific code to raise the privilege. - * - * @return pdFALSE if privilege was raised, pdTRUE otherwise. + * @brief Enter critical section. */ -extern BaseType_t xPortRaisePrivilege( void ); +void vPortEnterCritical( void ) FREERTOS_SYSTEM_CALL; /** - * @brief If xRunningPrivileged is not pdTRUE, calls the port specific - * code to reset the privilege, otherwise does nothing. + * @brief Exit from critical section. */ -extern void vPortResetPrivilege( BaseType_t xRunningPrivileged ); +void vPortExitCritical( void ) FREERTOS_SYSTEM_CALL; /*-----------------------------------------------------------*/ /* @@ -520,7 +517,8 @@ void vPortEndScheduler( void ) void vPortEnterCritical( void ) { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); portDISABLE_INTERRUPTS(); uxCriticalNesting++; @@ -531,7 +529,8 @@ void vPortEnterCritical( void ) void vPortExitCritical( void ) { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged; + xPortRaisePrivilege( xRunningPrivileged ); configASSERT( uxCriticalNesting ); uxCriticalNesting--; From 07e866c2ce53093a22488bab3e1c9371ccf924c5 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Wed, 6 Oct 2021 19:16:30 -0700 Subject: [PATCH 10/24] Update History.txt for 10.4.3 LTS Patch 2 Signed-off-by: Gaurav Aggarwal --- History.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/History.txt b/History.txt index 979366d17..b17c7a270 100644 --- a/History.txt +++ b/History.txt @@ -1,5 +1,11 @@ Documentation and download available at https://www.FreeRTOS.org/ +Changes between FreeRTOS V10.4.3 LTS Patch 1 and FreeRTOS V10.4.3 LTS Patch 2 + + + ARMv7-M and ARMv8-M MPU ports – prevent non-kernel code from calling the + internal functions xPortRaisePrivilege and vPortResetPrivilege by changing + them to macros. + Changes between FreeRTOS V10.4.3 and FreeRTOS V10.4.3 LTS Patch 1 released September 10 2021 See https://www.FreeRTOS.org/FreeRTOS-V10.4.5.html From 65b00127ad25aa6ddbfd36d2b868cfdb64f5f4c3 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Wed, 6 Oct 2021 19:33:45 -0700 Subject: [PATCH 11/24] [AUTO][RELEASE]: Bump task.h version macros to "10.4.3 LTS Patch 2" --- include/task.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/task.h b/include/task.h index ad5b5f56b..3c02f7ab0 100644 --- a/include/task.h +++ b/include/task.h @@ -44,7 +44,7 @@ * MACROS AND DEFINITIONS *----------------------------------------------------------*/ -#define tskKERNEL_VERSION_NUMBER "V10.4.3 LTS Patch 1" +#define tskKERNEL_VERSION_NUMBER "V10.4.3 LTS Patch 2" #define tskKERNEL_VERSION_MAJOR 10 #define tskKERNEL_VERSION_MINOR 4 #define tskKERNEL_VERSION_BUILD 3 From 5f93abd3b59c25b159b803b0a787ec7a04756dce Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Wed, 6 Oct 2021 19:33:51 -0700 Subject: [PATCH 12/24] [AUTO][RELEASE]: Bump file header version to "10.4.3 LTS Patch 2" --- croutine.c | 2 +- event_groups.c | 2 +- include/FreeRTOS.h | 2 +- include/StackMacros.h | 2 +- include/atomic.h | 2 +- include/croutine.h | 2 +- include/deprecated_definitions.h | 2 +- include/event_groups.h | 2 +- include/list.h | 2 +- include/message_buffer.h | 2 +- include/mpu_prototypes.h | 2 +- include/mpu_wrappers.h | 2 +- include/portable.h | 2 +- include/projdefs.h | 2 +- include/queue.h | 2 +- include/semphr.h | 2 +- include/stack_macros.h | 2 +- include/stdint.readme | 2 +- include/stream_buffer.h | 2 +- include/task.h | 2 +- include/timers.h | 2 +- list.c | 2 +- portable/ARMv8M/copy_files.py | 2 +- portable/ARMv8M/non_secure/port.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portasm.h | 2 +- .../secure/context/portable/GCC/ARM_CM23/secure_context_port.c | 2 +- .../secure/context/portable/GCC/ARM_CM33/secure_context_port.c | 2 +- .../context/portable/IAR/ARM_CM23/secure_context_port_asm.s | 2 +- .../context/portable/IAR/ARM_CM33/secure_context_port_asm.s | 2 +- portable/ARMv8M/secure/context/secure_context.c | 2 +- portable/ARMv8M/secure/context/secure_context.h | 2 +- portable/ARMv8M/secure/heap/secure_heap.c | 2 +- portable/ARMv8M/secure/heap/secure_heap.h | 2 +- portable/ARMv8M/secure/init/secure_init.c | 2 +- portable/ARMv8M/secure/init/secure_init.h | 2 +- portable/ARMv8M/secure/macros/secure_port_macros.h | 2 +- portable/BCC/16BitDOS/Flsh186/port.c | 2 +- portable/BCC/16BitDOS/Flsh186/prtmacro.h | 2 +- portable/BCC/16BitDOS/PC/port.c | 2 +- portable/BCC/16BitDOS/PC/prtmacro.h | 2 +- portable/BCC/16BitDOS/common/portasm.h | 2 +- portable/BCC/16BitDOS/common/portcomn.c | 2 +- portable/CCS/ARM_CM3/port.c | 2 +- portable/CCS/ARM_CM3/portasm.asm | 2 +- portable/CCS/ARM_CM3/portmacro.h | 2 +- portable/CCS/ARM_CM4F/port.c | 2 +- portable/CCS/ARM_CM4F/portasm.asm | 2 +- portable/CCS/ARM_CM4F/portmacro.h | 2 +- portable/CCS/ARM_Cortex-R4/port.c | 2 +- portable/CCS/ARM_Cortex-R4/portASM.asm | 2 +- portable/CCS/ARM_Cortex-R4/portmacro.h | 2 +- portable/CCS/MSP430X/data_model.h | 2 +- portable/CCS/MSP430X/port.c | 2 +- portable/CCS/MSP430X/portext.asm | 2 +- portable/CCS/MSP430X/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V1/port.c | 2 +- portable/CodeWarrior/ColdFire_V1/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V1/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V2/port.c | 2 +- portable/CodeWarrior/ColdFire_V2/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V2/portmacro.h | 2 +- portable/CodeWarrior/HCS12/port.c | 2 +- portable/CodeWarrior/HCS12/portmacro.h | 2 +- portable/Common/mpu_wrappers.c | 2 +- portable/GCC/ARM7_AT91FR40008/port.c | 2 +- portable/GCC/ARM7_AT91FR40008/portISR.c | 2 +- portable/GCC/ARM7_AT91FR40008/portmacro.h | 2 +- portable/GCC/ARM7_AT91SAM7S/port.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portISR.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portmacro.h | 2 +- portable/GCC/ARM7_LPC2000/port.c | 2 +- portable/GCC/ARM7_LPC2000/portISR.c | 2 +- portable/GCC/ARM7_LPC2000/portmacro.h | 2 +- portable/GCC/ARM7_LPC23xx/port.c | 2 +- portable/GCC/ARM7_LPC23xx/portISR.c | 2 +- portable/GCC/ARM7_LPC23xx/portmacro.h | 2 +- portable/GCC/ARM_CA53_64_BIT/port.c | 2 +- portable/GCC/ARM_CA53_64_BIT/portASM.S | 2 +- portable/GCC/ARM_CA53_64_BIT/portmacro.h | 2 +- portable/GCC/ARM_CA9/port.c | 2 +- portable/GCC/ARM_CA9/portASM.S | 2 +- portable/GCC/ARM_CA9/portmacro.h | 2 +- portable/GCC/ARM_CM0/port.c | 2 +- portable/GCC/ARM_CM0/portmacro.h | 2 +- portable/GCC/ARM_CM23/non_secure/port.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context.c | 2 +- portable/GCC/ARM_CM23/secure/secure_context.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM23/secure/secure_init.c | 2 +- portable/GCC/ARM_CM23/secure/secure_init.h | 2 +- portable/GCC/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM3/port.c | 2 +- portable/GCC/ARM_CM3/portmacro.h | 2 +- portable/GCC/ARM_CM33/non_secure/port.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context.c | 2 +- portable/GCC/ARM_CM33/secure/secure_context.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM33/secure/secure_init.c | 2 +- portable/GCC/ARM_CM33/secure/secure_init.h | 2 +- portable/GCC/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM3_MPU/port.c | 2 +- portable/GCC/ARM_CM3_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM4F/port.c | 2 +- portable/GCC/ARM_CM4F/portmacro.h | 2 +- portable/GCC/ARM_CM4_MPU/port.c | 2 +- portable/GCC/ARM_CM4_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM7/r0p1/port.c | 2 +- portable/GCC/ARM_CM7/r0p1/portmacro.h | 2 +- portable/GCC/ARM_CR5/port.c | 2 +- portable/GCC/ARM_CR5/portASM.S | 2 +- portable/GCC/ARM_CR5/portmacro.h | 2 +- portable/GCC/ARM_CRx_No_GIC/port.c | 2 +- portable/GCC/ARM_CRx_No_GIC/portASM.S | 2 +- portable/GCC/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/GCC/ATMega323/port.c | 2 +- portable/GCC/ATMega323/portmacro.h | 2 +- portable/GCC/AVR32_UC3/port.c | 2 +- portable/GCC/AVR32_UC3/portmacro.h | 2 +- portable/GCC/AVR_AVRDx/port.c | 2 +- portable/GCC/AVR_AVRDx/portmacro.h | 2 +- portable/GCC/AVR_Mega0/port.c | 2 +- portable/GCC/AVR_Mega0/portmacro.h | 2 +- portable/GCC/CORTUS_APS3/port.c | 2 +- portable/GCC/CORTUS_APS3/portmacro.h | 2 +- portable/GCC/ColdFire_V2/port.c | 2 +- portable/GCC/ColdFire_V2/portasm.S | 2 +- portable/GCC/ColdFire_V2/portmacro.h | 2 +- portable/GCC/H8S2329/port.c | 2 +- portable/GCC/H8S2329/portmacro.h | 2 +- portable/GCC/HCS12/port.c | 2 +- portable/GCC/HCS12/portmacro.h | 2 +- portable/GCC/IA32_flat/ISR_Support.h | 2 +- portable/GCC/IA32_flat/port.c | 2 +- portable/GCC/IA32_flat/portASM.S | 2 +- portable/GCC/IA32_flat/portmacro.h | 2 +- portable/GCC/MSP430F449/port.c | 2 +- portable/GCC/MSP430F449/portmacro.h | 2 +- portable/GCC/MicroBlaze/port.c | 2 +- portable/GCC/MicroBlaze/portasm.s | 2 +- portable/GCC/MicroBlaze/portmacro.h | 2 +- portable/GCC/MicroBlazeV8/port.c | 2 +- portable/GCC/MicroBlazeV8/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV8/portasm.S | 2 +- portable/GCC/MicroBlazeV8/portmacro.h | 2 +- portable/GCC/MicroBlazeV9/port.c | 2 +- portable/GCC/MicroBlazeV9/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV9/portasm.S | 2 +- portable/GCC/MicroBlazeV9/portmacro.h | 2 +- portable/GCC/NiosII/port.c | 2 +- portable/GCC/NiosII/port_asm.S | 2 +- portable/GCC/NiosII/portmacro.h | 2 +- portable/GCC/PPC405_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC405_Xilinx/port.c | 2 +- portable/GCC/PPC405_Xilinx/portasm.S | 2 +- portable/GCC/PPC405_Xilinx/portmacro.h | 2 +- portable/GCC/PPC440_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC440_Xilinx/port.c | 2 +- portable/GCC/PPC440_Xilinx/portasm.S | 2 +- portable/GCC/PPC440_Xilinx/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/GCC/RISC-V/port.c | 2 +- portable/GCC/RISC-V/portASM.S | 2 +- portable/GCC/RISC-V/portmacro.h | 2 +- portable/GCC/RL78/isr_support.h | 2 +- portable/GCC/RL78/port.c | 2 +- portable/GCC/RL78/portasm.S | 2 +- portable/GCC/RL78/portmacro.h | 2 +- portable/GCC/RX100/port.c | 2 +- portable/GCC/RX100/portmacro.h | 2 +- portable/GCC/RX200/port.c | 2 +- portable/GCC/RX200/portmacro.h | 2 +- portable/GCC/RX600/port.c | 2 +- portable/GCC/RX600/portmacro.h | 2 +- portable/GCC/RX600v2/port.c | 2 +- portable/GCC/RX600v2/portmacro.h | 2 +- portable/GCC/RX700v3_DPFPU/port.c | 2 +- portable/GCC/RX700v3_DPFPU/portmacro.h | 2 +- portable/GCC/STR75x/port.c | 2 +- portable/GCC/STR75x/portISR.c | 2 +- portable/GCC/STR75x/portmacro.h | 2 +- portable/GCC/TriCore_1782/port.c | 2 +- portable/GCC/TriCore_1782/portmacro.h | 2 +- portable/GCC/TriCore_1782/porttrap.c | 2 +- portable/IAR/78K0R/ISR_Support.h | 2 +- portable/IAR/78K0R/port.c | 2 +- portable/IAR/78K0R/portasm.s26 | 2 +- portable/IAR/78K0R/portmacro.h | 2 +- portable/IAR/ARM_CA5_No_GIC/port.c | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.h | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CA5_No_GIC/portmacro.h | 2 +- portable/IAR/ARM_CA9/port.c | 2 +- portable/IAR/ARM_CA9/portASM.h | 2 +- portable/IAR/ARM_CA9/portASM.s | 2 +- portable/IAR/ARM_CA9/portmacro.h | 2 +- portable/IAR/ARM_CM0/port.c | 2 +- portable/IAR/ARM_CM0/portasm.s | 2 +- portable/IAR/ARM_CM0/portmacro.h | 2 +- portable/IAR/ARM_CM23/non_secure/port.c | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context.c | 2 +- portable/IAR/ARM_CM23/secure/secure_context.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM23/secure/secure_init.c | 2 +- portable/IAR/ARM_CM23/secure/secure_init.h | 2 +- portable/IAR/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM3/port.c | 2 +- portable/IAR/ARM_CM3/portasm.s | 2 +- portable/IAR/ARM_CM3/portmacro.h | 2 +- portable/IAR/ARM_CM33/non_secure/port.c | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context.c | 2 +- portable/IAR/ARM_CM33/secure/secure_context.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM33/secure/secure_init.c | 2 +- portable/IAR/ARM_CM33/secure/secure_init.h | 2 +- portable/IAR/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM4F/port.c | 2 +- portable/IAR/ARM_CM4F/portasm.s | 2 +- portable/IAR/ARM_CM4F/portmacro.h | 2 +- portable/IAR/ARM_CM4F_MPU/port.c | 2 +- portable/IAR/ARM_CM4F_MPU/portasm.s | 2 +- portable/IAR/ARM_CM4F_MPU/portmacro.h | 2 +- portable/IAR/ARM_CM7/r0p1/port.c | 2 +- portable/IAR/ARM_CM7/r0p1/portasm.s | 2 +- portable/IAR/ARM_CM7/r0p1/portmacro.h | 2 +- portable/IAR/ARM_CRx_No_GIC/port.c | 2 +- portable/IAR/ARM_CRx_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/IAR/ATMega323/port.c | 2 +- portable/IAR/ATMega323/portmacro.h | 2 +- portable/IAR/ATMega323/portmacro.s90 | 2 +- portable/IAR/AVR32_UC3/port.c | 2 +- portable/IAR/AVR32_UC3/portmacro.h | 2 +- portable/IAR/AVR_AVRDx/port.c | 2 +- portable/IAR/AVR_AVRDx/portmacro.h | 2 +- portable/IAR/AVR_AVRDx/portmacro.s90 | 2 +- portable/IAR/AVR_Mega0/port.c | 2 +- portable/IAR/AVR_Mega0/portmacro.h | 2 +- portable/IAR/AVR_Mega0/portmacro.s90 | 2 +- portable/IAR/AtmelSAM7S64/ISR_Support.h | 2 +- portable/IAR/AtmelSAM7S64/port.c | 2 +- portable/IAR/AtmelSAM7S64/portasm.s79 | 2 +- portable/IAR/AtmelSAM7S64/portmacro.h | 2 +- portable/IAR/AtmelSAM9XE/port.c | 2 +- portable/IAR/AtmelSAM9XE/portmacro.h | 2 +- portable/IAR/LPC2000/ISR_Support.h | 2 +- portable/IAR/LPC2000/port.c | 2 +- portable/IAR/LPC2000/portasm.s79 | 2 +- portable/IAR/LPC2000/portmacro.h | 2 +- portable/IAR/MSP430/port.c | 2 +- portable/IAR/MSP430/portasm.h | 2 +- portable/IAR/MSP430/portext.s43 | 2 +- portable/IAR/MSP430/portmacro.h | 2 +- portable/IAR/MSP430X/data_model.h | 2 +- portable/IAR/MSP430X/port.c | 2 +- portable/IAR/MSP430X/portext.s43 | 2 +- portable/IAR/MSP430X/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/IAR/RISC-V/port.c | 2 +- portable/IAR/RISC-V/portASM.s | 2 +- portable/IAR/RISC-V/portmacro.h | 2 +- portable/IAR/RL78/ISR_Support.h | 2 +- portable/IAR/RL78/port.c | 2 +- portable/IAR/RL78/portasm.s87 | 2 +- portable/IAR/RL78/portmacro.h | 2 +- portable/IAR/RX100/port.c | 2 +- portable/IAR/RX100/port_asm.s | 2 +- portable/IAR/RX100/portmacro.h | 2 +- portable/IAR/RX600/port.c | 2 +- portable/IAR/RX600/port_asm.s | 2 +- portable/IAR/RX600/portmacro.h | 2 +- portable/IAR/RX700v3_DPFPU/port.c | 2 +- portable/IAR/RX700v3_DPFPU/portmacro.h | 2 +- portable/IAR/RXv2/port.c | 2 +- portable/IAR/RXv2/port_asm.s | 2 +- portable/IAR/RXv2/portmacro.h | 2 +- portable/IAR/STR71x/ISR_Support.h | 2 +- portable/IAR/STR71x/port.c | 2 +- portable/IAR/STR71x/portasm.s79 | 2 +- portable/IAR/STR71x/portmacro.h | 2 +- portable/IAR/STR75x/ISR_Support.h | 2 +- portable/IAR/STR75x/port.c | 2 +- portable/IAR/STR75x/portasm.s79 | 2 +- portable/IAR/STR75x/portmacro.h | 2 +- portable/IAR/STR91x/ISR_Support.h | 2 +- portable/IAR/STR91x/port.c | 2 +- portable/IAR/STR91x/portasm.s79 | 2 +- portable/IAR/STR91x/portmacro.h | 2 +- portable/IAR/V850ES/ISR_Support.h | 2 +- portable/IAR/V850ES/port.c | 2 +- portable/IAR/V850ES/portasm.s85 | 2 +- portable/IAR/V850ES/portasm_Fx3.s85 | 2 +- portable/IAR/V850ES/portasm_Hx2.s85 | 2 +- portable/IAR/V850ES/portmacro.h | 2 +- portable/MPLAB/PIC18F/port.c | 2 +- portable/MPLAB/PIC18F/portmacro.h | 2 +- portable/MPLAB/PIC24_dsPIC/port.c | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S | 2 +- portable/MPLAB/PIC24_dsPIC/portmacro.h | 2 +- portable/MPLAB/PIC32MEC14xx/ISR_Support.h | 2 +- portable/MPLAB/PIC32MEC14xx/port.c | 2 +- portable/MPLAB/PIC32MEC14xx/port_asm.S | 2 +- portable/MPLAB/PIC32MEC14xx/portmacro.h | 2 +- portable/MPLAB/PIC32MX/ISR_Support.h | 2 +- portable/MPLAB/PIC32MX/port.c | 2 +- portable/MPLAB/PIC32MX/port_asm.S | 2 +- portable/MPLAB/PIC32MX/portmacro.h | 2 +- portable/MPLAB/PIC32MZ/ISR_Support.h | 2 +- portable/MPLAB/PIC32MZ/port.c | 2 +- portable/MPLAB/PIC32MZ/port_asm.S | 2 +- portable/MPLAB/PIC32MZ/portmacro.h | 2 +- portable/MSVC-MingW/port.c | 2 +- portable/MSVC-MingW/portmacro.h | 2 +- portable/MemMang/heap_1.c | 2 +- portable/MemMang/heap_2.c | 2 +- portable/MemMang/heap_3.c | 2 +- portable/MemMang/heap_4.c | 2 +- portable/MemMang/heap_5.c | 2 +- portable/MikroC/ARM_CM4F/port.c | 2 +- portable/MikroC/ARM_CM4F/portmacro.h | 2 +- portable/Paradigm/Tern_EE/large_untested/port.c | 2 +- portable/Paradigm/Tern_EE/large_untested/portasm.h | 2 +- portable/Paradigm/Tern_EE/large_untested/portmacro.h | 2 +- portable/Paradigm/Tern_EE/small/port.c | 2 +- portable/Paradigm/Tern_EE/small/portasm.h | 2 +- portable/Paradigm/Tern_EE/small/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/port.c | 2 +- portable/RVDS/ARM7_LPC21xx/portASM.s | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.inc | 2 +- portable/RVDS/ARM_CA9/port.c | 2 +- portable/RVDS/ARM_CA9/portASM.s | 2 +- portable/RVDS/ARM_CA9/portmacro.h | 2 +- portable/RVDS/ARM_CA9/portmacro.inc | 2 +- portable/RVDS/ARM_CM0/port.c | 2 +- portable/RVDS/ARM_CM0/portmacro.h | 2 +- portable/RVDS/ARM_CM3/port.c | 2 +- portable/RVDS/ARM_CM3/portmacro.h | 2 +- portable/RVDS/ARM_CM4F/port.c | 2 +- portable/RVDS/ARM_CM4F/portmacro.h | 2 +- portable/RVDS/ARM_CM4_MPU/port.c | 2 +- portable/RVDS/ARM_CM4_MPU/portmacro.h | 2 +- portable/RVDS/ARM_CM7/r0p1/port.c | 2 +- portable/RVDS/ARM_CM7/r0p1/portmacro.h | 2 +- portable/Renesas/RX100/port.c | 2 +- portable/Renesas/RX100/port_asm.src | 2 +- portable/Renesas/RX100/portmacro.h | 2 +- portable/Renesas/RX200/port.c | 2 +- portable/Renesas/RX200/port_asm.src | 2 +- portable/Renesas/RX200/portmacro.h | 2 +- portable/Renesas/RX600/port.c | 2 +- portable/Renesas/RX600/port_asm.src | 2 +- portable/Renesas/RX600/portmacro.h | 2 +- portable/Renesas/RX600v2/port.c | 2 +- portable/Renesas/RX600v2/port_asm.src | 2 +- portable/Renesas/RX600v2/portmacro.h | 2 +- portable/Renesas/RX700v3_DPFPU/port.c | 2 +- portable/Renesas/RX700v3_DPFPU/port_asm.src | 2 +- portable/Renesas/RX700v3_DPFPU/portmacro.h | 2 +- portable/Renesas/SH2A_FPU/ISR_Support.inc | 2 +- portable/Renesas/SH2A_FPU/port.c | 2 +- portable/Renesas/SH2A_FPU/portasm.src | 2 +- portable/Renesas/SH2A_FPU/portmacro.h | 2 +- portable/Rowley/MSP430F449/port.c | 2 +- portable/Rowley/MSP430F449/portasm.h | 2 +- portable/Rowley/MSP430F449/portext.asm | 2 +- portable/Rowley/MSP430F449/portmacro.h | 2 +- portable/SDCC/Cygnal/port.c | 2 +- portable/SDCC/Cygnal/portmacro.h | 2 +- portable/Softune/MB91460/port.c | 2 +- portable/Softune/MB91460/portmacro.h | 2 +- portable/Softune/MB96340/port.c | 2 +- portable/Softune/MB96340/portmacro.h | 2 +- portable/Tasking/ARM_CM4F/port.c | 2 +- portable/Tasking/ARM_CM4F/port_asm.asm | 2 +- portable/Tasking/ARM_CM4F/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/port.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_v1/port.c | 2 +- portable/ThirdParty/GCC/ARC_v1/portmacro.h | 2 +- portable/ThirdParty/GCC/ATmega/port.c | 2 +- portable/ThirdParty/GCC/ATmega/portmacro.h | 2 +- portable/ThirdParty/GCC/Posix/port.c | 2 +- portable/ThirdParty/GCC/Posix/portmacro.h | 2 +- portable/ThirdParty/XCC/Xtensa/port.c | 2 +- portable/ThirdParty/XCC/Xtensa/portmacro.h | 2 +- portable/WizC/PIC18/Drivers/Tick/Tick.c | 2 +- portable/WizC/PIC18/Drivers/Tick/isrTick.c | 2 +- portable/WizC/PIC18/addFreeRTOS.h | 2 +- portable/WizC/PIC18/port.c | 2 +- portable/WizC/PIC18/portmacro.h | 2 +- portable/oWatcom/16BitDOS/Flsh186/port.c | 2 +- portable/oWatcom/16BitDOS/Flsh186/portmacro.h | 2 +- portable/oWatcom/16BitDOS/PC/port.c | 2 +- portable/oWatcom/16BitDOS/PC/portmacro.h | 2 +- portable/oWatcom/16BitDOS/common/portasm.h | 2 +- portable/oWatcom/16BitDOS/common/portcomn.c | 2 +- queue.c | 2 +- stream_buffer.c | 2 +- tasks.c | 2 +- timers.c | 2 +- 461 files changed, 461 insertions(+), 461 deletions(-) diff --git a/croutine.c b/croutine.c index f57e8aa89..9de385d28 100644 --- a/croutine.c +++ b/croutine.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/event_groups.c b/event_groups.c index 04f5839a0..aeaf8423f 100644 --- a/event_groups.c +++ b/event_groups.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/FreeRTOS.h b/include/FreeRTOS.h index 61a45ab06..fbd5bde45 100644 --- a/include/FreeRTOS.h +++ b/include/FreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/StackMacros.h b/include/StackMacros.h index 5f0923133..ff2179101 100644 --- a/include/StackMacros.h +++ b/include/StackMacros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/atomic.h b/include/atomic.h index 6d63bd459..75c25291e 100644 --- a/include/atomic.h +++ b/include/atomic.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/croutine.h b/include/croutine.h index ff99ffbba..517fcb74e 100644 --- a/include/croutine.h +++ b/include/croutine.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/deprecated_definitions.h b/include/deprecated_definitions.h index 149d3ce06..1823f942d 100644 --- a/include/deprecated_definitions.h +++ b/include/deprecated_definitions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/event_groups.h b/include/event_groups.h index fb8a7896b..036ef8e9f 100644 --- a/include/event_groups.h +++ b/include/event_groups.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/list.h b/include/list.h index e4d8f6ec4..b9ba425cb 100644 --- a/include/list.h +++ b/include/list.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/message_buffer.h b/include/message_buffer.h index 0c623c4c3..7413d5406 100644 --- a/include/message_buffer.h +++ b/include/message_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/mpu_prototypes.h b/include/mpu_prototypes.h index e55a9b327..8348bb0f9 100644 --- a/include/mpu_prototypes.h +++ b/include/mpu_prototypes.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h index 8fbce8e9b..285876740 100644 --- a/include/mpu_wrappers.h +++ b/include/mpu_wrappers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/portable.h b/include/portable.h index 54d2fb840..250f9b4eb 100644 --- a/include/portable.h +++ b/include/portable.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/projdefs.h b/include/projdefs.h index 13702c497..575eefb07 100644 --- a/include/projdefs.h +++ b/include/projdefs.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/queue.h b/include/queue.h index 9af7227bf..bc0f6f04d 100644 --- a/include/queue.h +++ b/include/queue.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/semphr.h b/include/semphr.h index 3448b78c1..089dc9efc 100644 --- a/include/semphr.h +++ b/include/semphr.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/stack_macros.h b/include/stack_macros.h index 5cdb28f04..a127e3d80 100644 --- a/include/stack_macros.h +++ b/include/stack_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/stdint.readme b/include/stdint.readme index 2e77f47f2..b4142b5d0 100644 --- a/include/stdint.readme +++ b/include/stdint.readme @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/stream_buffer.h b/include/stream_buffer.h index d2cf42d7f..a63ba2b53 100644 --- a/include/stream_buffer.h +++ b/include/stream_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/task.h b/include/task.h index 3c02f7ab0..39f2a1c68 100644 --- a/include/task.h +++ b/include/task.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/timers.h b/include/timers.h index 453988bbd..9a19c83b0 100644 --- a/include/timers.h +++ b/include/timers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/list.c b/list.c index 80e62cc71..be9820287 100644 --- a/list.c +++ b/list.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/copy_files.py b/portable/ARMv8M/copy_files.py index 7fb938119..007ac2019 100644 --- a/portable/ARMv8M/copy_files.py +++ b/portable/ARMv8M/copy_files.py @@ -1,5 +1,5 @@ #/* -# * FreeRTOS Kernel V10.4.3 LTS Patch 1 +# * FreeRTOS Kernel V10.4.3 LTS Patch 2 # * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index f83648d19..c2b5b6d75 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index 131abe1e6..d7594edee 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h index eb4b3dd38..aecd0e7d9 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c index c1f1e38f5..fcbe13633 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h index eb4b3dd38..aecd0e7d9 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c index 110f5f920..9fc9acdf8 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h index fc24117c8..f0db23ee5 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c index 3f67b9e23..c66cb8e6f 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h index fc24117c8..f0db23ee5 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s index cc6eee075..0de800c24 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h index 899098358..47f31376b 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s index c068f80f0..8d37ccebd 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h index 3bffd21ad..ec11ee161 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s index 9e4205d5e..9e1d1c266 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h index fd9a9fde4..8fcf49c68 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s index 50efdb301..be65e0650 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h index fd9a9fde4..8fcf49c68 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portasm.h b/portable/ARMv8M/non_secure/portasm.h index 165c9d3ea..4ddda5e23 100644 --- a/portable/ARMv8M/non_secure/portasm.h +++ b/portable/ARMv8M/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c index 28220ba58..cc41c5ebf 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c index 6c7ec746f..9166722fa 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s index eb8fbcd5c..eee87898c 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s index c92a8af65..761d62e25 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c index bd73c5795..5d6ac9ad5 100644 --- a/portable/ARMv8M/secure/context/secure_context.c +++ b/portable/ARMv8M/secure/context/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/secure_context.h b/portable/ARMv8M/secure/context/secure_context.h index 1069db151..3786ddbc1 100644 --- a/portable/ARMv8M/secure/context/secure_context.h +++ b/portable/ARMv8M/secure/context/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/heap/secure_heap.c b/portable/ARMv8M/secure/heap/secure_heap.c index bfb88c971..8a91f39fd 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.c +++ b/portable/ARMv8M/secure/heap/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/heap/secure_heap.h b/portable/ARMv8M/secure/heap/secure_heap.h index a89e5b334..2c3bf4851 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.h +++ b/portable/ARMv8M/secure/heap/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/init/secure_init.c b/portable/ARMv8M/secure/init/secure_init.c index d78346391..f80db5aac 100644 --- a/portable/ARMv8M/secure/init/secure_init.c +++ b/portable/ARMv8M/secure/init/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/init/secure_init.h b/portable/ARMv8M/secure/init/secure_init.h index 9d021f741..26690d68c 100644 --- a/portable/ARMv8M/secure/init/secure_init.h +++ b/portable/ARMv8M/secure/init/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/macros/secure_port_macros.h b/portable/ARMv8M/secure/macros/secure_port_macros.h index 7faf15190..7181c3496 100644 --- a/portable/ARMv8M/secure/macros/secure_port_macros.h +++ b/portable/ARMv8M/secure/macros/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/Flsh186/port.c b/portable/BCC/16BitDOS/Flsh186/port.c index 01e37d0ef..eba89ffc6 100644 --- a/portable/BCC/16BitDOS/Flsh186/port.c +++ b/portable/BCC/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/Flsh186/prtmacro.h b/portable/BCC/16BitDOS/Flsh186/prtmacro.h index e7f275ff7..bd8a75c8d 100644 --- a/portable/BCC/16BitDOS/Flsh186/prtmacro.h +++ b/portable/BCC/16BitDOS/Flsh186/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/PC/port.c b/portable/BCC/16BitDOS/PC/port.c index 37edd53f7..26b65b616 100644 --- a/portable/BCC/16BitDOS/PC/port.c +++ b/portable/BCC/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/PC/prtmacro.h b/portable/BCC/16BitDOS/PC/prtmacro.h index 8c922679b..54551561a 100644 --- a/portable/BCC/16BitDOS/PC/prtmacro.h +++ b/portable/BCC/16BitDOS/PC/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/common/portasm.h b/portable/BCC/16BitDOS/common/portasm.h index 5dddc21d1..30959d438 100644 --- a/portable/BCC/16BitDOS/common/portasm.h +++ b/portable/BCC/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/common/portcomn.c b/portable/BCC/16BitDOS/common/portcomn.c index 2ab92e312..62429c940 100644 --- a/portable/BCC/16BitDOS/common/portcomn.c +++ b/portable/BCC/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM3/port.c b/portable/CCS/ARM_CM3/port.c index 20b53fd93..3c794120d 100644 --- a/portable/CCS/ARM_CM3/port.c +++ b/portable/CCS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM3/portasm.asm b/portable/CCS/ARM_CM3/portasm.asm index aede25970..2bec3600d 100644 --- a/portable/CCS/ARM_CM3/portasm.asm +++ b/portable/CCS/ARM_CM3/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM3/portmacro.h b/portable/CCS/ARM_CM3/portmacro.h index ea3f6d5fb..820cd6e05 100644 --- a/portable/CCS/ARM_CM3/portmacro.h +++ b/portable/CCS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM4F/port.c b/portable/CCS/ARM_CM4F/port.c index c0f4a8854..53d4581f2 100644 --- a/portable/CCS/ARM_CM4F/port.c +++ b/portable/CCS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM4F/portasm.asm b/portable/CCS/ARM_CM4F/portasm.asm index c62743ca5..6e12e30b2 100644 --- a/portable/CCS/ARM_CM4F/portasm.asm +++ b/portable/CCS/ARM_CM4F/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM4F/portmacro.h b/portable/CCS/ARM_CM4F/portmacro.h index eb625d786..bdb15f705 100644 --- a/portable/CCS/ARM_CM4F/portmacro.h +++ b/portable/CCS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_Cortex-R4/port.c b/portable/CCS/ARM_Cortex-R4/port.c index b76b8c3ac..15b5406bd 100644 --- a/portable/CCS/ARM_Cortex-R4/port.c +++ b/portable/CCS/ARM_Cortex-R4/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_Cortex-R4/portASM.asm b/portable/CCS/ARM_Cortex-R4/portASM.asm index 085e303bb..9b87ba674 100644 --- a/portable/CCS/ARM_Cortex-R4/portASM.asm +++ b/portable/CCS/ARM_Cortex-R4/portASM.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_Cortex-R4/portmacro.h b/portable/CCS/ARM_Cortex-R4/portmacro.h index 5553f1532..615ee5502 100644 --- a/portable/CCS/ARM_Cortex-R4/portmacro.h +++ b/portable/CCS/ARM_Cortex-R4/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/data_model.h b/portable/CCS/MSP430X/data_model.h index 3216ee0a9..5c0a7b969 100644 --- a/portable/CCS/MSP430X/data_model.h +++ b/portable/CCS/MSP430X/data_model.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/port.c b/portable/CCS/MSP430X/port.c index 44607f438..57baf9138 100644 --- a/portable/CCS/MSP430X/port.c +++ b/portable/CCS/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/portext.asm b/portable/CCS/MSP430X/portext.asm index 5216e4649..c33530e05 100644 --- a/portable/CCS/MSP430X/portext.asm +++ b/portable/CCS/MSP430X/portext.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/portmacro.h b/portable/CCS/MSP430X/portmacro.h index 2d3b14fd9..fdc048a78 100644 --- a/portable/CCS/MSP430X/portmacro.h +++ b/portable/CCS/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V1/port.c b/portable/CodeWarrior/ColdFire_V1/port.c index 37bcc6989..c819cf4c7 100644 --- a/portable/CodeWarrior/ColdFire_V1/port.c +++ b/portable/CodeWarrior/ColdFire_V1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V1/portasm.S b/portable/CodeWarrior/ColdFire_V1/portasm.S index aef052b8b..f94560aa2 100644 --- a/portable/CodeWarrior/ColdFire_V1/portasm.S +++ b/portable/CodeWarrior/ColdFire_V1/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V1/portmacro.h b/portable/CodeWarrior/ColdFire_V1/portmacro.h index d84bbaac0..57a48af94 100644 --- a/portable/CodeWarrior/ColdFire_V1/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V2/port.c b/portable/CodeWarrior/ColdFire_V2/port.c index 760bba5fc..2fb900860 100644 --- a/portable/CodeWarrior/ColdFire_V2/port.c +++ b/portable/CodeWarrior/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V2/portasm.S b/portable/CodeWarrior/ColdFire_V2/portasm.S index 5d0700b73..430ee3122 100644 --- a/portable/CodeWarrior/ColdFire_V2/portasm.S +++ b/portable/CodeWarrior/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V2/portmacro.h b/portable/CodeWarrior/ColdFire_V2/portmacro.h index 4ff294222..1ab089fb3 100644 --- a/portable/CodeWarrior/ColdFire_V2/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/HCS12/port.c b/portable/CodeWarrior/HCS12/port.c index 907532bf5..637d2a538 100644 --- a/portable/CodeWarrior/HCS12/port.c +++ b/portable/CodeWarrior/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/HCS12/portmacro.h b/portable/CodeWarrior/HCS12/portmacro.h index 30171d33e..d5beaf43e 100644 --- a/portable/CodeWarrior/HCS12/portmacro.h +++ b/portable/CodeWarrior/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index 571676a24..53b8d1117 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91FR40008/port.c b/portable/GCC/ARM7_AT91FR40008/port.c index 1a6845ebc..13c813ce3 100644 --- a/portable/GCC/ARM7_AT91FR40008/port.c +++ b/portable/GCC/ARM7_AT91FR40008/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91FR40008/portISR.c b/portable/GCC/ARM7_AT91FR40008/portISR.c index d66958028..b80061f24 100644 --- a/portable/GCC/ARM7_AT91FR40008/portISR.c +++ b/portable/GCC/ARM7_AT91FR40008/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91FR40008/portmacro.h b/portable/GCC/ARM7_AT91FR40008/portmacro.h index 3aa0a69e9..5bcd6aa52 100644 --- a/portable/GCC/ARM7_AT91FR40008/portmacro.h +++ b/portable/GCC/ARM7_AT91FR40008/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91SAM7S/port.c b/portable/GCC/ARM7_AT91SAM7S/port.c index a80812256..eb5f47fd5 100644 --- a/portable/GCC/ARM7_AT91SAM7S/port.c +++ b/portable/GCC/ARM7_AT91SAM7S/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91SAM7S/portISR.c b/portable/GCC/ARM7_AT91SAM7S/portISR.c index 1b33ea21c..1d1be5fb2 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portISR.c +++ b/portable/GCC/ARM7_AT91SAM7S/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/portable/GCC/ARM7_AT91SAM7S/portmacro.h index d2ee2b37f..f00ce4054 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portmacro.h +++ b/portable/GCC/ARM7_AT91SAM7S/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC2000/port.c b/portable/GCC/ARM7_LPC2000/port.c index 97f56e1a7..4b30fe24f 100644 --- a/portable/GCC/ARM7_LPC2000/port.c +++ b/portable/GCC/ARM7_LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC2000/portISR.c b/portable/GCC/ARM7_LPC2000/portISR.c index 04148ff2d..1c29c6998 100644 --- a/portable/GCC/ARM7_LPC2000/portISR.c +++ b/portable/GCC/ARM7_LPC2000/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC2000/portmacro.h b/portable/GCC/ARM7_LPC2000/portmacro.h index 60ecdb31c..150d91a7a 100644 --- a/portable/GCC/ARM7_LPC2000/portmacro.h +++ b/portable/GCC/ARM7_LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC23xx/port.c b/portable/GCC/ARM7_LPC23xx/port.c index 4036ee958..ecc05ac79 100644 --- a/portable/GCC/ARM7_LPC23xx/port.c +++ b/portable/GCC/ARM7_LPC23xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC23xx/portISR.c b/portable/GCC/ARM7_LPC23xx/portISR.c index 293b15475..916e57782 100644 --- a/portable/GCC/ARM7_LPC23xx/portISR.c +++ b/portable/GCC/ARM7_LPC23xx/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC23xx/portmacro.h b/portable/GCC/ARM7_LPC23xx/portmacro.h index cf56e23b6..d75f2554c 100644 --- a/portable/GCC/ARM7_LPC23xx/portmacro.h +++ b/portable/GCC/ARM7_LPC23xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA53_64_BIT/port.c b/portable/GCC/ARM_CA53_64_BIT/port.c index 3e673190e..470e629b4 100644 --- a/portable/GCC/ARM_CA53_64_BIT/port.c +++ b/portable/GCC/ARM_CA53_64_BIT/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA53_64_BIT/portASM.S b/portable/GCC/ARM_CA53_64_BIT/portASM.S index dec4cfe4e..7dd3ea361 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portASM.S +++ b/portable/GCC/ARM_CA53_64_BIT/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA53_64_BIT/portmacro.h b/portable/GCC/ARM_CA53_64_BIT/portmacro.h index 6df470490..6c2610776 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portmacro.h +++ b/portable/GCC/ARM_CA53_64_BIT/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA9/port.c b/portable/GCC/ARM_CA9/port.c index e02eacf4f..c003d2dcd 100644 --- a/portable/GCC/ARM_CA9/port.c +++ b/portable/GCC/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA9/portASM.S b/portable/GCC/ARM_CA9/portASM.S index c719257f5..6f2326ba6 100644 --- a/portable/GCC/ARM_CA9/portASM.S +++ b/portable/GCC/ARM_CA9/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA9/portmacro.h b/portable/GCC/ARM_CA9/portmacro.h index 540f7dfc5..6e561847a 100644 --- a/portable/GCC/ARM_CA9/portmacro.h +++ b/portable/GCC/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM0/port.c b/portable/GCC/ARM_CM0/port.c index 6b96336b7..a5dd3e116 100644 --- a/portable/GCC/ARM_CM0/port.c +++ b/portable/GCC/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM0/portmacro.h b/portable/GCC/ARM_CM0/portmacro.h index b6c69dbe8..350340f8c 100644 --- a/portable/GCC/ARM_CM0/portmacro.h +++ b/portable/GCC/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index c9f28ce2b..28cebb9fd 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index 131abe1e6..d7594edee 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.h b/portable/GCC/ARM_CM23/non_secure/portasm.h index 165c9d3ea..4ddda5e23 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/portmacro.h b/portable/GCC/ARM_CM23/non_secure/portmacro.h index eb4b3dd38..aecd0e7d9 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c index bd73c5795..5d6ac9ad5 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/portable/GCC/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_context.h b/portable/GCC/ARM_CM23/secure/secure_context.h index 1069db151..3786ddbc1 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.h +++ b/portable/GCC/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_context_port.c b/portable/GCC/ARM_CM23/secure/secure_context_port.c index 28220ba58..cc41c5ebf 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM23/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.c b/portable/GCC/ARM_CM23/secure/secure_heap.c index bfb88c971..8a91f39fd 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.c +++ b/portable/GCC/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.h b/portable/GCC/ARM_CM23/secure/secure_heap.h index a89e5b334..2c3bf4851 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.h +++ b/portable/GCC/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_init.c b/portable/GCC/ARM_CM23/secure/secure_init.c index d78346391..f80db5aac 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.c +++ b/portable/GCC/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_init.h b/portable/GCC/ARM_CM23/secure/secure_init.h index 9d021f741..26690d68c 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.h +++ b/portable/GCC/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_port_macros.h b/portable/GCC/ARM_CM23/secure/secure_port_macros.h index 7faf15190..7181c3496 100644 --- a/portable/GCC/ARM_CM23/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index f83648d19..c2b5b6d75 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index c1f1e38f5..fcbe13633 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h index 165c9d3ea..4ddda5e23 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h index eb4b3dd38..aecd0e7d9 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3/port.c b/portable/GCC/ARM_CM3/port.c index d4735dc4c..4df297db9 100644 --- a/portable/GCC/ARM_CM3/port.c +++ b/portable/GCC/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3/portmacro.h b/portable/GCC/ARM_CM3/portmacro.h index 40d04155c..42a5f5b85 100644 --- a/portable/GCC/ARM_CM3/portmacro.h +++ b/portable/GCC/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index f83648d19..c2b5b6d75 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.c b/portable/GCC/ARM_CM33/non_secure/portasm.c index 110f5f920..9fc9acdf8 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.h b/portable/GCC/ARM_CM33/non_secure/portasm.h index 165c9d3ea..4ddda5e23 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/portmacro.h b/portable/GCC/ARM_CM33/non_secure/portmacro.h index fc24117c8..f0db23ee5 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c index bd73c5795..5d6ac9ad5 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/portable/GCC/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_context.h b/portable/GCC/ARM_CM33/secure/secure_context.h index 1069db151..3786ddbc1 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.h +++ b/portable/GCC/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_context_port.c b/portable/GCC/ARM_CM33/secure/secure_context_port.c index 6c7ec746f..9166722fa 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM33/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.c b/portable/GCC/ARM_CM33/secure/secure_heap.c index bfb88c971..8a91f39fd 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.c +++ b/portable/GCC/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.h b/portable/GCC/ARM_CM33/secure/secure_heap.h index a89e5b334..2c3bf4851 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.h +++ b/portable/GCC/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_init.c b/portable/GCC/ARM_CM33/secure/secure_init.c index d78346391..f80db5aac 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.c +++ b/portable/GCC/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_init.h b/portable/GCC/ARM_CM33/secure/secure_init.h index 9d021f741..26690d68c 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.h +++ b/portable/GCC/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_port_macros.h b/portable/GCC/ARM_CM33/secure/secure_port_macros.h index 7faf15190..7181c3496 100644 --- a/portable/GCC/ARM_CM33/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index c9f28ce2b..28cebb9fd 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c index 3f67b9e23..c66cb8e6f 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h index 165c9d3ea..4ddda5e23 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h index fc24117c8..f0db23ee5 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index 49a84e542..f14279a6e 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h index e0024bd27..ff4232b3c 100644 --- a/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4F/port.c b/portable/GCC/ARM_CM4F/port.c index a44c06e87..638db0573 100644 --- a/portable/GCC/ARM_CM4F/port.c +++ b/portable/GCC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4F/portmacro.h b/portable/GCC/ARM_CM4F/portmacro.h index 9b1723703..938d959df 100644 --- a/portable/GCC/ARM_CM4F/portmacro.h +++ b/portable/GCC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index 90f215683..8863ca5ae 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h index b2e3ea04b..77c4ec880 100644 --- a/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM7/r0p1/port.c b/portable/GCC/ARM_CM7/r0p1/port.c index 93df85f4b..fc141754f 100644 --- a/portable/GCC/ARM_CM7/r0p1/port.c +++ b/portable/GCC/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM7/r0p1/portmacro.h b/portable/GCC/ARM_CM7/r0p1/portmacro.h index 459092060..83ba1ef25 100644 --- a/portable/GCC/ARM_CM7/r0p1/portmacro.h +++ b/portable/GCC/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CR5/port.c b/portable/GCC/ARM_CR5/port.c index 6bd9eb2dd..1016e595e 100644 --- a/portable/GCC/ARM_CR5/port.c +++ b/portable/GCC/ARM_CR5/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CR5/portASM.S b/portable/GCC/ARM_CR5/portASM.S index 5f5ceb89d..420da3998 100644 --- a/portable/GCC/ARM_CR5/portASM.S +++ b/portable/GCC/ARM_CR5/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CR5/portmacro.h b/portable/GCC/ARM_CR5/portmacro.h index b3f127a9d..b32b3702a 100644 --- a/portable/GCC/ARM_CR5/portmacro.h +++ b/portable/GCC/ARM_CR5/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CRx_No_GIC/port.c b/portable/GCC/ARM_CRx_No_GIC/port.c index 1ad3e0278..0699af761 100644 --- a/portable/GCC/ARM_CRx_No_GIC/port.c +++ b/portable/GCC/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CRx_No_GIC/portASM.S b/portable/GCC/ARM_CRx_No_GIC/portASM.S index 08630ef05..35b7139d8 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portASM.S +++ b/portable/GCC/ARM_CRx_No_GIC/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CRx_No_GIC/portmacro.h b/portable/GCC/ARM_CRx_No_GIC/portmacro.h index a2ecdf02b..7bd21853a 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portmacro.h +++ b/portable/GCC/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ATMega323/port.c b/portable/GCC/ATMega323/port.c index 15121da24..7e5878b0c 100644 --- a/portable/GCC/ATMega323/port.c +++ b/portable/GCC/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ATMega323/portmacro.h b/portable/GCC/ATMega323/portmacro.h index b517fdbe7..10798b761 100644 --- a/portable/GCC/ATMega323/portmacro.h +++ b/portable/GCC/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR32_UC3/port.c b/portable/GCC/AVR32_UC3/port.c index fe4250bef..b62c2a131 100644 --- a/portable/GCC/AVR32_UC3/port.c +++ b/portable/GCC/AVR32_UC3/port.c @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR32_UC3/portmacro.h b/portable/GCC/AVR32_UC3/portmacro.h index 6b7d43e5e..4ff11fba4 100644 --- a/portable/GCC/AVR32_UC3/portmacro.h +++ b/portable/GCC/AVR32_UC3/portmacro.h @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_AVRDx/port.c b/portable/GCC/AVR_AVRDx/port.c index 70e8a85b0..169e19d38 100644 --- a/portable/GCC/AVR_AVRDx/port.c +++ b/portable/GCC/AVR_AVRDx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_AVRDx/portmacro.h b/portable/GCC/AVR_AVRDx/portmacro.h index 7312081d6..415d694fd 100644 --- a/portable/GCC/AVR_AVRDx/portmacro.h +++ b/portable/GCC/AVR_AVRDx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_Mega0/port.c b/portable/GCC/AVR_Mega0/port.c index 3068028e8..f50fadb4f 100644 --- a/portable/GCC/AVR_Mega0/port.c +++ b/portable/GCC/AVR_Mega0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_Mega0/portmacro.h b/portable/GCC/AVR_Mega0/portmacro.h index 0155cc9f6..d0670a285 100644 --- a/portable/GCC/AVR_Mega0/portmacro.h +++ b/portable/GCC/AVR_Mega0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/CORTUS_APS3/port.c b/portable/GCC/CORTUS_APS3/port.c index 467e093d6..abd8247df 100644 --- a/portable/GCC/CORTUS_APS3/port.c +++ b/portable/GCC/CORTUS_APS3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/CORTUS_APS3/portmacro.h b/portable/GCC/CORTUS_APS3/portmacro.h index 58af4e7c0..e919c9d99 100644 --- a/portable/GCC/CORTUS_APS3/portmacro.h +++ b/portable/GCC/CORTUS_APS3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ColdFire_V2/port.c b/portable/GCC/ColdFire_V2/port.c index abfef1eff..68a7ba2dc 100644 --- a/portable/GCC/ColdFire_V2/port.c +++ b/portable/GCC/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ColdFire_V2/portasm.S b/portable/GCC/ColdFire_V2/portasm.S index 986006866..6be04eefc 100644 --- a/portable/GCC/ColdFire_V2/portasm.S +++ b/portable/GCC/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ColdFire_V2/portmacro.h b/portable/GCC/ColdFire_V2/portmacro.h index fc687b2ec..f165e1f29 100644 --- a/portable/GCC/ColdFire_V2/portmacro.h +++ b/portable/GCC/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/H8S2329/port.c b/portable/GCC/H8S2329/port.c index 2ae90227e..4c585000b 100644 --- a/portable/GCC/H8S2329/port.c +++ b/portable/GCC/H8S2329/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/H8S2329/portmacro.h b/portable/GCC/H8S2329/portmacro.h index 811b273a0..4788aec34 100644 --- a/portable/GCC/H8S2329/portmacro.h +++ b/portable/GCC/H8S2329/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/HCS12/port.c b/portable/GCC/HCS12/port.c index a45120f79..42e988e05 100644 --- a/portable/GCC/HCS12/port.c +++ b/portable/GCC/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/HCS12/portmacro.h b/portable/GCC/HCS12/portmacro.h index fa6f44839..80ea31a73 100644 --- a/portable/GCC/HCS12/portmacro.h +++ b/portable/GCC/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/ISR_Support.h b/portable/GCC/IA32_flat/ISR_Support.h index bdeef7706..ce39ca645 100644 --- a/portable/GCC/IA32_flat/ISR_Support.h +++ b/portable/GCC/IA32_flat/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/port.c b/portable/GCC/IA32_flat/port.c index b66ab05f5..44c7216d0 100644 --- a/portable/GCC/IA32_flat/port.c +++ b/portable/GCC/IA32_flat/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/portASM.S b/portable/GCC/IA32_flat/portASM.S index 04ef067d0..8154144e7 100644 --- a/portable/GCC/IA32_flat/portASM.S +++ b/portable/GCC/IA32_flat/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/portmacro.h b/portable/GCC/IA32_flat/portmacro.h index 5a7f6427d..4720a0d95 100644 --- a/portable/GCC/IA32_flat/portmacro.h +++ b/portable/GCC/IA32_flat/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MSP430F449/port.c b/portable/GCC/MSP430F449/port.c index f69d04786..322bff125 100644 --- a/portable/GCC/MSP430F449/port.c +++ b/portable/GCC/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MSP430F449/portmacro.h b/portable/GCC/MSP430F449/portmacro.h index 183d2990d..4f2fabf66 100644 --- a/portable/GCC/MSP430F449/portmacro.h +++ b/portable/GCC/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlaze/port.c b/portable/GCC/MicroBlaze/port.c index 152d2526b..eb9280845 100644 --- a/portable/GCC/MicroBlaze/port.c +++ b/portable/GCC/MicroBlaze/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlaze/portasm.s b/portable/GCC/MicroBlaze/portasm.s index 9a1e59dd7..4e0d0f477 100644 --- a/portable/GCC/MicroBlaze/portasm.s +++ b/portable/GCC/MicroBlaze/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlaze/portmacro.h b/portable/GCC/MicroBlaze/portmacro.h index 56e65094b..9352819b4 100644 --- a/portable/GCC/MicroBlaze/portmacro.h +++ b/portable/GCC/MicroBlaze/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/port.c b/portable/GCC/MicroBlazeV8/port.c index 79e1dc0d4..9983537a3 100644 --- a/portable/GCC/MicroBlazeV8/port.c +++ b/portable/GCC/MicroBlazeV8/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/port_exceptions.c b/portable/GCC/MicroBlazeV8/port_exceptions.c index 6aac71c80..30a72a676 100644 --- a/portable/GCC/MicroBlazeV8/port_exceptions.c +++ b/portable/GCC/MicroBlazeV8/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/portasm.S b/portable/GCC/MicroBlazeV8/portasm.S index 12fab3fbf..a2f7fa7b4 100644 --- a/portable/GCC/MicroBlazeV8/portasm.S +++ b/portable/GCC/MicroBlazeV8/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/portmacro.h b/portable/GCC/MicroBlazeV8/portmacro.h index a4f8c423a..73dd40322 100644 --- a/portable/GCC/MicroBlazeV8/portmacro.h +++ b/portable/GCC/MicroBlazeV8/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/port.c b/portable/GCC/MicroBlazeV9/port.c index 752a4d23c..a78d7023d 100644 --- a/portable/GCC/MicroBlazeV9/port.c +++ b/portable/GCC/MicroBlazeV9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/port_exceptions.c b/portable/GCC/MicroBlazeV9/port_exceptions.c index 6aac71c80..30a72a676 100644 --- a/portable/GCC/MicroBlazeV9/port_exceptions.c +++ b/portable/GCC/MicroBlazeV9/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/portasm.S b/portable/GCC/MicroBlazeV9/portasm.S index 12fab3fbf..a2f7fa7b4 100644 --- a/portable/GCC/MicroBlazeV9/portasm.S +++ b/portable/GCC/MicroBlazeV9/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/portmacro.h b/portable/GCC/MicroBlazeV9/portmacro.h index a4f8c423a..73dd40322 100644 --- a/portable/GCC/MicroBlazeV9/portmacro.h +++ b/portable/GCC/MicroBlazeV9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/NiosII/port.c b/portable/GCC/NiosII/port.c index 652b9b74c..fe49b3645 100644 --- a/portable/GCC/NiosII/port.c +++ b/portable/GCC/NiosII/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/NiosII/port_asm.S b/portable/GCC/NiosII/port_asm.S index f5695dffd..fcefb157d 100644 --- a/portable/GCC/NiosII/port_asm.S +++ b/portable/GCC/NiosII/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/NiosII/portmacro.h b/portable/GCC/NiosII/portmacro.h index 2ede9a3a8..08636cb9b 100644 --- a/portable/GCC/NiosII/portmacro.h +++ b/portable/GCC/NiosII/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/FPU_Macros.h b/portable/GCC/PPC405_Xilinx/FPU_Macros.h index d92e0a832..e0680d4ad 100644 --- a/portable/GCC/PPC405_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC405_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/port.c b/portable/GCC/PPC405_Xilinx/port.c index fd58b7f5e..944df56fe 100644 --- a/portable/GCC/PPC405_Xilinx/port.c +++ b/portable/GCC/PPC405_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/portasm.S b/portable/GCC/PPC405_Xilinx/portasm.S index d4849cd75..32b189091 100644 --- a/portable/GCC/PPC405_Xilinx/portasm.S +++ b/portable/GCC/PPC405_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/portmacro.h b/portable/GCC/PPC405_Xilinx/portmacro.h index 60ad4903e..71d5ef007 100644 --- a/portable/GCC/PPC405_Xilinx/portmacro.h +++ b/portable/GCC/PPC405_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/FPU_Macros.h b/portable/GCC/PPC440_Xilinx/FPU_Macros.h index d92e0a832..e0680d4ad 100644 --- a/portable/GCC/PPC440_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC440_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/port.c b/portable/GCC/PPC440_Xilinx/port.c index 2358b6d05..aae97feab 100644 --- a/portable/GCC/PPC440_Xilinx/port.c +++ b/portable/GCC/PPC440_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/portasm.S b/portable/GCC/PPC440_Xilinx/portasm.S index d4849cd75..32b189091 100644 --- a/portable/GCC/PPC440_Xilinx/portasm.S +++ b/portable/GCC/PPC440_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/portmacro.h b/portable/GCC/PPC440_Xilinx/portmacro.h index 60ad4903e..71d5ef007 100644 --- a/portable/GCC/PPC440_Xilinx/portmacro.h +++ b/portable/GCC/PPC440_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h index ff60e0763..e28c84166 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 6bdd172bd..ebb34a457 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/port.c b/portable/GCC/RISC-V/port.c index 543d7b36f..8704b744c 100644 --- a/portable/GCC/RISC-V/port.c +++ b/portable/GCC/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/portASM.S b/portable/GCC/RISC-V/portASM.S index b5e93e180..7e5e4d49d 100644 --- a/portable/GCC/RISC-V/portASM.S +++ b/portable/GCC/RISC-V/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/portmacro.h b/portable/GCC/RISC-V/portmacro.h index f2646d975..defd2bac6 100644 --- a/portable/GCC/RISC-V/portmacro.h +++ b/portable/GCC/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/isr_support.h b/portable/GCC/RL78/isr_support.h index c8fa808d0..cf1250cb8 100644 --- a/portable/GCC/RL78/isr_support.h +++ b/portable/GCC/RL78/isr_support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/port.c b/portable/GCC/RL78/port.c index b156db15f..10c9cc7f5 100644 --- a/portable/GCC/RL78/port.c +++ b/portable/GCC/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/portasm.S b/portable/GCC/RL78/portasm.S index 39fb17258..74d1d8b45 100644 --- a/portable/GCC/RL78/portasm.S +++ b/portable/GCC/RL78/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/portmacro.h b/portable/GCC/RL78/portmacro.h index 337914780..51891550b 100644 --- a/portable/GCC/RL78/portmacro.h +++ b/portable/GCC/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX100/port.c b/portable/GCC/RX100/port.c index 1232adfbf..fff792a75 100644 --- a/portable/GCC/RX100/port.c +++ b/portable/GCC/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX100/portmacro.h b/portable/GCC/RX100/portmacro.h index 3cdc4b72d..8c7e8174e 100644 --- a/portable/GCC/RX100/portmacro.h +++ b/portable/GCC/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX200/port.c b/portable/GCC/RX200/port.c index 3f4493bc9..a59a050d5 100644 --- a/portable/GCC/RX200/port.c +++ b/portable/GCC/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX200/portmacro.h b/portable/GCC/RX200/portmacro.h index b185efd67..c4c40d15c 100644 --- a/portable/GCC/RX200/portmacro.h +++ b/portable/GCC/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600/port.c b/portable/GCC/RX600/port.c index 097299557..b8b76cb7a 100644 --- a/portable/GCC/RX600/port.c +++ b/portable/GCC/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600/portmacro.h b/portable/GCC/RX600/portmacro.h index dd75166ea..85fe00352 100644 --- a/portable/GCC/RX600/portmacro.h +++ b/portable/GCC/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600v2/port.c b/portable/GCC/RX600v2/port.c index b5540cb29..ed9653074 100644 --- a/portable/GCC/RX600v2/port.c +++ b/portable/GCC/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600v2/portmacro.h b/portable/GCC/RX600v2/portmacro.h index dd75166ea..85fe00352 100644 --- a/portable/GCC/RX600v2/portmacro.h +++ b/portable/GCC/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX700v3_DPFPU/port.c b/portable/GCC/RX700v3_DPFPU/port.c index c4fac1166..e481f0a02 100644 --- a/portable/GCC/RX700v3_DPFPU/port.c +++ b/portable/GCC/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX700v3_DPFPU/portmacro.h b/portable/GCC/RX700v3_DPFPU/portmacro.h index 57b28376a..b606650f8 100644 --- a/portable/GCC/RX700v3_DPFPU/portmacro.h +++ b/portable/GCC/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/STR75x/port.c b/portable/GCC/STR75x/port.c index 499761396..6a82c5550 100644 --- a/portable/GCC/STR75x/port.c +++ b/portable/GCC/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/STR75x/portISR.c b/portable/GCC/STR75x/portISR.c index 409e48bdd..0679ba3e0 100644 --- a/portable/GCC/STR75x/portISR.c +++ b/portable/GCC/STR75x/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/STR75x/portmacro.h b/portable/GCC/STR75x/portmacro.h index 55b5b6c1b..cdafec6d6 100644 --- a/portable/GCC/STR75x/portmacro.h +++ b/portable/GCC/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/TriCore_1782/port.c b/portable/GCC/TriCore_1782/port.c index 01674c638..b7e40fcee 100644 --- a/portable/GCC/TriCore_1782/port.c +++ b/portable/GCC/TriCore_1782/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/TriCore_1782/portmacro.h b/portable/GCC/TriCore_1782/portmacro.h index fb55f4860..18413e05a 100644 --- a/portable/GCC/TriCore_1782/portmacro.h +++ b/portable/GCC/TriCore_1782/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/TriCore_1782/porttrap.c b/portable/GCC/TriCore_1782/porttrap.c index 630db20e3..34b053a1a 100644 --- a/portable/GCC/TriCore_1782/porttrap.c +++ b/portable/GCC/TriCore_1782/porttrap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/ISR_Support.h b/portable/IAR/78K0R/ISR_Support.h index 886d19b4a..68c3c214f 100644 --- a/portable/IAR/78K0R/ISR_Support.h +++ b/portable/IAR/78K0R/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/port.c b/portable/IAR/78K0R/port.c index a7c1d29e6..3f6ac3b93 100644 --- a/portable/IAR/78K0R/port.c +++ b/portable/IAR/78K0R/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/portasm.s26 b/portable/IAR/78K0R/portasm.s26 index 8993aa3a5..a96f94f2e 100644 --- a/portable/IAR/78K0R/portasm.s26 +++ b/portable/IAR/78K0R/portasm.s26 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/portmacro.h b/portable/IAR/78K0R/portmacro.h index 1d22ea562..f54c35e04 100644 --- a/portable/IAR/78K0R/portmacro.h +++ b/portable/IAR/78K0R/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/port.c b/portable/IAR/ARM_CA5_No_GIC/port.c index b5ea7ecd5..8f77f23f5 100644 --- a/portable/IAR/ARM_CA5_No_GIC/port.c +++ b/portable/IAR/ARM_CA5_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.h b/portable/IAR/ARM_CA5_No_GIC/portASM.h index 81125aa3f..03bcf2d3f 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.h +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.s b/portable/IAR/ARM_CA5_No_GIC/portASM.s index 0d51d563f..8760b2922 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.s +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/portmacro.h b/portable/IAR/ARM_CA5_No_GIC/portmacro.h index 3aadcb7b4..763e28dda 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CA5_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/port.c b/portable/IAR/ARM_CA9/port.c index c28271aab..19e8202fe 100644 --- a/portable/IAR/ARM_CA9/port.c +++ b/portable/IAR/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/portASM.h b/portable/IAR/ARM_CA9/portASM.h index d98af6ae0..a76a47351 100644 --- a/portable/IAR/ARM_CA9/portASM.h +++ b/portable/IAR/ARM_CA9/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/portASM.s b/portable/IAR/ARM_CA9/portASM.s index 5dbeaca33..4fba2907f 100644 --- a/portable/IAR/ARM_CA9/portASM.s +++ b/portable/IAR/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/portmacro.h b/portable/IAR/ARM_CA9/portmacro.h index 03faf575a..63d83cd44 100644 --- a/portable/IAR/ARM_CA9/portmacro.h +++ b/portable/IAR/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM0/port.c b/portable/IAR/ARM_CM0/port.c index 85dcb44c4..f2f878f58 100644 --- a/portable/IAR/ARM_CM0/port.c +++ b/portable/IAR/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM0/portasm.s b/portable/IAR/ARM_CM0/portasm.s index 862b29d4d..35b5a6cda 100644 --- a/portable/IAR/ARM_CM0/portasm.s +++ b/portable/IAR/ARM_CM0/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM0/portmacro.h b/portable/IAR/ARM_CM0/portmacro.h index 33ef0b861..63921f652 100644 --- a/portable/IAR/ARM_CM0/portmacro.h +++ b/portable/IAR/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index c9f28ce2b..28cebb9fd 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.h b/portable/IAR/ARM_CM23/non_secure/portasm.h index 165c9d3ea..4ddda5e23 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.s b/portable/IAR/ARM_CM23/non_secure/portasm.s index cc6eee075..0de800c24 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/portmacro.h b/portable/IAR/ARM_CM23/non_secure/portmacro.h index 899098358..47f31376b 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c index bd73c5795..5d6ac9ad5 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/portable/IAR/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_context.h b/portable/IAR/ARM_CM23/secure/secure_context.h index 1069db151..3786ddbc1 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.h +++ b/portable/IAR/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s index eb8fbcd5c..eee87898c 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.c b/portable/IAR/ARM_CM23/secure/secure_heap.c index bfb88c971..8a91f39fd 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.c +++ b/portable/IAR/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.h b/portable/IAR/ARM_CM23/secure/secure_heap.h index a89e5b334..2c3bf4851 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.h +++ b/portable/IAR/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_init.c b/portable/IAR/ARM_CM23/secure/secure_init.c index d78346391..f80db5aac 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.c +++ b/portable/IAR/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_init.h b/portable/IAR/ARM_CM23/secure/secure_init.h index 9d021f741..26690d68c 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.h +++ b/portable/IAR/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_port_macros.h b/portable/IAR/ARM_CM23/secure/secure_port_macros.h index 7faf15190..7181c3496 100644 --- a/portable/IAR/ARM_CM23/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index c9f28ce2b..28cebb9fd 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h index 165c9d3ea..4ddda5e23 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s index c068f80f0..8d37ccebd 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h index 3bffd21ad..ec11ee161 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM3/port.c b/portable/IAR/ARM_CM3/port.c index 043d7f975..bcc699d68 100644 --- a/portable/IAR/ARM_CM3/port.c +++ b/portable/IAR/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM3/portasm.s b/portable/IAR/ARM_CM3/portasm.s index 165682d22..6e5852ae6 100644 --- a/portable/IAR/ARM_CM3/portasm.s +++ b/portable/IAR/ARM_CM3/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM3/portmacro.h b/portable/IAR/ARM_CM3/portmacro.h index 1e4f35059..422e9c84e 100644 --- a/portable/IAR/ARM_CM3/portmacro.h +++ b/portable/IAR/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index c9f28ce2b..28cebb9fd 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.h b/portable/IAR/ARM_CM33/non_secure/portasm.h index 165c9d3ea..4ddda5e23 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.s b/portable/IAR/ARM_CM33/non_secure/portasm.s index 9e4205d5e..9e1d1c266 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/portmacro.h b/portable/IAR/ARM_CM33/non_secure/portmacro.h index fd9a9fde4..8fcf49c68 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c index bd73c5795..5d6ac9ad5 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/portable/IAR/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_context.h b/portable/IAR/ARM_CM33/secure/secure_context.h index 1069db151..3786ddbc1 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.h +++ b/portable/IAR/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s index c92a8af65..761d62e25 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.c b/portable/IAR/ARM_CM33/secure/secure_heap.c index bfb88c971..8a91f39fd 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.c +++ b/portable/IAR/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.h b/portable/IAR/ARM_CM33/secure/secure_heap.h index a89e5b334..2c3bf4851 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.h +++ b/portable/IAR/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_init.c b/portable/IAR/ARM_CM33/secure/secure_init.c index d78346391..f80db5aac 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.c +++ b/portable/IAR/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_init.h b/portable/IAR/ARM_CM33/secure/secure_init.h index 9d021f741..26690d68c 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.h +++ b/portable/IAR/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_port_macros.h b/portable/IAR/ARM_CM33/secure/secure_port_macros.h index 7faf15190..7181c3496 100644 --- a/portable/IAR/ARM_CM33/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index c9f28ce2b..28cebb9fd 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h index 165c9d3ea..4ddda5e23 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s index 50efdb301..be65e0650 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h index fd9a9fde4..8fcf49c68 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F/port.c b/portable/IAR/ARM_CM4F/port.c index ba927b4d8..ba4df706b 100644 --- a/portable/IAR/ARM_CM4F/port.c +++ b/portable/IAR/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F/portasm.s b/portable/IAR/ARM_CM4F/portasm.s index 2748874ca..4acb9ebf4 100644 --- a/portable/IAR/ARM_CM4F/portasm.s +++ b/portable/IAR/ARM_CM4F/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F/portmacro.h b/portable/IAR/ARM_CM4F/portmacro.h index f10992e45..4ae551090 100644 --- a/portable/IAR/ARM_CM4F/portmacro.h +++ b/portable/IAR/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index 0c6ac2af6..445047e82 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F_MPU/portasm.s b/portable/IAR/ARM_CM4F_MPU/portasm.s index ec6c87fdb..e8a307a69 100644 --- a/portable/IAR/ARM_CM4F_MPU/portasm.s +++ b/portable/IAR/ARM_CM4F_MPU/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h index 0483eb8ee..2bf2900a9 100644 --- a/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM7/r0p1/port.c b/portable/IAR/ARM_CM7/r0p1/port.c index 4e859c160..aac6c61b3 100644 --- a/portable/IAR/ARM_CM7/r0p1/port.c +++ b/portable/IAR/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM7/r0p1/portasm.s b/portable/IAR/ARM_CM7/r0p1/portasm.s index 723069334..8a9bb5614 100644 --- a/portable/IAR/ARM_CM7/r0p1/portasm.s +++ b/portable/IAR/ARM_CM7/r0p1/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM7/r0p1/portmacro.h b/portable/IAR/ARM_CM7/r0p1/portmacro.h index ac13d8043..058fa5d43 100644 --- a/portable/IAR/ARM_CM7/r0p1/portmacro.h +++ b/portable/IAR/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CRx_No_GIC/port.c b/portable/IAR/ARM_CRx_No_GIC/port.c index c4585a209..3eac6285d 100644 --- a/portable/IAR/ARM_CRx_No_GIC/port.c +++ b/portable/IAR/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CRx_No_GIC/portASM.s b/portable/IAR/ARM_CRx_No_GIC/portASM.s index eb6c23eca..9b44a2700 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portASM.s +++ b/portable/IAR/ARM_CRx_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CRx_No_GIC/portmacro.h b/portable/IAR/ARM_CRx_No_GIC/portmacro.h index d8dc3e5e9..78124d3e9 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ATMega323/port.c b/portable/IAR/ATMega323/port.c index e69a0aaf0..ce56d159f 100644 --- a/portable/IAR/ATMega323/port.c +++ b/portable/IAR/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ATMega323/portmacro.h b/portable/IAR/ATMega323/portmacro.h index d71d121e4..65342762b 100644 --- a/portable/IAR/ATMega323/portmacro.h +++ b/portable/IAR/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ATMega323/portmacro.s90 b/portable/IAR/ATMega323/portmacro.s90 index 138ead54f..ae76af83b 100644 --- a/portable/IAR/ATMega323/portmacro.s90 +++ b/portable/IAR/ATMega323/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR32_UC3/port.c b/portable/IAR/AVR32_UC3/port.c index 899e00904..0da050165 100644 --- a/portable/IAR/AVR32_UC3/port.c +++ b/portable/IAR/AVR32_UC3/port.c @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR32_UC3/portmacro.h b/portable/IAR/AVR32_UC3/portmacro.h index 9988115fc..367fadedd 100644 --- a/portable/IAR/AVR32_UC3/portmacro.h +++ b/portable/IAR/AVR32_UC3/portmacro.h @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_AVRDx/port.c b/portable/IAR/AVR_AVRDx/port.c index 83d1da0a4..da95cd1fb 100644 --- a/portable/IAR/AVR_AVRDx/port.c +++ b/portable/IAR/AVR_AVRDx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_AVRDx/portmacro.h b/portable/IAR/AVR_AVRDx/portmacro.h index bfb82ad19..7143eb6a3 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.h +++ b/portable/IAR/AVR_AVRDx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_AVRDx/portmacro.s90 b/portable/IAR/AVR_AVRDx/portmacro.s90 index a92b4728f..3d2dcfe0c 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.s90 +++ b/portable/IAR/AVR_AVRDx/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_Mega0/port.c b/portable/IAR/AVR_Mega0/port.c index 9c77ee80b..ebd90c76d 100644 --- a/portable/IAR/AVR_Mega0/port.c +++ b/portable/IAR/AVR_Mega0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_Mega0/portmacro.h b/portable/IAR/AVR_Mega0/portmacro.h index bfb82ad19..7143eb6a3 100644 --- a/portable/IAR/AVR_Mega0/portmacro.h +++ b/portable/IAR/AVR_Mega0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_Mega0/portmacro.s90 b/portable/IAR/AVR_Mega0/portmacro.s90 index a575fe5e8..d555b3e34 100644 --- a/portable/IAR/AVR_Mega0/portmacro.s90 +++ b/portable/IAR/AVR_Mega0/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/ISR_Support.h b/portable/IAR/AtmelSAM7S64/ISR_Support.h index ad299e84c..5897a5f78 100644 --- a/portable/IAR/AtmelSAM7S64/ISR_Support.h +++ b/portable/IAR/AtmelSAM7S64/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/port.c b/portable/IAR/AtmelSAM7S64/port.c index 4ca9a0ef2..93ef2d35e 100644 --- a/portable/IAR/AtmelSAM7S64/port.c +++ b/portable/IAR/AtmelSAM7S64/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/portasm.s79 b/portable/IAR/AtmelSAM7S64/portasm.s79 index 1af156519..91fb23274 100644 --- a/portable/IAR/AtmelSAM7S64/portasm.s79 +++ b/portable/IAR/AtmelSAM7S64/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/portmacro.h b/portable/IAR/AtmelSAM7S64/portmacro.h index 6c7d58c60..5b9a3a245 100644 --- a/portable/IAR/AtmelSAM7S64/portmacro.h +++ b/portable/IAR/AtmelSAM7S64/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM9XE/port.c b/portable/IAR/AtmelSAM9XE/port.c index 6ecaa2ece..14add07b5 100644 --- a/portable/IAR/AtmelSAM9XE/port.c +++ b/portable/IAR/AtmelSAM9XE/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM9XE/portmacro.h b/portable/IAR/AtmelSAM9XE/portmacro.h index 140a14fba..1361ba8e9 100644 --- a/portable/IAR/AtmelSAM9XE/portmacro.h +++ b/portable/IAR/AtmelSAM9XE/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/ISR_Support.h b/portable/IAR/LPC2000/ISR_Support.h index ad299e84c..5897a5f78 100644 --- a/portable/IAR/LPC2000/ISR_Support.h +++ b/portable/IAR/LPC2000/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/port.c b/portable/IAR/LPC2000/port.c index 8ff5a91c6..20b43b5d6 100644 --- a/portable/IAR/LPC2000/port.c +++ b/portable/IAR/LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/portasm.s79 b/portable/IAR/LPC2000/portasm.s79 index e20559f38..50ca090a6 100644 --- a/portable/IAR/LPC2000/portasm.s79 +++ b/portable/IAR/LPC2000/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/portmacro.h b/portable/IAR/LPC2000/portmacro.h index 2cff7d1e7..343bfd1fd 100644 --- a/portable/IAR/LPC2000/portmacro.h +++ b/portable/IAR/LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/port.c b/portable/IAR/MSP430/port.c index ecae1d14a..237c6c1d5 100644 --- a/portable/IAR/MSP430/port.c +++ b/portable/IAR/MSP430/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/portasm.h b/portable/IAR/MSP430/portasm.h index 40de1368d..64a284aa3 100644 --- a/portable/IAR/MSP430/portasm.h +++ b/portable/IAR/MSP430/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/portext.s43 b/portable/IAR/MSP430/portext.s43 index 0c1ab7d5a..aedf24a07 100644 --- a/portable/IAR/MSP430/portext.s43 +++ b/portable/IAR/MSP430/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/portmacro.h b/portable/IAR/MSP430/portmacro.h index 716f942c3..74db4566d 100644 --- a/portable/IAR/MSP430/portmacro.h +++ b/portable/IAR/MSP430/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/data_model.h b/portable/IAR/MSP430X/data_model.h index b47219f4f..b0d0f6f5f 100644 --- a/portable/IAR/MSP430X/data_model.h +++ b/portable/IAR/MSP430X/data_model.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/port.c b/portable/IAR/MSP430X/port.c index 6be3815b5..fd4b15205 100644 --- a/portable/IAR/MSP430X/port.c +++ b/portable/IAR/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/portext.s43 b/portable/IAR/MSP430X/portext.s43 index 96b59d947..80cd4379c 100644 --- a/portable/IAR/MSP430X/portext.s43 +++ b/portable/IAR/MSP430X/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/portmacro.h b/portable/IAR/MSP430X/portmacro.h index c97473962..c9e11a0a4 100644 --- a/portable/IAR/MSP430X/portmacro.h +++ b/portable/IAR/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 527880695..dd66297f1 100644 --- a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/port.c b/portable/IAR/RISC-V/port.c index f88554aaf..d03262eb6 100644 --- a/portable/IAR/RISC-V/port.c +++ b/portable/IAR/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/portASM.s b/portable/IAR/RISC-V/portASM.s index 63443a432..c74125b42 100644 --- a/portable/IAR/RISC-V/portASM.s +++ b/portable/IAR/RISC-V/portASM.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/portmacro.h b/portable/IAR/RISC-V/portmacro.h index ab8779b41..7898e0281 100644 --- a/portable/IAR/RISC-V/portmacro.h +++ b/portable/IAR/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/ISR_Support.h b/portable/IAR/RL78/ISR_Support.h index d65fb2462..24de0a1b9 100644 --- a/portable/IAR/RL78/ISR_Support.h +++ b/portable/IAR/RL78/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/port.c b/portable/IAR/RL78/port.c index c6121107d..0e883cdcf 100644 --- a/portable/IAR/RL78/port.c +++ b/portable/IAR/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/portasm.s87 b/portable/IAR/RL78/portasm.s87 index 1a5bdb533..b1a266827 100644 --- a/portable/IAR/RL78/portasm.s87 +++ b/portable/IAR/RL78/portasm.s87 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/portmacro.h b/portable/IAR/RL78/portmacro.h index 202a158fb..e092cd641 100644 --- a/portable/IAR/RL78/portmacro.h +++ b/portable/IAR/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX100/port.c b/portable/IAR/RX100/port.c index 9e91c709c..200c44bdd 100644 --- a/portable/IAR/RX100/port.c +++ b/portable/IAR/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX100/port_asm.s b/portable/IAR/RX100/port_asm.s index 6ba3b2d2f..1426fa775 100644 --- a/portable/IAR/RX100/port_asm.s +++ b/portable/IAR/RX100/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX100/portmacro.h b/portable/IAR/RX100/portmacro.h index afc8dcf24..c59d83ecf 100644 --- a/portable/IAR/RX100/portmacro.h +++ b/portable/IAR/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX600/port.c b/portable/IAR/RX600/port.c index 88f3d7057..6b95f8a4a 100644 --- a/portable/IAR/RX600/port.c +++ b/portable/IAR/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX600/port_asm.s b/portable/IAR/RX600/port_asm.s index 66b7637a0..07ab282ef 100644 --- a/portable/IAR/RX600/port_asm.s +++ b/portable/IAR/RX600/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX600/portmacro.h b/portable/IAR/RX600/portmacro.h index df46baf28..1d55f9f95 100644 --- a/portable/IAR/RX600/portmacro.h +++ b/portable/IAR/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX700v3_DPFPU/port.c b/portable/IAR/RX700v3_DPFPU/port.c index 500f2a057..b311b27f5 100644 --- a/portable/IAR/RX700v3_DPFPU/port.c +++ b/portable/IAR/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX700v3_DPFPU/portmacro.h b/portable/IAR/RX700v3_DPFPU/portmacro.h index a214817d4..584428de6 100644 --- a/portable/IAR/RX700v3_DPFPU/portmacro.h +++ b/portable/IAR/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RXv2/port.c b/portable/IAR/RXv2/port.c index fb9d9d00b..3e0b8a106 100644 --- a/portable/IAR/RXv2/port.c +++ b/portable/IAR/RXv2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RXv2/port_asm.s b/portable/IAR/RXv2/port_asm.s index 2981068f0..6e39eacce 100644 --- a/portable/IAR/RXv2/port_asm.s +++ b/portable/IAR/RXv2/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RXv2/portmacro.h b/portable/IAR/RXv2/portmacro.h index 952e759f7..0c30b5b82 100644 --- a/portable/IAR/RXv2/portmacro.h +++ b/portable/IAR/RXv2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/ISR_Support.h b/portable/IAR/STR71x/ISR_Support.h index ad299e84c..5897a5f78 100644 --- a/portable/IAR/STR71x/ISR_Support.h +++ b/portable/IAR/STR71x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/port.c b/portable/IAR/STR71x/port.c index 53530c890..2d0f53af2 100644 --- a/portable/IAR/STR71x/port.c +++ b/portable/IAR/STR71x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/portasm.s79 b/portable/IAR/STR71x/portasm.s79 index 4fa7e3fb4..afde683ca 100644 --- a/portable/IAR/STR71x/portasm.s79 +++ b/portable/IAR/STR71x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/portmacro.h b/portable/IAR/STR71x/portmacro.h index 98a6363ed..b0105bbb8 100644 --- a/portable/IAR/STR71x/portmacro.h +++ b/portable/IAR/STR71x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/ISR_Support.h b/portable/IAR/STR75x/ISR_Support.h index ad299e84c..5897a5f78 100644 --- a/portable/IAR/STR75x/ISR_Support.h +++ b/portable/IAR/STR75x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/port.c b/portable/IAR/STR75x/port.c index e89318fdb..4392b136b 100644 --- a/portable/IAR/STR75x/port.c +++ b/portable/IAR/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/portasm.s79 b/portable/IAR/STR75x/portasm.s79 index 92a2a54e5..f9a863fb2 100644 --- a/portable/IAR/STR75x/portasm.s79 +++ b/portable/IAR/STR75x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/portmacro.h b/portable/IAR/STR75x/portmacro.h index 335852cee..0ececc510 100644 --- a/portable/IAR/STR75x/portmacro.h +++ b/portable/IAR/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/ISR_Support.h b/portable/IAR/STR91x/ISR_Support.h index 631aa6e57..662bb36ac 100644 --- a/portable/IAR/STR91x/ISR_Support.h +++ b/portable/IAR/STR91x/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/port.c b/portable/IAR/STR91x/port.c index 677f5a8a2..bc8f56155 100644 --- a/portable/IAR/STR91x/port.c +++ b/portable/IAR/STR91x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/portasm.s79 b/portable/IAR/STR91x/portasm.s79 index 02f99ff0b..ce10cb4e9 100644 --- a/portable/IAR/STR91x/portasm.s79 +++ b/portable/IAR/STR91x/portasm.s79 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/portmacro.h b/portable/IAR/STR91x/portmacro.h index 5ae486f1c..75cf31d6c 100644 --- a/portable/IAR/STR91x/portmacro.h +++ b/portable/IAR/STR91x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/ISR_Support.h b/portable/IAR/V850ES/ISR_Support.h index 93c844462..a0e11b58b 100644 --- a/portable/IAR/V850ES/ISR_Support.h +++ b/portable/IAR/V850ES/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/port.c b/portable/IAR/V850ES/port.c index 7c8b0011e..72b7dca19 100644 --- a/portable/IAR/V850ES/port.c +++ b/portable/IAR/V850ES/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portasm.s85 b/portable/IAR/V850ES/portasm.s85 index ddb510de6..e53c4f6e4 100644 --- a/portable/IAR/V850ES/portasm.s85 +++ b/portable/IAR/V850ES/portasm.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portasm_Fx3.s85 b/portable/IAR/V850ES/portasm_Fx3.s85 index bb0b44e55..98ebb0462 100644 --- a/portable/IAR/V850ES/portasm_Fx3.s85 +++ b/portable/IAR/V850ES/portasm_Fx3.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portasm_Hx2.s85 b/portable/IAR/V850ES/portasm_Hx2.s85 index 76d95b072..edc3ed3ed 100644 --- a/portable/IAR/V850ES/portasm_Hx2.s85 +++ b/portable/IAR/V850ES/portasm_Hx2.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portmacro.h b/portable/IAR/V850ES/portmacro.h index 998d4e4b1..c60fc10b1 100644 --- a/portable/IAR/V850ES/portmacro.h +++ b/portable/IAR/V850ES/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC18F/port.c b/portable/MPLAB/PIC18F/port.c index 5397785b0..7bec435a5 100644 --- a/portable/MPLAB/PIC18F/port.c +++ b/portable/MPLAB/PIC18F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC18F/portmacro.h b/portable/MPLAB/PIC18F/portmacro.h index 9248c36ca..2cfddac6e 100644 --- a/portable/MPLAB/PIC18F/portmacro.h +++ b/portable/MPLAB/PIC18F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/port.c b/portable/MPLAB/PIC24_dsPIC/port.c index d9f9cb927..ac9da81dd 100644 --- a/portable/MPLAB/PIC24_dsPIC/port.c +++ b/portable/MPLAB/PIC24_dsPIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S index d9eafcf5d..b9fd4aeee 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S index 8bf363c07..ada0b9c50 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/portmacro.h b/portable/MPLAB/PIC24_dsPIC/portmacro.h index c8976844c..94d9e4404 100644 --- a/portable/MPLAB/PIC24_dsPIC/portmacro.h +++ b/portable/MPLAB/PIC24_dsPIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h index 4930d0af0..37b3ccdaf 100644 --- a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h +++ b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/port.c b/portable/MPLAB/PIC32MEC14xx/port.c index 5b17bff69..3ff3a146b 100644 --- a/portable/MPLAB/PIC32MEC14xx/port.c +++ b/portable/MPLAB/PIC32MEC14xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/port_asm.S b/portable/MPLAB/PIC32MEC14xx/port_asm.S index a8bba22ab..a8581effc 100644 --- a/portable/MPLAB/PIC32MEC14xx/port_asm.S +++ b/portable/MPLAB/PIC32MEC14xx/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/portmacro.h b/portable/MPLAB/PIC32MEC14xx/portmacro.h index 7e50f9e48..29ce57d7e 100644 --- a/portable/MPLAB/PIC32MEC14xx/portmacro.h +++ b/portable/MPLAB/PIC32MEC14xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/ISR_Support.h b/portable/MPLAB/PIC32MX/ISR_Support.h index 57415ac86..3cb69785c 100644 --- a/portable/MPLAB/PIC32MX/ISR_Support.h +++ b/portable/MPLAB/PIC32MX/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/port.c b/portable/MPLAB/PIC32MX/port.c index f62382d59..b5e08a5db 100644 --- a/portable/MPLAB/PIC32MX/port.c +++ b/portable/MPLAB/PIC32MX/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/port_asm.S b/portable/MPLAB/PIC32MX/port_asm.S index db907e377..e30b46e8b 100644 --- a/portable/MPLAB/PIC32MX/port_asm.S +++ b/portable/MPLAB/PIC32MX/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/portmacro.h b/portable/MPLAB/PIC32MX/portmacro.h index 0733f1b2f..02e3a5346 100644 --- a/portable/MPLAB/PIC32MX/portmacro.h +++ b/portable/MPLAB/PIC32MX/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/ISR_Support.h b/portable/MPLAB/PIC32MZ/ISR_Support.h index e94376fd3..662bc9352 100644 --- a/portable/MPLAB/PIC32MZ/ISR_Support.h +++ b/portable/MPLAB/PIC32MZ/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/port.c b/portable/MPLAB/PIC32MZ/port.c index daee09de0..51cb873a6 100644 --- a/portable/MPLAB/PIC32MZ/port.c +++ b/portable/MPLAB/PIC32MZ/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/port_asm.S b/portable/MPLAB/PIC32MZ/port_asm.S index 18943f8d4..0d5684aea 100644 --- a/portable/MPLAB/PIC32MZ/port_asm.S +++ b/portable/MPLAB/PIC32MZ/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/portmacro.h b/portable/MPLAB/PIC32MZ/portmacro.h index 8bf42130a..29595c58a 100644 --- a/portable/MPLAB/PIC32MZ/portmacro.h +++ b/portable/MPLAB/PIC32MZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MSVC-MingW/port.c b/portable/MSVC-MingW/port.c index 16092577c..1e594c769 100644 --- a/portable/MSVC-MingW/port.c +++ b/portable/MSVC-MingW/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MSVC-MingW/portmacro.h b/portable/MSVC-MingW/portmacro.h index cfb047a79..22e21f755 100644 --- a/portable/MSVC-MingW/portmacro.h +++ b/portable/MSVC-MingW/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_1.c b/portable/MemMang/heap_1.c index 0da18e0cc..b1ed8e7d4 100644 --- a/portable/MemMang/heap_1.c +++ b/portable/MemMang/heap_1.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_2.c b/portable/MemMang/heap_2.c index 6ae88e5d5..cfb5ba1e2 100644 --- a/portable/MemMang/heap_2.c +++ b/portable/MemMang/heap_2.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_3.c b/portable/MemMang/heap_3.c index c2e8e6ba6..2882e1c2d 100644 --- a/portable/MemMang/heap_3.c +++ b/portable/MemMang/heap_3.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_4.c b/portable/MemMang/heap_4.c index 87995dc63..0d4c4a029 100644 --- a/portable/MemMang/heap_4.c +++ b/portable/MemMang/heap_4.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_5.c b/portable/MemMang/heap_5.c index 026e3fad3..10b0f59e8 100644 --- a/portable/MemMang/heap_5.c +++ b/portable/MemMang/heap_5.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MikroC/ARM_CM4F/port.c b/portable/MikroC/ARM_CM4F/port.c index 6071fd849..dbf44d5d0 100644 --- a/portable/MikroC/ARM_CM4F/port.c +++ b/portable/MikroC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MikroC/ARM_CM4F/portmacro.h b/portable/MikroC/ARM_CM4F/portmacro.h index 8fb4e7a89..b589a815b 100644 --- a/portable/MikroC/ARM_CM4F/portmacro.h +++ b/portable/MikroC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/large_untested/port.c b/portable/Paradigm/Tern_EE/large_untested/port.c index 60aa61e17..a9f953dba 100644 --- a/portable/Paradigm/Tern_EE/large_untested/port.c +++ b/portable/Paradigm/Tern_EE/large_untested/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/large_untested/portasm.h b/portable/Paradigm/Tern_EE/large_untested/portasm.h index b6213b57e..8f3007c88 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portasm.h +++ b/portable/Paradigm/Tern_EE/large_untested/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/large_untested/portmacro.h b/portable/Paradigm/Tern_EE/large_untested/portmacro.h index 923d6bb62..ec8a8404c 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portmacro.h +++ b/portable/Paradigm/Tern_EE/large_untested/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/small/port.c b/portable/Paradigm/Tern_EE/small/port.c index aac067fbb..f95710f87 100644 --- a/portable/Paradigm/Tern_EE/small/port.c +++ b/portable/Paradigm/Tern_EE/small/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/small/portasm.h b/portable/Paradigm/Tern_EE/small/portasm.h index 826baaa99..c67d0bae6 100644 --- a/portable/Paradigm/Tern_EE/small/portasm.h +++ b/portable/Paradigm/Tern_EE/small/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/small/portmacro.h b/portable/Paradigm/Tern_EE/small/portmacro.h index 07a32c2a7..ba85dda71 100644 --- a/portable/Paradigm/Tern_EE/small/portmacro.h +++ b/portable/Paradigm/Tern_EE/small/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/port.c b/portable/RVDS/ARM7_LPC21xx/port.c index 2203788f9..4dac162c3 100644 --- a/portable/RVDS/ARM7_LPC21xx/port.c +++ b/portable/RVDS/ARM7_LPC21xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/portASM.s b/portable/RVDS/ARM7_LPC21xx/portASM.s index f5d77b2f6..86123672e 100644 --- a/portable/RVDS/ARM7_LPC21xx/portASM.s +++ b/portable/RVDS/ARM7_LPC21xx/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.h b/portable/RVDS/ARM7_LPC21xx/portmacro.h index 663b9c4b7..b7e3f56eb 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.h +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.inc b/portable/RVDS/ARM7_LPC21xx/portmacro.inc index 3b6cfab69..9a5b16d58 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.inc +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/port.c b/portable/RVDS/ARM_CA9/port.c index b3c6f1c7e..e0209cd9e 100644 --- a/portable/RVDS/ARM_CA9/port.c +++ b/portable/RVDS/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/portASM.s b/portable/RVDS/ARM_CA9/portASM.s index 2b9ccbf17..d8bcc55b9 100644 --- a/portable/RVDS/ARM_CA9/portASM.s +++ b/portable/RVDS/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/portmacro.h b/portable/RVDS/ARM_CA9/portmacro.h index f61ab880c..dfe3ae11a 100644 --- a/portable/RVDS/ARM_CA9/portmacro.h +++ b/portable/RVDS/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/portmacro.inc b/portable/RVDS/ARM_CA9/portmacro.inc index 8a5725a49..4651961e2 100644 --- a/portable/RVDS/ARM_CA9/portmacro.inc +++ b/portable/RVDS/ARM_CA9/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM0/port.c b/portable/RVDS/ARM_CM0/port.c index 3cbdb5f03..af1ea02ff 100644 --- a/portable/RVDS/ARM_CM0/port.c +++ b/portable/RVDS/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM0/portmacro.h b/portable/RVDS/ARM_CM0/portmacro.h index 7308abc53..80e52e173 100644 --- a/portable/RVDS/ARM_CM0/portmacro.h +++ b/portable/RVDS/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM3/port.c b/portable/RVDS/ARM_CM3/port.c index d489b8d5d..9c6c433d5 100644 --- a/portable/RVDS/ARM_CM3/port.c +++ b/portable/RVDS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM3/portmacro.h b/portable/RVDS/ARM_CM3/portmacro.h index e1e5e33a2..a484ec062 100644 --- a/portable/RVDS/ARM_CM3/portmacro.h +++ b/portable/RVDS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4F/port.c b/portable/RVDS/ARM_CM4F/port.c index 604634cc9..7ffbf8e9c 100644 --- a/portable/RVDS/ARM_CM4F/port.c +++ b/portable/RVDS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4F/portmacro.h b/portable/RVDS/ARM_CM4F/portmacro.h index 98a3ed75b..54ed339a3 100644 --- a/portable/RVDS/ARM_CM4F/portmacro.h +++ b/portable/RVDS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index 72538a473..c107b26f0 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h index 126007fda..028e1b744 100644 --- a/portable/RVDS/ARM_CM4_MPU/portmacro.h +++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM7/r0p1/port.c b/portable/RVDS/ARM_CM7/r0p1/port.c index ca97a6697..af5c0c8e6 100644 --- a/portable/RVDS/ARM_CM7/r0p1/port.c +++ b/portable/RVDS/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM7/r0p1/portmacro.h b/portable/RVDS/ARM_CM7/r0p1/portmacro.h index 2186033f8..a49faa9c5 100644 --- a/portable/RVDS/ARM_CM7/r0p1/portmacro.h +++ b/portable/RVDS/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX100/port.c b/portable/Renesas/RX100/port.c index b8e4add6f..5c4d2d1a3 100644 --- a/portable/Renesas/RX100/port.c +++ b/portable/Renesas/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX100/port_asm.src b/portable/Renesas/RX100/port_asm.src index 239875b9d..72a5f63a6 100644 --- a/portable/Renesas/RX100/port_asm.src +++ b/portable/Renesas/RX100/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX100/portmacro.h b/portable/Renesas/RX100/portmacro.h index 49f3495e3..fc39e4333 100644 --- a/portable/Renesas/RX100/portmacro.h +++ b/portable/Renesas/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX200/port.c b/portable/Renesas/RX200/port.c index 3c8b0345f..934a4b193 100644 --- a/portable/Renesas/RX200/port.c +++ b/portable/Renesas/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX200/port_asm.src b/portable/Renesas/RX200/port_asm.src index 239875b9d..72a5f63a6 100644 --- a/portable/Renesas/RX200/port_asm.src +++ b/portable/Renesas/RX200/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX200/portmacro.h b/portable/Renesas/RX200/portmacro.h index 46ac15761..1b6eaba44 100644 --- a/portable/Renesas/RX200/portmacro.h +++ b/portable/Renesas/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600/port.c b/portable/Renesas/RX600/port.c index 5d29f38e9..d96aab73e 100644 --- a/portable/Renesas/RX600/port.c +++ b/portable/Renesas/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600/port_asm.src b/portable/Renesas/RX600/port_asm.src index 239875b9d..72a5f63a6 100644 --- a/portable/Renesas/RX600/port_asm.src +++ b/portable/Renesas/RX600/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600/portmacro.h b/portable/Renesas/RX600/portmacro.h index 0009ffdf9..8a7d948dd 100644 --- a/portable/Renesas/RX600/portmacro.h +++ b/portable/Renesas/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600v2/port.c b/portable/Renesas/RX600v2/port.c index 27125d854..507003583 100644 --- a/portable/Renesas/RX600v2/port.c +++ b/portable/Renesas/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600v2/port_asm.src b/portable/Renesas/RX600v2/port_asm.src index 29466124b..b07b8e4d7 100644 --- a/portable/Renesas/RX600v2/port_asm.src +++ b/portable/Renesas/RX600v2/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600v2/portmacro.h b/portable/Renesas/RX600v2/portmacro.h index 80bd24034..5bfab2c5f 100644 --- a/portable/Renesas/RX600v2/portmacro.h +++ b/portable/Renesas/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX700v3_DPFPU/port.c b/portable/Renesas/RX700v3_DPFPU/port.c index c2df93181..0698b3e6c 100644 --- a/portable/Renesas/RX700v3_DPFPU/port.c +++ b/portable/Renesas/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX700v3_DPFPU/port_asm.src b/portable/Renesas/RX700v3_DPFPU/port_asm.src index b94492f7a..91af59720 100644 --- a/portable/Renesas/RX700v3_DPFPU/port_asm.src +++ b/portable/Renesas/RX700v3_DPFPU/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX700v3_DPFPU/portmacro.h b/portable/Renesas/RX700v3_DPFPU/portmacro.h index 1eb9d1257..94a80faf9 100644 --- a/portable/Renesas/RX700v3_DPFPU/portmacro.h +++ b/portable/Renesas/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/ISR_Support.inc b/portable/Renesas/SH2A_FPU/ISR_Support.inc index a6c2fea07..726c246d9 100644 --- a/portable/Renesas/SH2A_FPU/ISR_Support.inc +++ b/portable/Renesas/SH2A_FPU/ISR_Support.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/port.c b/portable/Renesas/SH2A_FPU/port.c index 0e1fe2c6d..cc0369745 100644 --- a/portable/Renesas/SH2A_FPU/port.c +++ b/portable/Renesas/SH2A_FPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/portasm.src b/portable/Renesas/SH2A_FPU/portasm.src index 539974210..9161681f2 100644 --- a/portable/Renesas/SH2A_FPU/portasm.src +++ b/portable/Renesas/SH2A_FPU/portasm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/portmacro.h b/portable/Renesas/SH2A_FPU/portmacro.h index 278e796b8..ce5812ff1 100644 --- a/portable/Renesas/SH2A_FPU/portmacro.h +++ b/portable/Renesas/SH2A_FPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/port.c b/portable/Rowley/MSP430F449/port.c index 4483140b5..8ffe12e9d 100644 --- a/portable/Rowley/MSP430F449/port.c +++ b/portable/Rowley/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/portasm.h b/portable/Rowley/MSP430F449/portasm.h index 3fba121cc..c267ebb49 100644 --- a/portable/Rowley/MSP430F449/portasm.h +++ b/portable/Rowley/MSP430F449/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/portext.asm b/portable/Rowley/MSP430F449/portext.asm index 3902033eb..6fa04e6f8 100644 --- a/portable/Rowley/MSP430F449/portext.asm +++ b/portable/Rowley/MSP430F449/portext.asm @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/portmacro.h b/portable/Rowley/MSP430F449/portmacro.h index 253cb69c4..ac85f33c6 100644 --- a/portable/Rowley/MSP430F449/portmacro.h +++ b/portable/Rowley/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/SDCC/Cygnal/port.c b/portable/SDCC/Cygnal/port.c index 1c6c98e27..b351df2ea 100644 --- a/portable/SDCC/Cygnal/port.c +++ b/portable/SDCC/Cygnal/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/SDCC/Cygnal/portmacro.h b/portable/SDCC/Cygnal/portmacro.h index 40bb75eee..2b3c5c041 100644 --- a/portable/SDCC/Cygnal/portmacro.h +++ b/portable/SDCC/Cygnal/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB91460/port.c b/portable/Softune/MB91460/port.c index 8c4209631..c03e741c9 100644 --- a/portable/Softune/MB91460/port.c +++ b/portable/Softune/MB91460/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB91460/portmacro.h b/portable/Softune/MB91460/portmacro.h index 8ea39641d..a4f1fa851 100644 --- a/portable/Softune/MB91460/portmacro.h +++ b/portable/Softune/MB91460/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB96340/port.c b/portable/Softune/MB96340/port.c index f3671b774..a68432c8d 100644 --- a/portable/Softune/MB96340/port.c +++ b/portable/Softune/MB96340/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB96340/portmacro.h b/portable/Softune/MB96340/portmacro.h index ebb7995dc..9cc5b021e 100644 --- a/portable/Softune/MB96340/portmacro.h +++ b/portable/Softune/MB96340/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Tasking/ARM_CM4F/port.c b/portable/Tasking/ARM_CM4F/port.c index f4d666e93..eed1b863d 100644 --- a/portable/Tasking/ARM_CM4F/port.c +++ b/portable/Tasking/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Tasking/ARM_CM4F/port_asm.asm b/portable/Tasking/ARM_CM4F/port_asm.asm index c9ae7125c..bfe12c00e 100644 --- a/portable/Tasking/ARM_CM4F/port_asm.asm +++ b/portable/Tasking/ARM_CM4F/port_asm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 1 +; * FreeRTOS Kernel V10.4.3 LTS Patch 2 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Tasking/ARM_CM4F/portmacro.h b/portable/Tasking/ARM_CM4F/portmacro.h index 1b55056a1..5209b0e29 100644 --- a/portable/Tasking/ARM_CM4F/portmacro.h +++ b/portable/Tasking/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c index 8ea07d910..efbca2eb3 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h index 8588f9c3e..254b87e5b 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s index 513f4008d..b995f1b74 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c index b4d001f08..bf6df45e1 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/port.c b/portable/ThirdParty/GCC/ARC_EM_HS/port.c index 19698958c..398925150 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/port.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h index 118a5045d..8a9562870 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c index 8ea07d910..efbca2eb3 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h index 8588f9c3e..254b87e5b 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_support.s b/portable/ThirdParty/GCC/ARC_v1/arc_support.s index 24ec13f24..79f228c8e 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_v1/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/port.c b/portable/ThirdParty/GCC/ARC_v1/port.c index 5458ee356..c66382a90 100644 --- a/portable/ThirdParty/GCC/ARC_v1/port.c +++ b/portable/ThirdParty/GCC/ARC_v1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/portmacro.h b/portable/ThirdParty/GCC/ARC_v1/portmacro.h index 9fd395fe5..7327cd888 100644 --- a/portable/ThirdParty/GCC/ARC_v1/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_v1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ATmega/port.c b/portable/ThirdParty/GCC/ATmega/port.c index 4be977a44..302a36414 100644 --- a/portable/ThirdParty/GCC/ATmega/port.c +++ b/portable/ThirdParty/GCC/ATmega/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ATmega/portmacro.h b/portable/ThirdParty/GCC/ATmega/portmacro.h index ccc76e48a..a1feb7822 100644 --- a/portable/ThirdParty/GCC/ATmega/portmacro.h +++ b/portable/ThirdParty/GCC/ATmega/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Posix/port.c b/portable/ThirdParty/GCC/Posix/port.c index 066bbe5f1..8ee479ebe 100644 --- a/portable/ThirdParty/GCC/Posix/port.c +++ b/portable/ThirdParty/GCC/Posix/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Posix/portmacro.h b/portable/ThirdParty/GCC/Posix/portmacro.h index 51f9ae40b..2d1482b67 100644 --- a/portable/ThirdParty/GCC/Posix/portmacro.h +++ b/portable/ThirdParty/GCC/Posix/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright 2020 Cambridge Consultants Ltd. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/XCC/Xtensa/port.c b/portable/ThirdParty/XCC/Xtensa/port.c index 8d3377278..cb25e9a74 100644 --- a/portable/ThirdParty/XCC/Xtensa/port.c +++ b/portable/ThirdParty/XCC/Xtensa/port.c @@ -1,6 +1,6 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/XCC/Xtensa/portmacro.h b/portable/ThirdParty/XCC/Xtensa/portmacro.h index b2522d44b..dc07dfd33 100644 --- a/portable/ThirdParty/XCC/Xtensa/portmacro.h +++ b/portable/ThirdParty/XCC/Xtensa/portmacro.h @@ -1,6 +1,6 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/Drivers/Tick/Tick.c b/portable/WizC/PIC18/Drivers/Tick/Tick.c index 30502aaab..be9e76af2 100644 --- a/portable/WizC/PIC18/Drivers/Tick/Tick.c +++ b/portable/WizC/PIC18/Drivers/Tick/Tick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/Drivers/Tick/isrTick.c b/portable/WizC/PIC18/Drivers/Tick/isrTick.c index e137b35ea..24a40612c 100644 --- a/portable/WizC/PIC18/Drivers/Tick/isrTick.c +++ b/portable/WizC/PIC18/Drivers/Tick/isrTick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/addFreeRTOS.h b/portable/WizC/PIC18/addFreeRTOS.h index 518dd521c..3c6ab3154 100644 --- a/portable/WizC/PIC18/addFreeRTOS.h +++ b/portable/WizC/PIC18/addFreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/port.c b/portable/WizC/PIC18/port.c index 9b099ea0d..e44c375ef 100644 --- a/portable/WizC/PIC18/port.c +++ b/portable/WizC/PIC18/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/portmacro.h b/portable/WizC/PIC18/portmacro.h index 7d108c9e2..445d3b7f6 100644 --- a/portable/WizC/PIC18/portmacro.h +++ b/portable/WizC/PIC18/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/Flsh186/port.c b/portable/oWatcom/16BitDOS/Flsh186/port.c index 837bf2377..04b80f0c3 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/port.c +++ b/portable/oWatcom/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h index f73ae0dc9..82f3a3142 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h +++ b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/PC/port.c b/portable/oWatcom/16BitDOS/PC/port.c index a69aafeb4..cce20c1d5 100644 --- a/portable/oWatcom/16BitDOS/PC/port.c +++ b/portable/oWatcom/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/PC/portmacro.h b/portable/oWatcom/16BitDOS/PC/portmacro.h index 311c5b6b0..96a8f46d9 100644 --- a/portable/oWatcom/16BitDOS/PC/portmacro.h +++ b/portable/oWatcom/16BitDOS/PC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/common/portasm.h b/portable/oWatcom/16BitDOS/common/portasm.h index a2148af1c..9703d0db4 100644 --- a/portable/oWatcom/16BitDOS/common/portasm.h +++ b/portable/oWatcom/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/common/portcomn.c b/portable/oWatcom/16BitDOS/common/portcomn.c index 0c997dbd3..5c668e164 100644 --- a/portable/oWatcom/16BitDOS/common/portcomn.c +++ b/portable/oWatcom/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/queue.c b/queue.c index f856f12a9..fbbaa2305 100644 --- a/queue.c +++ b/queue.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/stream_buffer.c b/stream_buffer.c index 1b79198fe..72a899fc7 100644 --- a/stream_buffer.c +++ b/stream_buffer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/tasks.c b/tasks.c index 78f92b84d..8a7bf9875 100644 --- a/tasks.c +++ b/tasks.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/timers.c b/timers.c index 803b12d85..315334122 100644 --- a/timers.c +++ b/timers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 1 + * FreeRTOS Kernel V10.4.3 LTS Patch 2 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of From 1e0843929477c8f2e2679b70d18341ee312a5fce Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Fri, 12 Nov 2021 10:56:46 -0800 Subject: [PATCH 13/24] Update History.txt for release date Signed-off-by: Gaurav Aggarwal --- History.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/History.txt b/History.txt index b17c7a270..cead9abf5 100644 --- a/History.txt +++ b/History.txt @@ -1,6 +1,6 @@ Documentation and download available at https://www.FreeRTOS.org/ -Changes between FreeRTOS V10.4.3 LTS Patch 1 and FreeRTOS V10.4.3 LTS Patch 2 +Changes between FreeRTOS V10.4.3 LTS Patch 1 and FreeRTOS V10.4.3 LTS Patch 2 released November 12 2021 + ARMv7-M and ARMv8-M MPU ports – prevent non-kernel code from calling the internal functions xPortRaisePrivilege and vPortResetPrivilege by changing From acd9279fc2c198119e7430aa745f9723b5f683fc Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Wed, 7 Sep 2022 16:01:11 +0530 Subject: [PATCH 14/24] Use highest numbered MPU regions for kernel ARMv7-M allows overlapping MPU regions. When 2 MPU regions overlap, the MPU configuration of the higher numbered MPU region is applied. For example, if a memory area is covered by 2 MPU regions 0 and 1, the memory permissions for MPU region 1 are applied. We use 5 MPU regions for kernel code and kernel data protections and leave the remaining for the application writer. We were using lowest numbered MPU regions (0-4) for kernel protections and leaving the remaining for the application writer. The application writer could configure those higher numbered MPU regions to override kernel protections. This commit changes the code to use highest numbered MPU regions for kernel protections and leave the remaining for the application writer. This ensures that the application writer cannot override kernel protections. We thank the SecLab team at Northeastern University for reporting this issue. Signed-off-by: Gaurav Aggarwal --- portable/GCC/ARM_CM3_MPU/port.c | 27 +++++-------------- portable/GCC/ARM_CM3_MPU/portmacro.h | 14 +++++----- portable/GCC/ARM_CM4_MPU/port.c | 39 +++++++++------------------ portable/GCC/ARM_CM4_MPU/portmacro.h | 21 +++++++-------- portable/IAR/ARM_CM4F_MPU/port.c | 31 +++++++-------------- portable/IAR/ARM_CM4F_MPU/portmacro.h | 21 +++++++-------- portable/RVDS/ARM_CM4_MPU/port.c | 39 +++++++++------------------ portable/RVDS/ARM_CM4_MPU/portmacro.h | 21 +++++++-------- 8 files changed, 79 insertions(+), 134 deletions(-) diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index f14279a6e..b152920c2 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -731,7 +731,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress = ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */ ( portMPU_REGION_VALID ) | - ( portSTACK_REGION ); + ( portSTACK_REGION ); /* Region number. */ xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | @@ -739,23 +739,10 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); - /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have - * just removed the privileged only parameters. */ - xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress = - ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portSTACK_REGION + 1 ); - - xMPUSettings->xRegion[ 1 ].ulRegionAttribute = - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | - ( portMPU_REGION_ENABLE ); - - /* Invalidate all other regions. */ - for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) + /* Invalidate user configurable regions. */ + for( ul = 1UL; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { - xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; + xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( ul - 1UL ) | portMPU_REGION_VALID ); xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } } @@ -782,7 +769,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, lIndex = 0; - for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) + for( ul = 1UL; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL ) { @@ -792,7 +779,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) | ( portMPU_REGION_VALID ) | - ( portSTACK_REGION + ul ); /* Region number. */ + ( ul - 1UL ); /* Region number. */ xMPUSettings->xRegion[ ul ].ulRegionAttribute = ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | @@ -802,7 +789,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, else { /* Invalidate the region. */ - xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; + xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( ul - 1UL ) | portMPU_REGION_VALID ); xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h index ff4232b3c..9cc2f7793 100644 --- a/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -81,15 +81,15 @@ #define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL ) #define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL ) - #define portUNPRIVILEGED_FLASH_REGION ( 0UL ) - #define portPRIVILEGED_FLASH_REGION ( 1UL ) - #define portPRIVILEGED_RAM_REGION ( 2UL ) #define portGENERAL_PERIPHERALS_REGION ( 3UL ) #define portSTACK_REGION ( 4UL ) - #define portFIRST_CONFIGURABLE_REGION ( 5UL ) - #define portLAST_CONFIGURABLE_REGION ( 7UL ) + #define portUNPRIVILEGED_FLASH_REGION ( 5UL ) + #define portPRIVILEGED_FLASH_REGION ( 6UL ) + #define portPRIVILEGED_RAM_REGION ( 7UL ) + #define portFIRST_CONFIGURABLE_REGION ( 0UL ) + #define portLAST_CONFIGURABLE_REGION ( 2UL ) #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) - #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ + #define portTOTAL_NUM_REGIONS_IN_TCB ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ #define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ::: "r0", "memory" ) @@ -102,7 +102,7 @@ /* Plus 1 to create space for the stack region. */ typedef struct MPU_SETTINGS { - xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ]; + xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS_IN_TCB ]; } xMPU_SETTINGS; /* Architecture specifics. */ diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index 8863ca5ae..faeacb32b 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -68,7 +68,7 @@ #define portMPU_REGION_BASE_ADDRESS_REG ( *( ( volatile uint32_t * ) 0xe000ed9C ) ) #define portMPU_REGION_ATTRIBUTE_REG ( *( ( volatile uint32_t * ) 0xe000edA0 ) ) #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) -#define portEXPECTED_MPU_TYPE_VALUE ( portTOTAL_NUM_REGIONS << 8UL ) +#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) #define portMPU_ENABLE ( 0x01UL ) #define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL ) #define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL ) @@ -359,12 +359,12 @@ static void prvRestoreContextOfFirstTask( void ) " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */ " \n" - #if ( portTOTAL_NUM_REGIONS == 16 ) + #if ( configTOTAL_MPU_REGIONS == 16 ) " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */ " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */ - #endif /* portTOTAL_NUM_REGIONS == 16. */ + #endif /* configTOTAL_MPU_REGIONS == 16. */ " \n" " ldr r2, =0xe000ed94 \n"/* MPU_CTRL register. */ " ldr r3, [r2] \n"/* Read the value of MPU_CTRL. */ @@ -585,12 +585,12 @@ void xPortPendSVHandler( void ) " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */ " \n" - #if ( portTOTAL_NUM_REGIONS == 16 ) + #if ( configTOTAL_MPU_REGIONS == 16 ) " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */ " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */ - #endif /* portTOTAL_NUM_REGIONS == 16. */ + #endif /* configTOTAL_MPU_REGIONS == 16. */ " \n" " ldr r2, =0xe000ed94 \n"/* MPU_CTRL register. */ " ldr r3, [r2] \n"/* Read the value of MPU_CTRL. */ @@ -687,7 +687,7 @@ static void prvSetupMPU( void ) #endif /* if defined( __ARMCC_VERSION ) */ /* The only permitted number of regions are 8 or 16. */ - configASSERT( ( portTOTAL_NUM_REGIONS == 8 ) || ( portTOTAL_NUM_REGIONS == 16 ) ); + configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) ); /* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */ configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ); @@ -830,7 +830,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress = ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */ ( portMPU_REGION_VALID ) | - ( portSTACK_REGION ); + ( portSTACK_REGION ); /* Region number. */ xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | @@ -838,23 +838,10 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); - /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have - * just removed the privileged only parameters. */ - xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress = - ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portSTACK_REGION + 1 ); - - xMPUSettings->xRegion[ 1 ].ulRegionAttribute = - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | - prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | - ( portMPU_REGION_ENABLE ); - - /* Invalidate all other regions. */ - for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) + /* Invalidate user configurable regions. */ + for( ul = 1UL; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { - xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; + xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( ul - 1UL ) | portMPU_REGION_VALID ); xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } } @@ -881,7 +868,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, lIndex = 0; - for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) + for( ul = 1UL; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL ) { @@ -891,7 +878,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) | ( portMPU_REGION_VALID ) | - ( portSTACK_REGION + ul ); /* Region number. */ + ( ul - 1UL ); /* Region number. */ xMPUSettings->xRegion[ ul ].ulRegionAttribute = ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | @@ -901,7 +888,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, else { /* Invalidate the region. */ - xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; + xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( ul - 1UL ) | portMPU_REGION_VALID ); xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h index 77c4ec880..203036fef 100644 --- a/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -170,15 +170,15 @@ typedef unsigned long UBaseType_t; #define configTEX_S_C_B_SRAM ( 0x07UL ) #endif -#define portUNPRIVILEGED_FLASH_REGION ( 0UL ) -#define portPRIVILEGED_FLASH_REGION ( 1UL ) -#define portPRIVILEGED_RAM_REGION ( 2UL ) -#define portGENERAL_PERIPHERALS_REGION ( 3UL ) -#define portSTACK_REGION ( 4UL ) -#define portFIRST_CONFIGURABLE_REGION ( 5UL ) -#define portTOTAL_NUM_REGIONS ( configTOTAL_MPU_REGIONS ) -#define portNUM_CONFIGURABLE_REGIONS ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION ) -#define portLAST_CONFIGURABLE_REGION ( portTOTAL_NUM_REGIONS - 1 ) +#define portGENERAL_PERIPHERALS_REGION ( configTOTAL_MPU_REGIONS - 5UL ) +#define portSTACK_REGION ( configTOTAL_MPU_REGIONS - 4UL ) +#define portUNPRIVILEGED_FLASH_REGION ( configTOTAL_MPU_REGIONS - 3UL ) +#define portPRIVILEGED_FLASH_REGION ( configTOTAL_MPU_REGIONS - 2UL ) +#define portPRIVILEGED_RAM_REGION ( configTOTAL_MPU_REGIONS - 1UL ) +#define portFIRST_CONFIGURABLE_REGION ( 0UL ) +#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 6UL ) +#define portNUM_CONFIGURABLE_REGIONS ( configTOTAL_MPU_REGIONS - 5UL ) +#define portTOTAL_NUM_REGIONS_IN_TCB ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus 1 to create space for the stack region. */ #define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ::: "r0", "memory" ) @@ -188,10 +188,9 @@ typedef struct MPU_REGION_REGISTERS uint32_t ulRegionAttribute; } xMPU_REGION_REGISTERS; -/* Plus 1 to create space for the stack region. */ typedef struct MPU_SETTINGS { - xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ]; + xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS_IN_TCB ]; } xMPU_SETTINGS; /* Architecture specifics. */ diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index 445047e82..57a7eb3dc 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -75,7 +75,7 @@ #define portMPU_REGION_BASE_ADDRESS_REG ( *( ( volatile uint32_t * ) 0xe000ed9C ) ) #define portMPU_REGION_ATTRIBUTE_REG ( *( ( volatile uint32_t * ) 0xe000edA0 ) ) #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) -#define portEXPECTED_MPU_TYPE_VALUE ( portTOTAL_NUM_REGIONS << 8UL ) +#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) #define portMPU_ENABLE ( 0x01UL ) #define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL ) #define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL ) @@ -526,7 +526,7 @@ static void prvSetupMPU( void ) extern uint32_t __privileged_data_end__[]; /* The only permitted number of regions are 8 or 16. */ - configASSERT( ( portTOTAL_NUM_REGIONS == 8 ) || ( portTOTAL_NUM_REGIONS == 16 ) ); + configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) ); /* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */ configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ); @@ -627,7 +627,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress = ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */ ( portMPU_REGION_VALID ) | - ( portSTACK_REGION ); + ( portSTACK_REGION ); /* Region number. */ xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | @@ -635,23 +635,10 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); - /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have - * just removed the privileged only parameters. */ - xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress = - ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portSTACK_REGION + 1 ); - - xMPUSettings->xRegion[ 1 ].ulRegionAttribute = - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | - prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | - ( portMPU_REGION_ENABLE ); - - /* Invalidate all other regions. */ - for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) + /* Invalidate user configurable regions. */ + for( ul = 1UL; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { - xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; + xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( ul - 1UL ) | portMPU_REGION_VALID ); xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } } @@ -678,7 +665,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, lIndex = 0; - for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) + for( ul = 1UL; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL ) { @@ -688,7 +675,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) | ( portMPU_REGION_VALID ) | - ( portSTACK_REGION + ul ); /* Region number. */ + ( ul - 1UL ); /* Region number. */ xMPUSettings->xRegion[ ul ].ulRegionAttribute = ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | @@ -698,7 +685,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, else { /* Invalidate the region. */ - xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; + xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( ul - 1UL ) | portMPU_REGION_VALID ); xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h index 2bf2900a9..cea31b031 100644 --- a/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -172,15 +172,15 @@ typedef unsigned long UBaseType_t; #define configTEX_S_C_B_SRAM ( 0x07UL ) #endif -#define portUNPRIVILEGED_FLASH_REGION ( 0UL ) -#define portPRIVILEGED_FLASH_REGION ( 1UL ) -#define portPRIVILEGED_RAM_REGION ( 2UL ) -#define portGENERAL_PERIPHERALS_REGION ( 3UL ) -#define portSTACK_REGION ( 4UL ) -#define portFIRST_CONFIGURABLE_REGION ( 5UL ) -#define portTOTAL_NUM_REGIONS ( configTOTAL_MPU_REGIONS ) -#define portNUM_CONFIGURABLE_REGIONS ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION ) -#define portLAST_CONFIGURABLE_REGION ( portTOTAL_NUM_REGIONS - 1UL ) +#define portGENERAL_PERIPHERALS_REGION ( configTOTAL_MPU_REGIONS - 5UL ) +#define portSTACK_REGION ( configTOTAL_MPU_REGIONS - 4UL ) +#define portUNPRIVILEGED_FLASH_REGION ( configTOTAL_MPU_REGIONS - 3UL ) +#define portPRIVILEGED_FLASH_REGION ( configTOTAL_MPU_REGIONS - 2UL ) +#define portPRIVILEGED_RAM_REGION ( configTOTAL_MPU_REGIONS - 1UL ) +#define portFIRST_CONFIGURABLE_REGION ( 0UL ) +#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 6UL ) +#define portNUM_CONFIGURABLE_REGIONS ( configTOTAL_MPU_REGIONS - 5UL ) +#define portTOTAL_NUM_REGIONS_IN_TCB ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus 1 to create space for the stack region. */ #define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, r0, #1 \n msr control, r0 " ::: "r0", "memory" ) @@ -190,10 +190,9 @@ typedef struct MPU_REGION_REGISTERS uint32_t ulRegionAttribute; } xMPU_REGION_REGISTERS; -/* Plus 1 to create space for the stack region. */ typedef struct MPU_SETTINGS { - xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ]; + xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS_IN_TCB ]; } xMPU_SETTINGS; /* Architecture specifics. */ diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index c107b26f0..612b30cb5 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -57,7 +57,7 @@ #define portMPU_REGION_BASE_ADDRESS_REG ( *( ( volatile uint32_t * ) 0xe000ed9C ) ) #define portMPU_REGION_ATTRIBUTE_REG ( *( ( volatile uint32_t * ) 0xe000edA0 ) ) #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) -#define portEXPECTED_MPU_TYPE_VALUE ( portTOTAL_NUM_REGIONS << 8UL ) +#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) #define portMPU_ENABLE ( 0x01UL ) #define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL ) #define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL ) @@ -352,12 +352,12 @@ __asm void prvRestoreContextOfFirstTask( void ) ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */ - #if ( portTOTAL_NUM_REGIONS == 16 ) + #if ( configTOTAL_MPU_REGIONS == 16 ) ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */ - #endif /* portTOTAL_NUM_REGIONS == 16. */ + #endif /* configTOTAL_MPU_REGIONS == 16. */ ldr r2, =0xe000ed94 /* MPU_CTRL register. */ ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ @@ -590,12 +590,12 @@ __asm void xPortPendSVHandler( void ) ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */ - #if ( portTOTAL_NUM_REGIONS == 16 ) + #if ( configTOTAL_MPU_REGIONS == 16 ) ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */ - #endif /* portTOTAL_NUM_REGIONS == 16. */ + #endif /* configTOTAL_MPU_REGIONS == 16. */ ldr r2, =0xe000ed94 /* MPU_CTRL register. */ ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ @@ -690,7 +690,7 @@ static void prvSetupMPU( void ) extern uint32_t __privileged_data_end__; /* The only permitted number of regions are 8 or 16. */ - configASSERT( ( portTOTAL_NUM_REGIONS == 8 ) || ( portTOTAL_NUM_REGIONS == 16 ) ); + configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) ); /* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */ configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ); @@ -821,7 +821,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress = ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */ ( portMPU_REGION_VALID ) | - ( portSTACK_REGION ); + ( portSTACK_REGION ); /* Region number. */ xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | @@ -829,23 +829,10 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); - /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have - * just removed the privileged only parameters. */ - xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress = - ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */ - ( portMPU_REGION_VALID ) | - ( portSTACK_REGION + 1 ); - - xMPUSettings->xRegion[ 1 ].ulRegionAttribute = - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | - prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | - ( portMPU_REGION_ENABLE ); - - /* Invalidate all other regions. */ - for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) + /* Invalidate user configurable regions. */ + for( ul = 1UL; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { - xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; + xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( ul - 1UL ) | portMPU_REGION_VALID ); xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } } @@ -872,7 +859,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, lIndex = 0; - for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) + for( ul = 1UL; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL ) { @@ -882,7 +869,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) | ( portMPU_REGION_VALID ) | - ( portSTACK_REGION + ul ); /* Region number. */ + ( ul - 1UL ); /* Region number. */ xMPUSettings->xRegion[ ul ].ulRegionAttribute = ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | @@ -892,7 +879,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, else { /* Invalidate the region. */ - xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; + xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( ul - 1UL ) | portMPU_REGION_VALID ); xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h index 028e1b744..8b2da4fa2 100644 --- a/portable/RVDS/ARM_CM4_MPU/portmacro.h +++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h @@ -169,15 +169,15 @@ typedef unsigned long UBaseType_t; #define configTEX_S_C_B_SRAM ( 0x07UL ) #endif -#define portUNPRIVILEGED_FLASH_REGION ( 0UL ) -#define portPRIVILEGED_FLASH_REGION ( 1UL ) -#define portPRIVILEGED_RAM_REGION ( 2UL ) -#define portGENERAL_PERIPHERALS_REGION ( 3UL ) -#define portSTACK_REGION ( 4UL ) -#define portFIRST_CONFIGURABLE_REGION ( 5UL ) -#define portTOTAL_NUM_REGIONS ( configTOTAL_MPU_REGIONS ) -#define portNUM_CONFIGURABLE_REGIONS ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION ) -#define portLAST_CONFIGURABLE_REGION ( portTOTAL_NUM_REGIONS - 1 ) +#define portGENERAL_PERIPHERALS_REGION ( configTOTAL_MPU_REGIONS - 5UL ) +#define portSTACK_REGION ( configTOTAL_MPU_REGIONS - 4UL ) +#define portUNPRIVILEGED_FLASH_REGION ( configTOTAL_MPU_REGIONS - 3UL ) +#define portPRIVILEGED_FLASH_REGION ( configTOTAL_MPU_REGIONS - 2UL ) +#define portPRIVILEGED_RAM_REGION ( configTOTAL_MPU_REGIONS - 1UL ) +#define portFIRST_CONFIGURABLE_REGION ( 0UL ) +#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 6UL ) +#define portNUM_CONFIGURABLE_REGIONS ( configTOTAL_MPU_REGIONS - 5UL ) +#define portTOTAL_NUM_REGIONS_IN_TCB ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus 1 to create space for the stack region. */ void vPortSwitchToUserMode( void ); #define portSWITCH_TO_USER_MODE() vPortSwitchToUserMode() @@ -188,10 +188,9 @@ typedef struct MPU_REGION_REGISTERS uint32_t ulRegionAttribute; } xMPU_REGION_REGISTERS; -/* Plus 1 to create space for the stack region. */ typedef struct MPU_SETTINGS { - xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ]; + xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS_IN_TCB ]; } xMPU_SETTINGS; /* Architecture specifics. */ From c4ad77f694e9737f512d4ff4c527e46d31c2732c Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Wed, 7 Sep 2022 16:04:19 +0530 Subject: [PATCH 15/24] Make RAM regions non-executable This commit makes the privileged RAM and stack regions non-executable. Signed-off-by: Gaurav Aggarwal --- portable/GCC/ARM_CM3_MPU/port.c | 5 ++++- portable/GCC/ARM_CM4_MPU/port.c | 5 ++++- portable/IAR/ARM_CM4F_MPU/port.c | 5 ++++- portable/RVDS/ARM_CM4_MPU/port.c | 5 ++++- 4 files changed, 16 insertions(+), 4 deletions(-) diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index b152920c2..da4a4a682 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -637,6 +637,7 @@ static void prvSetupMPU( void ) portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | ( portMPU_REGION_ENABLE ); @@ -736,6 +737,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); @@ -761,7 +763,8 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portSTACK_REGION ); /* Region number. */ xMPUSettings->xRegion[ 0 ].ulRegionAttribute = - ( portMPU_REGION_READ_WRITE ) | /* Read and write. */ + ( portMPU_REGION_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | ( portMPU_REGION_ENABLE ); diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index faeacb32b..9b2d28d75 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -723,6 +723,7 @@ static void prvSetupMPU( void ) ( portPRIVILEGED_RAM_REGION ); portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | ( portMPU_REGION_ENABLE ); @@ -834,6 +835,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); @@ -860,7 +862,8 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portSTACK_REGION ); /* Region number. */ xMPUSettings->xRegion[ 0 ].ulRegionAttribute = - ( portMPU_REGION_READ_WRITE ) | /* Read and write. */ + ( portMPU_REGION_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) | ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | ( portMPU_REGION_ENABLE ); diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index 57a7eb3dc..708334fd4 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -562,6 +562,7 @@ static void prvSetupMPU( void ) ( portPRIVILEGED_RAM_REGION ); portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | ( portMPU_REGION_ENABLE ); @@ -631,6 +632,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); @@ -657,7 +659,8 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portSTACK_REGION ); /* Region number. */ xMPUSettings->xRegion[ 0 ].ulRegionAttribute = - ( portMPU_REGION_READ_WRITE ) | /* Read and write. */ + ( portMPU_REGION_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) | ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | ( portMPU_REGION_ENABLE ); diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index 612b30cb5..fe777ed40 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -726,6 +726,7 @@ static void prvSetupMPU( void ) ( portPRIVILEGED_RAM_REGION ); portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | ( portMPU_REGION_ENABLE ); @@ -825,6 +826,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | ( portMPU_REGION_ENABLE ); @@ -851,7 +853,8 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portSTACK_REGION ); /* Region number. */ xMPUSettings->xRegion[ 0 ].ulRegionAttribute = - ( portMPU_REGION_READ_WRITE ) | /* Read and write. */ + ( portMPU_REGION_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ) | ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) | ( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) | ( portMPU_REGION_ENABLE ); From 51ea2bfe62f862b4f016b38e4c11abdc60fd4088 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Wed, 7 Sep 2022 19:49:48 +0530 Subject: [PATCH 16/24] Remove local stack variable form MPU wrappers It was possible for a third party that had already independently gained the ability to execute injected code to achieve further privilege escalation by branching directly inside a FreeRTOS MPU API wrapper function with a manually crafted stack frame. This commit removes the local stack variable `xRunningPrivileged` so that a manually crafted stack frame cannot be used for privilege escalation by branching directly inside a FreeRTOS MPU API wrapper. We thank Certibit Consulting, LLC, Huazhong University of Science and Technology and the SecLab team at Northeastern University for reporting this issue. Signed-off-by: Gaurav Aggarwal --- .github/lexicon.txt | 2 - include/mpu_wrappers.h | 30 - portable/Common/mpu_wrappers.c | 1858 +++++++++++++++++++++++------- portable/GCC/ARM_CM3_MPU/port.c | 55 +- portable/GCC/ARM_CM4_MPU/port.c | 55 +- portable/IAR/ARM_CM4F_MPU/port.c | 84 +- portable/RVDS/ARM_CM4_MPU/port.c | 55 +- 7 files changed, 1642 insertions(+), 497 deletions(-) diff --git a/.github/lexicon.txt b/.github/lexicon.txt index 2e6e9a956..15167603e 100644 --- a/.github/lexicon.txt +++ b/.github/lexicon.txt @@ -2533,7 +2533,6 @@ vportgetheapstats vportinitialiseblocks vportisrstartfirststask vportraisebasepri -vportresetprivilege vportsetmpuregistersetone vportsetuptimerinterrupt vportstartfirststask @@ -2852,7 +2851,6 @@ xperiod xportgetcoreid xportgetfreeheapsize xportinstallinterrupthandler -xportraiseprivilege xportregistercinterrupthandler xportregisterdump xportstartfirsttask diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h index 285876740..a7af4e190 100644 --- a/include/mpu_wrappers.h +++ b/include/mpu_wrappers.h @@ -170,36 +170,6 @@ #define PRIVILEGED_DATA __attribute__( ( section( "privileged_data" ) ) ) #define FREERTOS_SYSTEM_CALL __attribute__( ( section( "freertos_system_calls" ) ) ) - /** - * @brief Calls the port specific code to raise the privilege. - * - * Sets xRunningPrivileged to pdFALSE if privilege was raised, else sets - * it to pdTRUE. - */ - #define xPortRaisePrivilege( xRunningPrivileged ) \ - { \ - /* Check whether the processor is already privileged. */ \ - xRunningPrivileged = portIS_PRIVILEGED(); \ - \ - /* If the processor is not already privileged, raise privilege. */ \ - if( xRunningPrivileged == pdFALSE ) \ - { \ - portRAISE_PRIVILEGE(); \ - } \ - } - - /** - * @brief If xRunningPrivileged is not pdTRUE, calls the port specific - * code to reset the privilege, otherwise does nothing. - */ - #define vPortResetPrivilege( xRunningPrivileged ) \ - { \ - if( xRunningPrivileged == pdFALSE ) \ - { \ - portRESET_PRIVILEGE(); \ - } \ - } - #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ #else /* portUSING_MPU_WRAPPERS */ diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index 53b8d1117..f8de10efc 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -54,11 +54,23 @@ UBaseType_t uxPriority, TaskHandle_t * pxCreatedTask ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ); + } return xReturn; } @@ -75,11 +87,22 @@ StaticTask_t * const pxTaskBuffer ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer ); + } return xReturn; } @@ -89,24 +112,46 @@ #if ( INCLUDE_vTaskDelete == 1 ) void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskDelete( pxTaskToDelete ); - vPortResetPrivilege( xRunningPrivileged ); + vTaskDelete( pxTaskToDelete ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskDelete( pxTaskToDelete ); + } } -#endif +#endif /* if ( INCLUDE_vTaskDelete == 1 ) */ /*-----------------------------------------------------------*/ #if ( INCLUDE_xTaskDelayUntil == 1 ) BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged, xReturn; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); + } return xReturn; } @@ -116,11 +161,23 @@ #if ( INCLUDE_xTaskAbortDelay == 1 ) BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskAbortDelay( xTask ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskAbortDelay( xTask ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskAbortDelay( xTask ); + } return xReturn; } @@ -130,24 +187,45 @@ #if ( INCLUDE_vTaskDelay == 1 ) void MPU_vTaskDelay( TickType_t xTicksToDelay ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskDelay( xTicksToDelay ); - vPortResetPrivilege( xRunningPrivileged ); + vTaskDelay( xTicksToDelay ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskDelay( xTicksToDelay ); + } } -#endif +#endif /* if ( INCLUDE_vTaskDelay == 1 ) */ /*-----------------------------------------------------------*/ #if ( INCLUDE_uxTaskPriorityGet == 1 ) UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t pxTask ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - uxReturn = uxTaskPriorityGet( pxTask ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + uxReturn = uxTaskPriorityGet( pxTask ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + uxReturn = uxTaskPriorityGet( pxTask ); + } return uxReturn; } @@ -158,11 +236,21 @@ void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskPrioritySet( pxTask, uxNewPriority ); - vPortResetPrivilege( xRunningPrivileged ); + vTaskPrioritySet( pxTask, uxNewPriority ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskPrioritySet( pxTask, uxNewPriority ); + } } #endif /* if ( INCLUDE_vTaskPrioritySet == 1 ) */ /*-----------------------------------------------------------*/ @@ -171,11 +259,22 @@ eTaskState MPU_eTaskGetState( TaskHandle_t pxTask ) /* FREERTOS_SYSTEM_CALL */ { eTaskState eReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - eReturn = eTaskGetState( pxTask ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + eReturn = eTaskGetState( pxTask ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + eReturn = eTaskGetState( pxTask ); + } return eReturn; } @@ -188,11 +287,21 @@ BaseType_t xGetFreeStackSpace, eTaskState eState ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskGetInfo( xTask, pxTaskStatus, xGetFreeStackSpace, eState ); - vPortResetPrivilege( xRunningPrivileged ); + vTaskGetInfo( xTask, pxTaskStatus, xGetFreeStackSpace, eState ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskGetInfo( xTask, pxTaskStatus, xGetFreeStackSpace, eState ); + } } #endif /* if ( configUSE_TRACE_FACILITY == 1 ) */ /*-----------------------------------------------------------*/ @@ -201,11 +310,21 @@ TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskGetIdleTaskHandle(); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + xReturn = xTaskGetIdleTaskHandle(); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskGetIdleTaskHandle(); + } return xReturn; } @@ -215,44 +334,86 @@ #if ( INCLUDE_vTaskSuspend == 1 ) void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskSuspend( pxTaskToSuspend ); - vPortResetPrivilege( xRunningPrivileged ); + vTaskSuspend( pxTaskToSuspend ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskSuspend( pxTaskToSuspend ); + } } -#endif +#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ #if ( INCLUDE_vTaskSuspend == 1 ) void MPU_vTaskResume( TaskHandle_t pxTaskToResume ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskResume( pxTaskToResume ); - vPortResetPrivilege( xRunningPrivileged ); + vTaskResume( pxTaskToResume ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskResume( pxTaskToResume ); + } } -#endif +#endif /* if ( INCLUDE_vTaskSuspend == 1 ) */ /*-----------------------------------------------------------*/ void MPU_vTaskSuspendAll( void ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskSuspendAll(); - vPortResetPrivilege( xRunningPrivileged ); + vTaskSuspendAll(); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskSuspendAll(); + } } /*-----------------------------------------------------------*/ BaseType_t MPU_xTaskResumeAll( void ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskResumeAll(); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskResumeAll(); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskResumeAll(); + } return xReturn; } @@ -261,11 +422,22 @@ BaseType_t MPU_xTaskResumeAll( void ) /* FREERTOS_SYSTEM_CALL */ TickType_t MPU_xTaskGetTickCount( void ) /* FREERTOS_SYSTEM_CALL */ { TickType_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskGetTickCount(); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskGetTickCount(); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskGetTickCount(); + } return xReturn; } @@ -274,11 +446,22 @@ TickType_t MPU_xTaskGetTickCount( void ) /* FREERTOS_SYSTEM_CALL */ UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - uxReturn = uxTaskGetNumberOfTasks(); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + uxReturn = uxTaskGetNumberOfTasks(); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + uxReturn = uxTaskGetNumberOfTasks(); + } return uxReturn; } @@ -287,11 +470,22 @@ UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* FREERTOS_SYSTEM_CALL */ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ { char * pcReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - pcReturn = pcTaskGetName( xTaskToQuery ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + pcReturn = pcTaskGetName( xTaskToQuery ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + pcReturn = pcTaskGetName( xTaskToQuery ); + } return pcReturn; } @@ -301,11 +495,22 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskGetHandle( pcNameToQuery ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskGetHandle( pcNameToQuery ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskGetHandle( pcNameToQuery ); + } return xReturn; } @@ -315,36 +520,67 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) void MPU_vTaskList( char * pcWriteBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskList( pcWriteBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + vTaskList( pcWriteBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskList( pcWriteBuffer ); + } } -#endif +#endif /* if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */ /*-----------------------------------------------------------*/ #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) void MPU_vTaskGetRunTimeStats( char * pcWriteBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskGetRunTimeStats( pcWriteBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + vTaskGetRunTimeStats( pcWriteBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskGetRunTimeStats( pcWriteBuffer ); + } } -#endif +#endif /* if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */ /*-----------------------------------------------------------*/ #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) /* FREERTOS_SYSTEM_CALL */ { uint32_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = ulTaskGetIdleRunTimeCounter(); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = ulTaskGetIdleRunTimeCounter(); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = ulTaskGetIdleRunTimeCounter(); + } return xReturn; } @@ -355,11 +591,21 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskSetApplicationTaskTag( xTask, pxTagValue ); - vPortResetPrivilege( xRunningPrivileged ); + vTaskSetApplicationTaskTag( xTask, pxTagValue ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskSetApplicationTaskTag( xTask, pxTagValue ); + } } #endif /* if ( configUSE_APPLICATION_TASK_TAG == 1 ) */ /*-----------------------------------------------------------*/ @@ -368,11 +614,22 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */ { TaskHookFunction_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskGetApplicationTaskTag( xTask ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskGetApplicationTaskTag( xTask ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskGetApplicationTaskTag( xTask ); + } return xReturn; } @@ -384,11 +641,21 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ BaseType_t xIndex, void * pvValue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskSetThreadLocalStoragePointer( xTaskToSet, xIndex, pvValue ); - vPortResetPrivilege( xRunningPrivileged ); + vTaskSetThreadLocalStoragePointer( xTaskToSet, xIndex, pvValue ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskSetThreadLocalStoragePointer( xTaskToSet, xIndex, pvValue ); + } } #endif /* if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) */ /*-----------------------------------------------------------*/ @@ -398,11 +665,22 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ BaseType_t xIndex ) /* FREERTOS_SYSTEM_CALL */ { void * pvReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - pvReturn = pvTaskGetThreadLocalStoragePointer( xTaskToQuery, xIndex ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + pvReturn = pvTaskGetThreadLocalStoragePointer( xTaskToQuery, xIndex ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + pvReturn = pvTaskGetThreadLocalStoragePointer( xTaskToQuery, xIndex ); + } return pvReturn; } @@ -413,11 +691,23 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void * pvParameter ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter ); + } return xReturn; } @@ -430,11 +720,22 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ uint32_t * pulTotalRunTime ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime ); + } return uxReturn; } @@ -443,11 +744,23 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskCatchUpTicks( xTicksToCatchUp ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskCatchUpTicks( xTicksToCatchUp ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskCatchUpTicks( xTicksToCatchUp ); + } return xReturn; } @@ -457,11 +770,22 @@ BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTE UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - uxReturn = uxTaskGetStackHighWaterMark( xTask ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + uxReturn = uxTaskGetStackHighWaterMark( xTask ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + uxReturn = uxTaskGetStackHighWaterMark( xTask ); + } return uxReturn; } @@ -472,11 +796,22 @@ BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTE configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */ { configSTACK_DEPTH_TYPE uxReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - uxReturn = uxTaskGetStackHighWaterMark2( xTask ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + uxReturn = uxTaskGetStackHighWaterMark2( xTask ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + uxReturn = uxTaskGetStackHighWaterMark2( xTask ); + } return uxReturn; } @@ -487,11 +822,21 @@ BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTE TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskGetCurrentTaskHandle(); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + xReturn = xTaskGetCurrentTaskHandle(); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskGetCurrentTaskHandle(); + } return xReturn; } @@ -501,11 +846,23 @@ BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTE #if ( INCLUDE_xTaskGetSchedulerState == 1 ) BaseType_t MPU_xTaskGetSchedulerState( void ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskGetSchedulerState(); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskGetSchedulerState(); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskGetSchedulerState(); + } return xReturn; } @@ -514,22 +871,44 @@ BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTE void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTaskSetTimeOutState( pxTimeOut ); - vPortResetPrivilege( xRunningPrivileged ); + vTaskSetTimeOutState( pxTimeOut ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTaskSetTimeOutState( pxTimeOut ); + } } /*-----------------------------------------------------------*/ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait ); + } return xReturn; } @@ -542,11 +921,23 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, eNotifyAction eAction, uint32_t * pulPreviousNotificationValue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskGenericNotify( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskGenericNotify( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskGenericNotify( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue ); + } return xReturn; } @@ -560,11 +951,23 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, uint32_t * pulNotificationValue, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskGenericNotifyWait( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskGenericNotifyWait( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskGenericNotifyWait( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ); + } return xReturn; } @@ -577,11 +980,22 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { uint32_t ulReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - ulReturn = ulTaskGenericNotifyTake( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + ulReturn = ulTaskGenericNotifyTake( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + ulReturn = ulTaskGenericNotifyTake( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ); + } return ulReturn; } @@ -592,11 +1006,23 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, UBaseType_t uxIndexToClear ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTaskGenericNotifyStateClear( xTask, uxIndexToClear ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTaskGenericNotifyStateClear( xTask, uxIndexToClear ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTaskGenericNotifyStateClear( xTask, uxIndexToClear ); + } return xReturn; } @@ -609,11 +1035,22 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, uint32_t ulBitsToClear ) /* FREERTOS_SYSTEM_CALL */ { uint32_t ulReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - ulReturn = ulTaskGenericNotifyValueClear( xTask, uxIndexToClear, ulBitsToClear ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + ulReturn = ulTaskGenericNotifyValueClear( xTask, uxIndexToClear, ulBitsToClear ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + ulReturn = ulTaskGenericNotifyValueClear( xTask, uxIndexToClear, ulBitsToClear ); + } return ulReturn; } @@ -626,11 +1063,22 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType ); + } return xReturn; } @@ -645,11 +1093,22 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, const uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueGenericCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxStaticQueue, ucQueueType ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueGenericCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxStaticQueue, ucQueueType ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueGenericCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxStaticQueue, ucQueueType ); + } return xReturn; } @@ -659,11 +1118,23 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueGenericReset( pxQueue, xNewQueue ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueGenericReset( pxQueue, xNewQueue ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueGenericReset( pxQueue, xNewQueue ); + } return xReturn; } @@ -674,11 +1145,23 @@ BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition ); + } return xReturn; } @@ -687,11 +1170,22 @@ BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - uxReturn = uxQueueMessagesWaiting( pxQueue ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + uxReturn = uxQueueMessagesWaiting( pxQueue ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + uxReturn = uxQueueMessagesWaiting( pxQueue ); + } return uxReturn; } @@ -700,11 +1194,22 @@ UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue ) /* FREERTO UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - uxReturn = uxQueueSpacesAvailable( xQueue ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + uxReturn = uxQueueSpacesAvailable( xQueue ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + uxReturn = uxQueueSpacesAvailable( xQueue ); + } return uxReturn; } @@ -714,11 +1219,23 @@ BaseType_t MPU_xQueueReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueReceive( pxQueue, pvBuffer, xTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueReceive( pxQueue, pvBuffer, xTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueReceive( pxQueue, pvBuffer, xTicksToWait ); + } return xReturn; } @@ -728,11 +1245,23 @@ BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueuePeek( xQueue, pvBuffer, xTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueuePeek( xQueue, pvBuffer, xTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueuePeek( xQueue, pvBuffer, xTicksToWait ); + } return xReturn; } @@ -741,11 +1270,23 @@ BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueSemaphoreTake( xQueue, xTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueSemaphoreTake( xQueue, xTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueSemaphoreTake( xQueue, xTicksToWait ); + } return xReturn; } @@ -755,11 +1296,22 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* FREERTOS_SYSTEM_CALL */ { void * xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueGetMutexHolder( xSemaphore ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueGetMutexHolder( xSemaphore ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueGetMutexHolder( xSemaphore ); + } return xReturn; } @@ -770,11 +1322,22 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueCreateMutex( ucQueueType ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueCreateMutex( ucQueueType ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueCreateMutex( ucQueueType ); + } return xReturn; } @@ -786,11 +1349,22 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, StaticQueue_t * pxStaticQueue ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueCreateMutexStatic( ucQueueType, pxStaticQueue ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueCreateMutexStatic( ucQueueType, pxStaticQueue ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueCreateMutexStatic( ucQueueType, pxStaticQueue ); + } return xReturn; } @@ -802,11 +1376,22 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, UBaseType_t uxInitialCount ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount ); + } return xReturn; } @@ -820,11 +1405,22 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, StaticQueue_t * pxStaticQueue ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueCreateCountingSemaphoreStatic( uxMaxCount, uxInitialCount, pxStaticQueue ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueCreateCountingSemaphoreStatic( uxMaxCount, uxInitialCount, pxStaticQueue ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueCreateCountingSemaphoreStatic( uxMaxCount, uxInitialCount, pxStaticQueue ); + } return xReturn; } @@ -835,11 +1431,23 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime ); + } return xReturn; } @@ -849,11 +1457,23 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, #if ( configUSE_RECURSIVE_MUTEXES == 1 ) BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueGiveMutexRecursive( xMutex ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueGiveMutexRecursive( xMutex ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueGiveMutexRecursive( xMutex ); + } return xReturn; } @@ -864,11 +1484,22 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength ) /* FREERTOS_SYSTEM_CALL */ { QueueSetHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueCreateSet( uxEventQueueLength ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueCreateSet( uxEventQueueLength ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueCreateSet( uxEventQueueLength ); + } return xReturn; } @@ -880,11 +1511,22 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xBlockTimeTicks ) /* FREERTOS_SYSTEM_CALL */ { QueueSetMemberHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks ); + } return xReturn; } @@ -895,11 +1537,23 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet ); + } return xReturn; } @@ -910,11 +1564,23 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet ); + } return xReturn; } @@ -925,11 +1591,21 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char * pcName ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vQueueAddToRegistry( xQueue, pcName ); - vPortResetPrivilege( xRunningPrivileged ); + vQueueAddToRegistry( xQueue, pcName ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vQueueAddToRegistry( xQueue, pcName ); + } } #endif /* if configQUEUE_REGISTRY_SIZE > 0 */ /*-----------------------------------------------------------*/ @@ -937,11 +1613,21 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, #if configQUEUE_REGISTRY_SIZE > 0 void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vQueueUnregisterQueue( xQueue ); - vPortResetPrivilege( xRunningPrivileged ); + vQueueUnregisterQueue( xQueue ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vQueueUnregisterQueue( xQueue ); + } } #endif /* if configQUEUE_REGISTRY_SIZE > 0 */ /*-----------------------------------------------------------*/ @@ -950,11 +1636,22 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ { const char * pcReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - pcReturn = pcQueueGetName( xQueue ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + pcReturn = pcQueueGetName( xQueue ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + pcReturn = pcQueueGetName( xQueue ); + } return pcReturn; } @@ -963,11 +1660,21 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vQueueDelete( xQueue ); - vPortResetPrivilege( xRunningPrivileged ); + vQueueDelete( xQueue ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vQueueDelete( xQueue ); + } } /*-----------------------------------------------------------*/ @@ -979,11 +1686,22 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ TimerCallbackFunction_t pxCallbackFunction ) /* FREERTOS_SYSTEM_CALL */ { TimerHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ); + } return xReturn; } @@ -999,11 +1717,22 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ StaticTimer_t * pxTimerBuffer ) /* FREERTOS_SYSTEM_CALL */ { TimerHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer ); + } return xReturn; } @@ -1014,11 +1743,22 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { void * pvReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - pvReturn = pvTimerGetTimerID( xTimer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + pvReturn = pvTimerGetTimerID( xTimer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + pvReturn = pvTimerGetTimerID( xTimer ); + } return pvReturn; } @@ -1029,11 +1769,21 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void * pvNewID ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTimerSetTimerID( xTimer, pvNewID ); - vPortResetPrivilege( xRunningPrivileged ); + vTimerSetTimerID( xTimer, pvNewID ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTimerSetTimerID( xTimer, pvNewID ); + } } #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ @@ -1041,11 +1791,23 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ #if ( configUSE_TIMERS == 1 ) BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTimerIsTimerActive( xTimer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTimerIsTimerActive( xTimer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTimerIsTimerActive( xTimer ); + } return xReturn; } @@ -1056,11 +1818,22 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTimerGetTimerDaemonTaskHandle(); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTimerGetTimerDaemonTaskHandle(); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTimerGetTimerDaemonTaskHandle(); + } return xReturn; } @@ -1073,11 +1846,23 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ uint32_t ulParameter2, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait ); + } return xReturn; } @@ -1088,11 +1873,21 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vTimerSetReloadMode( xTimer, uxAutoReload ); - vPortResetPrivilege( xRunningPrivileged ); + vTimerSetReloadMode( xTimer, uxAutoReload ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vTimerSetReloadMode( xTimer, uxAutoReload ); + } } #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ @@ -1101,11 +1896,22 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - uxReturn = uxTimerGetReloadMode( xTimer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + uxReturn = uxTimerGetReloadMode( xTimer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + uxReturn = uxTimerGetReloadMode( xTimer ); + } return uxReturn; } @@ -1116,11 +1922,22 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { const char * pcReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - pcReturn = pcTimerGetName( xTimer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + pcReturn = pcTimerGetName( xTimer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + pcReturn = pcTimerGetName( xTimer ); + } return pcReturn; } @@ -1131,11 +1948,22 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { TickType_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTimerGetPeriod( xTimer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTimerGetPeriod( xTimer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTimerGetPeriod( xTimer ); + } return xReturn; } @@ -1146,11 +1974,22 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { TickType_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTimerGetExpiryTime( xTimer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTimerGetExpiryTime( xTimer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTimerGetExpiryTime( xTimer ); + } return xReturn; } @@ -1165,11 +2004,22 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ const TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { BaseType_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xTimerGenericCommand( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xTimerGenericCommand( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xTimerGenericCommand( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait ); + } return xReturn; } @@ -1180,11 +2030,22 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ EventGroupHandle_t MPU_xEventGroupCreate( void ) /* FREERTOS_SYSTEM_CALL */ { EventGroupHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xEventGroupCreate(); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xEventGroupCreate(); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xEventGroupCreate(); + } return xReturn; } @@ -1195,11 +2056,22 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) /* FREERTOS_SYSTEM_CALL */ { EventGroupHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xEventGroupCreateStatic( pxEventGroupBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xEventGroupCreateStatic( pxEventGroupBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xEventGroupCreateStatic( pxEventGroupBuffer ); + } return xReturn; } @@ -1213,11 +2085,22 @@ EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait ); + } return xReturn; } @@ -1227,11 +2110,22 @@ EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xEventGroupClearBits( xEventGroup, uxBitsToClear ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xEventGroupClearBits( xEventGroup, uxBitsToClear ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xEventGroupClearBits( xEventGroup, uxBitsToClear ); + } return xReturn; } @@ -1241,11 +2135,22 @@ EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xEventGroupSetBits( xEventGroup, uxBitsToSet ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xEventGroupSetBits( xEventGroup, uxBitsToSet ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xEventGroupSetBits( xEventGroup, uxBitsToSet ); + } return xReturn; } @@ -1257,11 +2162,22 @@ EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); + } return xReturn; } @@ -1269,11 +2185,21 @@ EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vEventGroupDelete( xEventGroup ); - vPortResetPrivilege( xRunningPrivileged ); + vEventGroupDelete( xEventGroup ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vEventGroupDelete( xEventGroup ); + } } /*-----------------------------------------------------------*/ @@ -1283,11 +2209,22 @@ size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { size_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xStreamBufferSend( xStreamBuffer, pvTxData, xDataLengthBytes, xTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xStreamBufferSend( xStreamBuffer, pvTxData, xDataLengthBytes, xTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xStreamBufferSend( xStreamBuffer, pvTxData, xDataLengthBytes, xTicksToWait ); + } return xReturn; } @@ -1296,11 +2233,22 @@ size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { size_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xStreamBufferNextMessageLengthBytes( xStreamBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xStreamBufferNextMessageLengthBytes( xStreamBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xStreamBufferNextMessageLengthBytes( xStreamBuffer ); + } return xReturn; } @@ -1312,11 +2260,22 @@ size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { size_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xStreamBufferReceive( xStreamBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xStreamBufferReceive( xStreamBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xStreamBufferReceive( xStreamBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ); + } return xReturn; } @@ -1324,21 +2283,43 @@ size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged; + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - xPortRaisePrivilege( xRunningPrivileged ); - vStreamBufferDelete( xStreamBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + vStreamBufferDelete( xStreamBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + vStreamBufferDelete( xStreamBuffer ); + } } /*-----------------------------------------------------------*/ BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xStreamBufferIsFull( xStreamBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xStreamBufferIsFull( xStreamBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xStreamBufferIsFull( xStreamBuffer ); + } return xReturn; } @@ -1346,11 +2327,23 @@ BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) /* FREE BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xStreamBufferIsEmpty( xStreamBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xStreamBufferIsEmpty( xStreamBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xStreamBufferIsEmpty( xStreamBuffer ); + } return xReturn; } @@ -1358,11 +2351,23 @@ BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) /* FRE BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xStreamBufferReset( xStreamBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xStreamBufferReset( xStreamBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xStreamBufferReset( xStreamBuffer ); + } return xReturn; } @@ -1371,11 +2376,21 @@ BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) /* FREER size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { size_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xStreamBufferSpacesAvailable( xStreamBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + xReturn = xStreamBufferSpacesAvailable( xStreamBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xStreamBufferSpacesAvailable( xStreamBuffer ); + } return xReturn; } @@ -1384,11 +2399,22 @@ size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { size_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xStreamBufferBytesAvailable( xStreamBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xStreamBufferBytesAvailable( xStreamBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xStreamBufferBytesAvailable( xStreamBuffer ); + } return xReturn; } @@ -1397,11 +2423,23 @@ size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xReturn, xRunningPrivileged; + BaseType_t xReturn; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xStreamBufferSetTriggerLevel( xStreamBuffer, xTriggerLevel ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xStreamBufferSetTriggerLevel( xStreamBuffer, xTriggerLevel ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xStreamBufferSetTriggerLevel( xStreamBuffer, xTriggerLevel ); + } return xReturn; } @@ -1413,11 +2451,22 @@ BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, BaseType_t xIsMessageBuffer ) /* FREERTOS_SYSTEM_CALL */ { StreamBufferHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer ); + } return xReturn; } @@ -1432,11 +2481,22 @@ BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, StaticStreamBuffer_t * const pxStaticStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { StreamBufferHandle_t xReturn; - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - xReturn = xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer, pucStreamBufferStorageArea, pxStaticStreamBuffer ); - vPortResetPrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); + + xReturn = xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer, pucStreamBufferStorageArea, pxStaticStreamBuffer ); + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + xReturn = xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer, pucStreamBufferStorageArea, pxStaticStreamBuffer ); + } return xReturn; } @@ -1452,11 +2512,21 @@ BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, * void MPU_FunctionName( [parameters ] ) FREERTOS_SYSTEM_CALL; * void MPU_FunctionName( [parameters ] ) * { - * BaseType_t xRunningPrivileged; + * if( portIS_PRIVILEGED() == pdFALSE ) + * { + * portRAISE_PRIVILEGE(); + * portMEMORY_BARRIER(); * - * xPortRaisePrivilege( xRunningPrivileged ); - * FunctionName( [parameters ] ); - * vPortResetPrivilege( xRunningPrivileged ); + * FunctionName( [parameters ] ); + * portMEMORY_BARRIER(); + * + * portRESET_PRIVILEGE(); + * portMEMORY_BARRIER(); + * } + * else + * { + * FunctionName( [parameters ] ); + * } * } */ diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index da4a4a682..816249489 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -478,30 +478,55 @@ void vPortEndScheduler( void ) void vPortEnterCritical( void ) { - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + portMEMORY_BARRIER(); - vPortResetPrivilege( xRunningPrivileged ); + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + } } /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - - configASSERT( uxCriticalNesting ); - uxCriticalNesting--; - - if( uxCriticalNesting == 0 ) + if( portIS_PRIVILEGED() == pdFALSE ) { - portENABLE_INTERRUPTS(); - } + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - vPortResetPrivilege( xRunningPrivileged ); + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + } } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index 9b2d28d75..c21ec9ef6 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -514,30 +514,55 @@ void vPortEndScheduler( void ) void vPortEnterCritical( void ) { - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + portMEMORY_BARRIER(); - vPortResetPrivilege( xRunningPrivileged ); + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + } } /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - - configASSERT( uxCriticalNesting ); - uxCriticalNesting--; - - if( uxCriticalNesting == 0 ) + if( portIS_PRIVILEGED() == pdFALSE ) { - portENABLE_INTERRUPTS(); - } + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - vPortResetPrivilege( xRunningPrivileged ); + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + } } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index 708334fd4..e32134dfc 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -442,41 +442,73 @@ void vPortEndScheduler( void ) void vPortEnterCritical( void ) { - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; - - /* This is not the interrupt safe version of the enter critical function so - * assert() if it is being called from an interrupt context. Only API - * functions that end in "FromISR" can be used in an interrupt. Only assert if - * the critical nesting count is 1 to protect against recursive calls if the - * assert function also uses a critical section. */ - if( uxCriticalNesting == 1 ) + if( portIS_PRIVILEGED() == pdFALSE ) { - configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 ); - } + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - vPortResetPrivilege( xRunningPrivileged ); + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + /* This is not the interrupt safe version of the enter critical function so + * assert() if it is being called from an interrupt context. Only API + * functions that end in "FromISR" can be used in an interrupt. Only assert if + * the critical nesting count is 1 to protect against recursive calls if the + * assert function also uses a critical section. */ + if( uxCriticalNesting == 1 ) + { + configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 ); + } + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + /* This is not the interrupt safe version of the enter critical function so + * assert() if it is being called from an interrupt context. Only API + * functions that end in "FromISR" can be used in an interrupt. Only assert if + * the critical nesting count is 1 to protect against recursive calls if the + * assert function also uses a critical section. */ + if( uxCriticalNesting == 1 ) + { + configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 ); + } + } } /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - - configASSERT( uxCriticalNesting ); - - uxCriticalNesting--; - - if( uxCriticalNesting == 0 ) + if( portIS_PRIVILEGED() == pdFALSE ) { - portENABLE_INTERRUPTS(); - } + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - vPortResetPrivilege( xRunningPrivileged ); + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + } } /*-----------------------------------------------------------*/ diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index fe777ed40..350daf683 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -517,30 +517,55 @@ void vPortEndScheduler( void ) void vPortEnterCritical( void ) { - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); + if( portIS_PRIVILEGED() == pdFALSE ) + { + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - portDISABLE_INTERRUPTS(); - uxCriticalNesting++; + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + portMEMORY_BARRIER(); - vPortResetPrivilege( xRunningPrivileged ); + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + } } /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { - BaseType_t xRunningPrivileged; - xPortRaisePrivilege( xRunningPrivileged ); - - configASSERT( uxCriticalNesting ); - uxCriticalNesting--; - - if( uxCriticalNesting == 0 ) + if( portIS_PRIVILEGED() == pdFALSE ) { - portENABLE_INTERRUPTS(); - } + portRAISE_PRIVILEGE(); + portMEMORY_BARRIER(); - vPortResetPrivilege( xRunningPrivileged ); + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + portMEMORY_BARRIER(); + + portRESET_PRIVILEGE(); + portMEMORY_BARRIER(); + } + else + { + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } + } } /*-----------------------------------------------------------*/ From da73aa6329740bd3bbdc5f35fd310bf4ec1329c9 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Thu, 8 Sep 2022 10:17:32 +0530 Subject: [PATCH 17/24] Restrict unpriv task to invoke code with privilege It was possible for an unprivileged task to invoke any function with privilege by passing it as a parameter to MPU_xTaskCreate, MPU_xTaskCreateStatic, MPU_xTimerCreate, MPU_xTimerCreateStatic, or MPU_xTimerPendFunctionCall. This commit ensures that MPU_xTaskCreate and MPU_xTaskCreateStatic can only create unprivileged tasks. It also removes the following APIs: 1. MPU_xTimerCreate 2. MPU_xTimerCreateStatic 3. MPU_xTimerPendFunctionCall We thank Huazhong University of Science and Technology for reporting this issue. Signed-off-by: Gaurav Aggarwal --- include/mpu_wrappers.h | 3 -- portable/Common/mpu_wrappers.c | 96 +++------------------------------- 2 files changed, 6 insertions(+), 93 deletions(-) diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h index a7af4e190..0cbbabfc2 100644 --- a/include/mpu_wrappers.h +++ b/include/mpu_wrappers.h @@ -117,13 +117,10 @@ #endif /* Map standard timer.h API functions to the MPU equivalents. */ - #define xTimerCreate MPU_xTimerCreate - #define xTimerCreateStatic MPU_xTimerCreateStatic #define pvTimerGetTimerID MPU_pvTimerGetTimerID #define vTimerSetTimerID MPU_vTimerSetTimerID #define xTimerIsTimerActive MPU_xTimerIsTimerActive #define xTimerGetTimerDaemonTaskHandle MPU_xTimerGetTimerDaemonTaskHandle - #define xTimerPendFunctionCall MPU_xTimerPendFunctionCall #define pcTimerGetName MPU_pcTimerGetName #define vTimerSetReloadMode MPU_vTimerSetReloadMode #define uxTimerGetReloadMode MPU_uxTimerGetReloadMode diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index f8de10efc..ce77f7276 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -61,6 +61,9 @@ portRAISE_PRIVILEGE(); portMEMORY_BARRIER(); + uxPriority = uxPriority & ~( portPRIVILEGE_BIT ); + portMEMORY_BARRIER(); + xReturn = xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ); portMEMORY_BARRIER(); @@ -93,6 +96,9 @@ portRAISE_PRIVILEGE(); portMEMORY_BARRIER(); + uxPriority = uxPriority & ~( portPRIVILEGE_BIT ); + portMEMORY_BARRIER(); + xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer ); portMEMORY_BARRIER(); @@ -1678,67 +1684,6 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ } /*-----------------------------------------------------------*/ -#if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) - TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, - const TickType_t xTimerPeriodInTicks, - const UBaseType_t uxAutoReload, - void * const pvTimerID, - TimerCallbackFunction_t pxCallbackFunction ) /* FREERTOS_SYSTEM_CALL */ - { - TimerHandle_t xReturn; - - if( portIS_PRIVILEGED() == pdFALSE ) - { - portRAISE_PRIVILEGE(); - portMEMORY_BARRIER(); - - xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ); - portMEMORY_BARRIER(); - - portRESET_PRIVILEGE(); - portMEMORY_BARRIER(); - } - else - { - xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ); - } - - return xReturn; - } -#endif /* if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) */ -/*-----------------------------------------------------------*/ - -#if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) - TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, - const TickType_t xTimerPeriodInTicks, - const UBaseType_t uxAutoReload, - void * const pvTimerID, - TimerCallbackFunction_t pxCallbackFunction, - StaticTimer_t * pxTimerBuffer ) /* FREERTOS_SYSTEM_CALL */ - { - TimerHandle_t xReturn; - - if( portIS_PRIVILEGED() == pdFALSE ) - { - portRAISE_PRIVILEGE(); - portMEMORY_BARRIER(); - - xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer ); - portMEMORY_BARRIER(); - - portRESET_PRIVILEGE(); - portMEMORY_BARRIER(); - } - else - { - xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer ); - } - - return xReturn; - } -#endif /* if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) */ -/*-----------------------------------------------------------*/ - #if ( configUSE_TIMERS == 1 ) void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { @@ -1840,35 +1785,6 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ #endif /* if ( configUSE_TIMERS == 1 ) */ /*-----------------------------------------------------------*/ -#if ( ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) - BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, - void * pvParameter1, - uint32_t ulParameter2, - TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ - { - BaseType_t xReturn; - - if( portIS_PRIVILEGED() == pdFALSE ) - { - portRAISE_PRIVILEGE(); - portMEMORY_BARRIER(); - - xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait ); - portMEMORY_BARRIER(); - - portRESET_PRIVILEGE(); - portMEMORY_BARRIER(); - } - else - { - xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait ); - } - - return xReturn; - } -#endif /* if ( ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) */ -/*-----------------------------------------------------------*/ - #if ( configUSE_TIMERS == 1 ) void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ) /* FREERTOS_SYSTEM_CALL */ From 7a98bd8d7831fc6a17c0d8d75d3ff8b19a896b21 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Fri, 16 Sep 2022 15:17:39 +0530 Subject: [PATCH 18/24] Added checks for xIndex in ThreadLocalStorage APIs It was possible for a third party that already independently gained the ability to execute injected code to read from or write to arbitrary addresses by passing a negative argument as the xIndex parameter to pvTaskGetThreadLocalStoragePointer() or vTaskSetThreadLocalStoragePointer respectively. This commit adds checks to ensure that passing a negative argument as the xIndex parameter does not cause arbitrary read or write. We thank Certibit Consulting, LLC for reporting this issue. Signed-off-by: Gaurav Aggarwal --- tasks.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tasks.c b/tasks.c index 8a7bf9875..2435d7051 100644 --- a/tasks.c +++ b/tasks.c @@ -3600,7 +3600,8 @@ static portTASK_FUNCTION( prvIdleTask, pvParameters ) { TCB_t * pxTCB; - if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS ) + if( ( xIndex >= 0 ) && + ( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS ) ) { pxTCB = prvGetTCBFromHandle( xTaskToSet ); configASSERT( pxTCB != NULL ); @@ -3619,7 +3620,8 @@ static portTASK_FUNCTION( prvIdleTask, pvParameters ) void * pvReturn = NULL; TCB_t * pxTCB; - if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS ) + if( ( xIndex >= 0 ) && + ( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS ) ) { pxTCB = prvGetTCBFromHandle( xTaskToQuery ); pvReturn = pxTCB->pvThreadLocalStoragePointers[ xIndex ]; From 94223d79302245ee47c818779d252c86b8a26c42 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Fri, 16 Sep 2022 15:35:57 +0530 Subject: [PATCH 19/24] Update History.txt Signed-off-by: Gaurav Aggarwal --- History.txt | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/History.txt b/History.txt index cead9abf5..5db885ad9 100644 --- a/History.txt +++ b/History.txt @@ -1,5 +1,30 @@ Documentation and download available at https://www.FreeRTOS.org/ +Changes between FreeRTOS V10.4.3 LTS Patch 2 and FreeRTOS V10.4.3 LTS Patch 3 released September 16 2022 + + + ARMv7-M and ARMv8-M MPU ports: It is possible for a third party that + already independently gained the ability to execute injected code to + read from or write to arbitrary addresses by passing a negative argument + as the xIndex parameter to pvTaskGetThreadLocalStoragePointer() or + vTaskSetThreadLocalStoragePointer respectively. + We thank Certibit Consulting, LLC for reporting this issue. + + ARMv7-M and ARMv8-M MPU ports: It is possible for an unprivileged task to + invoke any function with privilege by passing it as a parameter to + MPU_xTaskCreate, MPU_xTaskCreateStatic, MPU_xTimerCreate, + MPU_xTimerCreateStatic, or MPU_xTimerPendFunctionCall. + We thank Huazhong University of Science and Technology for reporting this issue. + + ARMv7-M and ARMv8-M ports: It is possible for a third party that has + already independently gained the ability to execute injected code to + achieve further privilege escalation by branching directly inside a + FreeRTOS MPU API wrapper function with a manually crafted stack frame. + We thank Certibit Consulting, LLC, Huazhong University of Science and + Technology and the SecLab team at Northeastern University for reporting + this issue. + + ARMv7-M MPU ports: It is possible to configure overlapping memory + protection unit (MPU) regions such that an unprivileged task can access + privileged data. + We thank the SecLab team at Northeastern University for reporting this issue. + Changes between FreeRTOS V10.4.3 LTS Patch 1 and FreeRTOS V10.4.3 LTS Patch 2 released November 12 2021 + ARMv7-M and ARMv8-M MPU ports – prevent non-kernel code from calling the From 14f9cc660f9af676c753274e87cd246a1360bbb6 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Fri, 16 Sep 2022 15:44:40 +0530 Subject: [PATCH 20/24] Update History.txt Signed-off-by: Gaurav Aggarwal --- History.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/History.txt b/History.txt index 5db885ad9..9d1fa4917 100644 --- a/History.txt +++ b/History.txt @@ -13,7 +13,7 @@ Changes between FreeRTOS V10.4.3 LTS Patch 2 and FreeRTOS V10.4.3 LTS Patch 3 re MPU_xTaskCreate, MPU_xTaskCreateStatic, MPU_xTimerCreate, MPU_xTimerCreateStatic, or MPU_xTimerPendFunctionCall. We thank Huazhong University of Science and Technology for reporting this issue. - + ARMv7-M and ARMv8-M ports: It is possible for a third party that has + + ARMv7-M and ARMv8-M MPU ports: It is possible for a third party that has already independently gained the ability to execute injected code to achieve further privilege escalation by branching directly inside a FreeRTOS MPU API wrapper function with a manually crafted stack frame. From ac6efdd5441aa2504c64660d499deacf59cd3933 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Fri, 16 Sep 2022 16:43:52 +0530 Subject: [PATCH 21/24] Fix failed CI check Signed-off-by: Gaurav Aggarwal --- .github/workflows/header-checks.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.github/workflows/header-checks.yml b/.github/workflows/header-checks.yml index 4d9546c4b..2a68ea98c 100644 --- a/.github/workflows/header-checks.yml +++ b/.github/workflows/header-checks.yml @@ -16,12 +16,12 @@ jobs: env: GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} - # Get latest checks from master + # Get latest checks from main - name: Checkout FreeRTOS Tools uses: actions/checkout@v2 with: repository: FreeRTOS/FreeRTOS - ref: master + ref: main path: tools # Checkout user pull request changes From 9fa8dcb33ca866d60bd6184ef4e574384cd68454 Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Fri, 16 Sep 2022 22:11:56 +0530 Subject: [PATCH 22/24] Update History.txt as per PR feedback Signed-off-by: Gaurav Aggarwal --- History.txt | 33 ++++++++++++++++++++++----------- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git a/History.txt b/History.txt index 9d1fa4917..c0958b74e 100644 --- a/History.txt +++ b/History.txt @@ -2,28 +2,39 @@ Documentation and download available at https://www.FreeRTOS.org/ Changes between FreeRTOS V10.4.3 LTS Patch 2 and FreeRTOS V10.4.3 LTS Patch 3 released September 16 2022 - + ARMv7-M and ARMv8-M MPU ports: It is possible for a third party that + + ARMv7-M and ARMv8-M MPU ports: It was possible for a third party that already independently gained the ability to execute injected code to read from or write to arbitrary addresses by passing a negative argument as the xIndex parameter to pvTaskGetThreadLocalStoragePointer() or - vTaskSetThreadLocalStoragePointer respectively. + vTaskSetThreadLocalStoragePointer respectively. A check has been added to + ensure that passing a negative argument as the xIndex parameter does not + cause arbitrary read or write. We thank Certibit Consulting, LLC for reporting this issue. - + ARMv7-M and ARMv8-M MPU ports: It is possible for an unprivileged task to - invoke any function with privilege by passing it as a parameter to + + ARMv7-M and ARMv8-M MPU ports: It was possible for an unprivileged task + to invoke any function with privilege by passing it as a parameter to MPU_xTaskCreate, MPU_xTaskCreateStatic, MPU_xTimerCreate, - MPU_xTimerCreateStatic, or MPU_xTimerPendFunctionCall. - We thank Huazhong University of Science and Technology for reporting this issue. - + ARMv7-M and ARMv8-M MPU ports: It is possible for a third party that has + MPU_xTimerCreateStatic, or MPU_xTimerPendFunctionCall. MPU_xTaskCreate + and MPU_xTaskCreateStatic have been updated to only allow creation of + unprivileged tasks. MPU_xTimerCreate, MPU_xTimerCreateStatic and + MPU_xTimerPendFunctionCall APIs have been removed. + We thank Huazhong University of Science and Technology for reporting + this issue. + + ARMv7-M and ARMv8-M MPU ports: It was possible for a third party that already independently gained the ability to execute injected code to achieve further privilege escalation by branching directly inside a FreeRTOS MPU API wrapper function with a manually crafted stack frame. + The local stack variable `xRunningPrivileged` has been removed so that + a manually crafted stack frame cannot be used for privilege escalation + by branching directly inside a FreeRTOS MPU API wrapper. We thank Certibit Consulting, LLC, Huazhong University of Science and Technology and the SecLab team at Northeastern University for reporting this issue. - + ARMv7-M MPU ports: It is possible to configure overlapping memory - protection unit (MPU) regions such that an unprivileged task can access - privileged data. - We thank the SecLab team at Northeastern University for reporting this issue. + + ARMv7-M MPU ports: It was possible to configure overlapping memory + protection unit (MPU) regions such that an unprivileged task could access + privileged data. The kernel now uses highest numbered MPU regions for + kernel protections to prevent such MPU configurations. + We thank the SecLab team at Northeastern University for reporting this + issue. Changes between FreeRTOS V10.4.3 LTS Patch 1 and FreeRTOS V10.4.3 LTS Patch 2 released November 12 2021 From 292c794e985dfe8ef1b0e0ce1a1cf2d933ef493b Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Fri, 16 Sep 2022 18:13:24 +0000 Subject: [PATCH 23/24] [AUTO][RELEASE]: Bump task.h version macros to "10.4.3 LTS Patch 3" --- include/task.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/task.h b/include/task.h index 39f2a1c68..bf460c607 100644 --- a/include/task.h +++ b/include/task.h @@ -44,7 +44,7 @@ * MACROS AND DEFINITIONS *----------------------------------------------------------*/ -#define tskKERNEL_VERSION_NUMBER "V10.4.3 LTS Patch 2" +#define tskKERNEL_VERSION_NUMBER "V10.4.3 LTS Patch 3" #define tskKERNEL_VERSION_MAJOR 10 #define tskKERNEL_VERSION_MINOR 4 #define tskKERNEL_VERSION_BUILD 3 From 0437c8257aaeed4ecf0c50d2e1c7e8e48c4b799e Mon Sep 17 00:00:00 2001 From: Gaurav Aggarwal Date: Fri, 16 Sep 2022 18:13:25 +0000 Subject: [PATCH 24/24] [AUTO][RELEASE]: Bump file header version to "10.4.3 LTS Patch 3" --- croutine.c | 2 +- event_groups.c | 2 +- include/FreeRTOS.h | 2 +- include/StackMacros.h | 2 +- include/atomic.h | 2 +- include/croutine.h | 2 +- include/deprecated_definitions.h | 2 +- include/event_groups.h | 2 +- include/list.h | 2 +- include/message_buffer.h | 2 +- include/mpu_prototypes.h | 2 +- include/mpu_wrappers.h | 2 +- include/portable.h | 2 +- include/projdefs.h | 2 +- include/queue.h | 2 +- include/semphr.h | 2 +- include/stack_macros.h | 2 +- include/stdint.readme | 2 +- include/stream_buffer.h | 2 +- include/task.h | 2 +- include/timers.h | 2 +- list.c | 2 +- portable/ARMv8M/copy_files.py | 2 +- portable/ARMv8M/non_secure/port.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c | 2 +- .../ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h | 2 +- portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s | 2 +- .../ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h | 2 +- portable/ARMv8M/non_secure/portasm.h | 2 +- .../secure/context/portable/GCC/ARM_CM23/secure_context_port.c | 2 +- .../secure/context/portable/GCC/ARM_CM33/secure_context_port.c | 2 +- .../context/portable/IAR/ARM_CM23/secure_context_port_asm.s | 2 +- .../context/portable/IAR/ARM_CM33/secure_context_port_asm.s | 2 +- portable/ARMv8M/secure/context/secure_context.c | 2 +- portable/ARMv8M/secure/context/secure_context.h | 2 +- portable/ARMv8M/secure/heap/secure_heap.c | 2 +- portable/ARMv8M/secure/heap/secure_heap.h | 2 +- portable/ARMv8M/secure/init/secure_init.c | 2 +- portable/ARMv8M/secure/init/secure_init.h | 2 +- portable/ARMv8M/secure/macros/secure_port_macros.h | 2 +- portable/BCC/16BitDOS/Flsh186/port.c | 2 +- portable/BCC/16BitDOS/Flsh186/prtmacro.h | 2 +- portable/BCC/16BitDOS/PC/port.c | 2 +- portable/BCC/16BitDOS/PC/prtmacro.h | 2 +- portable/BCC/16BitDOS/common/portasm.h | 2 +- portable/BCC/16BitDOS/common/portcomn.c | 2 +- portable/CCS/ARM_CM3/port.c | 2 +- portable/CCS/ARM_CM3/portasm.asm | 2 +- portable/CCS/ARM_CM3/portmacro.h | 2 +- portable/CCS/ARM_CM4F/port.c | 2 +- portable/CCS/ARM_CM4F/portasm.asm | 2 +- portable/CCS/ARM_CM4F/portmacro.h | 2 +- portable/CCS/ARM_Cortex-R4/port.c | 2 +- portable/CCS/ARM_Cortex-R4/portASM.asm | 2 +- portable/CCS/ARM_Cortex-R4/portmacro.h | 2 +- portable/CCS/MSP430X/data_model.h | 2 +- portable/CCS/MSP430X/port.c | 2 +- portable/CCS/MSP430X/portext.asm | 2 +- portable/CCS/MSP430X/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V1/port.c | 2 +- portable/CodeWarrior/ColdFire_V1/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V1/portmacro.h | 2 +- portable/CodeWarrior/ColdFire_V2/port.c | 2 +- portable/CodeWarrior/ColdFire_V2/portasm.S | 2 +- portable/CodeWarrior/ColdFire_V2/portmacro.h | 2 +- portable/CodeWarrior/HCS12/port.c | 2 +- portable/CodeWarrior/HCS12/portmacro.h | 2 +- portable/Common/mpu_wrappers.c | 2 +- portable/GCC/ARM7_AT91FR40008/port.c | 2 +- portable/GCC/ARM7_AT91FR40008/portISR.c | 2 +- portable/GCC/ARM7_AT91FR40008/portmacro.h | 2 +- portable/GCC/ARM7_AT91SAM7S/port.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portISR.c | 2 +- portable/GCC/ARM7_AT91SAM7S/portmacro.h | 2 +- portable/GCC/ARM7_LPC2000/port.c | 2 +- portable/GCC/ARM7_LPC2000/portISR.c | 2 +- portable/GCC/ARM7_LPC2000/portmacro.h | 2 +- portable/GCC/ARM7_LPC23xx/port.c | 2 +- portable/GCC/ARM7_LPC23xx/portISR.c | 2 +- portable/GCC/ARM7_LPC23xx/portmacro.h | 2 +- portable/GCC/ARM_CA53_64_BIT/port.c | 2 +- portable/GCC/ARM_CA53_64_BIT/portASM.S | 2 +- portable/GCC/ARM_CA53_64_BIT/portmacro.h | 2 +- portable/GCC/ARM_CA9/port.c | 2 +- portable/GCC/ARM_CA9/portASM.S | 2 +- portable/GCC/ARM_CA9/portmacro.h | 2 +- portable/GCC/ARM_CM0/port.c | 2 +- portable/GCC/ARM_CM0/portmacro.h | 2 +- portable/GCC/ARM_CM23/non_secure/port.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context.c | 2 +- portable/GCC/ARM_CM23/secure/secure_context.h | 2 +- portable/GCC/ARM_CM23/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM23/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM23/secure/secure_init.c | 2 +- portable/GCC/ARM_CM23/secure/secure_init.h | 2 +- portable/GCC/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM3/port.c | 2 +- portable/GCC/ARM_CM3/portmacro.h | 2 +- portable/GCC/ARM_CM33/non_secure/port.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context.c | 2 +- portable/GCC/ARM_CM33/secure/secure_context.h | 2 +- portable/GCC/ARM_CM33/secure/secure_context_port.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.c | 2 +- portable/GCC/ARM_CM33/secure/secure_heap.h | 2 +- portable/GCC/ARM_CM33/secure/secure_init.c | 2 +- portable/GCC/ARM_CM33/secure/secure_init.h | 2 +- portable/GCC/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/GCC/ARM_CM3_MPU/port.c | 2 +- portable/GCC/ARM_CM3_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM4F/port.c | 2 +- portable/GCC/ARM_CM4F/portmacro.h | 2 +- portable/GCC/ARM_CM4_MPU/port.c | 2 +- portable/GCC/ARM_CM4_MPU/portmacro.h | 2 +- portable/GCC/ARM_CM7/r0p1/port.c | 2 +- portable/GCC/ARM_CM7/r0p1/portmacro.h | 2 +- portable/GCC/ARM_CR5/port.c | 2 +- portable/GCC/ARM_CR5/portASM.S | 2 +- portable/GCC/ARM_CR5/portmacro.h | 2 +- portable/GCC/ARM_CRx_No_GIC/port.c | 2 +- portable/GCC/ARM_CRx_No_GIC/portASM.S | 2 +- portable/GCC/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/GCC/ATMega323/port.c | 2 +- portable/GCC/ATMega323/portmacro.h | 2 +- portable/GCC/AVR32_UC3/port.c | 2 +- portable/GCC/AVR32_UC3/portmacro.h | 2 +- portable/GCC/AVR_AVRDx/port.c | 2 +- portable/GCC/AVR_AVRDx/portmacro.h | 2 +- portable/GCC/AVR_Mega0/port.c | 2 +- portable/GCC/AVR_Mega0/portmacro.h | 2 +- portable/GCC/CORTUS_APS3/port.c | 2 +- portable/GCC/CORTUS_APS3/portmacro.h | 2 +- portable/GCC/ColdFire_V2/port.c | 2 +- portable/GCC/ColdFire_V2/portasm.S | 2 +- portable/GCC/ColdFire_V2/portmacro.h | 2 +- portable/GCC/H8S2329/port.c | 2 +- portable/GCC/H8S2329/portmacro.h | 2 +- portable/GCC/HCS12/port.c | 2 +- portable/GCC/HCS12/portmacro.h | 2 +- portable/GCC/IA32_flat/ISR_Support.h | 2 +- portable/GCC/IA32_flat/port.c | 2 +- portable/GCC/IA32_flat/portASM.S | 2 +- portable/GCC/IA32_flat/portmacro.h | 2 +- portable/GCC/MSP430F449/port.c | 2 +- portable/GCC/MSP430F449/portmacro.h | 2 +- portable/GCC/MicroBlaze/port.c | 2 +- portable/GCC/MicroBlaze/portasm.s | 2 +- portable/GCC/MicroBlaze/portmacro.h | 2 +- portable/GCC/MicroBlazeV8/port.c | 2 +- portable/GCC/MicroBlazeV8/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV8/portasm.S | 2 +- portable/GCC/MicroBlazeV8/portmacro.h | 2 +- portable/GCC/MicroBlazeV9/port.c | 2 +- portable/GCC/MicroBlazeV9/port_exceptions.c | 2 +- portable/GCC/MicroBlazeV9/portasm.S | 2 +- portable/GCC/MicroBlazeV9/portmacro.h | 2 +- portable/GCC/NiosII/port.c | 2 +- portable/GCC/NiosII/port_asm.S | 2 +- portable/GCC/NiosII/portmacro.h | 2 +- portable/GCC/PPC405_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC405_Xilinx/port.c | 2 +- portable/GCC/PPC405_Xilinx/portasm.S | 2 +- portable/GCC/PPC405_Xilinx/portmacro.h | 2 +- portable/GCC/PPC440_Xilinx/FPU_Macros.h | 2 +- portable/GCC/PPC440_Xilinx/port.c | 2 +- portable/GCC/PPC440_Xilinx/portasm.S | 2 +- portable/GCC/PPC440_Xilinx/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/GCC/RISC-V/port.c | 2 +- portable/GCC/RISC-V/portASM.S | 2 +- portable/GCC/RISC-V/portmacro.h | 2 +- portable/GCC/RL78/isr_support.h | 2 +- portable/GCC/RL78/port.c | 2 +- portable/GCC/RL78/portasm.S | 2 +- portable/GCC/RL78/portmacro.h | 2 +- portable/GCC/RX100/port.c | 2 +- portable/GCC/RX100/portmacro.h | 2 +- portable/GCC/RX200/port.c | 2 +- portable/GCC/RX200/portmacro.h | 2 +- portable/GCC/RX600/port.c | 2 +- portable/GCC/RX600/portmacro.h | 2 +- portable/GCC/RX600v2/port.c | 2 +- portable/GCC/RX600v2/portmacro.h | 2 +- portable/GCC/RX700v3_DPFPU/port.c | 2 +- portable/GCC/RX700v3_DPFPU/portmacro.h | 2 +- portable/GCC/STR75x/port.c | 2 +- portable/GCC/STR75x/portISR.c | 2 +- portable/GCC/STR75x/portmacro.h | 2 +- portable/GCC/TriCore_1782/port.c | 2 +- portable/GCC/TriCore_1782/portmacro.h | 2 +- portable/GCC/TriCore_1782/porttrap.c | 2 +- portable/IAR/78K0R/ISR_Support.h | 2 +- portable/IAR/78K0R/port.c | 2 +- portable/IAR/78K0R/portasm.s26 | 2 +- portable/IAR/78K0R/portmacro.h | 2 +- portable/IAR/ARM_CA5_No_GIC/port.c | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.h | 2 +- portable/IAR/ARM_CA5_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CA5_No_GIC/portmacro.h | 2 +- portable/IAR/ARM_CA9/port.c | 2 +- portable/IAR/ARM_CA9/portASM.h | 2 +- portable/IAR/ARM_CA9/portASM.s | 2 +- portable/IAR/ARM_CA9/portmacro.h | 2 +- portable/IAR/ARM_CM0/port.c | 2 +- portable/IAR/ARM_CM0/portasm.s | 2 +- portable/IAR/ARM_CM0/portmacro.h | 2 +- portable/IAR/ARM_CM23/non_secure/port.c | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context.c | 2 +- portable/IAR/ARM_CM23/secure/secure_context.h | 2 +- portable/IAR/ARM_CM23/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM23/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM23/secure/secure_init.c | 2 +- portable/IAR/ARM_CM23/secure/secure_init.h | 2 +- portable/IAR/ARM_CM23/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM3/port.c | 2 +- portable/IAR/ARM_CM3/portasm.s | 2 +- portable/IAR/ARM_CM3/portmacro.h | 2 +- portable/IAR/ARM_CM33/non_secure/port.c | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context.c | 2 +- portable/IAR/ARM_CM33/secure/secure_context.h | 2 +- portable/IAR/ARM_CM33/secure/secure_context_port_asm.s | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.c | 2 +- portable/IAR/ARM_CM33/secure/secure_heap.h | 2 +- portable/IAR/ARM_CM33/secure/secure_init.c | 2 +- portable/IAR/ARM_CM33/secure/secure_init.h | 2 +- portable/IAR/ARM_CM33/secure/secure_port_macros.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/port.c | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s | 2 +- portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h | 2 +- portable/IAR/ARM_CM4F/port.c | 2 +- portable/IAR/ARM_CM4F/portasm.s | 2 +- portable/IAR/ARM_CM4F/portmacro.h | 2 +- portable/IAR/ARM_CM4F_MPU/port.c | 2 +- portable/IAR/ARM_CM4F_MPU/portasm.s | 2 +- portable/IAR/ARM_CM4F_MPU/portmacro.h | 2 +- portable/IAR/ARM_CM7/r0p1/port.c | 2 +- portable/IAR/ARM_CM7/r0p1/portasm.s | 2 +- portable/IAR/ARM_CM7/r0p1/portmacro.h | 2 +- portable/IAR/ARM_CRx_No_GIC/port.c | 2 +- portable/IAR/ARM_CRx_No_GIC/portASM.s | 2 +- portable/IAR/ARM_CRx_No_GIC/portmacro.h | 2 +- portable/IAR/ATMega323/port.c | 2 +- portable/IAR/ATMega323/portmacro.h | 2 +- portable/IAR/ATMega323/portmacro.s90 | 2 +- portable/IAR/AVR32_UC3/port.c | 2 +- portable/IAR/AVR32_UC3/portmacro.h | 2 +- portable/IAR/AVR_AVRDx/port.c | 2 +- portable/IAR/AVR_AVRDx/portmacro.h | 2 +- portable/IAR/AVR_AVRDx/portmacro.s90 | 2 +- portable/IAR/AVR_Mega0/port.c | 2 +- portable/IAR/AVR_Mega0/portmacro.h | 2 +- portable/IAR/AVR_Mega0/portmacro.s90 | 2 +- portable/IAR/AtmelSAM7S64/ISR_Support.h | 2 +- portable/IAR/AtmelSAM7S64/port.c | 2 +- portable/IAR/AtmelSAM7S64/portasm.s79 | 2 +- portable/IAR/AtmelSAM7S64/portmacro.h | 2 +- portable/IAR/AtmelSAM9XE/port.c | 2 +- portable/IAR/AtmelSAM9XE/portmacro.h | 2 +- portable/IAR/LPC2000/ISR_Support.h | 2 +- portable/IAR/LPC2000/port.c | 2 +- portable/IAR/LPC2000/portasm.s79 | 2 +- portable/IAR/LPC2000/portmacro.h | 2 +- portable/IAR/MSP430/port.c | 2 +- portable/IAR/MSP430/portasm.h | 2 +- portable/IAR/MSP430/portext.s43 | 2 +- portable/IAR/MSP430/portmacro.h | 2 +- portable/IAR/MSP430X/data_model.h | 2 +- portable/IAR/MSP430X/port.c | 2 +- portable/IAR/MSP430X/portext.s43 | 2 +- portable/IAR/MSP430X/portmacro.h | 2 +- .../freertos_risc_v_chip_specific_extensions.h | 2 +- portable/IAR/RISC-V/port.c | 2 +- portable/IAR/RISC-V/portASM.s | 2 +- portable/IAR/RISC-V/portmacro.h | 2 +- portable/IAR/RL78/ISR_Support.h | 2 +- portable/IAR/RL78/port.c | 2 +- portable/IAR/RL78/portasm.s87 | 2 +- portable/IAR/RL78/portmacro.h | 2 +- portable/IAR/RX100/port.c | 2 +- portable/IAR/RX100/port_asm.s | 2 +- portable/IAR/RX100/portmacro.h | 2 +- portable/IAR/RX600/port.c | 2 +- portable/IAR/RX600/port_asm.s | 2 +- portable/IAR/RX600/portmacro.h | 2 +- portable/IAR/RX700v3_DPFPU/port.c | 2 +- portable/IAR/RX700v3_DPFPU/portmacro.h | 2 +- portable/IAR/RXv2/port.c | 2 +- portable/IAR/RXv2/port_asm.s | 2 +- portable/IAR/RXv2/portmacro.h | 2 +- portable/IAR/STR71x/ISR_Support.h | 2 +- portable/IAR/STR71x/port.c | 2 +- portable/IAR/STR71x/portasm.s79 | 2 +- portable/IAR/STR71x/portmacro.h | 2 +- portable/IAR/STR75x/ISR_Support.h | 2 +- portable/IAR/STR75x/port.c | 2 +- portable/IAR/STR75x/portasm.s79 | 2 +- portable/IAR/STR75x/portmacro.h | 2 +- portable/IAR/STR91x/ISR_Support.h | 2 +- portable/IAR/STR91x/port.c | 2 +- portable/IAR/STR91x/portasm.s79 | 2 +- portable/IAR/STR91x/portmacro.h | 2 +- portable/IAR/V850ES/ISR_Support.h | 2 +- portable/IAR/V850ES/port.c | 2 +- portable/IAR/V850ES/portasm.s85 | 2 +- portable/IAR/V850ES/portasm_Fx3.s85 | 2 +- portable/IAR/V850ES/portasm_Hx2.s85 | 2 +- portable/IAR/V850ES/portmacro.h | 2 +- portable/MPLAB/PIC18F/port.c | 2 +- portable/MPLAB/PIC18F/portmacro.h | 2 +- portable/MPLAB/PIC24_dsPIC/port.c | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S | 2 +- portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S | 2 +- portable/MPLAB/PIC24_dsPIC/portmacro.h | 2 +- portable/MPLAB/PIC32MEC14xx/ISR_Support.h | 2 +- portable/MPLAB/PIC32MEC14xx/port.c | 2 +- portable/MPLAB/PIC32MEC14xx/port_asm.S | 2 +- portable/MPLAB/PIC32MEC14xx/portmacro.h | 2 +- portable/MPLAB/PIC32MX/ISR_Support.h | 2 +- portable/MPLAB/PIC32MX/port.c | 2 +- portable/MPLAB/PIC32MX/port_asm.S | 2 +- portable/MPLAB/PIC32MX/portmacro.h | 2 +- portable/MPLAB/PIC32MZ/ISR_Support.h | 2 +- portable/MPLAB/PIC32MZ/port.c | 2 +- portable/MPLAB/PIC32MZ/port_asm.S | 2 +- portable/MPLAB/PIC32MZ/portmacro.h | 2 +- portable/MSVC-MingW/port.c | 2 +- portable/MSVC-MingW/portmacro.h | 2 +- portable/MemMang/heap_1.c | 2 +- portable/MemMang/heap_2.c | 2 +- portable/MemMang/heap_3.c | 2 +- portable/MemMang/heap_4.c | 2 +- portable/MemMang/heap_5.c | 2 +- portable/MikroC/ARM_CM4F/port.c | 2 +- portable/MikroC/ARM_CM4F/portmacro.h | 2 +- portable/Paradigm/Tern_EE/large_untested/port.c | 2 +- portable/Paradigm/Tern_EE/large_untested/portasm.h | 2 +- portable/Paradigm/Tern_EE/large_untested/portmacro.h | 2 +- portable/Paradigm/Tern_EE/small/port.c | 2 +- portable/Paradigm/Tern_EE/small/portasm.h | 2 +- portable/Paradigm/Tern_EE/small/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/port.c | 2 +- portable/RVDS/ARM7_LPC21xx/portASM.s | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.h | 2 +- portable/RVDS/ARM7_LPC21xx/portmacro.inc | 2 +- portable/RVDS/ARM_CA9/port.c | 2 +- portable/RVDS/ARM_CA9/portASM.s | 2 +- portable/RVDS/ARM_CA9/portmacro.h | 2 +- portable/RVDS/ARM_CA9/portmacro.inc | 2 +- portable/RVDS/ARM_CM0/port.c | 2 +- portable/RVDS/ARM_CM0/portmacro.h | 2 +- portable/RVDS/ARM_CM3/port.c | 2 +- portable/RVDS/ARM_CM3/portmacro.h | 2 +- portable/RVDS/ARM_CM4F/port.c | 2 +- portable/RVDS/ARM_CM4F/portmacro.h | 2 +- portable/RVDS/ARM_CM4_MPU/port.c | 2 +- portable/RVDS/ARM_CM4_MPU/portmacro.h | 2 +- portable/RVDS/ARM_CM7/r0p1/port.c | 2 +- portable/RVDS/ARM_CM7/r0p1/portmacro.h | 2 +- portable/Renesas/RX100/port.c | 2 +- portable/Renesas/RX100/port_asm.src | 2 +- portable/Renesas/RX100/portmacro.h | 2 +- portable/Renesas/RX200/port.c | 2 +- portable/Renesas/RX200/port_asm.src | 2 +- portable/Renesas/RX200/portmacro.h | 2 +- portable/Renesas/RX600/port.c | 2 +- portable/Renesas/RX600/port_asm.src | 2 +- portable/Renesas/RX600/portmacro.h | 2 +- portable/Renesas/RX600v2/port.c | 2 +- portable/Renesas/RX600v2/port_asm.src | 2 +- portable/Renesas/RX600v2/portmacro.h | 2 +- portable/Renesas/RX700v3_DPFPU/port.c | 2 +- portable/Renesas/RX700v3_DPFPU/port_asm.src | 2 +- portable/Renesas/RX700v3_DPFPU/portmacro.h | 2 +- portable/Renesas/SH2A_FPU/ISR_Support.inc | 2 +- portable/Renesas/SH2A_FPU/port.c | 2 +- portable/Renesas/SH2A_FPU/portasm.src | 2 +- portable/Renesas/SH2A_FPU/portmacro.h | 2 +- portable/Rowley/MSP430F449/port.c | 2 +- portable/Rowley/MSP430F449/portasm.h | 2 +- portable/Rowley/MSP430F449/portext.asm | 2 +- portable/Rowley/MSP430F449/portmacro.h | 2 +- portable/SDCC/Cygnal/port.c | 2 +- portable/SDCC/Cygnal/portmacro.h | 2 +- portable/Softune/MB91460/port.c | 2 +- portable/Softune/MB91460/portmacro.h | 2 +- portable/Softune/MB96340/port.c | 2 +- portable/Softune/MB96340/portmacro.h | 2 +- portable/Tasking/ARM_CM4F/port.c | 2 +- portable/Tasking/ARM_CM4F/port_asm.asm | 2 +- portable/Tasking/ARM_CM4F/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/port.c | 2 +- portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h | 2 +- portable/ThirdParty/GCC/ARC_v1/arc_support.s | 2 +- portable/ThirdParty/GCC/ARC_v1/port.c | 2 +- portable/ThirdParty/GCC/ARC_v1/portmacro.h | 2 +- portable/ThirdParty/GCC/ATmega/port.c | 2 +- portable/ThirdParty/GCC/ATmega/portmacro.h | 2 +- portable/ThirdParty/GCC/Posix/port.c | 2 +- portable/ThirdParty/GCC/Posix/portmacro.h | 2 +- portable/ThirdParty/XCC/Xtensa/port.c | 2 +- portable/ThirdParty/XCC/Xtensa/portmacro.h | 2 +- portable/WizC/PIC18/Drivers/Tick/Tick.c | 2 +- portable/WizC/PIC18/Drivers/Tick/isrTick.c | 2 +- portable/WizC/PIC18/addFreeRTOS.h | 2 +- portable/WizC/PIC18/port.c | 2 +- portable/WizC/PIC18/portmacro.h | 2 +- portable/oWatcom/16BitDOS/Flsh186/port.c | 2 +- portable/oWatcom/16BitDOS/Flsh186/portmacro.h | 2 +- portable/oWatcom/16BitDOS/PC/port.c | 2 +- portable/oWatcom/16BitDOS/PC/portmacro.h | 2 +- portable/oWatcom/16BitDOS/common/portasm.h | 2 +- portable/oWatcom/16BitDOS/common/portcomn.c | 2 +- queue.c | 2 +- stream_buffer.c | 2 +- tasks.c | 2 +- timers.c | 2 +- 461 files changed, 461 insertions(+), 461 deletions(-) diff --git a/croutine.c b/croutine.c index 9de385d28..0a4fefa9b 100644 --- a/croutine.c +++ b/croutine.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/event_groups.c b/event_groups.c index aeaf8423f..189a09ca0 100644 --- a/event_groups.c +++ b/event_groups.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/FreeRTOS.h b/include/FreeRTOS.h index fbd5bde45..5f484fe21 100644 --- a/include/FreeRTOS.h +++ b/include/FreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/StackMacros.h b/include/StackMacros.h index ff2179101..e78e1ee07 100644 --- a/include/StackMacros.h +++ b/include/StackMacros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/atomic.h b/include/atomic.h index 75c25291e..16bb3bfbc 100644 --- a/include/atomic.h +++ b/include/atomic.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/croutine.h b/include/croutine.h index 517fcb74e..8699e7dcd 100644 --- a/include/croutine.h +++ b/include/croutine.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/deprecated_definitions.h b/include/deprecated_definitions.h index 1823f942d..99125ffe2 100644 --- a/include/deprecated_definitions.h +++ b/include/deprecated_definitions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/event_groups.h b/include/event_groups.h index 036ef8e9f..3ed5d2658 100644 --- a/include/event_groups.h +++ b/include/event_groups.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/list.h b/include/list.h index b9ba425cb..164e06b47 100644 --- a/include/list.h +++ b/include/list.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/message_buffer.h b/include/message_buffer.h index 7413d5406..c0811353b 100644 --- a/include/message_buffer.h +++ b/include/message_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/mpu_prototypes.h b/include/mpu_prototypes.h index 8348bb0f9..c2b306253 100644 --- a/include/mpu_prototypes.h +++ b/include/mpu_prototypes.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h index 0cbbabfc2..3e00dd93b 100644 --- a/include/mpu_wrappers.h +++ b/include/mpu_wrappers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/portable.h b/include/portable.h index 250f9b4eb..1256a7fd2 100644 --- a/include/portable.h +++ b/include/portable.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/projdefs.h b/include/projdefs.h index 575eefb07..06717f254 100644 --- a/include/projdefs.h +++ b/include/projdefs.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/queue.h b/include/queue.h index bc0f6f04d..b97e43836 100644 --- a/include/queue.h +++ b/include/queue.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/semphr.h b/include/semphr.h index 089dc9efc..0a027463e 100644 --- a/include/semphr.h +++ b/include/semphr.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/stack_macros.h b/include/stack_macros.h index a127e3d80..c75e50f0e 100644 --- a/include/stack_macros.h +++ b/include/stack_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/stdint.readme b/include/stdint.readme index b4142b5d0..141db9ff8 100644 --- a/include/stdint.readme +++ b/include/stdint.readme @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/stream_buffer.h b/include/stream_buffer.h index a63ba2b53..915a49843 100644 --- a/include/stream_buffer.h +++ b/include/stream_buffer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/task.h b/include/task.h index bf460c607..d95b7088a 100644 --- a/include/task.h +++ b/include/task.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/include/timers.h b/include/timers.h index 9a19c83b0..c0942588e 100644 --- a/include/timers.h +++ b/include/timers.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/list.c b/list.c index be9820287..d1f35e13c 100644 --- a/list.c +++ b/list.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/copy_files.py b/portable/ARMv8M/copy_files.py index 007ac2019..fd25e1d09 100644 --- a/portable/ARMv8M/copy_files.py +++ b/portable/ARMv8M/copy_files.py @@ -1,5 +1,5 @@ #/* -# * FreeRTOS Kernel V10.4.3 LTS Patch 2 +# * FreeRTOS Kernel V10.4.3 LTS Patch 3 # * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index c2b5b6d75..dcf7f08ca 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index d7594edee..57376580b 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h index aecd0e7d9..a7ff91882 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c index fcbe13633..c4366e2d6 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h index aecd0e7d9..a7ff91882 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c index 9fc9acdf8..f38637c56 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h index f0db23ee5..c44375f2d 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c index c66cb8e6f..f57f5f737 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h index f0db23ee5..c44375f2d 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s index 0de800c24..2d8d68723 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h index 47f31376b..2e1866709 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s index 8d37ccebd..76810f88a 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h index ec11ee161..ec7962a43 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s index 9e1d1c266..fca4a4fe2 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h index 8fcf49c68..51fc5401f 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s index be65e0650..67c695d30 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h index 8fcf49c68..51fc5401f 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/non_secure/portasm.h b/portable/ARMv8M/non_secure/portasm.h index 4ddda5e23..1cf38e17b 100644 --- a/portable/ARMv8M/non_secure/portasm.h +++ b/portable/ARMv8M/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c index cc41c5ebf..5f62358d1 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c index 9166722fa..997cdadfe 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s index eee87898c..750087424 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s index 761d62e25..212cae570 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c index 5d6ac9ad5..7f7c88425 100644 --- a/portable/ARMv8M/secure/context/secure_context.c +++ b/portable/ARMv8M/secure/context/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/context/secure_context.h b/portable/ARMv8M/secure/context/secure_context.h index 3786ddbc1..2c9eb42b8 100644 --- a/portable/ARMv8M/secure/context/secure_context.h +++ b/portable/ARMv8M/secure/context/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/heap/secure_heap.c b/portable/ARMv8M/secure/heap/secure_heap.c index 8a91f39fd..945926981 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.c +++ b/portable/ARMv8M/secure/heap/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/heap/secure_heap.h b/portable/ARMv8M/secure/heap/secure_heap.h index 2c3bf4851..54c3d43e6 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.h +++ b/portable/ARMv8M/secure/heap/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/init/secure_init.c b/portable/ARMv8M/secure/init/secure_init.c index f80db5aac..6574fe18e 100644 --- a/portable/ARMv8M/secure/init/secure_init.c +++ b/portable/ARMv8M/secure/init/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/init/secure_init.h b/portable/ARMv8M/secure/init/secure_init.h index 26690d68c..e9f4b79ce 100644 --- a/portable/ARMv8M/secure/init/secure_init.h +++ b/portable/ARMv8M/secure/init/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ARMv8M/secure/macros/secure_port_macros.h b/portable/ARMv8M/secure/macros/secure_port_macros.h index 7181c3496..e0110551b 100644 --- a/portable/ARMv8M/secure/macros/secure_port_macros.h +++ b/portable/ARMv8M/secure/macros/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/Flsh186/port.c b/portable/BCC/16BitDOS/Flsh186/port.c index eba89ffc6..f2250fea3 100644 --- a/portable/BCC/16BitDOS/Flsh186/port.c +++ b/portable/BCC/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/Flsh186/prtmacro.h b/portable/BCC/16BitDOS/Flsh186/prtmacro.h index bd8a75c8d..9ab34fa15 100644 --- a/portable/BCC/16BitDOS/Flsh186/prtmacro.h +++ b/portable/BCC/16BitDOS/Flsh186/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/PC/port.c b/portable/BCC/16BitDOS/PC/port.c index 26b65b616..5f8e46908 100644 --- a/portable/BCC/16BitDOS/PC/port.c +++ b/portable/BCC/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/PC/prtmacro.h b/portable/BCC/16BitDOS/PC/prtmacro.h index 54551561a..d8db76366 100644 --- a/portable/BCC/16BitDOS/PC/prtmacro.h +++ b/portable/BCC/16BitDOS/PC/prtmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/common/portasm.h b/portable/BCC/16BitDOS/common/portasm.h index 30959d438..363d2e21b 100644 --- a/portable/BCC/16BitDOS/common/portasm.h +++ b/portable/BCC/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/BCC/16BitDOS/common/portcomn.c b/portable/BCC/16BitDOS/common/portcomn.c index 62429c940..529afa696 100644 --- a/portable/BCC/16BitDOS/common/portcomn.c +++ b/portable/BCC/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM3/port.c b/portable/CCS/ARM_CM3/port.c index 3c794120d..52735bf9a 100644 --- a/portable/CCS/ARM_CM3/port.c +++ b/portable/CCS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM3/portasm.asm b/portable/CCS/ARM_CM3/portasm.asm index 2bec3600d..df9fa1820 100644 --- a/portable/CCS/ARM_CM3/portasm.asm +++ b/portable/CCS/ARM_CM3/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM3/portmacro.h b/portable/CCS/ARM_CM3/portmacro.h index 820cd6e05..2941081be 100644 --- a/portable/CCS/ARM_CM3/portmacro.h +++ b/portable/CCS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM4F/port.c b/portable/CCS/ARM_CM4F/port.c index 53d4581f2..88b205cab 100644 --- a/portable/CCS/ARM_CM4F/port.c +++ b/portable/CCS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM4F/portasm.asm b/portable/CCS/ARM_CM4F/portasm.asm index 6e12e30b2..b5dedbe52 100644 --- a/portable/CCS/ARM_CM4F/portasm.asm +++ b/portable/CCS/ARM_CM4F/portasm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_CM4F/portmacro.h b/portable/CCS/ARM_CM4F/portmacro.h index bdb15f705..bb8188780 100644 --- a/portable/CCS/ARM_CM4F/portmacro.h +++ b/portable/CCS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_Cortex-R4/port.c b/portable/CCS/ARM_Cortex-R4/port.c index 15b5406bd..d5e9090b6 100644 --- a/portable/CCS/ARM_Cortex-R4/port.c +++ b/portable/CCS/ARM_Cortex-R4/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_Cortex-R4/portASM.asm b/portable/CCS/ARM_Cortex-R4/portASM.asm index 9b87ba674..fb32cedc0 100644 --- a/portable/CCS/ARM_Cortex-R4/portASM.asm +++ b/portable/CCS/ARM_Cortex-R4/portASM.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/ARM_Cortex-R4/portmacro.h b/portable/CCS/ARM_Cortex-R4/portmacro.h index 615ee5502..9f4619066 100644 --- a/portable/CCS/ARM_Cortex-R4/portmacro.h +++ b/portable/CCS/ARM_Cortex-R4/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/data_model.h b/portable/CCS/MSP430X/data_model.h index 5c0a7b969..fc7430c1d 100644 --- a/portable/CCS/MSP430X/data_model.h +++ b/portable/CCS/MSP430X/data_model.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/port.c b/portable/CCS/MSP430X/port.c index 57baf9138..442ee8633 100644 --- a/portable/CCS/MSP430X/port.c +++ b/portable/CCS/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/portext.asm b/portable/CCS/MSP430X/portext.asm index c33530e05..ce66f2073 100644 --- a/portable/CCS/MSP430X/portext.asm +++ b/portable/CCS/MSP430X/portext.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CCS/MSP430X/portmacro.h b/portable/CCS/MSP430X/portmacro.h index fdc048a78..3d6bde5b7 100644 --- a/portable/CCS/MSP430X/portmacro.h +++ b/portable/CCS/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V1/port.c b/portable/CodeWarrior/ColdFire_V1/port.c index c819cf4c7..a9c5f3570 100644 --- a/portable/CodeWarrior/ColdFire_V1/port.c +++ b/portable/CodeWarrior/ColdFire_V1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V1/portasm.S b/portable/CodeWarrior/ColdFire_V1/portasm.S index f94560aa2..82975f57f 100644 --- a/portable/CodeWarrior/ColdFire_V1/portasm.S +++ b/portable/CodeWarrior/ColdFire_V1/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V1/portmacro.h b/portable/CodeWarrior/ColdFire_V1/portmacro.h index 57a48af94..50875a45d 100644 --- a/portable/CodeWarrior/ColdFire_V1/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V2/port.c b/portable/CodeWarrior/ColdFire_V2/port.c index 2fb900860..3529c0164 100644 --- a/portable/CodeWarrior/ColdFire_V2/port.c +++ b/portable/CodeWarrior/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V2/portasm.S b/portable/CodeWarrior/ColdFire_V2/portasm.S index 430ee3122..19558ff42 100644 --- a/portable/CodeWarrior/ColdFire_V2/portasm.S +++ b/portable/CodeWarrior/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/ColdFire_V2/portmacro.h b/portable/CodeWarrior/ColdFire_V2/portmacro.h index 1ab089fb3..947098fcf 100644 --- a/portable/CodeWarrior/ColdFire_V2/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/HCS12/port.c b/portable/CodeWarrior/HCS12/port.c index 637d2a538..0598c2b9a 100644 --- a/portable/CodeWarrior/HCS12/port.c +++ b/portable/CodeWarrior/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/CodeWarrior/HCS12/portmacro.h b/portable/CodeWarrior/HCS12/portmacro.h index d5beaf43e..f2c4c0510 100644 --- a/portable/CodeWarrior/HCS12/portmacro.h +++ b/portable/CodeWarrior/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index ce77f7276..ddfb6efab 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91FR40008/port.c b/portable/GCC/ARM7_AT91FR40008/port.c index 13c813ce3..fe481805a 100644 --- a/portable/GCC/ARM7_AT91FR40008/port.c +++ b/portable/GCC/ARM7_AT91FR40008/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91FR40008/portISR.c b/portable/GCC/ARM7_AT91FR40008/portISR.c index b80061f24..5a371eb3b 100644 --- a/portable/GCC/ARM7_AT91FR40008/portISR.c +++ b/portable/GCC/ARM7_AT91FR40008/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91FR40008/portmacro.h b/portable/GCC/ARM7_AT91FR40008/portmacro.h index 5bcd6aa52..913477fad 100644 --- a/portable/GCC/ARM7_AT91FR40008/portmacro.h +++ b/portable/GCC/ARM7_AT91FR40008/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91SAM7S/port.c b/portable/GCC/ARM7_AT91SAM7S/port.c index eb5f47fd5..14422c66a 100644 --- a/portable/GCC/ARM7_AT91SAM7S/port.c +++ b/portable/GCC/ARM7_AT91SAM7S/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91SAM7S/portISR.c b/portable/GCC/ARM7_AT91SAM7S/portISR.c index 1d1be5fb2..403ca09f4 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portISR.c +++ b/portable/GCC/ARM7_AT91SAM7S/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/portable/GCC/ARM7_AT91SAM7S/portmacro.h index f00ce4054..3e7f34730 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portmacro.h +++ b/portable/GCC/ARM7_AT91SAM7S/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC2000/port.c b/portable/GCC/ARM7_LPC2000/port.c index 4b30fe24f..8bf94b2aa 100644 --- a/portable/GCC/ARM7_LPC2000/port.c +++ b/portable/GCC/ARM7_LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC2000/portISR.c b/portable/GCC/ARM7_LPC2000/portISR.c index 1c29c6998..f95cb68fa 100644 --- a/portable/GCC/ARM7_LPC2000/portISR.c +++ b/portable/GCC/ARM7_LPC2000/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC2000/portmacro.h b/portable/GCC/ARM7_LPC2000/portmacro.h index 150d91a7a..8415c4627 100644 --- a/portable/GCC/ARM7_LPC2000/portmacro.h +++ b/portable/GCC/ARM7_LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC23xx/port.c b/portable/GCC/ARM7_LPC23xx/port.c index ecc05ac79..475705677 100644 --- a/portable/GCC/ARM7_LPC23xx/port.c +++ b/portable/GCC/ARM7_LPC23xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC23xx/portISR.c b/portable/GCC/ARM7_LPC23xx/portISR.c index 916e57782..d74f3d348 100644 --- a/portable/GCC/ARM7_LPC23xx/portISR.c +++ b/portable/GCC/ARM7_LPC23xx/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM7_LPC23xx/portmacro.h b/portable/GCC/ARM7_LPC23xx/portmacro.h index d75f2554c..1f564abb3 100644 --- a/portable/GCC/ARM7_LPC23xx/portmacro.h +++ b/portable/GCC/ARM7_LPC23xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA53_64_BIT/port.c b/portable/GCC/ARM_CA53_64_BIT/port.c index 470e629b4..b9ab5c304 100644 --- a/portable/GCC/ARM_CA53_64_BIT/port.c +++ b/portable/GCC/ARM_CA53_64_BIT/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA53_64_BIT/portASM.S b/portable/GCC/ARM_CA53_64_BIT/portASM.S index 7dd3ea361..b2abf01d2 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portASM.S +++ b/portable/GCC/ARM_CA53_64_BIT/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA53_64_BIT/portmacro.h b/portable/GCC/ARM_CA53_64_BIT/portmacro.h index 6c2610776..87b5296e3 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portmacro.h +++ b/portable/GCC/ARM_CA53_64_BIT/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA9/port.c b/portable/GCC/ARM_CA9/port.c index c003d2dcd..ba565377f 100644 --- a/portable/GCC/ARM_CA9/port.c +++ b/portable/GCC/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA9/portASM.S b/portable/GCC/ARM_CA9/portASM.S index 6f2326ba6..015985918 100644 --- a/portable/GCC/ARM_CA9/portASM.S +++ b/portable/GCC/ARM_CA9/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CA9/portmacro.h b/portable/GCC/ARM_CA9/portmacro.h index 6e561847a..0c720e55f 100644 --- a/portable/GCC/ARM_CA9/portmacro.h +++ b/portable/GCC/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM0/port.c b/portable/GCC/ARM_CM0/port.c index a5dd3e116..82cfb7f86 100644 --- a/portable/GCC/ARM_CM0/port.c +++ b/portable/GCC/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM0/portmacro.h b/portable/GCC/ARM_CM0/portmacro.h index 350340f8c..1406f77c9 100644 --- a/portable/GCC/ARM_CM0/portmacro.h +++ b/portable/GCC/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index 28cebb9fd..f484e6242 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index d7594edee..57376580b 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.h b/portable/GCC/ARM_CM23/non_secure/portasm.h index 4ddda5e23..1cf38e17b 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/non_secure/portmacro.h b/portable/GCC/ARM_CM23/non_secure/portmacro.h index aecd0e7d9..a7ff91882 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c index 5d6ac9ad5..7f7c88425 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/portable/GCC/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_context.h b/portable/GCC/ARM_CM23/secure/secure_context.h index 3786ddbc1..2c9eb42b8 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.h +++ b/portable/GCC/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_context_port.c b/portable/GCC/ARM_CM23/secure/secure_context_port.c index cc41c5ebf..5f62358d1 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM23/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.c b/portable/GCC/ARM_CM23/secure/secure_heap.c index 8a91f39fd..945926981 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.c +++ b/portable/GCC/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.h b/portable/GCC/ARM_CM23/secure/secure_heap.h index 2c3bf4851..54c3d43e6 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.h +++ b/portable/GCC/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_init.c b/portable/GCC/ARM_CM23/secure/secure_init.c index f80db5aac..6574fe18e 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.c +++ b/portable/GCC/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_init.h b/portable/GCC/ARM_CM23/secure/secure_init.h index 26690d68c..e9f4b79ce 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.h +++ b/portable/GCC/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23/secure/secure_port_macros.h b/portable/GCC/ARM_CM23/secure/secure_port_macros.h index 7181c3496..e0110551b 100644 --- a/portable/GCC/ARM_CM23/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index c2b5b6d75..dcf7f08ca 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index fcbe13633..c4366e2d6 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h index 4ddda5e23..1cf38e17b 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h index aecd0e7d9..a7ff91882 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3/port.c b/portable/GCC/ARM_CM3/port.c index 4df297db9..691c0456f 100644 --- a/portable/GCC/ARM_CM3/port.c +++ b/portable/GCC/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3/portmacro.h b/portable/GCC/ARM_CM3/portmacro.h index 42a5f5b85..011dd4606 100644 --- a/portable/GCC/ARM_CM3/portmacro.h +++ b/portable/GCC/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index c2b5b6d75..dcf7f08ca 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.c b/portable/GCC/ARM_CM33/non_secure/portasm.c index 9fc9acdf8..f38637c56 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.h b/portable/GCC/ARM_CM33/non_secure/portasm.h index 4ddda5e23..1cf38e17b 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/non_secure/portmacro.h b/portable/GCC/ARM_CM33/non_secure/portmacro.h index f0db23ee5..c44375f2d 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c index 5d6ac9ad5..7f7c88425 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/portable/GCC/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_context.h b/portable/GCC/ARM_CM33/secure/secure_context.h index 3786ddbc1..2c9eb42b8 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.h +++ b/portable/GCC/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_context_port.c b/portable/GCC/ARM_CM33/secure/secure_context_port.c index 9166722fa..997cdadfe 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM33/secure/secure_context_port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.c b/portable/GCC/ARM_CM33/secure/secure_heap.c index 8a91f39fd..945926981 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.c +++ b/portable/GCC/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.h b/portable/GCC/ARM_CM33/secure/secure_heap.h index 2c3bf4851..54c3d43e6 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.h +++ b/portable/GCC/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_init.c b/portable/GCC/ARM_CM33/secure/secure_init.c index f80db5aac..6574fe18e 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.c +++ b/portable/GCC/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_init.h b/portable/GCC/ARM_CM33/secure/secure_init.h index 26690d68c..e9f4b79ce 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.h +++ b/portable/GCC/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33/secure/secure_port_macros.h b/portable/GCC/ARM_CM33/secure/secure_port_macros.h index 7181c3496..e0110551b 100644 --- a/portable/GCC/ARM_CM33/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index 28cebb9fd..f484e6242 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c index c66cb8e6f..f57f5f737 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h index 4ddda5e23..1cf38e17b 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h index f0db23ee5..c44375f2d 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index 816249489..aa1c7cb12 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h index 9cc2f7793..789fed0a4 100644 --- a/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4F/port.c b/portable/GCC/ARM_CM4F/port.c index 638db0573..ae1c89853 100644 --- a/portable/GCC/ARM_CM4F/port.c +++ b/portable/GCC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4F/portmacro.h b/portable/GCC/ARM_CM4F/portmacro.h index 938d959df..ad654118b 100644 --- a/portable/GCC/ARM_CM4F/portmacro.h +++ b/portable/GCC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index c21ec9ef6..72425f16d 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h index 203036fef..1320f126a 100644 --- a/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM7/r0p1/port.c b/portable/GCC/ARM_CM7/r0p1/port.c index fc141754f..65aef4806 100644 --- a/portable/GCC/ARM_CM7/r0p1/port.c +++ b/portable/GCC/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CM7/r0p1/portmacro.h b/portable/GCC/ARM_CM7/r0p1/portmacro.h index 83ba1ef25..95fabc8b2 100644 --- a/portable/GCC/ARM_CM7/r0p1/portmacro.h +++ b/portable/GCC/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CR5/port.c b/portable/GCC/ARM_CR5/port.c index 1016e595e..72ae79f93 100644 --- a/portable/GCC/ARM_CR5/port.c +++ b/portable/GCC/ARM_CR5/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CR5/portASM.S b/portable/GCC/ARM_CR5/portASM.S index 420da3998..f3d9389d7 100644 --- a/portable/GCC/ARM_CR5/portASM.S +++ b/portable/GCC/ARM_CR5/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CR5/portmacro.h b/portable/GCC/ARM_CR5/portmacro.h index b32b3702a..b63621d14 100644 --- a/portable/GCC/ARM_CR5/portmacro.h +++ b/portable/GCC/ARM_CR5/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CRx_No_GIC/port.c b/portable/GCC/ARM_CRx_No_GIC/port.c index 0699af761..42fb97752 100644 --- a/portable/GCC/ARM_CRx_No_GIC/port.c +++ b/portable/GCC/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CRx_No_GIC/portASM.S b/portable/GCC/ARM_CRx_No_GIC/portASM.S index 35b7139d8..23da6750f 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portASM.S +++ b/portable/GCC/ARM_CRx_No_GIC/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ARM_CRx_No_GIC/portmacro.h b/portable/GCC/ARM_CRx_No_GIC/portmacro.h index 7bd21853a..8a89918f0 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portmacro.h +++ b/portable/GCC/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ATMega323/port.c b/portable/GCC/ATMega323/port.c index 7e5878b0c..a8a1ec25f 100644 --- a/portable/GCC/ATMega323/port.c +++ b/portable/GCC/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ATMega323/portmacro.h b/portable/GCC/ATMega323/portmacro.h index 10798b761..42e702bf8 100644 --- a/portable/GCC/ATMega323/portmacro.h +++ b/portable/GCC/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR32_UC3/port.c b/portable/GCC/AVR32_UC3/port.c index b62c2a131..d9749ca6e 100644 --- a/portable/GCC/AVR32_UC3/port.c +++ b/portable/GCC/AVR32_UC3/port.c @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR32_UC3/portmacro.h b/portable/GCC/AVR32_UC3/portmacro.h index 4ff11fba4..13e7bd099 100644 --- a/portable/GCC/AVR32_UC3/portmacro.h +++ b/portable/GCC/AVR32_UC3/portmacro.h @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_AVRDx/port.c b/portable/GCC/AVR_AVRDx/port.c index 169e19d38..63f4c647e 100644 --- a/portable/GCC/AVR_AVRDx/port.c +++ b/portable/GCC/AVR_AVRDx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_AVRDx/portmacro.h b/portable/GCC/AVR_AVRDx/portmacro.h index 415d694fd..2af755ec9 100644 --- a/portable/GCC/AVR_AVRDx/portmacro.h +++ b/portable/GCC/AVR_AVRDx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_Mega0/port.c b/portable/GCC/AVR_Mega0/port.c index f50fadb4f..66bfa63dd 100644 --- a/portable/GCC/AVR_Mega0/port.c +++ b/portable/GCC/AVR_Mega0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/AVR_Mega0/portmacro.h b/portable/GCC/AVR_Mega0/portmacro.h index d0670a285..5e2fa544e 100644 --- a/portable/GCC/AVR_Mega0/portmacro.h +++ b/portable/GCC/AVR_Mega0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/CORTUS_APS3/port.c b/portable/GCC/CORTUS_APS3/port.c index abd8247df..a0583c475 100644 --- a/portable/GCC/CORTUS_APS3/port.c +++ b/portable/GCC/CORTUS_APS3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/CORTUS_APS3/portmacro.h b/portable/GCC/CORTUS_APS3/portmacro.h index e919c9d99..876f6ab21 100644 --- a/portable/GCC/CORTUS_APS3/portmacro.h +++ b/portable/GCC/CORTUS_APS3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ColdFire_V2/port.c b/portable/GCC/ColdFire_V2/port.c index 68a7ba2dc..4c2d488ea 100644 --- a/portable/GCC/ColdFire_V2/port.c +++ b/portable/GCC/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ColdFire_V2/portasm.S b/portable/GCC/ColdFire_V2/portasm.S index 6be04eefc..4959eda64 100644 --- a/portable/GCC/ColdFire_V2/portasm.S +++ b/portable/GCC/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/ColdFire_V2/portmacro.h b/portable/GCC/ColdFire_V2/portmacro.h index f165e1f29..c2ac36406 100644 --- a/portable/GCC/ColdFire_V2/portmacro.h +++ b/portable/GCC/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/H8S2329/port.c b/portable/GCC/H8S2329/port.c index 4c585000b..61a1ebdef 100644 --- a/portable/GCC/H8S2329/port.c +++ b/portable/GCC/H8S2329/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/H8S2329/portmacro.h b/portable/GCC/H8S2329/portmacro.h index 4788aec34..bb82e04f1 100644 --- a/portable/GCC/H8S2329/portmacro.h +++ b/portable/GCC/H8S2329/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/HCS12/port.c b/portable/GCC/HCS12/port.c index 42e988e05..f9cce7ad6 100644 --- a/portable/GCC/HCS12/port.c +++ b/portable/GCC/HCS12/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/HCS12/portmacro.h b/portable/GCC/HCS12/portmacro.h index 80ea31a73..6f7b0355c 100644 --- a/portable/GCC/HCS12/portmacro.h +++ b/portable/GCC/HCS12/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/ISR_Support.h b/portable/GCC/IA32_flat/ISR_Support.h index ce39ca645..901d1dedd 100644 --- a/portable/GCC/IA32_flat/ISR_Support.h +++ b/portable/GCC/IA32_flat/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/port.c b/portable/GCC/IA32_flat/port.c index 44c7216d0..c59888c02 100644 --- a/portable/GCC/IA32_flat/port.c +++ b/portable/GCC/IA32_flat/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/portASM.S b/portable/GCC/IA32_flat/portASM.S index 8154144e7..4d83ecc12 100644 --- a/portable/GCC/IA32_flat/portASM.S +++ b/portable/GCC/IA32_flat/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/IA32_flat/portmacro.h b/portable/GCC/IA32_flat/portmacro.h index 4720a0d95..33498a235 100644 --- a/portable/GCC/IA32_flat/portmacro.h +++ b/portable/GCC/IA32_flat/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MSP430F449/port.c b/portable/GCC/MSP430F449/port.c index 322bff125..639612606 100644 --- a/portable/GCC/MSP430F449/port.c +++ b/portable/GCC/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MSP430F449/portmacro.h b/portable/GCC/MSP430F449/portmacro.h index 4f2fabf66..e2d046ea9 100644 --- a/portable/GCC/MSP430F449/portmacro.h +++ b/portable/GCC/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlaze/port.c b/portable/GCC/MicroBlaze/port.c index eb9280845..37128187d 100644 --- a/portable/GCC/MicroBlaze/port.c +++ b/portable/GCC/MicroBlaze/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlaze/portasm.s b/portable/GCC/MicroBlaze/portasm.s index 4e0d0f477..19f0a23ef 100644 --- a/portable/GCC/MicroBlaze/portasm.s +++ b/portable/GCC/MicroBlaze/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlaze/portmacro.h b/portable/GCC/MicroBlaze/portmacro.h index 9352819b4..516e10939 100644 --- a/portable/GCC/MicroBlaze/portmacro.h +++ b/portable/GCC/MicroBlaze/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/port.c b/portable/GCC/MicroBlazeV8/port.c index 9983537a3..c6649ab62 100644 --- a/portable/GCC/MicroBlazeV8/port.c +++ b/portable/GCC/MicroBlazeV8/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/port_exceptions.c b/portable/GCC/MicroBlazeV8/port_exceptions.c index 30a72a676..235216a2b 100644 --- a/portable/GCC/MicroBlazeV8/port_exceptions.c +++ b/portable/GCC/MicroBlazeV8/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/portasm.S b/portable/GCC/MicroBlazeV8/portasm.S index a2f7fa7b4..5bb842209 100644 --- a/portable/GCC/MicroBlazeV8/portasm.S +++ b/portable/GCC/MicroBlazeV8/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV8/portmacro.h b/portable/GCC/MicroBlazeV8/portmacro.h index 73dd40322..1c31a2b03 100644 --- a/portable/GCC/MicroBlazeV8/portmacro.h +++ b/portable/GCC/MicroBlazeV8/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/port.c b/portable/GCC/MicroBlazeV9/port.c index a78d7023d..603d31c20 100644 --- a/portable/GCC/MicroBlazeV9/port.c +++ b/portable/GCC/MicroBlazeV9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/port_exceptions.c b/portable/GCC/MicroBlazeV9/port_exceptions.c index 30a72a676..235216a2b 100644 --- a/portable/GCC/MicroBlazeV9/port_exceptions.c +++ b/portable/GCC/MicroBlazeV9/port_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/portasm.S b/portable/GCC/MicroBlazeV9/portasm.S index a2f7fa7b4..5bb842209 100644 --- a/portable/GCC/MicroBlazeV9/portasm.S +++ b/portable/GCC/MicroBlazeV9/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/MicroBlazeV9/portmacro.h b/portable/GCC/MicroBlazeV9/portmacro.h index 73dd40322..1c31a2b03 100644 --- a/portable/GCC/MicroBlazeV9/portmacro.h +++ b/portable/GCC/MicroBlazeV9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/NiosII/port.c b/portable/GCC/NiosII/port.c index fe49b3645..38ee1c952 100644 --- a/portable/GCC/NiosII/port.c +++ b/portable/GCC/NiosII/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/NiosII/port_asm.S b/portable/GCC/NiosII/port_asm.S index fcefb157d..919acedd2 100644 --- a/portable/GCC/NiosII/port_asm.S +++ b/portable/GCC/NiosII/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/NiosII/portmacro.h b/portable/GCC/NiosII/portmacro.h index 08636cb9b..a1ee6ca31 100644 --- a/portable/GCC/NiosII/portmacro.h +++ b/portable/GCC/NiosII/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/FPU_Macros.h b/portable/GCC/PPC405_Xilinx/FPU_Macros.h index e0680d4ad..c5ddd11ef 100644 --- a/portable/GCC/PPC405_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC405_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/port.c b/portable/GCC/PPC405_Xilinx/port.c index 944df56fe..da57b98a9 100644 --- a/portable/GCC/PPC405_Xilinx/port.c +++ b/portable/GCC/PPC405_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/portasm.S b/portable/GCC/PPC405_Xilinx/portasm.S index 32b189091..d1870331b 100644 --- a/portable/GCC/PPC405_Xilinx/portasm.S +++ b/portable/GCC/PPC405_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC405_Xilinx/portmacro.h b/portable/GCC/PPC405_Xilinx/portmacro.h index 71d5ef007..a507a816e 100644 --- a/portable/GCC/PPC405_Xilinx/portmacro.h +++ b/portable/GCC/PPC405_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/FPU_Macros.h b/portable/GCC/PPC440_Xilinx/FPU_Macros.h index e0680d4ad..c5ddd11ef 100644 --- a/portable/GCC/PPC440_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC440_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/port.c b/portable/GCC/PPC440_Xilinx/port.c index aae97feab..511757993 100644 --- a/portable/GCC/PPC440_Xilinx/port.c +++ b/portable/GCC/PPC440_Xilinx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/portasm.S b/portable/GCC/PPC440_Xilinx/portasm.S index 32b189091..d1870331b 100644 --- a/portable/GCC/PPC440_Xilinx/portasm.S +++ b/portable/GCC/PPC440_Xilinx/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/PPC440_Xilinx/portmacro.h b/portable/GCC/PPC440_Xilinx/portmacro.h index 71d5ef007..a507a816e 100644 --- a/portable/GCC/PPC440_Xilinx/portmacro.h +++ b/portable/GCC/PPC440_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h index e28c84166..55463699b 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index ebb34a457..959de0a0b 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/port.c b/portable/GCC/RISC-V/port.c index 8704b744c..7613da2d7 100644 --- a/portable/GCC/RISC-V/port.c +++ b/portable/GCC/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/portASM.S b/portable/GCC/RISC-V/portASM.S index 7e5e4d49d..2502c9f5a 100644 --- a/portable/GCC/RISC-V/portASM.S +++ b/portable/GCC/RISC-V/portASM.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RISC-V/portmacro.h b/portable/GCC/RISC-V/portmacro.h index defd2bac6..252aae70f 100644 --- a/portable/GCC/RISC-V/portmacro.h +++ b/portable/GCC/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/isr_support.h b/portable/GCC/RL78/isr_support.h index cf1250cb8..30d1f91bf 100644 --- a/portable/GCC/RL78/isr_support.h +++ b/portable/GCC/RL78/isr_support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/port.c b/portable/GCC/RL78/port.c index 10c9cc7f5..a3ade53ae 100644 --- a/portable/GCC/RL78/port.c +++ b/portable/GCC/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/portasm.S b/portable/GCC/RL78/portasm.S index 74d1d8b45..417144c3d 100644 --- a/portable/GCC/RL78/portasm.S +++ b/portable/GCC/RL78/portasm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RL78/portmacro.h b/portable/GCC/RL78/portmacro.h index 51891550b..fe5843cd9 100644 --- a/portable/GCC/RL78/portmacro.h +++ b/portable/GCC/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX100/port.c b/portable/GCC/RX100/port.c index fff792a75..21966e271 100644 --- a/portable/GCC/RX100/port.c +++ b/portable/GCC/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX100/portmacro.h b/portable/GCC/RX100/portmacro.h index 8c7e8174e..91f77a2e0 100644 --- a/portable/GCC/RX100/portmacro.h +++ b/portable/GCC/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX200/port.c b/portable/GCC/RX200/port.c index a59a050d5..260f0a8e5 100644 --- a/portable/GCC/RX200/port.c +++ b/portable/GCC/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX200/portmacro.h b/portable/GCC/RX200/portmacro.h index c4c40d15c..1bc4ffb63 100644 --- a/portable/GCC/RX200/portmacro.h +++ b/portable/GCC/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600/port.c b/portable/GCC/RX600/port.c index b8b76cb7a..17aee996e 100644 --- a/portable/GCC/RX600/port.c +++ b/portable/GCC/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600/portmacro.h b/portable/GCC/RX600/portmacro.h index 85fe00352..ff5bf450a 100644 --- a/portable/GCC/RX600/portmacro.h +++ b/portable/GCC/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600v2/port.c b/portable/GCC/RX600v2/port.c index ed9653074..c02c7fe02 100644 --- a/portable/GCC/RX600v2/port.c +++ b/portable/GCC/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX600v2/portmacro.h b/portable/GCC/RX600v2/portmacro.h index 85fe00352..ff5bf450a 100644 --- a/portable/GCC/RX600v2/portmacro.h +++ b/portable/GCC/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX700v3_DPFPU/port.c b/portable/GCC/RX700v3_DPFPU/port.c index e481f0a02..60bb48c72 100644 --- a/portable/GCC/RX700v3_DPFPU/port.c +++ b/portable/GCC/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/RX700v3_DPFPU/portmacro.h b/portable/GCC/RX700v3_DPFPU/portmacro.h index b606650f8..35bfaf9ee 100644 --- a/portable/GCC/RX700v3_DPFPU/portmacro.h +++ b/portable/GCC/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/STR75x/port.c b/portable/GCC/STR75x/port.c index 6a82c5550..47dff9918 100644 --- a/portable/GCC/STR75x/port.c +++ b/portable/GCC/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/STR75x/portISR.c b/portable/GCC/STR75x/portISR.c index 0679ba3e0..eaee375e8 100644 --- a/portable/GCC/STR75x/portISR.c +++ b/portable/GCC/STR75x/portISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/STR75x/portmacro.h b/portable/GCC/STR75x/portmacro.h index cdafec6d6..a88222d92 100644 --- a/portable/GCC/STR75x/portmacro.h +++ b/portable/GCC/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/TriCore_1782/port.c b/portable/GCC/TriCore_1782/port.c index b7e40fcee..c6a1ce697 100644 --- a/portable/GCC/TriCore_1782/port.c +++ b/portable/GCC/TriCore_1782/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/TriCore_1782/portmacro.h b/portable/GCC/TriCore_1782/portmacro.h index 18413e05a..3fc76a5f9 100644 --- a/portable/GCC/TriCore_1782/portmacro.h +++ b/portable/GCC/TriCore_1782/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/GCC/TriCore_1782/porttrap.c b/portable/GCC/TriCore_1782/porttrap.c index 34b053a1a..809e17a50 100644 --- a/portable/GCC/TriCore_1782/porttrap.c +++ b/portable/GCC/TriCore_1782/porttrap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/ISR_Support.h b/portable/IAR/78K0R/ISR_Support.h index 68c3c214f..dd82656be 100644 --- a/portable/IAR/78K0R/ISR_Support.h +++ b/portable/IAR/78K0R/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/port.c b/portable/IAR/78K0R/port.c index 3f6ac3b93..e3e6f9bbb 100644 --- a/portable/IAR/78K0R/port.c +++ b/portable/IAR/78K0R/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/portasm.s26 b/portable/IAR/78K0R/portasm.s26 index a96f94f2e..06e7f0f1e 100644 --- a/portable/IAR/78K0R/portasm.s26 +++ b/portable/IAR/78K0R/portasm.s26 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/78K0R/portmacro.h b/portable/IAR/78K0R/portmacro.h index f54c35e04..38f88705c 100644 --- a/portable/IAR/78K0R/portmacro.h +++ b/portable/IAR/78K0R/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/port.c b/portable/IAR/ARM_CA5_No_GIC/port.c index 8f77f23f5..af87f6975 100644 --- a/portable/IAR/ARM_CA5_No_GIC/port.c +++ b/portable/IAR/ARM_CA5_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.h b/portable/IAR/ARM_CA5_No_GIC/portASM.h index 03bcf2d3f..7339b043c 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.h +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.s b/portable/IAR/ARM_CA5_No_GIC/portASM.s index 8760b2922..7a9483ddf 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.s +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA5_No_GIC/portmacro.h b/portable/IAR/ARM_CA5_No_GIC/portmacro.h index 763e28dda..9a8c845fa 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CA5_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/port.c b/portable/IAR/ARM_CA9/port.c index 19e8202fe..1a2127841 100644 --- a/portable/IAR/ARM_CA9/port.c +++ b/portable/IAR/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/portASM.h b/portable/IAR/ARM_CA9/portASM.h index a76a47351..4fa4395a5 100644 --- a/portable/IAR/ARM_CA9/portASM.h +++ b/portable/IAR/ARM_CA9/portASM.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/portASM.s b/portable/IAR/ARM_CA9/portASM.s index 4fba2907f..75dbb009e 100644 --- a/portable/IAR/ARM_CA9/portASM.s +++ b/portable/IAR/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CA9/portmacro.h b/portable/IAR/ARM_CA9/portmacro.h index 63d83cd44..0dc180553 100644 --- a/portable/IAR/ARM_CA9/portmacro.h +++ b/portable/IAR/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM0/port.c b/portable/IAR/ARM_CM0/port.c index f2f878f58..557644edf 100644 --- a/portable/IAR/ARM_CM0/port.c +++ b/portable/IAR/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM0/portasm.s b/portable/IAR/ARM_CM0/portasm.s index 35b5a6cda..6b78df733 100644 --- a/portable/IAR/ARM_CM0/portasm.s +++ b/portable/IAR/ARM_CM0/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM0/portmacro.h b/portable/IAR/ARM_CM0/portmacro.h index 63921f652..41a39ad4e 100644 --- a/portable/IAR/ARM_CM0/portmacro.h +++ b/portable/IAR/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index 28cebb9fd..f484e6242 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.h b/portable/IAR/ARM_CM23/non_secure/portasm.h index 4ddda5e23..1cf38e17b 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.s b/portable/IAR/ARM_CM23/non_secure/portasm.s index 0de800c24..2d8d68723 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/non_secure/portmacro.h b/portable/IAR/ARM_CM23/non_secure/portmacro.h index 47f31376b..2e1866709 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c index 5d6ac9ad5..7f7c88425 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/portable/IAR/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_context.h b/portable/IAR/ARM_CM23/secure/secure_context.h index 3786ddbc1..2c9eb42b8 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.h +++ b/portable/IAR/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s index eee87898c..750087424 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.c b/portable/IAR/ARM_CM23/secure/secure_heap.c index 8a91f39fd..945926981 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.c +++ b/portable/IAR/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.h b/portable/IAR/ARM_CM23/secure/secure_heap.h index 2c3bf4851..54c3d43e6 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.h +++ b/portable/IAR/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_init.c b/portable/IAR/ARM_CM23/secure/secure_init.c index f80db5aac..6574fe18e 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.c +++ b/portable/IAR/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_init.h b/portable/IAR/ARM_CM23/secure/secure_init.h index 26690d68c..e9f4b79ce 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.h +++ b/portable/IAR/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23/secure/secure_port_macros.h b/portable/IAR/ARM_CM23/secure/secure_port_macros.h index 7181c3496..e0110551b 100644 --- a/portable/IAR/ARM_CM23/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index 28cebb9fd..f484e6242 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h index 4ddda5e23..1cf38e17b 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s index 8d37ccebd..76810f88a 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h index ec11ee161..ec7962a43 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM3/port.c b/portable/IAR/ARM_CM3/port.c index bcc699d68..71e48b711 100644 --- a/portable/IAR/ARM_CM3/port.c +++ b/portable/IAR/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM3/portasm.s b/portable/IAR/ARM_CM3/portasm.s index 6e5852ae6..7caa567c7 100644 --- a/portable/IAR/ARM_CM3/portasm.s +++ b/portable/IAR/ARM_CM3/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM3/portmacro.h b/portable/IAR/ARM_CM3/portmacro.h index 422e9c84e..132dc4980 100644 --- a/portable/IAR/ARM_CM3/portmacro.h +++ b/portable/IAR/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index 28cebb9fd..f484e6242 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.h b/portable/IAR/ARM_CM33/non_secure/portasm.h index 4ddda5e23..1cf38e17b 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.s b/portable/IAR/ARM_CM33/non_secure/portasm.s index 9e1d1c266..fca4a4fe2 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/non_secure/portmacro.h b/portable/IAR/ARM_CM33/non_secure/portmacro.h index 8fcf49c68..51fc5401f 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c index 5d6ac9ad5..7f7c88425 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/portable/IAR/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_context.h b/portable/IAR/ARM_CM33/secure/secure_context.h index 3786ddbc1..2c9eb42b8 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.h +++ b/portable/IAR/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s index 761d62e25..212cae570 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s +++ b/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.c b/portable/IAR/ARM_CM33/secure/secure_heap.c index 8a91f39fd..945926981 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.c +++ b/portable/IAR/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.h b/portable/IAR/ARM_CM33/secure/secure_heap.h index 2c3bf4851..54c3d43e6 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.h +++ b/portable/IAR/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_init.c b/portable/IAR/ARM_CM33/secure/secure_init.c index f80db5aac..6574fe18e 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.c +++ b/portable/IAR/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_init.h b/portable/IAR/ARM_CM33/secure/secure_init.h index 26690d68c..e9f4b79ce 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.h +++ b/portable/IAR/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33/secure/secure_port_macros.h b/portable/IAR/ARM_CM33/secure/secure_port_macros.h index 7181c3496..e0110551b 100644 --- a/portable/IAR/ARM_CM33/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index 28cebb9fd..f484e6242 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h index 4ddda5e23..1cf38e17b 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s index be65e0650..67c695d30 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h index 8fcf49c68..51fc5401f 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F/port.c b/portable/IAR/ARM_CM4F/port.c index ba4df706b..6d048b179 100644 --- a/portable/IAR/ARM_CM4F/port.c +++ b/portable/IAR/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F/portasm.s b/portable/IAR/ARM_CM4F/portasm.s index 4acb9ebf4..b6a6289ae 100644 --- a/portable/IAR/ARM_CM4F/portasm.s +++ b/portable/IAR/ARM_CM4F/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F/portmacro.h b/portable/IAR/ARM_CM4F/portmacro.h index 4ae551090..f26aa3e0a 100644 --- a/portable/IAR/ARM_CM4F/portmacro.h +++ b/portable/IAR/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index e32134dfc..f9ba92daf 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F_MPU/portasm.s b/portable/IAR/ARM_CM4F_MPU/portasm.s index e8a307a69..a4d8b823e 100644 --- a/portable/IAR/ARM_CM4F_MPU/portasm.s +++ b/portable/IAR/ARM_CM4F_MPU/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h index cea31b031..627d0d681 100644 --- a/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM7/r0p1/port.c b/portable/IAR/ARM_CM7/r0p1/port.c index aac6c61b3..7374ef345 100644 --- a/portable/IAR/ARM_CM7/r0p1/port.c +++ b/portable/IAR/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM7/r0p1/portasm.s b/portable/IAR/ARM_CM7/r0p1/portasm.s index 8a9bb5614..b9d1fd4fc 100644 --- a/portable/IAR/ARM_CM7/r0p1/portasm.s +++ b/portable/IAR/ARM_CM7/r0p1/portasm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CM7/r0p1/portmacro.h b/portable/IAR/ARM_CM7/r0p1/portmacro.h index 058fa5d43..99ccf6bb7 100644 --- a/portable/IAR/ARM_CM7/r0p1/portmacro.h +++ b/portable/IAR/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CRx_No_GIC/port.c b/portable/IAR/ARM_CRx_No_GIC/port.c index 3eac6285d..3298bfd18 100644 --- a/portable/IAR/ARM_CRx_No_GIC/port.c +++ b/portable/IAR/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CRx_No_GIC/portASM.s b/portable/IAR/ARM_CRx_No_GIC/portASM.s index 9b44a2700..d73ae6c09 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portASM.s +++ b/portable/IAR/ARM_CRx_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ARM_CRx_No_GIC/portmacro.h b/portable/IAR/ARM_CRx_No_GIC/portmacro.h index 78124d3e9..b231cb6d0 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ATMega323/port.c b/portable/IAR/ATMega323/port.c index ce56d159f..bed4056db 100644 --- a/portable/IAR/ATMega323/port.c +++ b/portable/IAR/ATMega323/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ATMega323/portmacro.h b/portable/IAR/ATMega323/portmacro.h index 65342762b..367e9cdcf 100644 --- a/portable/IAR/ATMega323/portmacro.h +++ b/portable/IAR/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/ATMega323/portmacro.s90 b/portable/IAR/ATMega323/portmacro.s90 index ae76af83b..b6d6a25ad 100644 --- a/portable/IAR/ATMega323/portmacro.s90 +++ b/portable/IAR/ATMega323/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR32_UC3/port.c b/portable/IAR/AVR32_UC3/port.c index 0da050165..506ad17d6 100644 --- a/portable/IAR/AVR32_UC3/port.c +++ b/portable/IAR/AVR32_UC3/port.c @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR32_UC3/portmacro.h b/portable/IAR/AVR32_UC3/portmacro.h index 367fadedd..67e2f0199 100644 --- a/portable/IAR/AVR32_UC3/portmacro.h +++ b/portable/IAR/AVR32_UC3/portmacro.h @@ -14,7 +14,7 @@ *****************************************************************************/ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_AVRDx/port.c b/portable/IAR/AVR_AVRDx/port.c index da95cd1fb..8e9b1ecc5 100644 --- a/portable/IAR/AVR_AVRDx/port.c +++ b/portable/IAR/AVR_AVRDx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_AVRDx/portmacro.h b/portable/IAR/AVR_AVRDx/portmacro.h index 7143eb6a3..dfa069842 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.h +++ b/portable/IAR/AVR_AVRDx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_AVRDx/portmacro.s90 b/portable/IAR/AVR_AVRDx/portmacro.s90 index 3d2dcfe0c..3fa550c02 100644 --- a/portable/IAR/AVR_AVRDx/portmacro.s90 +++ b/portable/IAR/AVR_AVRDx/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_Mega0/port.c b/portable/IAR/AVR_Mega0/port.c index ebd90c76d..22868198b 100644 --- a/portable/IAR/AVR_Mega0/port.c +++ b/portable/IAR/AVR_Mega0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_Mega0/portmacro.h b/portable/IAR/AVR_Mega0/portmacro.h index 7143eb6a3..dfa069842 100644 --- a/portable/IAR/AVR_Mega0/portmacro.h +++ b/portable/IAR/AVR_Mega0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AVR_Mega0/portmacro.s90 b/portable/IAR/AVR_Mega0/portmacro.s90 index d555b3e34..018c3c0da 100644 --- a/portable/IAR/AVR_Mega0/portmacro.s90 +++ b/portable/IAR/AVR_Mega0/portmacro.s90 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/ISR_Support.h b/portable/IAR/AtmelSAM7S64/ISR_Support.h index 5897a5f78..9ddc7d808 100644 --- a/portable/IAR/AtmelSAM7S64/ISR_Support.h +++ b/portable/IAR/AtmelSAM7S64/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/port.c b/portable/IAR/AtmelSAM7S64/port.c index 93ef2d35e..a7ab601cd 100644 --- a/portable/IAR/AtmelSAM7S64/port.c +++ b/portable/IAR/AtmelSAM7S64/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/portasm.s79 b/portable/IAR/AtmelSAM7S64/portasm.s79 index 91fb23274..3aa051367 100644 --- a/portable/IAR/AtmelSAM7S64/portasm.s79 +++ b/portable/IAR/AtmelSAM7S64/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM7S64/portmacro.h b/portable/IAR/AtmelSAM7S64/portmacro.h index 5b9a3a245..7cc2cc608 100644 --- a/portable/IAR/AtmelSAM7S64/portmacro.h +++ b/portable/IAR/AtmelSAM7S64/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM9XE/port.c b/portable/IAR/AtmelSAM9XE/port.c index 14add07b5..2daf12997 100644 --- a/portable/IAR/AtmelSAM9XE/port.c +++ b/portable/IAR/AtmelSAM9XE/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/AtmelSAM9XE/portmacro.h b/portable/IAR/AtmelSAM9XE/portmacro.h index 1361ba8e9..5532024af 100644 --- a/portable/IAR/AtmelSAM9XE/portmacro.h +++ b/portable/IAR/AtmelSAM9XE/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/ISR_Support.h b/portable/IAR/LPC2000/ISR_Support.h index 5897a5f78..9ddc7d808 100644 --- a/portable/IAR/LPC2000/ISR_Support.h +++ b/portable/IAR/LPC2000/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/port.c b/portable/IAR/LPC2000/port.c index 20b43b5d6..181e35bb0 100644 --- a/portable/IAR/LPC2000/port.c +++ b/portable/IAR/LPC2000/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/portasm.s79 b/portable/IAR/LPC2000/portasm.s79 index 50ca090a6..5ffa963b0 100644 --- a/portable/IAR/LPC2000/portasm.s79 +++ b/portable/IAR/LPC2000/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/LPC2000/portmacro.h b/portable/IAR/LPC2000/portmacro.h index 343bfd1fd..f0b1fe495 100644 --- a/portable/IAR/LPC2000/portmacro.h +++ b/portable/IAR/LPC2000/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/port.c b/portable/IAR/MSP430/port.c index 237c6c1d5..15bf7396d 100644 --- a/portable/IAR/MSP430/port.c +++ b/portable/IAR/MSP430/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/portasm.h b/portable/IAR/MSP430/portasm.h index 64a284aa3..26a1b735f 100644 --- a/portable/IAR/MSP430/portasm.h +++ b/portable/IAR/MSP430/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/portext.s43 b/portable/IAR/MSP430/portext.s43 index aedf24a07..55ae782b1 100644 --- a/portable/IAR/MSP430/portext.s43 +++ b/portable/IAR/MSP430/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430/portmacro.h b/portable/IAR/MSP430/portmacro.h index 74db4566d..71bf68894 100644 --- a/portable/IAR/MSP430/portmacro.h +++ b/portable/IAR/MSP430/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/data_model.h b/portable/IAR/MSP430X/data_model.h index b0d0f6f5f..d223ec583 100644 --- a/portable/IAR/MSP430X/data_model.h +++ b/portable/IAR/MSP430X/data_model.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/port.c b/portable/IAR/MSP430X/port.c index fd4b15205..4ea18f015 100644 --- a/portable/IAR/MSP430X/port.c +++ b/portable/IAR/MSP430X/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/portext.s43 b/portable/IAR/MSP430X/portext.s43 index 80cd4379c..d67963bed 100644 --- a/portable/IAR/MSP430X/portext.s43 +++ b/portable/IAR/MSP430X/portext.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/MSP430X/portmacro.h b/portable/IAR/MSP430X/portmacro.h index c9e11a0a4..1275f05a3 100644 --- a/portable/IAR/MSP430X/portmacro.h +++ b/portable/IAR/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index dd66297f1..8f8714160 100644 --- a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/port.c b/portable/IAR/RISC-V/port.c index d03262eb6..5d20585f4 100644 --- a/portable/IAR/RISC-V/port.c +++ b/portable/IAR/RISC-V/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/portASM.s b/portable/IAR/RISC-V/portASM.s index c74125b42..e45d02a14 100644 --- a/portable/IAR/RISC-V/portASM.s +++ b/portable/IAR/RISC-V/portASM.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RISC-V/portmacro.h b/portable/IAR/RISC-V/portmacro.h index 7898e0281..9a53521a5 100644 --- a/portable/IAR/RISC-V/portmacro.h +++ b/portable/IAR/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/ISR_Support.h b/portable/IAR/RL78/ISR_Support.h index 24de0a1b9..25e95a30c 100644 --- a/portable/IAR/RL78/ISR_Support.h +++ b/portable/IAR/RL78/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/port.c b/portable/IAR/RL78/port.c index 0e883cdcf..2f2556fb1 100644 --- a/portable/IAR/RL78/port.c +++ b/portable/IAR/RL78/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/portasm.s87 b/portable/IAR/RL78/portasm.s87 index b1a266827..235ddb613 100644 --- a/portable/IAR/RL78/portasm.s87 +++ b/portable/IAR/RL78/portasm.s87 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RL78/portmacro.h b/portable/IAR/RL78/portmacro.h index e092cd641..6338bbc70 100644 --- a/portable/IAR/RL78/portmacro.h +++ b/portable/IAR/RL78/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX100/port.c b/portable/IAR/RX100/port.c index 200c44bdd..42bec1861 100644 --- a/portable/IAR/RX100/port.c +++ b/portable/IAR/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX100/port_asm.s b/portable/IAR/RX100/port_asm.s index 1426fa775..eb7c0c4fa 100644 --- a/portable/IAR/RX100/port_asm.s +++ b/portable/IAR/RX100/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX100/portmacro.h b/portable/IAR/RX100/portmacro.h index c59d83ecf..c61f1023b 100644 --- a/portable/IAR/RX100/portmacro.h +++ b/portable/IAR/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX600/port.c b/portable/IAR/RX600/port.c index 6b95f8a4a..5b5f4a528 100644 --- a/portable/IAR/RX600/port.c +++ b/portable/IAR/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX600/port_asm.s b/portable/IAR/RX600/port_asm.s index 07ab282ef..f2acd24c4 100644 --- a/portable/IAR/RX600/port_asm.s +++ b/portable/IAR/RX600/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX600/portmacro.h b/portable/IAR/RX600/portmacro.h index 1d55f9f95..89a0dd2f7 100644 --- a/portable/IAR/RX600/portmacro.h +++ b/portable/IAR/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX700v3_DPFPU/port.c b/portable/IAR/RX700v3_DPFPU/port.c index b311b27f5..fb00b8d5f 100644 --- a/portable/IAR/RX700v3_DPFPU/port.c +++ b/portable/IAR/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RX700v3_DPFPU/portmacro.h b/portable/IAR/RX700v3_DPFPU/portmacro.h index 584428de6..62cbf4de5 100644 --- a/portable/IAR/RX700v3_DPFPU/portmacro.h +++ b/portable/IAR/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RXv2/port.c b/portable/IAR/RXv2/port.c index 3e0b8a106..74f4f1ee5 100644 --- a/portable/IAR/RXv2/port.c +++ b/portable/IAR/RXv2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RXv2/port_asm.s b/portable/IAR/RXv2/port_asm.s index 6e39eacce..a10582707 100644 --- a/portable/IAR/RXv2/port_asm.s +++ b/portable/IAR/RXv2/port_asm.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/RXv2/portmacro.h b/portable/IAR/RXv2/portmacro.h index 0c30b5b82..4c49d3842 100644 --- a/portable/IAR/RXv2/portmacro.h +++ b/portable/IAR/RXv2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/ISR_Support.h b/portable/IAR/STR71x/ISR_Support.h index 5897a5f78..9ddc7d808 100644 --- a/portable/IAR/STR71x/ISR_Support.h +++ b/portable/IAR/STR71x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/port.c b/portable/IAR/STR71x/port.c index 2d0f53af2..ab1620c0b 100644 --- a/portable/IAR/STR71x/port.c +++ b/portable/IAR/STR71x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/portasm.s79 b/portable/IAR/STR71x/portasm.s79 index afde683ca..75566ddc0 100644 --- a/portable/IAR/STR71x/portasm.s79 +++ b/portable/IAR/STR71x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR71x/portmacro.h b/portable/IAR/STR71x/portmacro.h index b0105bbb8..2a8bcda9b 100644 --- a/portable/IAR/STR71x/portmacro.h +++ b/portable/IAR/STR71x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/ISR_Support.h b/portable/IAR/STR75x/ISR_Support.h index 5897a5f78..9ddc7d808 100644 --- a/portable/IAR/STR75x/ISR_Support.h +++ b/portable/IAR/STR75x/ISR_Support.h @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/port.c b/portable/IAR/STR75x/port.c index 4392b136b..701a67b43 100644 --- a/portable/IAR/STR75x/port.c +++ b/portable/IAR/STR75x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/portasm.s79 b/portable/IAR/STR75x/portasm.s79 index f9a863fb2..426b49e12 100644 --- a/portable/IAR/STR75x/portasm.s79 +++ b/portable/IAR/STR75x/portasm.s79 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR75x/portmacro.h b/portable/IAR/STR75x/portmacro.h index 0ececc510..7302f1abe 100644 --- a/portable/IAR/STR75x/portmacro.h +++ b/portable/IAR/STR75x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/ISR_Support.h b/portable/IAR/STR91x/ISR_Support.h index 662bb36ac..db45367c4 100644 --- a/portable/IAR/STR91x/ISR_Support.h +++ b/portable/IAR/STR91x/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/port.c b/portable/IAR/STR91x/port.c index bc8f56155..2f1465416 100644 --- a/portable/IAR/STR91x/port.c +++ b/portable/IAR/STR91x/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/portasm.s79 b/portable/IAR/STR91x/portasm.s79 index ce10cb4e9..2544031e8 100644 --- a/portable/IAR/STR91x/portasm.s79 +++ b/portable/IAR/STR91x/portasm.s79 @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/STR91x/portmacro.h b/portable/IAR/STR91x/portmacro.h index 75cf31d6c..624ff1eb1 100644 --- a/portable/IAR/STR91x/portmacro.h +++ b/portable/IAR/STR91x/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/ISR_Support.h b/portable/IAR/V850ES/ISR_Support.h index a0e11b58b..28d5a54b2 100644 --- a/portable/IAR/V850ES/ISR_Support.h +++ b/portable/IAR/V850ES/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/port.c b/portable/IAR/V850ES/port.c index 72b7dca19..ed8aa0412 100644 --- a/portable/IAR/V850ES/port.c +++ b/portable/IAR/V850ES/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portasm.s85 b/portable/IAR/V850ES/portasm.s85 index e53c4f6e4..6b633d62d 100644 --- a/portable/IAR/V850ES/portasm.s85 +++ b/portable/IAR/V850ES/portasm.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portasm_Fx3.s85 b/portable/IAR/V850ES/portasm_Fx3.s85 index 98ebb0462..b9ff15734 100644 --- a/portable/IAR/V850ES/portasm_Fx3.s85 +++ b/portable/IAR/V850ES/portasm_Fx3.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portasm_Hx2.s85 b/portable/IAR/V850ES/portasm_Hx2.s85 index edc3ed3ed..759bcdb06 100644 --- a/portable/IAR/V850ES/portasm_Hx2.s85 +++ b/portable/IAR/V850ES/portasm_Hx2.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/IAR/V850ES/portmacro.h b/portable/IAR/V850ES/portmacro.h index c60fc10b1..c1c1f26fd 100644 --- a/portable/IAR/V850ES/portmacro.h +++ b/portable/IAR/V850ES/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC18F/port.c b/portable/MPLAB/PIC18F/port.c index 7bec435a5..111f76800 100644 --- a/portable/MPLAB/PIC18F/port.c +++ b/portable/MPLAB/PIC18F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC18F/portmacro.h b/portable/MPLAB/PIC18F/portmacro.h index 2cfddac6e..e628e96a3 100644 --- a/portable/MPLAB/PIC18F/portmacro.h +++ b/portable/MPLAB/PIC18F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/port.c b/portable/MPLAB/PIC24_dsPIC/port.c index ac9da81dd..5a8695766 100644 --- a/portable/MPLAB/PIC24_dsPIC/port.c +++ b/portable/MPLAB/PIC24_dsPIC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S index b9fd4aeee..0f62af7bb 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S index ada0b9c50..768542194 100644 --- a/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S +++ b/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC24_dsPIC/portmacro.h b/portable/MPLAB/PIC24_dsPIC/portmacro.h index 94d9e4404..130b752e5 100644 --- a/portable/MPLAB/PIC24_dsPIC/portmacro.h +++ b/portable/MPLAB/PIC24_dsPIC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h index 37b3ccdaf..afc431526 100644 --- a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h +++ b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/port.c b/portable/MPLAB/PIC32MEC14xx/port.c index 3ff3a146b..37f1eb3f9 100644 --- a/portable/MPLAB/PIC32MEC14xx/port.c +++ b/portable/MPLAB/PIC32MEC14xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/port_asm.S b/portable/MPLAB/PIC32MEC14xx/port_asm.S index a8581effc..ed183cf3f 100644 --- a/portable/MPLAB/PIC32MEC14xx/port_asm.S +++ b/portable/MPLAB/PIC32MEC14xx/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MEC14xx/portmacro.h b/portable/MPLAB/PIC32MEC14xx/portmacro.h index 29ce57d7e..48c683f2b 100644 --- a/portable/MPLAB/PIC32MEC14xx/portmacro.h +++ b/portable/MPLAB/PIC32MEC14xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/ISR_Support.h b/portable/MPLAB/PIC32MX/ISR_Support.h index 3cb69785c..d8c72ef9b 100644 --- a/portable/MPLAB/PIC32MX/ISR_Support.h +++ b/portable/MPLAB/PIC32MX/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/port.c b/portable/MPLAB/PIC32MX/port.c index b5e08a5db..bbb66b33f 100644 --- a/portable/MPLAB/PIC32MX/port.c +++ b/portable/MPLAB/PIC32MX/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/port_asm.S b/portable/MPLAB/PIC32MX/port_asm.S index e30b46e8b..6c5d9022c 100644 --- a/portable/MPLAB/PIC32MX/port_asm.S +++ b/portable/MPLAB/PIC32MX/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MX/portmacro.h b/portable/MPLAB/PIC32MX/portmacro.h index 02e3a5346..07223c078 100644 --- a/portable/MPLAB/PIC32MX/portmacro.h +++ b/portable/MPLAB/PIC32MX/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/ISR_Support.h b/portable/MPLAB/PIC32MZ/ISR_Support.h index 662bc9352..7b01a0fa9 100644 --- a/portable/MPLAB/PIC32MZ/ISR_Support.h +++ b/portable/MPLAB/PIC32MZ/ISR_Support.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/port.c b/portable/MPLAB/PIC32MZ/port.c index 51cb873a6..5b8c66bf5 100644 --- a/portable/MPLAB/PIC32MZ/port.c +++ b/portable/MPLAB/PIC32MZ/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/port_asm.S b/portable/MPLAB/PIC32MZ/port_asm.S index 0d5684aea..b6662ca80 100644 --- a/portable/MPLAB/PIC32MZ/port_asm.S +++ b/portable/MPLAB/PIC32MZ/port_asm.S @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MPLAB/PIC32MZ/portmacro.h b/portable/MPLAB/PIC32MZ/portmacro.h index 29595c58a..94ff06f09 100644 --- a/portable/MPLAB/PIC32MZ/portmacro.h +++ b/portable/MPLAB/PIC32MZ/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MSVC-MingW/port.c b/portable/MSVC-MingW/port.c index 1e594c769..777ecebd1 100644 --- a/portable/MSVC-MingW/port.c +++ b/portable/MSVC-MingW/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MSVC-MingW/portmacro.h b/portable/MSVC-MingW/portmacro.h index 22e21f755..2d89103a1 100644 --- a/portable/MSVC-MingW/portmacro.h +++ b/portable/MSVC-MingW/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_1.c b/portable/MemMang/heap_1.c index b1ed8e7d4..0f95657ac 100644 --- a/portable/MemMang/heap_1.c +++ b/portable/MemMang/heap_1.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_2.c b/portable/MemMang/heap_2.c index cfb5ba1e2..87d8290dd 100644 --- a/portable/MemMang/heap_2.c +++ b/portable/MemMang/heap_2.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_3.c b/portable/MemMang/heap_3.c index 2882e1c2d..0d32884f8 100644 --- a/portable/MemMang/heap_3.c +++ b/portable/MemMang/heap_3.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_4.c b/portable/MemMang/heap_4.c index 0d4c4a029..0b8f2c1a4 100644 --- a/portable/MemMang/heap_4.c +++ b/portable/MemMang/heap_4.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MemMang/heap_5.c b/portable/MemMang/heap_5.c index 10b0f59e8..7ad3f8a99 100644 --- a/portable/MemMang/heap_5.c +++ b/portable/MemMang/heap_5.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MikroC/ARM_CM4F/port.c b/portable/MikroC/ARM_CM4F/port.c index dbf44d5d0..214d09368 100644 --- a/portable/MikroC/ARM_CM4F/port.c +++ b/portable/MikroC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/MikroC/ARM_CM4F/portmacro.h b/portable/MikroC/ARM_CM4F/portmacro.h index b589a815b..20baecb17 100644 --- a/portable/MikroC/ARM_CM4F/portmacro.h +++ b/portable/MikroC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/large_untested/port.c b/portable/Paradigm/Tern_EE/large_untested/port.c index a9f953dba..a25435d66 100644 --- a/portable/Paradigm/Tern_EE/large_untested/port.c +++ b/portable/Paradigm/Tern_EE/large_untested/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/large_untested/portasm.h b/portable/Paradigm/Tern_EE/large_untested/portasm.h index 8f3007c88..e9d872d58 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portasm.h +++ b/portable/Paradigm/Tern_EE/large_untested/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/large_untested/portmacro.h b/portable/Paradigm/Tern_EE/large_untested/portmacro.h index ec8a8404c..474b32999 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portmacro.h +++ b/portable/Paradigm/Tern_EE/large_untested/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/small/port.c b/portable/Paradigm/Tern_EE/small/port.c index f95710f87..7f8322201 100644 --- a/portable/Paradigm/Tern_EE/small/port.c +++ b/portable/Paradigm/Tern_EE/small/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/small/portasm.h b/portable/Paradigm/Tern_EE/small/portasm.h index c67d0bae6..23f25f5af 100644 --- a/portable/Paradigm/Tern_EE/small/portasm.h +++ b/portable/Paradigm/Tern_EE/small/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Paradigm/Tern_EE/small/portmacro.h b/portable/Paradigm/Tern_EE/small/portmacro.h index ba85dda71..01dd27ea3 100644 --- a/portable/Paradigm/Tern_EE/small/portmacro.h +++ b/portable/Paradigm/Tern_EE/small/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/port.c b/portable/RVDS/ARM7_LPC21xx/port.c index 4dac162c3..2c7745c17 100644 --- a/portable/RVDS/ARM7_LPC21xx/port.c +++ b/portable/RVDS/ARM7_LPC21xx/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/portASM.s b/portable/RVDS/ARM7_LPC21xx/portASM.s index 86123672e..8c701465e 100644 --- a/portable/RVDS/ARM7_LPC21xx/portASM.s +++ b/portable/RVDS/ARM7_LPC21xx/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.h b/portable/RVDS/ARM7_LPC21xx/portmacro.h index b7e3f56eb..e9a903251 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.h +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.inc b/portable/RVDS/ARM7_LPC21xx/portmacro.inc index 9a5b16d58..a238e0c80 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.inc +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/port.c b/portable/RVDS/ARM_CA9/port.c index e0209cd9e..eb4ba3283 100644 --- a/portable/RVDS/ARM_CA9/port.c +++ b/portable/RVDS/ARM_CA9/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/portASM.s b/portable/RVDS/ARM_CA9/portASM.s index d8bcc55b9..514433ffc 100644 --- a/portable/RVDS/ARM_CA9/portASM.s +++ b/portable/RVDS/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/portmacro.h b/portable/RVDS/ARM_CA9/portmacro.h index dfe3ae11a..3e68f85e1 100644 --- a/portable/RVDS/ARM_CA9/portmacro.h +++ b/portable/RVDS/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CA9/portmacro.inc b/portable/RVDS/ARM_CA9/portmacro.inc index 4651961e2..b669e661b 100644 --- a/portable/RVDS/ARM_CA9/portmacro.inc +++ b/portable/RVDS/ARM_CA9/portmacro.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM0/port.c b/portable/RVDS/ARM_CM0/port.c index af1ea02ff..d97c76597 100644 --- a/portable/RVDS/ARM_CM0/port.c +++ b/portable/RVDS/ARM_CM0/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM0/portmacro.h b/portable/RVDS/ARM_CM0/portmacro.h index 80e52e173..d8c9cc4cd 100644 --- a/portable/RVDS/ARM_CM0/portmacro.h +++ b/portable/RVDS/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM3/port.c b/portable/RVDS/ARM_CM3/port.c index 9c6c433d5..078f256cd 100644 --- a/portable/RVDS/ARM_CM3/port.c +++ b/portable/RVDS/ARM_CM3/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM3/portmacro.h b/portable/RVDS/ARM_CM3/portmacro.h index a484ec062..d6e76169d 100644 --- a/portable/RVDS/ARM_CM3/portmacro.h +++ b/portable/RVDS/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4F/port.c b/portable/RVDS/ARM_CM4F/port.c index 7ffbf8e9c..86a6c999e 100644 --- a/portable/RVDS/ARM_CM4F/port.c +++ b/portable/RVDS/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4F/portmacro.h b/portable/RVDS/ARM_CM4F/portmacro.h index 54ed339a3..17d9801e9 100644 --- a/portable/RVDS/ARM_CM4F/portmacro.h +++ b/portable/RVDS/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index 350daf683..179becc6a 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h index 8b2da4fa2..526eb7742 100644 --- a/portable/RVDS/ARM_CM4_MPU/portmacro.h +++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM7/r0p1/port.c b/portable/RVDS/ARM_CM7/r0p1/port.c index af5c0c8e6..1d7e0e356 100644 --- a/portable/RVDS/ARM_CM7/r0p1/port.c +++ b/portable/RVDS/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/RVDS/ARM_CM7/r0p1/portmacro.h b/portable/RVDS/ARM_CM7/r0p1/portmacro.h index a49faa9c5..f3a677f51 100644 --- a/portable/RVDS/ARM_CM7/r0p1/portmacro.h +++ b/portable/RVDS/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX100/port.c b/portable/Renesas/RX100/port.c index 5c4d2d1a3..b18b1eeeb 100644 --- a/portable/Renesas/RX100/port.c +++ b/portable/Renesas/RX100/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX100/port_asm.src b/portable/Renesas/RX100/port_asm.src index 72a5f63a6..8d5c9700a 100644 --- a/portable/Renesas/RX100/port_asm.src +++ b/portable/Renesas/RX100/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX100/portmacro.h b/portable/Renesas/RX100/portmacro.h index fc39e4333..84d3c6aef 100644 --- a/portable/Renesas/RX100/portmacro.h +++ b/portable/Renesas/RX100/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX200/port.c b/portable/Renesas/RX200/port.c index 934a4b193..7626ef00b 100644 --- a/portable/Renesas/RX200/port.c +++ b/portable/Renesas/RX200/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX200/port_asm.src b/portable/Renesas/RX200/port_asm.src index 72a5f63a6..8d5c9700a 100644 --- a/portable/Renesas/RX200/port_asm.src +++ b/portable/Renesas/RX200/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX200/portmacro.h b/portable/Renesas/RX200/portmacro.h index 1b6eaba44..369a18376 100644 --- a/portable/Renesas/RX200/portmacro.h +++ b/portable/Renesas/RX200/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600/port.c b/portable/Renesas/RX600/port.c index d96aab73e..c4ef8ce93 100644 --- a/portable/Renesas/RX600/port.c +++ b/portable/Renesas/RX600/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600/port_asm.src b/portable/Renesas/RX600/port_asm.src index 72a5f63a6..8d5c9700a 100644 --- a/portable/Renesas/RX600/port_asm.src +++ b/portable/Renesas/RX600/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600/portmacro.h b/portable/Renesas/RX600/portmacro.h index 8a7d948dd..ab1d8b47e 100644 --- a/portable/Renesas/RX600/portmacro.h +++ b/portable/Renesas/RX600/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600v2/port.c b/portable/Renesas/RX600v2/port.c index 507003583..c1f5f0307 100644 --- a/portable/Renesas/RX600v2/port.c +++ b/portable/Renesas/RX600v2/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600v2/port_asm.src b/portable/Renesas/RX600v2/port_asm.src index b07b8e4d7..ec1e70d73 100644 --- a/portable/Renesas/RX600v2/port_asm.src +++ b/portable/Renesas/RX600v2/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX600v2/portmacro.h b/portable/Renesas/RX600v2/portmacro.h index 5bfab2c5f..9796eecd8 100644 --- a/portable/Renesas/RX600v2/portmacro.h +++ b/portable/Renesas/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX700v3_DPFPU/port.c b/portable/Renesas/RX700v3_DPFPU/port.c index 0698b3e6c..d0f433206 100644 --- a/portable/Renesas/RX700v3_DPFPU/port.c +++ b/portable/Renesas/RX700v3_DPFPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX700v3_DPFPU/port_asm.src b/portable/Renesas/RX700v3_DPFPU/port_asm.src index 91af59720..546155216 100644 --- a/portable/Renesas/RX700v3_DPFPU/port_asm.src +++ b/portable/Renesas/RX700v3_DPFPU/port_asm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/RX700v3_DPFPU/portmacro.h b/portable/Renesas/RX700v3_DPFPU/portmacro.h index 94a80faf9..22035a0cb 100644 --- a/portable/Renesas/RX700v3_DPFPU/portmacro.h +++ b/portable/Renesas/RX700v3_DPFPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/ISR_Support.inc b/portable/Renesas/SH2A_FPU/ISR_Support.inc index 726c246d9..8a4284c59 100644 --- a/portable/Renesas/SH2A_FPU/ISR_Support.inc +++ b/portable/Renesas/SH2A_FPU/ISR_Support.inc @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/port.c b/portable/Renesas/SH2A_FPU/port.c index cc0369745..940a0a0ee 100644 --- a/portable/Renesas/SH2A_FPU/port.c +++ b/portable/Renesas/SH2A_FPU/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/portasm.src b/portable/Renesas/SH2A_FPU/portasm.src index 9161681f2..0c13fd3ee 100644 --- a/portable/Renesas/SH2A_FPU/portasm.src +++ b/portable/Renesas/SH2A_FPU/portasm.src @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Renesas/SH2A_FPU/portmacro.h b/portable/Renesas/SH2A_FPU/portmacro.h index ce5812ff1..8af3f2300 100644 --- a/portable/Renesas/SH2A_FPU/portmacro.h +++ b/portable/Renesas/SH2A_FPU/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/port.c b/portable/Rowley/MSP430F449/port.c index 8ffe12e9d..4982ddb8a 100644 --- a/portable/Rowley/MSP430F449/port.c +++ b/portable/Rowley/MSP430F449/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/portasm.h b/portable/Rowley/MSP430F449/portasm.h index c267ebb49..bb6ead83e 100644 --- a/portable/Rowley/MSP430F449/portasm.h +++ b/portable/Rowley/MSP430F449/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/portext.asm b/portable/Rowley/MSP430F449/portext.asm index 6fa04e6f8..cd4b8b658 100644 --- a/portable/Rowley/MSP430F449/portext.asm +++ b/portable/Rowley/MSP430F449/portext.asm @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Rowley/MSP430F449/portmacro.h b/portable/Rowley/MSP430F449/portmacro.h index ac85f33c6..e165cbbc7 100644 --- a/portable/Rowley/MSP430F449/portmacro.h +++ b/portable/Rowley/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/SDCC/Cygnal/port.c b/portable/SDCC/Cygnal/port.c index b351df2ea..c424b9b82 100644 --- a/portable/SDCC/Cygnal/port.c +++ b/portable/SDCC/Cygnal/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/SDCC/Cygnal/portmacro.h b/portable/SDCC/Cygnal/portmacro.h index 2b3c5c041..c519cda22 100644 --- a/portable/SDCC/Cygnal/portmacro.h +++ b/portable/SDCC/Cygnal/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB91460/port.c b/portable/Softune/MB91460/port.c index c03e741c9..20ab67a34 100644 --- a/portable/Softune/MB91460/port.c +++ b/portable/Softune/MB91460/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB91460/portmacro.h b/portable/Softune/MB91460/portmacro.h index a4f1fa851..5a4effbea 100644 --- a/portable/Softune/MB91460/portmacro.h +++ b/portable/Softune/MB91460/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB96340/port.c b/portable/Softune/MB96340/port.c index a68432c8d..c4b07b09a 100644 --- a/portable/Softune/MB96340/port.c +++ b/portable/Softune/MB96340/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Softune/MB96340/portmacro.h b/portable/Softune/MB96340/portmacro.h index 9cc5b021e..9375fd7dc 100644 --- a/portable/Softune/MB96340/portmacro.h +++ b/portable/Softune/MB96340/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Tasking/ARM_CM4F/port.c b/portable/Tasking/ARM_CM4F/port.c index eed1b863d..ae8c4ee83 100644 --- a/portable/Tasking/ARM_CM4F/port.c +++ b/portable/Tasking/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Tasking/ARM_CM4F/port_asm.asm b/portable/Tasking/ARM_CM4F/port_asm.asm index bfe12c00e..16cf230b0 100644 --- a/portable/Tasking/ARM_CM4F/port_asm.asm +++ b/portable/Tasking/ARM_CM4F/port_asm.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS Kernel V10.4.3 LTS Patch 2 +; * FreeRTOS Kernel V10.4.3 LTS Patch 3 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/Tasking/ARM_CM4F/portmacro.h b/portable/Tasking/ARM_CM4F/portmacro.h index 5209b0e29..dcb6e2e06 100644 --- a/portable/Tasking/ARM_CM4F/portmacro.h +++ b/portable/Tasking/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c index efbca2eb3..19f7a6a05 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h index 254b87e5b..52c103de9 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s index b995f1b74..f856d2a70 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c index bf6df45e1..2b61ddf58 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/port.c b/portable/ThirdParty/GCC/ARC_EM_HS/port.c index 398925150..9872a5888 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/port.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h index 8a9562870..fb328b883 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c index efbca2eb3..19f7a6a05 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h index 254b87e5b..52c103de9 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/arc_support.s b/portable/ThirdParty/GCC/ARC_v1/arc_support.s index 79f228c8e..ec6cf677e 100644 --- a/portable/ThirdParty/GCC/ARC_v1/arc_support.s +++ b/portable/ThirdParty/GCC/ARC_v1/arc_support.s @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/port.c b/portable/ThirdParty/GCC/ARC_v1/port.c index c66382a90..c81660863 100644 --- a/portable/ThirdParty/GCC/ARC_v1/port.c +++ b/portable/ThirdParty/GCC/ARC_v1/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ARC_v1/portmacro.h b/portable/ThirdParty/GCC/ARC_v1/portmacro.h index 7327cd888..93790bce7 100644 --- a/portable/ThirdParty/GCC/ARC_v1/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_v1/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ATmega/port.c b/portable/ThirdParty/GCC/ATmega/port.c index 302a36414..c15ed9b23 100644 --- a/portable/ThirdParty/GCC/ATmega/port.c +++ b/portable/ThirdParty/GCC/ATmega/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/ATmega/portmacro.h b/portable/ThirdParty/GCC/ATmega/portmacro.h index a1feb7822..6915cf7d5 100644 --- a/portable/ThirdParty/GCC/ATmega/portmacro.h +++ b/portable/ThirdParty/GCC/ATmega/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Posix/port.c b/portable/ThirdParty/GCC/Posix/port.c index 8ee479ebe..71edd9138 100644 --- a/portable/ThirdParty/GCC/Posix/port.c +++ b/portable/ThirdParty/GCC/Posix/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/GCC/Posix/portmacro.h b/portable/ThirdParty/GCC/Posix/portmacro.h index 2d1482b67..c5c3ffc3b 100644 --- a/portable/ThirdParty/GCC/Posix/portmacro.h +++ b/portable/ThirdParty/GCC/Posix/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright 2020 Cambridge Consultants Ltd. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/XCC/Xtensa/port.c b/portable/ThirdParty/XCC/Xtensa/port.c index cb25e9a74..8ba0aa43b 100644 --- a/portable/ThirdParty/XCC/Xtensa/port.c +++ b/portable/ThirdParty/XCC/Xtensa/port.c @@ -1,6 +1,6 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/ThirdParty/XCC/Xtensa/portmacro.h b/portable/ThirdParty/XCC/Xtensa/portmacro.h index dc07dfd33..2cfabec0c 100644 --- a/portable/ThirdParty/XCC/Xtensa/portmacro.h +++ b/portable/ThirdParty/XCC/Xtensa/portmacro.h @@ -1,6 +1,6 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/Drivers/Tick/Tick.c b/portable/WizC/PIC18/Drivers/Tick/Tick.c index be9e76af2..97603efd0 100644 --- a/portable/WizC/PIC18/Drivers/Tick/Tick.c +++ b/portable/WizC/PIC18/Drivers/Tick/Tick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/Drivers/Tick/isrTick.c b/portable/WizC/PIC18/Drivers/Tick/isrTick.c index 24a40612c..8d8c1657c 100644 --- a/portable/WizC/PIC18/Drivers/Tick/isrTick.c +++ b/portable/WizC/PIC18/Drivers/Tick/isrTick.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/addFreeRTOS.h b/portable/WizC/PIC18/addFreeRTOS.h index 3c6ab3154..88917ddf5 100644 --- a/portable/WizC/PIC18/addFreeRTOS.h +++ b/portable/WizC/PIC18/addFreeRTOS.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/port.c b/portable/WizC/PIC18/port.c index e44c375ef..bdf66960e 100644 --- a/portable/WizC/PIC18/port.c +++ b/portable/WizC/PIC18/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/WizC/PIC18/portmacro.h b/portable/WizC/PIC18/portmacro.h index 445d3b7f6..365c2bab4 100644 --- a/portable/WizC/PIC18/portmacro.h +++ b/portable/WizC/PIC18/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/Flsh186/port.c b/portable/oWatcom/16BitDOS/Flsh186/port.c index 04b80f0c3..b0b527ba4 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/port.c +++ b/portable/oWatcom/16BitDOS/Flsh186/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h index 82f3a3142..0802dd5be 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h +++ b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/PC/port.c b/portable/oWatcom/16BitDOS/PC/port.c index cce20c1d5..c3508fb8c 100644 --- a/portable/oWatcom/16BitDOS/PC/port.c +++ b/portable/oWatcom/16BitDOS/PC/port.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/PC/portmacro.h b/portable/oWatcom/16BitDOS/PC/portmacro.h index 96a8f46d9..9e15c67b9 100644 --- a/portable/oWatcom/16BitDOS/PC/portmacro.h +++ b/portable/oWatcom/16BitDOS/PC/portmacro.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/common/portasm.h b/portable/oWatcom/16BitDOS/common/portasm.h index 9703d0db4..63def16a7 100644 --- a/portable/oWatcom/16BitDOS/common/portasm.h +++ b/portable/oWatcom/16BitDOS/common/portasm.h @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/portable/oWatcom/16BitDOS/common/portcomn.c b/portable/oWatcom/16BitDOS/common/portcomn.c index 5c668e164..9e9d3df52 100644 --- a/portable/oWatcom/16BitDOS/common/portcomn.c +++ b/portable/oWatcom/16BitDOS/common/portcomn.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/queue.c b/queue.c index fbbaa2305..1b4d33a85 100644 --- a/queue.c +++ b/queue.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/stream_buffer.c b/stream_buffer.c index 72a899fc7..19bc4fc56 100644 --- a/stream_buffer.c +++ b/stream_buffer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/tasks.c b/tasks.c index 2435d7051..0fdbbc087 100644 --- a/tasks.c +++ b/tasks.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/timers.c b/timers.c index 315334122..334c234a7 100644 --- a/timers.c +++ b/timers.c @@ -1,5 +1,5 @@ /* - * FreeRTOS Kernel V10.4.3 LTS Patch 2 + * FreeRTOS Kernel V10.4.3 LTS Patch 3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of