From d1605b581be8e3936783708fe68d2d3877d0dd47 Mon Sep 17 00:00:00 2001 From: sean Date: Tue, 3 Sep 2024 22:25:45 -0500 Subject: [PATCH 1/6] Adding GIC v2 interrupt group handling to GCC_AARCH64 port. --- portable/GCC/ARM_AARCH64/port.c | 3 ++ portable/GCC/ARM_AARCH64/portASM.S | 57 +++++++++++++++++++++++----- portable/GCC/ARM_AARCH64/portmacro.h | 21 ++++++---- 3 files changed, 64 insertions(+), 17 deletions(-) diff --git a/portable/GCC/ARM_AARCH64/port.c b/portable/GCC/ARM_AARCH64/port.c index 238874edc..41db96cfe 100644 --- a/portable/GCC/ARM_AARCH64/port.c +++ b/portable/GCC/ARM_AARCH64/port.c @@ -170,6 +170,9 @@ __attribute__( ( used ) ) const uint64_t ullICCEOIR = portICCEOIR_END_OF_INTERRU __attribute__( ( used ) ) const uint64_t ullICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS; __attribute__( ( used ) ) const uint64_t ullICCPMR = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS; __attribute__( ( used ) ) const uint64_t ullMaxAPIPriorityMask = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ); +__attribute__( ( used ) ) const uint64_t ullICCHPPIR = portICCHPPIR_HIGHEST_PRIORITY_INTERRUPT_REGISTER_ADDRESS; +__attribute__( ( used ) ) const uint64_t ullICCAIAR = portICCAIAR_ALIASED_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS; +__attribute__( ( used ) ) const uint64_t ullICCAEOIR = portICCAEOIR_ALIASED_END_OF_INTERRUPT_REGISTER_ADDRESS; /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_AARCH64/portASM.S b/portable/GCC/ARM_AARCH64/portASM.S index e684755bf..56eb64d67 100644 --- a/portable/GCC/ARM_AARCH64/portASM.S +++ b/portable/GCC/ARM_AARCH64/portASM.S @@ -307,13 +307,34 @@ FreeRTOS_IRQ_Handler: /* Maintain the interrupt nesting information across the function call. */ STP X1, X5, [SP, #-0x10]! - /* Read value from the interrupt acknowledge register, which is stored in W0 - for future parameter and interrupt clearing use. */ - LDR X2, ullICCIARConst - LDR X3, [X2] - LDR W0, [X3] /* ICCIAR in W0 as parameter. */ + /* Read value from the HPPI register + * In GIC v2, the HPPI register will contain: + * - 0x3FF on GIC ack or spurious IRQ + * - 0x3FE on pending IRQ within Group 1 (IRQ, non-secure) + * - IRQn on pending IRQ within Group 0 (FIQ, secure) + * + * X0 to contain IRQn + * X1 to contain IRQn Group number + */ + LDR X2, ullICCHPPIRConst + LDR X2, [X2] + LDR W3, [X2] + CMP W3, #0x3FE + B.NE 1f + + /* if IRQn Group 1, AIAR contains IRQn */ +2: LDR X2, ullICCAIARConst + MOV X1, #1 + B 0f + + /* if IRQn Group 0, IAR contains IRQn */ +1: LDR X2, ullICCIARConst + MOV X1, #0 - /* Maintain the ICCIAR value across the function call. */ +0: LDR W2, [X2] + LDR W0, [X2] + + /* Maintain the IRQn value across the function call. */ STP X0, X1, [SP, #-0x10]! /* Call the C handler. */ @@ -324,12 +345,25 @@ FreeRTOS_IRQ_Handler: DSB SY ISB SY - /* Restore the ICCIAR value. */ + /* Restore the IRqn value. */ LDP X0, X1, [SP], #0x10 - /* End IRQ processing by writing ICCIAR to the EOI register. */ - LDR X4, ullICCEOIRConst - LDR X4, [X4] + /* End IRQ processing by writing to the EOI register. + * In GIV v2, the EOI register to be used depends on the interrupt group: + * - IRQn Group 0 -> EOI + * - IRQn Group 1 -> AEOI + */ + CMP X1, #1 + B.NE 1f + + /* if IRQn Group 1, use AEOIR */ +2: LDR X4, ullICCAEOIRConst + B 0f + + /* if IRQn Group 0, use EOIR */ +1: LDR X4, ullICCEOIRConst + +0: LDR W4, [X4] STR W0, [X4] /* Restore the critical nesting count. */ @@ -420,6 +454,9 @@ ullPortInterruptNestingConst: .dword ullPortInterruptNesting ullPortYieldRequiredConst: .dword ullPortYieldRequired ullICCIARConst: .dword ullICCIAR ullICCEOIRConst: .dword ullICCEOIR +ullICCHPPIRConst: .dword ullICCHPPIR +ullICCAIARConst: .dword ullICCAIAR +ullICCAEOIRConst: .dword ullICCAEOIR vApplicationIRQHandlerConst: .word vApplicationIRQHandler diff --git a/portable/GCC/ARM_AARCH64/portmacro.h b/portable/GCC/ARM_AARCH64/portmacro.h index e89abb661..42e797f66 100644 --- a/portable/GCC/ARM_AARCH64/portmacro.h +++ b/portable/GCC/ARM_AARCH64/portmacro.h @@ -204,14 +204,21 @@ void FreeRTOS_Tick_Handler( void ); #define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 ) #define portICCBPR_BINARY_POINT_OFFSET ( 0x08 ) #define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 ) +#define portICCHPPIR_HIGHEST_PRIORITY_INTERRUPT_OFFSET ( 0x18 ) +#define portICCAIAR_ALIASED_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x20 ) +#define portICCAEOIR_ALIASED_END_OF_INTERRUPT_OFFSET ( 0x24 ) + +#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET ) +#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) ) +#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ) +#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET ) +#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) +#define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) ) +#define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) ) +#define portICCHPPIR_HIGHEST_PRIORITY_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCHPPIR_HIGHEST_PRIORITY_INTERRUPT_OFFSET ) +#define portICCAIAR_ALIASED_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCAIAR_ALIASED_INTERRUPT_ACKNOWLEDGE_OFFSET ) +#define portICCAEOIR_ALIASED_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCAEOIR_ALIASED_END_OF_INTERRUPT_OFFSET ) -#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET ) -#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) ) -#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ) -#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET ) -#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) -#define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) ) -#define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) ) #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" ) From e3a362b1d1e41bcc02c02f3ef05f4d3b30cbbc17 Mon Sep 17 00:00:00 2001 From: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Date: Mon, 7 Jul 2025 05:45:46 -0700 Subject: [PATCH 2/6] Add artifact backup action (#1290) --- .github/workflows/auto-release.yml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/.github/workflows/auto-release.yml b/.github/workflows/auto-release.yml index 3477f6591..19f6c0167 100644 --- a/.github/workflows/auto-release.yml +++ b/.github/workflows/auto-release.yml @@ -18,6 +18,8 @@ on: jobs: release-packager: + permissions: + id-token: write name: Release Packager runs-on: ubuntu-latest steps: @@ -117,6 +119,14 @@ jobs: ./tools/.github/scripts/release.py "$REPO_OWNER" --kernel-repo-path=local_kernel --kernel-commit="$COMMIT_SHA_2" --new-kernel-version="$VERSION_NUMBER" --new-kernel-main-br-version="$MAIN_BR_VERSION_NUMBER" exit $? + - name: Backup Release Asset + uses: FreeRTOS/CI-CD-Github-Actions/artifact-backup@main + with: + # This is dependent on the release script putting this zip file + # in this exact location. + artifact_path: ./tools/.github/scripts/FreeRTOS-KernelV${{ github.event.inputs.version_number }}.zip + release_tag: ${{ github.event.inputs.version_number }} + - name: Cleanup env: VERSION_NUMBER: ${{ github.event.inputs.version_number }} From 48a4939c9f86aee414042962a1776dd99a09348f Mon Sep 17 00:00:00 2001 From: Florian La Roche Date: Wed, 9 Jul 2025 07:46:00 +0200 Subject: [PATCH 3/6] Fix compiler warning (#1291) - In list.h fix a typo in comments. - In portable/ThirdParty/GCC/Posix/port.c fix compiler warning about "gcc -Wwrite-strings". Signed-off-by: Florian La Roche Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> --- include/list.h | 2 +- portable/ThirdParty/GCC/Posix/port.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/list.h b/include/list.h index b64450c72..b6e0d34f4 100644 --- a/include/list.h +++ b/include/list.h @@ -44,7 +44,7 @@ * * In addition to it's value, each list item contains a pointer to the next * item in the list (pxNext), a pointer to the list it is in (pxContainer) - * and a pointer to back to the object that contains it. These later two + * and a pointer back to the object that contains it. These later two * pointers are included for efficiency of list manipulation. There is * effectively a two way link between the object containing the list item and * the list item itself. diff --git a/portable/ThirdParty/GCC/Posix/port.c b/portable/ThirdParty/GCC/Posix/port.c index b5a4a1b62..d0b81dc1e 100644 --- a/portable/ThirdParty/GCC/Posix/port.c +++ b/portable/ThirdParty/GCC/Posix/port.c @@ -193,7 +193,7 @@ void prvFatalError( const char * pcCall, } /*-----------------------------------------------------------*/ -static void prvPortSetCurrentThreadName( char * pxThreadName ) +static void prvPortSetCurrentThreadName( const char * pxThreadName ) { #ifdef __APPLE__ pthread_setname_np( pxThreadName ); From f5e6151b1433227ca0afe2e1ec6cca6b31b7014c Mon Sep 17 00:00:00 2001 From: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Date: Wed, 9 Jul 2025 09:53:13 -0700 Subject: [PATCH 4/6] Update artifact path in the backup action (#1292) * Add artifact backup action * Fix artifact path --- .github/workflows/auto-release.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/auto-release.yml b/.github/workflows/auto-release.yml index 19f6c0167..2cd6fde6e 100644 --- a/.github/workflows/auto-release.yml +++ b/.github/workflows/auto-release.yml @@ -124,7 +124,7 @@ jobs: with: # This is dependent on the release script putting this zip file # in this exact location. - artifact_path: ./tools/.github/scripts/FreeRTOS-KernelV${{ github.event.inputs.version_number }}.zip + artifact_path: ./FreeRTOS-KernelV${{ github.event.inputs.version_number }}.zip release_tag: ${{ github.event.inputs.version_number }} - name: Cleanup From 684b34ca8db0de1277b9b5359e0d1d822b53b6a2 Mon Sep 17 00:00:00 2001 From: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Date: Mon, 14 Jul 2025 16:20:18 +0530 Subject: [PATCH 5/6] Define security extension configs before portable.h (#1294) Define configENABLE_PAC and configENABLE_BTI before including portable.h to prevent "used before definition" warnings when these macros are not set in FreeRTOSConfig.h. Fixes: https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/1293 Signed-off-by: Gaurav Aggarwal --- include/FreeRTOS.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/include/FreeRTOS.h b/include/FreeRTOS.h index ce8530e7d..63e2feb51 100644 --- a/include/FreeRTOS.h +++ b/include/FreeRTOS.h @@ -101,6 +101,16 @@ #define configASSERT_DEFINED 1 #endif +/* Set configENABLE_PAC and/or configENABLE_BTI to 1 to enable PAC and/or BTI + * support and 0 to disable them. These are currently used in ARMv8.1-M ports. */ +#ifndef configENABLE_PAC + #define configENABLE_PAC 0 +#endif + +#ifndef configENABLE_BTI + #define configENABLE_BTI 0 +#endif + /* Basic FreeRTOS definitions. */ #include "projdefs.h" @@ -3040,16 +3050,6 @@ #define configCONTROL_INFINITE_LOOP() #endif -/* Set configENABLE_PAC and/or configENABLE_BTI to 1 to enable PAC and/or BTI - * support and 0 to disable them. These are currently used in ARMv8.1-M ports. */ -#ifndef configENABLE_PAC - #define configENABLE_PAC 0 -#endif - -#ifndef configENABLE_BTI - #define configENABLE_BTI 0 -#endif - /* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using * dynamically allocated RAM, in which case when any task is deleted it is known * that both the task's stack and TCB need to be freed. Sometimes the From 32e581636f66504daa1a76afcc766be2a4b8a9de Mon Sep 17 00:00:00 2001 From: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Date: Thu, 24 Jul 2025 11:07:27 +0530 Subject: [PATCH 6/6] Delete thread key on process exit (#1297) Previously, the shared thread key was deleted in xPortStartScheduler after scheduler was ended. This created a race condition where prvThreadKeyDestructor (responsible for freeing thread-specific heap memory) would not be called if xPortStartScheduler deleted the key before the last task deletion, as destructors are not invoked after key deletion (see https://github.com/walac/glibc/blob/master/nptl/pthread_create.c#L145-L150). Move thread key deletion to process exit to ensure all thread-specific memory is properly freed. Signed-off-by: Gaurav Aggarwal --- portable/ThirdParty/GCC/Posix/port.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/portable/ThirdParty/GCC/Posix/port.c b/portable/ThirdParty/GCC/Posix/port.c index d0b81dc1e..2342f6034 100644 --- a/portable/ThirdParty/GCC/Posix/port.c +++ b/portable/ThirdParty/GCC/Posix/port.c @@ -140,6 +140,8 @@ static void prvThreadKeyDestructor( void * pvData ) static void prvInitThreadKey( void ) { pthread_key_create( &xThreadKey, prvThreadKeyDestructor ); + /* Destroy xThreadKey when the process exits. */ + atexit( prvDestroyThreadKey ); } /*-----------------------------------------------------------*/ @@ -315,8 +317,6 @@ BaseType_t xPortStartScheduler( void ) /* Restore original signal mask. */ ( void ) pthread_sigmask( SIG_SETMASK, &xSchedulerOriginalSignalMask, NULL ); - prvDestroyThreadKey(); - return 0; } /*-----------------------------------------------------------*/