Commit graph

233 commits

Author SHA1 Message Date
Paul Bartell ff88fc8b6c
portable-RP2040: Fix typo in README.md (#559)
Replace "import" with "include" in cmake code sample.
2022-09-14 12:13:10 +05:30
Gabor Toth 030e76681b
M85 support (#556)
* Extend support to Arm Cortex-M85

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: I679ba8e193638126b683b651513f08df445f9fe6

* Add generated Cortex-M85 support files

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: Ib329d88623c2936ffe3e9a24f5d6e07655e4e5c8

* Extend Trusted Firmware M port

Extend Trusted Firmware M port to Cortex-M23,
Cortex-M55 and Cortex-M85.

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: If8f1081acfd04e547b3227579e70e355a6adffe3

* Re-run copy_files.py script

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-13 22:08:25 +05:30
Jakub Lužný d91cd6fd05
RISC-V: Add support for RV32E extension in GCC port (#543)
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2022-08-30 16:49:37 -07:00
Octaviarius dc8f8be53e
[Fix] Type for pointers operations (#550)
* fix type for pointers operations in some places: size_t -> portPOINTER_SIZE_TYPE

* fix pointer arithmetics

* fix xAddress type
2022-08-30 13:27:39 -07:00
Gaurav-Aggarwal-AWS ac69aa858a
Add FreeRTOS config directory to include dirs (#548)
This allows the application write to set FREERTOS_CONFIG_FILE_DIRECTORY
to whichever directory the FreeRTOSConfig.h file exists in.

This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/545

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-08-22 20:58:07 +05:30
Archit Gupta 992ff1bb50
Fix warnings in posix port (#544)
Fixes warnings about unused parameters and variables when built with
`-Wall -Wextra`.
2022-08-16 16:41:17 +05:30
RichardBarry 8741c4f919
Include string.h at the top of portable/GCC/ARM_CA9/port.c to prevent memset() generating a warning. (#430)
Co-authored-by: none <unknown>
2022-08-09 10:37:24 -07:00
Gaurav-Aggarwal-AWS 3b18a07568
Add .syntax unified to GCC assembly functions (#538)
This fixes the compilation issue with XC32 compiler.

It was reported here - https://forums.freertos.org/t/xc32-v4-00-error-with-building-freertos-portasm-c/14357/4

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Paul Bartell <pbartell@amazon.com>
2022-08-07 22:46:11 +05:30
Chris Copeland fc615627f6
Block SIG_RESUME in the main thread of the Posix port so that sigwait works as expected (#532)
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2022-08-04 11:11:31 -07:00
Gaurav Aggarwal 618e165fa7 Fix NULL pointer dereference in vPortGetHeapStats
When the heap is exhausted (no free block), start and end markers are
the only blocks present in the free block list:

     +---------------+     +-----------> NULL
     |               |     |
     |               V     |
+ ----- +            + ----- +
|   |   |            |   |   |
|   |   |            |   |   |
+ ----- +            + ----- +
  xStart               pxEnd

The code block which traverses the list of free blocks to calculate heap
stats used a do..while loop that moved past the end marker when the heap
had no free block resulting in a NULL pointer dereference. This commit
changes the do..while loop to while loop thereby ensuring that we never
move past the end marker.

This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/534

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-08-04 09:57:59 -07:00
Gaurav-Aggarwal-AWS dc9c034c85
Add vPortRemoveInterruptHandler API (#533)
* Add xPortRemoveInterruptHandler API

This API is added to the MicroBlazeV9 port. It enables the application
writer to remove an interrupt handler.

This was originally contributed in this PR - https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/523

* Change API signature to return void

This makes the API similar to vPortDisableInterrupt.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gavin Lambert <uecasm@users.noreply.github.com>
2022-08-03 13:45:27 -07:00
Gavin Lambert 63f86fc7a2
Implement MicroBlazeV9 stack protection (#523)
* Implement stack protection for MicroBlaze (without MPU wrappers)
2022-08-03 12:01:18 +05:30
0xjakob 349e803314
Posix: Removed unused signal set from port (#528)
Co-authored-by: Jakob Hasse <0xjakob@users.noreply.github.com>
2022-07-25 10:05:30 -07:00
NomiChirps 859dbaf504
RP2040: Use indirect reference for pxCurrentTCB (#525) 2022-07-18 16:05:30 -07:00
Paul Bartell 2dfdfc4ba4
Add Cortex M7 r0p1 Errata 837070 workaround to CM4_MPU ports (#513)
* Clarify Cortex M7 r0p1 errata number in r0p1 specific port.

* Add ARM Cortex M7 r0p0 / r0p1 Errata 837070 workaround to CM4 MPU ports.

Optionally, enable the errata workaround by defining configTARGET_ARM_CM7_r0p0 or configTARGET_ARM_CM7_r0p1 in FreeRTOSConfig.h.

* Add r0p1 errata support to IAR port as well

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Change macro name to configENABLE_ERRATA_837070_WORKAROUND

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-06-30 10:35:26 +05:30
Gaurav-Aggarwal-AWS 8e89acfc98
Update submodule pointer of Community Supported Ports (#486)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2022-06-29 08:01:00 -07:00
Xinyu Zhang 57530af294
Update to TF-M version TF-Mv1.6.0 (#517)
Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com>
Change-Id: I0c15564b342873f9bd7a8240822e770950a0563e
2022-06-29 12:22:30 +05:30
Graham Sanderson d2a81539e0
RP2040: Allow FreeRTOS to be added to the parent CMake project post initialization of the Pico SDK (#497)
Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
2022-06-24 17:22:49 +05:30
Graham Sanderson 90d920466e
RP2040: Remove incorrect assertion (#508)
After the xEventGroupWaitBits in vProtLockInternalSpinUnlockWithWait there was an assertion about
pxYiledSpinLock being NULL, however when xEventGroupWaitBits returns, IRQs have been re-enabled
and so it is no longer safe to assert on the state which is protected by IRQs being disabled.

Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
2022-06-22 10:27:26 -07:00
Ravishankar Bhagavandas 0b46492740
Add callback overrides for stream buffer and message buffers (#437)
* Let each stream/message can use its own sbSEND_COMPLETED

In FreeRTOS.h, set the default value of configUSE_SB_COMPLETED_CALLBACK
to zero, and add additional space for the function pointer when
the buffer created statically.

In stream_buffer.c, modify the macro of sbSEND_COMPLETED which let
the stream buffer to use its own implementation, and then add an
pointer to the stream buffer's structure, and modify the
implementation of the buffer creating and initializing

Co-authored-by: eddie9712 <qw1562435@gmail.com>
2022-06-20 17:48:34 -07:00
AndreiCherniaev daf544fbc4
add extra check for compiler time (#499)
minor change to add extra check for compiler time to prevent bad config

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2022-06-02 22:33:37 +05:30
alfred gedeon 719ceee352
Add suppport for ARM CM55 (#494)
* Add supposrt for ARM CM55

* Fix file header

* Remove duplicate code

* Refactor portmacro.h

1. portmacro.h is re-factored into 2 parts - portmacrocommon.h which is
   common to all ARMv8-M ports and portmacro.h which is different for
   different compiler and architecture. This enables us to provide
   Cortex-M55 ports without code duplication.
2. Update copy_files.py so that it copies Cortex-M55 ports correctly -
   all files except portmacro.h are used from Cortex-M33 ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-06-01 15:00:10 -07:00
Dusan Cervenka 1ec8e49de4
Aligned nullptr check for heap3. (#493)
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
2022-05-17 22:26:01 +05:30
alfred gedeon ec7c40335d
Format code, and rmove implicit tests (#489) 2022-04-21 10:18:58 -07:00
Kody Stribrny 15bc8664b5
Add atomic flag for 16-bit ticks PIC24 (#488)
This change allows the PIC24 family of
16 bit processors to read the tick count
without a critical section when the tick
count is 16 bits.

Inspired from discussion - https://forums.freertos.org/t/xtaskgettickcount-with-critical-section-on-16-bit-mcu/14860/5
2022-04-15 08:13:14 -07:00
pierrenoel-bouteville-act e73fabce9a
Declare vApplicationMallocFailedHook function in task.h instead in each C heap file (#483)
vApplicationMallocFailedHook was declared in each Heap file. which forces users to declare it and can cause problems if the prototype of the function changes.

Co-authored-by: Pierre-Noel Bouteville <pnb990@gmail.com>
2022-04-13 10:44:14 -07:00
Archit Gupta b00250372e
Enable use of --text-section-literals in Xtensa port (#485)
Patch submitted by customer on forums here: https://forums.freertos.org/t/cannot-compile-xtensa-port-assembly-with-text-section-literals/14838
2022-04-11 15:07:08 -07:00
Gaurav-Aggarwal-AWS 40c37bd3ab
Add configSYSTICK_CLOCK_HZ to Cortex-M0 ports (#484)
This is needed to support the case when SysTick timer is not clocked
from the same source as CPU. This support already exists in other
Cortex-M ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-04-08 11:13:11 -07:00
Gaurav-Aggarwal-AWS b5b1ff02dd
Add a guard around mpu_wrappers.c (#480)
* Add a guard around mpu_wrappers.c

This avoid linker errors when this file is accidently compiled in
projects using non-MPU ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix formatting check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-04-05 22:59:30 +05:30
Gaurav-Aggarwal-AWS 356fff8028
Update portable/ThirdParty/README.md (#474)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-03-10 19:41:45 -08:00
niniemann bdec3b6e54
fix: add additional .ltorg directives to GCC CM3/CM4 mpu ports (#473)
Co-authored-by: Nils Niemann <Niemann.N@eppendorf.de>
2022-03-10 09:19:58 -08:00
xinyu-tfm f18e432d49
Update the README to align with TF-M v1.5.0 in TF-M integration (#469)
Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com>
Change-Id: Ic04b82259ac17d5e0f8662118385c803e68af3e5
2022-03-05 16:31:08 -08:00
Gaurav-Aggarwal-AWS 58770b0f51
Check for add overflow only once (#467)
Update the size calculations such that we only need to check for add
overflow only once. Also, change the way we detect add overflow so that
we do not need to cause an overflow to detect an overflow.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-03-03 15:16:39 -08:00
Gaurav-Aggarwal-AWS 8eb3585252
Move MSB check after final size calculation (#463)
We use the MSB of the size member of a BlockLink_t to track whether not
a block is allocated. Consequently, the size must not be so large that
the MSB is set. The check to see if the MSB in the size is set needs to
be done after the final size (metadata + alignment) is calculated.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-28 11:59:00 -08:00
Gaurav-Aggarwal-AWS 82be77995e
Heap improvements (#462)
* Heap improvements

This commit makes the following improvements:

1. Add a check to heap_2 to track if a memory block is allocated to the
   application or not. The MSB of the size field is used for this
   purpose. The same check already exists in heap_4 and heap_5. This
   check prevents against double free.

2. Add a new flag configHEAP_CLEAR_MEMORY_ON_FREE to heap_2, heap_4 and
   heap_5. The application writer can set it to 1 in their
   FreeRTOSConfig.h to ensure that a block of memory allocated using
   pvPortMalloc is cleared (i.e. set to zero) when it is freed using
   vPortFree. If left undefined, configHEAP_CLEAR_MEMORY_ON_FREE
   defaults to 0 for backward compatibility. We recommend setting
   configHEAP_CLEAR_MEMORY_ON_FREE to 1 for better security.

3. Add a new API pvPortCalloc to heap_2, heap_4 and heap_5. This API
   has the following signature:
   void * pvPortCalloc( size_t xNum, size_t xSize );
   It allocates memory for an array of xNum objects each of which is of
   xSize and initializes all bytes in the allocated storage to zero. If
   allocation succeeds, it returns a pointer to the lowest byte in the
   allocated memory block. On failure, it returns a null pointer.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-24 10:52:10 -08:00
Felipe Torrezan 4539e1c574
Migrated RL78/IAR port to EWRL78v3+ (#461)
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2022-02-24 10:04:46 -07:00
imi415 38efd2689e
CMake: Move mpu_wrapper to ports library. (#459) 2022-02-22 08:30:09 -07:00
Ming Yue 09a2c0b324
Remove exception loop tags. (#457) 2022-02-17 15:28:04 -08:00
Ming Yue 25d180a09b
Use a dedicated symbol for in-function loop to avoid the weak symbol JAL range error when a strong symbol is defined outside. (#455) 2022-02-15 14:56:13 -08:00
Shubham Kulkarni 4a490d64a5
portable/Xtensa_ESP32: Add SPDX license identifiers (#452)
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2022-02-08 16:28:07 -08:00
Gaurav-Aggarwal-AWS d5a10e4595
Add alignment for the direct mode handler (#449)
It is still possible to further relax the alignment using linker script
if needed.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-08 11:51:25 -08:00
Gaurav-Aggarwal-AWS cf248aec2d
Add support for 16 MPU regions to GCC Cortex-M33 ports (#448)
* Add support for 16 MPU regions to GCC Cortex-M33 TZ port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add support for 16 MPU regions to Cortex-M33 NTZ GCC port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-07 16:51:19 -08:00
swaldhoer 89e4823a49
Update uncrustify configuration to 0.69 (#445)
The configuration was updated using

    uncrustify -c .github/uncrustify.cfg -o .github/uncrustify.cfg --update-config-with-doc

to align with the actually used uncrustify version used, i.e., all
configuration is now explicitly set (and no longer implicit).

The files that are common to all ports ("portable/MemMang*" and
"portable/Common/mpu_wrappers.c" are now also autoformatted.

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2022-01-28 10:48:03 -08:00
Gaurav-Aggarwal-AWS 9efca75d1e
Riscv re-factoring (#444)
* Refactor RISCV port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Changes to make re-factoring work on ESP32-C3

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove alignment and place handlers in separate sections

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Correct section names

This is needed so that the assemblers correctly recognizes functions.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Move mtvec programming to the application

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Refactor mtimer udpate code

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Move critical nesting to port layer

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Respect configTASK_RETURN_ADDRESS

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Formatting changes

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-01-26 17:55:01 -08:00
yhsb2k cdd406a62f
Add CMake build (#421)
* Add CMake build

Allows to build and link FreeRTOS using CMake build system.
From top-level project it looks like this:

set(FREERTOS_PORT_GCC_ARM_CM4F ON)
set(FREERTOS_CONFIG_FILE_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} CACHE STRING "")
add_subdirectory(third_party/FreeRTOS-Kernel)

Where FREERTOS_PORT_GCC_ARM_CM4F is FreeRTOS port name.
freertos is target name, which can be used in target_link_libraries()

* Add feature to set custom heap source file

Example how to set it from top-level project:
set(FREERTOS_HEAP ${CMAKE_CURRENT_LIST_DIR}/path_to/my_heap.c CACHE STRING "")

* Set cmake_minimum_required to 3.15

* Fail build when FREERTOS_CONFIG_FILE_DIRECTORY not set

* Rename library to freertos_kernel

* Rework FREERTOS_PORT option to act as combobox

* Use freertos_kernel_port cmake target

* Split port sources multiline

Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2022-01-20 12:35:04 -08:00
Ming Yue 043c2c7ef6
Fix GCC/RX100 function naming error. (#440) 2022-01-13 10:30:26 -08:00
Gaurav-Aggarwal-AWS 8e2dd5b861
Add a Known Issues file in the Third Party folder (#434)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-01-03 14:26:43 -07:00
Amit Tomar c13719d2d0
fix alignment exception for ullPortInterruptNesting. (#317)
* fix alignment exception for ullPortInterruptNesting.

While loading (LDR X5, ullPortInterruptNestingConst) the ullPortInterruptNesting
variable, the program control seems to be stuck and there is no abort or stack
trace observed (as there is no exception handler is installed to catch unaligned
access exception).

Program control moves forward, if one just declares this varible to be 2 bytes
aligned but then varible is not updated properly.

One of my colleague, pointed out that issue is due to the fact that
ullPortInterruptNesting must be at 8 bytes aligned address but since
"vApplicationIRQHandler" (that has 4 bytes of address) is sitting between
two 8 bytes aligned addresses that forces ullPortInterruptNesting to be at
4 byte aligned address, causing all sort of mess.

It works on QEMU (on ARM64) as it is, since there is no such check for
unaligned access but on real hardware it is prohibited.

Workaround to this problem is, either we skip 4 byets (using .align 4) after
vApplicationIRQHandler declaration or declare it the end of all declarations.
This commit does the latter one.

Signed-off-by: Amit Singh Tomar <atomar25opensource@gmail.com>

* Update portASM.S

Remove 1 tab = 4 spaces

Co-authored-by: Amit Singh Tomar <atomar25opensource@gmail.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2021-12-29 13:53:10 -07:00
Fabian 481c722ef3
RISC-V: No #error on RV64 regarding byte alignment (#367)
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-12-28 11:52:33 -08:00
leona 81d15dc550
Fix: Interrut Handler Register Function and Exception Process (#41)
Signed-off-by: shiode <shiode@aptpod.co.jp>

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: David Chalco <59750547+dachalco@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2021-12-28 10:54:23 -07:00
Gaurav-Aggarwal-AWS 53b9a80b8e
Update third party ports readme (#428)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-12-21 14:10:06 -08:00
Graham Sanderson debbd254b6
RP2040 fixes (#424)
* RP2040: malloc needs to be thread safe for FreeRTOS whether both cores are used or not

* RP2040: CMake file had broken left over test code

* RP2040: portIS_FREE_RTOS_CORE() returned an incorrect value prior to scheduler init when the application was compiled without multicore support

* RP2040: Bad initialization code was causing IRQs to get disabled before main() was called when using non static allocation
2021-12-21 11:08:41 -08:00
Gaurav Aggarwal 44fc137428 Add option to disable unprivileged critical sections
This commit introduces a new config
configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS which enables developers to
prevent critical sections from unprivileged tasks. It defaults to 1 for
backward compatibility. Application should set it to 0 to disable
critical sections from unprivileged tasks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-15 15:09:12 -08:00
Gaurav Aggarwal 7a3848753b Change xPortRaisePrivilege and vPortResetPrivilege to macros
This prevents non-kernel code from calling these functions.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-15 15:09:12 -08:00
Kevin Thibedeau cd0b7fc271
Build with -Wmissing-prototypes flags vPortYieldFromISR() in the Posix port. (#409)
There's already a portYIELD_FROM_ISR() macro that calls vPortYield() which wraps the FromISR code.
It doesn't appear that vPortYieldFromISR() is intended to be publicly accessible in this port so
I've marked it as private to silence the warning.

event_create() also got flagged due to missing void in prototype.

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-11-08 13:51:25 -08:00
andrewtjs a432a688ca
bugfix: Initialise stack correctly on dsPIC port (#405)
* Use compiler predefined constants.

Use of MPLAB_DSPIC_PORT is deprecated.
2021-11-01 12:38:37 -07:00
Gaurav-Aggarwal-AWS 06fb777e43
Update comments for the ARM_CA53_64_BIT_SRE port (#403)
Mention that FreeRTOS_IRQ_Handler should not be used for FIQs and the
reason for assuming Group 1 for Interrupt Acknowledge and End Of
Interrupt registers.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-10-16 13:45:03 -07:00
Stephane Viau 68ddb32b55
Handle interrupt acknowledge register in Cortex-A53 SRE port (#392)
Let the FreeRTOS IRQ handler properly store and restore the ICCIAR
register value around the vApplicationIRQHandler() call.

Signed-off-by: Stephane Viau <stephane.viau@oss.nxp.com>

Co-authored-by: Stephane Viau <stephane.viau@oss.nxp.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-10-15 09:21:56 -07:00
swaldhoer a030d0a02b
fix typo (#399) 2021-10-06 15:32:07 -07:00
Qikai 1fb4e847ed
Fix the defect that Heap_1.c may waste first portBYTE_ALIGNMENT bytes of ucHeap[] (#238)
* Fix the defect that Heap_1.c may waste first 8 bytes of ucHeap[]

* Fix the same byte waste issue in heap_2
2021-10-04 11:15:00 -07:00
Shubham Kulkarni 741185f1d0
Xtensa_ESP32: Add definition for portMEMORY_BARRIER (#395)
This fixes crash observed in Amazon FreeRTOS when optimisations are enabled
2021-09-16 14:16:22 -07:00
Gaurav-Aggarwal-AWS 1b86b39940
Remove AVR ports from main repo (#394)
These ports now exist in the
https://github.com/FreeRTOS/FreeRTOS-Kernel-Partner-Supported-Ports repo.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-14 19:25:46 -07:00
Gaurav Aggarwal 99a5a5fe82 Fix free secure context for Cortex-M23 ports
Update the branching condition to correctly free secure context when
there is one.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal 06ea7275b3 Implement secure stack sealing as per ARM's recommendation
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal 61f7560243 Associate secure context with task handle
The secure side context management code now checks that the secure
context being saved or restored belongs to the task being switched-out
or switched-in respectively.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal ccaa0f4d6e Pre-allocate secure-side context structures
This commit improves ARMv8-M security by pre-allocating secure-side task
context structures and changing how tasks reference a secure-side
context structure when calling a secure function. The new configuration
constant secureconfigMAX_SECURE_CONTEXTS sets the number of secure
context structures to pre-allocate. secureconfigMAX_SECURE_CONTEXTS
defaults to 8 if left undefined.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav-Aggarwal-AWS fa0f5c436c
Add freertos_risc_v_chip_specific_extensions.h for 64-bit ports (#385)
* Add freertos_risc_v_chip_specific_extensions.h for 64-bit ports

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-01 15:38:07 -07:00
sherryzhang c290780e34
Update the README to align with TF-Mv1.4.0 in TF-M integration (#384)
Change-Id: I41fc8e18657086e86eacd38ed70f474555739a3c
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
2021-08-26 23:07:58 -07:00
Shubham Kulkarni 6ba8aa63c1
Xtensa_ESP32: Fix build issues when external SPIRAM is enabled (#381)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-08-12 17:46:25 -07:00
Jack Lam d01801807d
Tidy up the 8051 sdcc port (#376)
* Tidy up the 8051 sdcc port

* Replace tabs with spaces in SDCC Cygnal port.c file.

Co-authored-by: John Lin <shaojun.lin@delonghigroup.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2021-08-12 11:50:52 -07:00
Gaurav-Aggarwal-AWS 85a23127cc
Add ReadMe for third party port contributions (#371)
* Add ReadMe for third party port contributions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-07-28 10:37:51 -07:00
Kristine Jassmann b5a9229563
Warning fixes. (#356)
* Use cast to fix warnings.

* Remove all empty definitions of portCLEAN_UP_TCB( pxTCB ) and
  portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) from ports.
  When these are undefined, the default empty definition is defined
  in FreeRTOS.h.
2021-07-20 12:55:49 -07:00
swaldhoer 46338705bd
Replace two dashes and one whitespace with their corresponding ASCII characters. (#362) 2021-06-30 15:07:55 -07:00
Graham Sanderson 9af72db3ec
Add RP2040 support (#341)
* Add RP2040 support

* remove spurious tab/spaces comments

* add .cmake to ignored kernel checks

* Apply suggestions from code review

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>

* license and end of file newline fixes

* Rename LICENSE.TXT to LICENSE.md

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-06-30 13:20:54 -07:00
Archit Gupta 4200226708
Move the community/partner supported ports to correct location (#361) 2021-06-29 18:36:49 -07:00
Gaurav-Aggarwal-AWS 4e3bf0f5c0
Add Cortex-A53 port with system register interface for CPU interface access (#357)
The difference between this port and portable/GCC/ARM_CA53_64_BIT is
that this port uses System Register interface to access CPU interface
while the other one uses Memory-mapped interface.

Signed-off-by: Gaurav Aggarwal 
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2021-06-22 18:51:58 -07:00
RichardBarry ddc840fd28
Make the type used to hold run-time counter values configurable (#350)
* Introduce configRUN_TIME_COUNTER_TYPE which enables developers to define the type used to hold run time statistic counters.  Defaults to uint32_t for backward compatibility.  #define configRUN_TIME_COUNTER_TYPE to a type (for example, uint64_t) in FreeRTOSConfig.h to override the default.

Introduce ulTaskGetIdleRunTimePercent() to complement the pre-existing ulTaskGetIdleRunTimeCounter().  Whereas the pre-existing function returns the raw run time counter value, the new function returns the percentage of the entire run time consumed by the idle task.  Note the amount of idle time is only a good measure of the slack time in a system if there are no other tasks executing at the idle priority, tickless
idle is not used, and configIDLE_SHOULD_YIELD is set to 0.

* Add ultaskgetidleruntimepercent to lexicon.txt.

* Update History file.
Add the MPU version of ulTaskGetIdleRunTimePercent().

* Update include/FreeRTOS.h to correct comment as per aggarg@ suggestion.
* Fix alignment in mpu_wrappers.h.
Commit changes to mpu_prototypes.h which were missed from the original commit.
2021-06-14 12:17:41 -07:00
Thomas Pedersen 6a84f2c1da
Posix: fix event_wait_timed() (#346)
event_wait_timed() was ignoring a timeout of 1000 ms.
Presumably this is because pthread_cond_timedwait() only
considers tv_nsec less than one second.

Convert the timeout in miliseconds to second and nanosecond
components to fix this.

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2021-06-10 17:15:47 -07:00
Paul Bartell eec42331b4 Normalize files with mixed line endings (introduced in commit 3a413d1) 2021-06-01 17:55:18 -07:00
Paul Bartell 3f7e75dcd5 Add license header to wait_for_event.c and wait_for_event.h 2021-05-27 19:57:55 -07:00
Paul Bartell b5e9896ad7 Cleanup license text in Xtensa XCC and Xtensa ESP32 GCC ports.
Add SPXD license identifiers.
2021-05-27 19:57:55 -07:00
Paul Bartell 3a413d1022 Add SPDX-License-Identifier: MIT to MIT licensed files. 2021-05-27 19:57:55 -07:00
Paul Bartell b286f173e8 Update license text for ports that were previously missed. 2021-05-27 19:57:55 -07:00
Paul Bartell e31dccae80 Remove "1 tab == 4 spaces!" line from files that still contain it. 2021-05-27 19:57:55 -07:00
Paul Bartell adfc53368f Update copyright year from 2020 to 2021 2021-05-27 19:57:55 -07:00
Paul Bartell 08dc6f64ee Change kernel revision in each file header from V10.4.3 to <DEVELOPMENT BRANCH> 2021-05-27 19:57:55 -07:00
Joseph Julicher 736f2302ae
deprecating the mcf5235 port (#334) 2021-05-26 16:26:19 -07:00
j4cbo f37bcd5c14
Wrap macros in do { ... } while( 0 ) (#240) 2021-05-24 14:41:58 -07:00
Evgeny Ermakov ac2c383bc1
Posix: fix copyright (#250) 2021-04-21 19:08:46 -04:00
Meco Jianting Man d8770748ff
[kernel & MemMang] use space to replace tab and remove meaningless space in the end of each line (#314)
Signed-off-by: Meco Man <920369182@qq.com>

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2021-04-19 09:58:55 -07:00
carlo-dev-git 75e0c36eb4
Code cleanup (#288)
* Update port.c

* Code cleanup

Misc coding style cleanup and typo fixes

* Fix ASM style

Fix ASM style

* Fix header check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-04-07 14:19:31 -07:00
Tobias Schulte cb7bef09f2
Adjust portPOINTER_SIZE_TYPE to correct size (#275)
* Adjust portPOINTER_SIZE_TYPE to correct size

portPOINTER_SIZE_TYPE wasn't yet set correctly to be 16 bit

* Fixed FreeRTOS file header to comply with automatic checks

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2021-03-19 15:35:21 -07:00
carlo-dev-git 49c38f08de
Update port.c (#283) 2021-03-19 15:22:22 -07:00
David Chalco 578d040659
Add git attributes (#245)
* Add .gitattributes configured to normailze line endings to LF

* replace crlf with lf, per .gitattributes
2021-01-15 12:04:31 -07:00
Thomas Pedersen 23f641850d
Posix: fix build failure (#235)
Fixes: a48f137896 ("Posix Port: Comment and remove unused variables (#230)")

Authored-by: Thomas Pedersen <thomas@adapt-ip.com>
2021-01-08 14:19:15 -08:00
Shubham Kulkarni ef4c305244
Update ESP32 port to ESP-IDF release v4.2 and add ESP-IDF version check (#231)
* Revert "Reintroduce Espressif's IDF v4.2 changes to ESP32 port (#193)"

This reverts commit 3d4d17178f.

* Update ESP32 port files to work with ESP-IDF v4.2 as well as ESP-IDF v3.3

Add changes required to support ESP32-S2

* portmacro.h: Change return type of vApplicationSleep to void

This fixes build failure when automatic light sleep is enabled

* prevent header checks for files with different licensing

Co-authored-by: David Chalco <david@chalco.io>
2020-12-22 13:00:45 -08:00
sherryzhang 8e99e2d38b
Align the TF-M version of the integration with kernel to version TF-Mv1.2.0 (#228)
Change-Id: I6d5f0732f4cb123df54b9df0b9820ef4dcf70fa4
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
2020-12-15 09:17:20 -08:00
Cobus van Eeden ec62f69dab [AUTO][RELEASE]: Bump file header version to "10.4.3" 2020-12-14 10:13:39 -08:00
alfred gedeon a48f137896
Posix Port: Comment and remove unused variables (#230)
* Posix Port: Comment and remove unused variables
* Fix header, replace tabs with spaces
2020-12-13 17:33:45 -08:00
Cobus van Eeden c7a9a01c94
Improve heap2 bounds checking (#224)
* Improve heap bounds checking in pvPortMalloc
2020-12-07 10:36:27 -08:00