8 commits

Author	SHA1	Message	Date
Richard Barry	f06a945444	Prepare for V7.3.0 release.	2012-10-16 12:17:47 +00:00
Richard Barry	e03ab659f3	Add tickless idle support in Cortex-M ports. ... Change CCS R4 directory name.	2012-10-16 07:55:40 +00:00
Richard Barry	c403e974ee	Update PIC32 port to make use of configUSE_PORT_OPTIMISED_TASK_SELECTION. ... Make small modification in GCC CM3 port when configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 to remove compiler warning.	2012-09-25 18:18:37 +00:00
Richard Barry	87f663a461	Correct #if( configMAX_PRIORITIES >= 32 ) check performed when configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 to instead be #if( configMAX_PRIORITIES > 32 ).	2012-09-24 12:10:08 +00:00
Richard Barry	92f1699055	Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers. ... Tested and updated a few Cortex-M projects to use configUSE_PORT_OPTIMISED_TASK_SELECTION set to 1.	2012-09-24 11:01:17 +00:00
Richard Barry	0c7af1c2d3	Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR.	2012-08-14 13:04:22 +00:00
Richard Barry	e0bab5981a	Prepare for V7.2.0 release.	2012-08-14 12:14:48 +00:00
Richard Barry	f508a5f653	Add FreeRTOS-Plus directory.	2012-08-11 21:34:11 +00:00

Renamed from Source/portable/GCC/ARM_CM3/portmacro.h (Browse further)