Gaurav Aggarwal
d449c8979d
Use the linker script variables for MPU setup for Keil Simulator Demo
...
Earlier we were using hard-coded addresses for MPU setup which
were ensured to be the same as linker script setup. This change
updates the Keil Simulator demo to use the variables exported
from the linker script. This ensures that the MPU setup does not
go out of sync with linker script.
2019-12-17 00:14:26 +00:00
Gaurav Aggarwal
66ce9f7d72
Move warning suppression for IAR compiler to portmacro.h for v8M ports
...
IAR produces some warnings which can not be fixed in the source code because
then other compilers start generating warnings. We suppressed those warnings
in the project file before. This change moves the warning suppression from
project files to portmacro.h.
2019-12-07 01:23:17 +00:00
Richard Barry
9491af1fd7
Fix bug when xQueueOverwrite() and xQueueOverwrite() from ISR are used to overwrite items in two queues that are part of the same set.
...
Minor queue optimisations.
2019-12-03 01:50:07 +00:00
Richard Barry
46e5937529
Remove guards against __ARMCC_VERSION version numbers that were previously used to avoid compiler warnings in some GCC ARM Cortex ports.
2019-11-21 22:35:21 +00:00
Richard Barry
d1fb8907ab
Add software timer to the Win32 blinky demo.
2019-11-18 17:35:40 +00:00
Richard Barry
07622ed3ee
Remove driver files that generate compiler warnings from the RISC-V_Renode_Emulator_SoftConsole project.
...
Update RISC-V ports so the interrupt stack is set to a known value before the scheduler is started if the interrupt stack is statically defined rather than re-using the main.c() stack.
2019-11-18 17:23:14 +00:00
Richard Barry
16639d2d63
Update to the latest atomic.h.
...
Improve commenting in RISC-V GCC port.
Fix IAR RISC-V port so the first task starts with interrupts enabled.
Add references to third party page ref using newlib with FreeRTOS into the tasks.c file in each place newlib is referenced.
Move the position of the traceTASK_DELETE() trace macro in case of use with a memory allocator that writes over freed memory even when inside a critical section.
Efficiency improvement: Make sure xTaskIncrementTick() does not return pdTRUE when the scheduler is locked. This just prevents an unnecessary yield interrupt (unnecessary as it is ignored) when xYieldPending happens to be pdTRUE.
2019-11-18 16:28:03 +00:00
Richard Barry
18916d5820
Rename the RISC-V_RV32_SiFive_Hifive1_GCC folder to RISC-V_RV32_SiFive_HiFive1_FreedomStudio as it is built with Freedom Studio.
2019-10-22 22:30:06 +00:00
Richard Barry
5306ba245d
Add nano-specs linker option to HiFive1_GCC demo.
2019-10-22 22:27:55 +00:00
Richard Barry
c0741e36ed
Fix spelling mistakes copied and pasted into a couple of RISC-V demo main.c files.
2019-10-22 16:31:57 +00:00
Richard Barry
fccc445865
Change version and license text in RISC-V_RV32_SiFive_HiFive1_GCC FreeRTOSConfig.h file.
2019-10-22 02:17:15 +00:00
Richard Barry
11c391dfb3
Tidy up main_full.c and change alignment of variable accesses in RegTest.S for the RISC-V_Renode_Emulator_SoftConsole demo.
2019-10-22 02:15:28 +00:00
Richard Barry
343fbe795f
Rework RISC-V QEMU example to use vanilla Eclipse in place of Freedom Studio. NOTE: RISC-V QEMU mtime interrupts are not generated consistently.
2019-10-22 02:03:15 +00:00
Richard Barry
ef31243396
Add some asserts into the common demo tasks to catch scenarios where the tasks are not being used but the part of the demo/test that gets called from the tick hook is called resultant in an access to objects that were not created.
2019-10-21 17:17:34 +00:00
Richard Barry
61a003088d
Update RISK-V GCC port to ensure the first task starts with interrupts enabled - previously its interrupts were only enabled after it yielded for the first time.
2019-10-21 04:16:32 +00:00
Richard Barry
a83244a37e
Add the miv-basic.resc reNode script into the RISC-V_Renode_Emulator_SoftConsole demo as it is no longer shipped with the Microsemi tools.
2019-10-17 20:39:40 +00:00
Richard Barry
c7c60cff15
Rename RISC-V-Qemu-sive_e_Freedom_Studio directory to RISC-V-Qemu-sifive_e-Eclipse-GCC as it is now using Vanilla Eclipse and vanilla GCC in place of Freedom Studio.
2019-10-16 04:31:57 +00:00
Richard Barry
f78ccd077a
Recreate the RISC-V-Qemu demo using Vanilla Eclipse in place of Freedom Studio as there is not a new Freedom Studio project that targets the HiFive1 board, and the updated Freedom Studio version didn't work with this project any more anyway.
2019-10-16 04:28:28 +00:00
Richard Barry
d435a7b62d
Move the call to traceTASK_DELETE() to before port portPRE_TASK_DELETE_HOOK() as in the Windows port portPRE_TASK_DELETE_HOOK() never returns.
2019-10-15 22:14:40 +00:00
Richard Barry
4922cff4ce
Add IAR demo for the SiFive RISC-V HiFive Rev B board.
2019-10-14 03:20:18 +00:00
Richard Barry
f6edf4adf9
Update the RegTest.S file used by several GCC RISC-V demos to ensure correct alignment of constant loads from assembly code.
2019-10-14 00:16:25 +00:00
Richard Barry
96e61a10a5
Tidy up the RISC-V_RV32_SiFive_HiFive1_GCC demo ready for its eventual release.
2019-10-14 00:04:53 +00:00
Richard Barry
d4216903d9
Added the "full" demo to the RISC-V_RV32_SiFive_HiFive1_GCC demo - backup check in only as still a work in progress.
2019-10-13 22:53:00 +00:00
Richard Barry
71d9450836
RIS-V_RV32_SiFive_HiFive1_GCC project now running the blinky demo - still a work in progress.
2019-10-11 02:59:13 +00:00
Richard Barry
dbac79045c
Formatting changes only.
2019-10-10 17:56:10 +00:00
Richard Barry
dbbebbfcbc
RISC-V-RV32_SiFive_HiFive1_GCC project is now also building the FreeRTOS kernel code - but not using it yet - still a work in progress.
2019-10-10 17:54:56 +00:00
Richard Barry
9bb072a2ab
Base project to replace existing Freedom Studio project using latest Freedom Studio project format - builds and executes but does not yet include RTOS code.
2019-10-09 04:50:11 +00:00
Richard Barry
fd118f1888
Minor formatting change in comment only.
2019-10-07 18:56:33 +00:00
Yuhui.Zheng
eb5c60c60b
Update FreeRTOS.h with the version in GitHub. This is also to test submodule.
2019-09-24 22:29:35 +00:00
Yuhui.Zheng
0fe36e497d
Nordic port. Notes for Richard -- the work items we discussed about for nrf52840-dk and Wiced_CY still remain. The only reason for this commit is we want to test out submodule.
2019-09-24 22:26:36 +00:00
Yuhui.Zheng
35bc9d7938
Revert 2728. Not because the files are still needed, but because we want to test out submodule.
...
Before further updating project files in GitHub, keeping an additional copy.
2019-09-24 22:19:54 +00:00
Yuhui.Zheng
f001126ea8
Wiced_CY port is not needed anymore. Use GCC/ARM_CRx_No_GIC instead.
2019-09-24 20:56:55 +00:00
Yuhui.Zheng
9052882500
Adding tickless hooks to GCC/ARM_CRx_No_GIC port.
2019-09-24 20:07:40 +00:00
Richard Barry
80c1cb5de1
Correct code comments that referred to taskYIELD_FROM_ISR to portYIELD_FROM_ISR.
...
Update RV32 port to use 16 byte-alignment all the time (only strictly necessary when using FLOP instructions).
2019-09-24 16:06:21 +00:00
Yuhui.Zheng
c217b68d38
sync from github to svn: this version of atomic.h does not have compiler specific symbols. compiler specific optimization is to be merged in each port/<compiler>/<arch> directory.
2019-09-23 16:51:03 +00:00
Yuhui.Zheng
6f958bbf80
sync from github to svn: Xtensa GCC as-is.
2019-09-20 22:09:21 +00:00
Yuhui.Zheng
1c5fcc7f05
sync from github to svn: Wiced_CY for AFR Cypress ports.
2019-09-20 20:52:30 +00:00
Yuhui.Zheng
74df636c78
sync from github to svn: documentation for RISC-V. This may be a temporary parking location.
2019-09-20 20:47:29 +00:00
Yuhui.Zheng
cc0aee651e
sync from github to svn: Renasas/RX100 #pragma _VECT()
2019-09-20 20:41:32 +00:00
Richard Barry
da3d370ff7
RISC-V port updates: The machine timer compare register can now be for any HART, and correct the sequence used to update the 64-bit machine timer compare register on 32-bit cores.
2019-09-04 15:46:45 +00:00
Richard Barry
96bad0f6c3
Minor bug fix in NTPDemo.c -> use of FREERTOS_INVALID_SOCKET in place of NULL.
...
Update trace recorder code to account for uxPendedTicks renaming to xPendedTicks.
2019-09-04 00:13:17 +00:00
Richard Barry
ab41d89285
Add IAR RISC-V port to SVN - a work in progress.
2019-09-03 01:39:29 +00:00
Yuhui Zheng
2b546b1984
Atollic project update for CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC, GCC port.
2019-08-30 00:18:41 +00:00
Richard Barry
973a4f9869
Correct alignment of stack top in RISC-V port when configISR_STACK_SIZE_WORDS is defined to a non zero value.
2019-08-27 15:57:45 +00:00
Richard Barry
7d285f3dcb
+ Moved the History.txt file from the website git repo into the source code SVN repo.
...
+ Added xTaskCatchUpTicks() which corrects the tick count value after the application code has held interrupts disabled for an extended period.
+ Updated the xTaskResumeAll() implementation so it uses the new xTaskCatchUpTicks() function mentioned above to unwind ticks that were pended while the scheduler was suspended.
+ Various maintenance on the message buffer, stream buffer and abort delay demos.
+ Change type of uxPendedTicks from UBaseType_t to TickType_t to ensure it has same type as variables it is compared to, and therefore also rename the variable xPendingTicks.
+ Correct spelling mistake within a comment that was common to all the ARMv7-M ports.
2019-08-25 19:35:59 +00:00
Richard Barry
72af51cd86
Starting point for IAR RISC-V project created some time ago - checking in now so it can be completed - currently work in progress.
2019-08-04 15:24:15 +00:00
Richard Barry
5352cb4f45
Tidy up Win32 port layer - include addition of new variable that prevents recursive attempts to obtain a mutex when the trace recorder is used inside an interrupt.
2019-08-04 01:14:43 +00:00
Gaurav Aggarwal
b1e35551c4
Update the FreeRTOS version number in task.h
2019-07-29 23:48:11 +00:00
Gaurav Aggarwal
6bad7d2055
Add the default definition of configPRECONDITION to FreeRTOS.h.
...
This is needed for CBMC proofs.
2019-07-27 23:03:23 +00:00
Richard Barry
b24ab46d39
Delete obsolete makefiles that were causing confusion from RISC-V-Qemu-sifive_e-FreedomStudio demo.
2019-07-25 20:11:37 +00:00
Richard Barry
fe4511b35e
Continued to work on the MQTT demo project.
...
A few review comments added into the MQTT implementation.
2019-07-24 00:27:14 +00:00
Richard Barry
17b18c8b7e
Reduce warning level in Visual Studio project as it generates lots of warnings in the library files.
2019-07-23 17:30:18 +00:00
Richard Barry
d1dd8da12e
Revert a couple of changes in Win32 demo that should not have been checked in.
2019-07-23 17:02:59 +00:00
Richard Barry
8bd1813446
Only partially implemented and may get reverted - updates to the Win32 port that uses a per-task event to prevent the task proceeding past its yield point if the SuspendThread() call used to stop the task does not take effect immediately. This is intended to fix issues reported by users, although we have been unable to replicate them ourselves.
2019-07-12 01:52:22 +00:00
Richard Barry
4d6570b009
Exercise the new vPortGetHeapStats() function from the Win32 demo projects.
2019-07-05 20:21:59 +00:00
Richard Barry
fa404422b9
Add link to dual core blog post into STM32H745I demo.
...
Doxygen corrections in list.h.
Use #error to check FreeRTOS.h is included before message_buffer.h and stream_buffer.h.
2019-07-04 21:18:36 +00:00
Richard Barry
246bb6e806
Add vPortGetHeapStats() function to query heap statistics.
2019-07-04 19:34:48 +00:00
Gaurav Aggarwal
7235743749
Only check once before re-setting ready priority
...
The macro taskRESET_READY_PRIORITY checks if the task being removed from the
ready list is the last one and only then resets the top ready priority
by calling portRESET_READY_PRIORITY. If we already know that it is the
last ready task being removed then there is no need to perform the check
again and the macro portRESET_READY_PRIORITY can be called directly. We were
doing the unnecessary check at two places and this commit fixes them.
This commit also increases the time period of check task to ensure that all
the demo tasks get a chance to run before the check is performed.
2019-07-03 00:08:16 +00:00
Gaurav Aggarwal
004e2b637e
Use ARMCM33_DSP_FP_TZ_config.txt which comes with the MDS installation
...
We had a copy of ARMCM33_DSP_FP_TZ_config.txt file within the project directory
and it used to get outdated with each release of MDK because of non-backward
compatible changes in MDK. This change removes the copy in the project and
instead uses the one shipped with the MDK installation.
2019-07-02 18:47:36 +00:00
Richard Barry
fb3eaeac40
Added additional xMessageBufferSpacesAvailable() (plural) to existing xMessageBufferSpaceAvailable() (singular) macro as the documentation muddled both.
...
Added #define portPOINTER_SIZE_TYPE uint64_t to the 64-bit RISC-V port layer.
2019-05-13 03:14:05 +00:00
Richard Barry
b51529a284
Update version number ready for next release.
2019-05-11 01:47:37 +00:00
Gaurav Aggarwal
9e10b08a3a
Delete the Release configuration from the NXP project.
...
Also, some cosmetic changes.
2019-05-11 00:53:34 +00:00
Richard Barry
db5d265c07
Removing obsolete code and files only.
2019-05-10 22:19:18 +00:00
Richard Barry
53cb12e389
Add M7/M4 AMP demo.
2019-05-10 18:25:10 +00:00
Gaurav Aggarwal
0b1a025789
Add NXP libs needed to build the project
2019-05-09 22:27:44 +00:00
Gaurav Aggarwal
aa9c8d2697
Delete the not needed file missed in last commit
2019-05-09 22:09:12 +00:00
Gaurav Aggarwal
b9e379951a
Do not strip required symbols when LTO is on
...
Link time optimization was stripping off some symbols which were
accessed from assembly code.
2019-05-09 22:04:29 +00:00
Gaurav Aggarwal
b6e5f96f0e
Ensure that fault handlers are declared naked.
2019-05-05 02:26:42 +00:00
Gaurav Aggarwal
2279a86566
Add ARMv8M demo project for NXP LPC55S69.
2019-05-05 02:15:55 +00:00
Gaurav Aggarwal
ae448fc952
Add Cortex M23 GCC and IAR ports. Add demo projects for Nuvoton NuMaker-PFM-2351.
2019-05-02 21:08:28 +00:00
Richard Barry
079d081346
Basic 64-bit RISC-V port now functional. RISC-V port layer automatically switches between 32-bit and 64-bit.
2019-04-29 00:57:14 +00:00
Richard Barry
27ca5c8341
Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM Cortex-M33 ports to assist with link time optimisation.
2019-04-25 19:49:50 +00:00
Richard Barry
84377442fc
Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM GCC ports to assist with link time optimisation.
2019-04-21 20:15:34 +00:00
Richard Barry
606845492b
Fix potential memory leak in the Win32 FreeRTOS+TCP network interface initialisation sequence.
...
Introduce portMEMORY_BARRIER() macro to assist with memory access ordering when suspending the scheduler if link time optimization is used.
2019-04-17 17:16:04 +00:00
Gaurav Aggarwal
dd9a9710c6
Export port architecture name for COrtex-M33. This can be used by debuggers to find the port in-use to be able to correctly decode the context stored on the stack.
2019-03-28 00:00:46 +00:00
Gaurav Aggarwal
ba39a958b5
Fix spelling of priority in comments.
2019-03-18 23:28:03 +00:00
Gaurav Aggarwal
12fb75be37
Fix warning portHAS_STACK_OVERFLOW_CHECKING not defined
...
portHAS_STACK_OVERFLOW_CHECKING was getting defined too late before
being used in portable.h for the platforms that do not have stack
overflow checking registers. This commit ensures that it is defined
before it is used.
2019-03-13 21:10:44 +00:00
Richard Barry
2265d70499
Correcting spelling mistakes in comments only.
2019-03-08 17:30:49 +00:00
Richard Barry
06596c3192
Prepare the RISC-V port layer for addition of 64-bit port.
2019-03-08 17:03:43 +00:00
Gaurav Aggarwal
5fe8465a35
Change type of usStackDepth to configSTACK_DEPTH_TYPE.
2019-02-21 03:25:30 +00:00
Gaurav Aggarwal
5623c69748
Fix Build and Links failure in MPU projects. Minor cosmetic changes in some V8M files.
2019-02-20 20:27:07 +00:00
Richard Barry
8b6ab5f197
Add instructions on building the Cortex-M33 secure and non secure projects into the comments of that project and into a readme.txt file.
...
Enable configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES setting to be used in statically allocated systems.
2019-02-20 17:55:59 +00:00
Gaurav Aggarwal
ceeff14524
Set default value of configRUN_FREERTOS_SECURE_ONLY to 0.
2019-02-20 00:40:46 +00:00
Gaurav Aggarwal
5849459c65
Add support for running FreeRTOS on Secure Side only in Cortex M33 port. Also, change spaces to tabs.
2019-02-20 00:25:45 +00:00
Richard Barry
c3c9c12ce2
Update the common demo death.c to use the updated macro name to give it a secure context.
2019-02-19 02:57:44 +00:00
Gaurav Aggarwal
ce576f3683
First Official Release of ARMV8M Support. This release removes Pre-Release from all the ARMv8M files licensees.
2019-02-19 02:30:32 +00:00
Richard Barry
58ba10eee8
Update version number in readiness for V10.2.0 release.
2019-02-17 22:36:16 +00:00
Gaurav Aggarwal
55ad3861c5
Sync the Renesas port to AFR Git Repo
2019-02-17 01:27:16 +00:00
Gaurav Aggarwal
0de2a2758a
Fix definition of tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE
...
tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE was not correctly defined resulting in
dynamically allocated TCB not being freed when MPU was enabled. This commit fixes
the definition to ensure that dynamically allocated RAM (Stack and TCB) is freed
always.
2019-02-17 01:24:58 +00:00
Gaurav Aggarwal
2c88fb7fa1
Fix build failure when dynamic allocation is not enabled.
...
When dynamic allocation is not enabled, vPortFree is not available. The current code used
vPortFree and this resulted in linker error. This commit removes the use of vPortFree when
dynamic allocation is not enabled.
2019-02-16 20:21:47 +00:00
Richard Barry
6844bef74f
Replace the pdf RISC-V documentation with links to the documentation web pages.
2019-02-16 01:15:33 +00:00
Richard Barry
b2b1b09ea5
Fix bug in core_cm3.c atomic macros.
...
Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
2019-02-16 01:08:38 +00:00
Richard Barry
3153131fa7
Add Dornerworks attribution to makefiles that build the Freedom Studio RISC-V project.
2019-02-12 02:43:28 +00:00
Richard Barry
7e08fd6d07
Add makefiles that build the FreedomStudio project (provided by Dornerworks - thanks).
2019-02-11 19:44:13 +00:00
Richard Barry
fb73829148
Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().
...
Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task.
Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.
2019-02-08 01:18:08 +00:00
Richard Barry
df5952f655
Add xTaskGetIdleRunTimeCounter() API function to return the run time stats counter for the idle task - useful for POSIX time implementations.
2019-01-21 23:39:48 +00:00
Gaurav Aggarwal
817783d75c
Copyright updates from Cadence.
...
e1df894752
2019-01-16 19:01:25 +00:00
Richard Barry
a4941ac5db
Update main.c() for the WIN32-MingW project so the trace recorder is initialized even when the simple blinky demo is used - otherwise the trace recorder causes an exception as it is used without first being initialized.
2019-01-07 19:40:13 +00:00
Richard Barry
80df5cd517
Update the pin mux setup on the Vega board demo to enable the LED.
2018-12-31 20:14:34 +00:00
Richard Barry
11d9c440b8
Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).
...
Add a project for the Vega board's RI5CY core.
2018-12-31 18:19:52 +00:00
