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111 commits

Author SHA1 Message Date
Richard Barry 4f59d550c6 Update to V6.0.2. 2010-01-09 14:31:39 +00:00
Richard Barry bf9b20e6b8 Change "SWI" to "SWI 0". 2010-01-08 14:25:12 +00:00
Richard Barry 9ec30de7f4 Update Cortex M3 ports to ensure 8 byte alignment. 2009-11-15 21:47:15 +00:00
Richard Barry db87c0ac06 Correct byte alignment on CM3 port layers. 2009-11-15 15:01:59 +00:00
Richard Barry a9625ce462 Change the function that sets up the initial stack on CM3 ports to account for the post decrement used by the MCU when it alters the stack on the way into/out of interrupts. 2009-11-14 19:02:12 +00:00
Richard Barry a75aec78ed Correct the auto reload value. 2009-10-15 11:57:49 +00:00
Richard Barry 11ed4d6fba Change to the file headers only. 2009-10-13 10:54:32 +00:00
Richard Barry 7dbf3304b3 Tidy up only. 2009-10-13 09:17:39 +00:00
Richard Barry e00afda1b1 Correct compiler warnings when a certain configuration is set in FreeRTOSConfig.h. 2009-10-13 09:12:30 +00:00
Richard Barry 9557f14233 Add missing cast where one of the static MPU blocks are configured. 2009-10-10 18:45:46 +00:00
Richard Barry 9c349886af Add clobber lists to inline asm code. 2009-10-06 08:48:34 +00:00
Richard Barry e90ba3e57f Add xPortGetFreeHeapSize() function. 2009-10-05 11:16:38 +00:00
Richard Barry 506dd1b7c8 Remove unnecessary use of portLONG, portCHAR and portSHORT. 
Change version number in headers.
 2009-10-05 09:46:11 +00:00
Richard Barry 26f0258688 Remove unnecessary use of portLONG, portCHAR and portSHORT. 2009-10-04 18:34:36 +00:00
Richard Barry ee5608ddc2 Tidy up, starting to get ready for next release. 2009-10-04 17:59:49 +00:00
Richard Barry d138104369 Reinstate privileged only RAM region when a task is running that does not otherwise make use of the MPU. 2009-10-03 19:56:09 +00:00
Richard Barry 2d958d3d2c Set ARM byte alignment to 8. 2009-09-29 19:58:05 +00:00
Richard Barry 4640196beb Add CM3 MPU port. 2009-09-28 14:23:45 +00:00
Richard Barry ed06a0400a Update to V5.4.2. See http://www.freertos.org/History.txt . 2009-08-09 19:10:57 +00:00
Richard Barry d2a9f9624b Rename Nios2 to NiosII. 2009-08-06 20:15:39 +00:00
Richard Barry 5d6acacd7a Correct spelling error in comment only. 2009-08-06 19:33:06 +00:00
Richard Barry 6358344ea1 Added new Nios2 port layer. 2009-08-06 18:23:40 +00:00
Richard Barry 3a883a776c Update to V5.4.1 2009-07-25 20:14:06 +00:00
Richard Barry f312118bf9 Ensure LPC1768 demos are correct prior to V5.4.0 release. 2009-07-12 19:00:28 +00:00
Richard Barry fdcc3676cd Update version number. 2009-07-07 09:41:29 +00:00
Richard Barry e36ece8d42 Add support for double precision floating point. 2009-06-30 19:24:32 +00:00
Richard Barry 09f991277e Add PPC440 port layer code. 2009-06-30 17:38:58 +00:00
Richard Barry 7818ed5a97 Prepare for V5.3.1 release. 2009-06-21 19:07:47 +00:00
Richard Barry 8f26ec2474 Replaced asm statements with __asm for building with CrossWorks V2. 2009-06-20 16:39:47 +00:00
Richard Barry 4bf5521db6 Prepare for V5.3.0 release. 2009-05-30 15:51:41 +00:00
Richard Barry 2f40ad7393 Ready for V5.2.0 release. 2009-03-14 19:20:12 +00:00
Richard Barry 52ba0e651e Update to V5.1.2. 2009-02-09 20:21:35 +00:00
Richard Barry d28eda8634 Ready for V5.1.1 release. 2008-11-20 16:10:46 +00:00
Richard Barry 758b1c7c59 Update ready for V5.1.0 release. 2008-10-24 18:07:39 +00:00
Richard Barry de519dd34e Update to allow low power mode to be used with the RTOS. 2008-10-19 18:52:04 +00:00
Richard Barry 799cccac42 Use the low force register. 2008-09-22 18:08:29 +00:00
Richard Barry 130e2f2c0a Prepare for V5.0.4 release. 2008-09-22 15:48:40 +00:00
Richard Barry 1d0cf84e80 Change the default vector used for context switching. 2008-09-22 13:48:45 +00:00
Richard Barry 3b34009b75 Tidy up. 2008-09-17 15:58:45 +00:00
Richard Barry 223bd9c75f BUG FIX: Changed 
*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
to
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
 2008-09-17 15:52:54 +00:00
Richard Barry aeea09e21e Minor changes only. 2008-08-14 11:07:50 +00:00
Richard Barry 6eec108bdd Ensure a yield cannot be pended simultaneously with a critical section being entered. 2008-08-14 11:04:54 +00:00
Richard Barry f68aab980d Interrupt nesting and cache support added. 2008-08-10 21:14:08 +00:00
Richard Barry 431d1c009d Update to allow interrupt nesting (not yet complete). 2008-08-08 15:52:41 +00:00
Richard Barry 181889d6b1 Basic demo up and running. 2008-08-08 12:50:22 +00:00
Richard Barry 4953c7d030 First task starting. 2008-08-08 09:41:33 +00:00
Richard Barry 35be76b9b7 Added function stubs. 2008-08-07 19:10:25 +00:00
Richard Barry 216fcb10c9 2008-08-07 19:03:24 +00:00
Richard Barry 5d60a388e0 2008-08-07 19:02:43 +00:00
Richard Barry 1c3c04f121 Prepare for V2 port. 2008-08-07 18:51:34 +00:00