* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Increase the memory for RVA23 compilation
* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Update the regtest to include fpu registers
* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Fix small issues for 64-bit configs
* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Enable FPU unit
* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Enable compilation for RVA23 platforms
* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Fix copyright related CI issues
* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Update submodule manifest
* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Update a few typos and left overs
* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Apply @aggarg's sugestions
* Update pointer to Freertos-Kernel
The line 'Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.'
used to have two spaces between the first and second sentences.
This would cause the header check to fail due to the copyright regex located
ab999f9624/.github/scripts/core_checker.py (L396)
1. miss debug info in assembly code
RISC-V-spike-htif_GCC
LDFLAGS add arch and abi info for linker
for riscv64-unknown-elf multilib, if there is no arch and abi
info, will link to default lib and have below error
target emulation `elf32-littleriscv' does not match `elf64-littleriscv'
use CFLAGS to replace ASFLAGS when compile assembly code
because DEBUG flag is added in CFLAGS, if we use ASFLAGS to compile
assembly code, there is no debug info in assembly code objfile
2. binutils 2.39 ld warn 'has a LOAD segment with RWX permissions'
RISC-V-Qemu-virt_GCC
RISC-V-spike-htif_GCC
RISC-V_RV32_QEMU_VIRT_GCC
3. fix build fail
RISC-V_RV32_QEMU_VIRT_GCC
Signed-off-by: Eric Chan <e14002270@gmail.com>
I get a build error when this is not set as it (or
configGENERATE_RUN_TIME_STATS) are required when using
configUSE_STATS_FORMATTING_FUNCTIONS
Signed-off-by: Keith Packard <keithpac@amazon.com>
1. add INCLUDE_xTaskGetCurrentTaskHandle for stream_buffer use
2. LDFLAGS add arch and abi info for linker
for riscv64-unknown-elf multilib, if there is no arch and abi
info, will link to default lib and have below error
target emulation `elf32-littleriscv' does not match `elf64-littleriscv'
3. use CFLAGS to replace ASFLAGS when compile assembly code
because DEBUG flag is added in CFLAGS, if we use ASFLAGS to compile
assembly code, there is no debug info in assembly code objfile
Signed-off-by: Eric Chan <e14002270@gmail.com>
* Simple blinky demo working. Not tried full demo yet.
* Get the full demo running.
* Add Eclipse project to build the RISC-V_RV32_QEMU_VIRT_GCC gcc makefile.
* Add regtest tasks to the RISC-V_RV32_QEMU_VIRT_GCC demo.
* Update priority of the timer task.
* Adjust timer frequency and optimisation level before committing prior to rearranging the Eclipse project.
* Reorganise Eclipse project slightly.
* Add note to the RISC-V-Qemu-virt_GCC readme file about the updated version in RISC-V_RV32_QEMU_VIRT_GCC.
* Update headers in newly added source files so they pass the automated header check.
* Update lexicon to pass automated spell check.
Co-authored-by: none <>
