Richard Barry
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a8836b5c43
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Change version numbers ready for V8.0.0 release candidate 1 tag.
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2013-12-31 20:10:09 +00:00 |
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Richard Barry
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0d1e12522b
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Update Cortex-M3 and Cortex-M4F ports to allow the SysTick to be clocked at a different speed than the system clock (as is done in the recent STM32L demo. ).
Add additional asserts and isb instructions into the Cortex-M3 and Cortex-M4F ports.
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2013-12-12 14:07:20 +00:00 |
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Richard Barry
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0cd79ad81d
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Change version numbers in preparation for V7.6.0 release.
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2013-11-08 11:47:35 +00:00 |
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Richard Barry
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a12ea2d212
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Update FreeRTOS version number to V7.5.3
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
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2013-10-14 19:56:47 +00:00 |
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Richard Barry
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2f754d9b0c
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Add additional critical section to the default tickless implementations.
Update version number for maintenance release.
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2013-07-24 09:45:17 +00:00 |
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Richard Barry
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3cbe0a724d
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Update version number.
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2013-07-23 10:51:45 +00:00 |
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Richard Barry
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7d6758ee1a
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Minor updates and change version number for V7.5.0 release.
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2013-07-17 18:32:57 +00:00 |
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Richard Barry
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96ceae8edd
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Update version number ready to release the FAT file system demo.
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2013-04-30 21:42:41 +00:00 |
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Richard Barry
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f9918345e1
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Update version numbers to V7.4.1.
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2013-04-18 12:58:17 +00:00 |
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Richard Barry
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a5d0e3f0c1
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Prepare for V7.4.0 release.
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2013-02-19 18:36:58 +00:00 |
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Richard Barry
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f06a945444
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Prepare for V7.3.0 release.
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2012-10-16 12:17:47 +00:00 |
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Richard Barry
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e03ab659f3
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Add tickless idle support in Cortex-M ports.
Change CCS R4 directory name.
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2012-10-16 07:55:40 +00:00 |
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Richard Barry
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0c7af1c2d3
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Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR.
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2012-08-14 13:04:22 +00:00 |
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Richard Barry
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e0bab5981a
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Prepare for V7.2.0 release.
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2012-08-14 12:14:48 +00:00 |
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Richard Barry
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f508a5f653
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Add FreeRTOS-Plus directory.
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2012-08-11 21:34:11 +00:00 |
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