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337 commits

Author SHA1 Message Date
Richard Barry b4b4f306c2 In files added a few moments ago: 
+ Correct version number in comments at top of file.
+ Correct path in batch file.
 2012-01-21 19:01:04 +00:00
Richard Barry 7427c0eff2 Move the CM0 files to their correct location and remove from their temporary demo project home. 2012-01-21 18:46:08 +00:00
Richard Barry 29c9a63c41 Add a few lines to the RX ports that allow the vector to be installed when the FreeRTOS code is built as a library. 2012-01-13 16:41:42 +00:00
Richard Barry e3276fc282 Change version numbers to V7.1.0. 2011-12-13 16:24:24 +00:00
Richard Barry 7db04b1820 Add two Cortex-M4F port layers. 2011-12-08 10:49:21 +00:00
Richard Barry c92a2fe47e Add proper copyright notice in headers to files where is was mistakenly missing. 2011-12-02 08:05:14 +00:00
Richard Barry abb476db24 Formatting changes only in TriCore porttrap.c. 2011-11-22 13:35:26 +00:00
Richard Barry 63cab86cc7 Remove debug code from the TriCore port.c file. 2011-11-22 13:27:17 +00:00
Richard Barry b89f1a729a Latest TriCore port files - these still contain some debug code, and are not yet fully documented. 2011-11-17 11:16:21 +00:00
Richard Barry 188128f788 Added the portALIGNMENT_ASSERT_pxCurrentTCB macro. 
Updated the TriCore port layer so its compare match setup does not effect any other compare match bits.
 2011-10-28 11:50:00 +00:00
Richard Barry 41ef155824 Update TriCore GCC port layer. 2011-10-27 10:44:31 +00:00
Richard Barry 70cfbda2e8 Minor changes to the TriCore port made during test/validation. 2011-10-24 12:30:35 +00:00
Richard Barry 45fe448d73 First commit with TriCore port and demo - still a work in progress. 2011-10-17 13:17:58 +00:00
Richard Barry cc61126025 Update headers for the FreeRTOS V7.0.2 release. 2011-09-20 18:22:39 +00:00
Richard Barry 03e2338deb Add warnings about mixing untested memory models in the RL78 port. 2011-09-09 20:37:50 +00:00
Richard Barry d500594b8a Tidy up the RL78 port layer. 2011-09-09 18:52:30 +00:00
Richard Barry 573497fbe0 Tidy up the RL78 port layer. 2011-09-09 16:18:57 +00:00
Richard Barry 476a87dfdc Ready the RL78 port for release. 2011-09-09 12:37:07 +00:00
Richard Barry 80341af3f5 Complete the RL78 demo. main.c still requires documentation in the comments at the top of the file. 2011-09-09 10:10:01 +00:00
Richard Barry de3807389a Add RL78 port layer. Note yet complete. 2011-09-06 16:08:38 +00:00
Richard Barry 11cd605be7 Added RX200 port layer. 2011-09-02 18:31:56 +00:00
Richard Barry 1baa62e424 Remove redundant bit being set in the status register of the PIC32. 2011-08-28 13:07:54 +00:00
Richard Barry 3a4d907c64 Modify the stack set up when ARM7/9 tasks are created to ensure the assert() calls in xTaskCreate() don't fail. In this case, the assert that would fail is actually redundant anyway, but should not be removed as it might not be redundant in all ports. 2011-08-28 13:06:11 +00:00
Richard Barry 98860dee6a Remove obsolete comment. 2011-08-27 19:12:45 +00:00
Richard Barry 3a25b5f33b Update the names of some of the newly introduced API functions so they are more consistent with the names of pre-existing API functions. 2011-08-07 10:22:57 +00:00
Richard Barry a548ef34f8 Remove vTaskCleanUpResources() calls. 2011-08-01 08:07:44 +00:00
Richard Barry 4154b31454 Move new MicroBlaze V8 port from the project directory into its correct location in the directory structure. 2011-07-27 13:03:14 +00:00
Richard Barry fe6284e807 Update PIC32 asm code ready for MPLAB compiler V2. 2011-07-25 15:35:54 +00:00
Richard Barry f5a6b610e1 Update version number to V7.0.1. 2011-05-13 18:31:12 +00:00
Richard Barry 1f452ffdc3 Move the ehb instruction in the PIC32/MPLAB port layer. 2011-05-13 10:42:16 +00:00
Richard Barry 5fbf3ab27e Change the RX62N port layer to allow it to be used with the V1.0.2 of the Renesas compiler. 2011-04-23 15:36:10 +00:00
Richard Barry 505bee983c Ensure byte alignment is maintained in PIC32 port layer when 8 byte alignment is required (basically, when printing out 8 byte data types). 2011-04-13 15:59:17 +00:00
Richard Barry 89bf1cf24f Update headers for Version 7.0.0 release. 2011-04-08 18:30:58 +00:00
Richard Barry 8fc0c27ea5 Ensure that the configMAX_SYSCALL_INTERRUPT_PRIORITY setting works with all possible values. 2011-04-05 09:45:42 +00:00
Richard Barry d8bab825bc Add a portNOP() implementation and relax the stack alignment requirements in the IAR MSP430X port layer. 2011-03-26 19:07:38 +00:00
Richard Barry 329c36c6bc Update the MSP430X CCS4 port layer. 2011-03-12 14:59:44 +00:00
Richard Barry 3f10f92340 Correct the configUSE_16_BIT_TICKS usage in the Win32 simulator port layer. 2011-02-28 16:12:55 +00:00
Richard Barry 95b2901ba6 Correct the configUSE_16_BIT_TICKS usage in the GCC Coldfire port layer. 2011-02-28 16:11:26 +00:00
Richard Barry 58a700b8f7 WIN32 simulator port: Allow the configTICK_RATE_HZ to be increased without making the sleep time in the simulated timer peripheral too small. 2011-02-14 13:49:50 +00:00
Richard Barry a5820e2b2a Make changes required for MISRA 2004 compliance. 2011-02-06 18:47:57 +00:00
Richard Barry 14472a9499 Set the software interrupt priority to use configKERNEL_INTERRUPT_PRIORITY rather than being hard coded to 1. 2011-01-29 15:42:51 +00:00
Richard Barry c679af3ba8 Update the MSP430X/IAR port layer to support the medium data model. 2011-01-18 20:33:35 +00:00
Richard Barry 96ab89d253 Update to V6.1.1 2011-01-14 20:22:24 +00:00
Richard Barry 411364dab6 Add the .align, .asmfunc and .endasmfunc directives to the CCS MSP430X port layer. 2011-01-13 10:36:42 +00:00
Richard Barry 749edf57e7 Make the tick ISR entry function use the __raw attribute in the IAR MSP430X port layer. 2011-01-13 10:28:40 +00:00
Richard Barry 1b04552233 Make use of the EVEN assembler directive in the IAR MSP430X port layer. 2011-01-12 10:00:13 +00:00
Richard Barry e4f2ba1913 Introduce option that permits a smaller printf() library to be used when sizeof( int ) == sizeof( long ) in cases where formatted strings are used to present run time stats information. 2011-01-06 11:10:51 +00:00
Richard Barry 17e1e7dfd3 A little extra commenting added to the Cortex M3 port layers. 2011-01-05 13:36:35 +00:00
Richard Barry 20ddcce965 Allow the MSP430X IAR port layer to skip pre-loading all register values for created tasks. 2011-01-04 14:32:52 +00:00
Richard Barry 9a24d4a37f Convert the CCS4 MSP430X port layer to permit large and small data models, and large and small code models. 2011-01-03 16:48:59 +00:00