8 commits

Author	SHA1	Message	Date
Richard Barry	c296e2cff8	Improvements to the Cortex-M ports: ... - Clear the SysTick current value register before starting the SysTick (only required if something uses SysTick before starting the scheduler). - Ensure atomic operations are thread safe by executing clrex in the context switch.	2016-06-27 13:13:05 +00:00
Richard Barry	2bd7884ace	Prepare for V9.0.0 release: ... + Change version number from V9.0.0rc2 to V9.0.0.	2016-05-20 18:05:46 +00:00
Richard Barry	07ac1399ee	Update version number to 9.0.0rc2.	2016-03-30 12:20:36 +00:00
Richard Barry	d3ba0aa98d	Update version number ready for version 9 release candidate 1.	2016-02-18 17:11:14 +00:00
Richard Barry	825b43a188	Update version number ready for the V8.2.3 release.	2015-10-16 14:57:00 +00:00
Richard Barry	99d4f2c454	Update version numbers in preparation for new release.	2015-08-05 12:59:42 +00:00
Richard Barry	693d0520bc	Update version number ready for V8.2.1 release.	2015-03-21 21:03:42 +00:00
Richard Barry	63b3c773d5	Kernel changes: ... Exclude the entire croutine.c file when configUSE_CO_ROUTINES is 0. New ports: Added Cortex-M7 IAR and Keil port layers that include a minor errata workaround r0p1 Cortex-M7 devices. Added Cortex-M4F port layer for CCS. New demo applications: Added demo application for STM32F7. Added demo application for SAMv71.	2015-03-21 14:01:43 +00:00