Commit graph

142 commits

Author SHA1 Message Date
Rahul Kar be13ec9820 Dummy check 2025-06-05 10:10:02 +00:00
Rahul Kar 2dffbbe874 Add verbose logs 2025-06-05 10:03:30 +00:00
Rahul Kar b5c643aad8 Revert to expected MD5 to see if check passes 2025-06-05 09:41:33 +00:00
Rahul Kar e0a2dcd41e Update yml file to trigger coverity scan 2025-06-05 09:39:24 +00:00
Rahul Kar 5ba917c3da Test to check failure path in MD5 checksum validation in coverity 2025-06-05 09:23:16 +00:00
Rahul Kar a74129b0e1 Add MD5 checksum verification 2025-06-04 11:57:28 +00:00
Gaurav Aggarwal fb4cd82c7b Explicitly specify output filename
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2025-06-02 07:18:03 +00:00
Rahul Kar 92f56163b9 Fix curl command 2025-05-26 10:21:46 +00:00
Rahul Kar f3bc128225 Fix lowercase letter in the curl command 2025-05-26 09:53:31 +00:00
Rahul Kar 53fcf8fd04 Fix download location 2025-05-26 09:12:00 +00:00
Rahul Kar 41589fe87e Update curl command to download in a non user accessible folder 2025-05-26 07:01:56 +00:00
Archit Gupta 03dc002c9b
Remove formatting bot workflow (#1274) 2025-05-09 14:09:08 -07:00
Mario Luzeiro 4ee6a1f22f
MPLAB PIC32MZ-EF - Adds an assert to catch register overflow (#1265) (#1267)
Add an assert to catch register overflow (#1265)
2025-04-25 17:05:15 +05:30
Jonathan Cubides 0030d609a4
Add support for Vector context save support on RISC-V (#1260)
port: riscv: Add vector context save support
2025-03-27 15:22:22 +05:30
Jonathan Cubides 4d9cd906d3
RISCV Add FPU context save (#1250)
* port: riscv: Split the number of registers and the size of the context

* port: riscv: Create some macros for the FPU context

* port: riscv: Add a couple of macros that store fpu context

* port: riscv: Update the stack init function to include the fpu context size

* port: riscv: Add a chip_specific_extensions file that includes the F extension

* Update dictionary to include some risc-v instructions

* port: riscv: Fix a few typos

* port: riscv: Apply @aggarg's sugestions
2025-03-06 10:34:48 -08:00
Gaurav-Aggarwal-AWS 11d0caa614
Fix the context array size for MPU ports (#1230)
Fix the context array size for MPU ports

Ensure the saved context location falls within the reserved context area
rather than overlapping with the next MPU_SETTINGS structure member.

This never caused a problem because actual read/write operations
start from one word before the saved context location.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2025-01-25 13:34:03 +05:30
John Boiles a58579681c
POSIX Simulator: Remove unused __APPLE__ mach_vm.h include (#1225)
Remove unused __APPLE__ mach_vm.h include
2025-01-21 14:20:16 +05:30
Ahmed Ismail 78e0cc778a
ARMv8.1-M: Add task dedicated PAC key support (#1195)
armv8.1-m: Add task dedicated PAC key

To harden the security, each task is assigned a dedicated PAC key, so that attackers needs to guess the all the tasks' PAC keys right to exploit the system using Return Oriented Programming.

The kernel is now updated to support the following:
* A PAC key set with a random number generated and is saved in the task's context when a task is created.
* As part of scheduling, the task's PAC key is stored/restored to/from the task's context when a task is unscheduled/scheduled from/to run.

stack-overflow-check: Introduce portGET_CURRENT_TOP_OF_STACK macro

When MPU wrapper v2 is used, the task's context is stored in TCB and `pxTopOfStack`` member of TCB points to the context location in TCB. We, therefore, need to read PSP to find the task's current top of stack.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
2025-01-14 10:50:52 +05:30
Rahul Kar b58005a4da
Add macro guard configUSE_MPU_WRAPPERS_V1 to remove definition missing warning. (#1208)
Add macro guard to removed definition missing warning
2024-12-16 18:26:43 +05:30
Kody Stribrny 974351fe4a
Update manifest to use 'V' (#1201)
Release tags use a capitalized V.
Our manifest tag is used by our SBOM
script to generate the URL and so
this needs to be capitalized to generate
a valid URL.
2024-12-02 11:29:36 -08:00
ActoryOu 445336aad9
Follow GitHub recommendation to update release.yml (#1178)
GitHub recommends to store user inputs in environments variables
and then use them in scripts. This PR updates the code as per the
GitHub recommendation.

Details here - https://docs.github.com/en/actions/security-for-github-actions/security-guides/security-hardening-for-github-actions#understanding-the-risk-of-script-injections.
2024-11-04 14:53:28 +05:30
Ahmed Ismail 7081e76f5a
Armv8.1-m: Add pacbti support (#1147)
* copyright-checker: Add FreeRTOS Arm collab copyright

FreeRTOS Arm collab files shall have both Amazon's
and Arm's copyright headers. Hence, the copyright
checker is modified to check for both copyrights.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* armv8-m: Add support for IAR with TFM FREERTOS PORT

As the case for ARMClang, and GCC toolchains, IAR
with TFM FreeRTOS Port support is added.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>

* armv8-m: Do not overwrite Control register value

The current ARMv8-M FreeRTOS-Kernel Port code
implementation is modified in a way that allows
the CONTROL register's value to be retained
rather than being overwritten.

This is needed for adding PACBTI support as
the special-purpose CONTROL register `PAC_EN`,
`UPAC_EN`, `BTI_EN`, and `UBTI_EN` PACBTI
enablement bits should be configured before calling
`vRestoreContextOfFirstTask()` function which currently
overwrite the value inside the CONTROL register.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>

* armv8.1-m: Add PACBTI support to kernel non-secure implementation

In this commit, Pointer Authentication, and Branch Target
Identification Extension (PACBTI) support is added for
Non-Secure and Non-TrustZone variants of Cortex-M85
FreeRTOS-Kernel Port.

The PACBTI support is added for Arm Compiler For
Embedded, and IAR toolchains only. The support in
the kernel is not yet enabled for GNU toolchain
due to known issues.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>

* Fix CI check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
Co-authored-by: Ahmed Ismail <ahmism01@e133373.arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-10-24 11:55:16 +05:30
Tony Josi e400cc93b7
Update .github/CODEOWNERS (#1162) 2024-10-22 18:16:46 +05:30
Guilherme Giácomo Simões e81ad46b0e
refactor: change methods ENTER|EXIT critical (#1140)
refactor: change methods ENTER|EXIT critical

The read and write of BaseType_t are atomic for a number of ports
and therefore, do not require taskENTER_CRITICAL/taskEXIT_CRITICAL.
This PR introduces portBASE_TYPE_ENTER_CRITICAL and
portBASE_TYPE_EXIT_CRITICAL which default to  taskENTER_CRITICAL
and taskEXIT_CRITICAL. The APIs that read/write BaseType_t are updated
to use these new macros. 

The next change would to be to define portBASE_TYPE_ENTER_CRITICAL and
portBASE_TYPE_EXIT_CRITICAL to nothing for ports where BaseType_t 
read and write are atomic.

Signed-off-by: guilherme giacomo simoes <trintaeoitogc@gmail.com>
2024-10-07 10:37:50 +05:30
Gaurav-Aggarwal-AWS 40031cfc4c
Update upload-artifact GH action's version (#1145)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-09-11 11:36:58 +05:30
Trong Nguyen da3c35aa48
Add CC-RH port for Renesas F1Kx devices (#1100)
Add CC-RH port for Renesas F1Kx devices
2024-08-09 11:21:21 +05:30
Gaurav-Aggarwal-AWS 663eaad1b2
Update link in third_party_tools.md (#1090)
Update the link to the getting started guide for Code Sonar.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
2024-06-12 13:43:43 +05:30
Gaurav-Aggarwal-AWS 11174fb860
Add a list of third party tools (#1080)
* Add a list of third party tools

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-06-07 11:50:56 +05:30
chinglee-iot fdf4695c1e
Adding SMP coverity example (#1039)
* Adding SMP coverity example

* Add coverity scan flow

* Fix format

* Update README.md

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-04-19 10:18:00 +05:30
Soren Ptak 52ee9faa72
Add in CI-CD builds of the Cortex-Rx MPU Demos (#1018) 2024-03-29 11:07:38 +05:30
Soren Ptak 7c910499ec
Update checkout action used in workflow files (#1017)
* Use the latest tagged release of the checkout action.
* Cleanup some of the echo group prints in the workflow files
2024-03-28 10:47:34 -07:00
Soren Ptak 345a86d49b
ARM CM0+ MPU Port (#1005)
* Add MPU Support to the ARM CM0+ GCC Port.
* Co-authored by @aggarg
2024-03-26 13:25:07 -07:00
Soren Ptak 61111b1460
Add ARMv7-R MPU Port (#938)
* Apply git review patch created by @aggargr
* Add necessary changes to the CMakeLists.txt file to build the port
2024-02-26 11:01:25 -08:00
Soren Ptak 839ccb719b
Use Regex for Copyright Year in Header Check (#1002) 2024-02-26 09:26:42 -08:00
Soren Ptak b1ee2e6e14
Fix MacOS Posix port (#957)
PR #914 caused Posix Port to fail to build on MacOS. This PR fixes
teh build failure.

This PR also adds a Matrix configuration to the GitHub kernel-demo
workflow to build the Posix Demos on MacOS.
---------

Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-01-28 18:41:03 +05:30
Mubin Sayyed 5040a67939
Sync up MicroblazeV9 port with Xilinx tree (#220)
* MicroblazeV9: Add support for 64 bit microblaze
* MicroblazeV9: Add support for generation of run time task stats
* MicroblazeV9: Add default implementation for callback functions
---------
Signed-off-by: Mubin Usman Sayyed <mubin.usman.sayyed@xilinx.com>
2024-01-25 22:21:44 -05:00
Soren Ptak 460e953076
Add new common words to the cSpellWordList.txt (#946) 2024-01-08 11:58:18 +05:30
chinglee-iot be880a1fc8
Fix portSET_INTERRUPT_MASK_FROM_ISR definition for atomic operation (#940)
* Introduce portHAS_NESTED_INTERRUPTS to identify if port has nested interrupt or not.
* Update atomic.h to use portHAS_NESTED_INTERRUPTS instead of portSET_INTERRUPT_MASK_FROM_ISR definition.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: ActoryOu <jay2002824@gmail.com>
2024-01-03 15:47:05 +08:00
Rahul Kar b0439d3283
Rename sample configuration to template configuration (#927)
* Rename sample configuration to template configuration

* Rename sample configuration to template configuration in cmake example file
2023-12-18 10:43:08 +05:30
chinglee-iot e0bb21f832
Remove the sample smp configuration folder (#922)
* Remove the sample smp configuration folder
2023-12-13 13:41:29 +05:30
chinglee-iot 5dbfd380f0
Add coverity example (#870)
* Add coverity example

* Update for CI

* Fix for CI 2

* Update kernel_misra.config

* Rename coverity example to coverity

* Update FreeRTOSConfig.h for coverity project

* Update MISRA.md

* Move coverity config to coverity_misra.config

* Update coverity misra config

* Add README.md file

* Update FreeRTOSConfig.h for coverity

* Fix uncrustify and spell

* Update README.md for relative link path

Update README.md for relative link path

* Update README.md for relative link 2

* Update MISRA.md for relateive path

* Fix for format

* Update coverity_misra.config

* Update configuration folder

* Update README.md for link

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-12-08 00:54:20 +05:30
chinglee-iot c0ce725293
Add SMP template port and example (#900)
* Add SMP template port and example
* Add readme file for smp configuration
* Update SMP build flow and add CI build

---------

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2023-12-04 10:49:41 +08:00
Rahul Kar a2a4485ed3
Coverity Report Directory Fix (#909)
* Revert "The curl command to send the report expects the tar file to be in its current directory. The step either needed to have the working-directory: set to the build directory, or the tar file needs to be created in the parent directory. (#903)"

This reverts commit 76f3aa5b05.

* Update to separate build and upload steps

---------

Co-authored-by: tony-josi-aws <tonyjosi@amazon.com>
2023-11-28 19:16:15 +05:30
Soren Ptak 76f3aa5b05
The curl command to send the report expects the tar file to be in its current directory. The step either needed to have the working-directory: set to the build directory, or the tar file needs to be created in the parent directory. (#903)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-28 10:38:57 +05:30
Tony Josi 61f35dc6b1
Coverity scan and upload in single step (#902) 2023-11-27 09:20:41 +05:30
Soren Ptak 09c4c4bae9
Coverity Scan Workflow Fix (#891)
Currently the Coverity Scan attempts to run on every fork that pulls
the file. This leads to anybody who pulls this file getting emails that 
their workflow failed to run when the cron job attempts to run. This
PR sets the scan to only run if the repo is FreeRTOS/FreeRTOS-Kernel.
Also, change the scan from a cron job to a job that runs on a commit
to mainline, or if triggered manually.
2023-11-23 22:17:31 +05:30
Soren Ptak ad13a1f8df
CI-CD URL Check Change (#880)
* Remove the Kernel's custom URL check to just use the CI-CD Actions one
* Exclude portable directory from formatting check.
2023-11-09 15:00:06 -08:00
ActoryOu ef0104e768
Move cmake compile options to the example project (#872)
* Move GCC compile option to GCC folder with toolchain option

* Add CI flow to build cmake example

* Fix CI

* formatting && enable Werror

* Add useless variable to test CI

* revert useless variable

* Add comments as examples.

* Remove default compile options.

* Formatting

* Remove compile option in kernel cmake and put the sample in examples/cmake_example

---------

Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2023-10-30 08:35:42 -07:00
Tony Josi 1c465a0890
update coverity scan email (#871) 2023-10-30 18:19:29 +05:30
Tony Josi 5281427a99
Add nightly coverity scan (#859)
* coverity scan job

* coverity scan badge in readme

* Update cron schedule

* revert adding badge

* update description

* updating review feedback
2023-10-26 11:27:45 +05:30