Richard Barry
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b2b1b09ea5
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Fix bug in core_cm3.c atomic macros.
Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
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2019-02-16 01:08:38 +00:00 |
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Richard Barry
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11d9c440b8
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Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).
Add a project for the Vega board's RI5CY core.
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2018-12-31 18:19:52 +00:00 |
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Richard Barry
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4b9dd38d1c
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Backup checking of the Freedom Studio RISC-V project - still a work in progress.
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2018-12-04 01:25:53 +00:00 |
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Richard Barry
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d0ef322b13
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Add kernel code to the RISC-V-Qemu-sifive_e-FreedomStudio demo.
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2018-11-24 04:42:20 +00:00 |
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Richard Barry
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f7102f2342
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Add a starting point for a Freedom Studio Risc V project.
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2018-11-24 03:48:55 +00:00 |
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