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Author SHA1 Message Date
Richard Barry e12614df23 Change to use interrupt priority definitions that use shifted values from 0 to 7, rather than the full numeric value. 2008-09-24 13:08:28 +00:00
Richard Barry b6690dfc9a Switch from post increment to pre increment on values sent to queues. This allows the test to execute on systems where interrupt level critical sections cannot nest. 2008-09-24 13:06:39 +00:00
Richard Barry 603ec6a42b Change the force register from low to heigh. 2008-09-22 18:10:28 +00:00
Richard Barry 799cccac42 Use the low force register. 2008-09-22 18:08:29 +00:00
Richard Barry 130e2f2c0a Prepare for V5.0.4 release. 2008-09-22 15:48:40 +00:00
Richard Barry 1d0cf84e80 Change the default vector used for context switching. 2008-09-22 13:48:45 +00:00
Richard Barry 36471ef3e8 Change init value for a variable that was generating compiler warnings on one of the more pedantic compilers. 2008-09-22 13:44:31 +00:00
Richard Barry c3a33e5e7c Improve example code for xTaskCreate(). 2008-09-22 13:43:07 +00:00
Richard Barry 10edc1088a Added extra compiler specific structure packing options. 2008-09-22 13:18:08 +00:00
Richard Barry aa2ffbfde5 Added extra compiler specific structure packing options. 2008-09-22 13:16:59 +00:00
Richard Barry d6ec78a568 Added extra compiler specific options. 2008-09-22 13:14:05 +00:00
Richard Barry ed240e58a1 Add assert required for linking. 2008-09-22 13:13:03 +00:00
Richard Barry 9d1ab2c90b Change default vector number to 16. 2008-09-22 13:11:32 +00:00
Richard Barry aa7485ab0f BUG FIX: Changed 
*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
to
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
 2008-09-17 16:04:31 +00:00
Richard Barry a91d3d8afe Note to users only. 2008-09-17 16:03:42 +00:00
Richard Barry f8abff1e04 BUG FIX: Changed 
*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
to
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
 2008-09-17 16:01:56 +00:00
Richard Barry 3b34009b75 Tidy up. 2008-09-17 15:58:45 +00:00
Richard Barry 223bd9c75f BUG FIX: Changed 
*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
to
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
 2008-09-17 15:52:54 +00:00
Richard Barry 8e264c901e Added dummy header files to allow the Cortex uIP demo to compile. 2008-09-01 13:20:52 +00:00
Richard Barry 172114c49f Added a #error line to check that FreeRTOS.h is included before one of the subordinate header files. 2008-09-01 08:18:50 +00:00
Richard Barry cb12d3a973 Added CodeWarrior definitions. 2008-09-01 08:08:44 +00:00
Richard Barry 0a8889d62b Change comments only. 2008-08-27 07:47:55 +00:00
Richard Barry a36ef26b0c Add bracket where appropriate. 2008-08-15 15:59:42 +00:00
Richard Barry 8f33ce9c30 Use correct counter in reg test 2 task. 2008-08-14 13:59:59 +00:00
Richard Barry 4c0c3038cc Add cleaned up eclipse workspace. 2008-08-14 13:28:18 +00:00
Richard Barry 049459af87 Add URL to configuration pages on FreeRTOS.org site. 2008-08-14 13:19:20 +00:00
Richard Barry 5d83f61228 Documentation only. 2008-08-14 12:57:30 +00:00
Richard Barry 54dbbc3cdf Documentation only. 2008-08-14 12:55:54 +00:00
Richard Barry be92c862be Minor mods only. 2008-08-14 11:13:34 +00:00
Richard Barry 9c2512f54e Permit no more than two simultaneous occurrences of interrupts adding everything to queues instead of tasks. 2008-08-14 11:10:46 +00:00
Richard Barry 5116051604 Remove initialisation of xQueueRegistry. 2008-08-14 11:09:26 +00:00
Richard Barry e5d85bc87e Correct version number. 2008-08-14 11:08:36 +00:00
Richard Barry aeea09e21e Minor changes only. 2008-08-14 11:07:50 +00:00
Richard Barry 6eec108bdd Ensure a yield cannot be pended simultaneously with a critical section being entered. 2008-08-14 11:04:54 +00:00
Richard Barry d427489391 Tidy up. 2008-08-13 08:06:49 +00:00
Richard Barry 513b1a25e0 Use internal RAM only. 2008-08-13 08:03:47 +00:00
Richard Barry a2bdba02ad Tidy up. 2008-08-13 08:01:54 +00:00
Richard Barry 0dffe8d801 Increase stack sizes as we now have interrupts nesting 3 deep. 2008-08-11 14:51:09 +00:00
Richard Barry cebb479b0a Add lwIP V1.3 files. 2008-08-11 14:49:32 +00:00
Richard Barry bfdbfce22f Add in interrupt nesting and chache support. 2008-08-10 21:19:57 +00:00
Richard Barry 60da4247dd Add interrupt nesting support, cache setup and reg test tasks. 2008-08-10 21:17:20 +00:00
Richard Barry a943ccd85a Use internal RAM only for data. 2008-08-10 21:16:35 +00:00
Richard Barry adf9eb9fb0 Remove white space only. 2008-08-10 21:15:14 +00:00
Richard Barry f68aab980d Interrupt nesting and cache support added. 2008-08-10 21:14:08 +00:00
Richard Barry 53a8d172df Com test now working. 2008-08-09 10:09:21 +00:00
Richard Barry 3a8161372d Add serial test code (not yet complete). 2008-08-08 15:55:31 +00:00
Richard Barry 3ea597543a Add ColdFire definitions. 2008-08-08 15:54:05 +00:00
Richard Barry 431d1c009d Update to allow interrupt nesting (not yet complete). 2008-08-08 15:52:41 +00:00
Richard Barry 181889d6b1 Basic demo up and running. 2008-08-08 12:50:22 +00:00
Richard Barry 5ff84b9869 Basic demo up and running. 2008-08-08 12:47:06 +00:00