Currently in Armv8-M GCC/ArmClang ports, constant pool is used to
define literals needed for `ldr` instructions. However, those
constant pools are defined with `.align 4` which increases code size.
Instead of defining the constant pool with `.align 4`, let the
compiler hanlde the constant pool and the required alignment.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
The `portable/ThirdParty/GCC/ARM_TFM/README.md` and
`portable/ThirdParty/GCC/ARM_TFM/os_wrapper_freertos.c` are updated to
support `TF-Mv2.0.0` of trusted-firmware-m release.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
The difference between a stream buffer and a stream batching buffer is when
a task performs read on a non-empty buffer:
- The task reading from a non-empty stream buffer returns immediately
regardless of the amount of data in the buffer.
- The task reading from a non-empty steam batching buffer blocks until the
amount of data in the buffer exceeds the trigger level or the block time
expires.
Update alignment in ARM_CR5 port.
This is the same patch as 553caa18ce
provided by Richard Barry for issue #426 (ARM_CA9).
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
* Add in a removed check for if a task is attempting to read a variable from a location it has write access to in xPortIsAuthorizedToAccessBuffer.
* Add in a portDONT_DISCARD symbol as well.
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S
* Run the copy_files.py script to update the ARMv8M ports to remove the duplicate pop instruction in mpu_wrappers_v2_asm
* Remove duplicate pop instruction from portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S
* Remove duplicate pop instruction from portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c
---------
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
* 64bit TickType_t is supported on Windows port.(MSVC and MinGW)
Especially it is introduced for 64bit compiler.(x64 platform on MSVC and MinGW-w64)
* Unnecessary compiler warning for the cast operation is disabled locally.(MinGW-w64 only)
* Modify the condition for ignoring compiler warning for the cast operation.
Before modification: Compiler warning was ignored only on MinGW64
After modification: Compiler warning is ignored on MinGW32 and MinGW64
Reason of modification: The cast warning here is unavoidable not only on MinGW64 but also on MinGW32.
"__GNUC__" macro is used because MSVC does not recognize this #pragma directive.
* Fix small bugs
* Cast sizeof to BaseType_t
* Test removing assert to fix UT
* Revert change to tasks.c
Since configIDLE_TASK_NAME must be defined as a string according to
the documentation, the macro will always be NULL terminated. Which
means that the check `if( cIdleName[ xIdleTaskNameIndex ] == ( char ) 0x00 )`
will catch the end of string.
* Update coverity config; Add coverity version; Update pvPortMalloc declaration to match the definitions.
* Add port files to sed command
* Remove warnings about unused parameters in port code
---------
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
* Rename Arm_AARCH64 to ARM_AARCH64
* Rename Arm_AARCH64_SRE to ARM_AARCH64_SRE
* Update cmake for ARM port folder capitalization
* Update in portable/CmakeLists.txt
* Use capitalization name in port README.md
---------
Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
* Initial set of SA fixes
* Revert function parameter name changes
* Reverted parameter name for Static version of function by mistake
* Update mpu_wrappers_v2.c to only include 20.7 fixes
* Update queue.c to remove non-20.7 fixes
* Update tasks.c to remove non-20.7 fixes
---------
Co-authored-by: bjbsmith <bjbsmith@uafeb6a6bcdce55.ant.amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
* Update vTaskDelete() to delete a task directly when scheduler is stopped instead of putting it on the xTasksWaitingTermination list.
* Delete the idle tasks and timer task in vTaskEndScheduler().
* Reclaim resources for all the tasks on the xTasksWaitingTermination list in vTaskEndScheduler().
* Update POSIX to no longer delete FreeRTOS tasks in the port.
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Modify portable/CMakeLists.txt to create only one static library containing both the common kernel code and kernel port.
Change the freertos_kernel_port target from a STATIC library to an OBJECT library and introduce a new freertos_kernel_port_headers INTERFACE library target.
---------
Co-authored-by: ABARNAT <ahmed.barnat@actia-engineering.tn>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Unnecessary white space was introduced in PR #768
which affected the formatting of assembly code. This PR
returns the correct formatting. No functional change.
Add a check for configENABLE_MVE to M23, M33 ports
configENABLE_MVE is only applicable to Cortex-M55 and Cortex-M85 ports.
It must not be defined to 1 for other ARMv8_m ports.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
The number of MPU regions is not configurable for Cortex-M3 port and
therefore, it is misleading to have configTOTAL_MPU_REGIONS in
portmacro.h.
It was added in PR #952.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add code to allow building for x64 in MSVC
- Add code for x64 arch.
- Add initial value for local otherwise it won't get proper value in x64.
* Moving init local to portGET_HIGHEST_PRIORITY
- From code review.
* More changes following review
* Another style fix from review
* Update formatting
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
According to the MSP430 EABI [1] section 3.3,
Arguments are assigned, in declared order, to the first available
register single, pair, or quad from the following list into which it
fits (with the following special exceptions). For MSP430 and
MSP430X, the argument registers are: R12, R13, R14, R15
Therefore, pvParameters should be passed in R12, as it is the first
argument, not R15. Keep passing the parameter in R15 for the
MSP430 EABI, if anyone is still using it.
[1] https://www.ti.com/lit/an/slaa534a/slaa534a.pdf
PR #914 caused Posix Port to fail to build on MacOS. This PR fixes
teh build failure.
This PR also adds a Matrix configuration to the GitHub kernel-demo
workflow to build the Posix Demos on MacOS.
---------
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* MicroblazeV9: Add support for 64 bit microblaze
* MicroblazeV9: Add support for generation of run time task stats
* MicroblazeV9: Add default implementation for callback functions
---------
Signed-off-by: Mubin Usman Sayyed <mubin.usman.sayyed@xilinx.com>
* Allow access to any buffer in xPortIsAuthorizedToAccessBuffer if xSchedulerRunning is set to pdFALSE
* Allow access to any buffer in xPortIsAuthorizedToAccessBuffer if xSchedulerRunning is set to pdFALSE in the copied ARMv8M Port Files
* Add runtime check to see if the target even has a MPU
* Add missing extern symbols for __ARMCC_VERSION support
* Add default for configTOTAL_MPU_REGIONS and change a runtime assert to compile time error
* Simplify check and link to reference documentation
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
---------
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: jasonpcarroll <23126711+jasonpcarroll@users.noreply.github.com>
Change from pthread_attr_setstack() to pthread_attr_setstacksize(), and automatically adjust the stack size
to be at least PTHREAD_STACK_MIN if it wasn't already, removing the size warning.
This permits the user to increase the pthread stack size beyond the PTHREAD_STACK_MIN default of 16384 if
desired, without producing a warning in the typical case where stacks are minimized for RAM limited targets.
Continue to store thread paramters on the provided stack, for consistency with the MCU targets.
Previously pthread_attr_setstack() was used to enable user defined stacks.
Note that:
1. The stack size can still be specified by the user.
2. pxPortInitialiseStack(), and pthread_addr_setstack() was failing on stacks of typical size, as
these are smaller than PTHREAD_STACK_MIN (16384) bytes, and printing out a series of warnings.
Improve usability by having the posix port automatically increase the stack size to be
at least PTHREAD_STACK_MIN as posix platforms have enough memory for this not to be a concern.
3. Reuse of stack memory will also result in valgrind 'invalid write' errors to what is demonstrably
valid memory. Root cause is that Valgrind is tracking a stack pointer as the stack is used.
Reuse of a stack buffer results in the stack being used at its start, in an area that Valgrind thinks
is far away from the start of the stack. There are ways to notify Valgrind of these changes
however this would require linking against and calling Valgrind functions from the FreeRTOS application using
the posix port, https://valgrind.org/docs/manual/manual-core-adv.html#manual-core-adv.clientreq.
Also, apparently it isn't permitted by posix to reuse stack memory once its been used in a pthread via pthread_attr_setstack(),
see https://stackoverflow.com/a/5422134
