Commit graph

24 commits

Author SHA1 Message Date
johnrhen
43defa566c
Apply release changes to main branch (#759)
* Update History.txt and README.md for December release (#744)

* Update History.txt and README.md for release

* Bump mbedtls submodule to v2.28.0 (#745)

* Patch project files for mbedtls (#751)

* Apply group 1 patches

* Apply patches for group 2

* Update project files for mbedTLS new version

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix warnings in projects

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix warnings in HTTP_S3_Download demo

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Update changelog and history for corePKCS11 update (#752)

* Update submodule pointer and manifest.yml for corePKCS11 (#754)

* Update readme and history.txt to show that Sigv4 is a newly added library (#756)

* Revert update to v143 of VS toolset (#757)

* [AUTO][RELEASE]: Bump file header version to "202112.00"

* Update file headers to satisfy core checks

Co-authored-by: Muneeb Ahmed <54290492+muneebahmed10@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: johnrhen <johnrhen@users.noreply.github.com>
2021-12-23 10:16:27 -08:00
aggarg
ecd1a8f9f1 [AUTO][RELEASE]: Bump file header version to "202111.00" 2021-11-13 02:37:14 +00:00
tianmc1
176f1cae02 [AUTO][RELEASE]: Bump file header version to "202107.00" 2021-07-24 00:32:35 +00:00
Archit Aggarwal
971a6e1d22
Merge FreeRTOS 202104.00 to main (#585) 2021-04-29 14:53:40 -07:00
Joseph Julicher
da9b9a800d [AUTO][RELEASE]: Bump file header version to "202012.00" 2020-12-15 11:50:37 -07:00
David Chalco
07f3cbafee [AUTO][RELEASE]: Bump file header version to "202011.00" 2020-11-10 14:45:34 -08:00
David Chalco
0573fea3ee
Update (.s, .S) kernel version numbers to 10.4.1 (#283)
* version bump to 10.4.1
* update .s file version numbers
* Update FreeRTOS/History.txt
2020-09-18 10:55:01 -07:00
Cobus van Eeden
d5862dbe01
Sync back V10.4.1 (#282)
* Move Kernel submodule pointer to 10.4.1
* Update version number to V10.4.1 (#281)
2020-09-17 17:16:33 -07:00
David Chalco
89d475e9b1
Update Version number to 10.4.0 (#237) 2020-09-10 19:40:24 -07:00
Yuhui.Zheng
589dd9f149 Update version number in readiness for V10.3.0 release. Sync SVN with reviewed release candidate. 2020-02-07 20:14:50 +00:00
Richard Barry
b51529a284 Update version number ready for next release. 2019-05-11 01:47:37 +00:00
Richard Barry
58ba10eee8 Update version number in readiness for V10.2.0 release. 2019-02-17 22:36:16 +00:00
Richard Barry
92ae8e7aff Update version numbers ready for release. 2018-09-07 18:13:20 +00:00
Richard Barry
3a1631fda3 Update copyright date ready for tagging V10.1.0. 2018-08-22 23:23:03 +00:00
Richard Barry
fb9de58f56 Update version numbers in preparation for a new release. 2018-08-21 19:50:48 +00:00
Richard Barry
10eea4aded Remove period from the URL that links to the web page that describes the FreeRTOSConfig.h parameters. 2018-06-15 00:03:20 +00:00
Richard Barry
26d8c76996 Update Zynq, MPSoc Cortex-A53 and MPSoc Cortex-R5 demo projects to build with the 18.1 version of the Xilinx SDK - building BUT NOT YET TESTED. 2018-05-02 04:04:54 +00:00
Richard Barry
13651934be Roll up the minor changes checked into svn since V10.0.0 into new V10.0.1 ready for release. 2017-12-18 22:54:18 +00:00
Richard Barry
cfc268814a Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/History.txt 2017-11-29 16:53:26 +00:00
Richard Barry
8d041c8e21 Update version number in preparation for maintenance release. 2017-01-22 05:28:13 +00:00
Richard Barry
979e41c9da Update UltraScale R5 hardware definition and BSP for 2016.4 SDK tools. 2017-01-21 21:59:25 +00:00
Richard Barry
992a3c8c71 Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaze to the 2016.4 versions.
Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
2017-01-19 04:11:21 +00:00
Richard Barry
2bd7884ace Prepare for V9.0.0 release:
+ Change version number from V9.0.0rc2 to V9.0.0.
2016-05-20 18:05:46 +00:00
Richard Barry
324127837c Update some more standard demos for use on 64-bit architectures.
Update the Xilinx Ultrascale+ Cortex-A53 (64-bit) and Cortex-R5 (32-bit) demos to use version 2016.1 of the SDK.
2016-05-06 12:40:27 +00:00