* arm-cortex-r82: Add MPU support
This commit introduces support for the Memory Protection Unit (MPU)
to the ARM Cortex-R82 port. The MPU enhances system security
by allowing the definition of memory regions with specific access
permissions. The following changes have been made:
- Added MPU configuration functions in `port.c` to set up memory
regions and their attributes.
- Updated `portASM.S` to include assembly routines for MPU
and context switching with MPU support.
- Created `mpu_wrappers_v2_asm.c` to provide assembly wrappers for
MPU operations.
- Updated `portmacro.h` to include MPU-related macros and definitions.
- Modified `task.h` to include MPU-related task attributes.
- Updated `CMakeLists.txt` to include the new MPU source file.
- Enhanced the `README.md` with instructions on MPU configuration.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
* cortex-r82: Minor code improvements
This commit includes minor code improvements to enhance readability
and maintainability of the Cortex-R82 port files. Changes include
refactoring variable names, optimizing comments, and improving code
structure without altering functionality.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
* tasks: Disable stack-depth check if MPU wrappers is set
This stack-depth check should not be performed for ports
where portUSING_MPU_WRAPPERS is set to 1.
In this case, pxTopOfStack and pxNewTCB->pxTopOfStack reside
in different memory regions: pxTopOfStack is in unprivileged SRAM,
while pxNewTCB->pxTopOfStack is in privileged SRAM.
This is because pxPortInitialiseStack() returns the address of
`ullContext` array rather than the decremented pxTopOfStack,
as is done in the non-MPU case.
Consequently, this check is not valid in this scenario.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
---------
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
The goal of this commit is to add the GCC/ARMClang non-MPU
port variant for ARM Cortex-R82 processor which is
ARMv8-R AArch64 based.
The work done is inspired by the GCC ARM_AARCH64 FreeRTOS port.
This port has the following features:
* Uses single security state (non TrustZone).
* Supports SMP (Symmetric multi-processing).
* Doesn't support Hypervisor (EL2).
* Doesn't support neither PMSA (MPU) nor VMSA (MMU).
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
