Commit graph

3 commits

Author SHA1 Message Date
OccupyMars2025
1fc8a8ee42
modify a typo (#869) 2022-11-04 12:02:26 -07:00
Ming Yue
673d3d7eea
Update GCC RISC-V QEMU project to support new RISC-V port and vector mode (#780) 2022-02-08 13:58:34 -08:00
RichardBarry
4629138a42
Extend qemu virt riscv demo (#774)
* Simple blinky demo working.  Not tried full demo yet.

* Get the full demo running.

* Add Eclipse project to build the RISC-V_RV32_QEMU_VIRT_GCC gcc makefile.

* Add regtest tasks to the RISC-V_RV32_QEMU_VIRT_GCC demo.

* Update priority of the timer task.

* Adjust timer frequency and optimisation level before committing prior to rearranging the Eclipse project.

* Reorganise Eclipse project slightly.

* Add note to the RISC-V-Qemu-virt_GCC readme file about the updated version in RISC-V_RV32_QEMU_VIRT_GCC.

* Update headers in newly added source files so they pass the automated header check.

* Update lexicon to pass automated spell check.

Co-authored-by: none <>
2022-01-26 17:55:06 -08:00