2 commits

Author	SHA1	Message	Date
Richard Barry	3a3d061cc5	Continue working on the GIC-less Cortex-A5 port for IAR: ... - Add in the assert when a task attempts to exit its implementing function without deleting itself. - Remove obsolete code from the context switch asm code (obsoleted by the fact that there is no mask register). - Attempt to make code more generic by using definitions for additional register addresses.	2014-07-29 21:31:04 +00:00
Richard Barry	8ad9b75810	Rename ARM_CAx_No_GIC ARM_CA5_No_GIC and add FreeRTOSConfig setting to specify the number of registers in the FPU unit.	2014-07-12 20:39:22 +00:00