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Author SHA1 Message Date
Gaurav-Aggarwal-AWS 4e3bf0f5c0
Add Cortex-A53 port with system register interface for CPU interface access (#357) 
The difference between this port and portable/GCC/ARM_CA53_64_BIT is
that this port uses System Register interface to access CPU interface
while the other one uses Memory-mapped interface.

Signed-off-by: Gaurav Aggarwal 
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
 2021-06-22 18:51:58 -07:00