Commit graph

243 commits

Author SHA1 Message Date
kar-rahul-aws ef7b253b56 [AUTO][RELEASE]: Bump file header version to "10.6.2" 2023-11-29 14:13:51 +00:00
Gaurav-Aggarwal-AWS 2f66e475fa
Fix prototype of MPU_vTimerSetReloadMode (#911)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-11-29 19:15:07 +05:30
Gaurav-Aggarwal-AWS 6b7d4cf41b
Add Access Control List to MPU ports (#897)
This PR adds Access Control to kernel objects on a per task basis to MPU
ports. The following needs to be defined in the `FreeRTOSConfig.h` to
enable this feature:

```c
```

This PR adds the following new APIs:

```c
void vGrantAccessToTask( TaskHandle_t xTask,
                         TaskHandle_t xTaskToGrantAccess );
void vRevokeAccessToTask( TaskHandle_t xTask,
                          TaskHandle_t xTaskToRevokeAccess );

void vGrantAccessToSemaphore( TaskHandle_t xTask,
                              SemaphoreHandle_t xSemaphoreToGrantAccess );
void vRevokeAccessToSemaphore( TaskHandle_t xTask,
                               SemaphoreHandle_t xSemaphoreToRevokeAccess );

void vGrantAccessToQueue( TaskHandle_t xTask,
                          QueueHandle_t xQueueToGrantAccess );
void vRevokeAccessToQueue( TaskHandle_t xTask,
                           QueueHandle_t xQueueToRevokeAccess );

void vGrantAccessToQueueSet( TaskHandle_t xTask,
                             QueueSetHandle_t xQueueSetToGrantAccess );
void vRevokeAccessToQueueSet( TaskHandle_t xTask,
                              QueueSetHandle_t xQueueSetToRevokeAccess );

void vGrantAccessToEventGroup( TaskHandle_t xTask,
                               EventGroupHandle_t xEventGroupToGrantAccess );
void vRevokeAccessToEventGroup( TaskHandle_t xTask,
                                EventGroupHandle_t xEventGroupToRevokeAccess );

void vGrantAccessToStreamBuffer( TaskHandle_t xTask,
                                 StreamBufferHandle_t xStreamBufferToGrantAccess );
void vRevokeAccessToStreamBuffer( TaskHandle_t xTask,
                                  StreamBufferHandle_t xStreamBufferToRevokeAccess );

void vGrantAccessToMessageBuffer( TaskHandle_t xTask,
                                  MessageBufferHandle_t xMessageBufferToGrantAccess );
void vRevokeAccessToMessageBuffer( TaskHandle_t xTask,
                                   MessageBufferHandle_t xMessageBufferToRevokeAccess );

void vGrantAccessToTimer( TaskHandle_t xTask,
                          TimerHandle_t xTimerToGrantAccess );
void vRevokeAccessToTimer( TaskHandle_t xTask,
                           TimerHandle_t xTimerToRevokeAccess );
```

An unprivileged task by default has access to itself only and no other
kernel object. The application writer needs to explicitly grant an
unprivileged task access to all the kernel objects it needs. The best
place to do that is before starting the scheduler when all the kernel
objects are created.

For example, let's say an unprivileged tasks needs access to a queue and
an event group, the application writer needs to do the following:

```c
vGrantAccessToQueue( xUnprivilegedTaskHandle, xQueue );
vGrantAccessToEventGroup( xUnprivilegedTaskHandle, xEventGroup );
```

The application writer MUST revoke all the accesses before deleting a
task. Failing to do so will result in undefined behavior. In the above
example, the application writer needs to make the following 2 calls
before deleting the task:

```c
vRevokeAccessToQueue( xUnprivilegedTaskHandle, xQueue );
vRevokeAccessToEventGroup( xUnprivilegedTaskHandle, xEventGroup );

```
2023-11-23 10:45:58 +05:30
Gaurav-Aggarwal-AWS 9bfd85a253
Update system call entry mechanism (#896)
Earlier the System Call entry from an unprivileged task looked like:

1. SVC for entering system call.
2. System call implementation.
3. SVC for exiting system call.

Now, the system call entry needs to make only one system call
and everything else is handled internally.

This PR also makes the following small changes:

1. Add one struct param for system calls with 5 parameters. This
   removes the need for special handling for system calls with 5
   parameters.
2. Remove raise privilege SVC when MPU wrapper v2 is used.
3. Add additional run time parameter checks to MPU wrappers
   for xTaskGenericNotify and xQueueTakeMutexRecursive APIs.

These changes are tested on the following platforms:
1. STM32H743ZI (Cortex-M7)
2. STM32L152RE (Cortex-M3)
3. Nuvoton M2351 (Cortex-M23)
4. NXP LPC55S69 (Cortex-M33)
2023-11-21 18:42:23 +05:30
Gaurav-Aggarwal-AWS 52c1c6e578
Covert object type check to runtime check (#847)
It was checked using assert earlier.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-10-20 22:08:19 +05:30
Rahul Kar d9fc48bced
Backport PR 839 to FreeRTOS-Kernel V10.6.1 (#840)
* Fix size alignment in the integer overflow issue

* Remove CORTEX_M3_MPS2_QEMU demo in the V10.6.x branch to sync with the main branch.
2023-10-19 11:21:27 +05:30
Gaurav-Aggarwal-AWS 7003ba73ed
Backport PR 836 to FreeRTOS-Kernel V10.6.1 (#837)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-10-17 23:49:09 +05:30
kar-rahul-aws c5edc980c5 [AUTO][RELEASE]: Bump file header version to "10.6.1" 2023-08-17 17:14:06 +00:00
kar-rahul-aws ace6b39fa0
Add runtime parameter checks (#758)
* Add runtime parameter checks

This commit adds runtime checks for function parameters
to mpu_wrappers_v2 file. The same checks are performed
in the API implementation using asserts.

Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
2023-08-17 18:53:42 +05:30
kar-rahul-aws 0d871946ab
Update version number in manifest.yml (#756)
Add automation to update version number in manifest.yml. Also,
bring required commits from main.
2023-08-17 17:20:53 +05:30
kar-rahul-aws aec827831a [AUTO][RELEASE]: Bump file header version to "10.6.0" 2023-07-13 11:45:32 +00:00
kar-rahul-aws 97050a17aa
Memory Protection Unit (MPU) Enhancements (#705)
Memory Protection Unit (MPU) Enhancements

This commit introduces a new MPU wrapper that places additional
restrictions on unprivileged tasks. The following is the list of changes
introduced with the new MPU wrapper:

1. Opaque and indirectly verifiable integers for kernel object handles:
   All the kernel object handles (for example, queue handles) are now
   opaque integers. Previously object handles were raw pointers.

2. Saving the task context in Task Control Block (TCB): When a task is
   swapped out by the scheduler, the task's context is now saved in its
   TCB. Previously the task's context was saved on its stack.

3. Execute system calls on a separate privileged only stack: FreeRTOS
   system calls, which execute with elevated privilege, now use a
   separate privileged only stack. Previously system calls used the
   calling task's stack. The application writer can control the size of
   the system call stack using new configSYSTEM_CALL_STACK_SIZE config
   macro.

4. Memory bounds checks: FreeRTOS system calls which accept a pointer
   and de-reference it, now verify that the calling task has required
   permissions to access the memory location referenced by the pointer.

5. System call restrictions: The following system calls are no longer
   available to unprivileged tasks:
    - vQueueDelete
    - xQueueCreateMutex
    - xQueueCreateMutexStatic
    - xQueueCreateCountingSemaphore
    - xQueueCreateCountingSemaphoreStatic
    - xQueueGenericCreate
    - xQueueGenericCreateStatic
    - xQueueCreateSet
    - xQueueRemoveFromSet
    - xQueueGenericReset
    - xTaskCreate
    - xTaskCreateStatic
    - vTaskDelete
    - vTaskPrioritySet
    - vTaskSuspendAll
    - xTaskResumeAll
    - xTaskGetHandle
    - xTaskCallApplicationTaskHook
    - vTaskList
    - vTaskGetRunTimeStats
    - xTaskCatchUpTicks
    - xEventGroupCreate
    - xEventGroupCreateStatic
    - vEventGroupDelete
    - xStreamBufferGenericCreate
    - xStreamBufferGenericCreateStatic
    - vStreamBufferDelete
    - xStreamBufferReset
   Also, an unprivileged task can no longer use vTaskSuspend to suspend
   any task other than itself.

We thank the following people for their inputs in these enhancements:
- David Reiss of Meta Platforms, Inc.
- Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling
  of School of Computer Science and Engineering, Southeast University,
  China.
- Xinwen Fu of Department of Computer Science, University of
  Massachusetts Lowell, USA.
- Yuequi Chen, Zicheng Wang, Minghao Lin of University of Colorado
  Boulder, USA.
2023-07-13 16:51:04 +05:30
Patrick Cook 18e2937239
Fix circular dependency in CMake project (#700)
* Fix circular dependency in cmake project

Fix for https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/687
In order for custom ports to also break the cycle, they must link
against freertos_kernel_include instead of freertos_kernel.

* Simplify include path
2023-07-10 15:08:59 -07:00
Joris Putcuyps 1c5eca348f
Fix #697: Missing portPOINTER_SIZE_TYPE definition for ATmega port (#698) 2023-06-29 11:18:51 -07:00
Evgeny Ermakov 891dcdf80a
Fix typos in comments for the AT91SAM7S port (#695)
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
2023-06-26 11:13:10 -07:00
chinglee-iot aa012e8d82
Add constant type for portMAX_DELAY in port (#691)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-06-26 10:49:59 +08:00
chinglee-iot 9a6284262e
Fix typo in check comment of configMAX_SYSCALL_INTERRUPT_PRIORITY (#690) 2023-06-21 15:05:18 +05:30
chinglee-iot 17a46c252f
Use portTASK_FUNCTION_PROTO to replace portNORETURN (#688)
* Use portTASK_FUNCTION_PROTO to replace portNORETURN
2023-06-12 16:17:17 +05:30
chinglee-iot 80f67449ba
Use UBaseType_t as interrupt mask (#689)
* Use UBaseType_t as interrupt mask
* Update GCC posix port to use UBaseType_t as interrupt mask
2023-06-12 17:33:52 +08:00
chinglee-iot 4a35c97fec
Remove __NVIC_PRIO_BITS and configPRIO_BITS check in port (#683)
* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3, CM4 and ARMv8.
* Add hardware not implemented bits check. These bits should be zero.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-06-08 10:52:08 +08:00
Aniruddha Kanhere d3c289fe5b
Add back croutines by reverting PR#590 (#685)
* Add croutines to the code base

* Add croutine changes to cmake, lexicon and readme

* Add croutine file to portable cmake file

* Add back more references from PR 591
2023-06-02 11:03:40 -07:00
Gaurav-Aggarwal-AWS 97434a4e0c
Use the extended movx instruction instead of mov (#676)
The following is from the MSP430X instruction set -

```
MOVX.W Move source word to destination word.

The source operand is copied to the destination. The source operand is
not affected. Both operands may be located in the full address space.
```

The movx instruction allows both the operands to be located in the full
address space and therefore, works with large data model as well.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-05-15 23:29:04 +05:30
Devaraj Ranganna a07f649bd5
Armv8-M (except Cortex-M23) interrupt priority checking (#673)
* Armv8-M: Formatting changes

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Armv8-M: Add support for interrupt priority check

FreeRTOS provides `FromISR` system calls which can be called directly
from interrupt service routines. It is crucial that the priority of
these ISRs is set to same or lower value (numerically higher) than that
of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer
to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html.

Add a check to trigger an assert when an ISR with priority higher
(numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls
`FromISR` system calls if `configASSERT` macro is defined.

In addition, add a config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt
priority check while running on QEMU. Based on the discussion
https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt
priority bits in QEMU do not match the real hardware. Therefore the
assert that checks the number of implemented bits and __NVIC_PRIO_BITS
will always fail. The config option
 `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
`FreeRTOSConfig.h` for QEMU targets.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Use SHPR2 for calculating interrupt priority bits

This removes the dependency on the secure software to mark the interrupt
as non-secure.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-05-11 09:41:00 -07:00
Monika Singh 9149af9a6f
Align StackSize and StackAddress for macOS (#674) 2023-05-10 12:11:52 +05:30
Paul Bartell c1980cedb1 tree-wide: Unify formatting of __cplusplus ifdefs 2023-04-25 11:32:08 -07:00
Paul Bartell 5f19e34f87 portable/ARM_CM0: Add xPortIsInsideInterrupt
Add missing xPortIsInsideInterrupt function to Cortex-M0 port.
2023-04-20 15:13:11 -07:00
Paul Bartell 714e543247 Format portmacro.h in arm CM0 ports 2023-04-20 15:13:11 -07:00
Paul Bartell 686b6e62eb
ARMv7M: Adjust implemented priority bit assertions (#665)
Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.

Related to Qemu issue #1122
2023-04-20 10:54:54 +05:30
Vo Trung Chi aa987a3443
fix conversion warning (#658)
FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]

Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
2023-04-04 08:10:54 -07:00
Gaurav-Aggarwal-AWS 68f105375f
Only add alignment padding when needed (#650)
Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-03-28 17:01:37 +05:30
kar-rahul-aws 99797e14e3
Cortex-M Assert when NVIC implements 8 PRIO bits (#639)
* Cortex-M Assert when NVIC implements 8 PRIO bits

* Fix CM3 ports

* Fix ARM_CM3_MPU

* Fix ARM CM3

* Fix ARM_CM4_MPU

* Fix ARM_CM4

* Fix GCC ARM_CM7

* Fix IAR ARM ports

* Uncrustify changes

* Fix MikroC_ARM_CM4F port

* Fix MikroC_ARM_CM4F port-(2)

* Fix RVDS ARM ports

* Revert changes for Tasking/ARM_CM4F port

* Revert changes for Tasking/ARM_CM4F port-(2)

* Update port.c

Fix GCC/ARM_CM4F port

* Update port.c

* update GCC\ARM_CM4F port

* update port.c

* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority

* Fix merge error: remove duplicate code

* Fix typos

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
2023-03-23 15:06:33 +05:30
Kody Stribrny 309a18a03a
Fix freertos_kernel cmake property, Posix Port (#640)
* Fix freertos_kernel cmake property, Posix Port

* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t

* Add blank line to CMakeLists.txt
2023-03-07 09:34:15 +05:30
Paul Bartell 7b26ea6263
Enable building the GCC Cortex-R5 port without an FPU (#586)
* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly

If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.

* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1

* Remove error case in pxPortInitialiseStack

The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled

* Enable access to FPU registers only if FPU is enabled

* Make minor formating changes

* Format ARM Cortex-R5 port

* Address review comments from @ChristosZosi

* Minor code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-03-06 21:49:28 +05:30
Joseph Julicher ddd50d9a80
added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)
* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port

* Added SIZE_MAX definition to PIC24/dsPIC33
2023-03-03 19:01:16 -07:00
Chris Copeland a9e1f66849
Interrupt priority assert improvements for CM3/4/7 (#602)
* Interrupt priority assert improvements for CM3/4/7

In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.

Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.

* Remove not needed configKERNEL_INTERRUPT_PRIORITY define

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-03-02 23:19:56 +05:30
Keith Packard c3e1df031e
Add Thread Local Storage (TLS) support using Picolibc functions (#343)
* Pass top of stack to configINIT_TLS_BLOCK

Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Move newlib-specific definitions to separate file

This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT

Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* portable-ARC: Adapt ARC support to use generalized TLS support

With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions

This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.

Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.

The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.

Signed-off-by: Keith Packard <keithpac@amazon.com>

---------

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-03-02 21:56:04 +05:30
Devaraj Ranganna 5fdbb7fd2b
Cortex-M35P: Add Cortex-M35P port (#631)
* Cortex-M35P: Add Cortex-M35P port

The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Add portNORETURN to the newly added portmacro.h

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
2023-02-28 12:58:59 +05:30
jacky309 cd87681789
POSIX port fixes (#626)
* Fix types in POSIX port

Use TaskFunction_t and StackType_t as other ports do.

* Fix portTICK_RATE_MICROSECONDS in POSIX port

---------

Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-02-27 23:51:11 +05:30
phelter 8cd5451ad5
Feature/fixing clang gnu compiler warnings (#620)
* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)

* Using single name definition for libraries everywhere. (#558)

* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)

* Removing compiler warnings for GNU and Clang. (#571)

* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.

* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.

* Fixing clang and gnu compiler warnings.

* Adding in project information and how to compile for GNU/clang

* Fixing compiler issue with unused variable - no need to declare variable.

* Adding in compile warnings for linux builds that kernel is okay with using.

* Fixing more extra-semi-stmt clang warnings.

* Moving definition of hooks into header files if features are enabled.

* Fixing formatting with uncrustify.

* Fixing merge conflicts with main merge.

* Fixing compiler errors due to merge issues and formatting.

* Fixing Line feeds.

* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request

* Further clean-up of clang and clang-tidy issues.

* Removing compiler specific pragmas from common c files.

* Fixing missing lexicon entry and uncrustify formatting changes.

* Resolving merge issue multiple defnitions of proto for prvIdleTask

* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.

* More uncrustify formatting issues.

* Fixing extra bracket in #if statement.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-02-23 23:35:04 +05:30
Ju1He1 8252edec45
Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)
* make port exitable

* correctly set xPortRunning to False

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-02-15 11:40:32 +05:30
bbain 050cf0d80f
Introduce portMEMORY_BARRIER for Microblaze port. (#621)
The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.

In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.

The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`.  This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.
2023-02-13 10:28:20 +05:30
Dusan Cervenka 91c20f5f42
Added support of 64bit events. (#597)
* Added support of 64bit even

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Added missing brackets

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Made proper name for tick macro.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Improved macro evaluation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fixed missed port files  + documentation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Changes made on PR

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fix macro definition.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Formatted code with uncrustify

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

---------

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
2023-02-03 07:34:02 -07:00
Paul Bartell 01820d3ed9 Normalize line endings and whitespace in source files 2022-11-29 15:38:47 -08:00
Kody Stribrny 1d59f65007
Add IAR RISC-V 32 Embedded Extension Support (#588)
Adds RV32E support to the IAR port. This is done by
reducing our register usage to the first 16 registers
only.

Influenced by changes in https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/543

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-11-29 14:55:18 -08:00
Paul Bartell b213ad8b6e Remove croutine.c from RP2040 cmake include file 2022-11-28 11:46:15 -08:00
Paul Helter 927ad2d8e5 Removing compiler warnings for GNU and Clang. (#571) 2022-11-18 10:29:30 -08:00
Paul Helter 8ede7101af Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558) 2022-11-18 10:29:30 -08:00
ChristosZosi cd1f51cb5e
Add support for the configUSE_TASK_FPU_SUPPORT constant in the GCC/ARM_CR5 port (#584)
* Add support for the configUSE_TASK_FPU_SUPPORT in the GCC/ARM_CR5 port

This is done almost identically as in the GCC/ARM_CA9 port

* Adjust task stack initialitation of the GCC/ARM_CR5 port

Ensure that the task stack initialization is done correctly for the
different options of configUSE_TASK_FPU_SUPPORT.

This is very similar to the GCC/ARM_CA9 port. The only meaningful
difference is, that the FPU of the Cortex-R5 has just sixteen 64-bit
floating point registers as it implements the VFPv3-D16 architecture.
You may also refer to the ARM documentation

* Add support for FPU safe interrupts to the GCC/ARM_CR5 port

Similar to GCC/ARM_CA9 port

* Clarify comment about the size of the FPU registers of Cortex R5
2022-11-14 10:48:47 +05:30
Gaurav-Aggarwal-AWS 44e02bff31
Update Cortex-M55 and Cortex-M85 ports (#579)
These were missed when PR #59 was merged.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-10-28 10:41:56 +05:30
RichardBarry d7b712668d
Update the NIOSII port to enable longer jumps (#578)
Update the NIOSII port so it works on systems with more RAM as
per https://forums.freertos.org/t/nios-ii-r-nios2-call26-noat-linker-error/16028
2022-10-20 10:34:53 +05:30