Commit graph

3 commits

Author SHA1 Message Date
Richard Barry 0a29d350b1 Renamed RISC-V_RV32_SiFive_HiFive1_IAR directory to RISC-V_RV32_SiFive_HiFive1-RevB_IAR as it targets the RevB hardware. 2020-01-01 22:38:23 +00:00
Richard Barry 07622ed3ee Remove driver files that generate compiler warnings from the RISC-V_Renode_Emulator_SoftConsole project.
Update RISC-V ports so the interrupt stack is set to a known value before the scheduler is started if the interrupt stack is statically defined rather than re-using the main.c() stack.
2019-11-18 17:23:14 +00:00
Richard Barry 4922cff4ce Add IAR demo for the SiFive RISC-V HiFive Rev B board. 2019-10-14 03:20:18 +00:00