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Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions in the GCC RISC-V port - portasmHAS_CLIT will still work by deriving the new definitions from the old.

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This commit is contained in:
Richard Barry 2020-01-07 01:14:36 +00:00
parent eaf9318df8
commit fbb23055cd
5 changed files with 49 additions and 17 deletions
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2
FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
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@ -59,7 +59,7 @@
#ifndef __FREERTOS_RISC_V_EXTENSIONS_H__
#define __FREERTOS_RISC_V_EXTENSIONS_H__
#define portasmHAS_CLINT 0
#define portasmHAS_MTIME 0
/* Constants to define the additional registers found on the Pulpino RI5KY. */
#define lpstart0 0x7b0

2
FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
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@ -53,7 +53,7 @@
#ifndef __FREERTOS_RISC_V_EXTENSIONS_H__
#define __FREERTOS_RISC_V_EXTENSIONS_H__
#define portasmHAS_CLINT 1
#define portasmHAS_MTIME 1
#define portasmADDITIONAL_CONTEXT_SIZE 0 /* Must be even number on 32-bit cores. */
.macro portasmSAVE_ADDITIONAL_REGISTERS