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Final tidy up before V7.6.0 zip file creation.
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Richard Barry
parent
8cd71348be
commit
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35 changed files with 5528 additions and 2 deletions
349
FreeRTOS/Source/portable/MPLAB/PIC32MZ/port_asm.S
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349
FreeRTOS/Source/portable/MPLAB/PIC32MZ/port_asm.S
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/*
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FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that has become a de facto standard. *
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* *
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* Help yourself get started quickly and support the FreeRTOS *
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* project by purchasing a FreeRTOS tutorial book, reference *
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* manual, or both from: http://www.FreeRTOS.org/Documentation *
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* *
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* Thank you! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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>>! NOTE: The modification to the GPL is included to allow you to distribute
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>>! a combined work that includes FreeRTOS without being obliged to provide
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>>! the source code for proprietary components outside of the FreeRTOS
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>>! kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available from the following
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link: http://www.freertos.org/a00114.html
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong?" *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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license and Real Time Engineers Ltd. contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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#include <xc.h>
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#include <sys/asm.h>
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#include "ISR_Support.h"
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.set nomips16
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.set noreorder
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.extern pxCurrentTCB
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.extern vTaskSwitchContext
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.extern vPortIncrementTick
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.extern xISRStackTop
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.global vPortStartFirstTask
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.global vPortYieldISR
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.global vPortTickInterruptHandler
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/******************************************************************/
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.set noreorder
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.set noat
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.ent vPortTickInterruptHandler
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vPortTickInterruptHandler:
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portSAVE_CONTEXT
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jal vPortIncrementTick
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nop
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portRESTORE_CONTEXT
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.end vPortTickInterruptHandler
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/******************************************************************/
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.set noreorder
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.set noat
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.ent vPortStartFirstTask
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vPortStartFirstTask:
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/* Simply restore the context of the highest priority task that has been
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created so far. */
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portRESTORE_CONTEXT
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.end vPortStartFirstTask
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/*******************************************************************/
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.set noreorder
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.set noat
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.ent vPortYieldISR
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vPortYieldISR:
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/* Make room for the context. First save the current status so it can be
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manipulated, and the cause and EPC registers so thier original values are
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captured. */
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addiu sp, sp, -portCONTEXT_SIZE
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mfc0 k1, _CP0_STATUS
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/* Also save s6 and s5 so they can be used. Any nesting interrupts should
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maintain the values of these registers across the ISR. */
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sw s6, 44(sp)
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sw s5, 40(sp)
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sw k1, portSTATUS_STACK_LOCATION(sp)
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/* Prepare to re-enabled interrupts above the kernel priority. */
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ins k1, zero, 10, 7 /* Clear IPL bits 0:6. */
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ins k1, zero, 18, 1 /* Clear IPL bit 7. It would be an error here if this bit were set anyway. */
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ori k1, k1, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 )
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ins k1, zero, 1, 4 /* Clear EXL, ERL and UM. */
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/* s5 is used as the frame pointer. */
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add s5, zero, sp
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/* Swap to the system stack. This is not conditional on the nesting
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count as this interrupt is always the lowest priority and therefore
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the nesting is always 0. */
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la sp, xISRStackTop
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lw sp, (sp)
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/* Set the nesting count. */
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la k0, uxInterruptNesting
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addiu s6, zero, 1
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sw s6, 0(k0)
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/* s6 holds the EPC value, this is saved with the rest of the context
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after interrupts are enabled. */
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mfc0 s6, _CP0_EPC
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/* Re-enable interrupts above configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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mtc0 k1, _CP0_STATUS
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/* Save the context into the space just created. s6 is saved again
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here as it now contains the EPC value. */
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sw ra, 120(s5)
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sw s8, 116(s5)
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sw t9, 112(s5)
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sw t8, 108(s5)
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sw t7, 104(s5)
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sw t6, 100(s5)
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sw t5, 96(s5)
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sw t4, 92(s5)
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sw t3, 88(s5)
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sw t2, 84(s5)
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sw t1, 80(s5)
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sw t0, 76(s5)
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sw a3, 72(s5)
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sw a2, 68(s5)
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sw a1, 64(s5)
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sw a0, 60(s5)
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sw v1, 56(s5)
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sw v0, 52(s5)
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sw s7, 48(s5)
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sw s6, portEPC_STACK_LOCATION(s5)
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/* s5 and s6 has already been saved. */
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sw s4, 36(s5)
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sw s3, 32(s5)
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sw s2, 28(s5)
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sw s1, 24(s5)
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sw s0, 20(s5)
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sw $1, 16(s5)
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/* s7 is used as a scratch register as this should always be saved across
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nesting interrupts. */
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/* Save the AC0, AC1, AC2 and AC3. */
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mfhi s7, $ac1
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sw s7, 128(s5)
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mflo s7, $ac1
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sw s7, 124(s5)
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mfhi s7, $ac2
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sw s7, 136(s5)
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mflo s7, $ac2
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sw s7, 132(s5)
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mfhi s7, $ac3
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sw s7, 144(s5)
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mflo s7, $ac3
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sw s7, 140(s5)
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rddsp s7
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sw s7, 148(s5)
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mfhi s7, $ac0
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sw s7, 12(s5)
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mflo s7, $ac0
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sw s7, 8(s5)
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/* Save the stack pointer to the task. */
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la s7, pxCurrentTCB
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lw s7, (s7)
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sw s5, (s7)
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/* Set the interrupt mask to the max priority that can use the API. The
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yield handler will only be called at configKERNEL_INTERRUPT_PRIORITY which
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is below configMAX_SYSCALL_INTERRUPT_PRIORITY - so this can only ever
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raise the IPL value and never lower it. */
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di
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ehb
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mfc0 s7, _CP0_STATUS
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ins s7, zero, 10, 7
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ins s7, zero, 18, 1
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ori s6, s7, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 ) | 1
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/* This mtc0 re-enables interrupts, but only above
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configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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mtc0 s6, _CP0_STATUS
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ehb
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/* Clear the software interrupt in the core. */
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mfc0 s6, _CP0_CAUSE
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ins s6, zero, 8, 1
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mtc0 s6, _CP0_CAUSE
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ehb
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/* Clear the interrupt in the interrupt controller. */
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la s6, IFS0CLR
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addiu s4, zero, 2
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sw s4, (s6)
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jal vTaskSwitchContext
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nop
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/* Clear the interrupt mask again. The saved status value is still in s7. */
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mtc0 s7, _CP0_STATUS
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ehb
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/* Restore the stack pointer from the TCB. */
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la s0, pxCurrentTCB
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lw s0, (s0)
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lw s5, (s0)
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/* Restore the rest of the context. */
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lw s0, 128(s5)
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mthi s0, $ac1
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lw s0, 124(s5)
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mtlo s0, $ac1
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lw s0, 136(s5)
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mthi s0, $ac2
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lw s0, 132(s5)
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mtlo s0, $ac2
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lw s0, 144(s5)
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mthi s0, $ac3
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lw s0, 140(s5)
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mtlo s0, $ac3
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lw s0, 148(s5)
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wrdsp s0
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lw s0, 8(s5)
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mtlo s0, $ac0
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lw s0, 12(s5)
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mthi s0, $ac0
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lw $1, 16(s5)
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lw s0, 20(s5)
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lw s1, 24(s5)
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lw s2, 28(s5)
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lw s3, 32(s5)
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lw s4, 36(s5)
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/* s5 is loaded later. */
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lw s6, 44(s5)
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lw s7, 48(s5)
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lw v0, 52(s5)
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lw v1, 56(s5)
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lw a0, 60(s5)
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lw a1, 64(s5)
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lw a2, 68(s5)
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lw a3, 72(s5)
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lw t0, 76(s5)
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lw t1, 80(s5)
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lw t2, 84(s5)
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lw t3, 88(s5)
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lw t4, 92(s5)
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lw t5, 96(s5)
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lw t6, 100(s5)
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lw t7, 104(s5)
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lw t8, 108(s5)
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lw t9, 112(s5)
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lw s8, 116(s5)
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lw ra, 120(s5)
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/* Protect access to the k registers, and others. */
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di
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ehb
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/* Set nesting back to zero. As the lowest priority interrupt this
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interrupt cannot have nested. */
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la k0, uxInterruptNesting
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sw zero, 0(k0)
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/* Switch back to use the real stack pointer. */
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add sp, zero, s5
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/* Restore the real s5 value. */
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lw s5, 40(sp)
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/* Pop the status and epc values. */
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lw k1, portSTATUS_STACK_LOCATION(sp)
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lw k0, portEPC_STACK_LOCATION(sp)
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/* Remove stack frame. */
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addiu sp, sp, portCONTEXT_SIZE
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mtc0 k1, _CP0_STATUS
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mtc0 k0, _CP0_EPC
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ehb
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eret
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nop
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.end vPortYieldISR
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