mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-11-05 03:02:36 -05:00
Add SmartFusion/SoftConsole demo. At the moment only the blinky configuration is included. The full configuration will be added soon.
This commit is contained in:
Richard Barry
parent
0e62058edb
commit
f74e406997
50 changed files with 26065 additions and 0 deletions
1102
Demo/CORTEX_A2F200_SoftConsole/MicroSemi_Code/CMSIS/a2fxxxm3.h
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1102
Demo/CORTEX_A2F200_SoftConsole/MicroSemi_Code/CMSIS/a2fxxxm3.h
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File diff suppressed because it is too large
Load diff
784
Demo/CORTEX_A2F200_SoftConsole/MicroSemi_Code/CMSIS/core_cm3.c
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784
Demo/CORTEX_A2F200_SoftConsole/MicroSemi_Code/CMSIS/core_cm3.c
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@ -0,0 +1,784 @@
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/**************************************************************************//**
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* @file core_cm3.c
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* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
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* @version V1.30
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* @date 30. October 2009
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*
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* @note
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* Copyright (C) 2009 ARM Limited. All rights reserved.
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*
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* @par
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* ARM Limited (ARM) is supplying this software for use with Cortex-M
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* processor based microcontrollers. This file can be freely distributed
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* within development tools that are supporting such ARM based processors.
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*
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* @par
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*
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******************************************************************************/
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#include <stdint.h>
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/* define compiler specific symbols */
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#if defined ( __CC_ARM )
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#define __ASM __asm /*!< asm keyword for ARM Compiler */
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#define __INLINE __inline /*!< inline keyword for ARM Compiler */
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|
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#elif defined ( __ICCARM__ )
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#define __ASM __asm /*!< asm keyword for IAR Compiler */
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#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
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#elif defined ( __GNUC__ )
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#define __ASM __asm /*!< asm keyword for GNU Compiler */
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#define __INLINE inline /*!< inline keyword for GNU Compiler */
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#elif defined ( __TASKING__ )
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#define __ASM __asm /*!< asm keyword for TASKING Compiler */
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#define __INLINE inline /*!< inline keyword for TASKING Compiler */
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#endif
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/* ################### Compiler specific Intrinsics ########################### */
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#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
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/* ARM armcc specific functions */
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/**
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* @brief Return the Process Stack Pointer
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*
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* @return ProcessStackPointer
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*
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* Return the actual process stack pointer
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*/
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__ASM uint32_t __get_PSP(void)
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{
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mrs r0, psp
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bx lr
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}
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|
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/**
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* @brief Set the Process Stack Pointer
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*
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* @param topOfProcStack Process Stack Pointer
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*
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* Assign the value ProcessStackPointer to the MSP
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* (process stack pointer) Cortex processor register
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*/
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__ASM void __set_PSP(uint32_t topOfProcStack)
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{
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msr psp, r0
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bx lr
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}
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/**
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* @brief Return the Main Stack Pointer
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*
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* @return Main Stack Pointer
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*
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* Return the current value of the MSP (main stack pointer)
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* Cortex processor register
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*/
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__ASM uint32_t __get_MSP(void)
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{
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mrs r0, msp
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bx lr
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}
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/**
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* @brief Set the Main Stack Pointer
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*
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* @param topOfMainStack Main Stack Pointer
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*
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* Assign the value mainStackPointer to the MSP
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* (main stack pointer) Cortex processor register
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*/
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__ASM void __set_MSP(uint32_t mainStackPointer)
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{
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msr msp, r0
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bx lr
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}
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/**
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* @brief Reverse byte order in unsigned short value
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*
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* @param value value to reverse
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* @return reversed value
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*
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* Reverse byte order in unsigned short value
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*/
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__ASM uint32_t __REV16(uint16_t value)
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{
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rev16 r0, r0
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bx lr
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}
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|
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/**
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* @brief Reverse byte order in signed short value with sign extension to integer
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*
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* @param value value to reverse
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* @return reversed value
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*
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* Reverse byte order in signed short value with sign extension to integer
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*/
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__ASM int32_t __REVSH(int16_t value)
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{
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revsh r0, r0
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bx lr
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}
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#if (__ARMCC_VERSION < 400000)
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/**
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* @brief Remove the exclusive lock created by ldrex
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*
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* Removes the exclusive lock which is created by ldrex.
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*/
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__ASM void __CLREX(void)
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{
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clrex
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}
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/**
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* @brief Return the Base Priority value
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*
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* @return BasePriority
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*
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* Return the content of the base priority register
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*/
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__ASM uint32_t __get_BASEPRI(void)
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{
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mrs r0, basepri
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bx lr
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}
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|
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/**
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* @brief Set the Base Priority value
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*
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* @param basePri BasePriority
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*
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* Set the base priority register
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*/
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__ASM void __set_BASEPRI(uint32_t basePri)
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{
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msr basepri, r0
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bx lr
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}
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/**
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* @brief Return the Priority Mask value
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*
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* @return PriMask
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*
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* Return state of the priority mask bit from the priority mask register
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*/
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__ASM uint32_t __get_PRIMASK(void)
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{
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mrs r0, primask
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bx lr
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}
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|
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/**
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* @brief Set the Priority Mask value
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*
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* @param priMask PriMask
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*
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* Set the priority mask bit in the priority mask register
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*/
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__ASM void __set_PRIMASK(uint32_t priMask)
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{
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msr primask, r0
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bx lr
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}
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/**
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* @brief Return the Fault Mask value
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*
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* @return FaultMask
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*
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* Return the content of the fault mask register
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*/
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__ASM uint32_t __get_FAULTMASK(void)
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{
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mrs r0, faultmask
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bx lr
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}
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/**
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* @brief Set the Fault Mask value
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*
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* @param faultMask faultMask value
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*
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* Set the fault mask register
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*/
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__ASM void __set_FAULTMASK(uint32_t faultMask)
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{
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msr faultmask, r0
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bx lr
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}
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/**
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* @brief Return the Control Register value
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*
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* @return Control value
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*
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* Return the content of the control register
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*/
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__ASM uint32_t __get_CONTROL(void)
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{
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mrs r0, control
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bx lr
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}
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/**
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* @brief Set the Control Register value
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*
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* @param control Control value
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*
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* Set the control register
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*/
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__ASM void __set_CONTROL(uint32_t control)
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{
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msr control, r0
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bx lr
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}
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#endif /* __ARMCC_VERSION */
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|
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|
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|
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#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
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/* IAR iccarm specific functions */
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||||
#pragma diag_suppress=Pe940
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|
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/**
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* @brief Return the Process Stack Pointer
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*
|
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* @return ProcessStackPointer
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*
|
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* Return the actual process stack pointer
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||||
*/
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uint32_t __get_PSP(void)
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{
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__ASM("mrs r0, psp");
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__ASM("bx lr");
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}
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|
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/**
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* @brief Set the Process Stack Pointer
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*
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* @param topOfProcStack Process Stack Pointer
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*
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* Assign the value ProcessStackPointer to the MSP
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* (process stack pointer) Cortex processor register
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*/
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void __set_PSP(uint32_t topOfProcStack)
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{
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__ASM("msr psp, r0");
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__ASM("bx lr");
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}
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|
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/**
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* @brief Return the Main Stack Pointer
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*
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* @return Main Stack Pointer
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*
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* Return the current value of the MSP (main stack pointer)
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* Cortex processor register
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*/
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uint32_t __get_MSP(void)
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{
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__ASM("mrs r0, msp");
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__ASM("bx lr");
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}
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|
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/**
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* @brief Set the Main Stack Pointer
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*
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* @param topOfMainStack Main Stack Pointer
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*
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* Assign the value mainStackPointer to the MSP
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* (main stack pointer) Cortex processor register
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*/
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void __set_MSP(uint32_t topOfMainStack)
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{
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__ASM("msr msp, r0");
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__ASM("bx lr");
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}
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|
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/**
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* @brief Reverse byte order in unsigned short value
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*
|
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* @param value value to reverse
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||||
* @return reversed value
|
||||
*
|
||||
* Reverse byte order in unsigned short value
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*/
|
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uint32_t __REV16(uint16_t value)
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{
|
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__ASM("rev16 r0, r0");
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__ASM("bx lr");
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}
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|
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/**
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* @brief Reverse bit order of value
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*
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* @param value value to reverse
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* @return reversed value
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*
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* Reverse bit order of value
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*/
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uint32_t __RBIT(uint32_t value)
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{
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__ASM("rbit r0, r0");
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__ASM("bx lr");
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}
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|
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/**
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* @brief LDR Exclusive (8 bit)
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*
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* @param *addr address pointer
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* @return value of (*address)
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*
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* Exclusive LDR command for 8 bit values)
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*/
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uint8_t __LDREXB(uint8_t *addr)
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||||
{
|
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__ASM("ldrexb r0, [r0]");
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__ASM("bx lr");
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}
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|
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/**
|
||||
* @brief LDR Exclusive (16 bit)
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||||
*
|
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* @param *addr address pointer
|
||||
* @return value of (*address)
|
||||
*
|
||||
* Exclusive LDR command for 16 bit values
|
||||
*/
|
||||
uint16_t __LDREXH(uint16_t *addr)
|
||||
{
|
||||
__ASM("ldrexh r0, [r0]");
|
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__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LDR Exclusive (32 bit)
|
||||
*
|
||||
* @param *addr address pointer
|
||||
* @return value of (*address)
|
||||
*
|
||||
* Exclusive LDR command for 32 bit values
|
||||
*/
|
||||
uint32_t __LDREXW(uint32_t *addr)
|
||||
{
|
||||
__ASM("ldrex r0, [r0]");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (8 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 8 bit values
|
||||
*/
|
||||
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||
{
|
||||
__ASM("strexb r0, r0, [r1]");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (16 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 16 bit values
|
||||
*/
|
||||
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||
{
|
||||
__ASM("strexh r0, r0, [r1]");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (32 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 32 bit values
|
||||
*/
|
||||
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||
{
|
||||
__ASM("strex r0, r0, [r1]");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
#pragma diag_default=Pe940
|
||||
|
||||
|
||||
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
|
||||
/* GNU gcc specific functions */
|
||||
|
||||
/**
|
||||
* @brief Return the Process Stack Pointer
|
||||
*
|
||||
* @return ProcessStackPointer
|
||||
*
|
||||
* Return the actual process stack pointer
|
||||
*/
|
||||
uint32_t __get_PSP(void) __attribute__( ( naked ) );
|
||||
uint32_t __get_PSP(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, psp\n\t"
|
||||
"MOV r0, %0 \n\t"
|
||||
"BX lr \n\t" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Process Stack Pointer
|
||||
*
|
||||
* @param topOfProcStack Process Stack Pointer
|
||||
*
|
||||
* Assign the value ProcessStackPointer to the MSP
|
||||
* (process stack pointer) Cortex processor register
|
||||
*/
|
||||
void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
|
||||
void __set_PSP(uint32_t topOfProcStack)
|
||||
{
|
||||
__ASM volatile ("MSR psp, %0\n\t"
|
||||
"BX lr \n\t" : : "r" (topOfProcStack) );
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Main Stack Pointer
|
||||
*
|
||||
* @return Main Stack Pointer
|
||||
*
|
||||
* Return the current value of the MSP (main stack pointer)
|
||||
* Cortex processor register
|
||||
*/
|
||||
uint32_t __get_MSP(void) __attribute__( ( naked ) );
|
||||
uint32_t __get_MSP(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, msp\n\t"
|
||||
"MOV r0, %0 \n\t"
|
||||
"BX lr \n\t" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Main Stack Pointer
|
||||
*
|
||||
* @param topOfMainStack Main Stack Pointer
|
||||
*
|
||||
* Assign the value mainStackPointer to the MSP
|
||||
* (main stack pointer) Cortex processor register
|
||||
*/
|
||||
void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
|
||||
void __set_MSP(uint32_t topOfMainStack)
|
||||
{
|
||||
__ASM volatile ("MSR msp, %0\n\t"
|
||||
"BX lr \n\t" : : "r" (topOfMainStack) );
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Base Priority value
|
||||
*
|
||||
* @return BasePriority
|
||||
*
|
||||
* Return the content of the base priority register
|
||||
*/
|
||||
uint32_t __get_BASEPRI(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Base Priority value
|
||||
*
|
||||
* @param basePri BasePriority
|
||||
*
|
||||
* Set the base priority register
|
||||
*/
|
||||
void __set_BASEPRI(uint32_t value)
|
||||
{
|
||||
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Priority Mask value
|
||||
*
|
||||
* @return PriMask
|
||||
*
|
||||
* Return state of the priority mask bit from the priority mask register
|
||||
*/
|
||||
uint32_t __get_PRIMASK(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, primask" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Priority Mask value
|
||||
*
|
||||
* @param priMask PriMask
|
||||
*
|
||||
* Set the priority mask bit in the priority mask register
|
||||
*/
|
||||
void __set_PRIMASK(uint32_t priMask)
|
||||
{
|
||||
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Fault Mask value
|
||||
*
|
||||
* @return FaultMask
|
||||
*
|
||||
* Return the content of the fault mask register
|
||||
*/
|
||||
uint32_t __get_FAULTMASK(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Fault Mask value
|
||||
*
|
||||
* @param faultMask faultMask value
|
||||
*
|
||||
* Set the fault mask register
|
||||
*/
|
||||
void __set_FAULTMASK(uint32_t faultMask)
|
||||
{
|
||||
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Control Register value
|
||||
*
|
||||
* @return Control value
|
||||
*
|
||||
* Return the content of the control register
|
||||
*/
|
||||
uint32_t __get_CONTROL(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, control" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Control Register value
|
||||
*
|
||||
* @param control Control value
|
||||
*
|
||||
* Set the control register
|
||||
*/
|
||||
void __set_CONTROL(uint32_t control)
|
||||
{
|
||||
__ASM volatile ("MSR control, %0" : : "r" (control) );
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Reverse byte order in integer value
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse byte order in integer value
|
||||
*/
|
||||
uint32_t __REV(uint32_t value)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reverse byte order in unsigned short value
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse byte order in unsigned short value
|
||||
*/
|
||||
uint32_t __REV16(uint16_t value)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reverse byte order in signed short value with sign extension to integer
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse byte order in signed short value with sign extension to integer
|
||||
*/
|
||||
int32_t __REVSH(int16_t value)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reverse bit order of value
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse bit order of value
|
||||
*/
|
||||
uint32_t __RBIT(uint32_t value)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LDR Exclusive (8 bit)
|
||||
*
|
||||
* @param *addr address pointer
|
||||
* @return value of (*address)
|
||||
*
|
||||
* Exclusive LDR command for 8 bit value
|
||||
*/
|
||||
uint8_t __LDREXB(uint8_t *addr)
|
||||
{
|
||||
uint8_t result=0;
|
||||
|
||||
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LDR Exclusive (16 bit)
|
||||
*
|
||||
* @param *addr address pointer
|
||||
* @return value of (*address)
|
||||
*
|
||||
* Exclusive LDR command for 16 bit values
|
||||
*/
|
||||
uint16_t __LDREXH(uint16_t *addr)
|
||||
{
|
||||
uint16_t result=0;
|
||||
|
||||
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LDR Exclusive (32 bit)
|
||||
*
|
||||
* @param *addr address pointer
|
||||
* @return value of (*address)
|
||||
*
|
||||
* Exclusive LDR command for 32 bit values
|
||||
*/
|
||||
uint32_t __LDREXW(uint32_t *addr)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (8 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 8 bit values
|
||||
*/
|
||||
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (16 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 16 bit values
|
||||
*/
|
||||
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (32 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 32 bit values
|
||||
*/
|
||||
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
|
||||
#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
|
||||
/* TASKING carm specific functions */
|
||||
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all instrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#endif
|
||||
1818
Demo/CORTEX_A2F200_SoftConsole/MicroSemi_Code/CMSIS/core_cm3.h
Normal file
1818
Demo/CORTEX_A2F200_SoftConsole/MicroSemi_Code/CMSIS/core_cm3.h
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,48 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2009 Actel Corporation. All rights reserved.
|
||||
*
|
||||
* Assertion implementation.
|
||||
*
|
||||
* This file provides the implementation of the ASSERT macro. This file can be
|
||||
* modified to cater for project specific requirements regarding the way
|
||||
* assertions are handled.
|
||||
*
|
||||
* SVN $Revision: 1676 $
|
||||
* SVN $Date: 2009-12-02 16:47:03 +0000 (Wed, 02 Dec 2009) $
|
||||
*/
|
||||
#ifndef __MSS_ASSERT_H_
|
||||
#define __MSS_ASSERT_H_
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
|
||||
#if defined(NDEBUG)
|
||||
|
||||
#define ASSERT(CHECK)
|
||||
|
||||
#else /* NDEBUG */
|
||||
/*
|
||||
* SoftConsole assertion handling
|
||||
*/
|
||||
#define ASSERT(CHECK) \
|
||||
do { \
|
||||
if (!(CHECK)) \
|
||||
{ \
|
||||
__asm volatile ("BKPT\n\t"); \
|
||||
} \
|
||||
} while (0);
|
||||
|
||||
#endif /* NDEBUG */
|
||||
|
||||
#else
|
||||
/*
|
||||
* IAR Embedded Workbench or Keil assertion handling.
|
||||
* Call C library assert function which should result in error message
|
||||
* displayed in debugger.
|
||||
*/
|
||||
#define ASSERT(X) assert(X)
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __MSS_ASSERT_H_ */
|
||||
|
|
@ -0,0 +1,184 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2009 Actel Corporation. All rights reserved.
|
||||
*
|
||||
* SmartFusion/Cortex-M3 linker script for creating a SoftConsole downloadable
|
||||
* debug image executing in SmartFusion internal eNVM.
|
||||
*
|
||||
* SVN $Revision: 1677 $
|
||||
* SVN $Date: 2009-12-02 16:57:29 +0000 (Wed, 02 Dec 2009) $
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
|
||||
"elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/*
|
||||
* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
|
||||
* the name of the type of flash memory are all in a specific order.
|
||||
* Please do not modify that comment line, in order to ensure
|
||||
* debugging of your application will use the flash memory correctly.
|
||||
*/
|
||||
|
||||
/* SOFTCONSOLE FLASH USE: actel-smartfusion-envm */
|
||||
rom (rx) : ORIGIN = 0x60000000, LENGTH = 256k
|
||||
|
||||
/* SmartFusion internal eNVM mirrored to 0x00000000 */
|
||||
romMirror (rx) : ORIGIN = 0x00000000, LENGTH = 256k
|
||||
|
||||
/* SmartFusion internal eSRAM */
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x20000000; /* Must be the same value MEMORY region ram ORIGIN above. */
|
||||
RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
|
||||
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
||||
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 1); /* Indicate to startup code that NVM is mirrored to VMA address and no text copy is required. */
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.init :
|
||||
{
|
||||
*(.isr_vector)
|
||||
*sys_boot.o(.text)
|
||||
. = ALIGN(0x4);
|
||||
} >romMirror AT>rom
|
||||
|
||||
.text :
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text);
|
||||
__text_start = .;
|
||||
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(0x4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >romMirror AT>rom
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >ram AT>rom
|
||||
__exidx_end = .;
|
||||
_etext = .;
|
||||
|
||||
.data :
|
||||
{
|
||||
__data_load = LOADADDR(.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN (4);
|
||||
_edata = .;
|
||||
} >ram AT>rom
|
||||
|
||||
.bss :
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (8);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >ram AT>rom
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
|
@ -0,0 +1,177 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2009 Actel Corporation. All rights reserved.
|
||||
*
|
||||
* SmartFusion/Cortex-M3 linker script for creating a SoftConsole downloadable
|
||||
* debug image executing in SmartFusion internal eSRAM.
|
||||
*
|
||||
* SVN $Revision: 1677 $
|
||||
* SVN $Date: 2009-12-02 16:57:29 +0000 (Wed, 02 Dec 2009) $
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
|
||||
"elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/* SmartFusion internal eSRAM */
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x20000000; /* Must be the same value MEMORY region ram ORIGIN above. */
|
||||
RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
|
||||
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
||||
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text);
|
||||
__text_start = .;
|
||||
*(.isr_vector)
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(0x4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >ram
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >ram
|
||||
__exidx_end = .;
|
||||
_etext = .;
|
||||
PROVIDE(__text_end = .);
|
||||
|
||||
.data :
|
||||
{
|
||||
__data_load = LOADADDR (.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN (4);
|
||||
_edata = .;
|
||||
} >ram
|
||||
|
||||
.bss :
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (8);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >ram
|
||||
|
||||
/*
|
||||
* The .stack section is only specified here in order for the linker to generate
|
||||
* an error if the ram is full.
|
||||
*/
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
. += PROCESS_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
. += MAIN_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
} >ram
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) *(.isr_vector) }
|
||||
}
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2009 Actel Corporation. All rights reserved.
|
||||
*
|
||||
* SmartFusion/Cortex-M3 linker script for creating a SoftConsole downloadable
|
||||
* debug image executing in SmartFusion development board external RAM.
|
||||
*
|
||||
* SVN $Revision: 2014 $
|
||||
* SVN $Date: 2010-01-20 10:37:26 +0000 (Wed, 20 Jan 2010) $
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
|
||||
"elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/* SmartFusion internal eSRAM */
|
||||
esram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
|
||||
/* SmartFusion development board external RAM */
|
||||
external_ram (rwx) : ORIGIN = 0x70000000, LENGTH = 2M
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x70000000; /* Must be the same value MEMORY region ram ORIGIN above. */
|
||||
RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
|
||||
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
||||
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.init :
|
||||
{
|
||||
*(.isr_vector)
|
||||
. = ALIGN(0x4);
|
||||
} >esram
|
||||
|
||||
.text :
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text);
|
||||
__text_start = .;
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(0x4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >external_ram
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >external_ram
|
||||
__exidx_end = .;
|
||||
_etext = .;
|
||||
PROVIDE(__text_end = .);
|
||||
|
||||
.data :
|
||||
{
|
||||
__data_load = LOADADDR (.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN (4);
|
||||
_edata = .;
|
||||
} >external_ram
|
||||
|
||||
.bss :
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (8);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >external_ram
|
||||
|
||||
/*
|
||||
* The .stack section is only specified here in order for the linker to generate
|
||||
* an error if the esram is full.
|
||||
*/
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
. += PROCESS_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
. += MAIN_STACK_SIZE;
|
||||
. = ALIGN(4);
|
||||
} >external_ram
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) *(.isr_vector) }
|
||||
}
|
||||
|
|
@ -0,0 +1,247 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2009 Actel Corporation. All rights reserved.
|
||||
*
|
||||
* Stubs for Newlib system calls.
|
||||
*
|
||||
* SVN $Revision: 2020 $
|
||||
* SVN $Date: 2010-01-20 14:51:50 +0000 (Wed, 20 Jan 2010) $
|
||||
*/
|
||||
#include <stdlib.h>
|
||||
#include <sys/unistd.h>
|
||||
#include <sys/stat.h>
|
||||
#include <sys/times.h>
|
||||
#include <errno.h>
|
||||
#undef errno
|
||||
extern int errno;
|
||||
|
||||
/*==============================================================================
|
||||
* Redirection of standard output to a SmartFusion MSS UART.
|
||||
*------------------------------------------------------------------------------
|
||||
* A default implementation for the redirection of the output of printf() to a
|
||||
* UART is provided as the bottom of this file. This redirection is enabled by
|
||||
* adding the symbol/define ACTEL_STDIO_THRU_UART to your project and
|
||||
* specifying the baud rate using the ACTEL_STDIO_BAUD_RATE define.
|
||||
*/
|
||||
#ifdef ACTEL_STDIO_THRU_UART
|
||||
#include "../../drivers/mss_uart/mss_uart.h"
|
||||
|
||||
#ifndef ACTEL_STDIO_BAUD_RATE
|
||||
#define ACTEL_STDIO_BAUD_RATE MSS_UART_57600_BAUD
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Global flag used to indicate if the UART driver needs to be initialized.
|
||||
*/
|
||||
static int g_stdio_uart_init_done = 0;
|
||||
|
||||
#endif /* ACTEL_STDIO_THRU_UART */
|
||||
|
||||
/*==============================================================================
|
||||
* Environment variables.
|
||||
* A pointer to a list of environment variables and their values. For a minimal
|
||||
* environment, this empty list is adequate:
|
||||
*/
|
||||
char *__env[1] = { 0 };
|
||||
char **environ = __env;
|
||||
|
||||
/*==============================================================================
|
||||
* Close a file.
|
||||
*/
|
||||
int _close(int file)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Transfer control to a new process.
|
||||
*/
|
||||
int _execve(char *name, char **argv, char **env)
|
||||
{
|
||||
errno = ENOMEM;
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Exit a program without cleaning up files.
|
||||
*/
|
||||
void _exit( int code )
|
||||
{
|
||||
/* Should we force a system reset? */
|
||||
while( 1 )
|
||||
{
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Create a new process.
|
||||
*/
|
||||
int _fork(void)
|
||||
{
|
||||
errno = EAGAIN;
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Status of an open file.
|
||||
*/
|
||||
int _fstat(int file, struct stat *st)
|
||||
{
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Process-ID
|
||||
*/
|
||||
int _getpid(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Query whether output stream is a terminal.
|
||||
*/
|
||||
int _isatty(int file)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Send a signal.
|
||||
*/
|
||||
int _kill(int pid, int sig)
|
||||
{
|
||||
errno = EINVAL;
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Establish a new name for an existing file.
|
||||
*/
|
||||
int _link(char *old, char *new)
|
||||
{
|
||||
errno = EMLINK;
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Set position in a file.
|
||||
*/
|
||||
int _lseek(int file, int ptr, int dir)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Open a file.
|
||||
*/
|
||||
int _open(const char *name, int flags, int mode)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Read from a file.
|
||||
*/
|
||||
int _read(int file, char *ptr, int len)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Increase program data space. As malloc and related functions depend on this,
|
||||
* it is useful to have a working implementation. The following suffices for a
|
||||
* standalone system; it exploits the symbol _end automatically defined by the
|
||||
* GNU linker.
|
||||
*/
|
||||
caddr_t _sbrk(int incr)
|
||||
{
|
||||
extern char _end; /* Defined by the linker */
|
||||
static char *heap_end;
|
||||
char *prev_heap_end;
|
||||
char * stack_ptr;
|
||||
|
||||
if (heap_end == 0)
|
||||
{
|
||||
heap_end = &_end;
|
||||
}
|
||||
|
||||
prev_heap_end = heap_end;
|
||||
asm volatile ("MRS %0, msp" : "=r" (stack_ptr) );
|
||||
if (heap_end + incr > stack_ptr)
|
||||
{
|
||||
write (1, "Heap and stack collision\n", 25);
|
||||
abort ();
|
||||
}
|
||||
|
||||
heap_end += incr;
|
||||
return (caddr_t) prev_heap_end;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Status of a file (by name).
|
||||
*/
|
||||
int _stat(char *file, struct stat *st)
|
||||
{
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Timing information for current process.
|
||||
*/
|
||||
int _times(struct tms *buf)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Remove a file's directory entry.
|
||||
*/
|
||||
int _unlink(char *name)
|
||||
{
|
||||
errno = ENOENT;
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Wait for a child process.
|
||||
*/
|
||||
int _wait(int *status)
|
||||
{
|
||||
errno = ECHILD;
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* Write to a file. libc subroutines will use this system routine for output to
|
||||
* all files, including stdout—so if you need to generate any output, for
|
||||
* example to a serial port for debugging, you should make your minimal write
|
||||
* capable of doing this.
|
||||
*/
|
||||
int _write_r( void * reent, int file, char * ptr, int len )
|
||||
{
|
||||
#ifdef ACTEL_STDIO_THRU_UART
|
||||
/*--------------------------------------------------------------------------
|
||||
* Initialize the UART driver if it is the first time this function is
|
||||
* called.
|
||||
*/
|
||||
if ( !g_stdio_uart_init_done )
|
||||
{
|
||||
MSS_UART_init( &g_mss_uart0, ACTEL_STDIO_BAUD_RATE, (MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY));
|
||||
g_stdio_uart_init_done = 1;
|
||||
}
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
* Output text to the UART.
|
||||
*/
|
||||
MSS_UART_polled_tx( &g_mss_uart0, (uint8_t *)ptr, len );
|
||||
|
||||
return len;
|
||||
#else /* ACTEL_STDIO_THRU_UART */
|
||||
return 0;
|
||||
#endif /* ACTEL_STDIO_THRU_UART */
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,172 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2009 Actel Corporation. All rights reserved.
|
||||
*
|
||||
* SmartFusion/Cortex-M3 linker script creating an executable image for use in
|
||||
* the Libero flow for executing code in place in internal eNVM.
|
||||
*
|
||||
* SVN $Revision: 1766 $
|
||||
* SVN $Date: 2009-12-11 16:33:35 +0000 (Fri, 11 Dec 2009) $
|
||||
*/
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
|
||||
"elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/* SmartFusion internal eNVM */
|
||||
rom (rx) : ORIGIN = 0, LENGTH = 256k
|
||||
|
||||
/* SmartFusion internal eSRAM */
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x20000000; /* Must be the same value as MEMORY region ram ORIGIN above. */
|
||||
RAM_SIZE = 64k; /* Must be the same value as MEMORY region ram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
|
||||
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
||||
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.reset :
|
||||
{
|
||||
*(.isr_vector)
|
||||
*sys_boot.o(.text)
|
||||
. = ALIGN(0x4);
|
||||
} >rom
|
||||
|
||||
.text :
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text);
|
||||
__text_start = .;
|
||||
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(0x4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >rom
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >rom
|
||||
__exidx_end = .;
|
||||
_etext = .;
|
||||
|
||||
.data :
|
||||
{
|
||||
__data_load = LOADADDR(.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN (4);
|
||||
_edata = .;
|
||||
} >ram AT>rom
|
||||
|
||||
.bss :
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (8);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >ram AT>rom
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
|
@ -0,0 +1,176 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2009 Actel Corporation. All rights reserved.
|
||||
*
|
||||
* SmartFusion/Cortex-M3 linker script creating an executable image for use in
|
||||
* the Libero flow for relocating executable from internal eNVM to external RAM
|
||||
* before starting execution.
|
||||
*
|
||||
* SVN $Revision: 1766 $
|
||||
* SVN $Date: 2009-12-11 16:33:35 +0000 (Fri, 11 Dec 2009) $
|
||||
*/
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
|
||||
"elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/* SmartFusion internal eNVM */
|
||||
rom (rx) : ORIGIN = 0, LENGTH = 256k
|
||||
|
||||
/* SmartFusion internal eSRAM */
|
||||
esram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
|
||||
/* SmartFusion development board external RAM */
|
||||
external_ram (rwx) : ORIGIN = 0x70000000, LENGTH = 2M
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x20000000; /* Must be the same value as MEMORY region esram ORIGIN above. */
|
||||
RAM_SIZE = 64k; /* Must be the same value as MEMORY region esram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
|
||||
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
||||
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.reset :
|
||||
{
|
||||
*(.isr_vector)
|
||||
/* *sys_boot.o(.text)*/
|
||||
. = ALIGN(0x4);
|
||||
} >rom
|
||||
|
||||
.text :
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text);
|
||||
__text_start = .;
|
||||
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(0x4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >external_ram AT>rom
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >external_ram AT>rom
|
||||
__exidx_end = .;
|
||||
_etext = .;
|
||||
|
||||
.data :
|
||||
{
|
||||
__data_load = LOADADDR(.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN (4);
|
||||
_edata = .;
|
||||
} >esram AT>rom
|
||||
|
||||
.bss :
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (8);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >esram AT>rom
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,199 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2009 Actel Corporation. All rights reserved.
|
||||
*
|
||||
* SmartFusion A2FxxxM3 CMSIS system initialization.
|
||||
*
|
||||
* SVN $Revision: 2069 $
|
||||
* SVN $Date: 2010-01-28 00:23:48 +0000 (Thu, 28 Jan 2010) $
|
||||
*/
|
||||
#include "a2fxxxm3.h"
|
||||
#include "mss_assert.h"
|
||||
|
||||
/* System frequency (FCLK) coming out of reset is 25MHz. */
|
||||
#define RESET_SYSCLCK_FREQ 25000000uL
|
||||
|
||||
/*
|
||||
* SmartFusion Microcontroller Subsystem FLCK frequency.
|
||||
* The value of SMARTFUSION_FCLK_FREQ is used to report the system's clock
|
||||
* frequency in system's which either do not use the Actel System Boot or
|
||||
* a version of the Actel System Boot older than 1.3.1. In eitehr of these cases
|
||||
* SMARTFUSION_FCLK_FREQ should be defined in the projects settings to reflect
|
||||
* the FCLK frequency selected in the Libero MSS configurator.
|
||||
* Systems using the Actel System Boot version 1.3.1 or later do not require this
|
||||
* define since the system's frequency is retrieved from eNVM spare pages where
|
||||
* the MSS Configurator stored the frequency selected during hardware design/configuration.
|
||||
*/
|
||||
#ifdef SMARTFUSION_FCLK_FREQ
|
||||
#define SMARTFUSION_FCLK_FREQ_DEFINED 1
|
||||
#else
|
||||
#define SMARTFUSION_FCLK_FREQ_DEFINED 0
|
||||
#define SMARTFUSION_FCLK_FREQ RESET_SYSCLCK_FREQ
|
||||
#endif
|
||||
|
||||
/* Divider values for APB0, APB1 and ACE clocks. */
|
||||
#define RESET_PCLK0_DIV 4uL
|
||||
#define RESET_PCLK1_DIV 4uL
|
||||
#define RESET_ACE_DIV 4uL
|
||||
#define RESET_FPGA_CLK_DIV 4uL
|
||||
|
||||
/* System register clock control mask and shift for PCLK dividers. */
|
||||
#define PCLK_DIV_MASK 0x00000003uL
|
||||
#define PCLK0_DIV_SHIFT 2uL
|
||||
#define PCLK1_DIV_SHIFT 4uL
|
||||
#define ACE_DIV_SHIFT 6uL
|
||||
|
||||
/* System register MSS_CCC_DIV_CR mask and shift for GLB (FPGA fabric clock). */
|
||||
#define OBDIV_SHIFT 8uL
|
||||
#define OBDIV_MASK 0x0000001FuL
|
||||
#define OBDIVHALF_SHIFT 13uL
|
||||
#define OBDIVHALF_MASK 0x00000001uL
|
||||
|
||||
/*
|
||||
* Actel system boot version defines used to extract the system clock from eNVM
|
||||
* spare pages.
|
||||
* These defines allow detecting the presence of Actel system boot in eNVM spare
|
||||
* pages and the version of that system boot executable and associated
|
||||
* configuration data.
|
||||
*/
|
||||
#define SYSBOOT_KEY_ADDR (uint32_t *)0x6008081C
|
||||
#define SYSBOOT_KEY_VALUE 0x4C544341uL
|
||||
#define SYSBOOT_VERSION_ADDR (uint32_t *)0x60080840
|
||||
#define SYSBOOT_1_3_FCLK_ADDR (uint32_t *)0x6008162C
|
||||
#define SYSBOOT_2_x_FCLK_ADDR (uint32_t *)0x60081EAC
|
||||
|
||||
/*
|
||||
* The system boot version is stored in the least significant 24 bits of a word.
|
||||
* The FCLK is stored in eNVM from version 1.3.1 of the system boot. We expect
|
||||
* that the major version number of the system boot version will change if the
|
||||
* system boot configuration data layout needs to change.
|
||||
*/
|
||||
#define SYSBOOT_VERSION_MASK 0x00FFFFFFuL
|
||||
#define MIN_SYSBOOT_VERSION 0x00010301uL
|
||||
#define SYSBOOT_VERSION_2_X 0x00020000uL
|
||||
#define MAX_SYSBOOT_VERSION 0x00030000uL
|
||||
|
||||
/* Standard CMSIS global variables. */
|
||||
uint32_t SystemFrequency = SMARTFUSION_FCLK_FREQ; /*!< System Clock Frequency (Core Clock) */
|
||||
uint32_t SystemCoreClock = SMARTFUSION_FCLK_FREQ; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
/* SmartFusion specific clocks. */
|
||||
uint32_t g_FrequencyPCLK0 = (SMARTFUSION_FCLK_FREQ / RESET_PCLK0_DIV); /*!< Clock frequency of APB bus 0. */
|
||||
uint32_t g_FrequencyPCLK1 = (SMARTFUSION_FCLK_FREQ / RESET_PCLK1_DIV); /*!< Clock frequency of APB bus 1. */
|
||||
uint32_t g_FrequencyACE = (SMARTFUSION_FCLK_FREQ / RESET_ACE_DIV); /*!< Clock frequency of Analog Compute Engine. */
|
||||
uint32_t g_FrequencyFPGA = (SMARTFUSION_FCLK_FREQ / RESET_FPGA_CLK_DIV); /*!< Clock frequecny of FPGA fabric */
|
||||
|
||||
/* Local functions */
|
||||
static uint32_t GetSystemClock( void );
|
||||
|
||||
/***************************************************************************//**
|
||||
* See system_a2fm3fxxx.h for details.
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
}
|
||||
|
||||
/***************************************************************************//**
|
||||
*
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t PclkDiv0;
|
||||
uint32_t PclkDiv1;
|
||||
uint32_t AceDiv;
|
||||
uint32_t FabDiv;
|
||||
|
||||
const uint32_t pclk_div_lut[4] = { 1uL, 2uL, 4uL, 1uL };
|
||||
|
||||
/* Read PCLK dividers from system registers. Multiply the value read from
|
||||
* system register by two to get actual divider value. */
|
||||
PclkDiv0 = pclk_div_lut[((SYSREG->MSS_CLK_CR >> PCLK0_DIV_SHIFT) & PCLK_DIV_MASK)];
|
||||
PclkDiv1 = pclk_div_lut[((SYSREG->MSS_CLK_CR >> PCLK1_DIV_SHIFT) & PCLK_DIV_MASK)];
|
||||
AceDiv = pclk_div_lut[((SYSREG->MSS_CLK_CR >> ACE_DIV_SHIFT) & PCLK_DIV_MASK)];
|
||||
{
|
||||
/* Compute the FPGA fabric frequency divider. */
|
||||
uint32_t obdiv;
|
||||
uint32_t obdivhalf;
|
||||
|
||||
obdiv = (SYSREG->MSS_CCC_DIV_CR >> OBDIV_SHIFT) & OBDIV_MASK;
|
||||
obdivhalf = (SYSREG->MSS_CCC_DIV_CR >> OBDIVHALF_SHIFT) & OBDIVHALF_MASK;
|
||||
FabDiv = obdiv + 1uL;
|
||||
if ( obdivhalf != 0uL )
|
||||
{
|
||||
FabDiv = FabDiv * 2uL;
|
||||
}
|
||||
}
|
||||
|
||||
/* Retrieve FCLK from eNVM spare pages if Actel system boot programmed as part of the system. */
|
||||
|
||||
/* Read system clock from eNVM spare pages. */
|
||||
SystemCoreClock = GetSystemClock();
|
||||
g_FrequencyPCLK0 = SystemCoreClock / PclkDiv0;
|
||||
g_FrequencyPCLK1 = SystemCoreClock / PclkDiv1;
|
||||
g_FrequencyACE = SystemCoreClock / AceDiv;
|
||||
g_FrequencyFPGA = SystemCoreClock / FabDiv;
|
||||
|
||||
/* Keep SystemFrequency as well as SystemCoreClock for legacy reasons. */
|
||||
SystemFrequency = SystemCoreClock;
|
||||
}
|
||||
|
||||
/***************************************************************************//**
|
||||
* Retrieve the system clock frequency from eNVM spare page if available.
|
||||
* Returns the frequency defined through SMARTFUSION_FCLK_FREQ if FCLK cannot be
|
||||
* retrieved from eNVM spare pages.
|
||||
* The FCLK frequency value selected in the MSS Configurator software tool is
|
||||
* stored in eNVM spare pages as part of the Actel system boot configuration data.
|
||||
*/
|
||||
uint32_t GetSystemClock( void )
|
||||
{
|
||||
uint32_t fclk = 0uL;
|
||||
|
||||
uint32_t * p_sysboot_key = SYSBOOT_KEY_ADDR;
|
||||
|
||||
if ( SYSBOOT_KEY_VALUE == *p_sysboot_key )
|
||||
{
|
||||
/* Actel system boot programmed, check if it has the FCLK value stored. */
|
||||
uint32_t *p_sysboot_version = SYSBOOT_VERSION_ADDR;
|
||||
uint32_t sysboot_version = *p_sysboot_version;
|
||||
|
||||
sysboot_version &= SYSBOOT_VERSION_MASK;
|
||||
|
||||
if ( sysboot_version >= MIN_SYSBOOT_VERSION )
|
||||
{
|
||||
/* Handle change of eNVM location of FCLK between 1.3.x and 2.x.x versions of the system boot. */
|
||||
if ( sysboot_version < SYSBOOT_VERSION_2_X )
|
||||
{
|
||||
/* Read FCLK value from MSS configurator generated configuration
|
||||
* data stored in eNVM spare pages as part of system boot version 1.3.x
|
||||
* configuration tables. */
|
||||
uint32_t *p_fclk = SYSBOOT_1_3_FCLK_ADDR;
|
||||
fclk = *p_fclk;
|
||||
}
|
||||
else if ( sysboot_version < MAX_SYSBOOT_VERSION )
|
||||
{
|
||||
/* Read FCLK value from MSS configurator generated configuration
|
||||
* data stored in eNVM spare pages as part of system boot version 2.x.x
|
||||
* configuration tables. */
|
||||
uint32_t *p_fclk = SYSBOOT_2_x_FCLK_ADDR;
|
||||
fclk = *p_fclk;
|
||||
}
|
||||
else
|
||||
{
|
||||
fclk = 0uL;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if ( 0uL == fclk )
|
||||
{
|
||||
/*
|
||||
* Could not retrieve FCLK from system boot configuration data. Fall back
|
||||
* to using SMARTFUSION_FCLK_FREQ which must then be defined as part of
|
||||
* project settings.
|
||||
*/
|
||||
ASSERT( SMARTFUSION_FCLK_FREQ_DEFINED );
|
||||
fclk = SMARTFUSION_FCLK_FREQ;
|
||||
}
|
||||
|
||||
return fclk;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2009 Actel Corporation. All rights reserved.
|
||||
*
|
||||
* SmartFusion A2FxxxM3 CMSIS system initialization.
|
||||
*
|
||||
* SVN $Revision: 2064 $
|
||||
* SVN $Date: 2010-01-27 15:05:58 +0000 (Wed, 27 Jan 2010) $
|
||||
*/
|
||||
|
||||
#ifndef __SYSTEM_A2FM3FXX_H__
|
||||
#define __SYSTEM_A2FM3FXX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Standard CMSIS global variables. */
|
||||
extern uint32_t SystemFrequency; /*!< System Clock Frequency (Core Clock) */
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
/* SmartFusion specific clocks. */
|
||||
extern uint32_t g_FrequencyPCLK0; /*!< Clock frequency of APB bus 0. */
|
||||
extern uint32_t g_FrequencyPCLK1; /*!< Clock frequency of APB bus 1. */
|
||||
extern uint32_t g_FrequencyACE; /*!< Clock frequency of Analog Compute Engine. */
|
||||
extern uint32_t g_FrequencyFPGA; /*!< Clock frequecny of FPGA fabric */
|
||||
|
||||
/***************************************************************************//**
|
||||
* The SystemInit() is a standard CMSIS function called during system startup.
|
||||
* It is meant to perform low level hardware setup such as configuring PLLs. In
|
||||
* the case of SmartFusion these hardware setup operations are performed by the
|
||||
* chip boot which executed before the application started. Therefore this
|
||||
* function does not need to perform any hardware setup.
|
||||
*/
|
||||
void SystemInit(void);
|
||||
|
||||
/***************************************************************************//**
|
||||
* The SystemCoreClockUpdate() is a standard CMSIS function which can be called
|
||||
* by the application in order to ensure that the SystemCoreClock global
|
||||
* variable contains the up to date Cortex-M3 core frequency. Calling this
|
||||
* function also updates the global variables containing the frequencies of the
|
||||
* APB busses connecting the peripherals and the ACE frequency.
|
||||
*/
|
||||
void SystemCoreClockUpdate(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Loading…
Add table
Add a link
Reference in a new issue