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Update the RegTest.S file used by several GCC RISC-V demos to ensure correct alignment of constant loads from assembly code.

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This commit is contained in:
Richard Barry 2019-10-14 00:16:25 +00:00
parent 96e61a10a5
commit f6edf4adf9
3 changed files with 12 additions and 3 deletions
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2
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/main.c
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@ -58,7 +58,7 @@
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,
or 0 to run the more comprehensive test and demo application. */
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0
/* Index to first HART (there is only one). */
#define mainHART_0 0