Update RISC-V project to used official port stubs in place of third party port.

This commit is contained in:
Richard Barry 2018-07-07 21:54:41 +00:00
parent 3bfc32d444
commit f6cbf20019
9 changed files with 52 additions and 35 deletions

View file

@ -49,7 +49,7 @@
<tool command="${cross_prefix}${cross_c}${cross_suffix}" commandLinePattern="${COMMAND} ${cross_toolchain_flags} ${FLAGS} -c ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS}" errorParsers="org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GCCErrorParser" id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.894708922" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths.1818715770" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS_Source/include}&quot;"/>
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS_Source/portable/ThirdParty/GCC/RISC-V}&quot;"/>
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS_Source/portable/GCC/RISC-V-RV32}&quot;"/>
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}}&quot;"/>
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/drivers/CoreGPIO}&quot;"/>
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/drivers/Core16550}&quot;"/>

View file

@ -104,16 +104,16 @@
</matcher>
</filter>
<filter>
<id>1529524475525</id>
<id>1531000165521</id>
<name>FreeRTOS_Source/portable</name>
<type>9</type>
<matcher>
<id>org.eclipse.ui.ide.multiFilter</id>
<arguments>1.0-name-matches-false-false-ThirdParty</arguments>
<arguments>1.0-name-matches-false-false-GCC</arguments>
</matcher>
</filter>
<filter>
<id>1529524475530</id>
<id>1531000165526</id>
<name>FreeRTOS_Source/portable</name>
<type>9</type>
<matcher>
@ -121,6 +121,15 @@
<arguments>1.0-name-matches-false-false-MemMang</arguments>
</matcher>
</filter>
<filter>
<id>1531000203197</id>
<name>FreeRTOS_Source/portable/GCC</name>
<type>9</type>
<matcher>
<id>org.eclipse.ui.ide.multiFilter</id>
<arguments>1.0-name-matches-false-false-RISC-V-RV32</arguments>
</matcher>
</filter>
<filter>
<id>1529524494421</id>
<name>FreeRTOS_Source/portable/MemMang</name>
@ -130,24 +139,6 @@
<arguments>1.0-name-matches-false-false-heap_4.c</arguments>
</matcher>
</filter>
<filter>
<id>1529524515837</id>
<name>FreeRTOS_Source/portable/ThirdParty</name>
<type>9</type>
<matcher>
<id>org.eclipse.ui.ide.multiFilter</id>
<arguments>1.0-name-matches-false-false-GCC</arguments>
</matcher>
</filter>
<filter>
<id>1529524627661</id>
<name>FreeRTOS_Source/portable/ThirdParty/GCC</name>
<type>9</type>
<matcher>
<id>org.eclipse.ui.ide.multiFilter</id>
<arguments>1.0-name-matches-false-false-RISC-V</arguments>
</matcher>
</filter>
</filteredResources>
<variableList>
<variable>

View file

@ -5,7 +5,7 @@
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="886405286544253612" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1033716199933845767" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>

View file

@ -87,13 +87,12 @@
#include <stdint.h>
#include <string.h>
#include "riscv_plic.h"
extern uint32_t SystemCoreClock;
#include "hw_platform.h"
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned long ) 83000000 )
#define configCPU_CLOCK_HZ ( ( unsigned long ) ( SYS_CLK_FREQ / 100UL ) ) /*_RB_ Seems to be a factor of 100 between machine timer frequency and CPU frequency. */
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 1024 )
@ -104,7 +103,7 @@ extern uint32_t SystemCoreClock;
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 8
#define configCHECK_FOR_STACK_OVERFLOW 0 //2
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_MALLOC_FAILED_HOOK 1
#define configUSE_APPLICATION_TASK_TAG 0

View file

@ -34,7 +34,7 @@
* This is the only clock brought over from the Mi-V Soft processor Libero design.
*/
#ifndef SYS_CLK_FREQ
#define SYS_CLK_FREQ 83000000UL
#define SYS_CLK_FREQ 50000000UL
#endif
/***************************************************************************//**

View file

@ -4,12 +4,25 @@
#include "timers.h"
#include "hw_platform.h"
#include "riscv_hal.h"
#include "hal.h"
#include "core_gpio.h"
#include "core_timer.h"
#include "core_uart_apb.h"
#include "task.h"
const char * g_hello_msg = "\r\nFreeRTOS Example\r\n";
/*
* Notes:
* + Program the device using the flash project in
* MS-RISC-V\M2GL025-Creative-Board\Programming_The_Target_Device\PROC_SUBSYSTEM_MIV_RV32IMA_BaseDesign.
* See https://github.com/RISCV-on-Microsemi-FPGA/M2GL025-Creative-Board.
* + Above referenced image sets the clock to 50MHz. *
* + Debug configuration is critical.
*/
/* A block time of zero simply means "don't block". */
#define mainDONT_BLOCK ( 0UL )
@ -37,11 +50,22 @@ void vApplicationIdleHook( void );
*/
void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName );
/*_RB_
gpio_instance_t g_gpio0;
gpio_instance_t g_gpio1;
timer_instance_t g_timer0;
timer_instance_t g_timer1;
/*-----------------------------------------------------------*/
extern uint32_t SysTick_Config(uint32_t ticks);
extern void __enable_irq(void);
int main( void )
{
PLIC_init();
//_RB_ GPIO_init(&g_gpio0, COREGPIO_IN_BASE_ADDR, GPIO_APB_32_BITS_BUS);
//_RB_ GPIO_init(&g_gpio1, COREGPIO_OUT_BASE_ADDR, GPIO_APB_32_BITS_BUS);
/**************************************************************************
* Initialize CoreUART with its base address, baud value, and line
@ -55,7 +79,7 @@ int main( void )
/* Create the two test tasks. */
xTaskCreate( vUartTestTask1, "UArt1", 1000, NULL, uartPRIMARY_PRIORITY, NULL );
xTaskCreate( vUartTestTask2, "UArt2", 1000, NULL, uartPRIMARY_PRIORITY, NULL );
// xTaskCreate( vUartTestTask2, "UArt2", 1000, NULL, uartPRIMARY_PRIORITY, NULL );
/* Start the kernel. From here on, only tasks and interrupts will run. */
vTaskStartScheduler();
@ -117,7 +141,7 @@ static void vUartTestTask1( void *pvParameters )
for( ;; )
{
UART_polled_tx_string( &g_uart, (const uint8_t *)"Task - 1\r\n" );
vTaskDelay(10);
vTaskDelay( pdMS_TO_TICKS( 100 ) );
}
}
@ -130,7 +154,7 @@ static void vUartTestTask2( void *pvParameters )
for( ;; )
{
UART_polled_tx_string( &g_uart, (const uint8_t *)"Task - 2\r\n" );
// UART_polled_tx_string( &g_uart, (const uint8_t *)"Task - 2\r\n" );
vTaskDelay(5);
}
}

View file

@ -44,6 +44,7 @@
* <corename>_<instance>_BASE_ADDR
*/
#define COREUARTAPB0_BASE_ADDR 0x70001000UL
#define COREGPIO_BASE_ADDR 0x70002000UL
#define COREGPIO_IN_BASE_ADDR 0x70002000UL
#define CORETIMER0_BASE_ADDR 0x70003000UL
#define CORETIMER1_BASE_ADDR 0x70004000UL