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This commit is contained in:
Richard Barry 2011-04-20 18:24:00 +00:00
parent 139708e063
commit f53955df4a
8 changed files with 973 additions and 2645 deletions
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184
Demo/CORTEX_A2F200_IAR_and_Keil/MicroSemi_Code/CMSIS/startup_gcc/debug-in-actel-smartfusion-envm.ld
View file

@ -1,184 +0,0 @@
/*******************************************************************************
* (c) Copyright 2009 Actel Corporation. All rights reserved.
*
* SmartFusion/Cortex-M3 linker script for creating a SoftConsole downloadable
* debug image executing in SmartFusion internal eNVM.
*
* SVN $Revision: 1677 $
* SVN $Date: 2009-12-02 16:57:29 +0000 (Wed, 02 Dec 2009) $
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
"elf32-littlearm")
GROUP(-lc -lgcc -lm)
OUTPUT_ARCH(arm)
ENTRY(Reset_Handler)
SEARCH_DIR(.)
__DYNAMIC = 0;
/*******************************************************************************
* Start of board customization.
*******************************************************************************/
MEMORY
{
/*
* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
* the name of the type of flash memory are all in a specific order.
* Please do not modify that comment line, in order to ensure
* debugging of your application will use the flash memory correctly.
*/
/* SOFTCONSOLE FLASH USE: actel-smartfusion-envm */
rom (rx) : ORIGIN = 0x60000000, LENGTH = 256k
/* SmartFusion internal eNVM mirrored to 0x00000000 */
romMirror (rx) : ORIGIN = 0x00000000, LENGTH = 256k
/* SmartFusion internal eSRAM */
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
}
RAM_START_ADDRESS = 0x20000000; /* Must be the same value MEMORY region ram ORIGIN above. */
RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
/*******************************************************************************
* End of board customization.
*******************************************************************************/
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
PROVIDE (_estack = __main_stack_start);
PROVIDE (__mirrored_nvm = 1); /* Indicate to startup code that NVM is mirrored to VMA address and no text copy is required. */
SECTIONS
{
.init :
{
*(.isr_vector)
*sys_boot.o(.text)
. = ALIGN(0x4);
} >romMirror AT>rom
.text :
{
CREATE_OBJECT_SYMBOLS
__text_load = LOADADDR(.text);
__text_start = .;
*(.text .text.* .gnu.linkonce.t.*)
*(.plt)
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(0x4);
/* These are for running static constructors and destructors under ELF. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
*(.rodata .rodata.* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
*(.gcc_except_table)
*(.eh_frame_hdr)
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
} >romMirror AT>rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} >ram AT>rom
__exidx_end = .;
_etext = .;
.data :
{
__data_load = LOADADDR(.data);
_sidata = LOADADDR (.data);
__data_start = .;
_sdata = .;
KEEP(*(.jcr))
*(.got.plt) *(.got)
*(.shdata)
*(.data .data.* .gnu.linkonce.d.*)
. = ALIGN (4);
_edata = .;
} >ram AT>rom
.bss :
{
__bss_start__ = . ;
_sbss = .;
*(.shbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
__bss_end__ = .;
_end = .;
__end = _end;
_ebss = .;
PROVIDE(end = .);
} >ram AT>rom
.stab 0 (NOLOAD) :
{
*(.stab)
}
.stabstr 0 (NOLOAD) :
{
*(.stabstr)
}
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) }
}

177
Demo/CORTEX_A2F200_IAR_and_Keil/MicroSemi_Code/CMSIS/startup_gcc/debug-in-actel-smartfusion-esram.ld
View file

@ -1,177 +0,0 @@
/*******************************************************************************
* (c) Copyright 2009 Actel Corporation. All rights reserved.
*
* SmartFusion/Cortex-M3 linker script for creating a SoftConsole downloadable
* debug image executing in SmartFusion internal eSRAM.
*
* SVN $Revision: 1677 $
* SVN $Date: 2009-12-02 16:57:29 +0000 (Wed, 02 Dec 2009) $
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
"elf32-littlearm")
GROUP(-lc -lgcc -lm)
OUTPUT_ARCH(arm)
ENTRY(Reset_Handler)
SEARCH_DIR(.)
__DYNAMIC = 0;
/*******************************************************************************
* Start of board customization.
*******************************************************************************/
MEMORY
{
/* SmartFusion internal eSRAM */
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
}
RAM_START_ADDRESS = 0x20000000; /* Must be the same value MEMORY region ram ORIGIN above. */
RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
/*******************************************************************************
* End of board customization.
*******************************************************************************/
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
PROVIDE (_estack = __main_stack_start);
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
SECTIONS
{
.text :
{
CREATE_OBJECT_SYMBOLS
__text_load = LOADADDR(.text);
__text_start = .;
*(.isr_vector)
*(.text .text.* .gnu.linkonce.t.*)
*(.plt)
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(0x4);
/* These are for running static constructors and destructors under ELF. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
*(.rodata .rodata.* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
*(.gcc_except_table)
*(.eh_frame_hdr)
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
} >ram
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} >ram
__exidx_end = .;
_etext = .;
PROVIDE(__text_end = .);
.data :
{
__data_load = LOADADDR (.data);
_sidata = LOADADDR (.data);
__data_start = .;
_sdata = .;
KEEP(*(.jcr))
*(.got.plt) *(.got)
*(.shdata)
*(.data .data.* .gnu.linkonce.d.*)
. = ALIGN (4);
_edata = .;
} >ram
.bss :
{
__bss_start__ = . ;
_sbss = .;
*(.shbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
__bss_end__ = .;
_end = .;
__end = _end;
_ebss = .;
PROVIDE(end = .);
} >ram
/*
* The .stack section is only specified here in order for the linker to generate
* an error if the ram is full.
*/
.stack :
{
. = ALIGN(4);
. += PROCESS_STACK_SIZE;
. = ALIGN(4);
. += MAIN_STACK_SIZE;
. = ALIGN(4);
} >ram
.stab 0 (NOLOAD) :
{
*(.stab)
}
.stabstr 0 (NOLOAD) :
{
*(.stabstr)
}
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) *(.isr_vector) }
}

185
Demo/CORTEX_A2F200_IAR_and_Keil/MicroSemi_Code/CMSIS/startup_gcc/debug-in-external-ram.ld
View file

@ -1,185 +0,0 @@
/*******************************************************************************
* (c) Copyright 2009 Actel Corporation. All rights reserved.
*
* SmartFusion/Cortex-M3 linker script for creating a SoftConsole downloadable
* debug image executing in SmartFusion development board external RAM.
*
* SVN $Revision: 2014 $
* SVN $Date: 2010-01-20 10:37:26 +0000 (Wed, 20 Jan 2010) $
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
"elf32-littlearm")
GROUP(-lc -lgcc -lm)
OUTPUT_ARCH(arm)
ENTRY(Reset_Handler)
SEARCH_DIR(.)
__DYNAMIC = 0;
/*******************************************************************************
* Start of board customization.
*******************************************************************************/
MEMORY
{
/* SmartFusion internal eSRAM */
esram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
/* SmartFusion development board external RAM */
external_ram (rwx) : ORIGIN = 0x70000000, LENGTH = 2M
}
RAM_START_ADDRESS = 0x70000000; /* Must be the same value MEMORY region ram ORIGIN above. */
RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
/*******************************************************************************
* End of board customization.
*******************************************************************************/
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
PROVIDE (_estack = __main_stack_start);
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
SECTIONS
{
.init :
{
*(.isr_vector)
. = ALIGN(0x4);
} >esram
.text :
{
CREATE_OBJECT_SYMBOLS
__text_load = LOADADDR(.text);
__text_start = .;
*(.text .text.* .gnu.linkonce.t.*)
*(.plt)
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(0x4);
/* These are for running static constructors and destructors under ELF. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
*(.rodata .rodata.* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
*(.gcc_except_table)
*(.eh_frame_hdr)
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
} >external_ram
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} >external_ram
__exidx_end = .;
_etext = .;
PROVIDE(__text_end = .);
.data :
{
__data_load = LOADADDR (.data);
_sidata = LOADADDR (.data);
__data_start = .;
_sdata = .;
KEEP(*(.jcr))
*(.got.plt) *(.got)
*(.shdata)
*(.data .data.* .gnu.linkonce.d.*)
. = ALIGN (4);
_edata = .;
} >external_ram
.bss :
{
__bss_start__ = . ;
_sbss = .;
*(.shbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
__bss_end__ = .;
_end = .;
__end = _end;
_ebss = .;
PROVIDE(end = .);
} >external_ram
/*
* The .stack section is only specified here in order for the linker to generate
* an error if the esram is full.
*/
.stack :
{
. = ALIGN(4);
. += PROCESS_STACK_SIZE;
. = ALIGN(4);
. += MAIN_STACK_SIZE;
. = ALIGN(4);
} >external_ram
.stab 0 (NOLOAD) :
{
*(.stab)
}
.stabstr 0 (NOLOAD) :
{
*(.stabstr)
}
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) *(.isr_vector) }
}

247
Demo/CORTEX_A2F200_IAR_and_Keil/MicroSemi_Code/CMSIS/startup_gcc/newlib_stubs.c
View file

@ -1,247 +0,0 @@
/*******************************************************************************
* (c) Copyright 2009 Actel Corporation. All rights reserved.
*
* Stubs for Newlib system calls.
*
* SVN $Revision: 2020 $
* SVN $Date: 2010-01-20 14:51:50 +0000 (Wed, 20 Jan 2010) $
*/
#include <stdlib.h>
#include <sys/unistd.h>
#include <sys/stat.h>
#include <sys/times.h>
#include <errno.h>
#undef errno
extern int errno;
/*==============================================================================
* Redirection of standard output to a SmartFusion MSS UART.
*------------------------------------------------------------------------------
* A default implementation for the redirection of the output of printf() to a
* UART is provided as the bottom of this file. This redirection is enabled by
* adding the symbol/define ACTEL_STDIO_THRU_UART to your project and
* specifying the baud rate using the ACTEL_STDIO_BAUD_RATE define.
*/
#ifdef ACTEL_STDIO_THRU_UART
#include "../../drivers/mss_uart/mss_uart.h"
#ifndef ACTEL_STDIO_BAUD_RATE
#define ACTEL_STDIO_BAUD_RATE MSS_UART_57600_BAUD
#endif
/*------------------------------------------------------------------------------
* Global flag used to indicate if the UART driver needs to be initialized.
*/
static int g_stdio_uart_init_done = 0;
#endif /* ACTEL_STDIO_THRU_UART */
/*==============================================================================
* Environment variables.
* A pointer to a list of environment variables and their values. For a minimal
* environment, this empty list is adequate:
*/
char *__env[1] = { 0 };
char **environ = __env;
/*==============================================================================
* Close a file.
*/
int _close(int file)
{
return -1;
}
/*==============================================================================
* Transfer control to a new process.
*/
int _execve(char *name, char **argv, char **env)
{
errno = ENOMEM;
return -1;
}
/*==============================================================================
* Exit a program without cleaning up files.
*/
void _exit( int code )
{
/* Should we force a system reset? */
while( 1 )
{
;
}
}
/*==============================================================================
* Create a new process.
*/
int _fork(void)
{
errno = EAGAIN;
return -1;
}
/*==============================================================================
* Status of an open file.
*/
int _fstat(int file, struct stat *st)
{
st->st_mode = S_IFCHR;
return 0;
}
/*==============================================================================
* Process-ID
*/
int _getpid(void)
{
return 1;
}
/*==============================================================================
* Query whether output stream is a terminal.
*/
int _isatty(int file)
{
return 1;
}
/*==============================================================================
* Send a signal.
*/
int _kill(int pid, int sig)
{
errno = EINVAL;
return -1;
}
/*==============================================================================
* Establish a new name for an existing file.
*/
int _link(char *old, char *new)
{
errno = EMLINK;
return -1;
}
/*==============================================================================
* Set position in a file.
*/
int _lseek(int file, int ptr, int dir)
{
return 0;
}
/*==============================================================================
* Open a file.
*/
int _open(const char *name, int flags, int mode)
{
return -1;
}
/*==============================================================================
* Read from a file.
*/
int _read(int file, char *ptr, int len)
{
return 0;
}
/*==============================================================================
* Increase program data space. As malloc and related functions depend on this,
* it is useful to have a working implementation. The following suffices for a
* standalone system; it exploits the symbol _end automatically defined by the
* GNU linker.
*/
caddr_t _sbrk(int incr)
{
extern char _end; /* Defined by the linker */
static char *heap_end;
char *prev_heap_end;
char * stack_ptr;
if (heap_end == 0)
{
heap_end = &_end;
}
prev_heap_end = heap_end;
asm volatile ("MRS %0, msp" : "=r" (stack_ptr) );
if (heap_end + incr > stack_ptr)
{
write (1, "Heap and stack collision\n", 25);
abort ();
}
heap_end += incr;
return (caddr_t) prev_heap_end;
}
/*==============================================================================
* Status of a file (by name).
*/
int _stat(char *file, struct stat *st)
{
st->st_mode = S_IFCHR;
return 0;
}
/*==============================================================================
* Timing information for current process.
*/
int _times(struct tms *buf)
{
return -1;
}
/*==============================================================================
* Remove a file's directory entry.
*/
int _unlink(char *name)
{
errno = ENOENT;
return -1;
}
/*==============================================================================
* Wait for a child process.
*/
int _wait(int *status)
{
errno = ECHILD;
return -1;
}
/*==============================================================================
* Write to a file. libc subroutines will use this system routine for output to
* all files, including stdout—so if you need to generate any output, for
* example to a serial port for debugging, you should make your minimal write
* capable of doing this.
*/
int _write_r( void * reent, int file, char * ptr, int len )
{
#ifdef ACTEL_STDIO_THRU_UART
/*--------------------------------------------------------------------------
* Initialize the UART driver if it is the first time this function is
* called.
*/
if ( !g_stdio_uart_init_done )
{
MSS_UART_init( &g_mss_uart0, ACTEL_STDIO_BAUD_RATE, (MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY));
g_stdio_uart_init_done = 1;
}
/*--------------------------------------------------------------------------
* Output text to the UART.
*/
MSS_UART_polled_tx( &g_mss_uart0, (uint8_t *)ptr, len );
return len;
#else /* ACTEL_STDIO_THRU_UART */
return 0;
#endif /* ACTEL_STDIO_THRU_UART */
}

172
Demo/CORTEX_A2F200_IAR_and_Keil/MicroSemi_Code/CMSIS/startup_gcc/production-execute-in-place.ld
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@ -1,172 +0,0 @@
/*******************************************************************************
* (c) Copyright 2009 Actel Corporation. All rights reserved.
*
* SmartFusion/Cortex-M3 linker script creating an executable image for use in
* the Libero flow for executing code in place in internal eNVM.
*
* SVN $Revision: 1766 $
* SVN $Date: 2009-12-11 16:33:35 +0000 (Fri, 11 Dec 2009) $
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
"elf32-littlearm")
GROUP(-lc -lgcc -lm)
OUTPUT_ARCH(arm)
ENTRY(Reset_Handler)
SEARCH_DIR(.)
__DYNAMIC = 0;
/*******************************************************************************
* Start of board customization.
*******************************************************************************/
MEMORY
{
/* SmartFusion internal eNVM */
rom (rx) : ORIGIN = 0, LENGTH = 256k
/* SmartFusion internal eSRAM */
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
}
RAM_START_ADDRESS = 0x20000000; /* Must be the same value as MEMORY region ram ORIGIN above. */
RAM_SIZE = 64k; /* Must be the same value as MEMORY region ram LENGTH above. */
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
/*******************************************************************************
* End of board customization.
*******************************************************************************/
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
PROVIDE (_estack = __main_stack_start);
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
SECTIONS
{
.reset :
{
*(.isr_vector)
*sys_boot.o(.text)
. = ALIGN(0x4);
} >rom
.text :
{
CREATE_OBJECT_SYMBOLS
__text_load = LOADADDR(.text);
__text_start = .;
*(.text .text.* .gnu.linkonce.t.*)
*(.plt)
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(0x4);
/* These are for running static constructors and destructors under ELF. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
*(.rodata .rodata.* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
*(.gcc_except_table)
*(.eh_frame_hdr)
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
} >rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} >rom
__exidx_end = .;
_etext = .;
.data :
{
__data_load = LOADADDR(.data);
_sidata = LOADADDR (.data);
__data_start = .;
_sdata = .;
KEEP(*(.jcr))
*(.got.plt) *(.got)
*(.shdata)
*(.data .data.* .gnu.linkonce.d.*)
. = ALIGN (4);
_edata = .;
} >ram AT>rom
.bss :
{
__bss_start__ = . ;
_sbss = .;
*(.shbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
__bss_end__ = .;
_end = .;
__end = _end;
_ebss = .;
PROVIDE(end = .);
} >ram AT>rom
.stab 0 (NOLOAD) :
{
*(.stab)
}
.stabstr 0 (NOLOAD) :
{
*(.stabstr)
}
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) }
}

176
Demo/CORTEX_A2F200_IAR_and_Keil/MicroSemi_Code/CMSIS/startup_gcc/production-relocate-executable.ld
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@ -1,176 +0,0 @@
/*******************************************************************************
* (c) Copyright 2009 Actel Corporation. All rights reserved.
*
* SmartFusion/Cortex-M3 linker script creating an executable image for use in
* the Libero flow for relocating executable from internal eNVM to external RAM
* before starting execution.
*
* SVN $Revision: 1766 $
* SVN $Date: 2009-12-11 16:33:35 +0000 (Fri, 11 Dec 2009) $
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
"elf32-littlearm")
GROUP(-lc -lgcc -lm)
OUTPUT_ARCH(arm)
ENTRY(Reset_Handler)
SEARCH_DIR(.)
__DYNAMIC = 0;
/*******************************************************************************
* Start of board customization.
*******************************************************************************/
MEMORY
{
/* SmartFusion internal eNVM */
rom (rx) : ORIGIN = 0, LENGTH = 256k
/* SmartFusion internal eSRAM */
esram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
/* SmartFusion development board external RAM */
external_ram (rwx) : ORIGIN = 0x70000000, LENGTH = 2M
}
RAM_START_ADDRESS = 0x20000000; /* Must be the same value as MEMORY region esram ORIGIN above. */
RAM_SIZE = 64k; /* Must be the same value as MEMORY region esram LENGTH above. */
MAIN_STACK_SIZE = 8k; /* Cortex main stack size. */
PROCESS_STACK_SIZE = 4k; /* Cortex process stack size (only available with OS extensions).*/
/*******************************************************************************
* End of board customization.
*******************************************************************************/
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
PROVIDE (_estack = __main_stack_start);
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
SECTIONS
{
.reset :
{
*(.isr_vector)
/* *sys_boot.o(.text)*/
. = ALIGN(0x4);
} >rom
.text :
{
CREATE_OBJECT_SYMBOLS
__text_load = LOADADDR(.text);
__text_start = .;
*(.text .text.* .gnu.linkonce.t.*)
*(.plt)
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(0x4);
/* These are for running static constructors and destructors under ELF. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
*(.rodata .rodata.* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
*(.gcc_except_table)
*(.eh_frame_hdr)
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
} >external_ram AT>rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} >external_ram AT>rom
__exidx_end = .;
_etext = .;
.data :
{
__data_load = LOADADDR(.data);
_sidata = LOADADDR (.data);
__data_start = .;
_sdata = .;
KEEP(*(.jcr))
*(.got.plt) *(.got)
*(.shdata)
*(.data .data.* .gnu.linkonce.d.*)
. = ALIGN (4);
_edata = .;
} >esram AT>rom
.bss :
{
__bss_start__ = . ;
_sbss = .;
*(.shbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
__bss_end__ = .;
_end = .;
__end = _end;
_ebss = .;
PROVIDE(end = .);
} >esram AT>rom
.stab 0 (NOLOAD) :
{
*(.stab)
}
.stabstr 0 (NOLOAD) :
{
*(.stabstr)
}
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) }
}

1504
Demo/CORTEX_A2F200_IAR_and_Keil/MicroSemi_Code/CMSIS/startup_gcc/startup_a2fxxxm3.s
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973
Demo/CORTEX_A2F200_IAR_and_Keil/MicroSemi_Code/CMSIS/startup_iar/startup_a2fxxxm3.s Normal file
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@ -0,0 +1,973 @@
/*******************************************************************************
* (c) Copyright 2009 Actel Corporation. All rights reserved.
*
* Startup code for SmartFusion A2FM3Fxxx
*
* SVN $Revision: 2068 $
* SVN $Date: 2010-01-27 17:27:41 +0000 (Wed, 27 Jan 2010) $
*/
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
; EXTERN SystemInit
PUBLIC __vector_table
DATA
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler
DCD NMI_Handler
DCD HardFault_Handler
DCD MemManage_Handler
DCD BusFault_Handler
DCD UsageFault_Handler
DCD 0
DCD 0
DCD 0
DCD 0
DCD SVC_Handler
DCD DebugMon_Handler
DCD 0
DCD PendSV_Handler
DCD SysTick_Handler
; External Interrupts
DCD WdogWakeup_IRQHandler
DCD BrownOut_1_5V_IRQHandler
DCD BrownOut_3_3V_IRQHandler
DCD RTC_Match_IRQHandler
DCD RTCIF_Pub_IRQHandler
DCD EthernetMAC_IRQHandler
DCD IAP_IRQHandler
DCD ENVM0_IRQHandler
DCD ENVM1_IRQHandler
DCD DMA_IRQHandler
DCD UART0_IRQHandler
DCD UART1_IRQHandler
DCD SPI0_IRQHandler
DCD SPI1_IRQHandler
DCD I2C0_IRQHandler
DCD I2C0_SMBAlert_IRQHandler
DCD I2C0_SMBus_IRQHandler
DCD I2C1_IRQHandler
DCD I2C1_SMBAlert_IRQHandler
DCD I2C1_SMBus_IRQHandler
DCD Timer1_IRQHandler
DCD Timer2_IRQHandler
DCD PLL_Lock_IRQHandler
DCD PLL_LockLost_IRQHandler
DCD CommError_IRQHandler
DCD 0
DCD 0
DCD 0
DCD 0
DCD 0
DCD 0
DCD Fabric_IRQHandler
DCD GPIO0_IRQHandler
DCD GPIO1_IRQHandler
DCD GPIO2_IRQHandler
DCD GPIO3_IRQHandler
DCD GPIO4_IRQHandler
DCD GPIO5_IRQHandler
DCD GPIO6_IRQHandler
DCD GPIO7_IRQHandler
DCD GPIO8_IRQHandler
DCD GPIO9_IRQHandler
DCD GPIO10_IRQHandler
DCD GPIO11_IRQHandler
DCD GPIO12_IRQHandler
DCD GPIO13_IRQHandler
DCD GPIO14_IRQHandler
DCD GPIO15_IRQHandler
DCD GPIO16_IRQHandler
DCD GPIO17_IRQHandler
DCD GPIO18_IRQHandler
DCD GPIO19_IRQHandler
DCD GPIO20_IRQHandler
DCD GPIO21_IRQHandler
DCD GPIO22_IRQHandler
DCD GPIO23_IRQHandler
DCD GPIO24_IRQHandler
DCD GPIO25_IRQHandler
DCD GPIO26_IRQHandler
DCD GPIO27_IRQHandler
DCD GPIO28_IRQHandler
DCD GPIO29_IRQHandler
DCD GPIO30_IRQHandler
DCD GPIO31_IRQHandler
DCD ACE_PC0_Flag0_IRQHandler
DCD ACE_PC0_Flag1_IRQHandler
DCD ACE_PC0_Flag2_IRQHandler
DCD ACE_PC0_Flag3_IRQHandler
DCD ACE_PC1_Flag0_IRQHandler
DCD ACE_PC1_Flag1_IRQHandler
DCD ACE_PC1_Flag2_IRQHandler
DCD ACE_PC1_Flag3_IRQHandler
DCD ACE_PC2_Flag0_IRQHandler
DCD ACE_PC2_Flag1_IRQHandler
DCD ACE_PC2_Flag2_IRQHandler
DCD ACE_PC2_Flag3_IRQHandler
DCD ACE_ADC0_DataValid_IRQHandler
DCD ACE_ADC1_DataValid_IRQHandler
DCD ACE_ADC2_DataValid_IRQHandler
DCD ACE_ADC0_CalDone_IRQHandler
DCD ACE_ADC1_CalDone_IRQHandler
DCD ACE_ADC2_CalDone_IRQHandler
DCD ACE_ADC0_CalStart_IRQHandler
DCD ACE_ADC1_CalStart_IRQHandler
DCD ACE_ADC2_CalStart_IRQHandler
DCD ACE_Comp0_Fall_IRQHandler
DCD ACE_Comp1_Fall_IRQHandler
DCD ACE_Comp2_Fall_IRQHandler
DCD ACE_Comp3_Fall_IRQHandler
DCD ACE_Comp4_Fall_IRQHandler
DCD ACE_Comp5_Fall_IRQHandler
DCD ACE_Comp6_Fall_IRQHandler
DCD ACE_Comp7_Fall_IRQHandler
DCD ACE_Comp8_Fall_IRQHandler
DCD ACE_Comp9_Fall_IRQHandler
DCD ACE_Comp10_Fall_IRQHandler
DCD ACE_Comp11_Fall_IRQHandler
DCD ACE_Comp0_Rise_IRQHandler
DCD ACE_Comp1_Rise_IRQHandler
DCD ACE_Comp2_Rise_IRQHandler
DCD ACE_Comp3_Rise_IRQHandler
DCD ACE_Comp4_Rise_IRQHandler
DCD ACE_Comp5_Rise_IRQHandler
DCD ACE_Comp6_Rise_IRQHandler
DCD ACE_Comp7_Rise_IRQHandler
DCD ACE_Comp8_Rise_IRQHandler
DCD ACE_Comp9_Rise_IRQHandler
DCD ACE_Comp10_Rise_IRQHandler
DCD ACE_Comp11_Rise_IRQHandler
DCD ACE_ADC0_FifoFull_IRQHandler
DCD ACE_ADC0_FifoAFull_IRQHandler
DCD ACE_ADC0_FifoEmpty_IRQHandler
DCD ACE_ADC1_FifoFull_IRQHandler
DCD ACE_ADC1_FifoAFull_IRQHandler
DCD ACE_ADC1_FifoEmpty_IRQHandler
DCD ACE_ADC2_FifoFull_IRQHandler
DCD ACE_ADC2_FifoAFull_IRQHandler
DCD ACE_ADC2_FifoEmpty_IRQHandler
DCD ACE_PPE_Flag0_IRQHandler
DCD ACE_PPE_Flag1_IRQHandler
DCD ACE_PPE_Flag2_IRQHandler
DCD ACE_PPE_Flag3_IRQHandler
DCD ACE_PPE_Flag4_IRQHandler
DCD ACE_PPE_Flag5_IRQHandler
DCD ACE_PPE_Flag6_IRQHandler
DCD ACE_PPE_Flag7_IRQHandler
DCD ACE_PPE_Flag8_IRQHandler
DCD ACE_PPE_Flag9_IRQHandler
DCD ACE_PPE_Flag10_IRQHandler
DCD ACE_PPE_Flag11_IRQHandler
DCD ACE_PPE_Flag12_IRQHandler
DCD ACE_PPE_Flag13_IRQHandler
DCD ACE_PPE_Flag14_IRQHandler
DCD ACE_PPE_Flag15_IRQHandler
DCD ACE_PPE_Flag16_IRQHandler
DCD ACE_PPE_Flag17_IRQHandler
DCD ACE_PPE_Flag18_IRQHandler
DCD ACE_PPE_Flag19_IRQHandler
DCD ACE_PPE_Flag20_IRQHandler
DCD ACE_PPE_Flag21_IRQHandler
DCD ACE_PPE_Flag22_IRQHandler
DCD ACE_PPE_Flag23_IRQHandler
DCD ACE_PPE_Flag24_IRQHandler
DCD ACE_PPE_Flag25_IRQHandler
DCD ACE_PPE_Flag26_IRQHandler
DCD ACE_PPE_Flag27_IRQHandler
DCD ACE_PPE_Flag28_IRQHandler
DCD ACE_PPE_Flag29_IRQHandler
DCD ACE_PPE_Flag30_IRQHandler
DCD ACE_PPE_Flag31_IRQHandler
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER(2)
Reset_Handler
; LDR R0, =SystemInit
; BLX R0
LDR R0, =__iar_program_start
BX R0
PUBWEAK NMI_Handler
SECTION .text:CODE:REORDER(1)
NMI_Handler
B NMI_Handler
PUBWEAK HardFault_Handler
SECTION .text:CODE:REORDER(1)
HardFault_Handler
B HardFault_Handler
PUBWEAK MemManage_Handler
SECTION .text:CODE:REORDER(1)
MemManage_Handler
B MemManage_Handler
PUBWEAK BusFault_Handler
SECTION .text:CODE:REORDER(1)
BusFault_Handler
B BusFault_Handler
PUBWEAK UsageFault_Handler
SECTION .text:CODE:REORDER(1)
UsageFault_Handler
B UsageFault_Handler
PUBWEAK SVC_Handler
SECTION .text:CODE:REORDER(1)
SVC_Handler
B SVC_Handler
PUBWEAK DebugMon_Handler
SECTION .text:CODE:REORDER(1)
DebugMon_Handler
B DebugMon_Handler
PUBWEAK PendSV_Handler
SECTION .text:CODE:REORDER(1)
PendSV_Handler
B PendSV_Handler
PUBWEAK SysTick_Handler
SECTION .text:CODE:REORDER(1)
SysTick_Handler
B SysTick_Handler
PUBWEAK WdogWakeup_IRQHandler
SECTION .text:CODE:REORDER(1)
WdogWakeup_IRQHandler
B WdogWakeup_IRQHandler
PUBWEAK BrownOut_1_5V_IRQHandler
SECTION .text:CODE:REORDER(1)
BrownOut_1_5V_IRQHandler
B BrownOut_1_5V_IRQHandler
PUBWEAK BrownOut_3_3V_IRQHandler
SECTION .text:CODE:REORDER(1)
BrownOut_3_3V_IRQHandler
B BrownOut_3_3V_IRQHandler
PUBWEAK RTC_Match_IRQHandler
SECTION .text:CODE:REORDER(1)
RTC_Match_IRQHandler
B RTC_Match_IRQHandler
PUBWEAK RTCIF_Pub_IRQHandler
SECTION .text:CODE:REORDER(1)
RTCIF_Pub_IRQHandler
B RTCIF_Pub_IRQHandler
PUBWEAK EthernetMAC_IRQHandler
SECTION .text:CODE:REORDER(1)
EthernetMAC_IRQHandler
B EthernetMAC_IRQHandler
PUBWEAK IAP_IRQHandler
SECTION .text:CODE:REORDER(1)
IAP_IRQHandler
B IAP_IRQHandler
PUBWEAK ENVM0_IRQHandler
SECTION .text:CODE:REORDER(1)
ENVM0_IRQHandler
B ENVM0_IRQHandler
PUBWEAK ENVM1_IRQHandler
SECTION .text:CODE:REORDER(1)
ENVM1_IRQHandler
B ENVM1_IRQHandler
PUBWEAK DMA_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA_IRQHandler
B DMA_IRQHandler
PUBWEAK UART0_IRQHandler
SECTION .text:CODE:REORDER(1)
UART0_IRQHandler
B UART0_IRQHandler
PUBWEAK UART1_IRQHandler
SECTION .text:CODE:REORDER(1)
UART1_IRQHandler
B UART1_IRQHandler
PUBWEAK SPI0_IRQHandler
SECTION .text:CODE:REORDER(1)
SPI0_IRQHandler
B SPI0_IRQHandler
PUBWEAK SPI1_IRQHandler
SECTION .text:CODE:REORDER(1)
SPI1_IRQHandler
B SPI1_IRQHandler
PUBWEAK I2C0_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C0_IRQHandler
B I2C0_IRQHandler
PUBWEAK I2C0_SMBAlert_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C0_SMBAlert_IRQHandler
B I2C0_SMBAlert_IRQHandler
PUBWEAK I2C0_SMBus_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C0_SMBus_IRQHandler
B I2C0_SMBus_IRQHandler
PUBWEAK I2C1_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C1_IRQHandler
B I2C1_IRQHandler
PUBWEAK I2C1_SMBAlert_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C1_SMBAlert_IRQHandler
B I2C1_SMBAlert_IRQHandler
PUBWEAK I2C1_SMBus_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C1_SMBus_IRQHandler
B I2C1_SMBus_IRQHandler
PUBWEAK Timer1_IRQHandler
SECTION .text:CODE:REORDER(1)
Timer1_IRQHandler
B Timer1_IRQHandler
PUBWEAK Timer2_IRQHandler
SECTION .text:CODE:REORDER(1)
Timer2_IRQHandler
B Timer2_IRQHandler
PUBWEAK PLL_Lock_IRQHandler
SECTION .text:CODE:REORDER(1)
PLL_Lock_IRQHandler
B PLL_Lock_IRQHandler
PUBWEAK PLL_LockLost_IRQHandler
SECTION .text:CODE:REORDER(1)
PLL_LockLost_IRQHandler
B PLL_LockLost_IRQHandler
PUBWEAK CommError_IRQHandler
SECTION .text:CODE:REORDER(1)
CommError_IRQHandler
B CommError_IRQHandler
PUBWEAK Fabric_IRQHandler
SECTION .text:CODE:REORDER(1)
Fabric_IRQHandler
B Fabric_IRQHandler
PUBWEAK GPIO0_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO0_IRQHandler
B GPIO0_IRQHandler
PUBWEAK GPIO1_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO1_IRQHandler
B GPIO1_IRQHandler
PUBWEAK GPIO2_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO2_IRQHandler
B GPIO2_IRQHandler
PUBWEAK GPIO3_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO3_IRQHandler
B GPIO3_IRQHandler
PUBWEAK GPIO4_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO4_IRQHandler
B GPIO4_IRQHandler
PUBWEAK GPIO5_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO5_IRQHandler
B GPIO5_IRQHandler
PUBWEAK GPIO6_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO6_IRQHandler
B GPIO6_IRQHandler
PUBWEAK GPIO7_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO7_IRQHandler
B GPIO7_IRQHandler
PUBWEAK GPIO8_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO8_IRQHandler
B GPIO8_IRQHandler
PUBWEAK GPIO9_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO9_IRQHandler
B GPIO9_IRQHandler
PUBWEAK GPIO10_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO10_IRQHandler
B GPIO10_IRQHandler
PUBWEAK GPIO11_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO11_IRQHandler
B GPIO11_IRQHandler
PUBWEAK GPIO12_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO12_IRQHandler
B GPIO12_IRQHandler
PUBWEAK GPIO13_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO13_IRQHandler
B GPIO13_IRQHandler
PUBWEAK GPIO14_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO14_IRQHandler
B GPIO14_IRQHandler
PUBWEAK GPIO15_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO15_IRQHandler
B GPIO15_IRQHandler
PUBWEAK GPIO16_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO16_IRQHandler
B GPIO16_IRQHandler
PUBWEAK GPIO17_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO17_IRQHandler
B GPIO17_IRQHandler
PUBWEAK GPIO18_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO18_IRQHandler
B GPIO18_IRQHandler
PUBWEAK GPIO19_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO19_IRQHandler
B GPIO19_IRQHandler
PUBWEAK GPIO20_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO20_IRQHandler
B GPIO20_IRQHandler
PUBWEAK GPIO21_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO21_IRQHandler
B GPIO21_IRQHandler
PUBWEAK GPIO22_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO22_IRQHandler
B GPIO22_IRQHandler
PUBWEAK GPIO23_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO23_IRQHandler
B GPIO23_IRQHandler
PUBWEAK GPIO24_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO24_IRQHandler
B GPIO24_IRQHandler
PUBWEAK GPIO25_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO25_IRQHandler
B GPIO25_IRQHandler
PUBWEAK GPIO26_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO26_IRQHandler
B GPIO26_IRQHandler
PUBWEAK GPIO27_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO27_IRQHandler
B GPIO27_IRQHandler
PUBWEAK GPIO28_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO28_IRQHandler
B GPIO28_IRQHandler
PUBWEAK GPIO29_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO29_IRQHandler
B GPIO29_IRQHandler
PUBWEAK GPIO30_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO30_IRQHandler
B GPIO30_IRQHandler
PUBWEAK GPIO31_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO31_IRQHandler
B GPIO31_IRQHandler
PUBWEAK ACE_PC0_Flag0_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC0_Flag0_IRQHandler
B ACE_PC0_Flag0_IRQHandler
PUBWEAK ACE_PC0_Flag1_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC0_Flag1_IRQHandler
B ACE_PC0_Flag1_IRQHandler
PUBWEAK ACE_PC0_Flag2_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC0_Flag2_IRQHandler
B ACE_PC0_Flag2_IRQHandler
PUBWEAK ACE_PC0_Flag3_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC0_Flag3_IRQHandler
B ACE_PC0_Flag3_IRQHandler
PUBWEAK ACE_PC1_Flag0_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC1_Flag0_IRQHandler
B ACE_PC1_Flag0_IRQHandler
PUBWEAK ACE_PC1_Flag1_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC1_Flag1_IRQHandler
B ACE_PC1_Flag1_IRQHandler
PUBWEAK ACE_PC1_Flag2_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC1_Flag2_IRQHandler
B ACE_PC1_Flag2_IRQHandler
PUBWEAK ACE_PC1_Flag3_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC1_Flag3_IRQHandler
B ACE_PC1_Flag3_IRQHandler
PUBWEAK ACE_PC2_Flag0_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC2_Flag0_IRQHandler
B ACE_PC2_Flag0_IRQHandler
PUBWEAK ACE_PC2_Flag1_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC2_Flag1_IRQHandler
B ACE_PC2_Flag1_IRQHandler
PUBWEAK ACE_PC2_Flag2_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC2_Flag2_IRQHandler
B ACE_PC2_Flag2_IRQHandler
PUBWEAK ACE_PC2_Flag3_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PC2_Flag3_IRQHandler
B ACE_PC2_Flag3_IRQHandler
PUBWEAK ACE_ADC0_DataValid_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC0_DataValid_IRQHandler
B ACE_ADC0_DataValid_IRQHandler
PUBWEAK ACE_ADC1_DataValid_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC1_DataValid_IRQHandler
B ACE_ADC1_DataValid_IRQHandler
PUBWEAK ACE_ADC2_DataValid_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC2_DataValid_IRQHandler
B ACE_ADC2_DataValid_IRQHandler
PUBWEAK ACE_ADC0_CalDone_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC0_CalDone_IRQHandler
B ACE_ADC0_CalDone_IRQHandler
PUBWEAK ACE_ADC1_CalDone_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC1_CalDone_IRQHandler
B ACE_ADC1_CalDone_IRQHandler
PUBWEAK ACE_ADC2_CalDone_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC2_CalDone_IRQHandler
B ACE_ADC2_CalDone_IRQHandler
PUBWEAK ACE_ADC0_CalStart_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC0_CalStart_IRQHandler
B ACE_ADC0_CalStart_IRQHandler
PUBWEAK ACE_ADC1_CalStart_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC1_CalStart_IRQHandler
B ACE_ADC1_CalStart_IRQHandler
PUBWEAK ACE_ADC2_CalStart_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC2_CalStart_IRQHandler
B ACE_ADC2_CalStart_IRQHandler
PUBWEAK ACE_Comp0_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp0_Fall_IRQHandler
B ACE_Comp0_Fall_IRQHandler
PUBWEAK ACE_Comp1_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp1_Fall_IRQHandler
B ACE_Comp1_Fall_IRQHandler
PUBWEAK ACE_Comp2_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp2_Fall_IRQHandler
B ACE_Comp2_Fall_IRQHandler
PUBWEAK ACE_Comp3_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp3_Fall_IRQHandler
B ACE_Comp3_Fall_IRQHandler
PUBWEAK ACE_Comp4_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp4_Fall_IRQHandler
B ACE_Comp4_Fall_IRQHandler
PUBWEAK ACE_Comp5_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp5_Fall_IRQHandler
B ACE_Comp5_Fall_IRQHandler
PUBWEAK ACE_Comp6_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp6_Fall_IRQHandler
B ACE_Comp6_Fall_IRQHandler
PUBWEAK ACE_Comp7_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp7_Fall_IRQHandler
B ACE_Comp7_Fall_IRQHandler
PUBWEAK ACE_Comp8_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp8_Fall_IRQHandler
B ACE_Comp8_Fall_IRQHandler
PUBWEAK ACE_Comp9_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp9_Fall_IRQHandler
B ACE_Comp9_Fall_IRQHandler
PUBWEAK ACE_Comp10_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp10_Fall_IRQHandler
B ACE_Comp10_Fall_IRQHandler
PUBWEAK ACE_Comp11_Fall_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp11_Fall_IRQHandler
B ACE_Comp11_Fall_IRQHandler
PUBWEAK ACE_Comp0_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp0_Rise_IRQHandler
B ACE_Comp0_Rise_IRQHandler
PUBWEAK ACE_Comp1_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp1_Rise_IRQHandler
B ACE_Comp1_Rise_IRQHandler
PUBWEAK ACE_Comp2_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp2_Rise_IRQHandler
B ACE_Comp2_Rise_IRQHandler
PUBWEAK ACE_Comp3_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp3_Rise_IRQHandler
B ACE_Comp3_Rise_IRQHandler
PUBWEAK ACE_Comp4_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp4_Rise_IRQHandler
B ACE_Comp4_Rise_IRQHandler
PUBWEAK ACE_Comp5_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp5_Rise_IRQHandler
B ACE_Comp5_Rise_IRQHandler
PUBWEAK ACE_Comp6_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp6_Rise_IRQHandler
B ACE_Comp6_Rise_IRQHandler
PUBWEAK ACE_Comp7_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp7_Rise_IRQHandler
B ACE_Comp7_Rise_IRQHandler
PUBWEAK ACE_Comp8_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp8_Rise_IRQHandler
B ACE_Comp8_Rise_IRQHandler
PUBWEAK ACE_Comp9_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp9_Rise_IRQHandler
B ACE_Comp9_Rise_IRQHandler
PUBWEAK ACE_Comp10_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp10_Rise_IRQHandler
B ACE_Comp10_Rise_IRQHandler
PUBWEAK ACE_Comp11_Rise_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_Comp11_Rise_IRQHandler
B ACE_Comp11_Rise_IRQHandler
PUBWEAK ACE_ADC0_FifoFull_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC0_FifoFull_IRQHandler
B ACE_ADC0_FifoFull_IRQHandler
PUBWEAK ACE_ADC0_FifoAFull_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC0_FifoAFull_IRQHandler
B ACE_ADC0_FifoAFull_IRQHandler
PUBWEAK ACE_ADC0_FifoEmpty_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC0_FifoEmpty_IRQHandler
B ACE_ADC0_FifoEmpty_IRQHandler
PUBWEAK ACE_ADC1_FifoFull_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC1_FifoFull_IRQHandler
B ACE_ADC1_FifoFull_IRQHandler
PUBWEAK ACE_ADC1_FifoAFull_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC1_FifoAFull_IRQHandler
B ACE_ADC1_FifoAFull_IRQHandler
PUBWEAK ACE_ADC1_FifoEmpty_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC1_FifoEmpty_IRQHandler
B ACE_ADC1_FifoEmpty_IRQHandler
PUBWEAK ACE_ADC2_FifoFull_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC2_FifoFull_IRQHandler
B ACE_ADC2_FifoFull_IRQHandler
PUBWEAK ACE_ADC2_FifoAFull_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC2_FifoAFull_IRQHandler
B ACE_ADC2_FifoAFull_IRQHandler
PUBWEAK ACE_ADC2_FifoEmpty_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_ADC2_FifoEmpty_IRQHandler
B ACE_ADC2_FifoEmpty_IRQHandler
PUBWEAK ACE_PPE_Flag0_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag0_IRQHandler
B ACE_PPE_Flag0_IRQHandler
PUBWEAK ACE_PPE_Flag1_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag1_IRQHandler
B ACE_PPE_Flag1_IRQHandler
PUBWEAK ACE_PPE_Flag2_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag2_IRQHandler
B ACE_PPE_Flag2_IRQHandler
PUBWEAK ACE_PPE_Flag3_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag3_IRQHandler
B ACE_PPE_Flag3_IRQHandler
PUBWEAK ACE_PPE_Flag4_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag4_IRQHandler
B ACE_PPE_Flag4_IRQHandler
PUBWEAK ACE_PPE_Flag5_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag5_IRQHandler
B ACE_PPE_Flag5_IRQHandler
PUBWEAK ACE_PPE_Flag6_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag6_IRQHandler
B ACE_PPE_Flag6_IRQHandler
PUBWEAK ACE_PPE_Flag7_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag7_IRQHandler
B ACE_PPE_Flag7_IRQHandler
PUBWEAK ACE_PPE_Flag8_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag8_IRQHandler
B ACE_PPE_Flag8_IRQHandler
PUBWEAK ACE_PPE_Flag9_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag9_IRQHandler
B ACE_PPE_Flag9_IRQHandler
PUBWEAK ACE_PPE_Flag10_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag10_IRQHandler
B ACE_PPE_Flag10_IRQHandler
PUBWEAK ACE_PPE_Flag11_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag11_IRQHandler
B ACE_PPE_Flag11_IRQHandler
PUBWEAK ACE_PPE_Flag12_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag12_IRQHandler
B ACE_PPE_Flag12_IRQHandler
PUBWEAK ACE_PPE_Flag13_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag13_IRQHandler
B ACE_PPE_Flag13_IRQHandler
PUBWEAK ACE_PPE_Flag14_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag14_IRQHandler
B ACE_PPE_Flag14_IRQHandler
PUBWEAK ACE_PPE_Flag15_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag15_IRQHandler
B ACE_PPE_Flag15_IRQHandler
PUBWEAK ACE_PPE_Flag16_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag16_IRQHandler
B ACE_PPE_Flag16_IRQHandler
PUBWEAK ACE_PPE_Flag17_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag17_IRQHandler
B ACE_PPE_Flag17_IRQHandler
PUBWEAK ACE_PPE_Flag18_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag18_IRQHandler
B ACE_PPE_Flag18_IRQHandler
PUBWEAK ACE_PPE_Flag19_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag19_IRQHandler
B ACE_PPE_Flag19_IRQHandler
PUBWEAK ACE_PPE_Flag20_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag20_IRQHandler
B ACE_PPE_Flag20_IRQHandler
PUBWEAK ACE_PPE_Flag21_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag21_IRQHandler
B ACE_PPE_Flag21_IRQHandler
PUBWEAK ACE_PPE_Flag22_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag22_IRQHandler
B ACE_PPE_Flag22_IRQHandler
PUBWEAK ACE_PPE_Flag23_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag23_IRQHandler
B ACE_PPE_Flag23_IRQHandler
PUBWEAK ACE_PPE_Flag24_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag24_IRQHandler
B ACE_PPE_Flag24_IRQHandler
PUBWEAK ACE_PPE_Flag25_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag25_IRQHandler
B ACE_PPE_Flag25_IRQHandler
PUBWEAK ACE_PPE_Flag26_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag26_IRQHandler
B ACE_PPE_Flag26_IRQHandler
PUBWEAK ACE_PPE_Flag27_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag27_IRQHandler
B ACE_PPE_Flag27_IRQHandler
PUBWEAK ACE_PPE_Flag28_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag28_IRQHandler
B ACE_PPE_Flag28_IRQHandler
PUBWEAK ACE_PPE_Flag29_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag29_IRQHandler
B ACE_PPE_Flag29_IRQHandler
PUBWEAK ACE_PPE_Flag30_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag30_IRQHandler
B ACE_PPE_Flag30_IRQHandler
PUBWEAK ACE_PPE_Flag31_IRQHandler
SECTION .text:CODE:REORDER(1)
ACE_PPE_Flag31_IRQHandler
B ACE_PPE_Flag31_IRQHandler
END