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Add FreeRTOS-Plus directory.
This commit is contained in:
Richard Barry
parent
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commit
f508a5f653
6798 changed files with 134949 additions and 19 deletions
421
FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portasm.S
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421
FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portasm.S
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/*
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FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* FreeRTOS tutorial books are available in pdf and paperback. *
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* Complete, revised, and edited pdf reference manuals are also *
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* available. *
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* *
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* Purchasing FreeRTOS documentation will not only help you, by *
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* ensuring you get running as quickly as possible and with an *
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* in-depth knowledge of how to use FreeRTOS, it will also help *
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* the FreeRTOS project to continue with its mission of providing *
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* professional grade, cross platform, de facto standard solutions *
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* for microcontrollers - completely free of charge! *
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* *
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* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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* *
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* Thank you for using FreeRTOS, and thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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>>>NOTE<<< The modification to the GPL is included to allow you to
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distribute a combined work that includes FreeRTOS without being obliged to
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provide the source code for proprietary components outside of the FreeRTOS
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kernel. FreeRTOS is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong? *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, training, latest information,
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license and contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool.
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Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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the code with commercial support, indemnification, and middleware, under
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the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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provide a safety engineered and independently SIL3 certified version under
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the SafeRTOS brand: http://www.SafeRTOS.com.
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*/
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#include "FreeRTOSConfig.h"
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.extern pxCurrentTCB
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.extern vTaskSwitchContext
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.extern vTaskIncrementTick
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.extern vPortISRHandler
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.global vPortStartFirstTask
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.global vPortYield
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.global vPortTickISR
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.global vPortISRWrapper
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.global vPortSaveFPURegisters
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.global vPortRestoreFPURegisters
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.set BChainField, 0
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.set NextLRField, BChainField + 4
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.set MSRField, NextLRField + 4
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.set PCField, MSRField + 4
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.set LRField, PCField + 4
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.set CTRField, LRField + 4
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.set XERField, CTRField + 4
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.set CRField, XERField + 4
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.set USPRG0Field, CRField + 4
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.set r0Field, USPRG0Field + 4
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.set r2Field, r0Field + 4
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.set r3r31Field, r2Field + 4
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.set IFrameSize, r3r31Field + ( ( 31 - 3 ) + 1 ) * 4
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.macro portSAVE_STACK_POINTER_AND_LR
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/* Get the address of the TCB. */
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xor R0, R0, R0
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addis R2, R0, pxCurrentTCB@ha
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lwz R2, pxCurrentTCB@l( R2 )
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/* Store the stack pointer into the TCB */
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stw SP, 0( R2 )
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/* Save the link register */
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stwu R1, -24( R1 )
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mflr R0
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stw R31, 20( R1 )
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stw R0, 28( R1 )
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mr R31, r1
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.endm
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.macro portRESTORE_STACK_POINTER_AND_LR
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/* Restore the link register */
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lwz R11, 0( R1 )
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lwz R0, 4( R11 )
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mtlr R0
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lwz R31, -4( R11 )
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mr R1, R11
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/* Get the address of the TCB. */
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xor R0, R0, R0
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addis SP, R0, pxCurrentTCB@ha
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lwz SP, pxCurrentTCB@l( R1 )
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/* Get the task stack pointer from the TCB. */
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lwz SP, 0( SP )
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.endm
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vPortStartFirstTask:
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/* Get the address of the TCB. */
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xor R0, R0, R0
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addis SP, R0, pxCurrentTCB@ha
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lwz SP, pxCurrentTCB@l( SP )
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/* Get the task stack pointer from the TCB. */
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lwz SP, 0( SP )
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/* Restore MSR register to SRR1. */
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lwz R0, MSRField(R1)
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mtsrr1 R0
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/* Restore current PC location to SRR0. */
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lwz R0, PCField(R1)
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mtsrr0 R0
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/* Save USPRG0 register */
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lwz R0, USPRG0Field(R1)
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mtspr 0x100,R0
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/* Restore Condition register */
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lwz R0, CRField(R1)
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mtcr R0
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/* Restore Fixed Point Exception register */
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lwz R0, XERField(R1)
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mtxer R0
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/* Restore Counter register */
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lwz R0, CTRField(R1)
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mtctr R0
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/* Restore Link register */
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lwz R0, LRField(R1)
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mtlr R0
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/* Restore remaining GPR registers. */
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lmw R3,r3r31Field(R1)
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/* Restore r0 and r2. */
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lwz R0, r0Field(R1)
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lwz R2, r2Field(R1)
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/* Remove frame from stack */
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addi R1,R1,IFrameSize
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/* Return into the first task */
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rfi
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vPortYield:
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portSAVE_STACK_POINTER_AND_LR
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bl vTaskSwitchContext
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portRESTORE_STACK_POINTER_AND_LR
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blr
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vPortTickISR:
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portSAVE_STACK_POINTER_AND_LR
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bl vTaskIncrementTick
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#if configUSE_PREEMPTION == 1
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bl vTaskSwitchContext
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#endif
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/* Clear the interrupt */
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lis R0, 2048
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mttsr R0
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portRESTORE_STACK_POINTER_AND_LR
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blr
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vPortISRWrapper:
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portSAVE_STACK_POINTER_AND_LR
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bl vPortISRHandler
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portRESTORE_STACK_POINTER_AND_LR
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blr
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#if configUSE_FPU == 1
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vPortSaveFPURegisters:
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/* Enable APU and mark FPU as present. */
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mfmsr r0
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xor r30, r30, r30
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oris r30, r30, 512
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ori r30, r30, 8192
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or r0, r0, r30
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mtmsr r0
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#ifdef USE_DP_FPU
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/* Buffer address is in r3. Save each flop register into an offset from
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this buffer address. */
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stfd f0, 0(r3)
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stfd f1, 8(r3)
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stfd f2, 16(r3)
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stfd f3, 24(r3)
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stfd f4, 32(r3)
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stfd f5, 40(r3)
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stfd f6, 48(r3)
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stfd f7, 56(r3)
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stfd f8, 64(r3)
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stfd f9, 72(r3)
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stfd f10, 80(r3)
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stfd f11, 88(r3)
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stfd f12, 96(r3)
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stfd f13, 104(r3)
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stfd f14, 112(r3)
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stfd f15, 120(r3)
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stfd f16, 128(r3)
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stfd f17, 136(r3)
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stfd f18, 144(r3)
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stfd f19, 152(r3)
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stfd f20, 160(r3)
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stfd f21, 168(r3)
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stfd f22, 176(r3)
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stfd f23, 184(r3)
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stfd f24, 192(r3)
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stfd f25, 200(r3)
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stfd f26, 208(r3)
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stfd f27, 216(r3)
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stfd f28, 224(r3)
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stfd f29, 232(r3)
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stfd f30, 240(r3)
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stfd f31, 248(r3)
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/* Also save the FPSCR. */
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mffs f31
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stfs f31, 256(r3)
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#else
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/* Buffer address is in r3. Save each flop register into an offset from
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this buffer address. */
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stfs f0, 0(r3)
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stfs f1, 4(r3)
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stfs f2, 8(r3)
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stfs f3, 12(r3)
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stfs f4, 16(r3)
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stfs f5, 20(r3)
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stfs f6, 24(r3)
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stfs f7, 28(r3)
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stfs f8, 32(r3)
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stfs f9, 36(r3)
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stfs f10, 40(r3)
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stfs f11, 44(r3)
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stfs f12, 48(r3)
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stfs f13, 52(r3)
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stfs f14, 56(r3)
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stfs f15, 60(r3)
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stfs f16, 64(r3)
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stfs f17, 68(r3)
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stfs f18, 72(r3)
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stfs f19, 76(r3)
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stfs f20, 80(r3)
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stfs f21, 84(r3)
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stfs f22, 88(r3)
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stfs f23, 92(r3)
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stfs f24, 96(r3)
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stfs f25, 100(r3)
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stfs f26, 104(r3)
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stfs f27, 108(r3)
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stfs f28, 112(r3)
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stfs f29, 116(r3)
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stfs f30, 120(r3)
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stfs f31, 124(r3)
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/* Also save the FPSCR. */
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mffs f31
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stfs f31, 128(r3)
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#endif
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blr
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#endif /* configUSE_FPU. */
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#if configUSE_FPU == 1
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vPortRestoreFPURegisters:
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/* Enable APU and mark FPU as present. */
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mfmsr r0
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xor r30, r30, r30
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oris r30, r30, 512
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ori r30, r30, 8192
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or r0, r0, r30
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mtmsr r0
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#ifdef USE_DP_FPU
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/* Buffer address is in r3. Restore each flop register from an offset
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into this buffer.
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First the FPSCR. */
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lfs f31, 256(r3)
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mtfsf f31, 7
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lfd f0, 0(r3)
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lfd f1, 8(r3)
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lfd f2, 16(r3)
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lfd f3, 24(r3)
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lfd f4, 32(r3)
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lfd f5, 40(r3)
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lfd f6, 48(r3)
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lfd f7, 56(r3)
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lfd f8, 64(r3)
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lfd f9, 72(r3)
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lfd f10, 80(r3)
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lfd f11, 88(r3)
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lfd f12, 96(r3)
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lfd f13, 104(r3)
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lfd f14, 112(r3)
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lfd f15, 120(r3)
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lfd f16, 128(r3)
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lfd f17, 136(r3)
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lfd f18, 144(r3)
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lfd f19, 152(r3)
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lfd f20, 160(r3)
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lfd f21, 168(r3)
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lfd f22, 176(r3)
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lfd f23, 184(r3)
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lfd f24, 192(r3)
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lfd f25, 200(r3)
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lfd f26, 208(r3)
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lfd f27, 216(r3)
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lfd f28, 224(r3)
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lfd f29, 232(r3)
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lfd f30, 240(r3)
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lfd f31, 248(r3)
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#else
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/* Buffer address is in r3. Restore each flop register from an offset
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into this buffer.
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First the FPSCR. */
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lfs f31, 128(r3)
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mtfsf f31, 7
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lfs f0, 0(r3)
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lfs f1, 4(r3)
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lfs f2, 8(r3)
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lfs f3, 12(r3)
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lfs f4, 16(r3)
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lfs f5, 20(r3)
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lfs f6, 24(r3)
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lfs f7, 28(r3)
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lfs f8, 32(r3)
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lfs f9, 36(r3)
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lfs f10, 40(r3)
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lfs f11, 44(r3)
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lfs f12, 48(r3)
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lfs f13, 52(r3)
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lfs f14, 56(r3)
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lfs f15, 60(r3)
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lfs f16, 64(r3)
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lfs f17, 68(r3)
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lfs f18, 72(r3)
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lfs f19, 76(r3)
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lfs f20, 80(r3)
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lfs f21, 84(r3)
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lfs f22, 88(r3)
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lfs f23, 92(r3)
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lfs f24, 96(r3)
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lfs f25, 100(r3)
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lfs f26, 104(r3)
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lfs f27, 108(r3)
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lfs f28, 112(r3)
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lfs f29, 116(r3)
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lfs f30, 120(r3)
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lfs f31, 124(r3)
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#endif
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blr
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#endif /* configUSE_FPU. */
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