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Add FreeRTOS-Plus directory.
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Richard Barry
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6798 changed files with 134949 additions and 19 deletions
299
FreeRTOS/Source/portable/GCC/PPC440_Xilinx/port.c
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299
FreeRTOS/Source/portable/GCC/PPC440_Xilinx/port.c
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/*
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FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* FreeRTOS tutorial books are available in pdf and paperback. *
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* Complete, revised, and edited pdf reference manuals are also *
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* available. *
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* *
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* Purchasing FreeRTOS documentation will not only help you, by *
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* ensuring you get running as quickly as possible and with an *
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* in-depth knowledge of how to use FreeRTOS, it will also help *
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* the FreeRTOS project to continue with its mission of providing *
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* professional grade, cross platform, de facto standard solutions *
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* for microcontrollers - completely free of charge! *
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* *
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* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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* *
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* Thank you for using FreeRTOS, and thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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>>>NOTE<<< The modification to the GPL is included to allow you to
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distribute a combined work that includes FreeRTOS without being obliged to
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provide the source code for proprietary components outside of the FreeRTOS
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kernel. FreeRTOS is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong? *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, training, latest information,
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license and contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool.
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Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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the code with commercial support, indemnification, and middleware, under
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the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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provide a safety engineered and independently SIL3 certified version under
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the SafeRTOS brand: http://www.SafeRTOS.com.
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the PPC440 port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Library includes. */
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#include "xtime_l.h"
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#include "xintc.h"
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#include "xintc_i.h"
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/*-----------------------------------------------------------*/
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/* Definitions to set the initial MSR of each task. */
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#define portCRITICAL_INTERRUPT_ENABLE ( 1UL << 17UL )
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#define portEXTERNAL_INTERRUPT_ENABLE ( 1UL << 15UL )
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#define portMACHINE_CHECK_ENABLE ( 1UL << 12UL )
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#if configUSE_FPU == 1
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#define portAPU_PRESENT ( 1UL << 25UL )
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#define portFCM_FPU_PRESENT ( 1UL << 13UL )
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#else
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#define portAPU_PRESENT ( 0UL )
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#define portFCM_FPU_PRESENT ( 0UL )
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#endif
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#define portINITIAL_MSR ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE | portAPU_PRESENT | portFCM_FPU_PRESENT )
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extern const unsigned _SDA_BASE_;
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extern const unsigned _SDA2_BASE_;
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/*-----------------------------------------------------------*/
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/*
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* Setup the system timer to generate the tick interrupt.
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*/
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static void prvSetupTimerInterrupt( void );
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/*
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* The handler for the tick interrupt - defined in portasm.s.
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*/
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extern void vPortTickISR( void );
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/*
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* The handler for the yield function - defined in portasm.s.
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*/
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extern void vPortYield( void );
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/*
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* Function to start the scheduler running by starting the highest
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* priority task that has thus far been created.
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*/
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extern void vPortStartFirstTask( void );
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/*-----------------------------------------------------------*/
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/* Structure used to hold the state of the interrupt controller. */
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static XIntc xInterruptController;
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/*-----------------------------------------------------------*/
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/*
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* Initialise the stack of a task to look exactly as if the task had been
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* interrupted.
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*
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* See the header file portable.h.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* Place a known value at the bottom of the stack for debugging. */
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*pxTopOfStack = 0xDEADBEEF;
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pxTopOfStack--;
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/* EABI stack frame. */
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pxTopOfStack -= 20; /* Previous backchain and LR, R31 to R4 inclusive. */
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/* Parameters in R13. */
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*pxTopOfStack = ( portSTACK_TYPE ) &_SDA_BASE_; /* address of the first small data area */
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pxTopOfStack -= 10;
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/* Parameters in R3. */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
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pxTopOfStack--;
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/* Parameters in R2. */
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*pxTopOfStack = ( portSTACK_TYPE ) &_SDA2_BASE_; /* address of the second small data area */
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pxTopOfStack--;
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/* R1 is the stack pointer so is omitted. */
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*pxTopOfStack = 0x10000001UL;; /* R0. */
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pxTopOfStack--;
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*pxTopOfStack = 0x00000000UL; /* USPRG0. */
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pxTopOfStack--;
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*pxTopOfStack = 0x00000000UL; /* CR. */
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pxTopOfStack--;
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*pxTopOfStack = 0x00000000UL; /* XER. */
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pxTopOfStack--;
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*pxTopOfStack = 0x00000000UL; /* CTR. */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler; /* LR. */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_MSR;/* SRR1. */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler;/* Next LR. */
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pxTopOfStack--;
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*pxTopOfStack = 0x00000000UL;/* Backchain. */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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prvSetupTimerInterrupt();
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XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
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vPortStartFirstTask();
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/* Should not get here as the tasks are now running! */
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return pdFALSE;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented. */
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for( ;; );
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}
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/*-----------------------------------------------------------*/
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/*
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* Hardware initialisation to generate the RTOS tick.
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*/
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static void prvSetupTimerInterrupt( void )
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{
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const unsigned long ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
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XTime_DECClearInterrupt();
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XTime_FITClearInterrupt();
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XTime_WDTClearInterrupt();
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XTime_WDTDisableInterrupt();
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XTime_FITDisableInterrupt();
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XExc_RegisterHandler( XEXC_ID_DEC_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 );
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XTime_DECEnableAutoReload();
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XTime_DECSetInterval( ulInterval );
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XTime_DECEnableInterrupt();
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}
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/*-----------------------------------------------------------*/
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void vPortISRHandler( void *pvNullDoNotUse )
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{
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unsigned long ulInterruptStatus, ulInterruptMask = 1UL;
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portBASE_TYPE xInterruptNumber;
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XIntc_Config *pxInterruptController;
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XIntc_VectorTableEntry *pxTable;
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/* Just to remove compiler warning. */
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( void ) pvNullDoNotUse;
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/* Get the configuration by using the device ID - in this case it is
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assumed that only one interrupt controller is being used. */
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pxInterruptController = &XIntc_ConfigTable[ XPAR_XPS_INTC_0_DEVICE_ID ];
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/* Which interrupts are pending? */
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ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress );
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for( xInterruptNumber = 0; xInterruptNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; xInterruptNumber++ )
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{
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if( ulInterruptStatus & 0x01UL )
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{
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/* Clear the pending interrupt. */
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XIntc_mAckIntr( pxInterruptController->BaseAddress, ulInterruptMask );
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/* Call the registered handler. */
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pxTable = &( pxInterruptController->HandlerTable[ xInterruptNumber ] );
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pxTable->Handler( pxTable->CallBackRef );
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}
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/* Check the next interrupt. */
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ulInterruptMask <<= 0x01UL;
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ulInterruptStatus >>= 0x01UL;
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/* Have we serviced all interrupts? */
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if( ulInterruptStatus == 0UL )
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{
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break;
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}
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}
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}
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/*-----------------------------------------------------------*/
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void vPortSetupInterruptController( void )
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{
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extern void vPortISRWrapper( void );
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/* Perform all library calls necessary to initialise the exception table
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and interrupt controller. This assumes only one interrupt controller is in
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use. */
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XExc_mDisableExceptions( XEXC_NON_CRITICAL );
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XExc_Init();
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/* The library functions save the context - we then jump to a wrapper to
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save the stack into the TCB. The wrapper then calls the handler defined
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above. */
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XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, ( XExceptionHandler ) vPortISRWrapper, NULL );
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XIntc_Initialize( &xInterruptController, XPAR_XPS_INTC_0_DEVICE_ID );
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XIntc_Start( &xInterruptController, XIN_REAL_MODE );
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
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{
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portBASE_TYPE xReturn = pdFAIL;
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/* This function is defined here so the scope of xInterruptController can
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remain within this file. */
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if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) )
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{
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XIntc_Enable( &xInterruptController, ucInterruptID );
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xReturn = pdPASS;
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}
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return xReturn;
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}
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