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Add FreeRTOS-Plus directory.

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Richard Barry 2012-08-11 21:34:11 +00:00
parent 7bd5f21ad5
commit f508a5f653
6798 changed files with 134949 additions and 19 deletions
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618
FreeRTOS/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/Makefile Normal file
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# Hey Emacs, this is a -*- makefile -*-
# Goals available on make command line:
#
# [all] Default goal: build the project.
# clean Clean up the project.
# rebuild Rebuild the project.
# ccversion Display CC version information.
# cppfiles file.i Generate preprocessed files from C source files.
# asfiles file.x Generate preprocessed assembler files from C and assembler source files.
# objfiles file.o Generate object files from C and assembler source files.
# a file.a Archive: create A output file from object files.
# elf file.elf Link: create ELF output file from object files.
# lss file.lss Create extended listing from target output file.
# sym file.sym Create symbol table from target output file.
# hex file.hex Create Intel HEX image from ELF output file.
# bin file.bin Create binary image from ELF output file.
# sizes Display target size information.
# isp Use ISP instead of JTAGICE mkII when programming.
# cpuinfo Get CPU information.
# halt Stop CPU execution.
# chiperase Perform a JTAG Chip Erase command.
# erase Perform a flash chip erase.
# program Program MCU memory from ELF output file.
# secureflash Protect chip by setting security bit.
# reset Reset MCU.
# debug Open a debug connection with the MCU.
# run Start CPU execution.
# readregs Read CPU registers.
# doc Build the documentation.
# cleandoc Clean up the documentation.
# rebuilddoc Rebuild the documentation.
# verbose Display main executed commands.
# Copyright (c) 2007, Atmel Corporation All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this
# list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice,
# this list of conditions and the following disclaimer in the documentation and/
# or other materials provided with the distribution.
#
# 3. The name of ATMEL may not be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
# SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
# ENVIRONMENT SETTINGS
# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
FirstWord = $(if $(1),$(word 1,$(1)))
LastWord = $(if $(1),$(word $(words $(1)),$(1)))
MAKE = make
MAKECFG = config.mk
TGTTYPE = $(suffix $(TARGET))
RM = rm -Rf
AR = avr32-ar
ARFLAGS = rcs
CPP = $(CC) -E
CPPFLAGS = -march=$(ARCH) -mpart=$(PART) $(WARNINGS) $(DEFS) \
$(PLATFORM_INC_PATH:%=-I%) $(INC_PATH:%=-I%) $(CPP_EXTRA_FLAGS)
DPNDFILES = $(CSRCS:.c=.d) $(ASSRCS:.S=.d)
CPPFILES = $(CSRCS:.c=.i)
CC = avr32-gcc
CFLAGS = $(DEBUG) $(OPTIMIZATION) $(C_EXTRA_FLAGS) \
$(PLATFORM_INC_PATH:%=-Wa,-I%) $(INC_PATH:%=-Wa,-I%) $(AS_EXTRA_FLAGS)
ASFILES = $(CSRCS:.c=.x) $(ASSRCS:.S=.x)
AS = avr32-as
ASFLAGS = $(DEBUG) \
$(PLATFORM_INC_PATH:%=-Wa,-I%) $(INC_PATH:%=-Wa,-I%) $(AS_EXTRA_FLAGS)
OBJFILES = $(CSRCS:.c=.o) $(ASSRCS:.S=.o)
LD = avr32-ld
LDFLAGS = -march=$(ARCH) -mpart=$(PART) \
$(LIB_PATH:%=-L%) $(LINKER_SCRIPT:%=-T%) $(LD_EXTRA_FLAGS)
LOADLIBES =
LDLIBS = $(LIBS:%=-l%)
OBJDUMP = avr32-objdump
LSS = $(TARGET:$(TGTTYPE)=.lss)
NM = avr32-nm
SYM = $(TARGET:$(TGTTYPE)=.sym)
OBJCOPY = avr32-objcopy
HEX = $(TARGET:$(TGTTYPE)=.hex)
BIN = $(TARGET:$(TGTTYPE)=.bin)
SIZE = avr32-size
SLEEP = sleep
SLEEPUSB = 9
PROGRAM = avr32program
ISP = batchisp
ISPFLAGS = -device at32$(PART) -hardware usb -operation
DBGPROXY = avr32gdbproxy
DOCGEN = doxygen
# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
# MESSAGES
# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
ERR_TARGET_TYPE = Target type not supported: `$(TGTTYPE)'
MSG_CLEANING = Cleaning project.
MSG_PREPROCESSING = Preprocessing \`$<\' to \`$@\'.
MSG_COMPILING = Compiling \`$<\' to \`$@\'.
MSG_ASSEMBLING = Assembling \`$<\' to \`$@\'.
MSG_ARCHIVING = Archiving to \`$@\'.
MSG_LINKING = Linking to \`$@\'.
MSG_EXTENDED_LISTING = Creating extended listing to \`$@\'.
MSG_SYMBOL_TABLE = Creating symbol table to \`$@\'.
MSG_IHEX_IMAGE = Creating Intel HEX image to \`$@\'.
MSG_BINARY_IMAGE = Creating binary image to \`$@\'.
MSG_GETTING_CPU_INFO = Getting CPU information.
MSG_HALTING = Stopping CPU execution.
MSG_ERASING_CHIP = Performing a JTAG Chip Erase command.
MSG_ERASING = Performing a flash chip erase.
MSG_PROGRAMMING = Programming MCU memory from \`$(TARGET)\'.
MSG_SECURING_FLASH = Protecting chip by setting security bit.
MSG_RESETTING = Resetting MCU.
MSG_DEBUGGING = Opening debug connection with MCU.
MSG_RUNNING = Starting CPU execution.
MSG_READING_CPU_REGS = Reading CPU registers.
MSG_CLEANING_DOC = Cleaning documentation.
MSG_GENERATING_DOC = Generating documentation to \`$(DOC_PATH)\'.
# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
# MAKE RULES
# ** ** ** *** ** ** ** ** ** ** ** ** ** ** **
# Include the make configuration file.
include $(MAKECFG)
# ** ** TOP-LEVEL RULES ** **
# Default goal: build the project.
ifeq ($(TGTTYPE),.a)
.PHONY: all
all: ccversion a lss sym sizes
else
ifeq ($(TGTTYPE),.elf)
.PHONY: all
all: ccversion elf lss sym hex bin sizes
else
$(error $(ERR_TARGET_TYPE))
endif
endif
# Clean up the project.
.PHONY: clean
clean:
@echo $(MSG_CLEANING)
-$(VERBOSE_CMD)$(RM) $(BIN)
-$(VERBOSE_CMD)$(RM) $(HEX)
-$(VERBOSE_CMD)$(RM) $(SYM)
-$(VERBOSE_CMD)$(RM) $(LSS)
-$(VERBOSE_CMD)$(RM) $(TARGET)
-$(VERBOSE_CMD)$(RM) $(OBJFILES)
-$(VERBOSE_CMD)$(RM) $(ASFILES)
-$(VERBOSE_CMD)$(RM) $(CPPFILES)
-$(VERBOSE_CMD)$(RM) $(DPNDFILES)
$(VERBOSE_NL)
# Rebuild the project.
.PHONY: rebuild
rebuild: clean all
# Display CC version information.
.PHONY: ccversion
ccversion:
@echo
@echo
@$(CC) --version
# Generate preprocessed files from C source files.
.PHONY: cppfiles
cppfiles: $(CPPFILES)
# Generate preprocessed assembler files from C and assembler source files.
.PHONY: asfiles
asfiles: $(ASFILES)
# Generate object files from C and assembler source files.
.PHONY: objfiles
objfiles: $(OBJFILES)
ifeq ($(TGTTYPE),.a)
# Archive: create A output file from object files.
.PHONY: a
a: $(TARGET)
else
ifeq ($(TGTTYPE),.elf)
# Link: create ELF output file from object files.
.PHONY: elf
elf: $(TARGET)
endif
endif
# Create extended listing from target output file.
.PHONY: lss
lss: $(LSS)
# Create symbol table from target output file.
.PHONY: sym
sym: $(SYM)
ifeq ($(TGTTYPE),.elf)
# Create Intel HEX image from ELF output file.
.PHONY: hex
hex: $(HEX)
# Create binary image from ELF output file.
.PHONY: bin
bin: $(BIN)
endif
# Display target size information.
.PHONY: sizes
sizes: $(TARGET)
@echo
@echo
ifeq ($(TGTTYPE),.a)
@$(SIZE) -Bxt $<
else
ifeq ($(TGTTYPE),.elf)
@$(SIZE) -Ax $<
@$(SIZE) -Bx $<
endif
endif
@echo
@echo
ifeq ($(TGTTYPE),.elf)
# Use ISP instead of JTAGICE mkII when programming.
.PHONY: isp
ifeq ($(filter-out isp verbose,$(MAKECMDGOALS)),)
isp: all
else
isp:
@:
endif
ifeq ($(findstring isp,$(MAKECMDGOALS)),)
# Get CPU information.
.PHONY: cpuinfo
cpuinfo:
@echo
@echo $(MSG_GETTING_CPU_INFO)
$(VERBOSE_CMD)$(PROGRAM) cpuinfo
ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),cpuinfo)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
# Stop CPU execution.
.PHONY: halt
halt:
ifeq ($(filter cpuinfo chiperase erase program secureflash reset run readregs,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_HALTING)
$(VERBOSE_CMD)$(PROGRAM) halt
ifneq ($(call LastWord,$(filter halt debug,$(MAKECMDGOALS))),halt)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
else
@:
endif
# Perform a JTAG Chip Erase command.
.PHONY: chiperase
chiperase:
@echo
@echo $(MSG_ERASING_CHIP)
$(VERBOSE_CMD)$(PROGRAM) chiperase
ifneq ($(call LastWord,$(filter cpuinfo chiperase program secureflash reset debug run readregs,$(MAKECMDGOALS))),chiperase)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
# Perform a flash chip erase.
.PHONY: erase
erase:
ifeq ($(filter chiperase program,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_ERASING)
$(VERBOSE_CMD)$(PROGRAM) erase $(FLASH:%=-f%)
ifneq ($(call LastWord,$(filter cpuinfo erase secureflash reset debug run readregs,$(MAKECMDGOALS))),erase)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
else
@:
endif
# Program MCU memory from ELF output file.
.PHONY: program
program: all
@echo
@echo $(MSG_PROGRAMMING)
$(VERBOSE_CMD)$(PROGRAM) program $(FLASH:%=-f%) $(PROG_CLOCK:%=-c%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $(TARGET)
ifneq ($(call LastWord,$(filter cpuinfo chiperase program secureflash debug readregs,$(MAKECMDGOALS))),program)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
# Protect chip by setting security bit.
.PHONY: secureflash
secureflash:
@echo
@echo $(MSG_SECURING_FLASH)
$(VERBOSE_CMD)$(PROGRAM) secureflash
ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),secureflash)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
# Reset MCU.
.PHONY: reset
reset:
ifeq ($(filter program run,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_RESETTING)
$(VERBOSE_CMD)$(PROGRAM) reset
ifneq ($(call LastWord,$(filter cpuinfo chiperase erase secureflash reset debug readregs,$(MAKECMDGOALS))),reset)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
else
@:
endif
# Open a debug connection with the MCU.
.PHONY: debug
debug:
@echo
@echo $(MSG_DEBUGGING)
$(VERBOSE_CMD)$(DBGPROXY) $(FLASH:%=-f%)
ifneq ($(call LastWord,$(filter cpuinfo halt chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),debug)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
# Start CPU execution.
.PHONY: run
run:
ifeq ($(findstring program,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_RUNNING)
$(VERBOSE_CMD)$(PROGRAM) run $(if $(findstring reset,$(MAKECMDGOALS)),-R)
ifneq ($(call LastWord,$(filter cpuinfo chiperase erase secureflash debug run readregs,$(MAKECMDGOALS))),run)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
else
@:
endif
# Read CPU registers.
.PHONY: readregs
readregs:
@echo
@echo $(MSG_READING_CPU_REGS)
$(VERBOSE_CMD)$(PROGRAM) readregs
ifneq ($(call LastWord,$(filter cpuinfo chiperase erase program secureflash reset debug run readregs,$(MAKECMDGOALS))),readregs)
@$(SLEEP) $(SLEEPUSB)
else
@echo
endif
else
# Perform a flash chip erase.
.PHONY: erase
erase:
ifeq ($(findstring program,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_ERASING)
$(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck
ifeq ($(call LastWord,$(filter erase secureflash debug run,$(MAKECMDGOALS))),erase)
@echo
endif
else
@:
endif
# Program MCU memory from ELF output file.
.PHONY: program
program: all
@echo
@echo $(MSG_PROGRAMMING)
$(VERBOSE_CMD)$(ISP) $(ISPFLAGS) erase f memory flash blankcheck loadbuffer $(TARGET) program verify $(if $(findstring run,$(MAKECMDGOALS)),$(if $(findstring secureflash,$(MAKECMDGOALS)),,start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0))
ifeq ($(call LastWord,$(filter program secureflash debug,$(MAKECMDGOALS))),program)
@echo
endif
# Protect chip by setting security bit.
.PHONY: secureflash
secureflash:
@echo
@echo $(MSG_SECURING_FLASH)
$(VERBOSE_CMD)$(ISP) $(ISPFLAGS) memory security addrange 0x0 0x0 fillbuffer 0x01 program $(if $(findstring run,$(MAKECMDGOALS)),start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0)
ifeq ($(call LastWord,$(filter erase program secureflash debug,$(MAKECMDGOALS))),secureflash)
@echo
endif
# Reset MCU.
.PHONY: reset
reset:
@:
# Open a debug connection with the MCU.
.PHONY: debug
debug:
@echo
@echo $(MSG_DEBUGGING)
$(VERBOSE_CMD)$(DBGPROXY) $(FLASH:%=-f%)
ifeq ($(call LastWord,$(filter erase program secureflash debug run,$(MAKECMDGOALS))),debug)
@echo
endif
# Start CPU execution.
.PHONY: run
run:
ifeq ($(filter program secureflash,$(MAKECMDGOALS)),)
@echo
@echo $(MSG_RUNNING)
$(VERBOSE_CMD)$(ISP) $(ISPFLAGS) start $(if $(findstring reset,$(MAKECMDGOALS)),,no)reset 0
ifeq ($(call LastWord,$(filter erase debug run,$(MAKECMDGOALS))),run)
@echo
endif
else
@:
endif
endif
endif
# Build the documentation.
.PHONY: doc
doc:
@echo
@echo $(MSG_GENERATING_DOC)
$(VERBOSE_CMD)cd $(dir $(DOC_CFG)) && $(DOCGEN) $(notdir $(DOC_CFG))
@echo
# Clean up the documentation.
.PHONY: cleandoc
cleandoc:
@echo $(MSG_CLEANING_DOC)
-$(VERBOSE_CMD)$(RM) $(DOC_PATH)
$(VERBOSE_NL)
# Rebuild the documentation.
.PHONY: rebuilddoc
rebuilddoc: cleandoc doc
# Display main executed commands.
.PHONY: verbose
ifeq ($(filter-out isp verbose,$(MAKECMDGOALS)),)
verbose: all
else
verbose:
@:
endif
ifneq ($(findstring verbose,$(MAKECMDGOALS)),)
# Prefix displaying the following command if and only if verbose is a goal.
VERBOSE_CMD =
# New line displayed if and only if verbose is a goal.
VERBOSE_NL = @echo
else
VERBOSE_CMD = @
VERBOSE_NL =
endif
# ** ** COMPILATION RULES ** **
# Include silently the dependency files.
-include $(DPNDFILES)
# The dependency files are not built alone but along with first generation files.
$(DPNDFILES):
# First generation files depend on make files.
$(CPPFILES) $(ASFILES) $(OBJFILES): Makefile $(MAKECFG)
ifeq ($(TGTTYPE),.elf)
# Files resulting from linking depend on linker script.
$(TARGET): $(LINKER_SCRIPT)
endif
# Preprocess: create preprocessed files from C source files.
%.i: %.c %.d
@echo $(MSG_PREPROCESSING)
$(VERBOSE_CMD)$(CPP) $(CPPFLAGS) -MD -MP -MT '$*.i $*.x $*.o' -o $@ $<
@touch $*.d
@touch $@
$(VERBOSE_NL)
# Preprocess & compile: create assembler files from C source files.
%.x: %.c %.d
@echo $(MSG_COMPILING)
$(VERBOSE_CMD)$(CC) -S $(CPPFLAGS) -MD -MP -MT '$*.i $*.o' $(CFLAGS) -o $@ $<
@touch $*.d
@touch $@
$(VERBOSE_NL)
# Preprocess: create preprocessed files from assembler source files.
%.x: %.S %.d
@echo $(MSG_PREPROCESSING)
$(VERBOSE_CMD)$(CPP) $(CPPFLAGS) -MD -MP -MT '$*.x $*.o' -o $@ $<
@touch $*.d
@touch $@
$(VERBOSE_NL)
# Preprocess, compile & assemble: create object files from C source files.
%.o: %.c %.d
@echo $(MSG_COMPILING)
$(VERBOSE_CMD)$(CC) -c $(CPPFLAGS) -MD -MP -MT '$*.i $*.x' $(CFLAGS) -o $@ $<
@touch $*.d
@touch $@
$(VERBOSE_NL)
# Preprocess & assemble: create object files from assembler source files.
%.o: %.S %.d
@echo $(MSG_ASSEMBLING)
$(VERBOSE_CMD)$(CC) -c $(CPPFLAGS) -MD -MP -MT '$*.x' $(ASFLAGS) -o $@ $<
@touch $*.d
@touch $@
$(VERBOSE_NL)
.PRECIOUS: $(OBJFILES)
ifeq ($(TGTTYPE),.a)
# Archive: create A output file from object files.
.SECONDARY: $(TARGET)
$(TARGET): $(OBJFILES)
@echo $(MSG_ARCHIVING)
$(VERBOSE_CMD)$(AR) $(ARFLAGS) $@ $(filter %.o,$+)
$(VERBOSE_NL)
else
ifeq ($(TGTTYPE),.elf)
# Link: create ELF output file from object files.
.SECONDARY: $(TARGET)
$(TARGET): $(OBJFILES)
@echo $(MSG_LINKING)
$(VERBOSE_CMD)$(CC) $(LDFLAGS) $(filter %.o,$+) $(LOADLIBES) $(LDLIBS) -o $@
$(VERBOSE_NL)
endif
endif
# Create extended listing from target output file.
$(LSS): $(TARGET)
@echo $(MSG_EXTENDED_LISTING)
$(VERBOSE_CMD)$(OBJDUMP) -h -S $< > $@
$(VERBOSE_NL)
# Create symbol table from target output file.
$(SYM): $(TARGET)
@echo $(MSG_SYMBOL_TABLE)
$(VERBOSE_CMD)$(NM) -n $< > $@
$(VERBOSE_NL)
ifeq ($(TGTTYPE),.elf)
# Create Intel HEX image from ELF output file.
$(HEX): $(TARGET)
@echo $(MSG_IHEX_IMAGE)
$(VERBOSE_CMD)$(OBJCOPY) -O ihex $< $@
$(VERBOSE_NL)
# Create binary image from ELF output file.
$(BIN): $(TARGET)
@echo $(MSG_BINARY_IMAGE)
$(VERBOSE_CMD)$(OBJCOPY) -O binary $< $@
$(VERBOSE_NL)
endif

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FreeRTOS/Demo/lwIP_AVR32_UC3/AT32UC3A/GCC/config.mk Normal file
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# Hey Emacs, this is a -*- makefile -*-
# The purpose of this file is to define the build configuration variables used
# by the generic Makefile. See Makefile header for further information.
# Copyright (c) 2007, Atmel Corporation All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this
# list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice,
# this list of conditions and the following disclaimer in the documentation and/
# or other materials provided with the distribution.
#
# 3. The name of ATMEL may not be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
# SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# Base paths
PRJ_PATH = ../..
APPS_PATH = $(PRJ_PATH)/APPLICATIONS
BRDS_PATH = $(PRJ_PATH)/BOARDS
COMP_PATH = $(PRJ_PATH)/COMPONENTS
DRVR_PATH = $(PRJ_PATH)/DRIVERS
SERV_PATH = $(PRJ_PATH)/SERVICES
UTIL_PATH = $(PRJ_PATH)/UTILS
# Demo paths
FREERTOS_PATH = ../../../..
FREERTOS_PORT_PATH = $(FREERTOS_PATH)/Source/portable/GCC/AVR32_UC3
FREERTOS_MEM_PATH = $(FREERTOS_PATH)/Source/portable/MemMang
DEMO_PATH = ../..
ETH_PATH = $(DEMO_PATH)/NETWORK
WEB_PATH = $(ETH_PATH)/BasicWEB
TFTP_PATH = $(ETH_PATH)/BasicTFTP
SMTP_PATH = $(ETH_PATH)/BasicSMTP
LWIP_PATH = $(FREERTOS_PATH)/Demo/Common/ethernet/lwIP
LWIP_PORT_PATH = $(ETH_PATH)/lwip-port/AT32UC3A
# CPU architecture: {ap|uc}
ARCH = uc
# Part: {none|ap7xxx|uc3xxxxx}
PART = uc3a0512
# Flash memories: [{cfi|internal}@address,size]...
FLASH = internal@0x80000000,512Kb
# Clock source to use when programming: [{xtal|extclk|int}]
PROG_CLOCK = xtal
# Device/Platform/Board include path
PLATFORM_INC_PATH = \
$(BRDS_PATH)/
# Target name: {*.a|*.elf}
TARGET = $(PART)-lwipdemo.elf
# Definitions: [-D name[=definition]...] [-U name...]
# Things that might be added to DEFS:
# BOARD Board used: {EVKxxxx}
# EXT_BOARD Extension board used (if any): {EXTxxxx}
DEFS = -D BOARD=EVK1100 -D FREERTOS_USED -D HTTP_USED=1 -D TFTP_USED=1 -D SMTP_USED=0
# Include path
INC_PATH = \
$(UTIL_PATH)/ \
$(UTIL_PATH)/PREPROCESSOR/ \
$(SERV_PATH)/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/ \
$(DRVR_PATH)/INTC/ \
$(DRVR_PATH)/TC/ \
$(DRVR_PATH)/PM/ \
$(DRVR_PATH)/GPIO/ \
$(DRVR_PATH)/FLASHC/ \
$(DRVR_PATH)/MACB/ \
$(DEMO_PATH)/ \
$(FREERTOS_PATH)/Source/include/ \
$(FREERTOS_PATH)/Demo/Common/include/ \
$(FREERTOS_PORT_PATH)/ \
$(FREERTOS_MEM_PATH)/ \
$(ETH_PATH)/ \
$(LWIP_PATH)/include/ \
$(LWIP_PATH)/include/ipv4/ \
$(LWIP_PORT_PATH)/ \
$(WEB_PATH)/ \
$(TFTP_PATH)/ \
$(SMTP_PATH)/
# C source files
LWIP_SRC = \
$(LWIP_PATH)/core/inet.c \
$(LWIP_PATH)/core/mem.c \
$(LWIP_PATH)/core/memp.c \
$(LWIP_PATH)/core/netif.c \
$(LWIP_PATH)/core/pbuf.c \
$(LWIP_PATH)/core/raw.c \
$(LWIP_PATH)/core/stats.c \
$(LWIP_PATH)/core/sys.c \
$(LWIP_PATH)/core/tcp.c \
$(LWIP_PATH)/core/tcp_in.c \
$(LWIP_PATH)/core/tcp_out.c \
$(LWIP_PATH)/core/ipv4/ip.c \
$(LWIP_PATH)/core/ipv4/ip_addr.c \
$(LWIP_PATH)/core/ipv4/icmp.c \
$(LWIP_PATH)/api/sockets.c \
$(LWIP_PATH)/api/tcpip.c \
$(LWIP_PATH)/api/api_msg.c \
$(LWIP_PATH)/api/err.c \
$(LWIP_PATH)/api/api_lib.c \
$(LWIP_PATH)/netif/etharp.c \
$(LWIP_PATH)/core/udp.c \
$(LWIP_PATH)/core/ipv4/ip_frag.c
CSRCS = \
$(BRDS_PATH)/EVK1100/led.c \
$(DRVR_PATH)/INTC/intc.c \
$(DRVR_PATH)/TC/tc.c \
$(DRVR_PATH)/PM/pm.c \
$(DRVR_PATH)/MACB/macb.c \
$(DRVR_PATH)/GPIO/gpio.c \
$(DRVR_PATH)/FLASHC/flashc.c \
$(DEMO_PATH)/main.c \
$(DEMO_PATH)/PARTEST/ParTest.c \
$(DEMO_PATH)/SERIAL/serial.c \
$(FREERTOS_PATH)/Source/tasks.c \
$(FREERTOS_PATH)/Source/queue.c \
$(FREERTOS_PATH)/Source/list.c \
$(FREERTOS_PATH)/Source/croutine.c \
$(FREERTOS_PATH)/Demo/Common/Minimal/flash.c \
$(FREERTOS_PORT_PATH)/port.c \
$(FREERTOS_MEM_PATH)/heap_3.c \
$(LWIP_SRC) \
$(LWIP_PORT_PATH)/sys_arch.c \
$(LWIP_PORT_PATH)/ethernetif.c \
$(WEB_PATH)/BasicWEB.c \
$(TFTP_PATH)/BasicTFTP.c \
$(SMTP_PATH)/BasicSMTP.c \
$(ETH_PATH)/ethernet.c \
$(DEMO_PATH)/printf-stdarg.c
# Assembler source files
ASSRCS = \
$(SERV_PATH)/USB/CLASS/DFU/EXAMPLES/ISP/BOOT/trampoline.S \
$(FREERTOS_PORT_PATH)/exception.S
# Library path
LIB_PATH =
# Libraries to link with the project
LIBS =
# Linker script file if any
LINKER_SCRIPT = $(UTIL_PATH)/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds
# Options to request or suppress warnings: [-fsyntax-only] [-pedantic[-errors]] [-w] [-Wwarning...]
# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
WARNINGS = -Wall
# Options for debugging: [-g]...
# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
DEBUG = -g
# Options that control optimization: [-O[0|1|2|3|s]]...
# For further details, refer to the chapter "GCC Command Options" of the GCC manual.
OPTIMIZATION = -O0 -ffunction-sections -fdata-sections
# Extra flags to use when preprocessing
CPP_EXTRA_FLAGS =
# Extra flags to use when compiling
C_EXTRA_FLAGS =
# Extra flags to use when assembling
AS_EXTRA_FLAGS =
# Extra flags to use when linking
LD_EXTRA_FLAGS = -Wl,--gc-sections -Wl,-e,_trampoline
# Documentation path
DOC_PATH = ./DOC/
# Documentation configuration file
DOC_CFG = ./doxyfile.doxygen

8
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target extended-remote 127.0.0.1:1024
symbol uc3a0512-demo.elf
define current_task
printf "Task name: %s\n", ((tskTCB *)pxCurrentTCB)->pcTaskName
printf "pxTopOfStack: %x\n", ((tskTCB *)pxCurrentTCB)->pxTopOfStack
end

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target extended-remote 127.0.0.1:4711
symbol uc3a0512-demo.elf
define current_task
printf "Task name: %s\n", ((tskTCB *)pxCurrentTCB)->pcTaskName
printf "pxTopOfStack: %x\n", ((tskTCB *)pxCurrentTCB)->pxTopOfStack
end

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This is an internal working file generated by the Source Browser.
20:24 19s
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\BasicSMTP.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\BasicTFTP.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\BasicWEB.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ParTest.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\api_lib.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\api_msg.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\err.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\etharp.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ethernet.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ethernetif.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\flash.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\flashc.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\gpio.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\heap_3.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\icmp.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\inet.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\intc.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ip.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ip_addr.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\ip_frag.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\led.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\list.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\macb.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\main.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\mem.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\memp.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\netif.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\pbuf.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\pm.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\port.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\queue.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\raw.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\read.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\serial.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\sockets.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\stats.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\sys.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\sys_arch.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tasks.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tc.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tcp.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tcp_in.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tcp_out.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\tcpip.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\udp.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\usart.pbi
C:\E\Dev\FreeRTOS\Releases\Code\V4.5.0\Demo\lwIP_AVR32_UC3\AT32UC3A\IAR\Debug\Obj\write.pbi

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<?xml version="1.0" encoding="iso-8859-1"?>
<project>
<fileVersion>1</fileVersion>
<configuration>
<name>Debug</name>
<toolchain>
<name>AVR32</name>
</toolchain>
<debug>1</debug>
<settings>
<name>C-SPY</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CMandatory</name>
<state>1</state>
</option>
<option>
<name>CInput</name>
<state>1</state>
</option>
<option>
<name>CCore</name>
<state>0</state>
</option>
<option>
<name>CRunToEnable</name>
<state>1</state>
</option>
<option>
<name>CRunToName</name>
<state>main</state>
</option>
<option>
<name>CMacOverride</name>
<state>0</state>
</option>
<option>
<name>CMacFile</name>
<state></state>
</option>
<option>
<name>DynDriver</name>
<state>JTAGICEMKIIAVR32</state>
</option>
<option>
<name>DDFOverride</name>
<state>0</state>
</option>
<option>
<name>DDFFile</name>
<state>$TOOLKIT_DIR$\config\iouc3a0512.ddf</state>
</option>
<option>
<name>DebuggerUseUbrofResetVector</name>
<state>0</state>
</option>
<option>
<name>IExtraOptionsCheck</name>
<state>0</state>
</option>
<option>
<name>IExtraOptions</name>
<state></state>
</option>
</data>
</settings>
<settings>
<name>JTAGICEMKIIAVR32</name>
<archiveVersion>3</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CJtagIceMkIIMandatory</name>
<state>1</state>
</option>
<option>
<name>CJtagIceMkIIPeripherals</name>
<state>0</state>
</option>
<option>
<name>CJtagIceMkIIReset</name>
<state>0</state>
</option>
<option>
<name>CJtagIceMkIISWBreakpoints</name>
<state>0</state>
</option>
<option>
<name>CJtagIceMkIISuppressDownload</name>
<state>0</state>
</option>
<option>
<name>CJtagIceMkIIVerifyDownload</name>
<state>0</state>
</option>
<option>
<name>CJTagIceMkIICommunicationLogging</name>
<state>0</state>
</option>
<option>
<name>CJtagIceMkIICommLogFile</name>
<state></state>
</option>
<option>
<name>CJtagIceMkIIConnectionRage</name>
<version>0</version>
<state>2</state>
</option>
<option>
<name>CJtagIceMkIIConnectionPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CJtagIceMkIIJtagFrequence</name>
<version>0</version>
<state>8</state>
</option>
<option>
<name>CJtagIceMkIIDaisyChain</name>
<state>0</state>
</option>
<option>
<name>CJtagIceMkIIDaisyChainBeforeDevices</name>
<state>0</state>
</option>
<option>
<name>CJtagIceMkIIDaisyChainBeforeBits</name>
<state>0</state>
</option>
<option>
<name>CJtagIceMkIIDaisyChainAfterDevices</name>
<state>0</state>
</option>
<option>
<name>CJtagIceMkIIDaisyChainAfterBits</name>
<state>0</state>
</option>
<option>
<name>FlashLoaders</name>
<state></state>
</option>
<option>
<name>UseFlashLoader</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>SIMAVR32</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CSimMandatory</name>
<state>1</state>
</option>
</data>
</settings>
<debuggerPlugins>
<plugin>
<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
</debuggerPlugins>
</configuration>
</project>

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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\lwipdemo.ewp</path>
</project>
<batchBuild/>
</workspace>

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@REM This bat file has been generated by the IAR Embeddded Workbench
@REM C-SPY interactive debugger,as an aid to preparing a command
@REM line for running the cspybat command line utility with the
@REM appropriate settings.
@REM
@REM After making some adjustments to this file, you can launch cspybat
@REM by typing the name of this file followed by the name of the debug
@REM file (usually an ubrof file). Note that this file is generated
@REM every time a new debug session is initialized, so you may want to
@REM move or rename the file before making changes.
@REM
@REM Note: some command line arguments cannot be properly generated
@REM by this process. Specifically, the plugin which is responsible
@REM for the Terminal I/O window (and other C runtime functionality)
@REM comes in a special version for cspybat, and the name of that
@REM plugin dll is not known when generating this file. It resides in
@REM the $TOOLKIT_DIR$\bin folder and is usually called XXXbat.dll or
@REM XXXlibsupportbat.dll, where XXX is the name of the corresponding
@REM tool chain. Replace the '<libsupport_plugin>' parameter
@REM below with the appropriate file name. Other plugins loaded by
@REM C-SPY are usually not needed by, or will not work in, cspybat
@REM but they are listed at the end of this file for reference.
"C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\bin\cspybat" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\avr32proc.dll" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\avr32jtagicemkII.dll" %1 --plugin "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\<libsupport_plugin>" --backend -B "--core" "avr32a" "--avr32_simd_instructions" "disabled" "--avr32_dsp_instructions" "enabled" "--avr32_rmw_instructions" "enabled" "-p" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\config\iouc3a0512.ddf" "-d" "jtagicemkII" "--drv_communication" "USB" "--jtagice_clock" "100000"
@REM Loaded plugins:
@REM avr32LibSupport.dll
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\CodeCoverage\CodeCoverage.dll
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\Profiling\Profiling.dll
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\stack\stack.dll

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<?xml version="1.0" encoding="iso-8859-1"?>
<Project/>

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[Breakpoints]
Count=0
[TraceHelper]
Enabled=0
ShowSource=1

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<?xml version="1.0" encoding="iso-8859-1"?>
<Workspace>
<ConfigDictionary>
<CurrentConfigs><Project>lwipdemo/Debug</Project></CurrentConfigs></ConfigDictionary>
<Desktop>
<Static>
<Build>
<ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1006</ColumnWidth1><ColumnWidth2>268</ColumnWidth2><ColumnWidth3>67</ColumnWidth3></Build>
<Workspace>
<ColumnWidths>
<Column0>124</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
</Workspace>
</Static>
<Windows>
<Wnd0>
<Tabs>
<Tab>
<Identity>TabID-32105-15798</Identity>
<TabName>Workspace</TabName>
<Factory>Workspace</Factory>
<Session>
<NodeDict><ExpandedNode>lwipdemo</ExpandedNode></NodeDict></Session>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd0><Wnd1>
<Tabs>
<Tab>
<Identity>TabID-10086-15801</Identity>
<TabName>Build</TabName>
<Factory>Build</Factory>
<Session/>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd1></Windows>
<Editor>
<Pane/><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-0087f048><key>iaridepm.enu1</key></Toolbar-0087f048></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>198</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>142857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1402</Right><x>-2</x><y>-2</y><xscreen>1404</xscreen><yscreen>200</yscreen><sizeHorzCX>1002857</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>142857</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
</Desktop>
</Workspace>

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3A EVK1100 board header file.
*
* This file contains definitions and services related to the features of the
* EVK1100 board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3A devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _EVK1100_H_
#define _EVK1100_H_
#include "compiler.h"
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
# include "led.h"
#endif // __AVR32_ABI_COMPILER__
/*! \name Oscillator Definitions
*/
//! @{
// RCOsc has no custom calibration by default. Set the following definition to
// the appropriate value if a custom RCOsc calibration has been applied to your
// part.
//#define FRCOSC 115200 //!< RCOsc frequency: Hz.
#define FOSC32 32768 //!< Osc32 frequency: Hz.
#define OSC32_STARTUP 3 //!< Osc32 startup time: RCOsc periods.
#define FOSC0 12000000 //!< Osc0 frequency: Hz.
#define OSC0_STARTUP 3 //!< Osc0 startup time: RCOsc periods.
// Osc1 crystal is not mounted by default. Set the following definitions to the
// appropriate values if a custom Osc1 crystal is mounted on your board.
//#define FOSC1 12000000 //!< Osc1 frequency: Hz.
//#define OSC1_STARTUP 3 //!< Osc1 startup time: RCOsc periods.
//! @}
/*! \name SDRAM Definitions
*/
//! @{
//! Part header file of used SDRAM(s).
#define SDRAM_PART_HDR "MT48LC16M16A2TG7E/mt48lc16m16a2tg7e.h"
//! Data bus width to use the SDRAM(s) with (16 or 32 bits; always 16 bits on
//! UC3).
#define SDRAM_DBW 16
//! @}
/*! \name USB Definitions
*/
//! @{
//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x.
//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and
//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from <avr32/uc3axxxx.h>.
#define USB_ID AVR32_USBB_USB_ID_0_0
//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x.
//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and
//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from <avr32/uc3axxxx.h>.
#ifdef EVK1100_REVA
# define USB_VBOF AVR32_USBB_USB_VBOF_0_0
#else
# define USB_VBOF AVR32_USBB_USB_VBOF_0_1
#endif
//! Active level of the USB_VBOF output pin.
#ifdef EVK1100_REVA
# define USB_VBOF_ACTIVE_LEVEL HIGH
#else
# define USB_VBOF_ACTIVE_LEVEL LOW
#endif
//! USB overcurrent detection pin.
#ifdef EVK1100_REVA
# define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PB18
#else
# define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PX33
#endif
//! @}
//! GPIO connection of the MAC PHY PWR_DOWN/INT signal.
#ifdef EVK1100_REVA
# define MACB_INTERRUPT_PIN AVR32_PIN_PX12
#else
# define MACB_INTERRUPT_PIN AVR32_PIN_PA24
#endif
//! Number of LEDs.
#define LED_COUNT 8
/*! \name GPIO Connections of LEDs
*/
//! @{
#ifdef EVK1100_REVA
# define LED0_GPIO AVR32_PIN_PX13
# define LED1_GPIO AVR32_PIN_PX14
# define LED2_GPIO AVR32_PIN_PX15
# define LED3_GPIO AVR32_PIN_PX16
# define LED4_GPIO AVR32_PIN_PB19
# define LED5_GPIO AVR32_PIN_PB20
# define LED6_GPIO AVR32_PIN_PB21
# define LED7_GPIO AVR32_PIN_PB22
#else
# define LED0_GPIO AVR32_PIN_PB27
# define LED1_GPIO AVR32_PIN_PB28
# define LED2_GPIO AVR32_PIN_PB29
# define LED3_GPIO AVR32_PIN_PB30
# define LED4_GPIO AVR32_PIN_PB19
# define LED5_GPIO AVR32_PIN_PB20
# define LED6_GPIO AVR32_PIN_PB21
# define LED7_GPIO AVR32_PIN_PB22
#endif
//! @}
/*! \name PWM Channels of LEDs
*/
//! @{
#define LED0_PWM (-1)
#define LED1_PWM (-1)
#define LED2_PWM (-1)
#define LED3_PWM (-1)
#define LED4_PWM 0
#define LED5_PWM 1
#define LED6_PWM 2
#define LED7_PWM 3
//! @}
/*! \name PWM Functions of LEDs
*/
//! @{
#define LED0_PWM_FUNCTION (-1)
#define LED1_PWM_FUNCTION (-1)
#define LED2_PWM_FUNCTION (-1)
#define LED3_PWM_FUNCTION (-1)
#define LED4_PWM_FUNCTION AVR32_PWM_PWM_0_FUNCTION
#define LED5_PWM_FUNCTION AVR32_PWM_PWM_1_FUNCTION
#define LED6_PWM_FUNCTION AVR32_PWM_PWM_2_FUNCTION
#define LED7_PWM_FUNCTION AVR32_PWM_PWM_3_FUNCTION
//! @}
/*! \name Color Identifiers of LEDs to Use with LED Functions
*/
//! @{
#ifdef EVK1100_REVA
# define LED_MONO0_GREEN LED4
# define LED_MONO1_GREEN LED5
# define LED_MONO2_GREEN LED6
# define LED_MONO3_GREEN LED7
# define LED_BI0_GREEN LED1
# define LED_BI0_RED LED0
# define LED_BI1_GREEN LED3
# define LED_BI1_RED LED2
#else
# define LED_MONO0_GREEN LED0
# define LED_MONO1_GREEN LED1
# define LED_MONO2_GREEN LED2
# define LED_MONO3_GREEN LED3
# define LED_BI0_GREEN LED5
# define LED_BI0_RED LED4
# define LED_BI1_GREEN LED7
# define LED_BI1_RED LED6
#endif
//! @}
/*! \name GPIO Connections of Push Buttons
*/
//! @{
#ifdef EVK1100_REVA
# define GPIO_PUSH_BUTTON_0 AVR32_PIN_PB28
# define GPIO_PUSH_BUTTON_1 AVR32_PIN_PB29
# define GPIO_PUSH_BUTTON_2 AVR32_PIN_PB27
#else
# define GPIO_PUSH_BUTTON_0 AVR32_PIN_PX16
# define GPIO_PUSH_BUTTON_1 AVR32_PIN_PX19
# define GPIO_PUSH_BUTTON_2 AVR32_PIN_PX22
#endif
//! @}
/*! \name GPIO Connections of the Joystick
*/
//! @{
#define GPIO_JOYSTICK_PUSH AVR32_PIN_PA20
#define GPIO_JOYSTICK_LEFT AVR32_PIN_PA25
#define GPIO_JOYSTICK_RIGHT AVR32_PIN_PA28
#define GPIO_JOYSTICK_UP AVR32_PIN_PA26
#define GPIO_JOYSTICK_DOWN AVR32_PIN_PA27
//! @}
/*! \name ADC Connection of the Potentiometer
*/
//! @{
#define ADC_POTENTIOMETER_CHANNEL 1
#define ADC_POTENTIOMETER_PIN AVR32_ADC_AD_1_PIN
#define ADC_POTENTIOMETER_FUNCTION AVR32_ADC_AD_1_FUNCTION
//! @}
/*! \name ADC Connection of the Temperature Sensor
*/
//! @{
#define ADC_TEMPERATURE_CHANNEL 0
#define ADC_TEMPERATURE_PIN AVR32_ADC_AD_0_PIN
#define ADC_TEMPERATURE_FUNCTION AVR32_ADC_AD_0_FUNCTION
//! @}
/*! \name ADC Connection of the Light Sensor
*/
//! @{
#define ADC_LIGHT_CHANNEL 2
#define ADC_LIGHT_PIN AVR32_ADC_AD_2_PIN
#define ADC_LIGHT_FUNCTION AVR32_ADC_AD_2_FUNCTION
//! @}
/*! \name SPI Connections of the DIP204 LCD
*/
//! @{
#define DIP204_SPI (&AVR32_SPI1)
#define DIP204_SPI_CS 2
#define DIP204_SPI_SCK_PIN AVR32_SPI1_SCK_0_PIN
#define DIP204_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_FUNCTION
#define DIP204_SPI_MISO_PIN AVR32_SPI1_MISO_0_PIN
#define DIP204_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_FUNCTION
#define DIP204_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_PIN
#define DIP204_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_FUNCTION
#define DIP204_SPI_NPCS_PIN AVR32_SPI1_NPCS_2_PIN
#define DIP204_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_2_FUNCTION
//! @}
/*! \name GPIO and PWM Connections of the DIP204 LCD Backlight
*/
//! @{
#define DIP204_BACKLIGHT_PIN AVR32_PIN_PB18
#define DIP204_PWM_CHANNEL 6
#define DIP204_PWM_PIN AVR32_PWM_PWM_6_PIN
#define DIP204_PWM_FUNCTION AVR32_PWM_PWM_6_FUNCTION
//! @}
/*! \name SPI Connections of the AT45DBX Data Flash Memory
*/
//! @{
#define AT45DBX_SPI (&AVR32_SPI1)
#define AT45DBX_SPI_SCK_PIN AVR32_SPI1_SCK_0_PIN
#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_FUNCTION
#define AT45DBX_SPI_MISO_PIN AVR32_SPI1_MISO_0_PIN
#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_FUNCTION
#define AT45DBX_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_PIN
#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_FUNCTION
#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI1_NPCS_0_PIN
#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI1_NPCS_0_FUNCTION
//! @}
/*! \name GPIO and SPI Connections of the SD/MMC Connector
*/
//! @{
#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PA02
#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PA07
#define SD_MMC_SPI (&AVR32_SPI1)
#define SD_MMC_SPI_CS 1
#define SD_MMC_SPI_SCK_PIN AVR32_SPI1_SCK_0_PIN
#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_FUNCTION
#define SD_MMC_SPI_MISO_PIN AVR32_SPI1_MISO_0_PIN
#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_FUNCTION
#define SD_MMC_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_PIN
#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_FUNCTION
#define SD_MMC_SPI_NPCS_PIN AVR32_SPI1_NPCS_1_PIN
#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_1_FUNCTION
//! @}
#endif // _EVK1100_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3A EVK1100 board LEDs support package.
*
* This file contains definitions and services related to the LED features of
* the EVK1100 board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3A devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <avr32/io.h>
#include "preprocessor.h"
#include "compiler.h"
#include "evk1100.h"
#include "led.h"
//! Structure describing LED hardware connections.
typedef const struct
{
struct
{
U32 PORT; //!< LED GPIO port.
U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port.
} GPIO; //!< LED GPIO descriptor.
struct
{
S32 CHANNEL; //!< LED PWM channel (< 0 if N/A).
S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A).
} PWM; //!< LED PWM descriptor.
} tLED_DESCRIPTOR;
//! Hardware descriptors of all LEDs.
static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] =
{
#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \
{ \
{LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\
{LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \
},
MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~)
#undef INSERT_LED_DESCRIPTOR
};
//! Saved state of all LEDs.
static volatile U32 LED_State = (1 << LED_COUNT) - 1;
U32 LED_Read_Display(void)
{
return LED_State;
}
void LED_Display(U32 leds)
{
tLED_DESCRIPTOR *led_descriptor;
volatile avr32_gpio_port_t *led_gpio_port;
leds &= (1 << LED_COUNT) - 1;
LED_State = leds;
for (led_descriptor = &LED_DESCRIPTOR[0];
led_descriptor < LED_DESCRIPTOR + LED_COUNT;
led_descriptor++)
{
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
if (leds & 1)
{
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= 1;
}
}
U32 LED_Read_Display_Mask(U32 mask)
{
return Rd_bits(LED_State, mask);
}
void LED_Display_Mask(U32 mask, U32 leds)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
mask &= (1 << LED_COUNT) - 1;
Wr_bits(LED_State, mask, leds);
while (mask)
{
led_shift = 1 + ctz(mask);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
leds >>= led_shift - 1;
if (leds & 1)
{
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= 1;
mask >>= led_shift;
}
}
Bool LED_Test(U32 leds)
{
return Tst_bits(LED_State, leds);
}
void LED_Off(U32 leds)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
leds &= (1 << LED_COUNT) - 1;
Clr_bits(LED_State, leds);
while (leds)
{
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
void LED_On(U32 leds)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
leds &= (1 << LED_COUNT) - 1;
Set_bits(LED_State, leds);
while (leds)
{
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
void LED_Toggle(U32 leds)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
leds &= (1 << LED_COUNT) - 1;
Tgl_bits(LED_State, leds);
while (leds)
{
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
U32 LED_Read_Display_Field(U32 field)
{
return Rd_bitfield(LED_State, field);
}
void LED_Display_Field(U32 field, U32 leds)
{
LED_Display_Mask(field, leds << ctz(field));
}
U8 LED_Get_Intensity(U32 led)
{
tLED_DESCRIPTOR *led_descriptor;
// Check that the argument value is valid.
led = ctz(led);
led_descriptor = &LED_DESCRIPTOR[led];
if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0;
// Return the duty cycle value if the LED PWM channel is enabled, else 0.
return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ?
AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0;
}
void LED_Set_Intensity(U32 leds, U8 intensity)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_pwm_channel_t *led_pwm_channel;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// For each specified LED...
for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift)
{
// Select the next specified LED and check that it has a PWM channel.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
if (led_descriptor->PWM.CHANNEL < 0) continue;
// Initialize or update the LED PWM channel.
led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL];
if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)))
{
led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) &
~(AVR32_PWM_CALG_MASK |
AVR32_PWM_CPOL_MASK |
AVR32_PWM_CPD_MASK);
led_pwm_channel->cprd = 0x000000FF;
led_pwm_channel->cdty = intensity;
AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL;
}
else
{
AVR32_PWM.isr;
while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL)));
led_pwm_channel->cupd = intensity;
}
// Switch the LED pin to its PWM function.
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
if (led_descriptor->PWM.FUNCTION & 0x1)
{
led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK;
}
if (led_descriptor->PWM.FUNCTION & 0x2)
{
led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK;
}
}

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3A EVK1100 board LEDs support package.
*
* This file contains definitions and services related to the LED features of
* the EVK1100 board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3A devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LED_H_
#define _LED_H_
#include "compiler.h"
/*! \name Identifiers of LEDs to Use with LED Functions
*/
//! @{
#define LED0 0x01
#define LED1 0x02
#define LED2 0x04
#define LED3 0x08
#define LED4 0x10
#define LED5 0x20
#define LED6 0x40
#define LED7 0x80
//! @}
/*! \brief Gets the last state of all LEDs set through the LED API.
*
* \return State of all LEDs (1 bit per LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display(void);
/*! \brief Sets the state of all LEDs.
*
* \param leds New state of all LEDs (1 bit per LED).
*
* \note The pins of all LEDs are set to GPIO output mode.
*/
extern void LED_Display(U32 leds);
/*! \brief Gets the last state of the specified LEDs set through the LED API.
*
* \param mask LEDs of which to get the state (1 bit per LED).
*
* \return State of the specified LEDs (1 bit per LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display_Mask(U32 mask);
/*! \brief Sets the state of the specified LEDs.
*
* \param mask LEDs of which to set the state (1 bit per LED).
*
* \param leds New state of the specified LEDs (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Display_Mask(U32 mask, U32 leds);
/*! \brief Tests the last state of the specified LEDs set through the LED API.
*
* \param leds LEDs of which to test the state (1 bit per LED).
*
* \return \c TRUE if at least one of the specified LEDs has a state on, else
* \c FALSE.
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern Bool LED_Test(U32 leds);
/*! \brief Turns off the specified LEDs.
*
* \param leds LEDs to turn off (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Off(U32 leds);
/*! \brief Turns on the specified LEDs.
*
* \param leds LEDs to turn on (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_On(U32 leds);
/*! \brief Toggles the specified LEDs.
*
* \param leds LEDs to toggle (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Toggle(U32 leds);
/*! \brief Gets as a bit-field the last state of the specified LEDs set through
* the LED API.
*
* \param field LEDs of which to get the state (1 bit per LED).
*
* \return State of the specified LEDs (1 bit per LED, beginning with the first
* specified LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display_Field(U32 field);
/*! \brief Sets as a bit-field the state of the specified LEDs.
*
* \param field LEDs of which to set the state (1 bit per LED).
* \param leds New state of the specified LEDs (1 bit per LED, beginning with
* the first specified LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Display_Field(U32 field, U32 leds);
/*! \brief Gets the intensity of the specified LED.
*
* \param led LED of which to get the intensity (1 bit per LED; only the least
* significant set bit is used).
*
* \return Intensity of the specified LED (0x00 to 0xFF).
*
* \warning The PWM channel of the specified LED is supposed to be used only by
* this module.
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U8 LED_Get_Intensity(U32 led);
/*! \brief Sets the intensity of the specified LEDs.
*
* \param leds LEDs of which to set the intensity (1 bit per LED).
* \param intensity New intensity of the specified LEDs (0x00 to 0xFF).
*
* \warning The PWM channels of the specified LEDs are supposed to be used only
* by this module.
*
* \note The pins of the specified LEDs are set to PWM output mode.
*/
extern void LED_Set_Intensity(U32 leds, U8 intensity);
#endif // _LED_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3B EVK1101 board header file.
*
* This file contains definitions and services related to the features of the
* EVK1101 board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3B devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _EVK1101_H_
#define _EVK1101_H_
#include "compiler.h"
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
# include "led.h"
#endif // __AVR32_ABI_COMPILER__
/*! \name Oscillator Definitions
*/
//! @{
// RCOsc has no custom calibration by default. Set the following definition to
// the appropriate value if a custom RCOsc calibration has been applied to your
// part.
//#define FRCOSC 115200 //!< RCOsc frequency: Hz.
#define FOSC32 32768 //!< Osc32 frequency: Hz.
#define OSC32_STARTUP 3 //!< Osc32 startup time: RCOsc periods.
#define FOSC0 12000000 //!< Osc0 frequency: Hz.
#define OSC0_STARTUP 3 //!< Osc0 startup time: RCOsc periods.
// Osc1 crystal is not mounted by default. Set the following definitions to the
// appropriate values if a custom Osc1 crystal is mounted on your board.
//#define FOSC1 12000000 //!< Osc1 frequency: Hz.
//#define OSC1_STARTUP 3 //!< Osc1 startup time: RCOsc periods.
//! @}
/*! \name USB Definitions
*/
//! @{
//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x.
//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and
//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from <avr32/uc3bxxxx.h>.
#define USB_ID AVR32_USBB_USB_ID_0_0
//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x.
//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and
//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from <avr32/uc3bxxxx.h>.
#define USB_VBOF AVR32_USBB_USB_VBOF_0_0
//! Active level of the USB_VBOF output pin.
#define USB_VBOF_ACTIVE_LEVEL LOW
//! USB overcurrent detection pin.
#define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PA20
//! @}
//! Number of LEDs.
#define LED_COUNT 4
/*! \name GPIO Connections of LEDs
*/
//! @{
#define LED0_GPIO AVR32_PIN_PA07
#define LED1_GPIO AVR32_PIN_PA08
#define LED2_GPIO AVR32_PIN_PA21
#define LED3_GPIO AVR32_PIN_PA22
//! @}
/*! \name PWM Channels of LEDs
*/
//! @{
#define LED0_PWM 0
#define LED1_PWM 1
#define LED2_PWM 2
#define LED3_PWM 6
//! @}
/*! \name PWM Functions of LEDs
*/
//! @{
#define LED0_PWM_FUNCTION AVR32_PWM_PWM_0_0_FUNCTION
#define LED1_PWM_FUNCTION AVR32_PWM_PWM_1_0_FUNCTION
#define LED2_PWM_FUNCTION AVR32_PWM_PWM_2_0_FUNCTION
#define LED3_PWM_FUNCTION AVR32_PWM_PWM_6_0_FUNCTION
//! @}
/*! \name Color Identifiers of LEDs to Use with LED Functions
*/
//! @{
#define LED_MONO0_GREEN LED0
#define LED_MONO1_GREEN LED1
#define LED_MONO2_GREEN LED2
#define LED_MONO3_GREEN LED3
//! @}
/*! \name GPIO Connections of Push Buttons
*/
//! @{
#define GPIO_PUSH_BUTTON_0 AVR32_PIN_PB02
#define GPIO_PUSH_BUTTON_1 AVR32_PIN_PB03
//! @}
/*! \name GPIO Connections of the Joystick
*/
//! @{
#define GPIO_JOYSTICK_PUSH AVR32_PIN_PA13
#define GPIO_JOYSTICK_LEFT AVR32_PIN_PB06
#define GPIO_JOYSTICK_RIGHT AVR32_PIN_PB09
#define GPIO_JOYSTICK_UP AVR32_PIN_PB07
#define GPIO_JOYSTICK_DOWN AVR32_PIN_PB08
//! @}
/*! \name ADC Connection of the Temperature Sensor
*/
//! @{
#define ADC_TEMPERATURE_CHANNEL 7
#define ADC_TEMPERATURE_PIN AVR32_ADC_AD_7_PIN
#define ADC_TEMPERATURE_FUNCTION AVR32_ADC_AD_7_FUNCTION
//! @}
/*! \name ADC Connection of the Light Sensor
*/
//! @{
#define ADC_LIGHT_CHANNEL 6
#define ADC_LIGHT_PIN AVR32_ADC_AD_6_PIN
#define ADC_LIGHT_FUNCTION AVR32_ADC_AD_6_FUNCTION
//! @}
/*! \name ADC Connections of the Accelerometer
*/
//! @{
#define ADC_ACC_X_CHANNEL 1
#define ADC_ACC_X_PIN AVR32_ADC_AD_1_PIN
#define ADC_ACC_X_FUNCTION AVR32_ADC_AD_1_FUNCTION
#define ADC_ACC_Y_CHANNEL 2
#define ADC_ACC_Y_PIN AVR32_ADC_AD_2_PIN
#define ADC_ACC_Y_FUNCTION AVR32_ADC_AD_2_FUNCTION
#define ADC_ACC_Z_CHANNEL 3
#define ADC_ACC_Z_PIN AVR32_ADC_AD_3_PIN
#define ADC_ACC_Z_FUNCTION AVR32_ADC_AD_3_FUNCTION
//! @}
/*! \name PWM Connections of Audio
*/
//! @{
#define AUDIO_LOW_PWM_CHANNEL 5
#define AUDIO_LOW_PWM_PIN AVR32_PWM_PWM_5_0_PIN
#define AUDIO_LOW_PWM_FUNCTION AVR32_PWM_PWM_5_0_FUNCTION
#define AUDIO_HIGH_PWM_CHANNEL 6
#define AUDIO_HIGH_PWM_PIN AVR32_PWM_PWM_6_1_PIN
#define AUDIO_HIGH_PWM_FUNCTION AVR32_PWM_PWM_6_1_FUNCTION
//! @}
/*! \name SPI Connections of the AT45DBX Data Flash Memory
*/
//! @{
#define AT45DBX_SPI (&AVR32_SPI)
#define AT45DBX_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN
#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION
#define AT45DBX_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN
#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION
#define AT45DBX_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN
#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION
#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI_NPCS_0_0_PIN
#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI_NPCS_0_0_FUNCTION
//! @}
/*! \name GPIO and SPI Connections of the SD/MMC Connector
*/
//! @{
#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PB00
#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PB01
#define SD_MMC_SPI (&AVR32_SPI)
#define SD_MMC_SPI_CS 1
#define SD_MMC_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN
#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION
#define SD_MMC_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN
#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION
#define SD_MMC_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN
#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION
#define SD_MMC_SPI_NPCS_PIN AVR32_SPI_NPCS_1_0_PIN
#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI_NPCS_1_0_FUNCTION
//! @}
#endif // _EVK1101_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3B EVK1101 board LEDs support package.
*
* This file contains definitions and services related to the LED features of
* the EVK1101 board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3B devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <avr32/io.h>
#include "preprocessor.h"
#include "compiler.h"
#include "evk1101.h"
#include "led.h"
//! Structure describing LED hardware connections.
typedef const struct
{
struct
{
U32 PORT; //!< LED GPIO port.
U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port.
} GPIO; //!< LED GPIO descriptor.
struct
{
S32 CHANNEL; //!< LED PWM channel (< 0 if N/A).
S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A).
} PWM; //!< LED PWM descriptor.
} tLED_DESCRIPTOR;
//! Hardware descriptors of all LEDs.
static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] =
{
#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \
{ \
{LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\
{LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \
},
MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~)
#undef INSERT_LED_DESCRIPTOR
};
//! Saved state of all LEDs.
static volatile U32 LED_State = (1 << LED_COUNT) - 1;
U32 LED_Read_Display(void)
{
return LED_State;
}
void LED_Display(U32 leds)
{
tLED_DESCRIPTOR *led_descriptor;
volatile avr32_gpio_port_t *led_gpio_port;
leds &= (1 << LED_COUNT) - 1;
LED_State = leds;
for (led_descriptor = &LED_DESCRIPTOR[0];
led_descriptor < LED_DESCRIPTOR + LED_COUNT;
led_descriptor++)
{
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
if (leds & 1)
{
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= 1;
}
}
U32 LED_Read_Display_Mask(U32 mask)
{
return Rd_bits(LED_State, mask);
}
void LED_Display_Mask(U32 mask, U32 leds)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
mask &= (1 << LED_COUNT) - 1;
Wr_bits(LED_State, mask, leds);
while (mask)
{
led_shift = 1 + ctz(mask);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
leds >>= led_shift - 1;
if (leds & 1)
{
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= 1;
mask >>= led_shift;
}
}
Bool LED_Test(U32 leds)
{
return Tst_bits(LED_State, leds);
}
void LED_Off(U32 leds)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
leds &= (1 << LED_COUNT) - 1;
Clr_bits(LED_State, leds);
while (leds)
{
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
void LED_On(U32 leds)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
leds &= (1 << LED_COUNT) - 1;
Set_bits(LED_State, leds);
while (leds)
{
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
void LED_Toggle(U32 leds)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
leds &= (1 << LED_COUNT) - 1;
Tgl_bits(LED_State, leds);
while (leds)
{
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
U32 LED_Read_Display_Field(U32 field)
{
return Rd_bitfield(LED_State, field);
}
void LED_Display_Field(U32 field, U32 leds)
{
LED_Display_Mask(field, leds << ctz(field));
}
U8 LED_Get_Intensity(U32 led)
{
tLED_DESCRIPTOR *led_descriptor;
// Check that the argument value is valid.
led = ctz(led);
led_descriptor = &LED_DESCRIPTOR[led];
if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0;
// Return the duty cycle value if the LED PWM channel is enabled, else 0.
return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ?
AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0;
}
void LED_Set_Intensity(U32 leds, U8 intensity)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_pwm_channel_t *led_pwm_channel;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// For each specified LED...
for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift)
{
// Select the next specified LED and check that it has a PWM channel.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
if (led_descriptor->PWM.CHANNEL < 0) continue;
// Initialize or update the LED PWM channel.
led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL];
if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)))
{
led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) &
~(AVR32_PWM_CALG_MASK |
AVR32_PWM_CPOL_MASK |
AVR32_PWM_CPD_MASK);
led_pwm_channel->cprd = 0x000000FF;
led_pwm_channel->cdty = intensity;
AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL;
}
else
{
AVR32_PWM.isr;
while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL)));
led_pwm_channel->cupd = intensity;
}
// Switch the LED pin to its PWM function.
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
if (led_descriptor->PWM.FUNCTION & 0x1)
{
led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK;
}
if (led_descriptor->PWM.FUNCTION & 0x2)
{
led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK;
}
}

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3B EVK1101 board LEDs support package.
*
* This file contains definitions and services related to the LED features of
* the EVK1101 board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3B devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LED_H_
#define _LED_H_
#include "compiler.h"
/*! \name Identifiers of LEDs to Use with LED Functions
*/
//! @{
#define LED0 0x01
#define LED1 0x02
#define LED2 0x04
#define LED3 0x08
//! @}
/*! \brief Gets the last state of all LEDs set through the LED API.
*
* \return State of all LEDs (1 bit per LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display(void);
/*! \brief Sets the state of all LEDs.
*
* \param leds New state of all LEDs (1 bit per LED).
*
* \note The pins of all LEDs are set to GPIO output mode.
*/
extern void LED_Display(U32 leds);
/*! \brief Gets the last state of the specified LEDs set through the LED API.
*
* \param mask LEDs of which to get the state (1 bit per LED).
*
* \return State of the specified LEDs (1 bit per LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display_Mask(U32 mask);
/*! \brief Sets the state of the specified LEDs.
*
* \param mask LEDs of which to set the state (1 bit per LED).
*
* \param leds New state of the specified LEDs (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Display_Mask(U32 mask, U32 leds);
/*! \brief Tests the last state of the specified LEDs set through the LED API.
*
* \param leds LEDs of which to test the state (1 bit per LED).
*
* \return \c TRUE if at least one of the specified LEDs has a state on, else
* \c FALSE.
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern Bool LED_Test(U32 leds);
/*! \brief Turns off the specified LEDs.
*
* \param leds LEDs to turn off (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Off(U32 leds);
/*! \brief Turns on the specified LEDs.
*
* \param leds LEDs to turn on (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_On(U32 leds);
/*! \brief Toggles the specified LEDs.
*
* \param leds LEDs to toggle (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Toggle(U32 leds);
/*! \brief Gets as a bit-field the last state of the specified LEDs set through
* the LED API.
*
* \param field LEDs of which to get the state (1 bit per LED).
*
* \return State of the specified LEDs (1 bit per LED, beginning with the first
* specified LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display_Field(U32 field);
/*! \brief Sets as a bit-field the state of the specified LEDs.
*
* \param field LEDs of which to set the state (1 bit per LED).
* \param leds New state of the specified LEDs (1 bit per LED, beginning with
* the first specified LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Display_Field(U32 field, U32 leds);
/*! \brief Gets the intensity of the specified LED.
*
* \param led LED of which to get the intensity (1 bit per LED; only the least
* significant set bit is used).
*
* \return Intensity of the specified LED (0x00 to 0xFF).
*
* \warning The PWM channel of the specified LED is supposed to be used only by
* this module.
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U8 LED_Get_Intensity(U32 led);
/*! \brief Sets the intensity of the specified LEDs.
*
* \param leds LEDs of which to set the intensity (1 bit per LED).
* \param intensity New intensity of the specified LEDs (0x00 to 0xFF).
*
* \warning The PWM channels of the specified LEDs are supposed to be used only
* by this module.
*
* \note The pins of the specified LEDs are set to PWM output mode.
*/
extern void LED_Set_Intensity(U32 leds, U8 intensity);
#endif // _LED_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Standard board header file.
*
* This file includes the appropriate board header file according to the
* defined board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
#include <avr32/io.h>
/*! \name Base Boards
*/
//! @{
#define EVK1100 1 //!< AT32UC3A EVK1100 board.
#define EVK1101 2 //!< AT32UC3B EVK1101 board.
//! @}
/*! \name Extension Boards
*/
//! @{
#define EXT1102 1 //!< AT32UC3B EXT1102 board.
//! @}
#if BOARD == EVK1100
# include "EVK1100/evk1100.h"
#elif BOARD == EVK1101
# include "EVK1101/evk1101.h"
#else
# error No known AVR32 board defined
#endif
#if EXT_BOARD == EXT1102
# include "EXT1102/ext1102.h"
#endif
#ifndef FRCOSC
# define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency.
#endif
#endif // _BOARD_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief FLASHC driver for AVR32 UC3.
*
* AVR32 Flash Controller driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a FLASHC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _FLASHC_H_
#define _FLASHC_H_
#include <avr32/io.h>
#include <stddef.h>
#include "compiler.h"
//! Number of flash regions defined by the FLASHC.
#define AVR32_FLASHC_REGIONS (AVR32_FLASHC_FLASH_SIZE /\
(AVR32_FLASHC_PAGES_PR_REGION * AVR32_FLASHC_PAGE_SIZE))
/*! \name Flash Properties
*/
//! @{
/*! \brief Gets the size of the whole flash array.
*
* \return The size of the whole flash array in bytes.
*/
extern unsigned int flashc_get_flash_size(void);
/*! \brief Gets the total number of pages in the flash array.
*
* \return The total number of pages in the flash array.
*/
extern unsigned int flashc_get_page_count(void);
/*! \brief Gets the number of pages in each flash region.
*
* \return The number of pages in each flash region.
*/
extern unsigned int flashc_get_page_count_per_region(void);
/*! \brief Gets the region number of a page.
*
* \param page_number The page number:
* \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
* the flash array;
* \arg <tt>< 0</tt>: the current page number.
*
* \return The region number of the specified page.
*/
extern unsigned int flashc_get_page_region(int page_number);
/*! \brief Gets the number of the first page of a region.
*
* \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
*
* \return The number of the first page of the specified region.
*/
extern unsigned int flashc_get_region_first_page_number(unsigned int region);
//! @}
/*! \name FLASHC Control
*/
//! @{
/*! \brief Gets the number of wait states of flash read accesses.
*
* \return The number of wait states of flash read accesses.
*/
extern unsigned int flashc_get_wait_state(void);
/*! \brief Sets the number of wait states of flash read accesses.
*
* \param wait_state The number of wait states of flash read accesses: \c 0 to
* \c 1.
*/
extern void flashc_set_wait_state(unsigned int wait_state);
/*! \brief Tells whether the Flash Ready interrupt is enabled.
*
* \return Whether the Flash Ready interrupt is enabled.
*/
extern Bool flashc_is_ready_int_enabled(void);
/*! \brief Enables or disables the Flash Ready interrupt.
*
* \param enable Whether to enable the Flash Ready interrupt: \c TRUE or
* \c FALSE.
*/
extern void flashc_enable_ready_int(Bool enable);
/*! \brief Tells whether the Lock Error interrupt is enabled.
*
* \return Whether the Lock Error interrupt is enabled.
*/
extern Bool flashc_is_lock_error_int_enabled(void);
/*! \brief Enables or disables the Lock Error interrupt.
*
* \param enable Whether to enable the Lock Error interrupt: \c TRUE or
* \c FALSE.
*/
extern void flashc_enable_lock_error_int(Bool enable);
/*! \brief Tells whether the Programming Error interrupt is enabled.
*
* \return Whether the Programming Error interrupt is enabled.
*/
extern Bool flashc_is_prog_error_int_enabled(void);
/*! \brief Enables or disables the Programming Error interrupt.
*
* \param enable Whether to enable the Programming Error interrupt: \c TRUE or
* \c FALSE.
*/
extern void flashc_enable_prog_error_int(Bool enable);
//! @}
/*! \name FLASHC Status
*/
//! @{
/*! \brief Tells whether the FLASHC is ready to run a new command.
*
* \return Whether the FLASHC is ready to run a new command.
*/
extern Bool flashc_is_ready(void);
/*! \brief Waits actively until the FLASHC is ready to run a new command.
*
* This is the default function assigned to \ref flashc_wait_until_ready.
*/
extern void flashc_default_wait_until_ready(void);
//! Pointer to the function used by the driver when it needs to wait until the
//! FLASHC is ready to run a new command.
//! The default function is \ref flashc_default_wait_until_ready.
//! The user may change this pointer to use another implementation.
extern void (*volatile flashc_wait_until_ready)(void);
/*! \brief Tells whether a Lock Error has occurred during the last function
* called that issued one or more FLASHC commands.
*
* \return Whether a Lock Error has occurred during the last function called
* that issued one or more FLASHC commands.
*/
extern Bool flashc_is_lock_error(void);
/*! \brief Tells whether a Programming Error has occurred during the last
* function called that issued one or more FLASHC commands.
*
* \return Whether a Programming Error has occurred during the last function
* called that issued one or more FLASHC commands.
*/
extern Bool flashc_is_programming_error(void);
//! @}
/*! \name FLASHC Command Control
*/
//! @{
/*! \brief Gets the last issued FLASHC command.
*
* \return The last issued FLASHC command.
*/
extern unsigned int flashc_get_command(void);
/*! \brief Gets the current FLASHC page number.
*
* \return The current FLASHC page number.
*/
extern unsigned int flashc_get_page_number(void);
/*! \brief Issues a FLASHC command.
*
* \param command The command: \c AVR32_FLASHC_FCMD_CMD_x.
* \param page_number The page number to apply the command to:
* \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
* the flash array;
* \arg <tt>< 0</tt>: use this to apply the command to the current page number
* or if the command does not apply to any page number;
* \arg this argument may have other meanings according to the command. See
* the FLASHC chapter of the MCU datasheet.
*
* \warning A Lock Error is issued if the command violates the protection
* mechanism.
*
* \warning A Programming Error is issued if the command is invalid.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_issue_command(unsigned int command, int page_number);
//! @}
/*! \name FLASHC Global Commands
*/
//! @{
/*! \brief Issues a No Operation command to the FLASHC.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_no_operation(void);
/*! \brief Issues an Erase All command to the FLASHC.
*
* This command erases all bits in the flash array, the general-purpose fuse
* bits and the Security bit. The User page is not erased.
*
* This command also ensures that all volatile memories, such as register file
* and RAMs, are erased before the Security bit is erased, i.e. deactivated.
*
* \warning A Lock Error is issued if at least one region is locked or the
* bootloader protection is active.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note An erase operation can only set bits.
*/
extern void flashc_erase_all(void);
//! @}
/*! \name FLASHC Protection Mechanisms
*/
//! @{
/*! \brief Tells whether the Security bit is active.
*
* \return Whether the Security bit is active.
*/
extern Bool flashc_is_security_bit_active(void);
/*! \brief Activates the Security bit.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_activate_security_bit(void);
/*! \brief Gets the bootloader protected size.
*
* \return The bootloader protected size in bytes.
*/
extern unsigned int flashc_get_bootloader_protected_size(void);
/*! \brief Sets the bootloader protected size.
*
* \param bootprot_size The wanted bootloader protected size in bytes. If this
* size is not supported, the actual size will be the
* nearest greater available size or the maximal possible
* size if the requested size is too large.
*
* \return The actual bootloader protected size in bytes.
*
* \warning A Lock Error is issued if the Security bit is active.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size);
/*! \brief Tells whether external privileged fetch is locked.
*
* \return Whether external privileged fetch is locked.
*/
extern Bool flashc_is_external_privileged_fetch_locked(void);
/*! \brief Locks or unlocks external privileged fetch.
*
* \param lock Whether to lock external privileged fetch: \c TRUE or \c FALSE.
*
* \warning A Lock Error is issued if the Security bit is active.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_lock_external_privileged_fetch(Bool lock);
/*! \brief Tells whether the region of a page is locked.
*
* \param page_number The page number:
* \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
* the flash array;
* \arg <tt>< 0</tt>: the current page number.
*
* \return Whether the region of the specified page is locked.
*/
extern Bool flashc_is_page_region_locked(int page_number);
/*! \brief Tells whether a region is locked.
*
* \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
*
* \return Whether the specified region is locked.
*/
extern Bool flashc_is_region_locked(unsigned int region);
/*! \brief Locks or unlocks the region of a page.
*
* \param page_number The page number:
* \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
* the flash array;
* \arg <tt>< 0</tt>: the current page number.
* \param lock Whether to lock the region of the specified page: \c TRUE or
* \c FALSE.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_lock_page_region(int page_number, Bool lock);
/*! \brief Locks or unlocks a region.
*
* \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
* \param lock Whether to lock the specified region: \c TRUE or \c FALSE.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_lock_region(unsigned int region, Bool lock);
/*! \brief Locks or unlocks all regions.
*
* \param lock Whether to lock the regions: \c TRUE or \c FALSE.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_lock_all_regions(Bool lock);
//! @}
/*! \name Access to General-Purpose Fuses
*/
//! @{
/*! \brief Reads a general-purpose fuse bit.
*
* \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 31.
*
* \return The value of the specified general-purpose fuse bit.
*/
extern Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit);
/*! \brief Reads a general-purpose fuse bit-field.
*
* \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
* \c 31.
* \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
* \c 32.
*
* \return The value of the specified general-purpose fuse bit-field.
*/
extern U32 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width);
/*! \brief Reads a general-purpose fuse byte.
*
* \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 3.
*
* \return The value of the specified general-purpose fuse byte.
*/
extern U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte);
/*! \brief Reads all general-purpose fuses.
*
* \return The value of all general-purpose fuses as a word.
*/
extern U32 flashc_read_all_gp_fuses(void);
/*! \brief Erases a general-purpose fuse bit.
*
* \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 31.
* \param check Whether to check erase: \c TRUE or \c FALSE.
*
* \return Whether the erase succeeded or always \c TRUE if erase check was not
* requested.
*
* \warning A Lock Error is issued if the Security bit is active and the command
* is applied to BOOTPROT or EPFL fuses.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note An erase operation can only set bits.
*/
extern Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check);
/*! \brief Erases a general-purpose fuse bit-field.
*
* \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
* \c 31.
* \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
* \c 32.
* \param check Whether to check erase: \c TRUE or \c FALSE.
*
* \return Whether the erase succeeded or always \c TRUE if erase check was not
* requested.
*
* \warning A Lock Error is issued if the Security bit is active and the command
* is applied to BOOTPROT or EPFL fuses.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note An erase operation can only set bits.
*/
extern Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check);
/*! \brief Erases a general-purpose fuse byte.
*
* \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 3.
* \param check Whether to check erase: \c TRUE or \c FALSE.
*
* \return Whether the erase succeeded or always \c TRUE if erase check was not
* requested.
*
* \warning A Lock Error is issued if the Security bit is active.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note An erase operation can only set bits.
*/
extern Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check);
/*! \brief Erases all general-purpose fuses.
*
* \param check Whether to check erase: \c TRUE or \c FALSE.
*
* \return Whether the erase succeeded or always \c TRUE if erase check was not
* requested.
*
* \warning A Lock Error is issued if the Security bit is active.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note An erase operation can only set bits.
*/
extern Bool flashc_erase_all_gp_fuses(Bool check);
/*! \brief Writes a general-purpose fuse bit.
*
* \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 31.
* \param value The value of the specified general-purpose fuse bit.
*
* \warning A Lock Error is issued if the Security bit is active and the command
* is applied to BOOTPROT or EPFL fuses.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note A write operation can only clear bits.
*/
extern void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value);
/*! \brief Writes a general-purpose fuse bit-field.
*
* \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
* \c 31.
* \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
* \c 32.
* \param value The value of the specified general-purpose fuse bit-field.
*
* \warning A Lock Error is issued if the Security bit is active and the command
* is applied to BOOTPROT or EPFL fuses.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note A write operation can only clear bits.
*/
extern void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U32 value);
/*! \brief Writes a general-purpose fuse byte.
*
* \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 3.
* \param value The value of the specified general-purpose fuse byte.
*
* \warning A Lock Error is issued if the Security bit is active.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note A write operation can only clear bits.
*/
extern void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value);
/*! \brief Writes all general-purpose fuses.
*
* \param value The value of all general-purpose fuses as a word.
*
* \warning A Lock Error is issued if the Security bit is active.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note A write operation can only clear bits.
*/
extern void flashc_write_all_gp_fuses(U32 value);
/*! \brief Sets a general-purpose fuse bit with the appropriate erase and write
* operations.
*
* \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 31.
* \param value The value of the specified general-purpose fuse bit.
*
* \warning A Lock Error is issued if the Security bit is active and the command
* is applied to BOOTPROT or EPFL fuses.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value);
/*! \brief Sets a general-purpose fuse bit-field with the appropriate erase and
* write operations.
*
* \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
* \c 31.
* \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
* \c 32.
* \param value The value of the specified general-purpose fuse bit-field.
*
* \warning A Lock Error is issued if the Security bit is active and the command
* is applied to BOOTPROT or EPFL fuses.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U32 value);
/*! \brief Sets a general-purpose fuse byte with the appropriate erase and write
* operations.
*
* \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 3.
* \param value The value of the specified general-purpose fuse byte.
*
* \warning A Lock Error is issued if the Security bit is active.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value);
/*! \brief Sets all general-purpose fuses with the appropriate erase and write
* operations.
*
* \param value The value of all general-purpose fuses as a word.
*
* \warning A Lock Error is issued if the Security bit is active.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_set_all_gp_fuses(U32 value);
//! @}
/*! \name Access to Flash Pages
*/
//! @{
/*! \brief Clears the page buffer.
*
* This command resets all bits in the page buffer to one. Write accesses to the
* page buffer can only change page buffer bits from one to zero.
*
* \warning The page buffer is not automatically reset after a page write.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern void flashc_clear_page_buffer(void);
/*! \brief Tells whether the page to which the last Quick Page Read command was
* applied was erased.
*
* \return Whether the page to which the last Quick Page Read command was
* applied was erased.
*/
extern Bool flashc_is_page_erased(void);
/*! \brief Applies the Quick Page Read command to a page.
*
* \param page_number The page number:
* \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
* the flash array;
* \arg <tt>< 0</tt>: the current page number.
*
* \return Whether the specified page is erased.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern Bool flashc_quick_page_read(int page_number);
/*! \brief Erases a page.
*
* \param page_number The page number:
* \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
* the flash array;
* \arg <tt>< 0</tt>: the current page number.
* \param check Whether to check erase: \c TRUE or \c FALSE.
*
* \return Whether the erase succeeded or always \c TRUE if erase check was not
* requested.
*
* \warning A Lock Error is issued if the command is applied to a page belonging
* to a locked region or to the bootloader protected area.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note An erase operation can only set bits.
*/
extern Bool flashc_erase_page(int page_number, Bool check);
/*! \brief Erases all pages within the flash array.
*
* \param check Whether to check erase: \c TRUE or \c FALSE.
*
* \return Whether the erase succeeded or always \c TRUE if erase check was not
* requested.
*
* \warning A Lock Error is issued if at least one region is locked or the
* bootloader protection is active.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note An erase operation can only set bits.
*/
extern Bool flashc_erase_all_pages(Bool check);
/*! \brief Writes a page from the page buffer.
*
* \param page_number The page number:
* \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
* the flash array;
* \arg <tt>< 0</tt>: the current page number.
*
* \warning A Lock Error is issued if the command is applied to a page belonging
* to a locked region or to the bootloader protected area.
*
* \warning The page buffer is not automatically reset after a page write.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note A write operation can only clear bits.
*/
extern void flashc_write_page(int page_number);
/*! \brief Checks whether the User page is erased.
*
* \return Whether the User page is erased.
*/
extern Bool flashc_check_user_page_erase(void);
/*! \brief Erases the User page.
*
* \param check Whether to check erase: \c TRUE or \c FALSE.
*
* \return Whether the erase succeeded or always \c TRUE if erase check was not
* requested.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note An erase operation can only set bits.
*/
extern Bool flashc_erase_user_page(Bool check);
/*! \brief Writes the User page from the page buffer.
*
* \warning The page buffer is not automatically reset after a page write.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*
* \note A write operation can only clear bits.
*/
extern void flashc_write_user_page(void);
/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
* from the repeated \a src source byte.
*
* The destination areas that are not within the flash array or the User page
* are ignored.
*
* All pointer and size alignments are supported.
*
* \param dst Pointer to flash destination.
* \param src Source byte.
* \param nbytes Number of bytes to set.
* \param erase Whether to erase before writing: \c TRUE or \c FALSE.
*
* \return The value of \a dst.
*
* \warning A Lock Error is issued if the command is applied to pages belonging
* to a locked region or to the bootloader protected area.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase);
/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
* from the repeated \a src big-endian source half-word.
*
* The destination areas that are not within the flash array or the User page
* are ignored.
*
* All pointer and size alignments are supported.
*
* \param dst Pointer to flash destination.
* \param src Source half-word.
* \param nbytes Number of bytes to set.
* \param erase Whether to erase before writing: \c TRUE or \c FALSE.
*
* \return The value of \a dst.
*
* \warning A Lock Error is issued if the command is applied to pages belonging
* to a locked region or to the bootloader protected area.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase);
/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
* from the repeated \a src big-endian source word.
*
* The destination areas that are not within the flash array or the User page
* are ignored.
*
* All pointer and size alignments are supported.
*
* \param dst Pointer to flash destination.
* \param src Source word.
* \param nbytes Number of bytes to set.
* \param erase Whether to erase before writing: \c TRUE or \c FALSE.
*
* \return The value of \a dst.
*
* \warning A Lock Error is issued if the command is applied to pages belonging
* to a locked region or to the bootloader protected area.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase);
/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
* from the repeated \a src big-endian source double-word.
*
* The destination areas that are not within the flash array or the User page
* are ignored.
*
* All pointer and size alignments are supported.
*
* \param dst Pointer to flash destination.
* \param src Source double-word.
* \param nbytes Number of bytes to set.
* \param erase Whether to erase before writing: \c TRUE or \c FALSE.
*
* \return The value of \a dst.
*
* \warning A Lock Error is issued if the command is applied to pages belonging
* to a locked region or to the bootloader protected area.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase);
/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
* from the repeated \a src big-endian source pattern.
*
* The destination areas that are not within the flash array or the User page
* are ignored.
*
* All pointer and size alignments are supported.
*
* \param dst Pointer to flash destination.
* \param src Source double-word.
* \param src_width \a src width in bits: 8, 16, 32 or 64.
* \param nbytes Number of bytes to set.
* \param erase Whether to erase before writing: \c TRUE or \c FALSE.
*
* \return The value of \a dst.
*
* \warning A Lock Error is issued if the command is applied to pages belonging
* to a locked region or to the bootloader protected area.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
#define flashc_memset(dst, src, src_width, nbytes, erase) \
TPASTE2(flashc_memset, src_width)((dst), (src), (nbytes), (erase))
/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
* from the source pointed to by \a src.
*
* The destination areas that are not within the flash array or the User page
* are ignored.
*
* All pointer and size alignments are supported.
*
* \param dst Pointer to flash destination.
* \param src Pointer to source data.
* \param nbytes Number of bytes to copy.
* \param erase Whether to erase before writing: \c TRUE or \c FALSE.
*
* \return The value of \a dst.
*
* \warning If copying takes place between areas that overlap, the behavior is
* undefined.
*
* \warning A Lock Error is issued if the command is applied to pages belonging
* to a locked region or to the bootloader protected area.
*
* \note The FLASHC error status returned by \ref flashc_is_lock_error and
* \ref flashc_is_programming_error is updated.
*/
extern volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase);
//! @}
#endif // _FLASHC_H_

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief GPIO driver for AVR32 UC3.
*
* This file defines a useful set of functions for the GPIO.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a GPIO module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "gpio.h"
//! GPIO module instance.
#define GPIO AVR32_GPIO
int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size)
{
int status = GPIO_SUCCESS;
unsigned int i;
for (i = 0; i < size; i++)
{
status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function);
gpiomap++;
}
return status;
}
int gpio_enable_module_pin(unsigned int pin, unsigned int function)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
// Enable the correct function.
switch (function)
{
case 0: // A function.
gpio_port->pmr0c = 1 << (pin & 0x1F);
gpio_port->pmr1c = 1 << (pin & 0x1F);
break;
case 1: // B function.
gpio_port->pmr0s = 1 << (pin & 0x1F);
gpio_port->pmr1c = 1 << (pin & 0x1F);
break;
case 2: // C function.
gpio_port->pmr0c = 1 << (pin & 0x1F);
gpio_port->pmr1s = 1 << (pin & 0x1F);
break;
default:
return GPIO_INVALID_ARGUMENT;
}
// Disable GPIO control.
gpio_port->gperc = 1 << (pin & 0x1F);
return GPIO_SUCCESS;
}
void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size)
{
unsigned int i;
for (i = 0; i < size; i++)
{
gpio_enable_gpio_pin(gpiomap->pin);
gpiomap++;
}
}
void gpio_enable_gpio_pin(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->oderc = 1 << (pin & 0x1F);
gpio_port->gpers = 1 << (pin & 0x1F);
}
void gpio_enable_pin_open_drain(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->odmers = 1 << (pin & 0x1F);
}
void gpio_disable_pin_open_drain(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->odmerc = 1 << (pin & 0x1F);
}
void gpio_enable_pin_pull_up(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->puers = 1 << (pin & 0x1F);
}
void gpio_disable_pin_pull_up(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->puerc = 1 << (pin & 0x1F);
}
int gpio_get_pin_value(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
return (gpio_port->pvr >> (pin & 0x1F)) & 1;
}
int gpio_get_gpio_pin_output_value(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
return (gpio_port->ovr >> (pin & 0x1F)) & 1;
}
void gpio_set_gpio_pin(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1.
gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
}
void gpio_clr_gpio_pin(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
}
void gpio_tgl_gpio_pin(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line.
gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
}
void gpio_enable_pin_glitch_filter(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->gfers = 1 << (pin & 0x1F);
}
void gpio_disable_pin_glitch_filter(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->gferc = 1 << (pin & 0x1F);
}
int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
// Enable the glitch filter.
gpio_port->gfers = 1 << (pin & 0x1F);
// Configure the edge detector.
switch (mode)
{
case GPIO_PIN_CHANGE:
gpio_port->imr0c = 1 << (pin & 0x1F);
gpio_port->imr1c = 1 << (pin & 0x1F);
break;
case GPIO_RISING_EDGE:
gpio_port->imr0s = 1 << (pin & 0x1F);
gpio_port->imr1c = 1 << (pin & 0x1F);
break;
case GPIO_FALLING_EDGE:
gpio_port->imr0c = 1 << (pin & 0x1F);
gpio_port->imr1s = 1 << (pin & 0x1F);
break;
default:
return GPIO_INVALID_ARGUMENT;
}
// Enable interrupt.
gpio_port->iers = 1 << (pin & 0x1F);
return GPIO_SUCCESS;
}
void gpio_disable_pin_interrupt(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ierc = 1 << (pin & 0x1F);
}
int gpio_get_pin_interrupt_flag(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
return (gpio_port->ifr >> (pin & 0x1F)) & 1;
}
void gpio_clear_pin_interrupt_flag(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ifrc = 1 << (pin & 0x1F);
}

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief GPIO header for AVR32 UC3.
*
* This file contains basic GPIO driver functions.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a GPIO module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _GPIO_H_
#define _GPIO_H_
#include <avr32/io.h>
/*! \name Return Values of the GPIO API
*/
//! @{
#define GPIO_SUCCESS 0 //!< Function successfully completed.
#define GPIO_INVALID_ARGUMENT 1 //!< Input parameters are out of range.
//! @}
/*! \name Interrupt Trigger Modes
*/
//! @{
#define GPIO_PIN_CHANGE 0 //!< Interrupt triggered upon pin change.
#define GPIO_RISING_EDGE 1 //!< Interrupt triggered upon rising edge.
#define GPIO_FALLING_EDGE 2 //!< Interrupt triggered upon falling edge.
//! @}
//! A type definition of pins and modules connectivity.
typedef struct
{
unsigned char pin; //!< Module pin.
unsigned char function; //!< Module function.
} gpio_map_t[];
/*! \brief Enables specific module modes for a set of pins.
*
* \param gpiomap The pin map.
* \param size The number of pins in \a gpiomap.
*
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
*/
extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size);
/*! \brief Enables a specific module mode for a pin.
*
* \param pin The pin number.\n
* Refer to the product header file `uc3x.h' (where x is the part
* number; e.g. x = a0512) for module pins. E.g., to enable a PWM
* channel output, the pin number can be AVR32_PWM_PWM_3_PIN for PWM
* channel 3.
* \param function The pin function.\n
* Refer to the product header file `uc3x.h' (where x is the
* part number; e.g. x = a0512) for module pin functions. E.g.,
* to enable a PWM channel output, the pin function can be
* AVR32_PWM_PWM_3_FUNCTION for PWM channel 3.
*
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
*/
extern int gpio_enable_module_pin(unsigned int pin, unsigned int function);
/*! \brief Enables the GPIO mode of a set of pins.
*
* \param gpiomap The pin map.
* \param size The number of pins in \a gpiomap.
*/
extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size);
/*! \brief Enables the GPIO mode of a pin.
*
* \param pin The pin number.\n
* Refer to the product header file `uc3x.h' (where x is the part
* number; e.g. x = a0512) for pin definitions. E.g., to enable the
* GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as
* AVR32_PWM_PWM_3_PIN for PWM channel 3 can also be used to release
* module pins for GPIO.
*/
extern void gpio_enable_gpio_pin(unsigned int pin);
/*! \brief Enables the open-drain mode of a pin.
*
* \param pin The pin number.
*/
extern void gpio_enable_pin_open_drain(unsigned int pin);
/*! \brief Disables the open-drain mode of a pin.
*
* \param pin The pin number.
*/
extern void gpio_disable_pin_open_drain(unsigned int pin);
/*! \brief Enables the pull-up resistor of a pin.
*
* \param pin The pin number.
*/
extern void gpio_enable_pin_pull_up(unsigned int pin);
/*! \brief Disables the pull-up resistor of a pin.
*
* \param pin The pin number.
*/
extern void gpio_disable_pin_pull_up(unsigned int pin);
/*! \brief Returns the value of a pin.
*
* \param pin The pin number.
*
* \return The pin value.
*/
extern int gpio_get_pin_value(unsigned int pin);
/*! \brief Returns the output value set for a GPIO pin.
*
* \param pin The pin number.
*
* \return The pin output value.
*/
extern int gpio_get_gpio_pin_output_value(unsigned int pin);
/*! \brief Drives a GPIO pin to 1.
*
* \param pin The pin number.
*/
extern void gpio_set_gpio_pin(unsigned int pin);
/*! \brief Drives a GPIO pin to 0.
*
* \param pin The pin number.
*/
extern void gpio_clr_gpio_pin(unsigned int pin);
/*! \brief Toggles a GPIO pin.
*
* \param pin The pin number.
*/
extern void gpio_tgl_gpio_pin(unsigned int pin);
/*! \brief Enables the glitch filter of a pin.
*
* When the glitch filter is enabled, a glitch with duration of less than 1
* clock cycle is automatically rejected, while a pulse with duration of 2 clock
* cycles or more is accepted. For pulse durations between 1 clock cycle and 2
* clock cycles, the pulse may or may not be taken into account, depending on
* the precise timing of its occurrence. Thus for a pulse to be guaranteed
* visible it must exceed 2 clock cycles, whereas for a glitch to be reliably
* filtered out, its duration must not exceed 1 clock cycle. The filter
* introduces 2 clock cycles latency.
*
* \param pin The pin number.
*/
extern void gpio_enable_pin_glitch_filter(unsigned int pin);
/*! \brief Disables the glitch filter of a pin.
*
* \param pin The pin number.
*/
extern void gpio_disable_pin_glitch_filter(unsigned int pin);
/*! \brief Enables the interrupt of a pin with the specified settings.
*
* \param pin The pin number.
* \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
* \ref GPIO_FALLING_EDGE).
*
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
*/
extern int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode);
/*! \brief Disables the interrupt of a pin.
*
* \param pin The pin number.
*/
extern void gpio_disable_pin_interrupt(unsigned int pin);
/*! \brief Gets the interrupt flag of a pin.
*
* \param pin The pin number.
*
* \return The pin interrupt flag.
*/
extern int gpio_get_pin_interrupt_flag(unsigned int pin);
/*! \brief Clears the interrupt flag of a pin.
*
* \param pin The pin number.
*/
extern void gpio_clear_pin_interrupt_flag(unsigned int pin);
#endif // _GPIO_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief INTC driver for AVR32 UC3.
*
* AVR32 Interrupt Controller driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an INTC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <avr32/io.h>
#include "compiler.h"
#include "preprocessor.h"
#include "intc.h"
//! Values to store in the interrupt priority registers for the various interrupt priority levels.
extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS];
//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.
//! Each line handler table contains a set of pointers to interrupt handlers.
#if __GNUC__
#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
#elif __ICCAVR32__
#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
#endif
MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~);
#undef DECL_INT_LINE_HANDLER_TABLE
//! Table containing for each interrupt group the number of interrupt request
//! lines and a pointer to the table of interrupt line handlers.
static const struct
{
unsigned int num_irqs;
volatile __int_handler *_int_line_handler_table;
} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] =
{
#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \
{AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP},
MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~)
#undef INSERT_INT_LINE_HANDLER_TABLE
};
/*! \brief Default interrupt handler.
*
* \note Taken and adapted from Newlib.
*/
#if __GNUC__
__attribute__((__interrupt__))
#elif __ICCAVR32__
__interrupt
#endif
static void _unhandled_interrupt(void)
{
// Catch unregistered interrupts.
while (TRUE);
}
/*! \brief Gets the interrupt handler of the current event at the \a int_lev
* interrupt priority level (called from exception.S).
*
* \param int_lev Interrupt priority level to handle.
*
* \return Interrupt handler to execute.
*
* \note Taken and adapted from Newlib.
*/
__int_handler _get_interrupt_handler(unsigned int int_lev)
{
// ICR3 is mapped first, ICR0 last.
// Code in exception.S puts int_lev in R12 which is used by AVR32-GCC to pass
// a single argument to a function.
unsigned int int_grp = (&AVR32_INTC.icr3)[INT3 - int_lev];
unsigned int int_req = AVR32_INTC.irr[int_grp];
// As an interrupt may disappear while it is being fetched by the CPU
// (spurious interrupt caused by a delayed response from an MCU peripheral to
// an interrupt flag clear or interrupt disable instruction), check if there
// are remaining interrupt lines to process.
// If a spurious interrupt occurs, the status register (SR) contains an
// execution mode and interrupt level masks corresponding to a level 0
// interrupt, whatever the interrupt priority level causing the spurious
// event. This behavior has been chosen because a spurious interrupt has not
// to be a priority one and because it may not cause any trouble to other
// interrupts.
// However, these spurious interrupts place the hardware in an unstable state
// and could give problems in other/future versions of the CPU, so the
// software has to be written so that they never occur. The only safe way of
// achieving this is to always clear or disable peripheral interrupts with the
// following sequence:
// 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR.
// 2: Perform the bus access to the peripheral register that clears or
// disables the interrupt.
// 3: Wait until the interrupt has actually been cleared or disabled by the
// peripheral. This is usually performed by reading from a register in the
// same peripheral (it DOES NOT have to be the same register that was
// accessed in step 2, but it MUST be in the same peripheral), what takes
// bus system latencies into account, but peripheral internal latencies
// (generally 0 cycle) also have to be considered.
// 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR.
// Note that steps 1 and 4 are useless inside interrupt handlers as the
// corresponding interrupt level is automatically masked by IxM (unless IxM is
// explicitly cleared by the software).
//
// Get the right IRQ handler.
//
// If several interrupt lines are active in the group, the interrupt line with
// the highest number is selected. This is to be coherent with the
// prioritization of interrupt groups performed by the hardware interrupt
// controller.
//
// If no handler has been registered for the pending interrupt,
// _unhandled_interrupt will be selected thanks to the initialization of
// _int_line_handler_table_x by INTC_init_interrupts.
//
// exception.S will provide the interrupt handler with a clean interrupt stack
// frame, with nothing more pushed onto the stack. The interrupt handler must
// manage the `rete' instruction, what can be done thanks to pure assembly,
// inline assembly or the `__attribute__((__interrupt__))' C function
// attribute.
return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL;
}
void INTC_init_interrupts(void)
{
unsigned int int_grp, int_req;
// For all interrupt groups,
for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++)
{
// For all interrupt request lines of each group,
for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++)
{
// Assign _unhandled_interrupt as default interrupt handler.
_int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt;
}
// Set the interrupt group priority register to its default value.
// By default, all interrupt groups are linked to the interrupt priority
// level 0 and to the interrupt vector _int0.
AVR32_INTC.ipr[int_grp] = ipr_val[INT0];
}
}
void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_lev)
{
// Determine the group of the IRQ.
unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP;
// Store in _int_line_handler_table_x the pointer to the interrupt handler, so
// that _get_interrupt_handler can retrieve it when the interrupt is vectored.
_int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler;
// Program the corresponding IPRX register to set the interrupt priority level
// and the interrupt vector offset that will be fetched by the core interrupt
// system.
// NOTE: The _intx functions are intermediate assembly functions between the
// core interrupt system and the user interrupt handler.
AVR32_INTC.ipr[int_grp] = ipr_val[int_lev & (AVR32_INTC_IPR0_INTLEV_MASK >> AVR32_INTC_IPR0_INTLEV_OFFSET)];
}

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief INTC driver for AVR32 UC3.
*
* AVR32 Interrupt Controller driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an INTC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _INTC_H_
#define _INTC_H_
#include "compiler.h"
//! Maximal number of interrupt request lines per group.
#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP 32
//! Number of interrupt priority levels.
#define AVR32_INTC_NUM_INT_LEVELS (1 << AVR32_INTC_IPR0_INTLEV_SIZE)
/*! \name Interrupt Priority Levels
*/
//! @{
#define INT0 0 //!< Lowest interrupt priority level.
#define INT1 1
#define INT2 2
#define INT3 3 //!< Highest interrupt priority level.
//! @}
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
//! Pointer to interrupt handler.
#if __GNUC__
typedef void (*__int_handler)(void);
#elif __ICCAVR32__
typedef void (__interrupt *__int_handler)(void);
#endif
/*! \brief Initializes the hardware interrupt controller driver.
*
* \note Taken and adapted from Newlib.
*/
extern void INTC_init_interrupts(void);
/*! \brief Registers an interrupt handler.
*
* \param handler Interrupt handler to register.
* \param irq IRQ of the interrupt handler to register.
* \param int_lev Interrupt priority level to assign to the group of this IRQ.
*
* \warning The interrupt handler must manage the `rete' instruction, what can
* be done thanks to pure assembly, inline assembly or the
* `__attribute__((__interrupt__))' C function attribute.
*
* \warning If several interrupt handlers of a same group are registered with
* different priority levels, only the latest priority level set will
* be effective.
*
* \note Taken and adapted from Newlib.
*/
extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_lev);
#endif // __AVR32_ABI_COMPILER__
#endif // _INTC_H_

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief MACB driver for EVK1100 board.
*
* This file defines a useful set of functions for the MACB interface on
* AVR32 devices.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a MACB module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <string.h>
#include <avr32/io.h>
#ifdef FREERTOS_USED
#include "FreeRTOS.h"
#include "task.h"
#include "semphr.h"
#endif
#include "macb.h"
#include "gpio.h"
#include "conf_eth.h"
#include "intc.h"
/* Size of each receive buffer - DO NOT CHANGE. */
#define RX_BUFFER_SIZE 128
/* The buffer addresses written into the descriptors must be aligned so the
last few bits are zero. These bits have special meaning for the MACB
peripheral and cannot be used as part of the address. */
#define ADDRESS_MASK ( ( unsigned long ) 0xFFFFFFFC )
/* Bit used within the address stored in the descriptor to mark the last
descriptor in the array. */
#define RX_WRAP_BIT ( ( unsigned long ) 0x02 )
/* A short delay is used to wait for a buffer to become available, should
one not be immediately available when trying to transmit a frame. */
#define BUFFER_WAIT_DELAY ( 2 )
#ifndef FREERTOS_USED
#define portENTER_CRITICAL Disable_global_interrupt
#define portEXIT_CRITICAL Enable_global_interrupt
#define portENTER_SWITCHING_ISR()
#define portEXIT_SWITCHING_ISR()
#endif
/* Buffer written to by the MACB DMA. Must be aligned as described by the
comment above the ADDRESS_MASK definition. */
#if __GNUC__
static volatile char pcRxBuffer[ ETHERNET_CONF_NB_RX_BUFFERS * RX_BUFFER_SIZE ] __attribute__ ((aligned (8)));
#elif __ICCAVR32__
#pragma data_alignment=8
static volatile char pcRxBuffer[ ETHERNET_CONF_NB_RX_BUFFERS * RX_BUFFER_SIZE ];
#endif
/* Buffer read by the MACB DMA. Must be aligned as described by the comment
above the ADDRESS_MASK definition. */
#if __GNUC__
static volatile char pcTxBuffer[ ETHERNET_CONF_NB_TX_BUFFERS * ETHERNET_CONF_TX_BUFFER_SIZE ] __attribute__ ((aligned (8)));
#elif __ICCAVR32__
#pragma data_alignment=8
static volatile char pcTxBuffer[ ETHERNET_CONF_NB_TX_BUFFERS * ETHERNET_CONF_TX_BUFFER_SIZE ];
#endif
/* Descriptors used to communicate between the program and the MACB peripheral.
These descriptors hold the locations and state of the Rx and Tx buffers. */
static volatile AVR32_TxTdDescriptor xTxDescriptors[ ETHERNET_CONF_NB_TX_BUFFERS ];
static volatile AVR32_RxTdDescriptor xRxDescriptors[ ETHERNET_CONF_NB_RX_BUFFERS ];
/* The IP and Ethernet addresses are read from the header files. */
char cMACAddress[ 6 ] = { ETHERNET_CONF_ETHADDR0,ETHERNET_CONF_ETHADDR1,ETHERNET_CONF_ETHADDR2,ETHERNET_CONF_ETHADDR3,ETHERNET_CONF_ETHADDR4,ETHERNET_CONF_ETHADDR5 };
/*-----------------------------------------------------------*/
/* See the header file for descriptions of public functions. */
/*
* Prototype for the MACB interrupt function - called by the asm wrapper.
*/
#ifdef FREERTOS_USED
#if __GNUC__
__attribute__((naked))
#elif __ICCAVR32__
#pragma shadow_registers = full // Naked.
#endif
#else
#if __GNUC__
__attribute__((__interrupt__))
#elif __ICCAVR32__
__interrupt
#endif
#endif
void vMACB_ISR( void );
static long prvMACB_ISR_NonNakedBehaviour( void );
#if ETHERNET_CONF_USE_PHY_IT
#ifdef FREERTOS_USED
#if __GNUC__
__attribute__((naked))
#elif __ICCAVR32__
#pragma shadow_registers = full // Naked.
#endif
#else
#if __GNUC__
__attribute__((__interrupt__))
#elif __ICCAVR32__
__interrupt
#endif
#endif
void vPHY_ISR( void );
static long prvPHY_ISR_NonNakedBehaviour( void );
#endif
/*
* Initialise both the Tx and Rx descriptors used by the MACB.
*/
static void prvSetupDescriptors(volatile avr32_macb_t * macb);
/*
* Write our MAC address into the MACB.
*/
static void prvSetupMACAddress( volatile avr32_macb_t * macb );
/*
* Configure the MACB for interrupts.
*/
static void prvSetupMACBInterrupt( volatile avr32_macb_t * macb );
/*
* Some initialisation functions.
*/
static Bool prvProbePHY( volatile avr32_macb_t * macb );
static unsigned long ulReadMDIO(volatile avr32_macb_t * macb, unsigned short usAddress);
static void vWriteMDIO(volatile avr32_macb_t * macb, unsigned short usAddress, unsigned short usValue);
#ifdef FREERTOS_USED
/* The semaphore used by the MACB ISR to wake the MACB task. */
static xSemaphoreHandle xSemaphore = NULL;
#else
static volatile Bool DataToRead = FALSE;
#endif
/* Holds the index to the next buffer from which data will be read. */
volatile unsigned long ulNextRxBuffer = 0;
long lMACBSend(volatile avr32_macb_t * macb, char *pcFrom, unsigned long ulLength, long lEndOfFrame )
{
static unsigned long uxTxBufferIndex = 0;
char *pcBuffer;
unsigned long ulLastBuffer, ulDataBuffered = 0, ulDataRemainingToSend, ulLengthToSend;
/* If the length of data to be transmitted is greater than each individual
transmit buffer then the data will be split into more than one buffer.
Loop until the entire length has been buffered. */
while( ulDataBuffered < ulLength )
{
// Is a buffer available ?
while( !( xTxDescriptors[ uxTxBufferIndex ].U_Status.status & AVR32_TRANSMIT_OK ) )
{
// There is no room to write the Tx data to the Tx buffer.
// Wait a short while, then try again.
#ifdef FREERTOS_USED
vTaskDelay( BUFFER_WAIT_DELAY );
#else
__asm__ __volatile__ ("nop");
#endif
}
portENTER_CRITICAL();
{
// Get the address of the buffer from the descriptor,
// then copy the data into the buffer.
pcBuffer = ( char * ) xTxDescriptors[ uxTxBufferIndex ].addr;
// How much can we write to the buffer ?
ulDataRemainingToSend = ulLength - ulDataBuffered;
if( ulDataRemainingToSend <= ETHERNET_CONF_TX_BUFFER_SIZE )
{
// We can write all the remaining bytes.
ulLengthToSend = ulDataRemainingToSend;
}
else
{
// We can't write more than ETH_TX_BUFFER_SIZE in one go.
ulLengthToSend = ETHERNET_CONF_TX_BUFFER_SIZE;
}
// Copy the data into the buffer.
memcpy( ( void * ) pcBuffer, ( void * ) &( pcFrom[ ulDataBuffered ] ), ulLengthToSend );
ulDataBuffered += ulLengthToSend;
// Is this the last data for the frame ?
if( lEndOfFrame && ( ulDataBuffered >= ulLength ) )
{
// No more data remains for this frame so we can start the transmission.
ulLastBuffer = AVR32_LAST_BUFFER;
}
else
{
// More data to come for this frame.
ulLastBuffer = 0;
}
// Fill out the necessary in the descriptor to get the data sent,
// then move to the next descriptor, wrapping if necessary.
if( uxTxBufferIndex >= ( ETHERNET_CONF_NB_TX_BUFFERS - 1 ) )
{
xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AVR32_LENGTH_FRAME )
| ulLastBuffer
| AVR32_TRANSMIT_WRAP;
uxTxBufferIndex = 0;
}
else
{
xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AVR32_LENGTH_FRAME )
| ulLastBuffer;
uxTxBufferIndex++;
}
/* If this is the last buffer to be sent for this frame we can
start the transmission. */
if( ulLastBuffer )
{
macb->ncr |= AVR32_MACB_TSTART_MASK;
}
}
portEXIT_CRITICAL();
}
return PASS;
}
unsigned long ulMACBInputLength( void )
{
register unsigned long ulIndex , ulLength = 0;
unsigned int uiTemp;
// Skip any fragments. We are looking for the first buffer that contains
// data and has the SOF (start of frame) bit set.
while( ( xRxDescriptors[ ulNextRxBuffer ].addr & AVR32_OWNERSHIP_BIT ) && !( xRxDescriptors[ ulNextRxBuffer ].U_Status.status & AVR32_SOF ) )
{
// Ignoring this buffer. Mark it as free again.
uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr;
xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT );
ulNextRxBuffer++;
if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS )
{
ulNextRxBuffer = 0;
}
}
// We are going to walk through the descriptors that make up this frame,
// but don't want to alter ulNextRxBuffer as this would prevent vMACBRead()
// from finding the data. Therefore use a copy of ulNextRxBuffer instead.
ulIndex = ulNextRxBuffer;
// Walk through the descriptors until we find the last buffer for this frame.
// The last buffer will give us the length of the entire frame.
while( ( xRxDescriptors[ ulIndex ].addr & AVR32_OWNERSHIP_BIT ) && !ulLength )
{
ulLength = xRxDescriptors[ ulIndex ].U_Status.status & AVR32_LENGTH_FRAME;
// Increment to the next buffer, wrapping if necessary.
ulIndex++;
if( ulIndex >= ETHERNET_CONF_NB_RX_BUFFERS )
{
ulIndex = 0;
}
}
return ulLength;
}
/*-----------------------------------------------------------*/
void vMACBRead( char *pcTo, unsigned long ulSectionLength, unsigned long ulTotalFrameLength )
{
static unsigned long ulSectionBytesReadSoFar = 0, ulBufferPosition = 0, ulFameBytesReadSoFar = 0;
static char *pcSource;
register unsigned long ulBytesRemainingInBuffer, ulRemainingSectionBytes;
unsigned int uiTemp;
// Read ulSectionLength bytes from the Rx buffers.
// This is not necessarily any correspondence between the length of our Rx buffers,
// and the length of the data we are returning or the length of the data being requested.
// Therefore, between calls we have to remember not only which buffer we are currently
// processing, but our position within that buffer.
// This would be greatly simplified if PBUF_POOL_BUFSIZE could be guaranteed to be greater
// than the size of each Rx buffer, and that memory fragmentation did not occur.
// This function should only be called after a call to ulMACBInputLength().
// This will ensure ulNextRxBuffer is set to the correct buffer. */
// vMACBRead is called with pcTo set to NULL to indicate that we are about
// to read a new frame. Any fragments remaining in the frame we were
// processing during the last call should be dropped.
if( pcTo == NULL )
{
// How many bytes are indicated as being in this buffer?
// If none then the buffer is completely full and the frame is contained within more
// than one buffer.
// Reset our state variables ready for the next read from this buffer.
pcSource = ( char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK );
ulFameBytesReadSoFar = ( unsigned long ) 0;
ulBufferPosition = ( unsigned long ) 0;
}
else
{
// Loop until we have obtained the required amount of data.
ulSectionBytesReadSoFar = 0;
while( ulSectionBytesReadSoFar < ulSectionLength )
{
// We may have already read some data from this buffer.
// How much data remains in the buffer?
ulBytesRemainingInBuffer = ( RX_BUFFER_SIZE - ulBufferPosition );
// How many more bytes do we need to read before we have the
// required amount of data?
ulRemainingSectionBytes = ulSectionLength - ulSectionBytesReadSoFar;
// Do we want more data than remains in the buffer?
if( ulRemainingSectionBytes > ulBytesRemainingInBuffer )
{
// We want more data than remains in the buffer so we can
// write the remains of the buffer to the destination, then move
// onto the next buffer to get the rest.
memcpy( &( pcTo[ ulSectionBytesReadSoFar ] ), &( pcSource[ ulBufferPosition ] ), ulBytesRemainingInBuffer );
ulSectionBytesReadSoFar += ulBytesRemainingInBuffer;
ulFameBytesReadSoFar += ulBytesRemainingInBuffer;
// Mark the buffer as free again.
uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr;
xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT );
// Move onto the next buffer.
ulNextRxBuffer++;
if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS )
{
ulNextRxBuffer = ( unsigned long ) 0;
}
// Reset the variables for the new buffer.
pcSource = ( char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK );
ulBufferPosition = ( unsigned long ) 0;
}
else
{
// We have enough data in this buffer to send back.
// Read out enough data and remember how far we read up to.
memcpy( &( pcTo[ ulSectionBytesReadSoFar ] ), &( pcSource[ ulBufferPosition ] ), ulRemainingSectionBytes );
// There may be more data in this buffer yet.
// Increment our position in this buffer past the data we have just read.
ulBufferPosition += ulRemainingSectionBytes;
ulSectionBytesReadSoFar += ulRemainingSectionBytes;
ulFameBytesReadSoFar += ulRemainingSectionBytes;
// Have we now finished with this buffer?
if( ( ulBufferPosition >= RX_BUFFER_SIZE ) || ( ulFameBytesReadSoFar >= ulTotalFrameLength ) )
{
// Mark the buffer as free again.
uiTemp = xRxDescriptors[ ulNextRxBuffer ].addr;
xRxDescriptors[ ulNextRxBuffer ].addr = uiTemp & ~( AVR32_OWNERSHIP_BIT );
// Move onto the next buffer.
ulNextRxBuffer++;
if( ulNextRxBuffer >= ETHERNET_CONF_NB_RX_BUFFERS )
{
ulNextRxBuffer = 0;
}
pcSource = ( char * )( xRxDescriptors[ ulNextRxBuffer ].addr & ADDRESS_MASK );
ulBufferPosition = 0;
}
}
}
}
}
/*-----------------------------------------------------------*/
void vMACBSetMACAddress(const char * MACAddress)
{
memcpy(cMACAddress, MACAddress, sizeof(cMACAddress));
}
Bool xMACBInit( volatile avr32_macb_t * macb )
{
volatile unsigned long status;
// set up registers
macb->ncr = 0;
macb->tsr = ~0UL;
macb->rsr = ~0UL;
macb->idr = ~0UL;
status = macb->isr;
#if ETHERNET_CONF_USE_RMII_INTERFACE
// RMII used, set 0 to the USRIO Register
macb->usrio &= ~AVR32_MACB_RMII_MASK;
#else
// RMII not used, set 1 to the USRIO Register
macb->usrio |= AVR32_MACB_RMII_MASK;
#endif
// Load our MAC address into the MACB.
prvSetupMACAddress(macb);
// Setup the buffers and descriptors.
prvSetupDescriptors(macb);
#if ETHERNET_CONF_SYSTEM_CLOCK <= 20000000
macb->ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV8 << AVR32_MACB_NCFGR_CLK_OFFSET);
#elif ETHERNET_CONF_SYSTEM_CLOCK <= 40000000
macb->ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV16 << AVR32_MACB_NCFGR_CLK_OFFSET);
#elif ETHERNET_CONF_SYSTEM_CLOCK <= 80000000
macb->ncfgr |= AVR32_MACB_NCFGR_CLK_DIV32 << AVR32_MACB_NCFGR_CLK_OFFSET;
#elif ETHERNET_CONF_SYSTEM_CLOCK <= 160000000
macb->ncfgr |= AVR32_MACB_NCFGR_CLK_DIV64 << AVR32_MACB_NCFGR_CLK_OFFSET;
#else
# error System clock too fast
#endif
// Are we connected?
if( prvProbePHY(macb) == TRUE )
{
// Enable the interrupt!
portENTER_CRITICAL();
{
prvSetupMACBInterrupt(macb);
}
portEXIT_CRITICAL();
// Enable Rx and Tx, plus the stats register.
macb->ncr = AVR32_MACB_NCR_TE_MASK | AVR32_MACB_NCR_RE_MASK;
return (TRUE);
}
return (FALSE);
}
void vDisableMACBOperations(volatile avr32_macb_t * macb)
{
#if ETHERNET_CONF_USE_PHY_IT
volatile avr32_gpio_t *gpio = &AVR32_GPIO;
volatile avr32_gpio_port_t *gpio_port = &gpio->port[MACB_INTERRUPT_PIN/32];
gpio_port->ierc = 1 << (MACB_INTERRUPT_PIN%32);
#endif
// write the MACB control register : disable Tx & Rx
macb->ncr &= ~((1 << AVR32_MACB_RE_OFFSET) | (1 << AVR32_MACB_TE_OFFSET));
// We no more want to interrupt on Rx and Tx events.
macb->idr = AVR32_MACB_IER_RCOMP_MASK | AVR32_MACB_IER_TCOMP_MASK;
}
void vClearMACBTxBuffer( void )
{
static unsigned long uxNextBufferToClear = 0;
// Called on Tx interrupt events to set the AVR32_TRANSMIT_OK bit in each
// Tx buffer within the frame just transmitted. This marks all the buffers
// as available again.
// The first buffer in the frame should have the bit set automatically. */
if( xTxDescriptors[ uxNextBufferToClear ].U_Status.status & AVR32_TRANSMIT_OK )
{
// Loop through the other buffers in the frame.
while( !( xTxDescriptors[ uxNextBufferToClear ].U_Status.status & AVR32_LAST_BUFFER ) )
{
uxNextBufferToClear++;
if( uxNextBufferToClear >= ETHERNET_CONF_NB_TX_BUFFERS )
{
uxNextBufferToClear = 0;
}
xTxDescriptors[ uxNextBufferToClear ].U_Status.status |= AVR32_TRANSMIT_OK;
}
// Start with the next buffer the next time a Tx interrupt is called.
uxNextBufferToClear++;
// Do we need to wrap back to the first buffer?
if( uxNextBufferToClear >= ETHERNET_CONF_NB_TX_BUFFERS )
{
uxNextBufferToClear = 0;
}
}
}
static void prvSetupDescriptors(volatile avr32_macb_t * macb)
{
unsigned long xIndex;
unsigned long ulAddress;
// Initialise xRxDescriptors descriptor.
for( xIndex = 0; xIndex < ETHERNET_CONF_NB_RX_BUFFERS; ++xIndex )
{
// Calculate the address of the nth buffer within the array.
ulAddress = ( unsigned long )( pcRxBuffer + ( xIndex * RX_BUFFER_SIZE ) );
// Write the buffer address into the descriptor.
// The DMA will place the data at this address when this descriptor is being used.
// Mask off the bottom bits of the address as these have special meaning.
xRxDescriptors[ xIndex ].addr = ulAddress & ADDRESS_MASK;
}
// The last buffer has the wrap bit set so the MACB knows to wrap back
// to the first buffer.
xRxDescriptors[ ETHERNET_CONF_NB_RX_BUFFERS - 1 ].addr |= RX_WRAP_BIT;
// Initialise xTxDescriptors.
for( xIndex = 0; xIndex < ETHERNET_CONF_NB_TX_BUFFERS; ++xIndex )
{
// Calculate the address of the nth buffer within the array.
ulAddress = ( unsigned long )( pcTxBuffer + ( xIndex * ETHERNET_CONF_TX_BUFFER_SIZE ) );
// Write the buffer address into the descriptor.
// The DMA will read data from here when the descriptor is being used.
xTxDescriptors[ xIndex ].addr = ulAddress & ADDRESS_MASK;
xTxDescriptors[ xIndex ].U_Status.status = AVR32_TRANSMIT_OK;
}
// The last buffer has the wrap bit set so the MACB knows to wrap back
// to the first buffer.
xTxDescriptors[ ETHERNET_CONF_NB_TX_BUFFERS - 1 ].U_Status.status = AVR32_TRANSMIT_WRAP | AVR32_TRANSMIT_OK;
// Tell the MACB where to find the descriptors.
macb->rbqp = ( unsigned long )xRxDescriptors;
macb->tbqp = ( unsigned long )xTxDescriptors;
// Enable the copy of data into the buffers, ignore broadcasts,
// and don't copy FCS.
macb->ncfgr |= (AVR32_MACB_CAF_MASK | AVR32_MACB_NBC_MASK | AVR32_MACB_NCFGR_DRFCS_MASK);
}
static void prvSetupMACAddress( volatile avr32_macb_t * macb )
{
// Must be written SA1L then SA1H.
macb->sa1b = ( ( unsigned long ) cMACAddress[ 3 ] << 24 ) |
( ( unsigned long ) cMACAddress[ 2 ] << 16 ) |
( ( unsigned long ) cMACAddress[ 1 ] << 8 ) |
cMACAddress[ 0 ];
macb->sa1t = ( ( unsigned long ) cMACAddress[ 5 ] << 8 ) |
cMACAddress[ 4 ];
}
static void prvSetupMACBInterrupt( volatile avr32_macb_t * macb )
{
#ifdef FREERTOS_USED
// Create the semaphore used to trigger the MACB task.
if (xSemaphore == NULL)
{
vSemaphoreCreateBinary( xSemaphore );
}
#else
// Create the flag used to trigger the MACB polling task.
DataToRead = FALSE;
#endif
#ifdef FREERTOS_USED
if( xSemaphore != NULL)
{
// We start by 'taking' the semaphore so the ISR can 'give' it when the
// first interrupt occurs.
xSemaphoreTake( xSemaphore, 0 );
#endif
// Setup the interrupt for MACB.
// Register the interrupt handler to the interrupt controller at interrupt level 2
INTC_register_interrupt((__int_handler)&vMACB_ISR, AVR32_MACB_IRQ, INT2);
#if ETHERNET_CONF_USE_PHY_IT
/* GPIO enable interrupt upon rising edge */
gpio_enable_pin_interrupt(MACB_INTERRUPT_PIN, GPIO_FALLING_EDGE);
// Setup the interrupt for PHY.
// Register the interrupt handler to the interrupt controller at interrupt level 2
INTC_register_interrupt((__int_handler)&vPHY_ISR, (AVR32_GPIO_IRQ_0 + (MACB_INTERRUPT_PIN/8)), INT2);
/* enable interrupts on INT pin */
vWriteMDIO( macb, PHY_MICR , ( MICR_INTEN | MICR_INTOE ));
/* enable "link change" interrupt for Phy */
vWriteMDIO( macb, PHY_MISR , MISR_LINK_INT_EN );
#endif
// We want to interrupt on Rx and Tx events
macb->ier = AVR32_MACB_IER_RCOMP_MASK | AVR32_MACB_IER_TCOMP_MASK;
#ifdef FREERTOS_USED
}
#endif
}
/*! Read a register on MDIO bus (access to the PHY)
* This function is looping until PHY gets ready
*
* \param macb Input. instance of the MACB to use
* \param usAddress Input. register to set.
*
* \return unsigned long data that has been read
*/
static unsigned long ulReadMDIO(volatile avr32_macb_t * macb, unsigned short usAddress)
{
unsigned long value, status;
// initiate transaction : enable management port
macb->ncr |= AVR32_MACB_NCR_MPE_MASK;
// Write the PHY configuration frame to the MAN register
macb->man = (AVR32_MACB_SOF_MASK & (0x01<<AVR32_MACB_SOF_OFFSET)) // SOF
| (2 << AVR32_MACB_CODE_OFFSET) // Code
| (2 << AVR32_MACB_RW_OFFSET) // Read operation
| ((ETHERNET_CONF_PHY_ADDR & 0x1f) << AVR32_MACB_PHYA_OFFSET) // Phy Add
| (usAddress << AVR32_MACB_REGA_OFFSET); // Reg Add
// wait for PHY to be ready
do {
status = macb->nsr;
} while (!(status & AVR32_MACB_NSR_IDLE_MASK));
// read the register value in maintenance register
value = macb->man & 0x0000ffff;
// disable management port
macb->ncr &= ~AVR32_MACB_NCR_MPE_MASK;
// return the read value
return (value);
}
/*! Write a given value to a register on MDIO bus (access to the PHY)
* This function is looping until PHY gets ready
*
* \param *macb Input. instance of the MACB to use
* \param usAddress Input. register to set.
* \param usValue Input. value to write.
*
*/
static void vWriteMDIO(volatile avr32_macb_t * macb, unsigned short usAddress, unsigned short usValue)
{
unsigned long status;
// initiate transaction : enable management port
macb->ncr |= AVR32_MACB_NCR_MPE_MASK;
// Write the PHY configuration frame to the MAN register
macb->man = (( AVR32_MACB_SOF_MASK & (0x01<<AVR32_MACB_SOF_OFFSET)) // SOF
| (2 << AVR32_MACB_CODE_OFFSET) // Code
| (1 << AVR32_MACB_RW_OFFSET) // Write operation
| ((ETHERNET_CONF_PHY_ADDR & 0x1f) << AVR32_MACB_PHYA_OFFSET) // Phy Add
| (usAddress << AVR32_MACB_REGA_OFFSET)) // Reg Add
| (usValue & 0xffff); // Data
// wait for PHY to be ready
do {
status = macb->nsr;
} while (!(status & AVR32_MACB_NSR_IDLE_MASK));
// disable management port
macb->ncr &= ~AVR32_MACB_NCR_MPE_MASK;
}
static Bool prvProbePHY( volatile avr32_macb_t * macb )
{
volatile unsigned long mii_status, phy_ctrl;
volatile unsigned long config;
unsigned long upper, lower, mode, advertise, lpa;
volatile unsigned long physID;
// Read Phy Identifier register 1 & 2
lower = ulReadMDIO(macb, PHY_PHYSID2);
upper = ulReadMDIO(macb, PHY_PHYSID1);
// get Phy ID, ignore Revision
physID = ((upper << 16) & 0xFFFF0000) | (lower & 0xFFF0);
// check if it match config
if (physID == ETHERNET_CONF_PHY_ID)
{
// read RBR
mode = ulReadMDIO(macb, PHY_RBR);
// set RMII mode if not done
if ((mode & RBR_RMII) != RBR_RMII)
{
// force RMII flag if strap options are wrong
mode |= RBR_RMII;
vWriteMDIO(macb, PHY_RBR, mode);
}
// set advertise register
#if ETHERNET_CONF_AN_ENABLE == 1
advertise = ADVERTISE_CSMA | ADVERTISE_ALL;
#else
advertise = ADVERTISE_CSMA;
#if ETHERNET_CONF_USE_100MB
#if ETHERNET_CONF_USE_FULL_DUPLEX
advertise |= ADVERTISE_100FULL;
#else
advertise |= ADVERTISE_100HALF;
#endif
#else
#if ETHERNET_CONF_USE_FULL_DUPLEX
advertise |= ADVERTISE_10FULL;
#else
advertise |= ADVERTISE_10HALF;
#endif
#endif
#endif
// write advertise register
vWriteMDIO(macb, PHY_ADVERTISE, advertise);
// read Control register
config = ulReadMDIO(macb, PHY_BMCR);
// read Phy Control register
phy_ctrl = ulReadMDIO(macb, PHY_PHYCR);
#if ETHERNET_CONF_AN_ENABLE
#if ETHERNET_CONF_AUTO_CROSS_ENABLE
// enable Auto MDIX
phy_ctrl |= PHYCR_MDIX_EN;
#else
// disable Auto MDIX
phy_ctrl &= ~PHYCR_MDIX_EN;
#if ETHERNET_CONF_CROSSED_LINK
// force direct link = Use crossed RJ45 cable
phy_ctrl &= ~PHYCR_MDIX_FORCE;
#else
// force crossed link = Use direct RJ45 cable
phy_ctrl |= PHYCR_MDIX_FORCE;
#endif
#endif
// reset auto-negociation capability
config |= (BMCR_ANRESTART | BMCR_ANENABLE);
#else
// disable Auto MDIX
phy_ctrl &= ~PHYCR_MDIX_EN;
#if ETHERNET_CONF_CROSSED_LINK
// force direct link = Use crossed RJ45 cable
phy_ctrl &= ~PHYCR_MDIX_FORCE;
#else
// force crossed link = Use direct RJ45 cable
phy_ctrl |= PHYCR_MDIX_FORCE;
#endif
// clear AN bit
config &= ~BMCR_ANENABLE;
#if ETHERNET_CONF_USE_100MB
config |= BMCR_SPEED100;
#else
config &= ~BMCR_SPEED100;
#endif
#if ETHERNET_CONF_USE_FULL_DUPLEX
config |= BMCR_FULLDPLX;
#else
config &= ~BMCR_FULLDPLX;
#endif
#endif
// update Phy ctrl register
vWriteMDIO(macb, PHY_PHYCR, phy_ctrl);
// update ctrl register
vWriteMDIO(macb, PHY_BMCR, config);
// loop while link status isn't OK
do {
mii_status = ulReadMDIO(macb, PHY_BMSR);
} while (!(mii_status & BMSR_LSTATUS));
// read the LPA configuration of the PHY
lpa = ulReadMDIO(macb, PHY_LPA);
// read the MACB config register
config = AVR32_MACB.ncfgr;
// if 100MB needed
if ((lpa & advertise) & (LPA_100HALF | LPA_100FULL))
{
config |= AVR32_MACB_SPD_MASK;
}
else
{
config &= ~(AVR32_MACB_SPD_MASK);
}
// if FULL DUPLEX needed
if ((lpa & advertise) & (LPA_10FULL | LPA_100FULL))
{
config |= AVR32_MACB_FD_MASK;
}
else
{
config &= ~(AVR32_MACB_FD_MASK);
}
// write the MACB config register
macb->ncfgr = config;
return TRUE;
}
return FALSE;
}
void vMACBWaitForInput( unsigned long ulTimeOut )
{
#ifdef FREERTOS_USED
// Just wait until we are signled from an ISR that data is available, or
// we simply time out.
xSemaphoreTake( xSemaphore, ulTimeOut );
#else
unsigned long i;
gpio_clr_gpio_pin(LED0_GPIO);
i = ulTimeOut * 1000;
// wait for an interrupt to occurs
do
{
if ( DataToRead == TRUE )
{
// IT occurs, reset interrupt flag
portENTER_CRITICAL();
DataToRead = FALSE;
portEXIT_CRITICAL();
break;
}
i--;
}
while(i != 0);
gpio_set_gpio_pin(LED0_GPIO);
#endif
}
/*
* The MACB ISR. Handles both Tx and Rx complete interrupts.
*/
#ifdef FREERTOS_USED
#if __GNUC__
__attribute__((naked))
#elif __ICCAVR32__
#pragma shadow_registers = full // Naked.
#endif
#else
#if __GNUC__
__attribute__((__interrupt__))
#elif __ICCAVR32__
__interrupt
#endif
#endif
void vMACB_ISR( void )
{
// This ISR can cause a context switch, so the first statement must be a
// call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
// variable declarations.
portENTER_SWITCHING_ISR();
// the return value is used by FreeRTOS to change the context if needed after rete instruction
// in standalone use, this value should be ignored
prvMACB_ISR_NonNakedBehaviour();
// Exit the ISR. If a task was woken by either a character being received
// or transmitted then a context switch will occur.
portEXIT_SWITCHING_ISR();
}
/*-----------------------------------------------------------*/
#if __GNUC__
__attribute__((__noinline__))
#elif __ICCAVR32__
#pragma optimize = no_inline
#endif
static long prvMACB_ISR_NonNakedBehaviour( void )
{
// Variable definitions can be made now.
volatile unsigned long ulIntStatus, ulEventStatus;
long xHigherPriorityTaskWoken = FALSE;
// Find the cause of the interrupt.
ulIntStatus = AVR32_MACB.isr;
ulEventStatus = AVR32_MACB.rsr;
if( ( ulIntStatus & AVR32_MACB_IDR_RCOMP_MASK ) || ( ulEventStatus & AVR32_MACB_REC_MASK ) )
{
// A frame has been received, signal the IP task so it can process
// the Rx descriptors.
portENTER_CRITICAL();
#ifdef FREERTOS_USED
xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
#else
DataToRead = TRUE;
#endif
portEXIT_CRITICAL();
AVR32_MACB.rsr = AVR32_MACB_REC_MASK;
AVR32_MACB.rsr;
}
if( ulIntStatus & AVR32_MACB_TCOMP_MASK )
{
// A frame has been transmitted. Mark all the buffers used by the
// frame just transmitted as free again.
vClearMACBTxBuffer();
AVR32_MACB.tsr = AVR32_MACB_TSR_COMP_MASK;
AVR32_MACB.tsr;
}
return ( xHigherPriorityTaskWoken );
}
#if ETHERNET_CONF_USE_PHY_IT
/*
* The PHY ISR. Handles Phy interrupts.
*/
#ifdef FREERTOS_USED
#if __GNUC__
__attribute__((naked))
#elif __ICCAVR32__
#pragma shadow_registers = full // Naked.
#endif
#else
#if __GNUC__
__attribute__((__interrupt__))
#elif __ICCAVR32__
__interrupt
#endif
#endif
void vPHY_ISR( void )
{
// This ISR can cause a context switch, so the first statement must be a
// call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
// variable declarations.
portENTER_SWITCHING_ISR();
// the return value is used by FreeRTOS to change the context if needed after rete instruction
// in standalone use, this value should be ignored
prvPHY_ISR_NonNakedBehaviour();
// Exit the ISR. If a task was woken by either a character being received
// or transmitted then a context switch will occur.
portEXIT_SWITCHING_ISR();
}
/*-----------------------------------------------------------*/
#if __GNUC__
__attribute__((__noinline__))
#elif __ICCAVR32__
#pragma optimize = no_inline
#endif
static long prvPHY_ISR_NonNakedBehaviour( void )
{
// Variable definitions can be made now.
volatile unsigned long ulIntStatus, ulEventStatus;
long xSwitchRequired = FALSE;
volatile avr32_gpio_t *gpio = &AVR32_GPIO;
volatile avr32_gpio_port_t *gpio_port = &gpio->port[MACB_INTERRUPT_PIN/32];
// read Phy Interrupt register Status
ulIntStatus = ulReadMDIO(&AVR32_MACB, PHY_MISR);
// read Phy status register
ulEventStatus = ulReadMDIO(&AVR32_MACB, PHY_BMSR);
// dummy read
ulEventStatus = ulReadMDIO(&AVR32_MACB, PHY_BMSR);
// clear interrupt flag on GPIO
gpio_port->ifrc = 1 << (MACB_INTERRUPT_PIN%32);
return ( xSwitchRequired );
}
#endif

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief MACB example driver for EVK1100 board.
*
* This file defines a useful set of functions for the MACB interface on
* AVR32 devices.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a MACB module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef AVR32_MACB_H
#define AVR32_MACB_H
#include <avr32/io.h>
#ifdef FREERTOS_USED
#include <arch/sys_arch.h>
#endif
#include "conf_eth.h"
/*! \name Rx Ring descriptor flags
*/
//! @{
#define AVR32_MACB_RX_USED_OFFSET 0
#define AVR32_MACB_RX_USED_SIZE 1
#define AVR32_MACB_RX_WRAP_OFFSET 1
#define AVR32_MACB_RX_WRAP_SIZE 1
#define AVR32_MACB_RX_LEN_OFFSET 0
#define AVR32_MACB_RX_LEN_SIZE 12
#define AVR32_MACB_RX_OFFSET_OFFSET 12
#define AVR32_MACB_RX_OFFSET_SIZE 2
#define AVR32_MACB_RX_SOF_OFFSET 14
#define AVR32_MACB_RX_SOF_SIZE 1
#define AVR32_MACB_RX_EOF_OFFSET 15
#define AVR32_MACB_RX_EOF_SIZE 1
#define AVR32_MACB_RX_CFI_OFFSET 16
#define AVR32_MACB_RX_CFI_SIZE 1
//! @}
/*! \name Tx Ring descriptor flags
*/
//! @{
#define AVR32_MACB_TX_LEN_OFFSET 0
#define AVR32_MACB_TX_LEN_SIZE 11
#define AVR32_MACB_TX_EOF_OFFSET 15
#define AVR32_MACB_TX_EOF_SIZE 1
#define AVR32_MACB_TX_NOCRC_OFFSET 16
#define AVR32_MACB_TX_NOCRC_SIZE 1
#define AVR32_MACB_TX_EMF_OFFSET 27
#define AVR32_MACB_TX_EMF_SIZE 1
#define AVR32_MACB_TX_UNR_OFFSET 28
#define AVR32_MACB_TX_UNR_SIZE 1
#define AVR32_MACB_TX_MAXRETRY_OFFSET 29
#define AVR32_MACB_TX_MAXRETRY_SIZE 1
#define AVR32_MACB_TX_WRAP_OFFSET 30
#define AVR32_MACB_TX_WRAP_SIZE 1
#define AVR32_MACB_TX_USED_OFFSET 31
#define AVR32_MACB_TX_USED_SIZE 1
//! @}
/*! \name Generic MII registers.
*/
//! @{
#define PHY_BMCR 0x00 //!< Basic mode control register
#define PHY_BMSR 0x01 //!< Basic mode status register
#define PHY_PHYSID1 0x02 //!< PHYS ID 1
#define PHY_PHYSID2 0x03 //!< PHYS ID 2
#define PHY_ADVERTISE 0x04 //!< Advertisement control reg
#define PHY_LPA 0x05 //!< Link partner ability reg
//! @}
#if BOARD == EVK1100
/*! \name Extended registers for DP83848
*/
//! @{
#define PHY_RBR 0x17 //!< RMII Bypass reg
#define PHY_MICR 0x11 //!< Interrupt Control reg
#define PHY_MISR 0x12 //!< Interrupt Status reg
#define PHY_PHYCR 0x19 //!< Phy CTRL reg
//! @}
#endif
/*! \name Basic mode control register.
*/
//! @{
#define BMCR_RESV 0x007f //!< Unused...
#define BMCR_CTST 0x0080 //!< Collision test
#define BMCR_FULLDPLX 0x0100 //!< Full duplex
#define BMCR_ANRESTART 0x0200 //!< Auto negotiation restart
#define BMCR_ISOLATE 0x0400 //!< Disconnect PHY from MII
#define BMCR_PDOWN 0x0800 //!< Powerdown the PHY
#define BMCR_ANENABLE 0x1000 //!< Enable auto negotiation
#define BMCR_SPEED100 0x2000 //!< Select 100Mbps
#define BMCR_LOOPBACK 0x4000 //!< TXD loopback bits
#define BMCR_RESET 0x8000 //!< Reset the PHY
//! @}
/*! \name Basic mode status register.
*/
//! @{
#define BMSR_ERCAP 0x0001 //!< Ext-reg capability
#define BMSR_JCD 0x0002 //!< Jabber detected
#define BMSR_LSTATUS 0x0004 //!< Link status
#define BMSR_ANEGCAPABLE 0x0008 //!< Able to do auto-negotiation
#define BMSR_RFAULT 0x0010 //!< Remote fault detected
#define BMSR_ANEGCOMPLETE 0x0020 //!< Auto-negotiation complete
#define BMSR_RESV 0x00c0 //!< Unused...
#define BMSR_ESTATEN 0x0100 //!< Extended Status in R15
#define BMSR_100FULL2 0x0200 //!< Can do 100BASE-T2 HDX
#define BMSR_100HALF2 0x0400 //!< Can do 100BASE-T2 FDX
#define BMSR_10HALF 0x0800 //!< Can do 10mbps, half-duplex
#define BMSR_10FULL 0x1000 //!< Can do 10mbps, full-duplex
#define BMSR_100HALF 0x2000 //!< Can do 100mbps, half-duplex
#define BMSR_100FULL 0x4000 //!< Can do 100mbps, full-duplex
#define BMSR_100BASE4 0x8000 //!< Can do 100mbps, 4k packets
//! @}
/*! \name Advertisement control register.
*/
//! @{
#define ADVERTISE_SLCT 0x001f //!< Selector bits
#define ADVERTISE_CSMA 0x0001 //!< Only selector supported
#define ADVERTISE_10HALF 0x0020 //!< Try for 10mbps half-duplex
#define ADVERTISE_1000XFULL 0x0020 //!< Try for 1000BASE-X full-duplex
#define ADVERTISE_10FULL 0x0040 //!< Try for 10mbps full-duplex
#define ADVERTISE_1000XHALF 0x0040 //!< Try for 1000BASE-X half-duplex
#define ADVERTISE_100HALF 0x0080 //!< Try for 100mbps half-duplex
#define ADVERTISE_1000XPAUSE 0x0080 //!< Try for 1000BASE-X pause
#define ADVERTISE_100FULL 0x0100 //!< Try for 100mbps full-duplex
#define ADVERTISE_1000XPSE_ASYM 0x0100 //!< Try for 1000BASE-X asym pause
#define ADVERTISE_100BASE4 0x0200 //!< Try for 100mbps 4k packets
#define ADVERTISE_PAUSE_CAP 0x0400 //!< Try for pause
#define ADVERTISE_PAUSE_ASYM 0x0800 //!< Try for asymetric pause
#define ADVERTISE_RESV 0x1000 //!< Unused...
#define ADVERTISE_RFAULT 0x2000 //!< Say we can detect faults
#define ADVERTISE_LPACK 0x4000 //!< Ack link partners response
#define ADVERTISE_NPAGE 0x8000 //!< Next page bit
//! @}
#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | ADVERTISE_CSMA)
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
ADVERTISE_100HALF | ADVERTISE_100FULL)
/*! \name Link partner ability register.
*/
//! @{
#define LPA_SLCT 0x001f //!< Same as advertise selector
#define LPA_10HALF 0x0020 //!< Can do 10mbps half-duplex
#define LPA_1000XFULL 0x0020 //!< Can do 1000BASE-X full-duplex
#define LPA_10FULL 0x0040 //!< Can do 10mbps full-duplex
#define LPA_1000XHALF 0x0040 //!< Can do 1000BASE-X half-duplex
#define LPA_100HALF 0x0080 //!< Can do 100mbps half-duplex
#define LPA_1000XPAUSE 0x0080 //!< Can do 1000BASE-X pause
#define LPA_100FULL 0x0100 //!< Can do 100mbps full-duplex
#define LPA_1000XPAUSE_ASYM 0x0100 //!< Can do 1000BASE-X pause asym
#define LPA_100BASE4 0x0200 //!< Can do 100mbps 4k packets
#define LPA_PAUSE_CAP 0x0400 //!< Can pause
#define LPA_PAUSE_ASYM 0x0800 //!< Can pause asymetrically
#define LPA_RESV 0x1000 //!< Unused...
#define LPA_RFAULT 0x2000 //!< Link partner faulted
#define LPA_LPACK 0x4000 //!< Link partner acked us
#define LPA_NPAGE 0x8000 //!< Next page bit
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
//! @}
#if BOARD == EVK1100
/*! RMII Bypass Register */
#define RBR_RMII 0x0020 //!< RMII Mode
/*! \name Interrupt Ctrl Register.
*/
//! @{
#define MICR_INTEN 0x0002 //!< Enable interrupts
#define MICR_INTOE 0x0001 //!< Enable INT output
//! @}
/*! \name Interrupt Status Register.
*/
//! @{
#define MISR_ED_INT_EN 0x0040 //!< Energy Detect enabled
#define MISR_LINK_INT_EN 0x0020 //!< Link status change enabled
#define MISR_SPD_INT_EN 0x0010 //!< Speed change enabled
#define MISR_DP_INT_EN 0x0008 //!< Duplex mode change enabled
#define MISR_ANC_INT_EN 0x0004 //!< Auto-Neg complete enabled
#define MISR_FHF_INT_EN 0x0002 //!< False Carrier enabled
#define MISR_RHF_INT_EN 0x0001 //!< Receive Error enabled
#define MISR_ED_INT 0x4000 //!< Energy Detect
#define MISR_LINK_INT 0x2000 //!< Link status change
#define MISR_SPD_INT 0x1000 //!< Speed change
#define MISR_DP_INT 0x0800 //!< Duplex mode change
#define MISR_ANC_INT 0x0400 //!< Auto-Neg complete
#define MISR_FHF_INT 0x0200 //!< False Carrier
#define MISR_RHF_INT 0x0100 //!< Receive Error
//! @}
/*! \name Phy Ctrl Register.
*/
//! @{
#define PHYCR_MDIX_EN 0x8000 //!< Enable Auto MDIX
#define PHYCR_MDIX_FORCE 0x4000 //!< Force MDIX crossed
//! @}
#endif
/*! Packet structure.
*/
//! @{
typedef struct
{
char *data;
unsigned int len;
} macb_packet_t;
//! @}
/*! Receive Transfer descriptor structure.
*/
//! @{
typedef struct _AVR32_RxTdDescriptor {
unsigned int addr;
union
{
unsigned int status;
struct {
unsigned int BroadCast:1;
unsigned int MultiCast:1;
unsigned int UniCast:1;
unsigned int ExternalAdd:1;
unsigned int Res1:1;
unsigned int Sa1Match:1;
unsigned int Sa2Match:1;
unsigned int Sa3Match:1;
unsigned int Sa4Match:1;
unsigned int TypeID:1;
unsigned int VlanTag:1;
unsigned int PriorityTag:1;
unsigned int VlanPriority:3;
unsigned int Cfi:1;
unsigned int EndOfFrame:1;
unsigned int StartOfFrame:1;
unsigned int Rxbuf_off:2;
unsigned int Res0:1;
unsigned int Length:11;
}S_Status;
}U_Status;
}AVR32_RxTdDescriptor, *AVR32P_RxTdDescriptor;
//! @}
/*! Transmit Transfer descriptor structure.
*/
//! @{
typedef struct _AVR32_TxTdDescriptor {
unsigned int addr;
union
{
unsigned int status;
struct {
unsigned int BuffUsed:1;
unsigned int Wrap:1;
unsigned int TransmitError:1;
unsigned int TransmitUnderrun:1;
unsigned int BufExhausted:1;
unsigned int Res1:10;
unsigned int NoCrc:1;
unsigned int LastBuff:1;
unsigned int Res0:4;
unsigned int Length:11;
}S_Status;
}U_Status;
}AVR32_TxTdDescriptor, *AVR32P_TxTdDescriptor;
//! @}
/*! Mask for frame used. */
#define AVR32_OWNERSHIP_BIT 0x00000001
/*! Receive status defintion.
*/
//! @{
#define AVR32_BROADCAST_ADDR ((unsigned int) (1 << 31)) //* Broadcat address detected
#define AVR32_MULTICAST_HASH ((unsigned int) (1 << 30)) //* MultiCast hash match
#define AVR32_UNICAST_HASH ((unsigned int) (1 << 29)) //* UniCast hash match
#define AVR32_EXTERNAL_ADDR ((unsigned int) (1 << 28)) //* External Address match
#define AVR32_SA1_ADDR ((unsigned int) (1 << 26)) //* Specific address 1 match
#define AVR32_SA2_ADDR ((unsigned int) (1 << 25)) //* Specific address 2 match
#define AVR32_SA3_ADDR ((unsigned int) (1 << 24)) //* Specific address 3 match
#define AVR32_SA4_ADDR ((unsigned int) (1 << 23)) //* Specific address 4 match
#define AVR32_TYPE_ID ((unsigned int) (1 << 22)) //* Type ID match
#define AVR32_VLAN_TAG ((unsigned int) (1 << 21)) //* VLAN tag detected
#define AVR32_PRIORITY_TAG ((unsigned int) (1 << 20)) //* PRIORITY tag detected
#define AVR32_VLAN_PRIORITY ((unsigned int) (7 << 17)) //* PRIORITY Mask
#define AVR32_CFI_IND ((unsigned int) (1 << 16)) //* CFI indicator
#define AVR32_EOF ((unsigned int) (1 << 15)) //* EOF
#define AVR32_SOF ((unsigned int) (1 << 14)) //* SOF
#define AVR32_RBF_OFFSET ((unsigned int) (3 << 12)) //* Receive Buffer Offset Mask
#define AVR32_LENGTH_FRAME ((unsigned int) 0x0FFF) //* Length of frame
//! @}
/* Transmit Status definition */
//! @{
#define AVR32_TRANSMIT_OK ((unsigned int) (1 << 31)) //*
#define AVR32_TRANSMIT_WRAP ((unsigned int) (1 << 30)) //* Wrap bit: mark the last descriptor
#define AVR32_TRANSMIT_ERR ((unsigned int) (1 << 29)) //* RLE:transmit error
#define AVR32_TRANSMIT_UND ((unsigned int) (1 << 28)) //* Transmit Underrun
#define AVR32_BUF_EX ((unsigned int) (1 << 27)) //* Buffers exhausted in mid frame
#define AVR32_TRANSMIT_NO_CRC ((unsigned int) (1 << 16)) //* No CRC will be appended to the current frame
#define AVR32_LAST_BUFFER ((unsigned int) (1 << 15)) //*
//! @}
/**
* \brief Initialise the MACB driver.
*
* \param *macb Base address of the MACB
*
* \return TRUE if success, FALSE otherwise.
*/
Bool xMACBInit( volatile avr32_macb_t * macb );
/**
* \brief Send ulLength bytes from pcFrom. This copies the buffer to one of the
* MACB Tx buffers, then indicates to the MACB that the buffer is ready.
* If lEndOfFrame is true then the data being copied is the end of the frame
* and the frame can be transmitted.
*
* \param *macb Base address of the MACB
* \param *pcFrom Address of the data buffer
* \param ulLength Length of the frame
* \param lEndOfFrame Flag for End Of Frame
*
* \return length sent.
*/
long lMACBSend(volatile avr32_macb_t * macb, char *pcFrom, unsigned long ulLength, long lEndOfFrame );
/**
* \brief Frames can be read from the MACB in multiple sections.
* Read ulSectionLength bytes from the MACB receive buffers to pcTo.
* ulTotalFrameLength is the size of the entire frame. Generally vMACBRead
* will be repetedly called until the sum of all the ulSectionLenths totals
* the value of ulTotalFrameLength.
*
* \param *pcTo Address of the buffer
* \param ulSectionLength Length of the buffer
* \param ulTotalFrameLength Length of the frame
*/
void vMACBRead( char *pcTo, unsigned long ulSectionLength, unsigned long ulTotalFrameLength );
/**
* \brief Called by the Tx interrupt, this function traverses the buffers used to
* hold the frame that has just completed transmission and marks each as
* free again.
*/
void vClearMACBTxBuffer( void );
/**
* \brief Suspend on a semaphore waiting either for the semaphore to be obtained
* or a timeout. The semaphore is used by the MACB ISR to indicate that
* data has been received and is ready for processing.
*
* \param ulTimeOut time to wait for an input
*
*/
void vMACBWaitForInput( unsigned long ulTimeOut );
/**
* \brief Function to get length of the next frame in the receive buffers
*
* \return the length of the next frame in the receive buffers.
*/
unsigned long ulMACBInputLength( void );
/**
* \brief Set the MACB Physical address (SA1B & SA1T registers).
*
* \param *MACAddress the MAC address to set.
*/
void vMACBSetMACAddress(const char * MACAddress);
/**
* \brief Disable MACB operations (Tx and Rx).
*
* \param *macb Base address of the MACB
*/
void vDisableMACBOperations(volatile avr32_macb_t * macb);
#endif

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Power Manager driver.
*
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "pm.h"
/*! \name PM Writable Bit-Field Registers
*/
//! @{
typedef union
{
unsigned long mcctrl;
avr32_pm_mcctrl_t MCCTRL;
} u_avr32_pm_mcctrl_t;
typedef union
{
unsigned long cksel;
avr32_pm_cksel_t CKSEL;
} u_avr32_pm_cksel_t;
typedef union
{
unsigned long pll;
avr32_pm_pll_t PLL;
} u_avr32_pm_pll_t;
typedef union
{
unsigned long oscctrl0;
avr32_pm_oscctrl0_t OSCCTRL0;
} u_avr32_pm_oscctrl0_t;
typedef union
{
unsigned long oscctrl1;
avr32_pm_oscctrl1_t OSCCTRL1;
} u_avr32_pm_oscctrl1_t;
typedef union
{
unsigned long oscctrl32;
avr32_pm_oscctrl32_t OSCCTRL32;
} u_avr32_pm_oscctrl32_t;
typedef union
{
unsigned long ier;
avr32_pm_ier_t IER;
} u_avr32_pm_ier_t;
typedef union
{
unsigned long idr;
avr32_pm_idr_t IDR;
} u_avr32_pm_idr_t;
typedef union
{
unsigned long icr;
avr32_pm_icr_t ICR;
} u_avr32_pm_icr_t;
typedef union
{
unsigned long gcctrl;
avr32_pm_gcctrl_t GCCTRL;
} u_avr32_pm_gcctrl_t;
typedef union
{
unsigned long rccr;
avr32_pm_rccr_t RCCR;
} u_avr32_pm_rccr_t;
typedef union
{
unsigned long bgcr;
avr32_pm_bgcr_t BGCR;
} u_avr32_pm_bgcr_t;
typedef union
{
unsigned long vregcr;
avr32_pm_vregcr_t VREGCR;
} u_avr32_pm_vregcr_t;
typedef union
{
unsigned long bod;
avr32_pm_bod_t BOD;
} u_avr32_pm_bod_t;
//! @}
/*! \brief Sets the mode of the oscillator 0.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
* \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x).
*/
static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
// Read
u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
// Modify
u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode;
// Write
pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
}
void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm)
{
pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK);
}
void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0)
{
pm_set_osc0_mode(pm, (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :
AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3);
}
void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup)
{
pm_enable_clk0_no_wait(pm, startup);
pm_wait_for_clk0_ready(pm);
}
void pm_disable_clk0(volatile avr32_pm_t *pm)
{
pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK;
}
void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
{
// Read register
u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
// Modify
u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup;
// Write back
pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK;
}
void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm)
{
while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK));
}
/*! \brief Sets the mode of the oscillator 1.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
* \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x).
*/
static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
// Read
u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
// Modify
u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode;
// Write
pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
}
void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm)
{
pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK);
}
void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1)
{
pm_set_osc1_mode(pm, (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :
AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3);
}
void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup)
{
pm_enable_clk1_no_wait(pm, startup);
pm_wait_for_clk1_ready(pm);
}
void pm_disable_clk1(volatile avr32_pm_t *pm)
{
pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK;
}
void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
{
// Read register
u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
// Modify
u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup;
// Write back
pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK;
}
void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm)
{
while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK));
}
/*! \brief Sets the mode of the 32-kHz oscillator.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
* \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x).
*/
static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
// Read
u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
// Modify
u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode;
// Write
pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
}
void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm)
{
pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK);
}
void pm_enable_osc32_crystal(volatile avr32_pm_t *pm)
{
pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL);
}
void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup)
{
pm_enable_clk32_no_wait(pm, startup);
pm_wait_for_clk32_ready(pm);
}
void pm_disable_clk32(volatile avr32_pm_t *pm)
{
pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK;
}
void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
{
// Read register
u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
// Modify
u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1;
u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup;
// Write back
pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
}
void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm)
{
while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK));
}
void pm_cksel(volatile avr32_pm_t *pm,
unsigned int pbadiv,
unsigned int pbasel,
unsigned int pbbdiv,
unsigned int pbbsel,
unsigned int hsbdiv,
unsigned int hsbsel)
{
u_avr32_pm_cksel_t u_avr32_pm_cksel = {0};
u_avr32_pm_cksel.CKSEL.cpusel = hsbsel;
u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv;
u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel;
u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv;
u_avr32_pm_cksel.CKSEL.pbasel = pbasel;
u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv;
u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel;
u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv;
pm->cksel = u_avr32_pm_cksel.cksel;
// Wait for ckrdy bit and then clear it
while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK));
}
void pm_gc_setup(volatile avr32_pm_t *pm,
unsigned int gc,
unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1)
unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1
unsigned int diven,
unsigned int div)
{
u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0};
u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc;
u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll;
u_avr32_pm_gcctrl.GCCTRL.diven = diven;
u_avr32_pm_gcctrl.GCCTRL.div = div;
pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl;
}
void pm_gc_enable(volatile avr32_pm_t *pm,
unsigned int gc)
{
pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK;
}
void pm_gc_disable(volatile avr32_pm_t *pm,
unsigned int gc)
{
pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK;
}
void pm_pll_setup(volatile avr32_pm_t *pm,
unsigned int pll,
unsigned int mul,
unsigned int div,
unsigned int osc,
unsigned int lockcount)
{
u_avr32_pm_pll_t u_avr32_pm_pll = {0};
u_avr32_pm_pll.PLL.pllosc = osc;
u_avr32_pm_pll.PLL.plldiv = div;
u_avr32_pm_pll.PLL.pllmul = mul;
u_avr32_pm_pll.PLL.pllcount = lockcount;
pm->pll[pll] = u_avr32_pm_pll.pll;
}
void pm_pll_set_option(volatile avr32_pm_t *pm,
unsigned int pll,
unsigned int pll_freq,
unsigned int pll_div2,
unsigned int pll_wbwdisable)
{
u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]};
u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2);
pm->pll[pll] = u_avr32_pm_pll.pll;
}
unsigned int pm_pll_get_option(volatile avr32_pm_t *pm,
unsigned int pll)
{
return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET;
}
void pm_pll_enable(volatile avr32_pm_t *pm,
unsigned int pll)
{
pm->pll[pll] |= AVR32_PM_PLLEN_MASK;
}
void pm_pll_disable(volatile avr32_pm_t *pm,
unsigned int pll)
{
pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK;
}
void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm)
{
while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK));
// Bypass the lock signal of the PLL
pm->pll[0] |= AVR32_PM_PLL0_PLLBPL_MASK;
}
void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm)
{
while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK));
// Bypass the lock signal of the PLL
pm->pll[1] |= AVR32_PM_PLL1_PLLBPL_MASK;
}
void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock)
{
// Read
u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl};
// Modify
u_avr32_pm_mcctrl.MCCTRL.mcsel = clock;
// Write back
pm->mcctrl = u_avr32_pm_mcctrl.mcctrl;
}
void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup)
{
pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode
pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal
pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0
}
void pm_bod_enable_irq(volatile avr32_pm_t *pm)
{
pm->ier = AVR32_PM_IER_BODDET_MASK;
}
void pm_bod_disable_irq(volatile avr32_pm_t *pm)
{
pm->idr = AVR32_PM_IDR_BODDET_MASK;
}
void pm_bod_clear_irq(volatile avr32_pm_t *pm)
{
pm->icr = AVR32_PM_ICR_BODDET_MASK;
}
unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm)
{
return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0);
}
unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm)
{
return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0);
}
unsigned long pm_bod_get_level(volatile avr32_pm_t *pm)
{
return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET;
}
void pm_write_gplp(volatile avr32_pm_t *pm,unsigned long gplp, unsigned long value)
{
pm->gplp[gplp] = value;
}
unsigned long pm_read_gplp(volatile avr32_pm_t *pm,unsigned long gplp)
{
return pm->gplp[gplp];
}

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Power Manager driver.
*
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _PM_H_
#define _PM_H_
#include <avr32/io.h>
#include "compiler.h"
#include "preprocessor.h"
/*! \brief Sets the MCU in the specified sleep mode.
*
* \param mode Sleep mode:
* \arg \c AVR32_PM_SMODE_IDLE: Idle;
* \arg \c AVR32_PM_SMODE_FROZEN: Frozen;
* \arg \c AVR32_PM_SMODE_STANDBY: Standby;
* \arg \c AVR32_PM_SMODE_STOP: Stop;
* \arg \c AVR32_PM_SMODE_SHUTDOWN: Shutdown (DeepStop);
* \arg \c AVR32_PM_SMODE_STATIC: Static.
*/
#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));}
/*! \brief Gets the MCU reset cause.
*
* \param pm Base address of the Power Manager instance (i.e. &AVR32_PM).
*
* \return The MCU reset cause which can be masked with the
* \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes.
*/
#if __GNUC__
__attribute__((__always_inline__))
#endif
extern __inline__ unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm)
{
return pm->rcause;
}
/*!
* \brief This function will enable the external clock mode of the oscillator 0.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the crystal mode of the oscillator 0.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param fosc0 Oscillator 0 crystal frequency (Hz)
*/
extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0);
/*!
* \brief This function will enable the oscillator 0 to be used with a startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 0 startup time. Time is expressed in term of RCOsc periods (3-bit value)
*/
extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will disable the oscillator 0.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_disable_clk0(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the oscillator 0 to be used with no startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 0 startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked.
*/
extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will wait until the Osc0 clock is ready.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the external clock mode of the oscillator 1.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the crystal mode of the oscillator 1.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param fosc1 Oscillator 1 crystal frequency (Hz)
*/
extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1);
/*!
* \brief This function will enable the oscillator 1 to be used with a startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 1 startup time. Time is expressed in term of RCOsc periods (3-bit value)
*/
extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will disable the oscillator 1.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_disable_clk1(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the oscillator 1 to be used with no startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 1 startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked.
*/
extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will wait until the Osc1 clock is ready.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the external clock mode of the 32-kHz oscillator.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the crystal mode of the 32-kHz oscillator.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the oscillator 32 to be used with a startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 32 kHz startup time. Time is expressed in term of RCOsc periods (3-bit value)
*/
extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will disable the oscillator 32.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_disable_clk32(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the oscillator 32 to be used with no startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 32 kHz startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked.
*/
extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will wait until the osc32 clock is ready.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm);
/*!
* \brief This function will select all the power manager clocks.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pbadiv Peripheral Bus A clock divisor enable
* \param pbasel Peripheral Bus A select
* \param pbbdiv Peripheral Bus B clock divisor enable
* \param pbbsel Peripheral Bus B select
* \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock)
* \param hsbsel High Speed Bus select (CPU clock = HSB clock )
*/
extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel);
/*!
* \brief This function will setup a generic clock.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param gc generic clock number (0 for gc0...)
* \param osc_or_pll Use OSC (=0) or PLL (=1)
* \param pll_osc Select Osc0/PLL0 or Osc1/PLL1
* \param diven Generic clock divisor enable
* \param div Generic clock divisor
*/
extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div);
/*!
* \brief This function will enable a generic clock.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param gc generic clock number (0 for gc0...)
*/
extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc);
/*!
* \brief This function will disable a generic clock.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param gc generic clock number (0 for gc0...)
*/
extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc);
/*!
* \brief This function will setup a PLL.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pll PLL number(0 for PLL0, 1 for PLL1)
* \param mul PLL MUL in the PLL formula
* \param div PLL DIV in the PLL formula
* \param osc OSC number (0 for osc0, 1 for osc1)
* \param lockcount PLL lockount
*/
extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount);
/*!
* \brief This function will set a PLL option.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pll PLL number(0 for PLL0, 1 for PLL1)
* \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
* \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
* \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
*/
extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable);
/*!
* \brief This function will get a PLL option.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pll PLL number(0 for PLL0, 1 for PLL1)
* \return Option
*/
extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll);
/*!
* \brief This function will enable a PLL.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pll PLL number(0 for PLL0, 1 for PLL1)
*/
extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll);
/*!
* \brief This function will disable a PLL.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pll PLL number(0 for PLL0, 1 for PLL1)
*/
extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll);
/*!
* \brief This function will wait for PLL0 locked
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm);
/*!
* \brief This function will wait for PLL1 locked
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm);
/*!
* \brief This function will switch the power manager main clock.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0.
*/
extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock);
/*!
* \brief Switch main clock to clock Osc0 (crystal mode)
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param fosc0 Oscillator 0 crystal frequency (Hz)
* \param startup Crystal 0 startup time. Time is expressed in term of RCOsc periods (3-bit value)
*/
extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup);
#endif // _PM_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief TC driver for AVR32 UC3.
*
* AVR32 Timer/Counter driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a TC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <avr32/io.h>
#include "compiler.h"
#include "tc.h"
int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return tc->channel[channel].imr;
}
int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// Enable the appropriate interrupts.
tc->channel[channel].ier = bitfield->etrgs << AVR32_TC_ETRGS_OFFSET |
bitfield->ldrbs << AVR32_TC_LDRBS_OFFSET |
bitfield->ldras << AVR32_TC_LDRAS_OFFSET |
bitfield->cpcs << AVR32_TC_CPCS_OFFSET |
bitfield->cpbs << AVR32_TC_CPBS_OFFSET |
bitfield->cpas << AVR32_TC_CPAS_OFFSET |
bitfield->lovrs << AVR32_TC_LOVRS_OFFSET |
bitfield->covfs << AVR32_TC_COVFS_OFFSET;
// Disable the appropriate interrupts.
tc->channel[channel].idr = (~bitfield->etrgs & 1) << AVR32_TC_ETRGS_OFFSET |
(~bitfield->ldrbs & 1) << AVR32_TC_LDRBS_OFFSET |
(~bitfield->ldras & 1) << AVR32_TC_LDRAS_OFFSET |
(~bitfield->cpcs & 1) << AVR32_TC_CPCS_OFFSET |
(~bitfield->cpbs & 1) << AVR32_TC_CPBS_OFFSET |
(~bitfield->cpas & 1) << AVR32_TC_CPAS_OFFSET |
(~bitfield->lovrs & 1) << AVR32_TC_LOVRS_OFFSET |
(~bitfield->covfs & 1) << AVR32_TC_COVFS_OFFSET;
return 0;
}
int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS || ext_clk_sig_src >= 1 << AVR32_TC_BMR_TC0XC0S_SIZE)
return TC_INVALID_ARGUMENT;
// Clear bit-field and set the correct behavior.
tc->bmr = (tc->bmr & ~(AVR32_TC_BMR_TC0XC0S_MASK << (channel * AVR32_TC_BMR_TC0XC0S_SIZE))) |
(ext_clk_sig_src << (channel * AVR32_TC_BMR_TC0XC0S_SIZE));
return 0;
}
int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt)
{
// Check for valid input.
if (opt->channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// MEASURE SIGNALS: Capture operating mode.
tc->channel[opt->channel].cmr = opt->ldrb << AVR32_TC_LDRB_OFFSET |
opt->ldra << AVR32_TC_LDRA_OFFSET |
0 << AVR32_TC_WAVE_OFFSET |
opt->cpctrg << AVR32_TC_CPCTRG_OFFSET |
opt->abetrg << AVR32_TC_ABETRG_OFFSET |
opt->etrgedg << AVR32_TC_ETRGEDG_OFFSET|
opt->ldbdis << AVR32_TC_LDBDIS_OFFSET |
opt->ldbstop << AVR32_TC_LDBSTOP_OFFSET |
opt->burst << AVR32_TC_BURST_OFFSET |
opt->clki << AVR32_TC_CLKI_OFFSET |
opt->tcclks << AVR32_TC_TCCLKS_OFFSET;
return 0;
}
int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt)
{
// Check for valid input.
if (opt->channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// GENERATE SIGNALS: Waveform operating mode.
tc->channel[opt->channel].cmr = opt->bswtrg << AVR32_TC_BSWTRG_OFFSET |
opt->beevt << AVR32_TC_BEEVT_OFFSET |
opt->bcpc << AVR32_TC_BCPC_OFFSET |
opt->bcpb << AVR32_TC_BCPB_OFFSET |
opt->aswtrg << AVR32_TC_ASWTRG_OFFSET |
opt->aeevt << AVR32_TC_AEEVT_OFFSET |
opt->acpc << AVR32_TC_ACPC_OFFSET |
opt->acpa << AVR32_TC_ACPA_OFFSET |
1 << AVR32_TC_WAVE_OFFSET |
opt->wavsel << AVR32_TC_WAVSEL_OFFSET |
opt->enetrg << AVR32_TC_ENETRG_OFFSET |
opt->eevt << AVR32_TC_EEVT_OFFSET |
opt->eevtedg << AVR32_TC_EEVTEDG_OFFSET |
opt->cpcdis << AVR32_TC_CPCDIS_OFFSET |
opt->cpcstop << AVR32_TC_CPCSTOP_OFFSET |
opt->burst << AVR32_TC_BURST_OFFSET |
opt->clki << AVR32_TC_CLKI_OFFSET |
opt->tcclks << AVR32_TC_TCCLKS_OFFSET;
return 0;
}
int tc_start(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// Enable, reset and start the selected timer/counter channel.
tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK | AVR32_TC_CLKEN_MASK;
return 0;
}
int tc_stop(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// Disable the selected timer/counter channel.
tc->channel[channel].ccr = AVR32_TC_CLKDIS_MASK;
return 0;
}
int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// Reset the selected timer/counter channel.
tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK;
return 0;
}
void tc_sync_trigger(volatile avr32_tc_t *tc)
{
// Reset all channels of the selected timer/counter.
tc->bcr = AVR32_TC_BCR_SYNC_MASK;
}
int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return tc->channel[channel].sr;
}
int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return Rd_bitfield(tc->channel[channel].cv, AVR32_TC_CV_MASK);
}
int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return Rd_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK);
}
int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return Rd_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK);
}
int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return Rd_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK);
}
int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// This function is only available in WAVEFORM mode.
if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
Wr_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK, value);
return value;
}
int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// This function is only available in WAVEFORM mode.
if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
Wr_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK, value);
return value;
}
int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// This function is only available in WAVEFORM mode.
if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
Wr_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK, value);
return value;
}

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Timer/Counter driver for AVR32 UC3.
*
* AVR32 Timer/Counter driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a TC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _TC_H_
#define _TC_H_
#include <avr32/io.h>
//! TC driver functions return value in case of invalid argument(s).
#define TC_INVALID_ARGUMENT (-1)
//! Number of timer/counter channels.
#define TC_NUMBER_OF_CHANNELS (sizeof(((avr32_tc_t *)0)->channel) / sizeof(avr32_tc_channel_t))
/*! \name External Clock Signal 0 Selection
*/
//! @{
#define TC_CH0_EXT_CLK0_SRC_TCLK0 AVR32_TC_TC0XC0S_TCLK0
#define TC_CH0_EXT_CLK0_SRC_NO_CLK AVR32_TC_TC0XC0S_NO_CLK
#define TC_CH0_EXT_CLK0_SRC_TIOA1 AVR32_TC_TC0XC0S_TIOA1
#define TC_CH0_EXT_CLK0_SRC_TIOA2 AVR32_TC_TC0XC0S_TIOA2
//! @}
/*! \name External Clock Signal 1 Selection
*/
//! @{
#define TC_CH1_EXT_CLK1_SRC_TCLK1 AVR32_TC_TC1XC1S_TCLK1
#define TC_CH1_EXT_CLK1_SRC_NO_CLK AVR32_TC_TC1XC1S_NO_CLK
#define TC_CH1_EXT_CLK1_SRC_TIOA0 AVR32_TC_TC1XC1S_TIOA0
#define TC_CH1_EXT_CLK1_SRC_TIOA2 AVR32_TC_TC1XC1S_TIOA2
//! @}
/*! \name External Clock Signal 2 Selection
*/
//! @{
#define TC_CH2_EXT_CLK2_SRC_TCLK2 AVR32_TC_TC2XC2S_TCLK2
#define TC_CH2_EXT_CLK2_SRC_NO_CLK AVR32_TC_TC2XC2S_NO_CLK
#define TC_CH2_EXT_CLK2_SRC_TIOA0 AVR32_TC_TC2XC2S_TIOA0
#define TC_CH2_EXT_CLK2_SRC_TIOA1 AVR32_TC_TC2XC2S_TIOA1
//! @}
/*! \name Event/Trigger Actions on Output
*/
//! @{
#define TC_EVT_EFFECT_NOOP AVR32_TC_NONE
#define TC_EVT_EFFECT_SET AVR32_TC_SET
#define TC_EVT_EFFECT_CLEAR AVR32_TC_CLEAR
#define TC_EVT_EFFECT_TOGGLE AVR32_TC_TOGGLE
//! @}
/*! \name RC Compare Trigger Enable
*/
//! @{
#define TC_NO_TRIGGER_COMPARE_RC 0
#define TC_TRIGGER_COMPARE_RC 1
//! @}
/*! \name Waveform Selection
*/
//! @{
#define TC_WAVEFORM_SEL_UP_MODE AVR32_TC_WAVSEL_UP_NO_AUTO
#define TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER AVR32_TC_WAVSEL_UP_AUTO
#define TC_WAVEFORM_SEL_UPDOWN_MODE AVR32_TC_WAVSEL_UPDOWN_NO_AUTO
#define TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER AVR32_TC_WAVSEL_UPDOWN_AUTO
//! @}
/*! \name TIOA or TIOB External Trigger Selection
*/
//! @{
#define TC_EXT_TRIG_SEL_TIOA 1
#define TC_EXT_TRIG_SEL_TIOB 0
//! @}
/*! \name External Event Selection
*/
//! @{
#define TC_EXT_EVENT_SEL_TIOB_INPUT AVR32_TC_EEVT_TIOB_INPUT
#define TC_EXT_EVENT_SEL_XC0_OUTPUT AVR32_TC_EEVT_XC0_OUTPUT
#define TC_EXT_EVENT_SEL_XC1_OUTPUT AVR32_TC_EEVT_XC1_OUTPUT
#define TC_EXT_EVENT_SEL_XC2_OUTPUT AVR32_TC_EEVT_XC2_OUTPUT
//! @}
/*! \name Edge Selection
*/
//! @{
#define TC_SEL_NO_EDGE AVR32_TC_EEVTEDG_NO_EDGE
#define TC_SEL_RISING_EDGE AVR32_TC_EEVTEDG_POS_EDGE
#define TC_SEL_FALLING_EDGE AVR32_TC_EEVTEDG_NEG_EDGE
#define TC_SEL_EACH_EDGE AVR32_TC_EEVTEDG_BOTH_EDGES
//! @}
/*! \name Burst Signal Selection
*/
//! @{
#define TC_BURST_NOT_GATED AVR32_TC_BURST_NOT_GATED
#define TC_BURST_CLK_AND_XC0 AVR32_TC_BURST_CLK_AND_XC0
#define TC_BURST_CLK_AND_XC1 AVR32_TC_BURST_CLK_AND_XC1
#define TC_BURST_CLK_AND_XC2 AVR32_TC_BURST_CLK_AND_XC2
//! @}
/*! \name Clock Invert
*/
//! @{
#define TC_CLOCK_RISING_EDGE 0
#define TC_CLOCK_FALLING_EDGE 1
//! @}
/*! \name Clock Selection
*/
//! @{
#define TC_CLOCK_SOURCE_TC1 AVR32_TC_TCCLKS_TIMER_DIV1_CLOCK
#define TC_CLOCK_SOURCE_TC2 AVR32_TC_TCCLKS_TIMER_DIV2_CLOCK
#define TC_CLOCK_SOURCE_TC3 AVR32_TC_TCCLKS_TIMER_DIV3_CLOCK
#define TC_CLOCK_SOURCE_TC4 AVR32_TC_TCCLKS_TIMER_DIV4_CLOCK
#define TC_CLOCK_SOURCE_TC5 AVR32_TC_TCCLKS_TIMER_DIV5_CLOCK
#define TC_CLOCK_SOURCE_XC0 AVR32_TC_TCCLKS_XC0
#define TC_CLOCK_SOURCE_XC1 AVR32_TC_TCCLKS_XC1
#define TC_CLOCK_SOURCE_XC2 AVR32_TC_TCCLKS_XC2
//! @}
//! Timer/counter interrupts.
typedef struct
{
unsigned int :24;
//! External trigger interrupt.
unsigned int etrgs : 1;
//! RB load interrupt.
unsigned int ldrbs : 1;
//! RA load interrupt.
unsigned int ldras : 1;
//! RC compare interrupt.
unsigned int cpcs : 1;
//! RB compare interrupt.
unsigned int cpbs : 1;
//! RA compare interrupt.
unsigned int cpas : 1;
//! Load overrun interrupt.
unsigned int lovrs : 1;
//! Counter overflow interrupt.
unsigned int covfs : 1;
} tc_interrupt_t;
//! Parameters when initializing a timer/counter in capture mode.
typedef struct
{
//! Channel to initialize.
unsigned int channel ;
unsigned int :12;
//! RB loading selection:\n
//! - \ref TC_SEL_NO_EDGE;\n
//! - \ref TC_SEL_RISING_EDGE;\n
//! - \ref TC_SEL_FALLING_EDGE;\n
//! - \ref TC_SEL_EACH_EDGE.
unsigned int ldrb : 2;
//! RA loading selection:\n
//! - \ref TC_SEL_NO_EDGE;\n
//! - \ref TC_SEL_RISING_EDGE;\n
//! - \ref TC_SEL_FALLING_EDGE;\n
//! - \ref TC_SEL_EACH_EDGE.
unsigned int ldra : 2;
unsigned int : 1;
//! RC compare trigger enable:\n
//! - \ref TC_NO_TRIGGER_COMPARE_RC;\n
//! - \ref TC_TRIGGER_COMPARE_RC.
unsigned int cpctrg : 1;
unsigned int : 3;
//! TIOA or TIOB external trigger selection:\n
//! - \ref TC_EXT_TRIG_SEL_TIOA;\n
//! - \ref TC_EXT_TRIG_SEL_TIOB.
unsigned int abetrg : 1;
//! External trigger edge selection:\n
//! - \ref TC_SEL_NO_EDGE;\n
//! - \ref TC_SEL_RISING_EDGE;\n
//! - \ref TC_SEL_FALLING_EDGE;\n
//! - \ref TC_SEL_EACH_EDGE.
unsigned int etrgedg : 2;
//! Counter clock disable with RB loading:\n
//! - \c FALSE;\n
//! - \c TRUE.
unsigned int ldbdis : 1;
//! Counter clock stopped with RB loading:\n
//! - \c FALSE;\n
//! - \c TRUE.
unsigned int ldbstop : 1;
//! Burst signal selection:\n
//! - \ref TC_BURST_NOT_GATED;\n
//! - \ref TC_BURST_CLK_AND_XC0;\n
//! - \ref TC_BURST_CLK_AND_XC1;\n
//! - \ref TC_BURST_CLK_AND_XC2.
unsigned int burst : 2;
//! Clock invert:\n
//! - \ref TC_CLOCK_RISING_EDGE;\n
//! - \ref TC_CLOCK_FALLING_EDGE.
unsigned int clki : 1;
//! Clock selection:\n
//! - \ref TC_CLOCK_SOURCE_TC1;\n
//! - \ref TC_CLOCK_SOURCE_TC2;\n
//! - \ref TC_CLOCK_SOURCE_TC3;\n
//! - \ref TC_CLOCK_SOURCE_TC4;\n
//! - \ref TC_CLOCK_SOURCE_TC5;\n
//! - \ref TC_CLOCK_SOURCE_XC0;\n
//! - \ref TC_CLOCK_SOURCE_XC1;\n
//! - \ref TC_CLOCK_SOURCE_XC2.
unsigned int tcclks : 3;
} tc_capture_opt_t;
//! Parameters when initializing a timer/counter in waveform mode.
typedef struct
{
//! Channel to initialize.
unsigned int channel ;
//! Software trigger effect on TIOB:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int bswtrg : 2;
//! External event effect on TIOB:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int beevt : 2;
//! RC compare effect on TIOB:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int bcpc : 2;
//! RB compare effect on TIOB:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int bcpb : 2;
//! Software trigger effect on TIOA:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int aswtrg : 2;
//! External event effect on TIOA:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int aeevt : 2;
//! RC compare effect on TIOA:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int acpc : 2;
//! RA compare effect on TIOA:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int acpa : 2;
unsigned int : 1;
//! Waveform selection:\n
//! - \ref TC_WAVEFORM_SEL_UP_MODE;\n
//! - \ref TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER;\n
//! - \ref TC_WAVEFORM_SEL_UPDOWN_MODE;\n
//! - \ref TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER.
unsigned int wavsel : 2;
//! External event trigger enable:\n
//! - \c FALSE;\n
//! - \c TRUE.
unsigned int enetrg : 1;
//! External event selection:\n
//! - \ref TC_EXT_EVENT_SEL_TIOB_INPUT;\n
//! - \ref TC_EXT_EVENT_SEL_XC0_OUTPUT;\n
//! - \ref TC_EXT_EVENT_SEL_XC1_OUTPUT;\n
//! - \ref TC_EXT_EVENT_SEL_XC2_OUTPUT.
unsigned int eevt : 2;
//! External event edge selection:\n
//! - \ref TC_SEL_NO_EDGE;\n
//! - \ref TC_SEL_RISING_EDGE;\n
//! - \ref TC_SEL_FALLING_EDGE;\n
//! - \ref TC_SEL_EACH_EDGE.
unsigned int eevtedg : 2;
//! Counter clock disable with RC compare:\n
//! - \c FALSE;\n
//! - \c TRUE.
unsigned int cpcdis : 1;
//! Counter clock stopped with RC compare:\n
//! - \c FALSE;\n
//! - \c TRUE.
unsigned int cpcstop : 1;
//! Burst signal selection:\n
//! - \ref TC_BURST_NOT_GATED;\n
//! - \ref TC_BURST_CLK_AND_XC0;\n
//! - \ref TC_BURST_CLK_AND_XC1;\n
//! - \ref TC_BURST_CLK_AND_XC2.
unsigned int burst : 2;
//! Clock invert:\n
//! - \ref TC_CLOCK_RISING_EDGE;\n
//! - \ref TC_CLOCK_FALLING_EDGE.
unsigned int clki : 1;
//! Clock selection:\n
//! - \ref TC_CLOCK_SOURCE_TC1;\n
//! - \ref TC_CLOCK_SOURCE_TC2;\n
//! - \ref TC_CLOCK_SOURCE_TC3;\n
//! - \ref TC_CLOCK_SOURCE_TC4;\n
//! - \ref TC_CLOCK_SOURCE_TC5;\n
//! - \ref TC_CLOCK_SOURCE_XC0;\n
//! - \ref TC_CLOCK_SOURCE_XC1;\n
//! - \ref TC_CLOCK_SOURCE_XC2.
unsigned int tcclks : 3;
} tc_waveform_opt_t;
/*! \brief Reads timer/counter interrupt settings.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 The interrupt enable configuration organized according to \ref tc_interrupt_t.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Enables various timer/counter interrupts.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
* \param bitfield The interrupt enable configuration.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield);
/*! \brief Selects which external clock to use and how to configure it.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
* \param ext_clk_sig_src External clock signal selection:
* \arg \c TC_CH0_EXT_CLK0_SRC_TCLK0;
* \arg \c TC_CH0_EXT_CLK0_SRC_NO_CLK;
* \arg \c TC_CH0_EXT_CLK0_SRC_TIOA1;
* \arg \c TC_CH0_EXT_CLK0_SRC_TIOA2;
* \arg \c TC_CH1_EXT_CLK1_SRC_TCLK1;
* \arg \c TC_CH1_EXT_CLK1_SRC_NO_CLK;
* \arg \c TC_CH1_EXT_CLK1_SRC_TIOA0;
* \arg \c TC_CH1_EXT_CLK1_SRC_TIOA2;
* \arg \c TC_CH2_EXT_CLK2_SRC_TCLK2;
* \arg \c TC_CH2_EXT_CLK2_SRC_NO_CLK;
* \arg \c TC_CH2_EXT_CLK2_SRC_TIOA0;
* \arg \c TC_CH2_EXT_CLK2_SRC_TIOA1.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src);
/*! \brief Sets options for timer/counter capture initialization.
*
* \param tc Pointer to the TC instance to access.
* \param opt Options for capture mode.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt);
/*! \brief Sets options for timer/counter waveform initialization.
*
* \param tc Pointer to the TC instance to access.
* \param opt Options for waveform generation.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt);
/*! \brief Starts a timer/counter.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_start(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Stops a timer/counter.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_stop(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Performs a software trigger: the counter is reset and the clock is started.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Asserts a SYNC signal to generate a software trigger and reset all channels.
*
* \param tc Pointer to the TC instance to access.
*/
extern void tc_sync_trigger(volatile avr32_tc_t *tc);
/*! \brief Reads the status register.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 Status register value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Reads the channel's TC counter and returns the value.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 TC counter value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Reads the channel's RA register and returns the value.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 RA register value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Reads the channel's RB register and returns the value.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 RB register value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Reads the channel's RC register and returns the value.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 RC register value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Writes a value to the channel's RA register.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
* \param value Value to write to the RA register.
*
* \retval >=0 Written value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);
/*! \brief Writes a value to the channel's RB register.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
* \param value Value to write to the RB register.
*
* \retval >=0 Written value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);
/*! \brief Writes a value to the channel's RC register.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
* \param value Value to write to the RC register.
*
* \retval >=0 Written value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);
#endif // _TC_H_

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FreeRTOS/Demo/lwIP_AVR32_UC3/DRIVERS/USART/usart.c Normal file
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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief USART driver for AVR32 UC3.
*
* This file contains basic functions for the AVR32 USART, with support for all
* modes, settings and clock speeds.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a USART module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "usart.h"
//------------------------------------------------------------------------------
/*! \name Private Functions
*/
//! @{
/*! \brief Checks if the USART is in multidrop mode.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if the USART is in multidrop mode, otherwise \c 0.
*/
#if __GNUC__
__attribute__((__always_inline__))
#endif
static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart)
{
return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI;
}
/*! \brief Calculates a clock divider (\e CD) that gets the USART as close to a
* wanted baudrate as possible.
*
* \todo manage the FP fractal part to avoid big errors
*
* Baudrate calculation:
* \f$ baudrate = \frac{Selected Clock}{16 \times CD} \f$ with 16x oversampling or
* \f$ baudrate = \frac{Selected Clock}{8 \times CD} \f$ with 8x oversampling or
* \f$ baudrate = \frac{Selected Clock}{CD} \f$ with SYNC bit set to allow high speed.
*
* \param usart Base address of the USART instance.
* \param baudrate Wanted baudrate.
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Baudrate successfully initialized.
* \retval USART_INVALID_INPUT Wanted baudrate is impossible with given clock speed.
*/
static int usart_set_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, long pba_hz)
{
// Clock divider.
int cd;
// Baudrate calculation.
if (baudrate < pba_hz / 16)
{
// Use 16x oversampling, clear SYNC bit.
usart->mr &=~ (AVR32_USART_MR_OVER_MASK | AVR32_USART_MR_SYNC_MASK);
cd = (pba_hz + 8 * baudrate) / (16 * baudrate);
if ((cd >65535)) return USART_INVALID_INPUT;
}
else if (baudrate < pba_hz / 8)
{
// Use 8x oversampling.
usart->mr |= AVR32_USART_MR_OVER_MASK;
// clear SYNC bit
usart->mr &=~ AVR32_USART_MR_SYNC_MASK;
cd = (pba_hz + 4 * baudrate) / (8 * baudrate);
if ((cd < 1)||(cd >65535)) return USART_INVALID_INPUT;
}
else
{
// set SYNC to 1
usart->mr |= AVR32_USART_MR_SYNC_MASK;
// use PBA/BaudRate
cd = (pba_hz / baudrate);
}
usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
return USART_SUCCESS;
}
//! @}
//------------------------------------------------------------------------------
/*! \name Initialization Functions
*/
//! @{
void usart_reset(volatile avr32_usart_t *usart)
{
// Disable all USART interrupts.
// Interrupts needed should be set explicitly on every reset.
usart->idr = 0xFFFFFFFF;
// Reset mode and other registers that could cause unpredictable behavior after reset.
usart->mr = 0;
usart->rtor = 0;
usart->ttgr = 0;
// Shutdown TX and RX (will be re-enabled when setup has successfully completed),
// reset status bits and turn off DTR and RTS.
usart->cr = AVR32_USART_CR_RSTRX_MASK |
AVR32_USART_CR_RSTTX_MASK |
AVR32_USART_CR_RSTSTA_MASK |
AVR32_USART_CR_RSTIT_MASK |
AVR32_USART_CR_RSTNACK_MASK |
AVR32_USART_CR_DTRDIS_MASK |
AVR32_USART_CR_RTSDIS_MASK;
}
int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
{
// Reset the USART and shutdown TX and RX.
usart_reset(usart);
// Check input values.
if (!opt) // Null pointer.
return USART_INVALID_INPUT;
if (opt->charlength < 5 || opt->charlength > 9 ||
opt->paritytype > 7 ||
opt->stopbits > 2 + 255 ||
opt->channelmode > 3)
return USART_INVALID_INPUT;
if (usart_set_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
if (opt->charlength == 9)
{
// Character length set to 9 bits. MODE9 dominates CHRL.
usart->mr |= AVR32_USART_MR_MODE9_MASK;
}
else
{
// CHRL gives the character length (- 5) when MODE9 = 0.
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
}
usart->mr |= (opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET) |
(opt->paritytype << AVR32_USART_MR_PAR_OFFSET);
if (opt->stopbits > USART_2_STOPBITS)
{
// Set two stop bits
usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
// and a timeguard period gives the rest.
usart->ttgr = opt->stopbits - USART_2_STOPBITS;
}
else
// Insert 1, 1.5 or 2 stop bits.
usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
// Setup complete; enable communication.
// Enable input and output.
usart->cr |= AVR32_USART_CR_TXEN_MASK |
AVR32_USART_CR_RXEN_MASK;
return USART_SUCCESS;
}
int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
{
// First: Setup standard RS232.
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
// Clear previous mode.
usart->mr &= ~AVR32_USART_MR_MODE_MASK;
// Hardware handshaking.
usart->mr |= USART_MODE_HW_HSH << AVR32_USART_MR_MODE_OFFSET;
return USART_SUCCESS;
}
int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
long pba_hz, unsigned char irda_filter)
{
// First: Setup standard RS232.
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
// Set IrDA counter.
usart->ifr = irda_filter;
// Activate "low-pass filtering" of input.
usart->mr |= AVR32_USART_MR_FILTER_MASK;
return USART_SUCCESS;
}
int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
{
// First: Setup standard RS232.
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
// Clear previous mode.
usart->mr &= ~AVR32_USART_MR_MODE_MASK;
// Set modem mode.
usart->mr |= USART_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET;
return USART_SUCCESS;
}
int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
{
// First: Setup standard RS232.
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
// Clear previous mode.
usart->mr &= ~AVR32_USART_MR_MODE_MASK;
// Set RS485 mode.
usart->mr |= USART_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET;
return USART_SUCCESS;
}
int usart_init_iso7816(volatile avr32_usart_t *usart, const iso7816_options_t *opt, int t, long pba_hz)
{
// Reset the USART and shutdown TX and RX.
usart_reset(usart);
// Check input values.
if (!opt) // Null pointer.
return USART_INVALID_INPUT;
if (t == 0)
{
// Set USART mode to ISO7816, T=0.
// The T=0 protocol always uses 2 stop bits.
usart->mr = (USART_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET) |
(AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET) |
(opt->bit_order << AVR32_USART_MR_MSBF_OFFSET); // Allow MSBF in T=0.
}
else if (t == 1)
{
// Only LSB first in the T=1 protocol.
// max_iterations field is only used in T=0 mode.
if (opt->bit_order != 0 ||
opt->max_iterations != 0)
return USART_INVALID_INPUT;
// Set USART mode to ISO7816, T=1.
// The T=1 protocol always uses 1 stop bit.
usart->mr = (USART_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET) |
(AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET);
}
else
return USART_INVALID_INPUT;
if (usart_set_baudrate(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
// Set FIDI register: bit rate = selected clock/FI_DI_ratio/16.
usart->fidi = opt->fidi_ratio;
// Set ISO7816 spesific options in the MODE register.
usart->mr |= (opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET) |
(opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET) |
(opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET) |
AVR32_USART_MR_CLKO_MASK; // Enable clock output.
// Setup complete; enable input.
// Leave TX disabled for now.
usart->cr |= AVR32_USART_CR_RXEN_MASK;
return USART_SUCCESS;
}
//! @}
//------------------------------------------------------------------------------
/*! \name Transmit/Receive Functions
*/
//! @{
int usart_send_address(volatile avr32_usart_t *usart, int address)
{
// Check if USART is in multidrop / RS485 mode.
if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT;
// Prepare to send an address.
usart->cr |= AVR32_USART_CR_SENDA_MASK;
// Write the address to TX.
usart_bw_write_char(usart, address);
return USART_SUCCESS;
}
int usart_write_char(volatile avr32_usart_t *usart, int c)
{
if (usart->csr & AVR32_USART_CSR_TXRDY_MASK)
{
usart->thr = c;
return USART_SUCCESS;
}
else
return USART_TX_BUSY;
}
int usart_putchar(volatile avr32_usart_t *usart, int c)
{
int timeout = USART_DEFAULT_TIMEOUT;
if (c == '\n')
{
do
{
if (!timeout--) return USART_FAILURE;
} while (usart_write_char(usart, '\r') != USART_SUCCESS);
timeout = USART_DEFAULT_TIMEOUT;
}
do
{
if (!timeout--) return USART_FAILURE;
} while (usart_write_char(usart, c) != USART_SUCCESS);
return USART_SUCCESS;
}
int usart_read_char(volatile avr32_usart_t *usart, int *c)
{
// Check for errors: frame, parity and overrun. In RS485 mode, a parity error
// would mean that an address char has been received.
if (usart->csr & (AVR32_USART_CSR_OVRE_MASK |
AVR32_USART_CSR_FRAME_MASK |
AVR32_USART_CSR_PARE_MASK))
return USART_RX_ERROR;
// No error; if we really did receive a char, read it and return SUCCESS.
if (usart->csr & AVR32_USART_CSR_RXRDY_MASK)
{
*c = (unsigned short)usart->rhr;
return USART_SUCCESS;
}
else
return USART_RX_EMPTY;
}
int usart_getchar(volatile avr32_usart_t *usart)
{
int c, ret;
while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY);
if (ret == USART_RX_ERROR)
return USART_FAILURE;
return c;
}
void usart_write_line(volatile avr32_usart_t *usart, const char *string)
{
while (*string != '\0')
usart_putchar(usart, *string++);
}
int usart_get_echo_line(volatile avr32_usart_t *usart)
{
int rx_char;
int retval = USART_SUCCESS;
while (1)
{
rx_char = usart_getchar(usart);
if (rx_char == USART_FAILURE)
{
usart_write_line(usart, "Error!!!\n");
break;
}
if (rx_char == '\x03')
{
retval = USART_FAILURE;
break;
}
usart_putchar(usart, rx_char);
if (rx_char == '\r')
{
usart_putchar(usart, '\n');
break;
}
}
return retval;
}
//! @}

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@ -0,0 +1,475 @@
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief USART driver for AVR32 UC3.
*
* This file contains basic functions for the AVR32 USART, with support for all
* modes, settings and clock speeds.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a USART module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _USART_H_
#define _USART_H_
#include <avr32/io.h>
#include "compiler.h"
/*! \name Return Values
*/
//! @{
#define USART_SUCCESS 0 //!< Successful completion.
#define USART_FAILURE -1 //!< Failure because of some unspecified reason.
#define USART_INVALID_INPUT 1 //!< Input value out of range.
#define USART_INVALID_ARGUMENT -1 //!< Argument value out of range.
#define USART_TX_BUSY 2 //!< Transmitter was busy.
#define USART_RX_EMPTY 3 //!< Nothing was received.
#define USART_RX_ERROR 4 //!< Transmission error occurred.
#define USART_MODE_FAULT 5 //!< USART not in the appropriate mode.
//! @}
//! Default time-out value (number of attempts).
#define USART_DEFAULT_TIMEOUT 10000
/*! \name Parity Settings
*/
//! @{
#define USART_EVEN_PARITY AVR32_USART_MR_PAR_EVEN //!< Use even parity on character transmission.
#define USART_ODD_PARITY AVR32_USART_MR_PAR_ODD //!< Use odd parity on character transmission.
#define USART_SPACE_PARITY AVR32_USART_MR_PAR_SPACE //!< Use a space as parity bit.
#define USART_MARK_PARITY AVR32_USART_MR_PAR_MARK //!< Use a mark as parity bit.
#define USART_NO_PARITY AVR32_USART_MR_PAR_NONE //!< Don't use a parity bit.
#define USART_MULTIDROP_PARITY AVR32_USART_MR_PAR_MULTI //!< Parity bit is used to flag address characters.
//! @}
/*! \name Operating Modes
*/
//! @{
#define USART_MODE_NORMAL AVR32_USART_MR_MODE_NORMAL //!< Normal RS232 mode.
#define USART_MODE_RS485 AVR32_USART_MR_MODE_RS485 //!< RS485 mode.
#define USART_MODE_HW_HSH AVR32_USART_MR_MODE_HARDWARE //!< RS232 mode with hardware handshaking.
#define USART_MODE_MODEM AVR32_USART_MR_MODE_MODEM //!< Modem mode.
#define USART_MODE_ISO7816_T0 AVR32_USART_MR_MODE_ISO7816_T0 //!< ISO7816, T = 0 mode.
#define USART_MODE_ISO7816_T1 AVR32_USART_MR_MODE_ISO7816_T1 //!< ISO7816, T = 1 mode.
#define USART_MODE_IRDA AVR32_USART_MR_MODE_IRDA //!< IrDA mode.
#define USART_MODE_SW_HSH AVR32_USART_MR_MODE_SOFTWARE //!< RS232 mode with software handshaking.
//! @}
/*! \name Channel Modes
*/
//! @{
#define USART_NORMAL_CHMODE AVR32_USART_MR_CHMODE_NORMAL //!< Normal communication.
#define USART_AUTO_ECHO AVR32_USART_MR_CHMODE_ECHO //!< Echo data.
#define USART_LOCAL_LOOPBACK AVR32_USART_MR_CHMODE_LOCAL_LOOP //!< Local loopback.
#define USART_REMOTE_LOOPBACK AVR32_USART_MR_CHMODE_REMOTE_LOOP //!< Remote loopback.
//! @}
/*! \name Stop Bits Settings
*/
//! @{
#define USART_1_STOPBIT AVR32_USART_MR_NBSTOP_1 //!< Use 1 stop bit.
#define USART_1_5_STOPBITS AVR32_USART_MR_NBSTOP_1_5 //!< Use 1.5 stop bits.
#define USART_2_STOPBITS AVR32_USART_MR_NBSTOP_2 //!< Use 2 stop bits (for more, just give the number of bits).
//! @}
//! Input parameters when initializing RS232 and similar modes.
typedef struct
{
//! Set baudrate of the USART.
unsigned long baudrate;
//! Number of bits to transmit as a character (5 to 9).
unsigned char charlength;
//! How to calculate the parity bit: \ref USART_EVEN_PARITY, \ref USART_ODD_PARITY,
//! \ref USART_SPACE_PARITY, \ref USART_MARK_PARITY, \ref USART_NO_PARITY or
//! \ref USART_MULTIDROP_PARITY.
unsigned char paritytype;
//! Number of stop bits between two characters: \ref USART_1_STOPBIT,
//! \ref USART_1_5_STOPBITS, \ref USART_2_STOPBITS or any number from 3 to 257
//! which will result in a time guard period of that length between characters.
unsigned short stopbits;
//! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
//! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
unsigned char channelmode;
} usart_options_t;
//! Input parameters when initializing ISO7816 modes.
typedef struct
{
//! Set the frequency of the ISO7816 clock.
unsigned long iso7816_hz;
//! The number of ISO7816 clock ticks in every bit period (1 to 2047, 0 = disable clock).
//! Bit rate = \ref iso7816_hz / \ref fidi_ratio.
unsigned short fidi_ratio;
//! Inhibit Non Acknowledge:\n
//! - 0: the NACK is generated;\n
//! - 1: the NACK is not generated.
//!
//! \note This bit will be used only in ISO7816 mode, protocol T = 0 receiver.
int inhibit_nack;
//! Disable successive NACKs.
//! Successive parity errors are counted up to the value in the \ref max_iterations field.
//! These parity errors generate a NACK on the ISO line. As soon as this value is reached,
//! no addititional NACK is sent on the ISO line. The ITERATION flag is asserted.
int dis_suc_nack;
//! Max number of repetitions (0 to 7).
unsigned char max_iterations;
//! Bit order in transmitted characters:\n
//! - 0: LSB first;\n
//! - 1: MSB first.
int bit_order;
} iso7816_options_t;
//! Input parameters when initializing ISO7816 modes.
typedef struct
{
//! Set the frequency of the SPI clock.
unsigned long baudrate;
//! Number of bits to transmit as a character (5 to 9).
unsigned char charlength;
//! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
//! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
unsigned char channelmode;
//! Which SPI mode to use when transmitting.
unsigned char spimode;
} usart_spi_options_t;
//------------------------------------------------------------------------------
/*! \name Initialization Functions
*/
//! @{
/*! \brief Resets the USART and disables TX and RX.
*
* \param usart Base address of the USART instance.
*/
extern void usart_reset(volatile avr32_usart_t *usart);
/*! \brief Sets up the USART to use the standard RS232 protocol.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use hardware handshaking.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*
* \note \ref usart_init_rs232 does not need to be invoked before this function.
*/
extern int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use the IrDA protocol.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
* \param irda_filter Counter used to distinguish received ones from zeros.
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
long pba_hz, unsigned char irda_filter);
/*! \brief Sets up the USART to use the modem protocol, activating dedicated inputs/outputs.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use the RS485 protocol.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use the ISO7816 T=0 or T=1 smartcard protocols.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up ISO7816 communication (see \ref iso7816_options_t).
* \param t ISO7816 mode to use (T=0 or T=1).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_iso7816(volatile avr32_usart_t *usart, const iso7816_options_t *opt, int t, long pba_hz);
/*! \brief Sets up the USART to use the SPI mode as master.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use the SPI mode as slave.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
//! @}
//------------------------------------------------------------------------------
/*! \brief Selects slave chip.
*
* \param usart Base address of the USART instance.
*
* \return Status.
* \retval USART_SUCCESS Success.
*/
extern int usart_spi_selectChip(volatile avr32_usart_t *usart);
/*! \brief Unselects slave chip.
*
* \param usart Base address of the USART instance.
*
* \return Status.
* \retval USART_SUCCESS Success.
* \retval USART_FAILURE Time out.
*/
extern int usart_spi_unselectChip(volatile avr32_usart_t *usart);
//------------------------------------------------------------------------------
/*! \name Read and Reset Error Status Bits
*/
//! @{
/*! \brief Resets the error status.
*
* This function resets the status bits indicating that a parity error,
* framing error or overrun has occurred. The RXBRK bit, indicating
* a start/end of break condition on the RX line, is also reset.
*
* \param usart Base address of the USART instance.
*/
#if __GNUC__
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_reset_status(volatile avr32_usart_t *usart)
{
usart->cr |= AVR32_USART_CR_RSTSTA_MASK;
}
/*! \brief Checks if a parity error has occurred since last status reset.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if a parity error has been detected, otherwise \c 0.
*/
#if __GNUC__
__attribute__((__always_inline__))
#endif
extern __inline__ int usart_parity_error(volatile avr32_usart_t *usart)
{
return (usart->csr & AVR32_USART_CSR_PARE_MASK) != 0;
}
/*! \brief Checks if a framing error has occurred since last status reset.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if a framing error has been detected, otherwise \c 0.
*/
#if __GNUC__
__attribute__((__always_inline__))
#endif
extern __inline__ int usart_framing_error(volatile avr32_usart_t *usart)
{
return (usart->csr & AVR32_USART_CSR_FRAME_MASK) != 0;
}
/*! \brief Checks if an overrun error has occurred since last status reset.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if a overrun error has been detected, otherwise \c 0.
*/
#if __GNUC__
__attribute__((__always_inline__))
#endif
extern __inline__ int usart_overrun_error(volatile avr32_usart_t *usart)
{
return (usart->csr & AVR32_USART_CSR_OVRE_MASK) != 0;
}
//! @}
//------------------------------------------------------------------------------
/*! \name Transmit/Receive Functions
*/
//! @{
/*! \brief Addresses a receiver.
*
* While in RS485 mode, receivers only accept data addressed to them.
* A packet/char with the address tag set has to precede any data.
* This function is used to address a receiver. This receiver should read
* all the following data, until an address packet addresses another receiver.
*
* \param usart Base address of the USART instance.
* \param address Address of the target device.
*
* \retval USART_SUCCESS Address successfully sent (if current mode is RS485).
* \retval USART_MODE_FAULT Wrong operating mode.
*/
extern int usart_send_address(volatile avr32_usart_t *usart, int address);
/*! \brief Writes the given character to the TX buffer if the transmitter is ready.
*
* \param usart Base address of the USART instance.
* \param c The character (up to 9 bits) to transmit.
*
* \retval USART_SUCCESS The transmitter was ready.
* \retval USART_TX_BUSY The transmitter was busy.
*/
extern int usart_write_char(volatile avr32_usart_t *usart, int c);
/*! \brief An active wait writing a character to the USART.
*
* \param usart Base address of the USART instance.
* \param c The character (up to 9 bits) to transmit.
*/
#if __GNUC__
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_bw_write_char(volatile avr32_usart_t *usart, int c)
{
while (usart_write_char(usart, c) != USART_SUCCESS);
}
/*! \brief Sends a character with the USART.
*
* \param usart Base address of the USART instance.
* \param c Character to write.
*
* \retval USART_SUCCESS The character was written.
* \retval USART_FAILURE The function timed out before the USART transmitter became ready to send.
*/
extern int usart_putchar(volatile avr32_usart_t *usart, int c);
/*! \brief Checks the RX buffer for a received character, and stores it at the
* given memory location.
*
* \param usart Base address of the USART instance.
* \param c Pointer to the where the read character should be stored
* (must be at least short in order to accept 9-bit characters).
*
* \retval USART_SUCCESS The character was read successfully.
* \retval USART_RX_EMPTY The RX buffer was empty.
* \retval USART_RX_ERROR An error was deteceted.
*/
extern int usart_read_char(volatile avr32_usart_t *usart, int *c);
/*! \brief Waits until a character is received, and returns it.
*
* \param usart Base address of the USART instance.
*
* \return The received character, or \ref USART_FAILURE upon error.
*/
extern int usart_getchar(volatile avr32_usart_t *usart);
/*! \brief Writes one character string to the USART.
*
* \param usart Base address of the USART instance.
* \param string String to be written.
*/
extern void usart_write_line(volatile avr32_usart_t *usart, const char *string);
/*! \brief Gets and echoes characters until end of line.
*
* \param usart Base address of the USART instance.
*
* \retval USART_SUCCESS Success.
* \retval USART_FAILURE ETX character received.
*/
extern int usart_get_echo_line(volatile avr32_usart_t *usart);
//! @}
#endif // _USART_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief FreeRTOS and lwIP example for AVR32 UC3.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include "board.h"
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( 48000000 ) /* Hz clk gen */
#define configPBA_CLOCK_HZ ( 24000000 )
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 8 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 256 )
/* configTOTAL_HEAP_SIZE is not used when heap_3.c is used. */
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 1024*25 ) )
#define configMAX_TASK_NAME_LEN ( 20 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 0 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_xTaskGetSchedulerState 0
/* configTICK_USE_TC is a boolean indicating whether to use a Timer Counter
for the tick generation. Timer Counter will generate an accurate Tick;
otherwise the CPU will generate a tick but with time drift.
configTICK_TC_CHANNEL is the TC channel. */
#define configTICK_USE_TC 1
#define configTICK_TC_CHANNEL 2
/* configHEAP_INIT is a boolean indicating whether to initialize the heap with
0xA5 in order to be able to determine the maximal heap consumption. */
#define configHEAP_INIT 0
#endif /* FREERTOS_CONFIG_H */

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Basic SMTP Client for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
Implements a simplistic SMTP client. First time the task is started, connection is made and
email is sent. Mail flag is then reset. Each time you press the Push Button 0, a new mail will be sent.
*/
#if (SMTP_USED == 1)
#include <string.h>
// Scheduler includes.
#include "FreeRTOS.h"
#include "task.h"
#include "BasicSMTP.h"
// Demo includes.
#include "portmacro.h"
#include "partest.h"
#include "intc.h"
#include "gpio.h"
// lwIP includes.
#include "lwip/api.h"
#include "lwip/tcpip.h"
#include "lwip/memp.h"
#include "lwip/stats.h"
#include "lwip/opt.h"
#include "lwip/api.h"
#include "lwip/arch.h"
#include "lwip/sys.h"
#include "lwip/sockets.h"
#include "netif/loopif.h"
//! SMTP default port
#define SMTP_PORT 25
//! SMTP EHLO code answer
#define SMTP_EHLO_STRING "220"
//! SMTP end of transmission code answer
#define SMTP_END_OF_TRANSMISSION_STRING "221"
//! SMTP OK code answer
#define SMTP_OK_STRING "250"
//! SMTP start of transmission code answer
#define SMTP_START_OF_TRANSMISSION_STRING "354"
//! SMTP DATA<CRLF>
#define SMTP_DATA_STRING "DATA\r\n"
//! SMTP <CRLF>.<CRLF>
#define SMTP_MAIL_END_STRING "\r\n.\r\n"
//! SMTP QUIT<CRLFCRLF>
#define SMTP_QUIT_STRING "QUIT\r\n"
//! Server address
#error configure SMTP server address
portCHAR cServer[] = "192.168.0.1";
//! Fill here the mailfrom with your mail address
#error configure SMTP mail sender
char cMailfrom[] = "MAIL FROM: <sender@domain.com>\r\n";
//! Fill here the mailto with your contact mail address
#error configure SMTP mail recipient
char cMailto[] = "RCPT TO: <recipient@domain.com>\r\n";
//! Fill here the mailcontent with the mail you want to send
#error configure SMTP mail content
char cMailcontent[] ="Subject: *** SPAM ***\r\nFROM: \"Your Name here\" <sender@domain.com>\r\nTO: \"Your Contact here\" <recipient@domain.com>\r\n\r\nSay what you want here.";
//! flag to send mail
Bool bSendMail = pdFALSE;
//! buffer for SMTP response
portCHAR cTempBuffer[200];
//_____ D E C L A R A T I O N S ____________________________________________
//! interrupt handler.
#if __GNUC__
__attribute__((naked))
#elif __ICCAVR32__
#pragma shadow_registers = full // Naked.
#endif
void vpushb_ISR( void );
//! soft interrupt handler. where treatment should be done
#if __GNUC__
__attribute__((__noinline__))
#endif
static portBASE_TYPE prvpushb_ISR_NonNakedBehaviour( void );
//! Basic SMTP client task definition
portTASK_FUNCTION( vBasicSMTPClient, pvParameters )
{
struct sockaddr_in stServeurSockAddr;
portLONG lRetval;
portLONG lSocket = -1;
// configure push button 0 to produce IT on falling edge
gpio_enable_pin_interrupt(GPIO_PUSH_BUTTON_0 , GPIO_FALLING_EDGE);
// Disable all interrupts
vPortEnterCritical();
// register push button 0 handler on level 3
INTC_register_interrupt( (__int_handler)&vpushb_ISR, AVR32_GPIO_IRQ_0 + (GPIO_PUSH_BUTTON_0/8), INT3);
// Enable all interrupts
vPortExitCritical();
for (;;)
{
// wait for a signal to send a mail
while (bSendMail != pdTRUE) vTaskDelay(200);
// Disable all interrupts
vPortEnterCritical();
// clear the flag
bSendMail = pdFALSE;
// Enable all interrupts
vPortExitCritical();
// clear the LED
vParTestSetLED( 3 , pdFALSE );
// Set up port
memset(&stServeurSockAddr, 0, sizeof(stServeurSockAddr));
stServeurSockAddr.sin_len = sizeof(stServeurSockAddr);
stServeurSockAddr.sin_addr.s_addr = inet_addr(cServer);
stServeurSockAddr.sin_port = htons(SMTP_PORT);
stServeurSockAddr.sin_family = AF_INET;
// socket as a stream
if ( (lSocket = socket(AF_INET, SOCK_STREAM, 0)) < 0)
{
// socket failed, blink a LED and stay here
for (;;) {
vParTestToggleLED( 4 );
vTaskDelay( 200 );
}
}
// connect to the server
if(connect(lSocket,(struct sockaddr *)&stServeurSockAddr, sizeof(stServeurSockAddr)) < 0)
{
// connect failed, blink a LED and stay here
for (;;) {
vParTestToggleLED( 6 );
vTaskDelay( 200 );
}
}
else
{
//Server: 220 SMTP Ready
// wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
}while (lRetval <= 0);
if (strncmp(cTempBuffer, SMTP_EHLO_STRING, sizeof(cTempBuffer)) >= 0)
{
//Client: EHLO smtp.domain.com
// send ehlo
send(lSocket, "HELO ", 5, 0);
send(lSocket, cServer, strlen(cServer), 0);
send(lSocket, "\r\n", 2, 0);
//Server: 250
// wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
}while (lRetval <= 0);
if (strncmp(cTempBuffer, SMTP_OK_STRING, sizeof(cTempBuffer)) >= 0)
{
//Client: MAIL FROM:<sender@domain.com>
// send MAIL FROM
send(lSocket, cMailfrom, strlen(cMailfrom), 0);
//Server: 250 OK
// wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
}while (lRetval <= 0);
if (strncmp(cTempBuffer, SMTP_OK_STRING, sizeof(cTempBuffer)) >= 0)
{
//Client: RCPT TO:<receiver@domain.com>
// send RCPT TO
send(lSocket, cMailto, strlen(cMailto), 0);
//Server: 250 OK
// wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
}while (lRetval <= 0);
if (strncmp(cTempBuffer, SMTP_OK_STRING, sizeof(cTempBuffer)) >= 0)
{
//Client: DATA<CRLF>
// send DATA
send(lSocket, SMTP_DATA_STRING, 6, 0);
//Server: 354 Start mail input; end with <CRLF>.<CRLF>
// wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
}while (lRetval <= 0);
if (strncmp(cTempBuffer, SMTP_START_OF_TRANSMISSION_STRING, sizeof(cTempBuffer)) >= 0)
{
// send content
send(lSocket, cMailcontent, strlen(cMailcontent), 0);
//Client: <CRLF>.<CRLF>
// send "<CRLF>.<CRLF>"
send(lSocket, SMTP_MAIL_END_STRING, 5, 0);
//Server: 250 OK
// wait for SMTP Server answer
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
}while (lRetval <= 0);
if (strncmp(cTempBuffer, SMTP_OK_STRING, sizeof(cTempBuffer)) >= 0)
{
//Client: QUIT<CRLFCRLF>
// send QUIT
send(lSocket, SMTP_QUIT_STRING, 8, 0);
//Server: 221 smtp.domain.com closing transmission
do
{
lRetval = recv(lSocket, cTempBuffer, sizeof(cTempBuffer), 0);
}while (lRetval <= 0);
if (strncmp(cTempBuffer, SMTP_END_OF_TRANSMISSION_STRING, sizeof(cTempBuffer)) >= 0)
{
vParTestSetLED( 3 , pdTRUE );
}
}
}
}
}
}
// close socket
close(lSocket);
}
}
}
}
/*! \brief push button naked interrupt handler.
*
*/
#if __GNUC__
__attribute__((naked))
#elif __ICCAVR32__
#pragma shadow_registers = full // Naked.
#endif
void vpushb_ISR( void )
{
/* This ISR can cause a context switch, so the first statement must be a
call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
variable declarations. */
portENTER_SWITCHING_ISR();
prvpushb_ISR_NonNakedBehaviour();
portEXIT_SWITCHING_ISR();
}
/*! \brief push button interrupt handler. Here, declarations should be done
*
*/
#if __GNUC__
__attribute__((__noinline__))
#elif __ICCAVR32__
#pragma optimize = no_inline
#endif
static portBASE_TYPE prvpushb_ISR_NonNakedBehaviour( void )
{
if (gpio_get_pin_interrupt_flag(GPIO_PUSH_BUTTON_0))
{
// set the flag
bSendMail = pdTRUE;
// allow new interrupt : clear the IFR flag
gpio_clear_pin_interrupt_flag(GPIO_PUSH_BUTTON_0);
}
// no context switch required, task is polling the flag
return( pdFALSE );
}
#endif

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Basic SMTP Client for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef BASIC_SMTP_SERVER_H
#define BASIC_SMTP_SERVER_H
#include "portmacro.h"
/* The function that implements the SMTP client task. */
portTASK_FUNCTION_PROTO( vBasicSMTPClient, pvParameters );
#endif

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Basic TFTP Server for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
Implements a simplistic TFTP server.
In order to put data on the TFTP server (not over 2048 bytes)
tftp 192.168.0.2 PUT <src_filename>
this will copy file from your hard drive to the RAM buffer of the application
tftp 192.168.0.2 GET <dst_filename>
this will copy file from the RAM buffer of the application to your hard drive
You can then check that src_filename and dst_filename are identical
*/
#if (TFTP_USED == 1)
#include <string.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "partest.h"
#include "BasicTFTP.h"
/* Demo includes. */
#include "portmacro.h"
/* lwIP includes. */
#include "lwip/api.h"
#include "lwip/tcpip.h"
#include "lwip/memp.h"
#include "lwip/stats.h"
#include "lwip/opt.h"
#include "lwip/api.h"
#include "lwip/arch.h"
#include "lwip/sys.h"
#include "netif/loopif.h"
#include "lwip/sockets.h"
#define O_WRONLY 1
#define O_RDONLY 2
/* The port on which we listen. */
#define TFTP_PORT ( 69 )
/* Delay on close error. */
#define TFTP_DELAY ( 10 )
/* Delay on bind error. */
#define TFTP_ERROR_DELAY ( 40 )
#define TFTP_LED ( 4 )
char data_out[SEGSIZE+sizeof(struct tftphdr)];
char data_in[SEGSIZE+sizeof(struct tftphdr)];
//struct tftp_server *server;
/*------------------------------------------------------------*/
static char * errmsg[] = {
"Undefined error code", // 0 nothing defined
"File not found", // 1 TFTP_ENOTFOUND
"Access violation", // 2 TFTP_EACCESS
"Disk full or allocation exceeded", // 3 TFTP_ENOSPACE
"Illegal TFTP operation", // 4 TFTP_EBADOP
"Unknown transfer ID", // 5 TFTP_EBADID
"File already exists", // 6 TFTP_EEXISTS
"No such user", // 7 TFTP_ENOUSER
};
/* Send an error packet to the client */
static void
tftpd_send_error(int s, struct tftphdr * reply, int err,
struct sockaddr_in *from_addr, int from_len)
{
if ( ( 0 <= err ) && ( sizeof(errmsg)/sizeof(errmsg[0]) > err) ) {
reply->th_opcode = htons(ERROR);
reply->th_code = htons(err);
if ( (0 > err) || (sizeof(errmsg)/sizeof(errmsg[0]) <= err) )
err = 0; // Do not copy a random string from hyperspace
strcpy(reply->th_msg, errmsg[err]);
sendto(s, reply, 4+strlen(reply->th_msg)+1, 0,
(struct sockaddr *)from_addr, from_len);
}
}
portCHAR cRamBuffer[2048];
int lCurrentBlock = 0;
int lTotalLength = 0;
int tftpd_close_data_file(int fd)
{
lCurrentBlock = 0;
return (5);
}
int tftpd_open_data_file(int fd, int mode)
{
lCurrentBlock = 0;
return (5);
}
int tftpd_read_data_file(int fd, portCHAR * buffer, int length)
{
int lReturnValue;
if ((lTotalLength -= length) >= 0) {
lReturnValue = length;
}
else
{
lReturnValue = lTotalLength + length;
lTotalLength = 0;
}
memcpy(buffer, &cRamBuffer[lCurrentBlock * SEGSIZE], lReturnValue);
lCurrentBlock++;
return (lReturnValue);
}
//
// callback to store data to the RAM buffer
//
int tftpd_write_data_file(int fd, portCHAR * buffer, int length)
{
lTotalLength += length;
memcpy(&cRamBuffer[lCurrentBlock * SEGSIZE], buffer, length);
lCurrentBlock++;
return (length);
}
//
// Receive a file from the client
//
static void
tftpd_write_file(struct tftphdr *hdr,
struct sockaddr_in *from_addr, int from_len)
{
struct tftphdr *reply = (struct tftphdr *)data_out;
struct tftphdr *response = (struct tftphdr *)data_in;
int fd, len, ok, tries, closed, data_len, s;
unsigned short block;
struct timeval timeout;
fd_set fds;
int total_timeouts = 0;
struct sockaddr_in client_addr, local_addr;
int client_len;
s = socket(AF_INET, SOCK_DGRAM, 0);
if (s < 0) {
return;
}
memset((char *)&local_addr, 0, sizeof(local_addr));
local_addr.sin_family = AF_INET;
local_addr.sin_len = sizeof(local_addr);
local_addr.sin_addr.s_addr = htonl(INADDR_ANY);
local_addr.sin_port = htons(INADDR_ANY);
if (bind(s, (struct sockaddr *)&local_addr, sizeof(local_addr)) < 0) {
// Problem setting up my end
close(s);
return;
}
if ((fd = tftpd_open_data_file((int)hdr->th_stuff, O_WRONLY)) < 0) {
tftpd_send_error(s,reply,TFTP_ENOTFOUND,from_addr, from_len);
close(s);
return;
}
ok = pdTRUE;
closed = pdFALSE;
block = 0;
while (ok) {
// Send ACK telling client he can send data
reply->th_opcode = htons(ACK);
reply->th_block = htons(block++); // postincrement
for (tries = 0; tries < TFTP_RETRIES_MAX; tries++) {
sendto(s, reply, 4, 0, (struct sockaddr *)from_addr, from_len);
repeat_select:
timeout.tv_sec = TFTP_TIMEOUT_PERIOD;
timeout.tv_usec = 0;
FD_ZERO(&fds);
FD_SET(s, &fds);
vParTestToggleLED( TFTP_LED );
if (lwip_select(s+1, &fds, 0, 0, &timeout) <= 0) {
if (++total_timeouts > TFTP_TIMEOUT_MAX) {
tftpd_send_error(s,reply,TFTP_EBADOP,from_addr, from_len);
ok = pdFALSE;
break;
}
continue; // retry the send, using up one retry.
}
vParTestToggleLED( TFTP_LED );
// Some data has arrived
data_len = sizeof(data_in);
client_len = sizeof(client_addr);
if ((data_len = recvfrom(s, data_in, data_len, 0,
(struct sockaddr *)&client_addr, &client_len)) < 0) {
// What happened? No data here!
continue; // retry the send, using up one retry.
}
if (ntohs(response->th_opcode) == DATA &&
ntohs(response->th_block) < block) {
// Then it is repeat DATA with an old block; listen again,
// but do not repeat sending the current ack, and do not
// use up a retry count. (we do re-send the ack if
// subsequently we time out)
goto repeat_select;
}
if (ntohs(response->th_opcode) == DATA &&
ntohs(response->th_block) == block) {
// Good data - write to file
len = tftpd_write_data_file(fd, response->th_data, data_len-4);
if (len < (data_len-4)) {
// File is "full"
tftpd_send_error(s,reply,TFTP_ENOSPACE,
from_addr, from_len);
ok = pdFALSE; // Give up
break; // out of the retries loop
}
if (data_len < (SEGSIZE+4)) {
// End of file
closed = pdTRUE;
ok = pdFALSE;
vParTestSetLED( 0 , 0 );
if (tftpd_close_data_file(fd) == -1) {
tftpd_send_error(s,reply,TFTP_EACCESS,
from_addr, from_len);
break; // out of the retries loop
}
// Exception to the loop structure: we must ACK the last
// packet, the one that implied EOF:
reply->th_opcode = htons(ACK);
reply->th_block = htons(block++); // postincrement
sendto(s, reply, 4, 0, (struct sockaddr *)from_addr, from_len);
break; // out of the retries loop
}
// Happy! Break out of the retries loop.
break;
}
} // End of the retries loop.
if (TFTP_RETRIES_MAX <= tries) {
tftpd_send_error(s,reply,TFTP_EBADOP,from_addr, from_len);
ok = pdFALSE;
}
}
close(s);
if (!closed) {
tftpd_close_data_file(fd);
}
}
//
// Send a file to the client
//
static void
tftpd_read_file(struct tftphdr *hdr,
struct sockaddr_in *from_addr, int from_len)
{
struct tftphdr *reply = (struct tftphdr *)data_out;
struct tftphdr *response = (struct tftphdr *)data_in;
int fd, len, tries, ok, data_len, s;
unsigned short block;
struct timeval timeout;
fd_set fds;
int total_timeouts = 0;
struct sockaddr_in client_addr, local_addr;
int client_len;
s = socket(AF_INET, SOCK_DGRAM, 0);
if (s < 0) {
return;
}
memset((char *)&local_addr, 0, sizeof(local_addr));
local_addr.sin_family = AF_INET;
local_addr.sin_len = sizeof(local_addr);
local_addr.sin_addr.s_addr = htonl(INADDR_ANY);
local_addr.sin_port = htons(INADDR_ANY);
if (bind(s, (struct sockaddr *)&local_addr, sizeof(local_addr)) < 0) {
// Problem setting up my end
close(s);
return;
}
if ((fd = tftpd_open_data_file((int)hdr->th_stuff, O_RDONLY)) < 0) {
tftpd_send_error(s,reply,TFTP_ENOTFOUND,from_addr, from_len);
close(s);
return;
}
block = 0;
ok = pdTRUE;
while (ok) {
// Read next chunk of file
len = tftpd_read_data_file(fd, reply->th_data, SEGSIZE);
reply->th_block = htons(++block); // preincrement
reply->th_opcode = htons(DATA);
for (tries = 0; tries < TFTP_RETRIES_MAX; tries++) {
if (sendto(s, reply, 4+len, 0,
(struct sockaddr *)from_addr, from_len) < 0) {
// Something went wrong with the network!
ok = pdFALSE;
break;
}
repeat_select:
timeout.tv_sec = TFTP_TIMEOUT_PERIOD;
timeout.tv_usec = 0;
FD_ZERO(&fds);
FD_SET(s, &fds);
vParTestToggleLED( TFTP_LED );
if (select(s+1, &fds, 0, 0, &timeout) <= 0) {
if (++total_timeouts > TFTP_TIMEOUT_MAX) {
tftpd_send_error(s,reply,TFTP_EBADOP,from_addr, from_len);
ok = pdFALSE;
break;
}
continue; // retry the send, using up one retry.
}
vParTestToggleLED( TFTP_LED );
data_len = sizeof(data_in);
client_len = sizeof(client_addr);
if ((data_len = recvfrom(s, data_in, data_len, 0,
(struct sockaddr *)&client_addr,
&client_len)) < 0) {
// What happened? Maybe someone lied to us...
continue; // retry the send, using up one retry.
}
if ((ntohs(response->th_opcode) == ACK) &&
(ntohs(response->th_block) < block)) {
// Then it is a repeat ACK for an old block; listen again,
// but do not repeat sending the current block, and do not
// use up a retry count. (we do re-send the data if
// subsequently we time out)
goto repeat_select;
}
if ((ntohs(response->th_opcode) == ACK) &&
(ntohs(response->th_block) == block)) {
// Happy! Break out of the retries loop.
break;
}
} // End of the retries loop.
if (TFTP_RETRIES_MAX <= tries) {
tftpd_send_error(s,reply,TFTP_EBADOP,from_addr, from_len);
ok = pdFALSE;
}
if (len < SEGSIZE) {
break; // That's end of file then.
}
}
close(s);
tftpd_close_data_file(fd);
}
portTASK_FUNCTION( vBasicTFTPServer, pvParameters )
{
int lSocket;
int lDataLen, lRecvLen, lFromLen;
struct sockaddr_in sLocalAddr, sFromAddr;
portCHAR cData[SEGSIZE+sizeof(struct tftphdr)];
struct tftphdr *sHdr = (struct tftphdr *)cData;
// Set up port
// Network order in info; host order in server:
for (;;) {
// Create socket
lSocket = socket(AF_INET, SOCK_DGRAM, 0);
if (lSocket < 0) {
return;
}
memset((char *)&sLocalAddr, 0, sizeof(sLocalAddr));
sLocalAddr.sin_family = AF_INET;
sLocalAddr.sin_len = sizeof(sLocalAddr);
sLocalAddr.sin_addr.s_addr = htonl(INADDR_ANY);
sLocalAddr.sin_port = TFTP_PORT;
if (bind(lSocket, (struct sockaddr *)&sLocalAddr, sizeof(sLocalAddr)) < 0) {
// Problem setting up my end
close(lSocket);
return;
}
lRecvLen = sizeof(cData);
lFromLen = sizeof(sFromAddr);
lDataLen = recvfrom(lSocket, sHdr, lRecvLen, 0,
(struct sockaddr *)&sFromAddr, &lFromLen);
vParTestSetLED( TFTP_LED , pdTRUE );
close(lSocket); // so that other servers can bind to the TFTP socket
if ( lDataLen < 0) {
} else {
switch (ntohs(sHdr->th_opcode)) {
case WRQ:
tftpd_write_file(sHdr, &sFromAddr, lFromLen);
vParTestSetLED( TFTP_LED , pdFALSE );
break;
case RRQ:
tftpd_read_file(sHdr, &sFromAddr, lFromLen);
vParTestSetLED( TFTP_LED , pdFALSE );
break;
case ACK:
case DATA:
case ERROR:
vParTestSetLED( TFTP_LED , pdFALSE );
// Ignore
break;
default:
for(;;)
{
vParTestToggleLED( TFTP_LED );
vTaskDelay(200);
}
}
}
}
}
#endif

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Basic TFTP Server for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef BASIC_TFTP_SERVER_H
#define BASIC_TFTP_SERVER_H
#include "portmacro.h"
/* tftp_support.h */
/*
* File transfer modes
*/
#define TFTP_NETASCII 0 // Text files
#define TFTP_OCTET 1 // Binary files
/*
* Errors
*/
// These initial 7 are passed across the net in "ERROR" packets.
#define TFTP_ENOTFOUND 1 /* file not found */
#define TFTP_EACCESS 2 /* access violation */
#define TFTP_ENOSPACE 3 /* disk full or allocation exceeded */
#define TFTP_EBADOP 4 /* illegal TFTP operation */
#define TFTP_EBADID 5 /* unknown transfer ID */
#define TFTP_EEXISTS 6 /* file already exists */
#define TFTP_ENOUSER 7 /* no such user */
// These extensions are return codes in our API, *never* passed on the net.
#define TFTP_TIMEOUT 8 /* operation timed out */
#define TFTP_NETERR 9 /* some sort of network error */
#define TFTP_INVALID 10 /* invalid parameter */
#define TFTP_PROTOCOL 11 /* protocol violation */
#define TFTP_TOOLARGE 12 /* file is larger than buffer */
#define TFTP_TIMEOUT_PERIOD 5 // Seconds between retries
#define TFTP_TIMEOUT_MAX 50 // Max timeouts over all blocks
#define TFTP_RETRIES_MAX 5 // retries per block before giving up
/* netdb.h */
// Internet services
struct servent {
char *s_name; /* official service name */
char **s_aliases; /* alias list */
int s_port; /* port number */
char *s_proto; /* protocol to use */
};
/* arpa/tftp.h */
/*
* Trivial File Transfer Protocol (IEN-133)
*/
#define SEGSIZE 512 /* data segment size */
/*
* Packet types.
*/
#define th_block th_u.tu_block
#define th_code th_u.tu_code
#define th_stuff th_u.tu_stuff
#define th_msg th_data
/*
* Error codes.
*/
#define EUNDEF 0 /* not defined */
#define ENOTFOUND 1 /* file not found */
#define EACCESS 2 /* access violation */
#define ENOSPACE 3 /* disk full or allocation exceeded */
#define EBADOP 4 /* illegal TFTP operation */
#define EBADID 5 /* unknown transfer ID */
#define EEXISTS 6 /* file already exists */
#define ENOUSER 7 /* no such user */
#define RRQ 01 /* read request */
#define WRQ 02 /* write request */
#define DATA 03 /* data packet */
#define ACK 04 /* acknowledgement */
#define ERROR 05 /* error code */
#if __ICCAVR32__
#pragma pack(1)
#endif
struct tftphdr {
short th_opcode; /* packet type */
union {
unsigned short tu_block; /* block # */
short tu_code; /* error code */
char tu_stuff[1]; /* request packet stuff */
}
#if __GNUC__
__attribute__ ((packed))
#endif
th_u;
char th_data[1]; /* data or error string */
}
#if __GNUC__
__attribute__ ((packed))
#endif
;
#if __ICCAVR32__
#pragma pack()
#endif
/* The function that implements the TFTP server task. */
portTASK_FUNCTION_PROTO( vBasicTFTPServer, pvParameters );
#endif

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Basic WEB Server for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
Implements a simplistic WEB server. Every time a connection is made and
data is received a dynamic page that shows the current FreeRTOS.org kernel
statistics is generated and returned. The connection is then closed.
This file was adapted from a FreeRTOS lwIP slip demo supplied by a third
party.
*/
#if (HTTP_USED == 1)
/* Standard includes. */
#include <stdio.h>
#include <string.h>
#include "conf_eth.h"
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "semphr.h"
#include "partest.h"
#include "serial.h"
/* Demo includes. */
/* Demo app includes. */
#include "portmacro.h"
/* lwIP includes. */
#include "lwip/api.h"
#include "lwip/tcpip.h"
#include "lwip/memp.h"
#include "lwip/stats.h"
#include "netif/loopif.h"
/* ethernet includes */
#include "ethernet.h"
/*! The size of the buffer in which the dynamic WEB page is created. */
#define webMAX_PAGE_SIZE 512
/*! Standard GET response. */
#define webHTTP_OK "HTTP/1.0 200 OK\r\nContent-type: text/html\r\n\r\n"
/*! The port on which we listen. */
#define webHTTP_PORT ( 80 )
/*! Delay on close error. */
#define webSHORT_DELAY ( 10 )
/*! Format of the dynamic page that is returned on each connection. */
#define webHTML_START \
"<html>\
<head>\
</head>\
<BODY onLoad=\"window.setTimeout(&quot;location.href='index.html'&quot;,1000)\" bgcolor=\"#FFFFFF\" text=\"#2477E6\">\
\r\nPage Hits = "
#define webHTML_END \
"\r\n</pre>\
\r\n</font></BODY>\
</html>"
portCHAR cDynamicPage[ webMAX_PAGE_SIZE ];
portCHAR cPageHits[ 11 ];
/*! Function to process the current connection */
static void prvweb_ParseHTMLRequest( struct netconn *pxNetCon );
/*! \brief WEB server main task
* check for incoming connection and process it
*
* \param pvParameters Input. Not Used.
*
*/
portTASK_FUNCTION( vBasicWEBServer, pvParameters )
{
struct netconn *pxHTTPListener, *pxNewConnection;
/* Create a new tcp connection handle */
pxHTTPListener = netconn_new( NETCONN_TCP );
netconn_bind(pxHTTPListener, NULL, webHTTP_PORT );
netconn_listen( pxHTTPListener );
/* Loop forever */
for( ;; )
{
/* Wait for a first connection. */
pxNewConnection = netconn_accept(pxHTTPListener);
vParTestSetLED(webCONN_LED, pdTRUE);
if(pxNewConnection != NULL)
{
prvweb_ParseHTMLRequest(pxNewConnection);
}/* end if new connection */
vParTestSetLED(webCONN_LED, pdFALSE);
} /* end infinite loop */
}
/*! \brief parse the incoming request
* parse the HTML request and send file
*
* \param pxNetCon Input. The netconn to use to send and receive data.
*
*/
static void prvweb_ParseHTMLRequest( struct netconn *pxNetCon )
{
struct netbuf *pxRxBuffer;
portCHAR *pcRxString;
unsigned portSHORT usLength;
static unsigned portLONG ulPageHits = 0;
/* We expect to immediately get data. */
pxRxBuffer = netconn_recv( pxNetCon );
if( pxRxBuffer != NULL )
{
/* Where is the data? */
netbuf_data( pxRxBuffer, ( void * ) &pcRxString, &usLength );
/* Is this a GET? We don't handle anything else. */
if( !strncmp( pcRxString, "GET", 3 ) )
{
pcRxString = cDynamicPage;
/* Update the hit count. */
ulPageHits++;
sprintf( cPageHits, "%d", (int)ulPageHits );
/* Write out the HTTP OK header. */
netconn_write( pxNetCon, webHTTP_OK, (u16_t) strlen( webHTTP_OK ), NETCONN_COPY );
/* Generate the dynamic page... First the page header. */
strcpy( cDynamicPage, webHTML_START );
/* ... Then the hit count... */
strcat( cDynamicPage, cPageHits );
strcat( cDynamicPage, "<p><pre>Task State Priority Stack #<br>************************************************<br>" );
/* ... Then the list of tasks and their status... */
vTaskList( ( signed portCHAR * ) cDynamicPage + strlen( cDynamicPage ) );
/* ... Finally the page footer. */
strcat( cDynamicPage, webHTML_END );
/* Write out the dynamically generated page. */
netconn_write( pxNetCon, cDynamicPage, (u16_t) strlen( cDynamicPage ), NETCONN_COPY );
}
netbuf_delete( pxRxBuffer );
}
netconn_close( pxNetCon );
netconn_delete( pxNetCon );
}
#endif

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Basic WEB Server for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef BASIC_WEB_SERVER_H
#define BASIC_WEB_SERVER_H
#include "portmacro.h"
/*! \brief WEB server main task
*
* \param pvParameters Input. Not Used.
*
*/
portTASK_FUNCTION_PROTO( vBasicWEBServer, pvParameters );
#endif

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief ethernet management for AVR32 UC3.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <string.h>
#include "conf_eth.h"
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo program include files. */
#include "partest.h"
#include "serial.h"
/* ethernet includes */
#include "ethernet.h"
#include "conf_eth.h"
#include "macb.h"
#include "gpio.h"
#if (HTTP_USED == 1)
#include "BasicWEB.h"
#endif
#if (TFTP_USED == 1)
#include "BasicTFTP.h"
#endif
#if (SMTP_USED == 1)
#include "BasicSMTP.h"
#endif
/* lwIP includes */
#include "lwip/sys.h"
#include "lwip/api.h"
#include "lwip/tcpip.h"
#include "lwip/memp.h"
#include "lwip/stats.h"
#include "netif/loopif.h"
//_____ M A C R O S ________________________________________________________
//_____ D E F I N I T I O N S ______________________________________________
/* global variable containing MAC Config (hw addr, IP, GW, ...) */
struct netif MACB_if;
//_____ D E C L A R A T I O N S ____________________________________________
/* Initialisation required by lwIP. */
static void prvlwIPInit( void );
/* Initialisation of ethernet interfaces by reading config file */
static void prvEthernetConfigureInterface(void * param);
/*! \brief create ethernet task, for ethernet management.
*
* \param uxPriority Input. priority for the task, it should be low
*
*/
void vStartEthernetTask( unsigned portBASE_TYPE uxPriority )
{
static const gpio_map_t MACB_GPIO_MAP =
{
{AVR32_MACB_MDC_0_PIN, AVR32_MACB_MDC_0_FUNCTION },
{AVR32_MACB_MDIO_0_PIN, AVR32_MACB_MDIO_0_FUNCTION },
{AVR32_MACB_RXD_0_PIN, AVR32_MACB_RXD_0_FUNCTION },
{AVR32_MACB_TXD_0_PIN, AVR32_MACB_TXD_0_FUNCTION },
{AVR32_MACB_RXD_1_PIN, AVR32_MACB_RXD_1_FUNCTION },
{AVR32_MACB_TXD_1_PIN, AVR32_MACB_TXD_1_FUNCTION },
{AVR32_MACB_TX_EN_0_PIN, AVR32_MACB_TX_EN_0_FUNCTION },
{AVR32_MACB_RX_ER_0_PIN, AVR32_MACB_RX_ER_0_FUNCTION },
{AVR32_MACB_RX_DV_0_PIN, AVR32_MACB_RX_DV_0_FUNCTION },
{AVR32_MACB_TX_CLK_0_PIN, AVR32_MACB_TX_CLK_0_FUNCTION}
};
// Assign GPIO to MACB
gpio_enable_module(MACB_GPIO_MAP, sizeof(MACB_GPIO_MAP) / sizeof(MACB_GPIO_MAP[0]));
/* Setup lwIP. */
prvlwIPInit();
#if (HTTP_USED == 1)
/* Create the WEB server task. This uses the lwIP RTOS abstraction layer.*/
sys_thread_new( vBasicWEBServer, ( void * ) NULL, ethWEBSERVER_PRIORITY );
#endif
#if (TFTP_USED == 1)
/* Create the TFTP server task. This uses the lwIP RTOS abstraction layer.*/
sys_thread_new( vBasicTFTPServer, ( void * ) NULL, ethTFTPSERVER_PRIORITY );
#endif
#if (SMTP_USED == 1)
/* Create the SMTP Client task. This uses the lwIP RTOS abstraction layer.*/
sys_thread_new( vBasicSMTPClient, ( void * ) NULL, ethSMTPCLIENT_PRIORITY );
#endif
}
/*!
* \brief start lwIP layer.
*/
static void prvlwIPInit( void )
{
/* Initialize lwIP and its interface layer. */
#if LWIP_STATS
stats_init();
#endif
sys_init();
mem_init();
memp_init();
pbuf_init();
netif_init();
/* once TCP stack has been initalized, set hw and IP parameters, initialize MACB too */
tcpip_init( prvEthernetConfigureInterface, NULL );
}
/*!
* \brief set ethernet config
*/
static void prvEthernetConfigureInterface(void * param)
{
struct ip_addr xIpAddr, xNetMask, xGateway;
extern err_t ethernetif_init( struct netif *netif );
portCHAR MacAddress[6];
/* Default MAC addr. */
MacAddress[0] = ETHERNET_CONF_ETHADDR0;
MacAddress[1] = ETHERNET_CONF_ETHADDR1;
MacAddress[2] = ETHERNET_CONF_ETHADDR2;
MacAddress[3] = ETHERNET_CONF_ETHADDR3;
MacAddress[4] = ETHERNET_CONF_ETHADDR4;
MacAddress[5] = ETHERNET_CONF_ETHADDR5;
/* pass the MAC address to MACB module */
vMACBSetMACAddress( MacAddress );
/* set MAC hardware address length to be used by lwIP */
MACB_if.hwaddr_len = 6;
/* set MAC hardware address to be used by lwIP */
memcpy( MACB_if.hwaddr, MacAddress, MACB_if.hwaddr_len );
/* Default ip addr. */
IP4_ADDR( &xIpAddr,ETHERNET_CONF_IPADDR0,ETHERNET_CONF_IPADDR1,ETHERNET_CONF_IPADDR2,ETHERNET_CONF_IPADDR3 );
/* Default Subnet mask. */
IP4_ADDR( &xNetMask,ETHERNET_CONF_NET_MASK0,ETHERNET_CONF_NET_MASK1,ETHERNET_CONF_NET_MASK2,ETHERNET_CONF_NET_MASK3 );
/* Default Gw addr. */
IP4_ADDR( &xGateway,ETHERNET_CONF_GATEWAY_ADDR0,ETHERNET_CONF_GATEWAY_ADDR1,ETHERNET_CONF_GATEWAY_ADDR2,ETHERNET_CONF_GATEWAY_ADDR3 );
/* add data to netif */
netif_add( &MACB_if, &xIpAddr, &xNetMask, &xGateway, NULL, ethernetif_init, tcpip_input );
/* make it the default interface */
netif_set_default( &MACB_if );
/* bring it up */
netif_set_up( &MACB_if );
}

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief ethernet headers for AVR32 UC3.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef ETHERNET_H
#define ETHERNET_H
/*! \brief create ethernet task, for ethernet management.
*
* \param uxPriority Input. priority for the task, it should be low
*
*/
void vStartEthernetTask( unsigned portBASE_TYPE uxPriority );
#endif

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/* errno.h standard header */
#ifndef _ERRNO
#define _ERRNO
#ifndef _SYSTEM_BUILD
#pragma system_include
#endif
#ifndef _YVALS
#include <yvals.h>
#endif
_C_STD_BEGIN
/* ERROR CODES */
#define EDOM _EDOM
#define ERANGE _ERANGE
#define EFPOS _EFPOS
#define EILSEQ _EILSEQ
/* lwip error codes, from cygwin errno.h */
#define EIO 5 /* I/O error */
#define EWOULDBLOCK 11 /* Operation would block */
#define ENOMEM 12 /* Not enough core */
#define EFAULT 14 /* Bad address */
#define EINVAL 22 /* Invalid argument */
#define ENOSYS 88 /* Function not implemented */
#define ECONNRESET 104 /* Connection reset by peer */
#define ENOBUFS 105 /* No buffer space available */
#define ENOPROTOOPT 109 /* Protocol not available */
#define ESHUTDOWN 110 /* Can't send after socket shutdown */
#define EADDRINUSE 112 /* Address already in use */
#define ECONNABORTED 113 /* Connection aborted */
#define EHOSTUNREACH 118 /* Host is unreachable */
#define ENOTCONN 128 /* Socket is not connected */
#define _NERR 129 /* one more than last code */
/* DECLARATIONS */
_C_LIB_DECL
#if !_MULTI_THREAD || _COMPILER_TLS && !_GLOBAL_LOCALE
extern int _TLS_QUAL errno;
#else /* !_MULTI_THREAD || _COMPILER_TLS && !_GLOBAL_LOCALE */
__INTRINSIC int *_Geterrno(void);
#define errno (*_Geterrno())
#endif /* !_MULTI_THREAD || _COMPILER_TLS && !_GLOBAL_LOCALE */
_END_C_LIB_DECL
_C_STD_END
#endif /* _ERRNO */
#ifdef _STD_USING
#ifndef errno
using _CSTD errno;
#endif
#endif /* _STD_USING */
/*
* Copyright (c) 1992-2002 by P.J. Plauger. ALL RIGHTS RESERVED.
* Consult your license regarding permissions and restrictions.
V3.12:0576 */

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief lwIP abstraction layer for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __CC_H__
#define __CC_H__
#include "cpu.h"
typedef unsigned char u8_t;
typedef signed char s8_t;
typedef unsigned short u16_t;
typedef signed short s16_t;
typedef unsigned long u32_t;
typedef signed long s32_t;
typedef u32_t mem_ptr_t;
typedef int sys_prot_t;
/*! Defines for the LWIP_STATS feature. */
#define S16_F "d"
#define U16_F "d"
#define X16_F "d"
#define X32_F "d"
#define U32_F "d"
#define S32_F "d"
#define LWIP_PLATFORM_DIAG(x)
#define LWIP_PLATFORM_ASSERT(x)
/* */
#if __GNUC__
#define PACK_STRUCT_BEGIN
#elif __ICCAVR32__
#define PACK_STRUCT_BEGIN _Pragma("pack(1)")
#endif
#if __GNUC__
#define PACK_STRUCT_STRUCT __attribute__ ((__packed__))
#elif __ICCAVR32__
#define PACK_STRUCT_STRUCT
#endif
#if __GNUC__
#define PACK_STRUCT_END
#elif __ICCAVR32__
#define PACK_STRUCT_END _Pragma("pack()")
#endif
#define PACK_STRUCT_FIELD(x) x
#endif /* __CC_H__ */

48
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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief lwIP abstraction layer for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __CPU_H__
#define __CPU_H__
#define BYTE_ORDER BIG_ENDIAN
#endif /* __CPU_H__ */

55
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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief lwIP abstraction layer for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ARCH_INIT_H__
#define __ARCH_INIT_H__
#define TCPIP_INIT_DONE(arg) tcpip_init_done(arg)
void tcpip_init_done(void *);
int wait_for_tcpip_init(void);
#endif /* __ARCH_INIT_H__ */

48
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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief lwIP abstraction layer for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __LIB_H__
#define __LIB_H__
#include <string.h>
#endif /* __LIB_H__ */

48
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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief lwIP abstraction layer for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __PERF_H__
#define __PERF_H__
#define PERF_START /* null definition */
#define PERF_STOP(x) /* null definition */
#endif /* __PERF_H__ */

58
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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief lwIP abstraction layer for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __SYS_RTXC_H__
#define __SYS_RTXC_H__
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"
#include "semphr.h"
#define SYS_MBOX_NULL (xQueueHandle)0
#define SYS_SEM_NULL (xSemaphoreHandle)0
typedef xSemaphoreHandle sys_sem_t;
typedef xQueueHandle sys_mbox_t;
typedef xTaskHandle sys_thread_t;
#endif /* __SYS_RTXC_H__ */

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/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
/*
* This file is a skeleton for developing Ethernet network interface
* drivers for lwIP. Add code to the low_level functions and do a
* search-and-replace for the word "ethernetif" to replace it with
* something that better describes your network interface.
*/
#include "lwip/opt.h"
#include "lwip/def.h"
#include "lwip/mem.h"
#include "lwip/pbuf.h"
#include "lwip/sys.h"
#include <lwip/stats.h>
#include "conf_eth.h"
#include "netif/etharp.h"
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "macb.h"
#define netifMTU ( 1500 )
#define netifGUARD_BLOCK_TIME ( 250 )
#define IFNAME0 'e'
#define IFNAME1 'm'
struct ethernetif {
struct eth_addr *ethaddr;
/* Add whatever per-interface state that is needed here. */
};
static const struct eth_addr ethbroadcast = {{0xff,0xff,0xff,0xff,0xff,0xff}};
/* Forward declarations. */
void ethernetif_input(void * );
static err_t ethernetif_output(struct netif *netif, struct pbuf *p,
struct ip_addr *ipaddr);
static struct netif *xNetIf = NULL;
static void
low_level_init(struct netif *netif)
{
// struct ethernetif *ethernetif = netif->state;
unsigned portBASE_TYPE uxPriority;
/* maximum transfer unit */
netif->mtu = netifMTU;
/* broadcast capability */
netif->flags = NETIF_FLAG_BROADCAST;
/* Do whatever else is needed to initialize interface. */
xNetIf = netif;
/* Initialise the MACB. This routine contains code that polls status bits.
If the Ethernet cable is not plugged in then this can take a considerable
time. To prevent this starving lower priority tasks of processing time we
lower our priority prior to the call, then raise it back again once the
initialisation is complete. */
uxPriority = uxTaskPriorityGet( NULL );
vTaskPrioritySet( NULL, tskIDLE_PRIORITY );
while( xMACBInit(&AVR32_MACB) == FALSE )
{
__asm__ __volatile__ ( "nop" );
}
vTaskPrioritySet( NULL, uxPriority );
/* Create the task that handles the MACB. */
// xTaskCreate( ethernetif_input, ( signed portCHAR * ) "ETH_INT", netifINTERFACE_TASK_STACK_SIZE, NULL, netifINTERFACE_TASK_PRIORITY, NULL );
sys_thread_new( ethernetif_input, NULL, netifINTERFACE_TASK_PRIORITY );
}
/*
* low_level_output():
*
* Should do the actual transmission of the packet. The packet is
* contained in the pbuf that is passed to the function. This pbuf
* might be chained.
*
*/
static err_t
low_level_output(struct netif *netif, struct pbuf *p)
{
struct pbuf *q;
static xSemaphoreHandle xTxSemaphore = NULL;
err_t xReturn = ERR_OK;
/* Parameter not used. */
( void ) netif;
if( xTxSemaphore == NULL )
{
vSemaphoreCreateBinary( xTxSemaphore );
}
#if ETH_PAD_SIZE
pbuf_header( p, -ETH_PAD_SIZE ); /* drop the padding word */
#endif
/* Access to the MACB is guarded using a semaphore. */
if( xSemaphoreTake( xTxSemaphore, netifGUARD_BLOCK_TIME ) )
{
for( q = p; q != NULL; q = q->next )
{
/* Send the data from the pbuf to the interface, one pbuf at a
time. The size of the data in each pbuf is kept in the ->len
variable. if q->next == NULL then this is the last pbuf in the
chain. */
if( !lMACBSend(&AVR32_MACB, q->payload, q->len, ( q->next == NULL ) ) )
{
xReturn = ~ERR_OK;
}
}
xSemaphoreGive( xTxSemaphore );
}
#if ETH_PAD_SIZE
pbuf_header( p, ETH_PAD_SIZE ); /* reclaim the padding word */
#endif
#if LINK_STATS
lwip_stats.link.xmit++;
#endif /* LINK_STATS */
return xReturn;
}
/*
* low_level_input():
*
* Should allocate a pbuf and transfer the bytes of the incoming
* packet from the interface into the pbuf.
*
*/
static struct pbuf *
low_level_input(struct netif *netif) {
struct pbuf *p = NULL;
struct pbuf *q;
u16_t len = 0;
static xSemaphoreHandle xRxSemaphore = NULL;
/* Parameter not used. */
( void ) netif;
if( xRxSemaphore == NULL )
{
vSemaphoreCreateBinary( xRxSemaphore );
}
/* Access to the emac is guarded using a semaphore. */
if( xSemaphoreTake( xRxSemaphore, netifGUARD_BLOCK_TIME ) )
{
/* Obtain the size of the packet. */
len = ulMACBInputLength();
if( len )
{
#if ETH_PAD_SIZE
len += ETH_PAD_SIZE; /* allow room for Ethernet padding */
#endif
/* We allocate a pbuf chain of pbufs from the pool. */
p = pbuf_alloc( PBUF_RAW, len, PBUF_POOL );
if( p != NULL )
{
#if ETH_PAD_SIZE
pbuf_header( p, -ETH_PAD_SIZE ); /* drop the padding word */
#endif
/* Let the driver know we are going to read a new packet. */
vMACBRead( NULL, 0, len );
/* We iterate over the pbuf chain until we have read the entire
packet into the pbuf. */
for( q = p; q != NULL; q = q->next )
{
/* Read enough bytes to fill this pbuf in the chain. The
available data in the pbuf is given by the q->len variable. */
vMACBRead( q->payload, q->len, len );
}
#if ETH_PAD_SIZE
pbuf_header( p, ETH_PAD_SIZE ); /* reclaim the padding word */
#endif
#if LINK_STATS
lwip_stats.link.recv++;
#endif /* LINK_STATS */
}
else
{
#if LINK_STATS
lwip_stats.link.memerr++;
lwip_stats.link.drop++;
#endif /* LINK_STATS */
}
}
xSemaphoreGive( xRxSemaphore );
}
return p;
}
/*
* ethernetif_output():
*
* This function is called by the TCP/IP stack when an IP packet
* should be sent. It calls the function called low_level_output() to
* do the actual transmission of the packet.
*
*/
static err_t
ethernetif_output(struct netif *netif, struct pbuf *p,
struct ip_addr *ipaddr)
{
/* resolve hardware address, then send (or queue) packet */
return etharp_output(netif, ipaddr, p);
}
/*
* ethernetif_input():
*
* This function should be called when a packet is ready to be read
* from the interface. It uses the function low_level_input() that
* should handle the actual reception of bytes from the network
* interface.
*
*/
void ethernetif_input( void * pvParameters )
{
struct ethernetif *ethernetif;
struct eth_hdr *ethhdr;
struct pbuf *p;
( void ) pvParameters;
for( ;; ) {
ethernetif = xNetIf->state;
do
{
ethernetif = xNetIf->state;
/* move received packet into a new pbuf */
p = low_level_input( xNetIf );
if( p == NULL )
{
/* No packet could be read. Wait a for an interrupt to tell us
there is more data available. */
vMACBWaitForInput(100);
}
} while( p == NULL );
/* points to packet payload, which starts with an Ethernet header */
ethhdr = p->payload;
#if LINK_STATS
lwip_stats.link.recv++;
#endif /* LINK_STATS */
ethhdr = p->payload;
switch( htons( ethhdr->type ) )
{
/* IP packet? */
case ETHTYPE_IP:
/* update ARP table */
etharp_ip_input( xNetIf, p );
/* skip Ethernet header */
pbuf_header( p, (s16_t)-sizeof(struct eth_hdr) );
/* pass to network layer */
xNetIf->input( p, xNetIf );
break;
case ETHTYPE_ARP:
/* pass p to ARP module */
etharp_arp_input( xNetIf, ethernetif->ethaddr, p );
break;
default:
pbuf_free( p );
p = NULL;
break;
}
}
}
static void
arp_timer(void *arg)
{
etharp_tmr();
sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL);
}
/*
* ethernetif_init():
*
* Should be called at the beginning of the program to set up the
* network interface. It calls the function low_level_init() to do the
* actual setup of the hardware.
*
*/
extern struct netif MACB_if;
err_t
ethernetif_init(struct netif *netif)
{
struct ethernetif *ethernetif;
int i;
ethernetif = (struct ethernetif *)mem_malloc(sizeof(struct ethernetif));
if (ethernetif == NULL)
{
LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_init: out of memory\n"));
return ERR_MEM;
}
netif->state = ethernetif;
netif->name[0] = IFNAME0;
netif->name[1] = IFNAME1;
netif->output = ethernetif_output;
netif->linkoutput = low_level_output;
for(i = 0; i < 6; i++) netif->hwaddr[i] = MACB_if.hwaddr[i];
low_level_init(netif);
etharp_init();
sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL);
return ERR_OK;
}

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/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef __LWIP_OPT_H__
#define __LWIP_OPT_H__
/* Include user defined options first */
#include "lwipopts.h"
#include "lwip/debug.h"
/* Define default values for unconfigured parameters. */
/* Platform specific locking */
/*
* enable SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection
* for certain critical regions during buffer allocation, deallocation and memory
* allocation and deallocation.
*/
#ifndef SYS_LIGHTWEIGHT_PROT
#define SYS_LIGHTWEIGHT_PROT 0
#endif
#ifndef NO_SYS
#define NO_SYS 0
#endif
/* ---------- Memory options ---------- */
#ifndef MEM_LIBC_MALLOC
#define MEM_LIBC_MALLOC 0
#endif
/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
byte alignment -> define MEM_ALIGNMENT to 2. */
#ifndef MEM_ALIGNMENT
#define MEM_ALIGNMENT 1
#endif
/* MEM_SIZE: the size of the heap memory. If the application will send
a lot of data that needs to be copied, this should be set high. */
#ifndef MEM_SIZE
#define MEM_SIZE 1600
#endif
#ifndef MEMP_SANITY_CHECK
#define MEMP_SANITY_CHECK 0
#endif
/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
sends a lot of data out of ROM (or other static memory), this
should be set high. */
#ifndef MEMP_NUM_PBUF
#define MEMP_NUM_PBUF 16
#endif
/* Number of raw connection PCBs */
#ifndef MEMP_NUM_RAW_PCB
#define MEMP_NUM_RAW_PCB 4
#endif
/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
per active UDP "connection". */
#ifndef MEMP_NUM_UDP_PCB
#define MEMP_NUM_UDP_PCB 4
#endif
/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
connections. */
#ifndef MEMP_NUM_TCP_PCB
#define MEMP_NUM_TCP_PCB 5
#endif
/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP
connections. */
#ifndef MEMP_NUM_TCP_PCB_LISTEN
#define MEMP_NUM_TCP_PCB_LISTEN 8
#endif
/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
segments. */
#ifndef MEMP_NUM_TCP_SEG
#define MEMP_NUM_TCP_SEG 16
#endif
/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active
timeouts. */
#ifndef MEMP_NUM_SYS_TIMEOUT
#define MEMP_NUM_SYS_TIMEOUT 3
#endif
/* The following four are used only with the sequential API and can be
set to 0 if the application only will use the raw API. */
/* MEMP_NUM_NETBUF: the number of struct netbufs. */
#ifndef MEMP_NUM_NETBUF
#define MEMP_NUM_NETBUF 2
#endif
/* MEMP_NUM_NETCONN: the number of struct netconns. */
#ifndef MEMP_NUM_NETCONN
#define MEMP_NUM_NETCONN 4
#endif
/* MEMP_NUM_APIMSG: the number of struct api_msg, used for
communication between the TCP/IP stack and the sequential
programs. */
#ifndef MEMP_NUM_API_MSG
#define MEMP_NUM_API_MSG 8
#endif
/* MEMP_NUM_TCPIPMSG: the number of struct tcpip_msg, which is used
for sequential API communication and incoming packets. Used in
src/api/tcpip.c. */
#ifndef MEMP_NUM_TCPIP_MSG
#define MEMP_NUM_TCPIP_MSG 8
#endif
/* ---------- Pbuf options ---------- */
/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
#ifndef PBUF_POOL_SIZE
#define PBUF_POOL_SIZE 16
#endif
/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
#ifndef PBUF_POOL_BUFSIZE
#define PBUF_POOL_BUFSIZE 128
#endif
/* PBUF_LINK_HLEN: the number of bytes that should be allocated for a
link level header. Defaults to 14 for Ethernet. */
#ifndef PBUF_LINK_HLEN
#define PBUF_LINK_HLEN 14
#endif
/* ---------- ARP options ---------- */
/** Number of active hardware address, IP address pairs cached */
#ifndef ARP_TABLE_SIZE
#define ARP_TABLE_SIZE 10
#endif
/**
* If enabled, outgoing packets are queued during hardware address
* resolution.
*
* This feature has not stabilized yet. Single-packet queueing is
* believed to be stable, multi-packet queueing is believed to
* clash with the TCP segment queueing.
*
* As multi-packet-queueing is currently disabled, enabling this
* _should_ work, but we need your testing feedback on lwip-users.
*
*/
#ifndef ARP_QUEUEING
#define ARP_QUEUEING 1
#endif
/* This option is deprecated */
#ifdef ETHARP_QUEUE_FIRST
#error ETHARP_QUEUE_FIRST option is deprecated. Remove it from your lwipopts.h.
#endif
/* This option is removed to comply with the ARP standard */
#ifdef ETHARP_ALWAYS_INSERT
#error ETHARP_ALWAYS_INSERT option is deprecated. Remove it from your lwipopts.h.
#endif
/* ---------- IP options ---------- */
/* Define IP_FORWARD to 1 if you wish to have the ability to forward
IP packets across network interfaces. If you are going to run lwIP
on a device with only one network interface, define this to 0. */
#ifndef IP_FORWARD
#define IP_FORWARD 0
#endif
/* If defined to 1, IP options are allowed (but not parsed). If
defined to 0, all packets with IP options are dropped. */
#ifndef IP_OPTIONS
#define IP_OPTIONS 1
#endif
/** IP reassembly and segmentation. Even if they both deal with IP
* fragments, note that these are orthogonal, one dealing with incoming
* packets, the other with outgoing packets
*/
/** Reassemble incoming fragmented IP packets */
#ifndef IP_REASSEMBLY
#define IP_REASSEMBLY 1
#endif
/** Fragment outgoing IP packets if their size exceeds MTU */
#ifndef IP_FRAG
#define IP_FRAG 1
#endif
/* IP reassemly default age in seconds */
#ifndef IP_REASS_MAXAGE
#define IP_REASS_MAXAGE 3
#endif
/* IP reassembly buffer size (minus IP header) */
#ifndef IP_REASS_BUFSIZE
#define IP_REASS_BUFSIZE 5760
#endif
/* Assumed max MTU on any interface for IP frag buffer */
#ifndef IP_FRAG_MAX_MTU
#define IP_FRAG_MAX_MTU 1500
#endif
/** Global default value for Time To Live used by transport layers. */
#ifndef IP_DEFAULT_TTL
#define IP_DEFAULT_TTL 255
#endif
/* ---------- ICMP options ---------- */
#ifndef ICMP_TTL
#define ICMP_TTL (IP_DEFAULT_TTL)
#endif
/* ---------- RAW options ---------- */
#ifndef LWIP_RAW
#define LWIP_RAW 1
#endif
#ifndef RAW_TTL
#define RAW_TTL (IP_DEFAULT_TTL)
#endif
/* ---------- DHCP options ---------- */
#ifndef LWIP_DHCP
#define LWIP_DHCP 0
#endif
/* 1 if you want to do an ARP check on the offered address
(recommended). */
#ifndef DHCP_DOES_ARP_CHECK
#define DHCP_DOES_ARP_CHECK 1
#endif
/* ---------- SNMP options ---------- */
/** @note UDP must be available for SNMP transport */
#ifndef LWIP_SNMP
#define LWIP_SNMP 0
#endif
/** @note At least one request buffer is required. */
#ifndef SNMP_CONCURRENT_REQUESTS
#define SNMP_CONCURRENT_REQUESTS 1
#endif
/** @note At least one trap destination is required */
#ifndef SNMP_TRAP_DESTINATIONS
#define SNMP_TRAP_DESTINATIONS 1
#endif
#ifndef SNMP_PRIVATE_MIB
#define SNMP_PRIVATE_MIB 0
#endif
/* ---------- UDP options ---------- */
#ifndef LWIP_UDP
#define LWIP_UDP 1
#endif
#ifndef UDP_TTL
#define UDP_TTL (IP_DEFAULT_TTL)
#endif
/* ---------- TCP options ---------- */
#ifndef LWIP_TCP
#define LWIP_TCP 1
#endif
#ifndef TCP_TTL
#define TCP_TTL (IP_DEFAULT_TTL)
#endif
#ifndef TCP_WND
#define TCP_WND 2048
#endif
#ifndef TCP_MAXRTX
#define TCP_MAXRTX 12
#endif
#ifndef TCP_SYNMAXRTX
#define TCP_SYNMAXRTX 6
#endif
/* Controls if TCP should queue segments that arrive out of
order. Define to 0 if your device is low on memory. */
#ifndef TCP_QUEUE_OOSEQ
#define TCP_QUEUE_OOSEQ 1
#endif
/* TCP Maximum segment size. */
#ifndef TCP_MSS
#define TCP_MSS 128 /* A *very* conservative default. */
#endif
/* TCP sender buffer space (bytes). */
#ifndef TCP_SND_BUF
#define TCP_SND_BUF 256
#endif
/* TCP sender buffer space (pbufs). This must be at least = 2 *
TCP_SND_BUF/TCP_MSS for things to work. */
#ifndef TCP_SND_QUEUELEN
#define TCP_SND_QUEUELEN 4 * TCP_SND_BUF/TCP_MSS
#endif
/* Maximum number of retransmissions of data segments. */
/* Maximum number of retransmissions of SYN segments. */
/* TCP writable space (bytes). This must be less than or equal
to TCP_SND_BUF. It is the amount of space which must be
available in the tcp snd_buf for select to return writable */
#ifndef TCP_SNDLOWAT
#define TCP_SNDLOWAT TCP_SND_BUF/2
#endif
/* Support loop interface (127.0.0.1) */
#ifndef LWIP_HAVE_LOOPIF
#define LWIP_HAVE_LOOPIF 0
#endif
#ifndef LWIP_EVENT_API
#define LWIP_EVENT_API 0
#define LWIP_CALLBACK_API 1
#else
#define LWIP_EVENT_API 1
#define LWIP_CALLBACK_API 0
#endif
#ifndef LWIP_COMPAT_SOCKETS
#define LWIP_COMPAT_SOCKETS 1
#endif
#ifndef TCPIP_THREAD_PRIO
#define TCPIP_THREAD_PRIO 1
#endif
#ifndef SLIPIF_THREAD_PRIO
#define SLIPIF_THREAD_PRIO 1
#endif
#ifndef PPP_THREAD_PRIO
#define PPP_THREAD_PRIO 1
#endif
#ifndef DEFAULT_THREAD_PRIO
#define DEFAULT_THREAD_PRIO 1
#endif
/* ---------- Socket Options ---------- */
/* Enable SO_REUSEADDR and SO_REUSEPORT options */
#ifdef SO_REUSE
/* I removed the lot since this was an ugly hack. It broke the raw-API.
It also came with many ugly goto's, Christiaan Simons. */
#error "SO_REUSE currently unavailable, this was a hack"
#endif
/* ---------- Statistics options ---------- */
#ifndef LWIP_STATS
#define LWIP_STATS 1
#endif
#if LWIP_STATS
#ifndef LWIP_STATS_DISPLAY
#define LWIP_STATS_DISPLAY 0
#endif
#ifndef LINK_STATS
#define LINK_STATS 1
#endif
#ifndef IP_STATS
#define IP_STATS 1
#endif
#ifndef IPFRAG_STATS
#define IPFRAG_STATS 1
#endif
#ifndef ICMP_STATS
#define ICMP_STATS 1
#endif
#ifndef UDP_STATS
#define UDP_STATS 1
#endif
#ifndef TCP_STATS
#define TCP_STATS 1
#endif
#ifndef MEM_STATS
#define MEM_STATS 1
#endif
#ifndef MEMP_STATS
#define MEMP_STATS 1
#endif
#ifndef PBUF_STATS
#define PBUF_STATS 1
#endif
#ifndef SYS_STATS
#define SYS_STATS 1
#endif
#ifndef RAW_STATS
#define RAW_STATS 0
#endif
#else
#define LINK_STATS 0
#define IP_STATS 0
#define IPFRAG_STATS 0
#define ICMP_STATS 0
#define UDP_STATS 0
#define TCP_STATS 0
#define MEM_STATS 0
#define MEMP_STATS 0
#define PBUF_STATS 0
#define SYS_STATS 0
#define RAW_STATS 0
#define LWIP_STATS_DISPLAY 0
#endif /* LWIP_STATS */
/* ---------- PPP options ---------- */
#ifndef PPP_SUPPORT
#define PPP_SUPPORT 0 /* Set for PPP */
#endif
#if PPP_SUPPORT
#define NUM_PPP 1 /* Max PPP sessions. */
#ifndef PAP_SUPPORT
#define PAP_SUPPORT 0 /* Set for PAP. */
#endif
#ifndef CHAP_SUPPORT
#define CHAP_SUPPORT 0 /* Set for CHAP. */
#endif
#define MSCHAP_SUPPORT 0 /* Set for MSCHAP (NOT FUNCTIONAL!) */
#define CBCP_SUPPORT 0 /* Set for CBCP (NOT FUNCTIONAL!) */
#define CCP_SUPPORT 0 /* Set for CCP (NOT FUNCTIONAL!) */
#ifndef VJ_SUPPORT
#define VJ_SUPPORT 0 /* Set for VJ header compression. */
#endif
#ifndef MD5_SUPPORT
#define MD5_SUPPORT 0 /* Set for MD5 (see also CHAP) */
#endif
/*
* Timeouts.
*/
#define FSM_DEFTIMEOUT 6 /* Timeout time in seconds */
#define FSM_DEFMAXTERMREQS 2 /* Maximum Terminate-Request transmissions */
#define FSM_DEFMAXCONFREQS 10 /* Maximum Configure-Request transmissions */
#define FSM_DEFMAXNAKLOOPS 5 /* Maximum number of nak loops */
#define UPAP_DEFTIMEOUT 6 /* Timeout (seconds) for retransmitting req */
#define UPAP_DEFREQTIME 30 /* Time to wait for auth-req from peer */
#define CHAP_DEFTIMEOUT 6 /* Timeout time in seconds */
#define CHAP_DEFTRANSMITS 10 /* max # times to send challenge */
/* Interval in seconds between keepalive echo requests, 0 to disable. */
#if 1
#define LCP_ECHOINTERVAL 0
#else
#define LCP_ECHOINTERVAL 10
#endif
/* Number of unanswered echo requests before failure. */
#define LCP_MAXECHOFAILS 3
/* Max Xmit idle time (in jiffies) before resend flag char. */
#define PPP_MAXIDLEFLAG 100
/*
* Packet sizes
*
* Note - lcp shouldn't be allowed to negotiate stuff outside these
* limits. See lcp.h in the pppd directory.
* (XXX - these constants should simply be shared by lcp.c instead
* of living in lcp.h)
*/
#define PPP_MTU 1500 /* Default MTU (size of Info field) */
#if 0
#define PPP_MAXMTU 65535 - (PPP_HDRLEN + PPP_FCSLEN)
#else
#define PPP_MAXMTU 1500 /* Largest MTU we allow */
#endif
#define PPP_MINMTU 64
#define PPP_MRU 1500 /* default MRU = max length of info field */
#define PPP_MAXMRU 1500 /* Largest MRU we allow */
#define PPP_DEFMRU 296 /* Try for this */
#define PPP_MINMRU 128 /* No MRUs below this */
#define MAXNAMELEN 256 /* max length of hostname or name for auth */
#define MAXSECRETLEN 256 /* max length of password or secret */
#endif /* PPP_SUPPORT */
/* checksum options - set to zero for hardware checksum support */
#ifndef CHECKSUM_GEN_IP
#define CHECKSUM_GEN_IP 1
#endif
#ifndef CHECKSUM_GEN_UDP
#define CHECKSUM_GEN_UDP 1
#endif
#ifndef CHECKSUM_GEN_TCP
#define CHECKSUM_GEN_TCP 1
#endif
#ifndef CHECKSUM_CHECK_IP
#define CHECKSUM_CHECK_IP 1
#endif
#ifndef CHECKSUM_CHECK_UDP
#define CHECKSUM_CHECK_UDP 1
#endif
#ifndef CHECKSUM_CHECK_TCP
#define CHECKSUM_CHECK_TCP 1
#endif
/* Debugging options all default to off */
#ifndef DBG_TYPES_ON
#define DBG_TYPES_ON 0
#endif
#ifndef ETHARP_DEBUG
#define ETHARP_DEBUG DBG_OFF
#endif
#ifndef NETIF_DEBUG
#define NETIF_DEBUG DBG_OFF
#endif
#ifndef PBUF_DEBUG
#define PBUF_DEBUG DBG_OFF
#endif
#ifndef API_LIB_DEBUG
#define API_LIB_DEBUG DBG_OFF
#endif
#ifndef API_MSG_DEBUG
#define API_MSG_DEBUG DBG_OFF
#endif
#ifndef SOCKETS_DEBUG
#define SOCKETS_DEBUG DBG_OFF
#endif
#ifndef ICMP_DEBUG
#define ICMP_DEBUG DBG_OFF
#endif
#ifndef INET_DEBUG
#define INET_DEBUG DBG_OFF
#endif
#ifndef IP_DEBUG
#define IP_DEBUG DBG_OFF
#endif
#ifndef IP_REASS_DEBUG
#define IP_REASS_DEBUG DBG_OFF
#endif
#ifndef RAW_DEBUG
#define RAW_DEBUG DBG_OFF
#endif
#ifndef MEM_DEBUG
#define MEM_DEBUG DBG_OFF
#endif
#ifndef MEMP_DEBUG
#define MEMP_DEBUG DBG_OFF
#endif
#ifndef SYS_DEBUG
#define SYS_DEBUG DBG_OFF
#endif
#ifndef TCP_DEBUG
#define TCP_DEBUG DBG_OFF
#endif
#ifndef TCP_INPUT_DEBUG
#define TCP_INPUT_DEBUG DBG_OFF
#endif
#ifndef TCP_FR_DEBUG
#define TCP_FR_DEBUG DBG_OFF
#endif
#ifndef TCP_RTO_DEBUG
#define TCP_RTO_DEBUG DBG_OFF
#endif
#ifndef TCP_REXMIT_DEBUG
#define TCP_REXMIT_DEBUG DBG_OFF
#endif
#ifndef TCP_CWND_DEBUG
#define TCP_CWND_DEBUG DBG_OFF
#endif
#ifndef TCP_WND_DEBUG
#define TCP_WND_DEBUG DBG_OFF
#endif
#ifndef TCP_OUTPUT_DEBUG
#define TCP_OUTPUT_DEBUG DBG_OFF
#endif
#ifndef TCP_RST_DEBUG
#define TCP_RST_DEBUG DBG_OFF
#endif
#ifndef TCP_QLEN_DEBUG
#define TCP_QLEN_DEBUG DBG_OFF
#endif
#ifndef UDP_DEBUG
#define UDP_DEBUG DBG_OFF
#endif
#ifndef TCPIP_DEBUG
#define TCPIP_DEBUG DBG_OFF
#endif
#ifndef PPP_DEBUG
#define PPP_DEBUG DBG_OFF
#endif
#ifndef SLIP_DEBUG
#define SLIP_DEBUG DBG_OFF
#endif
#ifndef DHCP_DEBUG
#define DHCP_DEBUG DBG_OFF
#endif
#ifndef SNMP_MSG_DEBUG
#define SNMP_MSG_DEBUG DBG_OFF
#endif
#ifndef SNMP_MIB_DEBUG
#define SNMP_MIB_DEBUG DBG_OFF
#endif
#ifndef DBG_MIN_LEVEL
#define DBG_MIN_LEVEL DBG_LEVEL_OFF
#endif
#endif /* __LWIP_OPT_H__ */

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief lwIP configuration for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __LWIPOPTS_H__
#define __LWIPOPTS_H__
/* Include user defined options first */
#include "conf_eth.h"
// #include "lwip/debug.h"
/* Define default values for unconfigured parameters. */
#define LWIP_NOASSERT 1 // To suppress some errors for now (no debug output)
/* These two control is reclaimer functions should be compiled
in. Should always be turned on (1). */
#define MEM_RECLAIM 1
#define MEMP_RECLAIM 1
/* Platform specific locking */
/*
* enable SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection
* for certain critical regions during buffer allocation, deallocation and memory
* allocation and deallocation.
*/
#define SYS_LIGHTWEIGHT_PROT 1
/* ---------- Memory options ---------- */
// #define MEM_LIBC_MALLOC 0
/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
byte alignment -> define MEM_ALIGNMENT to 2. */
#define MEM_ALIGNMENT 4
/* MEM_SIZE: the size of the heap memory. If the application will send
a lot of data that needs to be copied, this should be set high. */
#define MEM_SIZE 3 * 1024
// #define MEMP_SANITY_CHECK 1
/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
sends a lot of data out of ROM (or other static memory), this
should be set high. */
#define MEMP_NUM_PBUF 6
/* Number of raw connection PCBs */
#define MEMP_NUM_RAW_PCB 1
#if (TFTP_USED == 1)
/* ---------- UDP options ---------- */
#define LWIP_UDP 1
#define UDP_TTL 255
/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
per active UDP "connection". */
#define MEMP_NUM_UDP_PCB 1
#else
/* ---------- UDP options ---------- */
#define LWIP_UDP 0
#define UDP_TTL 0
/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
per active UDP "connection". */
#define MEMP_NUM_UDP_PCB 0
#endif
/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
connections. */
#define MEMP_NUM_TCP_PCB 14
/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP
connections. */
#define MEMP_NUM_TCP_PCB_LISTEN 2
/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
segments. */
#define MEMP_NUM_TCP_SEG 6
/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active
timeouts. */
#define MEMP_NUM_SYS_TIMEOUT 6
/* The following four are used only with the sequential API and can be
set to 0 if the application only will use the raw API. */
/* MEMP_NUM_NETBUF: the number of struct netbufs. */
#define MEMP_NUM_NETBUF 3
/* MEMP_NUM_NETCONN: the number of struct netconns. */
#define MEMP_NUM_NETCONN 6
/* MEMP_NUM_APIMSG: the number of struct api_msg, used for
communication between the TCP/IP stack and the sequential
programs. */
#define MEMP_NUM_API_MSG 4
/* MEMP_NUM_TCPIPMSG: the number of struct tcpip_msg, which is used
for sequential API communication and incoming packets. Used in
src/api/tcpip.c. */
#define MEMP_NUM_TCPIP_MSG 4
/* ---------- Pbuf options ---------- */
/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
#define PBUF_POOL_SIZE 6
/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
#define PBUF_POOL_BUFSIZE 500
/* PBUF_LINK_HLEN: the number of bytes that should be allocated for a
link level header. */
#define PBUF_LINK_HLEN 16
/* ---------- TCP options ---------- */
#define LWIP_TCP 1
#define TCP_TTL 255
/* TCP receive window. */
#define TCP_WND 1500
/* Controls if TCP should queue segments that arrive out of
order. Define to 0 if your device is low on memory. */
#define TCP_QUEUE_OOSEQ 1
/* TCP Maximum segment size. */
#define TCP_MSS 1500
/* TCP sender buffer space (bytes). */
#define TCP_SND_BUF 2150
/* TCP sender buffer space (pbufs). This must be at least = 2 *
TCP_SND_BUF/TCP_MSS for things to work. */
#define TCP_SND_QUEUELEN 6 * TCP_SND_BUF/TCP_MSS
/* Maximum number of retransmissions of data segments. */
#define TCP_MAXRTX 12
/* Maximum number of retransmissions of SYN segments. */
#define TCP_SYNMAXRTX 4
/* ---------- ARP options ---------- */
#define ARP_TABLE_SIZE 10
#define ARP_QUEUEING 0
/* ---------- IP options ---------- */
/* Define IP_FORWARD to 1 if you wish to have the ability to forward
IP packets across network interfaces. If you are going to run lwIP
on a device with only one network interface, define this to 0. */
#define IP_FORWARD 0
/* If defined to 1, IP options are allowed (but not parsed). If
defined to 0, all packets with IP options are dropped. */
#define IP_OPTIONS 1
/* ---------- ICMP options ---------- */
#define ICMP_TTL 255
/* ---------- DHCP options ---------- */
/* Define LWIP_DHCP to 1 if you want DHCP configuration of
interfaces. DHCP is not implemented in lwIP 0.5.1, however, so
turning this on does currently not work. */
#define LWIP_DHCP 0
/* 1 if you want to do an ARP check on the offered address
(recommended). */
#define DHCP_DOES_ARP_CHECK 1
#define TCPIP_THREAD_PRIO lwipINTERFACE_TASK_PRIORITY
/* ---------- Statistics options ---------- */
#define LWIP_STATS 1
#define LWIP_STATS_DISPLAY 1
#if LWIP_STATS
#define LINK_STATS 1
#define IP_STATS 1
#define ICMP_STATS 1
#define UDP_STATS 1
#define TCP_STATS 1
#define MEM_STATS 1
#define MEMP_STATS 1
#define PBUF_STATS 1
#define SYS_STATS 1
#endif /* STATS */
#endif /* __LWIPOPTS_H__ */

429
FreeRTOS/Demo/lwIP_AVR32_UC3/NETWORK/lwip-port/AT32UC3A/sys_arch.c Normal file
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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief lwIP abstraction layer for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "conf_eth.h"
#if (HTTP_USED == 1)
#include "BasicWEB.h"
#endif
#if (TFTP_USED == 1)
#include "BasicTFTP.h"
#endif
#if (SMTP_USED == 1)
#include "BasicSMTP.h"
#endif
/* lwIP includes. */
#include "lwip/debug.h"
#include "lwip/def.h"
#include "lwip/sys.h"
#include "lwip/mem.h"
/* Message queue constants. */
#define archMESG_QUEUE_LENGTH ( 6 )
#define archPOST_BLOCK_TIME_MS ( ( unsigned portLONG ) 10000 )
struct timeoutlist
{
struct sys_timeouts timeouts;
xTaskHandle pid;
};
static struct timeoutlist timeoutlist[SYS_THREAD_MAX];
static u16_t nextthread = 0;
int intlevel = 0;
extern void ethernetif_input( void * pvParameters );
/*-----------------------------------------------------------------------------------*/
// Creates an empty mailbox.
sys_mbox_t
sys_mbox_new(void)
{
xQueueHandle mbox;
mbox = xQueueCreate( archMESG_QUEUE_LENGTH, sizeof( void * ) );
return mbox;
}
/*-----------------------------------------------------------------------------------*/
/*
Deallocates a mailbox. If there are messages still present in the
mailbox when the mailbox is deallocated, it is an indication of a
programming error in lwIP and the developer should be notified.
*/
void
sys_mbox_free(sys_mbox_t mbox)
{
if( uxQueueMessagesWaiting( mbox ) )
{
/* Line for breakpoint. Should never break here! */
__asm__ __volatile__ ( "nop" );
}
vQueueDelete( mbox );
}
/*-----------------------------------------------------------------------------------*/
// Posts the "msg" to the mailbox.
void
sys_mbox_post(sys_mbox_t mbox, void *data)
{
xQueueSend( mbox, &data, ( portTickType ) ( archPOST_BLOCK_TIME_MS / portTICK_RATE_MS ) );
}
/*-----------------------------------------------------------------------------------*/
/*
Blocks the thread until a message arrives in the mailbox, but does
not block the thread longer than "timeout" milliseconds (similar to
the sys_arch_sem_wait() function). The "msg" argument is a result
parameter that is set by the function (i.e., by doing "*msg =
ptr"). The "msg" parameter maybe NULL to indicate that the message
should be dropped.
The return values are the same as for the sys_arch_sem_wait() function:
Number of milliseconds spent waiting or SYS_ARCH_TIMEOUT if there was a
timeout.
Note that a function with a similar name, sys_mbox_fetch(), is
implemented by lwIP.
*/
u32_t sys_arch_mbox_fetch(sys_mbox_t mbox, void **msg, u32_t timeout)
{
void *dummyptr;
portTickType StartTime, EndTime, Elapsed;
StartTime = xTaskGetTickCount();
if( msg == NULL )
{
msg = &dummyptr;
}
if( timeout != 0 )
{
if(pdTRUE == xQueueReceive( mbox, &(*msg), timeout ) )
{
EndTime = xTaskGetTickCount();
Elapsed = EndTime - StartTime;
if( Elapsed == 0 )
{
Elapsed = 1;
}
return ( Elapsed );
}
else // timed out blocking for message
{
*msg = NULL;
return SYS_ARCH_TIMEOUT;
}
}
else // block forever for a message.
{
while( pdTRUE != xQueueReceive( mbox, &(*msg), 10000 ) ) // time is arbitrary
{
;
}
EndTime = xTaskGetTickCount();
Elapsed = EndTime - StartTime;
if( Elapsed == 0 )
{
Elapsed = 1;
}
return ( Elapsed ); // return time blocked TBD test
}
}
/*-----------------------------------------------------------------------------------*/
// Creates and returns a new semaphore. The "count" argument specifies
// the initial state of the semaphore. TBD finish and test
sys_sem_t
sys_sem_new(u8_t count)
{
xSemaphoreHandle xSemaphore = NULL;
portENTER_CRITICAL();
vSemaphoreCreateBinary( xSemaphore );
if( xSemaphore == NULL )
{
return NULL; // TBD need assert
}
if(count == 0) // Means we want the sem to be unavailable at init state.
{
xSemaphoreTake(xSemaphore,1);
}
portEXIT_CRITICAL();
return xSemaphore;
}
/*-----------------------------------------------------------------------------------*/
/*
Blocks the thread while waiting for the semaphore to be
signaled. If the "timeout" argument is non-zero, the thread should
only be blocked for the specified time (measured in
milliseconds).
If the timeout argument is non-zero, the return value is the number of
milliseconds spent waiting for the semaphore to be signaled. If the
semaphore wasn't signaled within the specified time, the return value is
SYS_ARCH_TIMEOUT. If the thread didn't have to wait for the semaphore
(i.e., it was already signaled), the function may return zero.
Notice that lwIP implements a function with a similar name,
sys_sem_wait(), that uses the sys_arch_sem_wait() function.
*/
u32_t
sys_arch_sem_wait(sys_sem_t sem, u32_t timeout)
{
portTickType StartTime, EndTime, Elapsed;
StartTime = xTaskGetTickCount();
if( timeout != 0)
{
if( xSemaphoreTake( sem, timeout ) == pdTRUE )
{
EndTime = xTaskGetTickCount();
Elapsed = EndTime - StartTime;
if( Elapsed == 0 )
{
Elapsed = 1;
}
return (Elapsed); // return time blocked TBD test
}
else
{
return SYS_ARCH_TIMEOUT;
}
}
else // must block without a timeout
{
while( xSemaphoreTake( sem, 10000 ) != pdTRUE )
{
;
}
EndTime = xTaskGetTickCount();
Elapsed = EndTime - StartTime;
if( Elapsed == 0 )
{
Elapsed = 1;
}
return ( Elapsed ); // return time blocked
}
}
/*-----------------------------------------------------------------------------------*/
// Signals a semaphore
void
sys_sem_signal(sys_sem_t sem)
{
xSemaphoreGive( sem );
}
/*-----------------------------------------------------------------------------------*/
// Deallocates a semaphore
void
sys_sem_free(sys_sem_t sem)
{
vQueueDelete( sem );
}
/*-----------------------------------------------------------------------------------*/
// Initialize sys arch
void
sys_init(void)
{
int i;
// Initialize the the per-thread sys_timeouts structures
// make sure there are no valid pids in the list
for(i = 0; i < SYS_THREAD_MAX; i++)
{
timeoutlist[i].pid = 0;
timeoutlist[i].timeouts.next = NULL;
}
// keep track of how many threads have been created
nextthread = 0;
}
/*-----------------------------------------------------------------------------------*/
/*
Returns a pointer to the per-thread sys_timeouts structure. In lwIP,
each thread has a list of timeouts which is represented as a linked
list of sys_timeout structures. The sys_timeouts structure holds a
pointer to a linked list of timeouts. This function is called by
the lwIP timeout scheduler and must not return a NULL value.
In a single threaded sys_arch implementation, this function will
simply return a pointer to a global sys_timeouts variable stored in
the sys_arch module.
*/
struct sys_timeouts *
sys_arch_timeouts(void)
{
int i;
xTaskHandle pid;
struct timeoutlist *tl;
pid = xTaskGetCurrentTaskHandle( );
for(i = 0; i < nextthread; i++)
{
tl = &(timeoutlist[i]);
if(tl->pid == pid)
{
return &(tl->timeouts);
}
}
// If we're here, this means the scheduler gave the focus to the task as it was
// being created(because of a higher priority). Since timeoutlist[] update is
// done just after the task creation, the array is not up-to-date.
// => the last array entry must be the one of the current task.
return( &( timeoutlist[nextthread].timeouts ) );
/*
// Error
return NULL;
*/
}
/*-----------------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------*/
// TBD
/*-----------------------------------------------------------------------------------*/
/*
Starts a new thread with priority "prio" that will begin its execution in the
function "thread()". The "arg" argument will be passed as an argument to the
thread() function. The id of the new thread is returned. Both the id and
the priority are system dependent.
*/
sys_thread_t sys_thread_new(void (* thread)(void *arg), void *arg, int prio)
{
xTaskHandle CreatedTask;
int result = pdFAIL;
static int iCall = 0;
if( thread == ethernetif_input )
{
result = xTaskCreate( thread, ( signed portCHAR * ) "ETHINT", netifINTERFACE_TASK_STACK_SIZE, arg, prio, &CreatedTask );
}
else if( iCall == 0 )
{
/* The first time this is called we are creating the lwIP handler. */
result = xTaskCreate( thread, ( signed portCHAR * ) "lwIP", lwipINTERFACE_STACK_SIZE, arg, prio, &CreatedTask );
iCall++;
}
#if (HTTP_USED == 1)
else if (thread == vBasicWEBServer)
{
result = xTaskCreate( thread, ( signed portCHAR * ) "WEB", lwipBASIC_WEB_SERVER_STACK_SIZE, arg, prio, &CreatedTask );
}
#endif
#if (TFTP_USED == 1)
else if (thread == vBasicTFTPServer)
{
result = xTaskCreate( thread, ( signed portCHAR * ) "TFTP", lwipBASIC_TFTP_SERVER_STACK_SIZE, arg, prio, &CreatedTask );
}
#endif
#if (SMTP_USED == 1)
else if (thread == vBasicSMTPClient)
{
result = xTaskCreate( thread, ( signed portCHAR * ) "SMTP", lwipBASIC_SMTP_CLIENT_STACK_SIZE, arg, prio, &CreatedTask );
}
#endif
// For each task created, store the task handle (pid) in the timers array.
// This scheme doesn't allow for threads to be deleted
timeoutlist[nextthread++].pid = CreatedTask;
if(result == pdPASS)
{
return CreatedTask;
}
else
{
return NULL;
}
}
/*
This optional function does a "fast" critical region protection and returns
the previous protection level. This function is only called during very short
critical regions. An embedded system which supports ISR-based drivers might
want to implement this function by disabling interrupts. Task-based systems
might want to implement this by using a mutex or disabling tasking. This
function should support recursive calls from the same task or interrupt. In
other words, sys_arch_protect() could be called while already protected. In
that case the return value indicates that it is already protected.
sys_arch_protect() is only required if your port is supporting an operating
system.
*/
sys_prot_t sys_arch_protect(void)
{
vPortEnterCritical();
return 1;
}
/*
This optional function does a "fast" set of critical region protection to the
value specified by pval. See the documentation for sys_arch_protect() for
more information. This function is only required if your port is supporting
an operating system.
*/
void sys_arch_unprotect(sys_prot_t pval)
{
( void ) pval;
vPortExitCritical();
}

112
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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief FreeRTOS Led Driver example for AVR32 UC3.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <avr32/io.h>
#include "FreeRTOS.h"
#include "task.h"
#include "partest.h"
/*-----------------------------------------------------------
* Simple parallel port IO routines.
*-----------------------------------------------------------*/
#define partstALL_OUTPUTS_OFF ( ( unsigned portCHAR ) 0x00 )
#define partstMAX_OUTPUT_LED ( ( unsigned portCHAR ) 8 )
static volatile unsigned portCHAR ucCurrentOutputValue = partstALL_OUTPUTS_OFF; /*lint !e956 File scope parameters okay here. */
/*-----------------------------------------------------------*/
void vParTestInitialise( void )
{
LED_Display(partstALL_OUTPUTS_OFF); /* Start with all LEDs off. */
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
unsigned portCHAR ucBit;
if( uxLED >= partstMAX_OUTPUT_LED )
{
return;
}
ucBit = ( ( unsigned portCHAR ) 1 ) << uxLED;
vTaskSuspendAll();
{
if( xValue == pdTRUE )
{
ucCurrentOutputValue |= ucBit;
}
else
{
ucCurrentOutputValue &= ~ucBit;
}
LED_Display(ucCurrentOutputValue);
}
xTaskResumeAll();
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
unsigned portCHAR ucBit;
if( uxLED >= partstMAX_OUTPUT_LED )
{
return;
}
ucBit = ( ( unsigned portCHAR ) 1 ) << uxLED;
vTaskSuspendAll();
{
ucCurrentOutputValue ^= ucBit;
LED_Display(ucCurrentOutputValue);
}
xTaskResumeAll();
}

361
FreeRTOS/Demo/lwIP_AVR32_UC3/SERIAL/serial.c Normal file
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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief FreeRTOS serial port for AVR32 UC3.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0.
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
#include <avr32/io.h>
#include "board.h"
#include "gpio.h"
/*-----------------------------------------------------------*/
/* Constants to setup and access the USART. */
#define serINVALID_COMPORT_HANDLER ( ( xComPortHandle ) 0 )
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
#define serHANDLE ( ( xComPortHandle ) 1 )
#define serNO_BLOCK ( ( portTickType ) 0 )
/*-----------------------------------------------------------*/
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/*-----------------------------------------------------------*/
/* Forward declaration. */
static void vprvSerialCreateQueues( unsigned portBASE_TYPE uxQueueLength,
xQueueHandle *pxRxedChars,
xQueueHandle *pxCharsForTx );
/*-----------------------------------------------------------*/
#if __GNUC__
__attribute__((__noinline__))
#elif __ICCAVR32__
#pragma optimize = no_inline
#endif
static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
{
/* Now we can declare the local variables. */
signed portCHAR cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
unsigned portLONG ulStatus;
volatile avr32_usart_t *usart0 = &AVR32_USART0;
portBASE_TYPE retstatus;
/* What caused the interrupt? */
ulStatus = usart0->csr & usart0->imr;
if (ulStatus & AVR32_USART_CSR_TXRDY_MASK)
{
/* The interrupt was caused by the THR becoming empty. Are there any
more characters to transmit? */
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
calls in a critical section . */
portENTER_CRITICAL();
retstatus = xQueueReceiveFromISR(xCharsForTx, &cChar, &xHigherPriorityTaskWoken);
portEXIT_CRITICAL();
if (retstatus == pdTRUE)
{
/* A character was retrieved from the queue so can be sent to the
THR now. */
usart0->thr = cChar;
}
else
{
/* Queue empty, nothing to send so turn off the Tx interrupt. */
usart0->idr = AVR32_USART_IDR_TXRDY_MASK;
}
}
if (ulStatus & AVR32_USART_CSR_RXRDY_MASK)
{
/* The interrupt was caused by the receiver getting data. */
cChar = usart0->rhr; //TODO
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
calls in a critical section . */
portENTER_CRITICAL();
xQueueSendFromISR(xRxedChars, &cChar, &xHigherPriorityTaskWoken);
portEXIT_CRITICAL();
}
/* The return value will be used by portEXIT_SWITCHING_ISR() to know if it
should perform a vTaskSwitchContext(). */
return ( xHigherPriorityTaskWoken );
}
/*
* USART0 interrupt service routine.
*/
#if __GNUC__
__attribute__((__naked__))
#elif __ICCAVR32__
#pragma shadow_registers = full // Naked.
#endif
static void vUSART0_ISR( void )
{
/* This ISR can cause a context switch, so the first statement must be a
call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
variable declarations. */
portENTER_SWITCHING_ISR();
prvUSART0_ISR_NonNakedBehaviour();
/* Exit the ISR. If a task was woken by either a character being received
or transmitted then a context switch will occur. */
portEXIT_SWITCHING_ISR();
}
/*-----------------------------------------------------------*/
/*
* Init the serial port for the Minimal implementation.
*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
static const gpio_map_t USART0_GPIO_MAP =
{
{ AVR32_USART0_RXD_0_PIN, AVR32_USART0_RXD_0_FUNCTION },
{ AVR32_USART0_TXD_0_PIN, AVR32_USART0_TXD_0_FUNCTION }
};
xComPortHandle xReturn = serHANDLE;
volatile avr32_usart_t *usart0 = &AVR32_USART0;
int cd; /* USART0 Clock Divider. */
/* Create the rx and tx queues. */
vprvSerialCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx );
/* Configure USART0. */
if( ( xRxedChars != serINVALID_QUEUE ) &&
( xCharsForTx != serINVALID_QUEUE ) &&
( ulWantedBaud != ( unsigned portLONG ) 0 ) )
{
portENTER_CRITICAL();
{
/**
** Reset USART0.
**/
/* Disable all USART0 interrupt sources to begin... */
usart0->idr = 0xFFFFFFFF;
/* Reset mode and other registers that could cause unpredictable
behaviour after reset */
usart0->mr = 0; /* Reset Mode register. */
usart0->rtor = 0; /* Reset Receiver Time-out register. */
usart0->ttgr = 0; /* Reset Transmitter Timeguard register. */
/* Shutdown RX and TX, reset status bits, reset iterations in CSR, reset NACK
and turn off DTR and RTS */
usart0->cr = AVR32_USART_CR_RSTRX_MASK |
AVR32_USART_CR_RSTTX_MASK |
AVR32_USART_CR_RXDIS_MASK |
AVR32_USART_CR_TXDIS_MASK |
AVR32_USART_CR_RSTSTA_MASK |
AVR32_USART_CR_RSTIT_MASK |
AVR32_USART_CR_RSTNACK_MASK |
AVR32_USART_CR_DTRDIS_MASK |
AVR32_USART_CR_RTSDIS_MASK;
/**
** Configure USART0.
**/
/* Enable USART0 RXD & TXD pins. */
gpio_enable_module( USART0_GPIO_MAP, sizeof( USART0_GPIO_MAP ) / sizeof( USART0_GPIO_MAP[0] ) );
/* Set the USART0 baudrate to be as close as possible to the wanted baudrate. */
/*
* ** BAUDRATE CALCULATION **
*
* Selected Clock Selected Clock
* baudrate = ---------------- or baudrate = ----------------
* 16 x CD 8 x CD
*
* (with 16x oversampling) (with 8x oversampling)
*/
if ( ulWantedBaud < (configCPU_CLOCK_HZ/16) ){
/* Use 8x oversampling */
usart0->mr |= (1<<AVR32_USART_MR_OVER_OFFSET);
cd = configCPU_CLOCK_HZ / (8*ulWantedBaud);
if (cd < 2) {
return serINVALID_COMPORT_HANDLER;
}
usart0->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
} else {
/* Use 16x oversampling */
usart0->mr &= ~(1<<AVR32_USART_MR_OVER_OFFSET);
cd = configCPU_CLOCK_HZ / (16*ulWantedBaud);
if (cd > 65535) {
/* Baudrate is too low */
return serINVALID_COMPORT_HANDLER;
}
}
usart0->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
/* Set the USART0 Mode register: Mode=Normal(0), Clk selection=MCK(0),
CHRL=8, SYNC=0(asynchronous), PAR=None, NBSTOP=1, CHMODE=0, MSBF=0,
MODE9=0, CKLO=0, OVER(previously done when setting the baudrate),
other fields not used in this mode. */
usart0->mr |= ((8-5) << AVR32_USART_MR_CHRL_OFFSET ) |
( 4 << AVR32_USART_MR_PAR_OFFSET ) |
( 1 << AVR32_USART_MR_NBSTOP_OFFSET);
/* Write the Transmit Timeguard Register */
usart0->ttgr = 0;
// Register the USART0 interrupt handler to the interrupt controller and
// enable the USART0 interrupt.
INTC_register_interrupt((__int_handler)&vUSART0_ISR, AVR32_USART0_IRQ, INT1);
/* Enable USART0 interrupt sources (but not Tx for now)... */
usart0->ier = AVR32_USART_IER_RXRDY_MASK;
/* Enable receiver and transmitter... */
usart0->cr |= AVR32_USART_CR_TXEN_MASK | AVR32_USART_CR_RXEN_MASK;
}
portEXIT_CRITICAL();
}
else
{
xReturn = serINVALID_COMPORT_HANDLER;
}
return xReturn;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
{
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
/* Get the next character from the buffer. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
{
signed portCHAR *pxNext;
/* NOTE: This implementation does not handle the queue being full as no
block time is used! */
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
/* Send each character in the string, one at a time. */
pxNext = ( signed portCHAR * ) pcString;
while( *pxNext )
{
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
pxNext++;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
volatile avr32_usart_t *usart0 = &AVR32_USART0;
/* Place the character in the queue of characters to be transmitted. */
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
{
return pdFAIL;
}
/* Turn on the Tx interrupt so the ISR will remove the character from the
queue and send it. This does not need to be in a critical section as
if the interrupt has already removed the character the next interrupt
will simply turn off the Tx interrupt again. */
usart0->ier = (1 << AVR32_USART_IER_TXRDY_OFFSET);
return pdPASS;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
/* Not supported as not required by the demo application. */
}
/*-----------------------------------------------------------*/
/*###########################################################*/
/*
* Create the rx and tx queues.
*/
static void vprvSerialCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx )
{
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
/* Pass back a reference to the queues so the serial API file can
post/receive characters. */
*pxRxedChars = xRxedChars;
*pxCharsForTx = xCharsForTx;
}
/*-----------------------------------------------------------*/

72
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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AVR32 UC3 ISP trampoline.
*
* In order to be able to program a project with both BatchISP and JTAGICE mkII
* without having to take the general-purpose fuses into consideration, add this
* file to the project and change the program entry point to _trampoline.
*
* The pre-programmed ISP will be erased if JTAGICE mkII is used.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32UC devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "../conf_isp.h"
//! @{
//! \verbatim
// This must be linked @ 0x80000000 if it is to be run upon reset.
.section .reset, "ax", @progbits
.global _trampoline
.type _trampoline, @function
_trampoline:
// Jump to program start.
rjmp program_start
.org PROGRAM_START_OFFSET
program_start:
// Jump to the C runtime startup routine.
lda.w pc, _stext
//! \endverbatim
//! @}

91
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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AVR32 UC3 ISP trampoline.
*
* In order to be able to program a project with both BatchISP and JTAGICE mkII
* without having to take the general-purpose fuses into consideration, add this
* file to the project and change the program entry point to __trampoline.
*
* The pre-programmed ISP will be erased if JTAGICE mkII is used.
*
* - Compiler: IAR EWAVR32
* - Supported devices: All AVR32UC devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "../conf_isp.h"
//! @{
//! \verbatim
RSEG SSTACK:DATA:NOROOT(2)
// This must be linked @ 0x80000000 if it is to be run upon reset.
RSEG RESET:CODE:NOROOT(1)
PUBLIC __trampoline
__trampoline:
// Jump to program start.
rjmp program_start
ORG PROGRAM_START_OFFSET
program_start:
// Initialize the stack pointer.
lddpc sp, ??SPS
// Jump to the C runtime startup routine.
lddpc pc, ??cmain
// Constant data area.
ALIGN 2
??SPS:
DC32 SFE(SSTACK) & ~3
EXTERN ?main
??cmain:
DC32 ?main
END
//! \endverbatim
//! @}

119
FreeRTOS/Demo/lwIP_AVR32_UC3/SERVICES/USB/CLASS/DFU/EXAMPLES/ISP/conf_isp.h Normal file
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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file ******************************************************************
*
* \brief ISP configuration file.
*
* This file contains the possible external configuration of the ISP.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a USB module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
***************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _CONF_ISP_H_
#define _CONF_ISP_H_
#include <avr32/io.h>
#include "compiler.h"
//_____ D E F I N I T I O N S ______________________________________________
#define PRODUCT_MANUFACTURER_ID 0x58
#define PRODUCT_FAMILY_ID 0x20
#define ISP_VERSION 0x00
#define ISP_ID0 0x00
#define ISP_ID1 0x00
#define ISP_GPFB_FORCE 31
#define ISP_GPFB_FORCE_MASK 0x80000000
#define ISP_GPFB_FORCE_OFFSET 31
#define ISP_GPFB_FORCE_SIZE 1
#define ISP_GPFB_IO_COND_EN 30
#define ISP_GPFB_IO_COND_EN_MASK 0x40000000
#define ISP_GPFB_IO_COND_EN_OFFSET 30
#define ISP_GPFB_IO_COND_EN_SIZE 1
#define ISP_GPFB_BOD_EN 29
#define ISP_GPFB_BOD_EN_MASK 0x20000000
#define ISP_GPFB_BOD_EN_OFFSET 29
#define ISP_GPFB_BOD_EN_SIZE 1
#define ISP_CFG (*(volatile U32 *)ISP_CFG_ADDRESS)
#define ISP_CFG_ADDRESS (AVR32_FLASHC_USER_PAGE_ADDRESS + ISP_CFG_OFFSET)
#define ISP_CFG_OFFSET 0x000001FC
#define ISP_CFG_SIZE 4
#define ISP_CFG_BOOT_KEY 17
#define ISP_CFG_BOOT_KEY_MASK 0xFFFE0000
#define ISP_CFG_BOOT_KEY_OFFSET 17
#define ISP_CFG_BOOT_KEY_SIZE 15
#define ISP_CFG_BOOT_KEY_VALUE 0x494F
#define ISP_CFG_IO_COND_LEVEL 16
#define ISP_CFG_IO_COND_LEVEL_MASK 0x00010000
#define ISP_CFG_IO_COND_LEVEL_OFFSET 16
#define ISP_CFG_IO_COND_LEVEL_SIZE 1
#define ISP_CFG_IO_COND_PIN 8
#define ISP_CFG_IO_COND_PIN_MASK 0x0000FF00
#define ISP_CFG_IO_COND_PIN_OFFSET 8
#define ISP_CFG_IO_COND_PIN_SIZE 8
#define ISP_CFG_CRC8 0
#define ISP_CFG_CRC8_MASK 0x000000FF
#define ISP_CFG_CRC8_OFFSET 0
#define ISP_CFG_CRC8_SIZE 8
#define ISP_CFG_CRC8_POLYNOMIAL 0x107
#define ISP_KEY (*(volatile U32 *)ISP_KEY_ADDRESS)
#define ISP_KEY_ADDRESS (AVR32_SRAM_ADDRESS + ISP_KEY_OFFSET)
#define ISP_KEY_OFFSET 0x00000000
#define ISP_KEY_SIZE 4
#define ISP_KEY_VALUE ('I' << 24 | 'S' << 16 | 'P' << 8 | 'K')
#ifndef ISP_OSC
#define ISP_OSC 0
#endif
#define DFU_FRAME_LENGTH 2048
#define PROGRAM_START_ADDRESS (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET)
#define PROGRAM_START_OFFSET 0x00002000
#endif // _CONF_ISP_H_

263
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0128/GCC/link_uc3a0128.lds Normal file
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/******************************************************************************
* AVR32 AT32UC3A0128 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3A0128
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
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/******************************************************************************
* AVR32 AT32UC3A0128 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3A0128:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x00007FFF SRAM RAM
* 0x80000000 0x8001FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3A0128
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8001FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8001FFFF
-Z@(CODE)EV100=80004100-8001FFFF
-P(CODE)EVSEG=80004000-8001FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8001FFFF
-P(CONST)DATA32_C=80000000-8001FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
-Z(DATA)TRACEBUFFER=00000004-00007FFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
/************************************************************************/
/* End of File */
/************************************************************************/

263
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@ -0,0 +1,263 @@
/******************************************************************************
* AVR32 AT32UC3A0256 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3A0256
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
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@ -0,0 +1,138 @@
/******************************************************************************
* AVR32 AT32UC3A0256 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3A0256:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x0000FFFF SRAM RAM
* 0x80000000 0x8003FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3A0256
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8003FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8003FFFF
-Z@(CODE)EV100=80004100-8003FFFF
-P(CODE)EVSEG=80004000-8003FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8003FFFF
-P(CONST)DATA32_C=80000000-8003FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
-Z(DATA)TRACEBUFFER=00000004-0000FFFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
/************************************************************************/
/* End of File */
/************************************************************************/

263
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/GCC/link_uc3a0512.lds Normal file
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@ -0,0 +1,263 @@
/******************************************************************************
* AVR32 AT32UC3A0512 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3A0512
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00080000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/0512/IAR/lnkuc3a0512.xcl Normal file
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@ -0,0 +1,138 @@
/******************************************************************************
* AVR32 AT32UC3A0512 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3A0512:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x0000FFFF SRAM RAM
* 0x80000000 0x8007FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3A0512
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8007FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8007FFFF
-Z@(CODE)EV100=80004100-8007FFFF
-P(CODE)EVSEG=80004000-8007FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8007FFFF
-P(CONST)DATA32_C=80000000-8007FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8007FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8007FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8007FFFF
-Z(CONST)ACTAB,HTAB=80000000-8007FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
-Z(DATA)TRACEBUFFER=00000004-0000FFFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
/************************************************************************/
/* End of File */
/************************************************************************/

263
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/GCC/link_uc3a1128.lds Normal file
View file

@ -0,0 +1,263 @@
/******************************************************************************
* AVR32 AT32UC3A1128 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3A1128
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1128/IAR/lnkuc3a1128.xcl Normal file
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@ -0,0 +1,138 @@
/******************************************************************************
* AVR32 AT32UC3A1128 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3A1128:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x00007FFF SRAM RAM
* 0x80000000 0x8001FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3A1128
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8001FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8001FFFF
-Z@(CODE)EV100=80004100-8001FFFF
-P(CODE)EVSEG=80004000-8001FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8001FFFF
-P(CONST)DATA32_C=80000000-8001FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
-Z(DATA)TRACEBUFFER=00000004-00007FFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
/************************************************************************/
/* End of File */
/************************************************************************/

263
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1256/GCC/link_uc3a1256.lds Normal file
View file

@ -0,0 +1,263 @@
/******************************************************************************
* AVR32 AT32UC3A1256 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3A1256
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
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@ -0,0 +1,138 @@
/******************************************************************************
* AVR32 AT32UC3A1256 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3A1256:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x0000FFFF SRAM RAM
* 0x80000000 0x8003FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3A1256
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8003FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8003FFFF
-Z@(CODE)EV100=80004100-8003FFFF
-P(CODE)EVSEG=80004000-8003FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8003FFFF
-P(CONST)DATA32_C=80000000-8003FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
-Z(DATA)TRACEBUFFER=00000004-0000FFFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
/************************************************************************/
/* End of File */
/************************************************************************/

263
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/GCC/link_uc3a1512.lds Normal file
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@ -0,0 +1,263 @@
/******************************************************************************
* AVR32 AT32UC3A1512 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3A1512
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00080000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3A/1512/IAR/lnkuc3a1512.xcl Normal file
View file

@ -0,0 +1,138 @@
/******************************************************************************
* AVR32 AT32UC3A1512 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3A1512:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x0000FFFF SRAM RAM
* 0x80000000 0x8007FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3A1512
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8007FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8007FFFF
-Z@(CODE)EV100=80004100-8007FFFF
-P(CODE)EVSEG=80004000-8007FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8007FFFF
-P(CONST)DATA32_C=80000000-8007FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8007FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8007FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8007FFFF
-Z(CONST)ACTAB,HTAB=80000000-8007FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
-Z(DATA)TRACEBUFFER=00000004-0000FFFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
/************************************************************************/
/* End of File */
/************************************************************************/

263
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/GCC/link_uc3b0128.lds Normal file
View file

@ -0,0 +1,263 @@
/******************************************************************************
* AVR32 AT32UC3B0128 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3B0128
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0128/IAR/lnkuc3b0128.xcl Normal file
View file

@ -0,0 +1,138 @@
/******************************************************************************
* AVR32 AT32UC3B0128 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3B0128:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x00007FFF SRAM RAM
* 0x80000000 0x8001FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3B0128
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8001FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8001FFFF
-Z@(CODE)EV100=80004100-8001FFFF
-P(CODE)EVSEG=80004000-8001FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8001FFFF
-P(CONST)DATA32_C=80000000-8001FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
-Z(DATA)TRACEBUFFER=00000004-00007FFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
/************************************************************************/
/* End of File */
/************************************************************************/

263
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/0256/GCC/link_uc3b0256.lds Normal file
View file

@ -0,0 +1,263 @@
/******************************************************************************
* AVR32 AT32UC3B0256 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3B0256
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
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/******************************************************************************
* AVR32 AT32UC3B0256 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3B0256:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x00007FFF SRAM RAM
* 0x80000000 0x8003FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3B0256
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8003FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8003FFFF
-Z@(CODE)EV100=80004100-8003FFFF
-P(CODE)EVSEG=80004000-8003FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8003FFFF
-P(CONST)DATA32_C=80000000-8003FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
-Z(DATA)TRACEBUFFER=00000004-00007FFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
/************************************************************************/
/* End of File */
/************************************************************************/

263
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/064/GCC/link_uc3b064.lds Normal file
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@ -0,0 +1,263 @@
/******************************************************************************
* AVR32 AT32UC3B064 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3B064
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00010000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00003FFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
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/******************************************************************************
* AVR32 AT32UC3B064 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3B064:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x00003FFF SRAM RAM
* 0x80000000 0x8000FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3B064
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8000FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8000FFFF
-Z@(CODE)EV100=80004100-8000FFFF
-P(CODE)EVSEG=80004000-8000FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8000FFFF
-P(CONST)DATA32_C=80000000-8000FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8000FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8000FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8000FFFF
-Z(CONST)ACTAB,HTAB=80000000-8000FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00003FFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00003FFF
-Z(DATA)TRACEBUFFER=00000004-00003FFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00003FFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00003FFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-00003FFF
/************************************************************************/
/* End of File */
/************************************************************************/

263
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/GCC/link_uc3b1128.lds Normal file
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@ -0,0 +1,263 @@
/******************************************************************************
* AVR32 AT32UC3B1128 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3B1128
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1128/IAR/lnkuc3b1128.xcl Normal file
View file

@ -0,0 +1,138 @@
/******************************************************************************
* AVR32 AT32UC3B1128 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3B1128:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x00007FFF SRAM RAM
* 0x80000000 0x8001FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3B1128
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8001FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8001FFFF
-Z@(CODE)EV100=80004100-8001FFFF
-P(CODE)EVSEG=80004000-8001FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8001FFFF
-P(CONST)DATA32_C=80000000-8001FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
-Z(DATA)TRACEBUFFER=00000004-00007FFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
/************************************************************************/
/* End of File */
/************************************************************************/

263
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/GCC/link_uc3b1256.lds Normal file
View file

@ -0,0 +1,263 @@
/******************************************************************************
* AVR32 AT32UC3B1256 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3B1256
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/1256/IAR/lnkuc3b1256.xcl Normal file
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@ -0,0 +1,138 @@
/******************************************************************************
* AVR32 AT32UC3B1256 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3B1256:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x00007FFF SRAM RAM
* 0x80000000 0x8003FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3B1256
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8003FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8003FFFF
-Z@(CODE)EV100=80004100-8003FFFF
-P(CODE)EVSEG=80004000-8003FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8003FFFF
-P(CONST)DATA32_C=80000000-8003FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
-Z(DATA)TRACEBUFFER=00000004-00007FFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
/************************************************************************/
/* End of File */
/************************************************************************/

263
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/GCC/link_uc3b164.lds Normal file
View file

@ -0,0 +1,263 @@
/******************************************************************************
* AVR32 AT32UC3B164 GNU LD script file.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: AVR32 AT32UC3B164
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32:uc)
ENTRY(_start)
MEMORY
{
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00010000
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00003FFC
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 0x00000200
}
PHDRS
{
FLASH PT_LOAD;
INTRAM PT_NULL;
USERPAGE PT_LOAD;
FACTORYPAGE PT_LOAD;
}
SECTIONS
{
/* If this heap size is selected, all the INTRAM space from the end of the
data area to the beginning of the stack will be allocated for the heap. */
__max_heap_size__ = -1;
/* Use a default heap size if heap size was not defined. */
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
/* Use a default stack size if stack size was not defined. */
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
.init :
{
KEEP (*(.init))
} >FLASH AT>FLASH :FLASH =0xd703d703
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
.text :
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >FLASH AT>FLASH :FLASH =0xd703d703
.fini :
{
KEEP (*(.fini))
} >FLASH AT>FLASH :FLASH =0xd703d703
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
. = ORIGIN(INTRAM);
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :FLASH
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :FLASH
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :FLASH
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :FLASH
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :FLASH
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >INTRAM AT>FLASH :FLASH
.dtors :
{
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >INTRAM AT>FLASH :FLASH
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :FLASH
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :FLASH
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :FLASH
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :FLASH
.data :
{
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
} >INTRAM AT>FLASH :FLASH
.data1 : { *(.data1) } >INTRAM AT>FLASH :FLASH
.balign : { . = ALIGN(8); _edata = .; } >INTRAM AT>FLASH :FLASH
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(8);
} >INTRAM AT>INTRAM :INTRAM
. = ALIGN(8);
_end = .;
PROVIDE (end = .);
__heap_start__ = ALIGN(8);
.heap :
{
*(.heap)
. = (__heap_size__ == __max_heap_size__) ?
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
__heap_size__;
} >INTRAM AT>INTRAM :INTRAM
__heap_end__ = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
{
_stack = .;
*(.stack)
. = __stack_size__;
_estack = .;
} >INTRAM AT>INTRAM :INTRAM
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
.factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE :FACTORYPAGE
/DISCARD/ : { *(.note.GNU-stack) }
}

138
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/LINKER_SCRIPTS/AT32UC3B/164/IAR/lnkuc3b164.xcl Normal file
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@ -0,0 +1,138 @@
/******************************************************************************
* AVR32 AT32UC3B164 XLINK command file for AVR32 IAR C/C++ Compiler.
*
* The assumed memory layout is the one of the AT32UC3B164:
*
* Start Stop Name Type
* ---------- ---------- ----- --------------
* 0x00000000 0x00003FFF SRAM RAM
* 0x80000000 0x8000FFFF FLASH FLASH
*
* Usage: xlink your_file(s) -f xcl-file libraries
*
* - Compiler: IAR EWAVR32
* - Supported devices: AVR32 AT32UC3B164
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/************************************************************************/
/* The following segments are defined in this link file: */
/* */
/* Code segments */
/* CODE32 -- Program code used by __code32 functions. */
/* RESET -- Reset code. */
/* EVSEG -- Exception vector handlers. */
/* */
/* Constant segments */
/* INITTAB -- Segment initializer table. */
/* DIFUNCT -- Dynamic initialization vector used by C++. */
/* SWITCH -- Switch tables. */
/* ACTAB -- Table of pointers to acall functions. */
/* */
/* DATA21_ID -- Initialization data for DATA21_I. */
/* DATA32_ID -- Initialization data for DATA32_I. */
/* DATA32_C -- Constant __data32 data. */
/* */
/* CHECKSUM -- Checksum segment. */
/* */
/* Data segments */
/* DATA21_I -- Initialized __data21 data with non-zero */
/* initial value. */
/* DATA32_I -- Initialized __data32 data with non-zero */
/* initial value. */
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
/* DATA21_N -- Non-initialized __data21. */
/* DATA32_N -- Non-initialized __data32. */
/* SSTACK -- The system stack. */
/* CSTACK -- The application stack. */
/* HEAP -- The heap used by malloc and free. */
/* */
/************************************************************************/
/************************************************************************/
/* Define CPU */
/************************************************************************/
-cavr32
// Declare the IPR0 memory location
-DIPR0=FFFF0800
/************************************************************************/
/* Reset code is located at address 0x80000000 and up. */
/************************************************************************/
-Z(CODE)RESET=80000000-8000FFFF
/************************************************************************/
/* The exception handler code is located at address 0x80000000 */
/* and up. Make sure that the exception table gets properly */
/* allocated. By using the special -Z@ allocation primitive, the */
/* placement is guaranteed to be at _EVBASE and onwards. */
/************************************************************************/
-Z@(CODE)EVTAB=80004000-8000FFFF
-Z@(CODE)EV100=80004100-8000FFFF
-P(CODE)EVSEG=80004000-8000FFFF
/************************************************************************/
/* Allocate code and const segments. */
/************************************************************************/
-P(CODE)CODE32=80000000-8000FFFF
-P(CONST)DATA32_C=80000000-8000FFFF
// Initializers
-Z(CONST)INITTAB,DIFUNCT=80000000-8000FFFF
-Z(CONST)CHECKSUM,SWITCH=80000000-8000FFFF
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8000FFFF
-Z(CONST)ACTAB,HTAB=80000000-8000FFFF
/************************************************************************/
/* Allocate the read/write segments that are mapped to RAM. */
/************************************************************************/
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00003FFF
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00003FFF
-Z(DATA)TRACEBUFFER=00000004-00003FFF
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00003FFF
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00003FFF
-Z(DATA)HEAP+_HEAP_SIZE=00000004-00003FFF
/************************************************************************/
/* End of File */
/************************************************************************/

323
FreeRTOS/Demo/lwIP_AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h Normal file
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@ -0,0 +1,323 @@
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Preprocessor macro repeating utils.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _MREPEAT_H_
#define _MREPEAT_H_
#include "preprocessor.h"
//! Maximal number of repetitions supported by MREPEAT.
#define MREPEAT_LIMIT 256
/*! \brief Macro repeat.
*
* This macro represents a horizontal repetition construct.
*
* \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT.
* \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with
* the current repetition number and the auxiliary data argument.
* \param data Auxiliary data passed to macro.
*
* \return <tt>macro(0, data) macro(1, data) ... macro(count - 1, data)</tt>
*/
#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data)
#define MREPEAT0( macro, data)
#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data)
#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data)
#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data)
#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data)
#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data)
#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data)
#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data)
#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data)
#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data)
#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data)
#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data)
#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data)
#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data)
#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data)
#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data)
#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data)
#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data)
#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data)
#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data)
#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data)
#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data)
#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data)
#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data)
#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data)
#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data)
#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data)
#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data)
#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data)
#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data)
#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data)
#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data)
#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data)
#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data)
#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data)
#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data)
#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data)
#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data)
#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data)
#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data)
#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data)
#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data)
#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data)
#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data)
#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data)
#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data)
#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data)
#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data)
#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data)
#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data)
#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data)
#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data)
#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data)
#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data)
#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data)
#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data)
#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data)
#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data)
#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data)
#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data)
#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data)
#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data)
#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data)
#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data)
#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data)
#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data)
#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data)
#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data)
#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data)
#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data)
#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data)
#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data)
#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data)
#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data)
#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data)
#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data)
#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data)
#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data)
#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data)
#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data)
#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data)
#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data)
#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data)
#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data)
#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data)
#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data)
#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data)
#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data)
#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data)
#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data)
#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data)
#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data)
#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data)
#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data)
#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data)
#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data)
#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data)
#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data)
#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data)
#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data)
#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data)
#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data)
#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data)
#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data)
#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data)
#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data)
#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data)
#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data)
#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data)
#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data)
#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data)
#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data)
#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data)
#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data)
#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data)
#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data)
#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data)
#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data)
#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data)
#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data)
#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data)
#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data)
#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data)
#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data)
#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data)
#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data)
#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data)
#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data)
#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data)
#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data)
#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data)
#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data)
#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data)
#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data)
#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data)
#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data)
#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data)
#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data)
#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data)
#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data)
#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data)
#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data)
#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data)
#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data)
#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data)
#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data)
#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data)
#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data)
#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data)
#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data)
#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data)
#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data)
#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data)
#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data)
#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data)
#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data)
#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data)
#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data)
#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data)
#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data)
#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data)
#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data)
#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data)
#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data)
#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data)
#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data)
#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data)
#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data)
#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data)
#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data)
#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data)
#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data)
#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data)
#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data)
#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data)
#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data)
#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data)
#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data)
#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data)
#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data)
#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data)
#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data)
#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data)
#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data)
#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data)
#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data)
#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data)
#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data)
#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data)
#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data)
#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data)
#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data)
#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data)
#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data)
#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data)
#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data)
#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data)
#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data)
#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data)
#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data)
#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data)
#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data)
#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data)
#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data)
#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data)
#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data)
#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data)
#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data)
#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data)
#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data)
#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data)
#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data)
#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data)
#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data)
#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data)
#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data)
#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data)
#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data)
#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data)
#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data)
#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data)
#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data)
#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data)
#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data)
#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data)
#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data)
#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data)
#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data)
#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data)
#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data)
#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data)
#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data)
#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data)
#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data)
#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data)
#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data)
#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data)
#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data)
#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data)
#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data)
#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data)
#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data)
#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data)
#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data)
#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data)
#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data)
#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data)
#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data)
#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data)
#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data)
#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data)
#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data)
#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data)
#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data)
#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data)
#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data)
#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data)
#endif // _MREPEAT_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Preprocessor utils.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _PREPROCESSOR_H_
#define _PREPROCESSOR_H_
#include "tpaste.h"
#include "stringz.h"
#include "mrepeat.h"
#endif // _PREPROCESSOR_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Preprocessor stringizing utils.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _STRINGZ_H_
#define _STRINGZ_H_
/*! \brief Stringize.
*
* Stringize a preprocessing token, this token being allowed to be \#defined.
*
* May be used only within macros with the token passed as an argument if the token is \#defined.
*
* For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN)
* and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to
* writing "A0".
*/
#define STRINGZ(x) #x
/*! \brief Absolute stringize.
*
* Stringize a preprocessing token, this token being allowed to be \#defined.
*
* No restriction of use if the token is \#defined.
*
* For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is
* equivalent to writing "A0".
*/
#define ASTRINGZ(x) STRINGZ(x)
#endif // _STRINGZ_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Preprocessor token pasting utils.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _TPASTE_H_
#define _TPASTE_H_
/*! \name Token Paste
*
* Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
*
* May be used only within macros with the tokens passed as arguments if the tokens are \#defined.
*
* For example, writing TPASTE2(U, WIDTH) within a macro \#defined by
* UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is
* equivalent to writing U32.
*/
//! @{
#define TPASTE2( a, b) a##b
#define TPASTE3( a, b, c) a##b##c
#define TPASTE4( a, b, c, d) a##b##c##d
#define TPASTE5( a, b, c, d, e) a##b##c##d##e
#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f
#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g
#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h
#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i
#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j
//! @}
/*! \name Absolute Token Paste
*
* Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
*
* No restriction of use if the tokens are \#defined.
*
* For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined
* as 32 is equivalent to writing U32.
*/
//! @{
#define ATPASTE2( a, b) TPASTE2( a, b)
#define ATPASTE3( a, b, c) TPASTE3( a, b, c)
#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d)
#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e)
#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f)
#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g)
#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h)
#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i)
#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j)
//! @}
#endif // _TPASTE_H_

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file ******************************************************************
*
* \brief Ethernet module configuration file.
*
* This file contains the possible external configuration of the Ethernet module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
***************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _CONF_ETH_H_
#define _CONF_ETH_H_
/*! define stack size for WEB server task */
#define lwipBASIC_WEB_SERVER_STACK_SIZE 256
/*! define stack size for TFTP server task */
#define lwipBASIC_TFTP_SERVER_STACK_SIZE 1024
/*! define stack size for SMTP Client task */
#define lwipBASIC_SMTP_CLIENT_STACK_SIZE 256
/*! define stack size for lwIP task */
#define lwipINTERFACE_STACK_SIZE 512
/*! define stack size for netif task */
#define netifINTERFACE_TASK_STACK_SIZE 256
/*! define WEB server priority */
#define ethWEBSERVER_PRIORITY ( tskIDLE_PRIORITY + 2 )
/*! define TFTP server priority */
#define ethTFTPSERVER_PRIORITY ( tskIDLE_PRIORITY + 3 )
/*! define SMTP Client priority */
#define ethSMTPCLIENT_PRIORITY ( tskIDLE_PRIORITY + 5 )
/*! define lwIP task priority */
#define lwipINTERFACE_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
/*! define netif task priority */
#define netifINTERFACE_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
/*! Number of threads that can be started with sys_thread_new() */
#define SYS_THREAD_MAX 6
/*! LED used by the ethernet task, toggled on each activation */
#define webCONN_LED 7
/*! Phy Address (set through strap options) */
#define ETHERNET_CONF_PHY_ADDR 0x01
#define ETHERNET_CONF_PHY_ID 0x20005C90
/*! Number of receive buffers */
#define ETHERNET_CONF_NB_RX_BUFFERS 20
/*! USE_RMII_INTERFACE must be defined as 1 to use an RMII interface, or 0
to use an MII interface. */
#define ETHERNET_CONF_USE_RMII_INTERFACE 1
/*! Number of Transmit buffers */
#define ETHERNET_CONF_NB_TX_BUFFERS 10
/*! Size of each Transmit buffer. */
#define ETHERNET_CONF_TX_BUFFER_SIZE 512
/*! Clock definition */
#define ETHERNET_CONF_SYSTEM_CLOCK 48000000
/*! Use Auto Negociation to get speed and duplex */
#define ETHERNET_CONF_AN_ENABLE 1
/*! Do not use auto cross capability */
#define ETHERNET_CONF_AUTO_CROSS_ENABLE 0
/*! use direct cable */
#define ETHERNET_CONF_CROSSED_LINK 0
/* ethernet default parameters */
/*! MAC address definition. The MAC address must be unique on the network. */
#define ETHERNET_CONF_ETHADDR0 0x00
#define ETHERNET_CONF_ETHADDR1 0x04
#define ETHERNET_CONF_ETHADDR2 0x25
#define ETHERNET_CONF_ETHADDR3 0x40
#define ETHERNET_CONF_ETHADDR4 0x40
#define ETHERNET_CONF_ETHADDR5 0x40
/*! The IP address being used. */
#define ETHERNET_CONF_IPADDR0 192
#define ETHERNET_CONF_IPADDR1 168
#define ETHERNET_CONF_IPADDR2 0
#define ETHERNET_CONF_IPADDR3 2
/*! The gateway address being used. */
#define ETHERNET_CONF_GATEWAY_ADDR0 192
#define ETHERNET_CONF_GATEWAY_ADDR1 168
#define ETHERNET_CONF_GATEWAY_ADDR2 0
#define ETHERNET_CONF_GATEWAY_ADDR3 1
/*! The network mask being used. */
#define ETHERNET_CONF_NET_MASK0 255
#define ETHERNET_CONF_NET_MASK1 255
#define ETHERNET_CONF_NET_MASK2 255
#define ETHERNET_CONF_NET_MASK3 0
#endif

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief lwIP configuration for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __LWIPOPTS_H__
#define __LWIPOPTS_H__
/* Include user defined options first */
#include "conf_eth.h"
// #include "lwip/debug.h"
#define LWIP_PLATFORM_DIAG(x)
#define LWIP_PLATFORM_ASSERT(x)
/* Define default values for unconfigured parameters. */
#define LWIP_NOASSERT 1 // To suppress some errors for now (no debug output)
/* These two control is reclaimer functions should be compiled
in. Should always be turned on (1). */
#define MEM_RECLAIM 1
#define MEMP_RECLAIM 1
/* Platform specific locking */
/*
* enable SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection
* for certain critical regions during buffer allocation, deallocation and memory
* allocation and deallocation.
*/
#define SYS_LIGHTWEIGHT_PROT 1
/* ---------- Memory options ---------- */
// #define MEM_LIBC_MALLOC 0
/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
byte alignment -> define MEM_ALIGNMENT to 2. */
#define MEM_ALIGNMENT 4
/* MEM_SIZE: the size of the heap memory. If the application will send
a lot of data that needs to be copied, this should be set high. */
#define MEM_SIZE 3 * 1024
// #define MEMP_SANITY_CHECK 1
/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
sends a lot of data out of ROM (or other static memory), this
should be set high. */
#define MEMP_NUM_PBUF 6
/* Number of raw connection PCBs */
#define MEMP_NUM_RAW_PCB 1
#if (TFTP_USED == 1)
/* ---------- UDP options ---------- */
#define LWIP_UDP 1
#define UDP_TTL 255
/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
per active UDP "connection". */
#define MEMP_NUM_UDP_PCB 1
#else
/* ---------- UDP options ---------- */
#define LWIP_UDP 0
#define UDP_TTL 0
/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
per active UDP "connection". */
#define MEMP_NUM_UDP_PCB 0
#endif
/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
connections. */
#define MEMP_NUM_TCP_PCB 14
/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP
connections. */
#define MEMP_NUM_TCP_PCB_LISTEN 2
/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
segments. */
#define MEMP_NUM_TCP_SEG 6
/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active
timeouts. */
#define MEMP_NUM_SYS_TIMEOUT 6
/* The following four are used only with the sequential API and can be
set to 0 if the application only will use the raw API. */
/* MEMP_NUM_NETBUF: the number of struct netbufs. */
#define MEMP_NUM_NETBUF 3
/* MEMP_NUM_NETCONN: the number of struct netconns. */
#define MEMP_NUM_NETCONN 6
/* MEMP_NUM_APIMSG: the number of struct api_msg, used for
communication between the TCP/IP stack and the sequential
programs. */
#define MEMP_NUM_API_MSG 4
/* MEMP_NUM_TCPIPMSG: the number of struct tcpip_msg, which is used
for sequential API communication and incoming packets. Used in
src/api/tcpip.c. */
#define MEMP_NUM_TCPIP_MSG 4
/* ---------- Pbuf options ---------- */
/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
#define PBUF_POOL_SIZE 6
/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
#define PBUF_POOL_BUFSIZE 500
/* PBUF_LINK_HLEN: the number of bytes that should be allocated for a
link level header. */
#define PBUF_LINK_HLEN 16
/* ---------- TCP options ---------- */
#define LWIP_TCP 1
#define TCP_TTL 255
/* TCP receive window. */
#define TCP_WND 1500
/* Controls if TCP should queue segments that arrive out of
order. Define to 0 if your device is low on memory. */
#define TCP_QUEUE_OOSEQ 1
/* TCP Maximum segment size. */
#define TCP_MSS 1500
/* TCP sender buffer space (bytes). */
#define TCP_SND_BUF 2150
/* TCP sender buffer space (pbufs). This must be at least = 2 *
TCP_SND_BUF/TCP_MSS for things to work. */
#define TCP_SND_QUEUELEN 6 * TCP_SND_BUF/TCP_MSS
/* Maximum number of retransmissions of data segments. */
#define TCP_MAXRTX 12
/* Maximum number of retransmissions of SYN segments. */
#define TCP_SYNMAXRTX 4
/* ---------- ARP options ---------- */
#define ARP_TABLE_SIZE 10
#define ARP_QUEUEING 0
/* ---------- IP options ---------- */
/* Define IP_FORWARD to 1 if you wish to have the ability to forward
IP packets across network interfaces. If you are going to run lwIP
on a device with only one network interface, define this to 0. */
#define IP_FORWARD 0
/* If defined to 1, IP options are allowed (but not parsed). If
defined to 0, all packets with IP options are dropped. */
#define IP_OPTIONS 1
/* ---------- ICMP options ---------- */
#define ICMP_TTL 255
/* ---------- DHCP options ---------- */
/* Define LWIP_DHCP to 1 if you want DHCP configuration of
interfaces. DHCP is not implemented in lwIP 0.5.1, however, so
turning this on does currently not work. */
#define LWIP_DHCP 0
/* 1 if you want to do an ARP check on the offered address
(recommended). */
#define DHCP_DOES_ARP_CHECK 1
#define TCPIP_THREAD_PRIO lwipINTERFACE_TASK_PRIORITY
/* ---------- Statistics options ---------- */
#define LWIP_STATS 1
#define LWIP_STATS_DISPLAY 1
#if LWIP_STATS
#define LINK_STATS 1
#define IP_STATS 1
#define ICMP_STATS 1
#define UDP_STATS 1
#define TCP_STATS 1
#define MEM_STATS 1
#define MEMP_STATS 1
#define PBUF_STATS 1
#define SYS_STATS 1
#endif /* STATS */
#endif /* __LWIPOPTS_H__ */

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief FreeRTOS and lwIP example for AVR32 UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* Environment include files. */
#include <stdlib.h>
#include <string.h>
#include "pm.h"
#include "flashc.h"
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo file headers. */
#include "partest.h"
#include "serial.h"
#include "ethernet.h"
#include "netif/etharp.h"
#include "flash.h"
/* Priority definitions for most of the tasks in the demo application. */
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainETH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
/* Baud rate used by the serial port tasks. */
#define mainCOM_BAUD_RATE ( ( unsigned portLONG ) 57600 )
#define mainCOM_BUFFER_LEN ( ( unsigned portLONG ) 70 )
/* An address in the internal Flash used to count resets. This is used to check that
the demo application is not unexpectedly resetting. */
#define mainRESET_COUNT_ADDRESS ( ( void * ) 0xC0000000 )
//!
//! \fn main
//! \brief start the software here
//! 1) Initialize the microcontroller and the shared hardware resources
//! of the board.
//! 2) Launch the IP modules.
//! 3) Start FreeRTOS.
//! \return 42, which should never occur.
//! \note
//!
int main( void )
{
volatile avr32_pm_t* pm = &AVR32_PM;
/* 1) Initialize the microcontroller and the shared hardware resources of the board. */
/* Switch to external oscillator 0 */
pm_switch_to_osc0( pm, FOSC0, OSC0_STARTUP );
/* Setup PLL0 on OSC0, mul+1=16 ,divisor by 1, lockcount=16, ie. 12Mhzx16/1 = 192MHz output.
Extra div by 2 => 96MHz */
pm_pll_setup(pm, /* volatile avr32_pm_t* pm */
0, /* unsigned int pll */
15, /* unsigned int mul */
1, /* unsigned int div, Sel Osc0/PLL0 or Osc1/Pll1 */
0, /* unsigned int osc */
16); /* unsigned int lockcount */
pm_pll_set_option( pm, 0, // pll0
0, // Choose the range 160-240MHz.
1, // div2
0 ); // wbwdisable
/* Enable PLL0 */
pm_pll_enable(pm,0);
/* Wait for PLL0 locked */
pm_wait_for_pll0_locked(pm) ;
/* Setup generic clock number 2 on PLL, with OSC0/PLL0, no divisor */
pm_gc_setup(pm,
0,
1, /* Use Osc (=0) or PLL (=1) */
0, /* Sel Osc0/PLL0 or Osc1/Pll1 */
0,
1);
/* Enable Generic clock 0*/
pm_gc_enable(pm, 0);
/* switch to clock */
pm_cksel( pm, 1, 1, 1, 0, 1, 0 );
flashc_set_wait_state( 1 );
pm_switch_to_clock( pm, AVR32_PM_MCCTRL_MCSEL_PLL0 );
/* Setup the LED's for output. */
vParTestInitialise();
/* Start the flash tasks just to provide visual feedback that the demo is
executing. */
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
/* 2) Start ethernet task. */
vStartEthernetTask( mainETH_TASK_PRIORITY );
/* 3) Start FreeRTOS. */
vTaskStartScheduler();
/* Will only reach here if there was insufficient memory to create the idle task. */
return 0;
}
/*-----------------------------------------------------------*/

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/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief sprintf functions to replace newlib for AVR32 UC3.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
Copyright 2001, 2002 Georges Menie (www.menie.org)
stdarg version contributed by Christian Ettinger
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU Lesser General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
putchar is the only external dependency for this file,
if you have a working putchar, leave it commented out.
If not, uncomment the define below and
replace outbyte(c) by your own function call.
#define putchar(c) outbyte(c)
*/
#include <sys/reent.h>
#include <stdarg.h>
static void printchar(char **str, int c)
{
extern int putchar(int c);
if (str) {
**str = c;
++(*str);
}
else (void)putchar(c);
}
#define PAD_RIGHT 1
#define PAD_ZERO 2
static int prints(char **out, const char *string, int width, int pad)
{
register int pc = 0, padchar = ' ';
if (width > 0) {
register int len = 0;
register const char *ptr;
for (ptr = string; *ptr; ++ptr) ++len;
if (len >= width) width = 0;
else width -= len;
if (pad & PAD_ZERO) padchar = '0';
}
if (!(pad & PAD_RIGHT)) {
for ( ; width > 0; --width) {
printchar (out, padchar);
++pc;
}
}
for ( ; *string ; ++string) {
printchar (out, *string);
++pc;
}
for ( ; width > 0; --width) {
printchar (out, padchar);
++pc;
}
return pc;
}
/* the following should be enough for 32 bit int */
#define PRINT_BUF_LEN 12
static int printi(char **out, int i, int b, int sg, int width, int pad, int letbase)
{
char print_buf[PRINT_BUF_LEN];
register char *s;
register int t, neg = 0, pc = 0;
register unsigned int u = i;
if (i == 0) {
print_buf[0] = '0';
print_buf[1] = '\0';
return prints (out, print_buf, width, pad);
}
if (sg && b == 10 && i < 0) {
neg = 1;
u = -i;
}
s = print_buf + PRINT_BUF_LEN-1;
*s = '\0';
while (u) {
t = u % b;
if( t >= 10 )
t += letbase - '0' - 10;
*--s = t + '0';
u /= b;
}
if (neg) {
if( width && (pad & PAD_ZERO) ) {
printchar (out, '-');
++pc;
--width;
}
else {
*--s = '-';
}
}
return pc + prints (out, s, width, pad);
}
int fprintf(__FILE *stream, const char *format, ...)
{
return 0;
}
static int print(char **out, const char *format, va_list args )
{
register int width, pad;
register int pc = 0;
char scr[2];
for (; *format != 0; ++format) {
if (*format == '%') {
++format;
width = pad = 0;
if (*format == '\0') break;
if (*format == '%') goto out;
if (*format == '-') {
++format;
pad = PAD_RIGHT;
}
while (*format == '0') {
++format;
pad |= PAD_ZERO;
}
for ( ; *format >= '0' && *format <= '9'; ++format) {
width *= 10;
width += *format - '0';
}
if( *format == 's' ) {
register char *s = (char *)va_arg( args, int );
pc += prints (out, s?s:"(null)", width, pad);
continue;
}
if( *format == 'd' ) {
pc += printi (out, va_arg( args, int ), 10, 1, width, pad, 'a');
continue;
}
if( *format == 'x' ) {
pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'a');
continue;
}
if( *format == 'X' ) {
pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'A');
continue;
}
if( *format == 'u' ) {
pc += printi (out, va_arg( args, int ), 10, 0, width, pad, 'a');
continue;
}
if( *format == 'c' ) {
/* char are converted to int then pushed on the stack */
scr[0] = (char)va_arg( args, int );
scr[1] = '\0';
pc += prints (out, scr, width, pad);
continue;
}
}
else {
out:
printchar (out, *format);
++pc;
}
}
if (out) **out = '\0';
va_end( args );
return pc;
}
int printk(const char *format, ...)
{
va_list args;
va_start( args, format );
return print( 0, format, args );
}
int sprintf(char *out, const char *format, ...)
{
va_list args;
va_start( args, format );
return print( &out, format, args );
}
#ifdef TEST_PRINTF
int main(void)
{
char *ptr = "Hello world!";
char *np = 0;
int i = 5;
unsigned int bs = sizeof(int)*8;
int mi;
char buf[80];
mi = (1 << (bs-1)) + 1;
printf("%s\n", ptr);
printf("printf test\n");
printf("%s is null pointer\n", np);
printf("%d = 5\n", i);
printf("%d = - max int\n", mi);
printf("char %c = 'a'\n", 'a');
printf("hex %x = ff\n", 0xff);
printf("hex %02x = 00\n", 0);
printf("signed %d = unsigned %u = hex %x\n", -3, -3, -3);
printf("%d %s(s)%", 0, "message");
printf("\n");
printf("%d %s(s) with %%\n", 0, "message");
sprintf(buf, "justif: \"%-10s\"\n", "left"); printf("%s", buf);
sprintf(buf, "justif: \"%10s\"\n", "right"); printf("%s", buf);
sprintf(buf, " 3: %04d zero padded\n", 3); printf("%s", buf);
sprintf(buf, " 3: %-4d left justif.\n", 3); printf("%s", buf);
sprintf(buf, " 3: %4d right justif.\n", 3); printf("%s", buf);
sprintf(buf, "-3: %04d zero padded\n", -3); printf("%s", buf);
sprintf(buf, "-3: %-4d left justif.\n", -3); printf("%s", buf);
sprintf(buf, "-3: %4d right justif.\n", -3); printf("%s", buf);
return 0;
}
/*
* if you compile this file with
* gcc -Wall $(YOUR_C_OPTIONS) -DTEST_PRINTF -c printf.c
* you will get a normal warning:
* printf.c:214: warning: spurious trailing `%' in format
* this line is testing an invalid % at the end of the format string.
*
* this should display (on 32bit int machine) :
*
* Hello world!
* printf test
* (null) is null pointer
* 5 = 5
* -2147483647 = - max int
* char a = 'a'
* hex ff = ff
* hex 00 = 00
* signed -3 = unsigned 4294967293 = hex fffffffd
* 0 message(s)
* 0 message(s) with %
* justif: "left "
* justif: " right"
* 3: 0003 zero padded
* 3: 3 left justif.
* 3: 3 right justif.
* -3: -003 zero padded
* -3: -3 left justif.
* -3: -3 right justif.
*/
#endif

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<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
<html>
<head>
<link rel="stylesheet" type="text/css" href="../../../../.docsrc/AVR32_ns.css">
</head>
<body>
<p align="left" class="whs2"><a href="../../../AVR32_SERVICES_Readme.html"<font color="red"></font>Back to the SERVICES main page</a></p>
<h1 align="center" class="whs1">AVR&reg;32 AT32UC3 Series Software Framework: Basic Web server and TFTP server example.<br>
</h1>
<p align="center" class="whs2">Copyright &copy; 2007 Atmel Corporation</p>
<h2>Introduction</h2>
<p>This example implements a basic Web server and a basic TFTP server.
It is running on top of the <a href="http://savannah.nongnu.org/projects/lwip"<font color="red"></font>lwIP TCP/IP stack</a> and the AVR32 UC3 <a href="http://freertos.org"<font color="red"></font>freeRTOS.org</a> port.</p>
<p>This example thus contains a port of the <a href="http://savannah.nongnu.org/projects/lwip"<font color="red"></font>lwIP TCP/IP stack</a>. This port is using both the AVR32 UC3 <a href="http://freertos.org"<font color="red"></font>freeRTOS.org</a> port and the AVR32 UC3A MACB interface for the Ethernet access.</p>
<p>&nbsp;</p>
<h2>lwIP TCP/IP stack</h2>
<p>lwIP is an implementation of the TCP/IP protocol suite. The focus of the lwIP TCP/IP implementation is to reduce resource usage while still having a full scale TCP.</p>
<DT><B><u>lwIP features</u>:</B>
<DD><p class="whs3"><li>IP (Internet Protocol) including packet forwarding over multiple network interfaces</p></li>
<DD><p class="whs3"><li>ICMP (Internet Control Message Protocol) for network maintenance and debugging</p></li>
<DD><p class="whs3"><li>UDP (User Datagram Protocol) including experimental UDP-lite extensions</p></li>
<DD><p class="whs3"><li>TCP (Transmission Control Protocol) with congestion control, RTT estimation and fast recovery/fast retransmit</p></li>
<DD><p class="whs3"><li>Specialized raw API for enhanced performance</p></li>
<DD><p class="whs3"><li>Optional Berkeley-alike socket API</p></li>
<DD><p class="whs3"><li>DHCP (Dynamic Host Configuration Protocol)</p></li>
<DD><p class="whs3"><li>PPP (Point-to-Point Protocol)</p></li>
<DD><p class="whs3"><li>ARP (Address Resolution Protocol) for Ethernet</p></li>
<p>lwIP is freely available (under a BSD-style license) in C source code format and can be downloaded from the <a href="http://savannah.nongnu.org/projects/lwip"<font color="red"></font>development homepage</a>.</p>
<p>&nbsp;</p>
<h2>The Basic Web server</h2>
<p>Implements a simplistic WEB server. To use this demo part, define HTTP_USED to 1, else define to 0. (default is 1)</p>
<B><u>Demo description</u>:</B> Every time a connection is made and data is received, a dynamic page that shows the current FreeRTOS.org kernel statistics is generated and returned. The connection is then closed.</p>
<B><u>Note</u>:</B> The WEB server is reachable at the IP address 192.168.0.2.
<p>&nbsp;</p>
<h2>The Basic TFTP server</h2>
<p>Implements a simplistic TFTP server. To use this demo part, define TFTP_USED to 1, else define to 0. (default is 1)</p>
<DT><B><u>Demo description</u>:</B>
<DD><p class="whs3"><li>To put a file onto the TFTP server (Supported file size < 2048 bytes), on a PC command line type <i><b>tftp 192.168.0.2 PUT "a_file"</i></b>: this will copy <i>a_file</i> from your hard drive to a RAM buffer of the demo.</p></li>
<DD><p class="whs3"><li>To get a file from the TFTP server, on a PC command line type <i><b>tftp 192.168.0.2 GET "a_file"</i></b>: this will copy <i>a_file</i> from the RAM buffer of the application to the PC's hard drive.</p></li>
<B><u>Note 1</u>:</B> only one file at a time is supported on this TFTP server. This is because the TFTP server being a simplistic example, it does not use a file system to store files but a predefined RAM area of 2048 Bytes.
<p><B><u>Note 2</u>:</B> The TFTP server is reachable at the IP address 192.168.0.2.</p>
<p>&nbsp;</p>
<h2>The Basic SMTP client</h2>
<p>Implements a simplistic SMTP client. To use this demo part, define SMTP_USED to 1, else define to 0. (default is 0)</p>
<DT><B><u>Demo description</u>:</B>
<DD><p class="whs3"><li>Prior to compile and run the SMTP client, you will have to configure the connection settings :
<DD><DD><li>Server address : default is <i>192.168.0.1</i>.</li>
<DD><DD><li>Server name : used in the EHLO field, default is <i>smtp.domain.com</i>.</li>
<DD><DD><li>Mail sender : used in the mailfrom field, default is <i>sender@domain.com</i>.</li>
<DD><DD><li>Mail recipient : used in the mailto field, default is <i>receiver@domain.com</i>.</li>
<DD><DD><li>Mail content : default is <i>Subject: *** SPAM ***\r\nFROM: \"Your Name here\" <sender@domain.com>\r\nTO: \"Your Contact here\" <receiver@domain.com>\r\n\r\nSay what you want here</i>.</li>
</p></li>
<DD><p class="whs3"><li>Once all fields are configured, remove the <i>#error</i> lines to allow compilation.</p></li>
<DD><p class="whs3"><li>Run the software and press Push Button 0 to send an email.</p></li>
<p>&nbsp;</p>
<h2>Device Info</h2>
All AVR32 UC3A devices with a MACB module can be used. This example has been tested with the following setup(s):
<DD><p class="whs3"><li type="disc">AT32UC3A0512 on the EVK1100 evaluation kit.</li></p>
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<p class=legalfooter>AVR is a registered trademark of
Atmel Corporation.</p>
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