mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-02 12:24:07 -04:00
Add FreeRTOS-Plus directory.
This commit is contained in:
Richard Barry
parent
7bd5f21ad5
commit
f508a5f653
6798 changed files with 134949 additions and 19 deletions
|
|
@ -0,0 +1,139 @@
|
|||
|
||||
|
||||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*
|
||||
* cgc.c
|
||||
*
|
||||
* Created on: 01 Oct 2011
|
||||
* Author: RJW
|
||||
* Reneses Electronics Europe Ltd
|
||||
*/
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
System Includes
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
User Includes
|
||||
******************************************************************************/
|
||||
#include "iodefine.h"
|
||||
#include "cgc.h"
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* */
|
||||
/* Configure the CGC (Clock Generation Circuit) of the RX630 using the */
|
||||
/* using the 7 STEPS specified in cgc.h */
|
||||
/* */
|
||||
/*****************************************************************************/
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
Function : InitCGC
|
||||
Description : Initialises the CGC registers based upon the settings
|
||||
made in file cgc.h
|
||||
Argument : none
|
||||
Return value : none
|
||||
******************************************************************************/
|
||||
void InitCGC(void)
|
||||
{
|
||||
unsigned long i;
|
||||
|
||||
#if (ENABLE_SUB)
|
||||
SYSTEM.SOSCCR.BYTE = 0x00; /* Sub-clock oscillator ON */
|
||||
#else
|
||||
SYSTEM.SOSCCR.BYTE = 0x01; /* Sub-clock oscillator OFF */
|
||||
#endif
|
||||
|
||||
#if (ENABLE_HOCO)
|
||||
SYSTEM.HOCOPCR.BYTE = 0x00; /* HOCO PSU ON */
|
||||
SYSTEM.HOCOCR.BYTE = 0x00; /* HOCO ON */
|
||||
#else
|
||||
SYSTEM.HOCOPCR.BYTE = 0x01; /* HOCO PSU OFF */
|
||||
SYSTEM.HOCOCR.BYTE = 0x01; /* HOCO OFF */
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#if (ENABLE_MAIN)
|
||||
SYSTEM.MOSCWTCR.BYTE = 0x0e; /* Main Clock Oscillator Wait Control Register */
|
||||
/* 262144 states */
|
||||
SYSTEM.MOSCCR.BYTE = 0x00; /* EXTAL ON */
|
||||
#else
|
||||
SYSTEM.MOSCCR.BYTE = 0x01; /* EXTAL OFF */
|
||||
#endif
|
||||
|
||||
|
||||
#if (ENABLE_PLL)
|
||||
SYSTEM.MOSCWTCR.BYTE = 0x0e; /* Main Clock Oscillator Wait Control Register */
|
||||
/* 262144 states */
|
||||
SYSTEM.MOSCCR.BYTE = 0x00; /* EXTAL ON */
|
||||
|
||||
SYSTEM.PLLWTCR.BYTE = 0x0e; /* PLL Wait Control Register */
|
||||
/* 2097152 states */
|
||||
|
||||
SYSTEM.PLLCR2.BYTE = 0x01; /* PLL OFF */
|
||||
|
||||
#if (PLL_INPUT_FREQ_DIV == 1)
|
||||
SYSTEM.PLLCR.BIT.PLIDIV = 0;
|
||||
#elif (PLL_INPUT_FREQ_DIV == 2)
|
||||
SYSTEM.PLLCR.BIT.PLIDIV = 1;
|
||||
#elif (PLL_INPUT_FREQ_DIV == 4)
|
||||
SYSTEM.PLLCR.BIT.PLIDIV = 2;
|
||||
#else
|
||||
SYSTEM.PLLCR.BIT.PLIDIV = 0;
|
||||
#endif
|
||||
SYSTEM.PLLCR.BIT.STC = (PLL_MUL - 1);
|
||||
|
||||
/* External oscillation input selection */
|
||||
SYSTEM.PLLCR2.BYTE = 0x00; /* PLL ON */
|
||||
#else
|
||||
SYSTEM.PLLCR2.BYTE = 0x01; /* PLL OFF */
|
||||
#endif
|
||||
|
||||
for(i = 0; i<2500; i++) /* Wait for stabilisation of */
|
||||
{ /* HOCO, LOCO, PLL and main clock */
|
||||
} /* = 20ms */
|
||||
/* (2500 x 1/125kHz = 20ms) */
|
||||
|
||||
|
||||
SYSTEM.SCKCR.LONG = FCLK_SCKCR |
|
||||
ICLK_SCKCR |
|
||||
PSTOP1_SCKCR |
|
||||
BCLK_SCKCR |
|
||||
PCLK1215_SCKCR |
|
||||
PCLKB_SCKCR |
|
||||
PCLK47_SCKCR |
|
||||
PCLK03_SCKCR ;
|
||||
|
||||
|
||||
SYSTEM.SCKCR2.WORD = UCK_SCKCR2 |
|
||||
IEBCK_SCKCR2 ;
|
||||
|
||||
|
||||
SYSTEM.SCKCR3.WORD = CLK_SOURCE;
|
||||
}
|
||||
|
|
@ -0,0 +1,205 @@
|
|||
|
||||
|
||||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*
|
||||
* cgc.h
|
||||
*
|
||||
* Created on: 01 Oct 2011
|
||||
* Author: RJW
|
||||
* Reneses Electronics Europe Ltd
|
||||
*/
|
||||
|
||||
|
||||
#ifndef CGC_H_
|
||||
#define CGC_H_
|
||||
|
||||
/******************************************************************************
|
||||
Function Prototypes
|
||||
******************************************************************************/
|
||||
void InitCGC(void);
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* */
|
||||
/* Set the CGC (Clock Generation Circuit of the RX630 using the */
|
||||
/* following 7 STEPS */
|
||||
/* */
|
||||
/*****************************************************************************/
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* */
|
||||
/* STEP 1: System Clock Options */
|
||||
/* */
|
||||
/* Enter one of the CLK_SOURCE_ options into the */
|
||||
/* */
|
||||
/* #define CLK_SOURCE ( xxx ) */
|
||||
/* below. */
|
||||
/* This will be the clock source that the device will switch to as part of */
|
||||
/* HardwareSetup() */
|
||||
/* Extra clocks can be enabled in STEP 3. */
|
||||
/* */
|
||||
/* For example */
|
||||
/* #define CLK_SOURCE (CLK_SOURCE_MAIN) */
|
||||
/* */
|
||||
/*****************************************************************************/
|
||||
#define CLK_SOURCE_LOCO 0x0000
|
||||
#define CLK_SOURCE_HOCO 0x0100
|
||||
#define CLK_SOURCE_MAIN 0x0200
|
||||
#define CLK_SOURCE_SUB 0x0300
|
||||
#define CLK_SOURCE_PLL 0x0400
|
||||
|
||||
#define CLK_SOURCE (CLK_SOURCE_PLL)
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* */
|
||||
/* STEP 2: External XTAL values */
|
||||
/* */
|
||||
/* If using the CLK_SOURCE_MAIN, CLK_SOURCE_SUB, CLK_SOURCE_PLL */
|
||||
/* enter the MAIN XTAL and SUB XTAL values here. */
|
||||
/* */
|
||||
/* If using the PLL, enter the PLL multiplier and PLL frequency divder */
|
||||
/* Use the divider so that the input frequency into the PLL is in */
|
||||
/* the range of 4 MHz to 16 MHz. */
|
||||
/* */
|
||||
/* Use the multiplier so that the output frequency of the PLL is in */
|
||||
/* the range of 104MHz to 200Mhz */
|
||||
/* */
|
||||
/* The PLL frequency divider values are: */
|
||||
/* /1, /2, /4 */
|
||||
/* The PLL muliplier values are: */
|
||||
/* x8, x10, x12, x16, x20, x24, x25, x50 */
|
||||
/* */
|
||||
/* Example: */
|
||||
/* XTAL = 12MHz */
|
||||
/* PLL Divider = 1 */
|
||||
/* */
|
||||
/* Therefore, input into PLL = 12M / 1 */
|
||||
/* = 12M */
|
||||
/* PLL Multipler = 16 */
|
||||
/* */
|
||||
/* Therefore, ouput of PLL = 12M x 16 */
|
||||
/* = 192M */
|
||||
/* */
|
||||
/* NOTE: The maximum XTAL is 20MHz */
|
||||
/*****************************************************************************/
|
||||
#define XTAL_FREQUENCY (12000000L)
|
||||
#define PLL_MUL (16)
|
||||
#define PLL_INPUT_FREQ_DIV (1)
|
||||
|
||||
#define SUB_FREQUENCY (32768L)
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* */
|
||||
/* STEP 3: Enable the chosen clock source and any extra clock sources */
|
||||
/* Remeber to enable the clock source chosen in STEP 1. */
|
||||
/* Foe example, if CLK_SOURCE_PLL has been chosen, set */
|
||||
/* #define ENABLE_PLL (1) */
|
||||
/* */
|
||||
/*****************************************************************************/
|
||||
#define ENABLE_HOCO (1)
|
||||
#define ENABLE_SUB (0)
|
||||
#define ENABLE_MAIN (0)
|
||||
#define ENABLE_PLL (1)
|
||||
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* */
|
||||
/* STEP 4: */
|
||||
/* Enter the Clock Divders for */
|
||||
/* - FCLK_DIV, ICLK_DIV, BCLK_DIV, PCLKA_DIV, PCLKB_DIV */
|
||||
/* Valid values are 1, 2, 4, 8, 16, 32 and 64 */
|
||||
/* */
|
||||
/* The Clock Value being divided is: */
|
||||
/* If LOCO, 125kHz */
|
||||
/* If HOCO, 50MHz */
|
||||
/* If SUB, the value of SUB specified in STEP 2 */
|
||||
/* If MAIN, the value of XTAL specified in STEP 2 */
|
||||
/* If PLL, the result of the XTAL, PLL Div, PLL Mul specified in STEP 2 */
|
||||
/*****************************************************************************/
|
||||
#define FCLK_DIV (4)
|
||||
#define ICLK_DIV (2)
|
||||
#define BCLK_DIV (4)
|
||||
#define PCLK1215_DIV (2) /* Do not change this */
|
||||
#define PCLKB_DIV (4)
|
||||
#define PCLK47_DIV (2) /* Do not change this */
|
||||
#define PCLK03_DIV (2) /* Do not change this */
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* */
|
||||
/* STEP 5: */
|
||||
/* Enter the Clock Divder for */
|
||||
/* - IEBCK_DIV */
|
||||
/* Valid values are 2, 4, 6, 8, 16, 32 and 64 */
|
||||
/* */
|
||||
/* The Clock Value being divided is: */
|
||||
/* If LOCO, 125kHz */
|
||||
/* If HOCO, 50MHz */
|
||||
/* If SUB, the value of SUB specified in STEP 2 */
|
||||
/* If MAIN, the value of XTAL specified in STEP 2 */
|
||||
/* If PLL, the result of the XTAL, PLL Div, PLL Mul specified in STEP 2 */
|
||||
/*****************************************************************************/
|
||||
#define IEBCK_DIV (2)
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* */
|
||||
/* STEP 6: */
|
||||
/* Enter the Clock Divder for */
|
||||
/* - UCK_DIV */
|
||||
/* Valid values are 3, 4 */
|
||||
/* */
|
||||
/* The Clock Value being divided is: */
|
||||
/* If LOCO, 125kHz */
|
||||
/* If HOCO, 50MHz */
|
||||
/* If SUB, the value of SUB specified in STEP 2 */
|
||||
/* If MAIN, the value of XTAL specified in STEP 2 */
|
||||
/* If PLL, the result of the XTAL, PLL Div, PLL Mul specified in STEP 2 */
|
||||
/*****************************************************************************/
|
||||
#define UCK_DIV (3)
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* */
|
||||
/* STEP 7: */
|
||||
/* Specify the use of BCLK pin */
|
||||
/* To ENABLE, set to (0) */
|
||||
/* To DISABLE, set to (1) */
|
||||
/* */
|
||||
/*****************************************************************************/
|
||||
#define BCLK_PIN (1)
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Clock configuration is now complete. */
|
||||
/*****************************************************************************/
|
||||
#include "cgc_set.h"
|
||||
#include "cgc_error.h"
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
#ifndef CGC_ERROR_H_
|
||||
#define CGC_ERROR_H_
|
||||
|
||||
/* Error checking macros for the clock selction and clock enable defines */
|
||||
|
||||
#if ( (CLK_SOURCE != CLK_SOURCE_LOCO) && \
|
||||
(CLK_SOURCE != CLK_SOURCE_HOCO) && \
|
||||
(CLK_SOURCE != CLK_SOURCE_MAIN) && \
|
||||
(CLK_SOURCE != CLK_SOURCE_SUB) && \
|
||||
(CLK_SOURCE != CLK_SOURCE_PLL) )
|
||||
#error "No CLK_SOURCE specified. Please specify a valid CLK_SOURCE";
|
||||
#endif
|
||||
|
||||
|
||||
#if (CLK_SOURCE == CLK_SOURCE_HOCO) && (ENABLE_HOCO == 0)
|
||||
#error "HOCO has been specified as the CLK_SOURCE but ENABLE_HOCO is (0). Please set to (1) in file cgc.h"
|
||||
#endif
|
||||
|
||||
#if (CLK_SOURCE == CLK_SOURCE_MAIN) && (ENABLE_MAIN == 0)
|
||||
#error "HOCO has been specified as the CLK_SOURCE but ENABLE_HOCO is (0). Please set to (1) in file cgc.h"
|
||||
#endif
|
||||
|
||||
#if (CLK_SOURCE == CLK_SOURCE_SUB) && (ENABLE_SUB == 0)
|
||||
#error "HOCO has been specified as the CLK_SOURCE but ENABLE_HOCO is (0). Please set to (1) in file cgc.h"
|
||||
#endif
|
||||
|
||||
#if (CLK_SOURCE == CLK_SOURCE_PLL) && (ENABLE_PLL == 0)
|
||||
#error "PLL has been specified as the CLK_SOURCE but ENABLE_PLL is (0). Please set to (1) in file cgc.h"
|
||||
#endif
|
||||
|
||||
#if ( FCLK_FREQUENCY > 50000000L )
|
||||
#error "FCLK_FREQUENCY Error: Please enter a valid divider value"
|
||||
#endif
|
||||
|
||||
#if ( ICLK_FREQUENCY > 100000000L )
|
||||
#error "ICLK_FREQUENCY Error: Please enter a valid divider value"
|
||||
#endif
|
||||
|
||||
#if ( BCLK_FREQUENCY > 100000000L )
|
||||
#error "BCLK_FREQUENCY Error: Please enter a valid divider value"
|
||||
#endif
|
||||
|
||||
#if ( PCLKB_FREQUENCY > 50000000L )
|
||||
#error "PCLKB_FREQUENCY Error: Please enter a valid divider value"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,233 @@
|
|||
#ifndef CGC_SET_VALUES_H_
|
||||
#define CGC_SET_VALUES_H_
|
||||
|
||||
/* Do not modify these macros. These values are used to initialise
|
||||
the SCKCR and SCKCR2 registers based upon the above values. */
|
||||
#if (FCLK_DIV == 64)
|
||||
#define FCLK_SCKCR 0x60000000L
|
||||
#elif (FCLK_DIV == 32)
|
||||
#define FCLK_SCKCR 0x50000000L
|
||||
#elif (FCLK_DIV == 16)
|
||||
#define FCLK_SCKCR 0x40000000L
|
||||
#elif (FCLK_DIV == 8)
|
||||
#define FCLK_SCKCR 0x30000000L
|
||||
#elif (FCLK_DIV == 4)
|
||||
#define FCLK_SCKCR 0x20000000L
|
||||
#elif (FCLK_DIV == 2)
|
||||
#define FCLK_SCKCR 0x10000000L
|
||||
#elif(FCLK_DIV == 1)
|
||||
#define FCLK_SCKCR 0x00000000L
|
||||
#else
|
||||
#define FCLK_SCKCR 0x10000000L
|
||||
#endif
|
||||
|
||||
|
||||
#if (ICLK_DIV == 64)
|
||||
#define ICLK_SCKCR 0x06000000L
|
||||
#elif (ICLK_DIV == 32)
|
||||
#define ICLK_SCKCR 0x05000000L
|
||||
#elif (ICLK_DIV == 16)
|
||||
#define ICLK_SCKCR 0x04000000L
|
||||
#elif (ICLK_DIV == 8)
|
||||
#define ICLK_SCKCR 0x03000000L
|
||||
#elif (ICLK_DIV == 4)
|
||||
#define ICLK_SCKCR 0x02000000L
|
||||
#elif (ICLK_DIV == 2)
|
||||
#define ICLK_SCKCR 0x01000000L
|
||||
#elif (ICLK_DIV == 1)
|
||||
#define ICLK_SCKCR 0x00000000L
|
||||
#else
|
||||
#define ICLK_SCKCR 0x01000000L
|
||||
#endif
|
||||
|
||||
|
||||
#if (BCLK_PIN == 1)
|
||||
#define PSTOP1_SCKCR 0x00800000L
|
||||
#elif
|
||||
#define PSTOP1_SCKCR 0x00000000L
|
||||
#endif
|
||||
|
||||
|
||||
#if (BCLK_DIV == 64)
|
||||
#define BCLK_SCKCR 0x00060000L
|
||||
#elif (BCLK_DIV == 32)
|
||||
#define BCLK_SCKCR 0x00050000L
|
||||
#elif (BCLK_DIV == 16)
|
||||
#define BCLK_SCKCR 0x00040000L
|
||||
#elif (BCLK_DIV == 8)
|
||||
#define BCLK_SCKCR 0x00030000L
|
||||
#elif (BCLK_DIV == 4)
|
||||
#define BCLK_SCKCR 0x00020000L
|
||||
#elif (BCLK_DIV == 2)
|
||||
#define BCLK_SCKCR 0x00010000L
|
||||
#elif (BCLK_DIV == 1)
|
||||
#define BCLK_SCKCR 0x00000000L
|
||||
#else
|
||||
#define BCLK_SCKCR 0x00010000L
|
||||
#endif
|
||||
|
||||
|
||||
#if (PCLK1215_DIV == 64)
|
||||
#define PCLK1215_SCKCR 0x00006000L
|
||||
#elif (PCLK1215_DIV == 32)
|
||||
#define PCLK1215_SCKCR 0x00005000L
|
||||
#elif (PCLK1215_DIV == 16)
|
||||
#define PCLK1215_SCKCR 0x00004000L
|
||||
#elif (PCLK1215_DIV == 8)
|
||||
#define PCLK1215_SCKCR 0x00003000L
|
||||
#elif (PCLK1215_DIV == 4)
|
||||
#define PCLK1215_SCKCR 0x00002000L
|
||||
#elif (PCLK1215_DIV == 2)
|
||||
#define PCLK1215_SCKCR 0x00001000L
|
||||
#elif (PCLK1215_DIV == 1)
|
||||
#define PCLK1215_SCKCR 0x00000000L
|
||||
#else
|
||||
#define PCLK1215_SCKCR 0x00001000L
|
||||
#endif
|
||||
|
||||
|
||||
#if (PCLKB_DIV == 64)
|
||||
#define PCLKB_SCKCR 0x00000600L
|
||||
#elif (PCLKB_DIV == 32)
|
||||
#define PCLKB_SCKCR 0x00000500L
|
||||
#elif (PCLKB_DIV == 16)
|
||||
#define PCLKB_SCKCR 0x00000400L
|
||||
#elif (PCLKB_DIV == 8)
|
||||
#define PCLKB_SCKCR 0x00000300L
|
||||
#elif (PCLKB_DIV == 4)
|
||||
#define PCLKB_SCKCR 0x00000200L
|
||||
#elif (PCLKB_DIV == 2)
|
||||
#define PCLKB_SCKCR 0x00000100L
|
||||
#elif (PCLKB_DIV == 1)
|
||||
#define PCLKB_SCKCR 0x00000000L
|
||||
#else
|
||||
#define PCLKB_SCKCR 0x00000100L
|
||||
#endif
|
||||
|
||||
|
||||
#if (PCLK47_DIV == 64)
|
||||
#define PCLK47_SCKCR 0x00000060L
|
||||
#elif (PCLK47_DIV == 32)
|
||||
#define PCLK47_SCKCR 0x00000050L
|
||||
#elif (PCLK47_DIV == 16)
|
||||
#define PCLK47_SCKCR 0x00000040L
|
||||
#elif (PCLK47_DIV == 8)
|
||||
#define PCLK47_SCKCR 0x00000030L
|
||||
#elif (PCLK47_DIV == 4)
|
||||
#define PCLK47_SCKCR 0x00000020L
|
||||
#elif (PCLK47_DIV == 2)
|
||||
#define PCLK47_SCKCR 0x00000010L
|
||||
#elif (PCLK47_DIV == 1)
|
||||
#define PCLK47_SCKCR 0x00000000L
|
||||
#else
|
||||
#define PCLK47_SCKCR 0x00000010L
|
||||
#endif
|
||||
|
||||
|
||||
#if (PCLK03_DIV == 64)
|
||||
#define PCLK03_SCKCR 0x00000006L
|
||||
#elif (PCLK03_DIV == 32)
|
||||
#define PCLK03_SCKCR 0x00000005L
|
||||
#elif (PCLK03_DIV == 16)
|
||||
#define PCLK03_SCKCR 0x00000004L
|
||||
#elif (PCLK03_DIV == 8)
|
||||
#define PCLK03_SCKCR 0x00000003L
|
||||
#elif (PCLK03_DIV == 4)
|
||||
#define PCLK03_SCKCR 0x00000002L
|
||||
#elif (PCLK03_DIV == 2)
|
||||
#define PCLK03_SCKCR 0x00000001L
|
||||
#elif (PCLK03_DIV == 1)
|
||||
#define PCLK03_SCKCR 0x00000000L
|
||||
#else
|
||||
#define PCLK03_SCKCR 0x00000001L
|
||||
#endif
|
||||
|
||||
|
||||
#if (UCK_DIV == 6)
|
||||
#define UCK_SCKCR2 0x00C0L
|
||||
#elif (UCK_DIV == 64)
|
||||
#define UCK_SCKCR2 0x0060L
|
||||
#elif (UCK_DIV == 32)
|
||||
#define UCK_SCKCR2 0x0050L
|
||||
#elif (UCK_DIV == 16)
|
||||
#define UCK_SCKCR2 0x0040L
|
||||
#elif (UCK_DIV == 8)
|
||||
#define UCK_SCKCR2 0x0030L
|
||||
#elif (UCK_DIV == 4)
|
||||
#define UCK_SCKCR2 0x0020L
|
||||
#elif (UCK_DIV == 2)
|
||||
#define UCK_SCKCR2 0x0010L
|
||||
#else
|
||||
#define UCK_SCKCR2 0x0010L
|
||||
#endif
|
||||
|
||||
|
||||
#if (IEBCK_DIV == 3)
|
||||
#define IEBCK_SCKCR2 0x00000020L
|
||||
#elif (IEBCK_DIV == 4)
|
||||
#define IEBCK_SCKCR2 0x00000030L
|
||||
#else
|
||||
#define IEBCK_SCKCR2 0x00000030L
|
||||
#endif
|
||||
|
||||
|
||||
#if (CLK_SOURCE == CLK_SOURCE_LOCO)
|
||||
/* Internal LOCO circuit - 125kHz*/
|
||||
#define CLK_FREQUENCY (125000L)
|
||||
#define FCLK_FREQUENCY (CLK_FREQUENCY / FCLK_DIV)
|
||||
#define ICLK_FREQUENCY (CLK_FREQUENCY / ICLK_DIV)
|
||||
#define BCLK_FREQUENCY (CLK_FREQUENCY / BCLK_DIV)
|
||||
#define PCLKA_FREQUENCY (CLK_FREQUENCY / PCLK1215_DIV)
|
||||
#define PCLKB_FREQUENCY (CLK_FREQUENCY / PCLKB_DIV)
|
||||
#define PCLK47_FREQUENCY (CLK_FREQUENCY / PCLK47_DIV)
|
||||
#define PCLK03_FREQUENCY (CLK_FREQUENCY / PCLK03_DIV)
|
||||
|
||||
|
||||
#elif (CLK_SOURCE == CLK_SOURCE_HOCO)
|
||||
/* Internal high speed on-chip oscillator (HOCO) */
|
||||
#define CLK_FREQUENCY (50000000L)
|
||||
#define FCLK_FREQUENCY (CLK_FREQUENCY / FCLK_DIV)
|
||||
#define ICLK_FREQUENCY (CLK_FREQUENCY / ICLK_DIV)
|
||||
#define BCLK_FREQUENCY (CLK_FREQUENCY / BCLK_DIV)
|
||||
#define PCLKA_FREQUENCY (CLK_FREQUENCY / PCLK1215_DIV)
|
||||
#define PCLKB_FREQUENCY (CLK_FREQUENCY / PCLKB_DIV)
|
||||
#define PCLK47_FREQUENCY (CLK_FREQUENCY / PCLK47_DIV)
|
||||
#define PCLK03_FREQUENCY (CLK_FREQUENCY / PCLK03_DIV)
|
||||
|
||||
|
||||
#elif (CLK_SOURCE == CLK_SOURCE_MAIN)
|
||||
/* External XTAL, but not via the PLL circuit */
|
||||
#define FCLK_FREQUENCY (XTAL_FREQUENCY / FCLK_DIV)
|
||||
#define ICLK_FREQUENCY (XTAL_FREQUENCY / ICLK_DIV)
|
||||
#define BCLK_FREQUENCY (XTAL_FREQUENCY / BCLK_DIV)
|
||||
#define PCLKA_FREQUENCY (XTAL_FREQUENCY / PCLK1215_DIV)
|
||||
#define PCLKB_FREQUENCY (XTAL_FREQUENCY / PCLKB_DIV)
|
||||
#define PCLK47_FREQUENCY (XTAL_FREQUENCY / PCLK47_DIV)
|
||||
#define PCLK03_FREQUENCY (XTAL_FREQUENCY / PCLK03_DIV)
|
||||
|
||||
|
||||
#elif (CLK_SOURCE == CLK_SOURCE_SUB)
|
||||
/* External 32khZ XTAL */
|
||||
#define FCLK_FREQUENCY (SUB_FREQUENCY / FCLK_DIV)
|
||||
#define ICLK_FREQUENCY (SUB_FREQUENCY / ICLK_DIV)
|
||||
#define BCLK_FREQUENCY (SUB_FREQUENCY / BCLK_DIV)
|
||||
#define PCLKA_FREQUENCY (SUB_FREQUENCY / PCLK1215_DIV)
|
||||
#define PCLKB_FREQUENCY (SUB_FREQUENCY / PCLKB_DIV)
|
||||
#define PCLK47_FREQUENCY (SUB_FREQUENCY / PCLK47_DIV)
|
||||
#define PCLK03_FREQUENCY (SUB_FREQUENCY / PCLK03_DIV)
|
||||
|
||||
|
||||
#elif (CLK_SOURCE == CLK_SOURCE_PLL)
|
||||
/* External XTAL, but using the PLL circuit */
|
||||
#define PLL_FREQUENCY (XTAL_FREQUENCY * (PLL_MUL / PLL_INPUT_FREQ_DIV))
|
||||
#define FCLK_FREQUENCY (PLL_FREQUENCY / FCLK_DIV)
|
||||
#define ICLK_FREQUENCY (PLL_FREQUENCY / ICLK_DIV)
|
||||
#define BCLK_FREQUENCY (PLL_FREQUENCY / BCLK_DIV)
|
||||
#define PCLKA_FREQUENCY (PLL_FREQUENCY / PCLK1215_DIV)
|
||||
#define PCLKB_FREQUENCY (PLL_FREQUENCY / PCLKB_DIV)
|
||||
#define PCLK47_FREQUENCY (PLL_FREQUENCY / PCLK47_DIV)
|
||||
#define PCLK03_FREQUENCY (PLL_FREQUENCY / PCLK03_DIV)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
/***********************************************************************/
|
||||
/* */
|
||||
/* FILE :dbsct.c */
|
||||
/* DATE :Wed, Aug 11, 2010 */
|
||||
/* DESCRIPTION :Setting of B,R Section */
|
||||
/* CPU TYPE :Other */
|
||||
/* */
|
||||
/* This file is generated by Renesas Project Generator (Ver.4.50). */
|
||||
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Device : RX
|
||||
*
|
||||
* File Name : dbsct.c
|
||||
*
|
||||
* Abstract : Setting of B,R Section.
|
||||
*
|
||||
* History : 1.00 (2009-08-07)
|
||||
*
|
||||
* NOTE : THIS IS A TYPICAL EXAMPLE.
|
||||
*
|
||||
* Copyright(c) 2009 Renesas Technology Corp.
|
||||
* And Renesas Solutions Corp.,All Rights Reserved.
|
||||
*
|
||||
*********************************************************************/
|
||||
|
||||
#include "typedefine.h"
|
||||
|
||||
#pragma unpack
|
||||
|
||||
#pragma section C C$DSEC
|
||||
extern const struct {
|
||||
_UBYTE *rom_s; /* Start address of the initialized data section in ROM */
|
||||
_UBYTE *rom_e; /* End address of the initialized data section in ROM */
|
||||
_UBYTE *ram_s; /* Start address of the initialized data section in RAM */
|
||||
} _DTBL[] = {
|
||||
{ __sectop("D"), __secend("D"), __sectop("R") },
|
||||
{ __sectop("D_2"), __secend("D_2"), __sectop("R_2") },
|
||||
{ __sectop("D_1"), __secend("D_1"), __sectop("R_1") }
|
||||
};
|
||||
#pragma section C C$BSEC
|
||||
extern const struct {
|
||||
_UBYTE *b_s; /* Start address of non-initialized data section */
|
||||
_UBYTE *b_e; /* End address of non-initialized data section */
|
||||
} _BTBL[] = {
|
||||
{ __sectop("B"), __secend("B") },
|
||||
{ __sectop("B_2"), __secend("B_2") },
|
||||
{ __sectop("B_1"), __secend("B_1") }
|
||||
};
|
||||
|
||||
#pragma section
|
||||
|
||||
/*
|
||||
** CTBL prevents excessive output of L1100 messages when linking.
|
||||
** Even if CTBL is deleted, the operation of the program does not change.
|
||||
*/
|
||||
_UBYTE * const _CTBL[] = {
|
||||
__sectop("C_1"), __sectop("C_2"), __sectop("C"),
|
||||
__sectop("W_1"), __sectop("W_2"), __sectop("W")
|
||||
};
|
||||
|
||||
#pragma packoption
|
||||
|
|
@ -0,0 +1,154 @@
|
|||
/******************************************************************************
|
||||
* DISCLAIMER
|
||||
|
||||
* This software is supplied by Renesas Technology Corp. and is only
|
||||
* intended for use with Renesas products. No other uses are authorized.
|
||||
|
||||
* This software is owned by Renesas Technology Corp. and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES
|
||||
* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY,
|
||||
* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
|
||||
* PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY
|
||||
* DISCLAIMED.
|
||||
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
|
||||
* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS
|
||||
* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
|
||||
* Renesas reserves the right, without notice, to make changes to this
|
||||
* software and to discontinue the availability of this software.
|
||||
* By using this software, you agree to the additional terms and
|
||||
* conditions found by accessing the following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
******************************************************************************
|
||||
* Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
|
||||
*******************************************************************************
|
||||
* File Name : hwsetup.c
|
||||
* Version : 1.00
|
||||
* Description : Power up hardware initializations
|
||||
******************************************************************************
|
||||
* History : DD.MM.YYYY Version Description
|
||||
* : 15.02.2010 1.00 First Release
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
******************************************************************************/
|
||||
#include <stdint.h>
|
||||
#include "iodefine.h"
|
||||
#include "cgc.h"
|
||||
#include "rskrx630def.h"
|
||||
|
||||
/******************************************************************************
|
||||
Typedef definitions
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
Macro definitions
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
Private global variables and functions
|
||||
******************************************************************************/
|
||||
void io_set_cpg(void);
|
||||
void ConfigurePortPins(void);
|
||||
void EnablePeripheralModules(void);
|
||||
|
||||
/******************************************************************************
|
||||
* Function Name: HardwareSetup
|
||||
* Description : This function does initial setting for CPG port pins used in
|
||||
* : the Demo including the MII pins of the Ethernet PHY connection.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
******************************************************************************/
|
||||
void HardwareSetup(void)
|
||||
{
|
||||
/* Gain access to the System control registers */
|
||||
/* Refer to section 13 of the Hardware User Manual for further details */
|
||||
SYSTEM.PRCR.WORD = 0xA503;
|
||||
|
||||
/* Gain access to the Port Function Select Registers */
|
||||
/* Refer to section 21 of the Hardware User Manual for further details */
|
||||
MPC.PWPR.BIT.B0WI = 0;
|
||||
MPC.PWPR.BIT.PFSWE = 1;
|
||||
|
||||
/* CPG setting */
|
||||
/* User defined values for XTAL, Clock Divders etc are set in cgc.h */
|
||||
InitCGC();
|
||||
|
||||
/* Setup the port pins */
|
||||
ConfigurePortPins();
|
||||
|
||||
/* Enables peripherals */
|
||||
EnablePeripheralModules();
|
||||
|
||||
#if INCLUDE_LCD == 1
|
||||
/* Initialize display */
|
||||
InitialiseDisplay();
|
||||
#endif
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Function Name: EnablePeripheralModules
|
||||
* Description : Enables Peripheral Modules before use
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
******************************************************************************/
|
||||
void EnablePeripheralModules(void)
|
||||
{
|
||||
/* Module standby clear */
|
||||
SYSTEM.MSTPCRA.BIT.MSTPA15 = 0; /* CMT0 */
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Function Name: ConfigurePortPins
|
||||
* Description : Configures port pins.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
******************************************************************************/
|
||||
void ConfigurePortPins(void)
|
||||
{
|
||||
/* Port pins default to inputs. To ensure safe initialisation set the pin states
|
||||
before changing the data direction registers. This will avoid any unintentional
|
||||
state changes on the external ports.
|
||||
Many peripheral modules will override the setting of the port registers. Ensure
|
||||
that the state is safe for external devices if the internal peripheral module is
|
||||
disabled or powered down. */
|
||||
|
||||
/* Set initial LED pin state to off */
|
||||
LED0 = 1;
|
||||
LED1 = 1;
|
||||
LED2 = 1;
|
||||
LED3 = 1;
|
||||
/* Configure LED 0-3 pin settings */
|
||||
LED0_PDR = 1;
|
||||
LED1_PDR = 1;
|
||||
LED2_PDR = 1;
|
||||
LED3_PDR = 1;
|
||||
|
||||
/* Configure SW 1-3 pin settings */
|
||||
/* No need to configure inputs as they are inputs by default */
|
||||
|
||||
#if INCLUDE_LCD == 1
|
||||
/* Set LCD pins as outputs */
|
||||
/* LCD-RS */
|
||||
LCD_RS_PDR = 1;
|
||||
/* LCD-EN */
|
||||
LCD_EN = 1;
|
||||
/*LCD-data */
|
||||
LCD_DATA_PDR = 0xF0;
|
||||
#endif
|
||||
}
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/***********************************************************************/
|
||||
/* */
|
||||
/* FILE :intprg.c */
|
||||
/* DATE :Wed, Aug 11, 2010 */
|
||||
/* DESCRIPTION :Interrupt Program */
|
||||
/* CPU TYPE :Other */
|
||||
/* */
|
||||
/* This file is generated by Renesas Project Generator (Ver.4.50). */
|
||||
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Device : RX/RX600
|
||||
*
|
||||
* File Name : intprg.c
|
||||
*
|
||||
* Abstract : Interrupt Program.
|
||||
*
|
||||
* History : 1.00 (2009-08-07)
|
||||
*
|
||||
* NOTE : THIS IS A TYPICAL EXAMPLE.
|
||||
*
|
||||
* Copyright(c) 2009 Renesas Technology Corp.
|
||||
* And Renesas Solutions Corp.,All Rights Reserved.
|
||||
*
|
||||
*********************************************************************/
|
||||
|
||||
#include <machine.h>
|
||||
#include "vect.h"
|
||||
#pragma section IntPRG
|
||||
|
||||
// Exception(Supervisor Instruction)
|
||||
void Excep_SuperVisorInst(void){/* brk(); */}
|
||||
|
||||
// Exception(Undefined Instruction)
|
||||
void Excep_UndefinedInst(void){/* brk(); */}
|
||||
|
||||
// Exception(Floating Point)
|
||||
void Excep_FloatingPoint(void){/* brk(); */}
|
||||
|
||||
// NMI
|
||||
void NonMaskableInterrupt(void){/* brk(); */}
|
||||
|
||||
// Dummy
|
||||
void Dummy(void){/* brk(); */}
|
||||
|
||||
// BRK
|
||||
void Excep_BRK(void){ wait(); }
|
||||
|
||||
|
|
@ -0,0 +1,120 @@
|
|||
|
||||
; Comment out the orginal code
|
||||
.IF 0
|
||||
|
||||
;------------------------------------------------------------------------
|
||||
; |
|
||||
; FILE :lowlvl.src |
|
||||
; DATE :Wed, Jun 16, 2010 |
|
||||
; DESCRIPTION :Program of Low level |
|
||||
; CPU TYPE :Other |
|
||||
; |
|
||||
; This file is generated by Renesas Project Generator (Ver.4.50). |
|
||||
; NOTE:THIS IS A TYPICAL EXAMPLE. |
|
||||
; |
|
||||
;------------------------------------------------------------------------
|
||||
|
||||
|
||||
.GLB _charput
|
||||
.GLB _charget
|
||||
|
||||
SIM_IO .EQU 0h
|
||||
|
||||
.SECTION P,CODE
|
||||
;-----------------------------------------------------------------------
|
||||
; _charput:
|
||||
;-----------------------------------------------------------------------
|
||||
_charput:
|
||||
MOV.L #IO_BUF,R2
|
||||
MOV.B R1,[R2]
|
||||
MOV.L #1220000h,R1
|
||||
MOV.L #PARM,R3
|
||||
MOV.L R2,[R3]
|
||||
MOV.L R3,R2
|
||||
MOV.L #SIM_IO,R3
|
||||
JSR R3
|
||||
RTS
|
||||
|
||||
;-----------------------------------------------------------------------
|
||||
; _charget:
|
||||
;-----------------------------------------------------------------------
|
||||
_charget:
|
||||
MOV.L #1210000h,R1
|
||||
MOV.L #IO_BUF,R2
|
||||
MOV.L #PARM,R3
|
||||
MOV.L R2,[R3]
|
||||
MOV.L R3,R2
|
||||
MOV.L #SIM_IO,R3
|
||||
JSR R3
|
||||
MOV.L #IO_BUF,R2
|
||||
MOVU.B [R2],R1
|
||||
RTS
|
||||
|
||||
;-----------------------------------------------------------------------
|
||||
; I/O Buffer
|
||||
;-----------------------------------------------------------------------
|
||||
.SECTION B,DATA,ALIGN=4
|
||||
PARM: .BLKL 1
|
||||
.SECTION B_1,DATA
|
||||
IO_BUF: .BLKB 1
|
||||
; .END ; Commented out for conditional assembly
|
||||
|
||||
; Code below is for debug console
|
||||
.ELSE
|
||||
|
||||
;-----------------------------------------------------------------------
|
||||
;
|
||||
; FILE :lowlvl.src
|
||||
; DATE :Wed, Jul 01, 2009
|
||||
; DESCRIPTION :Program of Low level
|
||||
; CPU TYPE :RX
|
||||
;
|
||||
;-----------------------------------------------------------------------
|
||||
.GLB _charput
|
||||
.GLB _charget
|
||||
|
||||
FC2E0 .EQU 00084080h
|
||||
FE2C0 .EQU 00084090h
|
||||
DBGSTAT .EQU 000840C0h
|
||||
RXFL0EN .EQU 00001000h
|
||||
TXFL0EN .EQU 00000100h
|
||||
|
||||
.SECTION P,CODE
|
||||
|
||||
;-----------------------------------------------------------------------
|
||||
; _charput:
|
||||
;-----------------------------------------------------------------------
|
||||
_charput:
|
||||
.STACK _charput = 00000000h
|
||||
__C2ESTART: MOV.L #TXFL0EN,R3
|
||||
MOV.L #DBGSTAT,R4
|
||||
__TXLOOP: MOV.L [R4],R5
|
||||
AND R3,R5
|
||||
BNZ __TXLOOP
|
||||
__WRITEFC2E0: MOV.L #FC2E0,R2
|
||||
MOV.L R1,[R2]
|
||||
__CHARPUTEXIT: RTS
|
||||
|
||||
;-----------------------------------------------------------------------
|
||||
; _charget:
|
||||
;-----------------------------------------------------------------------
|
||||
_charget:
|
||||
.STACK _charget = 00000000h
|
||||
__E2CSTART: MOV.L #RXFL0EN,R3
|
||||
MOV.L #DBGSTAT,R4
|
||||
__RXLOOP: MOV.L [R4],R5
|
||||
AND R3,R5
|
||||
BZ __RXLOOP
|
||||
__READFE2C0: MOV.L #FE2C0,R2
|
||||
MOV.L [R2],R1
|
||||
__CHARGETEXIT: RTS
|
||||
|
||||
;-----------------------------------------------------------------------
|
||||
|
||||
; End of conditional code
|
||||
.ENDIF
|
||||
|
||||
.END
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,329 @@
|
|||
/***********************************************************************/
|
||||
/* */
|
||||
/* FILE :lowsrc.c */
|
||||
/* DATE :Wed, Jun 16, 2010 */
|
||||
/* DESCRIPTION :Program of I/O Stream */
|
||||
/* CPU TYPE :Other */
|
||||
/* */
|
||||
/* This file is generated by Renesas Project Generator (Ver.4.50). */
|
||||
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Device : RX
|
||||
*
|
||||
* File Name : lowsrc.c
|
||||
*
|
||||
* Abstract : Program of I/O Stream.
|
||||
*
|
||||
* History : 1.00 (2009-08-07)
|
||||
*
|
||||
* NOTE : THIS IS A TYPICAL EXAMPLE.
|
||||
*
|
||||
* Copyright(c) 2009 Renesas Technology Corp.
|
||||
* And Renesas Solutions Corp.,All Rights Reserved.
|
||||
*
|
||||
*********************************************************************/
|
||||
|
||||
#include <string.h>
|
||||
#include <stdio.h>
|
||||
#include <stddef.h>
|
||||
#include "lowsrc.h"
|
||||
|
||||
/* file number */
|
||||
#define STDIN 0 /* Standard input (console) */
|
||||
#define STDOUT 1 /* Standard output (console) */
|
||||
#define STDERR 2 /* Standard error output (console) */
|
||||
|
||||
#define FLMIN 0 /* Minimum file number */
|
||||
#define _MOPENR 0x1
|
||||
#define _MOPENW 0x2
|
||||
#define _MOPENA 0x4
|
||||
#define _MTRUNC 0x8
|
||||
#define _MCREAT 0x10
|
||||
#define _MBIN 0x20
|
||||
#define _MEXCL 0x40
|
||||
#define _MALBUF 0x40
|
||||
#define _MALFIL 0x80
|
||||
#define _MEOF 0x100
|
||||
#define _MERR 0x200
|
||||
#define _MLBF 0x400
|
||||
#define _MNBF 0x800
|
||||
#define _MREAD 0x1000
|
||||
#define _MWRITE 0x2000
|
||||
#define _MBYTE 0x4000
|
||||
#define _MWIDE 0x8000
|
||||
/* File Flags */
|
||||
#define O_RDONLY 0x0001 /* Read only */
|
||||
#define O_WRONLY 0x0002 /* Write only */
|
||||
#define O_RDWR 0x0004 /* Both read and Write */
|
||||
#define O_CREAT 0x0008 /* A file is created if it is not existed */
|
||||
#define O_TRUNC 0x0010 /* The file size is changed to 0 if it is existed. */
|
||||
#define O_APPEND 0x0020 /* The position is set for next reading/writing */
|
||||
/* 0: Top of the file 1: End of file */
|
||||
|
||||
/* Special character code */
|
||||
#define CR 0x0d /* Carriage return */
|
||||
#define LF 0x0a /* Line feed */
|
||||
|
||||
#if defined( __RX )
|
||||
const long _nfiles = IOSTREAM; /* The number of files for input/output files */
|
||||
#else
|
||||
const int _nfiles = IOSTREAM; /* The number of files for input/output files */
|
||||
#endif
|
||||
char flmod[IOSTREAM]; /* The location for the mode of opened file. */
|
||||
|
||||
unsigned char sml_buf[IOSTREAM];
|
||||
|
||||
#define FPATH_STDIN "C:\\stdin"
|
||||
#define FPATH_STDOUT "C:\\stdout"
|
||||
#define FPATH_STDERR "C:\\stderr"
|
||||
|
||||
/* H8 Normal mode ,SH and RX */
|
||||
#if defined( __2000N__ ) || defined( __2600N__ ) || defined( __300HN__ ) || defined( _SH )
|
||||
/* Output one character to standard output */
|
||||
extern void charput(char);
|
||||
/* Input one character from standard input */
|
||||
extern char charget(void);
|
||||
/* Output one character to the file */
|
||||
extern char fcharput(char, unsigned char);
|
||||
/* Input one character from the file */
|
||||
extern char fcharget(char*, unsigned char);
|
||||
/* Open the file */
|
||||
extern char fileopen(char*, unsigned char, unsigned char*);
|
||||
/* Close the file */
|
||||
extern char fileclose(unsigned char);
|
||||
/* Move the file offset */
|
||||
extern char fpseek(unsigned char, long, unsigned char);
|
||||
/* Get the file offset */
|
||||
extern char fptell(unsigned char, long*);
|
||||
|
||||
/* RX */
|
||||
#elif defined( __RX )
|
||||
/* Output one character to standard output */
|
||||
extern void charput(unsigned char);
|
||||
/* Input one character from standard input */
|
||||
extern unsigned char charget(void);
|
||||
|
||||
/* H8 Advanced mode */
|
||||
#elif defined( __2000A__ ) || defined( __2600A__ ) || defined( __300HA__ ) || defined( __H8SXN__ ) || defined( __H8SXA__ ) || defined( __H8SXM__ ) || defined( __H8SXX__ )
|
||||
/* Output one character to standard output */
|
||||
extern void charput(char);
|
||||
/* Input one character from standard input */
|
||||
extern char charget(void);
|
||||
/* Output one character to the file */
|
||||
extern char fcharput(char, unsigned char);
|
||||
/* Input one character from the file */
|
||||
extern char fcharget(char*, unsigned char);
|
||||
/* Open the file */
|
||||
/* Specified as the number of register which stored paramter is 3 */
|
||||
extern char __regparam3 fileopen(char*, unsigned char, unsigned char*);
|
||||
/* Close the file */
|
||||
extern char fileclose(unsigned char);
|
||||
/* Move the file offset */
|
||||
extern char fpseek(unsigned char, long, unsigned char);
|
||||
/* Get the file offset */
|
||||
extern char fptell(unsigned char, long*);
|
||||
|
||||
/* H8300 and H8300L */
|
||||
#elif defined( __300__ ) || defined( __300L__ )
|
||||
/* Output one character to standard output */
|
||||
extern void charput(char);
|
||||
/* Input one character from standard input */
|
||||
extern char charget(void);
|
||||
/* Output one character to the file */
|
||||
extern char fcharput(char, unsigned char);
|
||||
/* Input one character from the file */
|
||||
extern char fcharget(char*, unsigned char);
|
||||
/* Open the file */
|
||||
/* Specified as the number of register which stored paramter is 3 */
|
||||
extern char __regparam3 fileopen(char*, unsigned char, unsigned char*);
|
||||
/* Close the file */
|
||||
extern char fileclose(unsigned char);
|
||||
/* Move the file offset */
|
||||
/* Move the file offset */
|
||||
extern char __regparam3 fpseek(unsigned char, long, unsigned char);
|
||||
/* Get the file offset */
|
||||
extern char fptell(unsigned char, long*);
|
||||
#endif
|
||||
|
||||
#include <stdio.h>
|
||||
FILE *_Files[IOSTREAM]; // structure for FILE
|
||||
char *env_list[] = { // Array for environment variables(**environ)
|
||||
"ENV1=temp01",
|
||||
"ENV2=temp02",
|
||||
"ENV9=end",
|
||||
'\0' // Terminal for environment variables
|
||||
};
|
||||
|
||||
char **environ = env_list;
|
||||
|
||||
/****************************************************************************/
|
||||
/* _INIT_IOLIB */
|
||||
/* Initialize C library Functions, if necessary. */
|
||||
/* Define USES_SIMIO on Assembler Option. */
|
||||
/****************************************************************************/
|
||||
void _INIT_IOLIB( void )
|
||||
{
|
||||
/* A file for standard input/output is opened or created. Each FILE */
|
||||
/* structure members are initialized by the library. Each _Buf member */
|
||||
/* in it is re-set the end of buffer pointer. */
|
||||
|
||||
/* Standard Input File */
|
||||
if( freopen( FPATH_STDIN, "r", stdin ) == NULL )
|
||||
stdin->_Mode = 0xffff; /* Not allow the access if it fails to open */
|
||||
stdin->_Mode = _MOPENR; /* Read only attribute */
|
||||
stdin->_Mode |= _MNBF; /* Non-buffering for data */
|
||||
stdin->_Bend = stdin->_Buf + 1; /* Re-set pointer to the end of buffer */
|
||||
|
||||
/* Standard Output File */
|
||||
if( freopen( FPATH_STDOUT, "w", stdout ) == NULL )
|
||||
stdout->_Mode = 0xffff; /* Not allow the access if it fails to open */
|
||||
stdout->_Mode |= _MNBF; /* Non-buffering for data */
|
||||
stdout->_Bend = stdout->_Buf + 1;/* Re-set pointer to the end of buffer */
|
||||
|
||||
/* Standard Error File */
|
||||
if( freopen( FPATH_STDERR, "w", stderr ) == NULL )
|
||||
stderr->_Mode = 0xffff; /* Not allow the access if it fails to open */
|
||||
stderr->_Mode |= _MNBF; /* Non-buffering for data */
|
||||
stderr->_Bend = stderr->_Buf + 1;/* Re-set pointer to the end of buffer */
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
/* _CLOSEALL */
|
||||
/****************************************************************************/
|
||||
void _CLOSEALL( void )
|
||||
{
|
||||
long i;
|
||||
|
||||
for( i=0; i < _nfiles; i++ )
|
||||
{
|
||||
/* Checks if the file is opened or not */
|
||||
if( _Files[i]->_Mode & (_MOPENR | _MOPENW | _MOPENA ) )
|
||||
fclose( _Files[i] ); /* Closes the file */
|
||||
}
|
||||
}
|
||||
|
||||
/**************************************************************************/
|
||||
/* open:file open */
|
||||
/* Return value:File number (Pass) */
|
||||
/* -1 (Failure) */
|
||||
/**************************************************************************/
|
||||
#if defined( __RX )
|
||||
long open(const char *name, /* File name */
|
||||
long mode, /* Open mode */
|
||||
long flg) /* Open flag */
|
||||
#else
|
||||
int open(char *name, /* File name */
|
||||
int mode, /* Open mode */
|
||||
int flg) /* Open flag */
|
||||
#endif
|
||||
{
|
||||
|
||||
|
||||
if( strcmp( name, FPATH_STDIN ) == 0 ) /* Standard Input file? */
|
||||
{
|
||||
if( ( mode & O_RDONLY ) == 0 ) return -1;
|
||||
flmod[STDIN] = mode;
|
||||
return STDIN;
|
||||
}
|
||||
else if( strcmp( name, FPATH_STDOUT ) == 0 )/* Standard Output file? */
|
||||
{
|
||||
if( ( mode & O_WRONLY ) == 0 ) return -1;
|
||||
flmod[STDOUT] = mode;
|
||||
return STDOUT;
|
||||
}
|
||||
else if(strcmp(name, FPATH_STDERR ) == 0 ) /* Standard Error file? */
|
||||
{
|
||||
if( ( mode & O_WRONLY ) == 0 ) return -1;
|
||||
flmod[STDERR] = mode;
|
||||
return STDERR;
|
||||
}
|
||||
else return -1; /*Others */
|
||||
}
|
||||
|
||||
#if defined( __RX )
|
||||
long close( long fileno )
|
||||
#else
|
||||
int close( int fileno )
|
||||
#endif
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**************************************************************************/
|
||||
/* write:Data write */
|
||||
/* Return value:Number of write characters (Pass) */
|
||||
/* -1 (Failure) */
|
||||
/**************************************************************************/
|
||||
#if defined( __RX )
|
||||
long write(long fileno, /* File number */
|
||||
const unsigned char *buf, /* The address of destination buffer */
|
||||
long count) /* The number of chacter to write */
|
||||
#else
|
||||
int write(int fileno, /* File number */
|
||||
char *buf, /* The address of destination buffer */
|
||||
int count) /* The number of chacter to write */
|
||||
#endif
|
||||
{
|
||||
long i; /* A variable for counter */
|
||||
unsigned char c; /* An output character */
|
||||
|
||||
/* Checking the mode of file , output each character */
|
||||
/* Checking the attribute for Write-Only, Read-Only or Read-Write */
|
||||
if(flmod[fileno]&O_WRONLY || flmod[fileno]&O_RDWR)
|
||||
{
|
||||
if( fileno == STDIN ) return -1; /* Standard Input */
|
||||
else if( (fileno == STDOUT) || (fileno == STDERR) )
|
||||
/* Standard Error/output */
|
||||
{
|
||||
for( i = count; i > 0; --i )
|
||||
{
|
||||
c = *buf++;
|
||||
charput(c);
|
||||
}
|
||||
return count; /*Return the number of written characters */
|
||||
}
|
||||
else return -1; /* Incorrect file number */
|
||||
}
|
||||
else return -1; /* An error */
|
||||
}
|
||||
|
||||
#if defined( __RX )
|
||||
long read( long fileno, unsigned char *buf, long count )
|
||||
#else
|
||||
int read( int fileno, char *buf, unsigned int count )
|
||||
#endif
|
||||
{
|
||||
long i;
|
||||
|
||||
/* Checking the file mode with the file number, each character is input and stored the buffer */
|
||||
|
||||
if((flmod[fileno]&_MOPENR) || (flmod[fileno]&O_RDWR)){
|
||||
for(i = count; i > 0; i--){
|
||||
*buf = charget();
|
||||
if(*buf==CR){ /* Replace the new line character */
|
||||
*buf = LF;
|
||||
}
|
||||
buf++;
|
||||
}
|
||||
return count;
|
||||
}
|
||||
else {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
#if defined( __RX )
|
||||
long lseek( long fileno, long offset, long base )
|
||||
#else
|
||||
long lseek( int fileno, long offset, int base )
|
||||
#endif
|
||||
{
|
||||
return -1L;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,129 @@
|
|||
/***********************************************************************/
|
||||
/* */
|
||||
/* FILE :resetprg.c */
|
||||
/* DATE :Wed, Aug 11, 2010 */
|
||||
/* DESCRIPTION :Reset Program */
|
||||
/* CPU TYPE :Other */
|
||||
/* */
|
||||
/* This file is generated by Renesas Project Generator (Ver.4.50). */
|
||||
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Device : RX/RX600
|
||||
*
|
||||
* File Name : resetprg.c
|
||||
*
|
||||
* Abstract : Reset Program.
|
||||
*
|
||||
* History : 1.00 (2009-08-07)
|
||||
*
|
||||
* NOTE : THIS IS A TYPICAL EXAMPLE.
|
||||
*
|
||||
* Copyright(c) 2009 Renesas Technology Corp.
|
||||
* And Renesas Solutions Corp.,All Rights Reserved.
|
||||
*
|
||||
*********************************************************************/
|
||||
|
||||
#include <machine.h>
|
||||
#include <_h_c_lib.h>
|
||||
//#include <stddef.h> // Remove the comment when you use errno
|
||||
//#include <stdlib.h> // Remove the comment when you use rand()
|
||||
#include "typedefine.h"
|
||||
#include "stacksct.h"
|
||||
|
||||
#pragma inline_asm Change_PSW_PM_to_UserMode
|
||||
static void Change_PSW_PM_to_UserMode(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void PowerON_Reset_PC(void);
|
||||
void main(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus // Use SIM I/O
|
||||
extern "C" {
|
||||
#endif
|
||||
extern void _INIT_IOLIB(void);
|
||||
extern void _CLOSEALL(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#define PSW_init 0x00010000
|
||||
#define FPSW_init 0x00000100
|
||||
|
||||
//extern void srand(_UINT); // Remove the comment when you use rand()
|
||||
//extern _SBYTE *_s1ptr; // Remove the comment when you use strtok()
|
||||
|
||||
//#ifdef __cplusplus // Use Hardware Setup
|
||||
//extern "C" {
|
||||
//#endif
|
||||
//extern void HardwareSetup(void);
|
||||
//#ifdef __cplusplus
|
||||
//}
|
||||
//#endif
|
||||
|
||||
//#ifdef __cplusplus // Remove the comment when you use global class object
|
||||
//extern "C" { // Sections C$INIT and C$END will be generated
|
||||
//#endif
|
||||
//extern void _CALL_INIT(void);
|
||||
//extern void _CALL_END(void);
|
||||
//#ifdef __cplusplus
|
||||
//}
|
||||
//#endif
|
||||
|
||||
#pragma section ResetPRG
|
||||
|
||||
#pragma entry PowerON_Reset_PC
|
||||
|
||||
void PowerON_Reset_PC(void)
|
||||
{
|
||||
set_intb((unsigned long)__sectop("C$VECT"));
|
||||
set_fpsw(FPSW_init);
|
||||
|
||||
_INITSCT();
|
||||
|
||||
// _INIT_IOLIB(); // Remove the comment when you use SIM I/O
|
||||
|
||||
// errno=0; // Remove the comment when you use errno
|
||||
// srand((_UINT)1); // Remove the comment when you use rand()
|
||||
// _s1ptr=NULL; // Remove the comment when you use strtok()
|
||||
|
||||
// HardwareSetup(); // Use Hardware Setup
|
||||
nop();
|
||||
|
||||
// _CALL_INIT(); // Remove the comment when you use global class object
|
||||
|
||||
set_psw(PSW_init); // Set Ubit & Ibit for PSW
|
||||
// Change_PSW_PM_to_UserMode(); // DO NOT CHANGE TO USER MODE IF USING FREERTOS!
|
||||
( void ) Change_PSW_PM_to_UserMode; // Just to avoid compiler warnings.
|
||||
|
||||
main();
|
||||
|
||||
// _CLOSEALL(); // Use SIM I/O
|
||||
|
||||
// _CALL_END(); // Remove the comment when you use global class object
|
||||
|
||||
brk();
|
||||
}
|
||||
|
||||
static void Change_PSW_PM_to_UserMode(void)
|
||||
{
|
||||
MVFC PSW,R1
|
||||
OR #00100000h,R1
|
||||
PUSH.L R1
|
||||
MVFC PC,R1
|
||||
ADD #10,R1
|
||||
PUSH.L R1
|
||||
RTE
|
||||
NOP
|
||||
NOP
|
||||
}
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
#include <stddef.h>
|
||||
#include <stdio.h>
|
||||
#define HEAPSIZE 0x400
|
||||
signed char *sbrk( size_t size );
|
||||
union HEAP_TYPE
|
||||
{
|
||||
signed long dummy;
|
||||
signed char heap[HEAPSIZE];
|
||||
};
|
||||
static union HEAP_TYPE heap_area;
|
||||
|
||||
/* End address allocated by sbrk */
|
||||
static signed char *brk = ( signed char * ) &heap_area;
|
||||
signed char *sbrk( size_t size )
|
||||
{
|
||||
signed char *p;
|
||||
if( brk + size > heap_area.heap + HEAPSIZE )
|
||||
{
|
||||
p = ( signed char * ) - 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
p = brk;
|
||||
brk += size;
|
||||
}
|
||||
|
||||
return p;
|
||||
}
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
/***********************************************************************/
|
||||
/* */
|
||||
/* FILE :vecttbl.c */
|
||||
/* DATE :Wed, Aug 11, 2010 */
|
||||
/* DESCRIPTION :Initialize of Vector Table */
|
||||
/* CPU TYPE :Other */
|
||||
/* */
|
||||
/* This file is generated by Renesas Project Generator (Ver.4.50). */
|
||||
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Device : RX/RX600
|
||||
*
|
||||
* File Name : vecttbl.c
|
||||
*
|
||||
* Abstract : Initialize of Vector Table.
|
||||
*
|
||||
* History : 1.00 (2009-08-07)
|
||||
*
|
||||
* NOTE : THIS IS A TYPICAL EXAMPLE.
|
||||
*
|
||||
* Copyright(c) 2009 Renesas Technology Corp.
|
||||
* And Renesas Solutions Corp.,All Rights Reserved.
|
||||
*
|
||||
*********************************************************************/
|
||||
|
||||
#include "vect.h"
|
||||
|
||||
#pragma section C FIXEDVECT
|
||||
|
||||
void* const Fixed_Vectors[] = {
|
||||
//;0xffffffd0 Exception(Supervisor Instruction)
|
||||
(void*) Excep_SuperVisorInst,
|
||||
//;0xffffffd4 Reserved
|
||||
Dummy,
|
||||
//;0xffffffd8 Reserved
|
||||
Dummy,
|
||||
//;0xffffffdc Exception(Undefined Instruction)
|
||||
(void*) Excep_UndefinedInst,
|
||||
//;0xffffffe0 Reserved
|
||||
Dummy,
|
||||
//;0xffffffe4 Exception(Floating Point)
|
||||
(void*) Excep_FloatingPoint,
|
||||
//;0xffffffe8 Reserved
|
||||
Dummy,
|
||||
//;0xffffffec Reserved
|
||||
Dummy,
|
||||
//;0xfffffff0 Reserved
|
||||
Dummy,
|
||||
//;0xfffffff4 Reserved
|
||||
Dummy,
|
||||
//;0xfffffff8 NMI
|
||||
(void*) NonMaskableInterrupt,
|
||||
//;0xfffffffc RESET
|
||||
//;<<VECTOR DATA START (POWER ON RESET)>>
|
||||
//;Power On Reset PC
|
||||
PowerON_Reset_PC
|
||||
//;<<VECTOR DATA END (POWER ON RESET)>>
|
||||
};
|
||||
Loading…
Add table
Add a link
Reference in a new issue