mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-02 04:13:54 -04:00
Add FreeRTOS-Plus directory.
This commit is contained in:
Richard Barry
parent
7bd5f21ad5
commit
f508a5f653
6798 changed files with 134949 additions and 19 deletions
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<?xml version="1.0" standalone="no"?>
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<xsl:stylesheet version="1.0"
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xmlns:svg="http://www.w3.org/2000/svg"
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xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
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xmlns:exsl="http://exslt.org/common"
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xmlns:xlink="http://www.w3.org/1999/xlink">
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======================================================
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BUS INTERFACE DIMENSIONS
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======================================================
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-->
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<xsl:variable name="BLKD_BIF_H" select="16"/>
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<xsl:variable name="BLKD_BIF_W" select="32"/>
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<xsl:variable name="BLKD_BIFC_H" select="24"/>
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<xsl:variable name="BLKD_BIFC_W" select="24"/>
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<xsl:variable name="BLKD_BIFC_dx" select="ceiling($BLKD_BIFC_W div 5)"/>
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<xsl:variable name="BLKD_BIFC_dy" select="ceiling($BLKD_BIFC_H div 5)"/>
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<xsl:variable name="BLKD_BIFC_Hi" select="($BLKD_BIFC_H - ($BLKD_BIFC_dy * 2))"/>
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<xsl:variable name="BLKD_BIFC_Wi" select="($BLKD_BIFC_W - ($BLKD_BIFC_dx * 2))"/>
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<xsl:variable name="BLKD_BIF_TYPE_ONEWAY" select="'OneWay'"/>
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======================================================
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GLOLBAL BUS INTERFACE DIMENSIONS
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(Define for global MdtSVG_BifShapes.xsl which is used across all
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diagrams to define the shapes of bifs the same across all diagrams)
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======================================================
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-->
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<xsl:variable name="BIF_H" select="$BLKD_BIF_H"/>
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<xsl:variable name="BIF_W" select="$BLKD_BIF_W"/>
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<xsl:variable name="BIFC_H" select="$BLKD_BIFC_H"/>
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<xsl:variable name="BIFC_W" select="$BLKD_BIFC_W"/>
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<xsl:variable name="BIFC_dx" select="$BLKD_BIFC_dx"/>
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<xsl:variable name="BIFC_dy" select="$BLKD_BIFC_dy"/>
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<xsl:variable name="BIFC_Hi" select="$BLKD_BIFC_Hi"/>
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<xsl:variable name="BIFC_Wi" select="$BLKD_BIFC_Wi"/>
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<!--
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======================================================
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BUS DIMENSIONS
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======================================================
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-->
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<xsl:variable name="BLKD_P2P_BUS_W" select="($BLKD_BUS_ARROW_H - ($BLKD_BUS_ARROW_G * 2))"/>
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<xsl:variable name="BLKD_SBS_LANE_H" select="($BLKD_MOD_H + ($BLKD_BIF_H * 2))"/>
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<xsl:variable name="BLKD_BUS_LANE_W" select="($BLKD_BIF_W + ($BLKD_MOD_BIF_GAP_H * 2))"/>
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<xsl:variable name="BLKD_BUS_ARROW_W" select="ceiling($BLKD_BIFC_W div 3)"/>
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<xsl:variable name="BLKD_BUS_ARROW_H" select="ceiling($BLKD_BIFC_H div 2)"/>
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<xsl:variable name="BLKD_BUS_ARROW_G" select="ceiling($BLKD_BIFC_W div 12)"/>
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<!--
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======================================================
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IO PORT DIMENSIONS
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======================================================
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-->
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<xsl:variable name="BLKD_IOP_H" select="16"/>
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<xsl:variable name="BLKD_IOP_W" select="16"/>
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<xsl:variable name="BLKD_IOP_SPC" select="12"/>
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<!--
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======================================================
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INTERRUPT NOTATION DIMENSIONS
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======================================================
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-->
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<xsl:variable name="BLKD_INTR_W" select="18"/>
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<xsl:variable name="BLKD_INTR_H" select="18"/>
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<!--
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======================================================
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MODULE DIMENSIONS
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======================================================
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-->
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<xsl:variable name="BLKD_MOD_IO_GAP" select="8"/>
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<xsl:variable name="BLKD_MOD_W" select="( ($BLKD_BIF_W * 2) + ($BLKD_MOD_BIF_GAP_H * 1) + ($BLKD_MOD_LANE_W * 2))"/>
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<xsl:variable name="BLKD_MOD_H" select="($BLKD_MOD_LABEL_H + ($BLKD_BIF_H * 1) + ($BLKD_MOD_BIF_GAP_V * 1) + ($BLKD_MOD_LANE_H * 2))"/>
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<xsl:variable name="BLKD_MOD_BIF_GAP_H" select="ceiling($BLKD_BIF_H div 4)"/>
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<xsl:variable name="BLKD_MOD_BIF_GAP_V" select="ceiling($BLKD_BIFC_H div 2)"/>
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<xsl:variable name="BLKD_MOD_LABEL_W" select="(($BLKD_BIF_W * 2) + $BLKD_MOD_BIF_GAP_H)"/>
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<xsl:variable name="BLKD_MOD_LABEL_H" select="(($BLKD_BIF_H * 2) + ceiling($BLKD_BIF_H div 3))"/>
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<xsl:variable name="BLKD_MOD_LANE_W" select="ceiling($BLKD_BIF_W div 3)"/>
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<xsl:variable name="BLKD_MOD_LANE_H" select="ceiling($BLKD_BIF_H div 4)"/>
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<xsl:variable name="BLKD_MOD_EDGE_W" select="ceiling($BLKD_MOD_LANE_W div 2)"/>
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<xsl:variable name="BLKD_MOD_SHAPES_G" select="($BLKD_BIF_W + $BLKD_BIF_W)"/>
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<xsl:variable name="BLKD_MOD_BKTLANE_H" select="$BLKD_BIF_H"/>
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<xsl:variable name="BLKD_MOD_BKTLANE_W" select="$BLKD_BIF_H"/>
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<xsl:variable name="BLKD_MOD_BUCKET_G" select="ceiling($BLKD_BIF_W div 2)"/>
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<xsl:variable name="BLKD_MPMC_MOD_H" select="(($BLKD_BIF_H * 1) + ($BLKD_MOD_BIF_GAP_V * 2) + ($BLKD_MOD_LANE_H * 2))"/>
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<!--
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======================================================
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GLOBAL DIAGRAM DIMENSIONS
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======================================================
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-->
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<xsl:variable name="BLKD_IORCHAN_H" select="$BLKD_BIF_H"/>
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<xsl:variable name="BLKD_IORCHAN_W" select="$BLKD_BIF_H"/>
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<xsl:variable name="BLKD_PRTCHAN_H" select="($BLKD_BIF_H * 2) + ceiling($BLKD_BIF_H div 2)"/>
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<xsl:variable name="BLKD_PRTCHAN_W" select="($BLKD_BIF_H * 2) + ceiling($BLKD_BIF_H div 2) + 8"/>
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<xsl:variable name="BLKD_DRAWAREA_MIN_W" select="(($BLKD_MOD_BKTLANE_W * 2) + (($BLKD_MOD_W * 3) + ($BLKD_MOD_BUCKET_G * 2)))"/>
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<xsl:variable name="BLKD_INNER_X" select="($BLKD_PRTCHAN_W + $BLKD_IORCHAN_W + $BLKD_INNER_GAP)"/>
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<xsl:variable name="BLKD_INNER_Y" select="($BLKD_PRTCHAN_H + $BLKD_IORCHAN_H + $BLKD_INNER_GAP)"/>
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<xsl:variable name="BLKD_INNER_GAP" select="ceiling($BLKD_MOD_W div 2)"/>
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<xsl:variable name="BLKD_SBS2IP_GAP" select="$BLKD_MOD_H"/>
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<xsl:variable name="BLKD_BRIDGE_GAP" select="($BLKD_BUS_LANE_W * 4)"/>
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<xsl:variable name="BLKD_IP2UNK_GAP" select="$BLKD_MOD_H"/>
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<xsl:variable name="BLKD_PROC2SBS_GAP" select="($BLKD_BIF_H * 2)"/>
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<xsl:variable name="BLKD_IOR2PROC_GAP" select="$BLKD_BIF_W"/>
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<xsl:variable name="BLKD_MPMC2PROC_GAP" select="($BLKD_BIF_H * 2)"/>
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<xsl:variable name="BLKD_SPECS2KEY_GAP" select="$BLKD_BIF_W"/>
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<xsl:variable name="BLKD_DRAWAREA2KEY_GAP" select="ceiling($BLKD_BIF_W div 3)"/>
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<xsl:variable name="BLKD_KEY_H" select="250"/>
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<xsl:variable name="BLKD_KEY_W" select="($BLKD_DRAWAREA_MIN_W + ceiling($BLKD_DRAWAREA_MIN_W div 2.5))"/>
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<xsl:variable name="BLKD_SPECS_H" select="100"/>
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<xsl:variable name="BLKD_SPECS_W" select="300"/>
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<xsl:variable name="BLKD_BKT_MODS_PER_ROW" select="3"/>
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<!--
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<xsl:template name="Print_Dimensions">
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<xsl:message>MOD_LABEL_W : <xsl:value-of select="$MOD_LABEL_W"/></xsl:message>
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<xsl:message>MOD_LABEL_H : <xsl:value-of select="$MOD_LABEL_H"/></xsl:message>
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<xsl:message>MOD_LANE_W : <xsl:value-of select="$MOD_LANE_W"/></xsl:message>
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<xsl:message>MOD_LANE_H : <xsl:value-of select="$MOD_LANE_H"/></xsl:message>
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<xsl:message>MOD_EDGE_W : <xsl:value-of select="$MOD_EDGE_W"/></xsl:message>
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<xsl:message>MOD_SHAPES_G : <xsl:value-of select="$MOD_SHAPES_G"/></xsl:message>
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<xsl:message>MOD_BKTLANE_W : <xsl:value-of select="$MOD_BKTLANE_W"/></xsl:message>
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<xsl:message>MOD_BKTLANE_H : <xsl:value-of select="$MOD_BKTLANE_H"/></xsl:message>
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<xsl:message>MOD_BUCKET_G : <xsl:value-of select="$MOD_BUCKET_G"/></xsl:message>
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</xsl:template>
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-->
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</xsl:stylesheet>
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@ -0,0 +1,134 @@
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<?xml version="1.0" standalone="no"?>
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<xsl:stylesheet version="1.0"
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xmlns:svg="http://www.w3.org/2000/svg"
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xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
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xmlns:exsl="http://exslt.org/common"
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xmlns:xlink="http://www.w3.org/1999/xlink">
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<xsl:variable name="COL_RED" select="'#AA0000'"/>
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<xsl:variable name="COL_GRAY" select="'#E1E1E1'"/>
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<xsl:variable name="COL_XLNX" select="'#AA0017'"/>
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<xsl:variable name="COL_BLACK" select="'#000000'"/>
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<xsl:variable name="COL_WHITE" select="'#FFFFFF'"/>
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<xsl:variable name="COL_YELLOW" select="'#FFFFDD'"/>
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<xsl:variable name="COL_YELLOW_LT" select="'#FFFFEE'"/>
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<xsl:variable name="COL_BG" select="'#CCCCCC'"/>
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<xsl:variable name="COL_BG_LT" select="'#EEEEEE'"/>
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<xsl:variable name="COL_BG_UNK" select="'#DDDDDD'"/>
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<xsl:variable name="COL_PROC_BG" select="'#FFCCCC'"/>
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<xsl:variable name="COL_PROC_BG_MB" select="'#222222'"/>
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<xsl:variable name="COL_PROC_BG_PP" select="'#90001C'"/>
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<xsl:variable name="COL_PROC_BG_USR" select="'#666699'"/>
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<xsl:variable name="COL_MPMC_BG" select="'#8B0800'"/>
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<xsl:variable name="COL_MOD_BG" select="'#F0F0F0'"/>
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<xsl:variable name="COL_MOD_SPRT" select="'#888888'"/>
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<xsl:variable name="COL_MOD_MPRT" select="'#888888'"/>
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<xsl:variable name="COL_IORING" select="'#000088'"/>
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<xsl:variable name="COL_IORING_LT" select="'#CCCCFF'"/>
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<xsl:variable name="COL_SYSPRT" select="'#0000BB'"/>
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<!--
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<xsl:variable name="COL_INTR_0" select="'#FF9900'"/>
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<xsl:variable name="COL_INTR_1" select="'#00CCCC'"/>
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<xsl:variable name="COL_INTR_2" select="'#33FF33'"/>
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<xsl:variable name="COL_INTR_3" select="'#FF00CC'"/>
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<xsl:variable name="COL_INTR_4" select="'#99FF33'"/>
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<xsl:variable name="COL_INTR_5" select="'#0066CC'"/>
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<xsl:variable name="COL_INTR_6" select="'#9933FF'"/>
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<xsl:variable name="COL_INTR_7" select="'#3300FF'"/>
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<xsl:variable name="COL_INTR_8" select="'#00FF33'"/>
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<xsl:variable name="COL_INTR_9" select="'#FF3333'"/>
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-->
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<xsl:variable name="COL_INTCS">
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<INTCCOLOR INDEX="0" RGB="#FF9900"/>
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<INTCCOLOR INDEX="1" RGB="#00CCCC"/>
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<INTCCOLOR INDEX="2" RGB="#33FF33"/>
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<INTCCOLOR INDEX="3" RGB="#FF00CC"/>
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<INTCCOLOR INDEX="4" RGB="#99FF33"/>
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<INTCCOLOR INDEX="5" RGB="#0066CC"/>
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<INTCCOLOR INDEX="6" RGB="#9933FF"/>
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<INTCCOLOR INDEX="7" RGB="#3300FF"/>
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<INTCCOLOR INDEX="8" RGB="#00FF33"/>
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<INTCCOLOR INDEX="9" RGB="#FF3333"/>
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</xsl:variable>
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<xsl:variable name="COL_BUSSTDS">
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<BUSCOLOR BUSSTD="XIL" RGB="#990066" RGB_LT="#CC3399"/>
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<BUSCOLOR BUSSTD="OCM" RGB="#0000DD" RGB_LT="#9999DD"/>
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<BUSCOLOR BUSSTD="OPB" RGB="#339900" RGB_LT="#CCDDCC"/>
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<BUSCOLOR BUSSTD="LMB" RGB="#7777FF" RGB_LT="#DDDDFF"/>
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<BUSCOLOR BUSSTD="FSL" RGB="#CC00CC" RGB_LT="#FFBBFF"/>
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<BUSCOLOR BUSSTD="DCR" RGB="#6699FF" RGB_LT="#BBDDFF"/>
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<BUSCOLOR BUSSTD="FCB" RGB="#8C00FF" RGB_LT="#CCCCFF"/>
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<BUSCOLOR BUSSTD="PLB" RGB="#FF5500" RGB_LT="#FFBB00"/>
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<BUSCOLOR BUSSTD="PLBV34" RGB="#FF5500" RGB_LT="#FFBB00"/>
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<BUSCOLOR BUSSTD="PLBV34_P2P" RGB="#FF5500" RGB_LT="#FFBB00"/>
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<BUSCOLOR BUSSTD="PLBV46" RGB="#BB9955" RGB_LT="#FFFFDD"/>
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<BUSCOLOR BUSSTD="PLBV46_P2P" RGB="#BB9955" RGB_LT="#FFFFDD"/>
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<!--
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<BUSCOLOR BUSSTD="PLBV46" RGB="#9966FF" RGB_LT="#CCCCFF"/>
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<BUSCOLOR BUSSTD="PLBV46_P2P" RGB="#9966FF" RGB_LT="#CCCCFF"/>
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<BUSCOLOR BUSSTD="PLB" RGB="#FFAA33" RGB_LT="#FFEE33"/>
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<BUSCOLOR BUSSTD="PLBV46" RGB="#FF5500" RGB_LT="#FFBB00"/>
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<BUSCOLOR BUSSTD="PLBV46_P2P" RGB="#FF5500" RGB_LT="#FFBB00"/>
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-->
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<BUSCOLOR BUSSTD="TARGET" RGB="#009999" RGB_LT="#00CCCC"/>
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<BUSCOLOR BUSSTD="INITIATOR" RGB="#009999" RGB_LT="#00CCCC"/>
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<BUSCOLOR BUSSTD="USER" RGB="#009999" RGB_LT="#00CCCC"/>
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<BUSCOLOR BUSSTD="KEY" RGB="#444444" RGB_LT="#888888"/>
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</xsl:variable>
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<xsl:template name="F_BusStd2RGB">
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<xsl:param name="iBusStd" select="'USER'"/>
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<xsl:choose>
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<xsl:when test="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB">
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<xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB"/>
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</xsl:when>
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<xsl:otherwise>
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<xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = 'USER')]/@RGB"/>
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</xsl:otherwise>
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</xsl:choose>
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</xsl:template>
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<xsl:template name="F_BusStd2RGB_LT">
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<xsl:param name="iBusStd" select="'USER'"/>
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<xsl:choose>
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<xsl:when test="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB_LT">
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<xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB_LT"/>
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</xsl:when>
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<xsl:otherwise>
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<xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = 'USER')]/@RGB_LT"/>
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</xsl:otherwise>
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</xsl:choose>
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</xsl:template>
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<xsl:template name="F_IntcIdx2RGB">
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<xsl:param name="iIntcIdx" select="'0'"/>
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<xsl:variable name="index_" select="$iIntcIdx mod 9"/>
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<xsl:choose>
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<xsl:when test="exsl:node-set($COL_INTCS)/INTCCOLOR[(@INDEX = $index_)]/@RGB">
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||||
<xsl:value-of select="exsl:node-set($COL_INTCS)/INTCCOLOR[(@INDEX = $index_)]/@RGB"/>
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||||
</xsl:when>
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||||
<xsl:otherwise>
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<xsl:value-of select="exsl:node-set($COL_INTCS)/INTCCOLOR[(@INDEX = '0')]/@RGB"/>
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</xsl:otherwise>
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</xsl:choose>
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</xsl:template>
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</xsl:stylesheet>
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<?xml version="1.0" standalone="no"?>
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||||
<xsl:stylesheet version="1.0"
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||||
xmlns:svg="http://www.w3.org/2000/svg"
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||||
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
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||||
xmlns:exsl="http://exslt.org/common"
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||||
xmlns:xlink="http://www.w3.org/1999/xlink">
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<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
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||||
doctype-public="-//W3C//DTD SVG 1.0//EN"
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||||
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
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||||
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<xsl:variable name="G_ROOT" select="/"/>
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<xsl:variable name="G_BIFTYPES">
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||||
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<BIFTYPE TYPE="SLAVE"/>
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<BIFTYPE TYPE="MASTER"/>
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||||
<BIFTYPE TYPE="MASTER_SLAVE"/>
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<BIFTYPE TYPE="TARGET"/>
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<BIFTYPE TYPE="INITIATOR"/>
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<BIFTYPE TYPE="MONITOR"/>
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<BIFTYPE TYPE="USER"/>
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</xsl:variable>
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<xsl:variable name="G_BUSSTDS">
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<BUSSTD NAME="XIL"/>
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<BUSSTD NAME="OCM"/>
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<BUSSTD NAME="OPB"/>
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||||
<BUSSTD NAME="LMB"/>
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||||
<BUSSTD NAME="FSL"/>
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||||
<BUSSTD NAME="DCR"/>
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<BUSSTD NAME="FCB"/>
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||||
<BUSSTD NAME="PLB"/>
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<BUSSTD NAME="PLBV46"/>
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<BUSSTD NAME="PLBV46_P2P"/>
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<BUSSTD NAME="USER"/>
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</xsl:variable>
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</xsl:stylesheet>
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<?xml version="1.0" standalone="no"?>
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<xsl:stylesheet version="1.0"
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xmlns:svg="http://www.w3.org/2000/svg"
|
||||
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
|
||||
xmlns:exsl="http://exslt.org/common"
|
||||
xmlns:xlink="http://www.w3.org/1999/xlink">
|
||||
|
||||
<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
|
||||
doctype-public="-//W3C//DTD SVG 1.0//EN"
|
||||
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
|
||||
|
||||
<!--
|
||||
======================================================
|
||||
Function to put TEXT CSS and other Internal
|
||||
Styling properties directly into the output
|
||||
svg. The Qt 4.3 Renderer
|
||||
cannot handle separate CSS StyleSheets
|
||||
======================================================
|
||||
-->
|
||||
<xsl:template name="F_WriteText">
|
||||
|
||||
<xsl:param name="iClass" select="'_UNKNOWN_'"/>
|
||||
<xsl:param name="iText" select="' '"/>
|
||||
<xsl:param name="iX" select="'0'"/>
|
||||
<xsl:param name="iY" select="'0'"/>
|
||||
|
||||
<!--
|
||||
<xsl:message>TEXT <xsl:value-of select="$iText"/></xsl:message>
|
||||
<xsl:message>CLASS <xsl:value-of select="$iClass"/></xsl:message>
|
||||
-->
|
||||
|
||||
<xsl:element name="text">
|
||||
<xsl:attribute name="x"><xsl:value-of select="$iX"/></xsl:attribute>
|
||||
<xsl:attribute name="y"><xsl:value-of select="$iY"/></xsl:attribute>
|
||||
|
||||
<xsl:choose>
|
||||
|
||||
<xsl:when test="$iClass = 'sharedbus_label'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'12pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Courier Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'p2pbus_label'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Courier Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'p2pbus_label_horiz'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'12pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
|
||||
<xsl:attribute name="writing-mode"><xsl:value-of select="'tb'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Courier Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
|
||||
<xsl:when test="$iClass = 'bif_label'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Courier Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'bc_ipinst'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Courier Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'bc_iptype'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_XLNX"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'iogrp_label'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_IORING"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'mpmc_title'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_WHITE"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'16pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'oblique'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'mpmc_biflabel'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_WHITE"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'intr_symbol'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'bkt_label'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'9pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'ipclass_label'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'9pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'key_header'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'key_title'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_XLNX"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'14pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'key_label'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'key_label_small'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
|
||||
<xsl:when test="$iClass = 'key_label_ul'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-decoration"><xsl:value-of select="'underline'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
|
||||
<xsl:when test="$iClass = 'ipd_portlabel'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'ipd_biflabel'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'ipd_iptype'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_XLNX"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'ipd_ipname'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Courier Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'blkd_spec_name'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iClass = 'blkd_spec_value_mid'">
|
||||
<xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
|
||||
<xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
|
||||
<xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
|
||||
<xsl:attribute name="font-family"><xsl:value-of select="'Courier Arial Helvetica san-serif'"/></xsl:attribute>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:otherwise><xsl:message>UNKNOWN Text style class <xsl:value-of select="$iClass"/></xsl:message></xsl:otherwise>
|
||||
</xsl:choose>
|
||||
|
||||
<xsl:value-of select="$iText"/>
|
||||
</xsl:element>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
</xsl:stylesheet>
|
||||
|
||||
<!--
|
||||
text.ioplblgrp {
|
||||
fill: #000088;
|
||||
stroke: none;
|
||||
font-size: 10pt;
|
||||
font-style: normal;
|
||||
font-weight: 900;
|
||||
text-anchor: middle;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
text.iplabel {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-style: italic;
|
||||
font-weight: 800;
|
||||
text-anchor: middle;
|
||||
font-family: Courier Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.iptype {
|
||||
fill: #AA0017;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-style: italic;
|
||||
font-weight: bold;
|
||||
text-anchor: middle;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.busintlabel {
|
||||
fill: #810017;
|
||||
stroke: none;
|
||||
font-size: 7pt;
|
||||
font-style: italic;
|
||||
font-weight: 900;
|
||||
text-anchor: middle;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.mpmcbiflabel {
|
||||
fill: #FFFFFF;
|
||||
stroke: none;
|
||||
font-size: 6pt;
|
||||
font-style: normal;
|
||||
font-weight: 900;
|
||||
text-anchor: middle;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.buslabel {
|
||||
fill: #CC3333;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-style: italic;
|
||||
font-weight: bold;
|
||||
text-anchor: middle;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
|
||||
|
||||
text.ipclass {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 7pt;
|
||||
font-style: normal;
|
||||
font-weight: bold;
|
||||
text-anchor: start;
|
||||
font-family: Times Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.procclass {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 7pt;
|
||||
font-style: normal;
|
||||
font-weight: bold;
|
||||
text-anchor: middle;
|
||||
font-family: Times Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
|
||||
text.portlabel {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-style: normal;
|
||||
font-weight: bold;
|
||||
text-anchor: middle;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.ipdbiflbl {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-style: normal;
|
||||
font-weight: bold;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.mmMHeader {
|
||||
fill: #FFFFFF;
|
||||
stroke: none;
|
||||
font-size: 10pt;
|
||||
font-style: normal;
|
||||
font-weight: bold;
|
||||
text-anchor: middle;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.mmSHeader {
|
||||
fill: #810017;
|
||||
stroke: none;
|
||||
font-size: 10pt;
|
||||
font-style: normal;
|
||||
font-weight: bold;
|
||||
text-anchor: middle;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
|
||||
|
||||
text.dbglabel {
|
||||
fill: #555555;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-style: normal;
|
||||
font-weight: 900;
|
||||
text-anchor: middle;
|
||||
font-family: Times Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.iopnumb {
|
||||
fill: #555555;
|
||||
stroke: none;
|
||||
font-size: 10pt;
|
||||
font-style: normal;
|
||||
font-weight: 900;
|
||||
text-anchor: middle;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
|
||||
|
||||
tspan.iopgrp {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-style: normal;
|
||||
font-weight: 900;
|
||||
text-anchor: middle;
|
||||
baseline-shift:super;
|
||||
font-family: Arial Courier san-serif;
|
||||
}
|
||||
|
||||
|
||||
text.biflabel {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 6pt;
|
||||
font-style: normal;
|
||||
font-weight: 900;
|
||||
text-anchor: middle;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
|
||||
}
|
||||
|
||||
text.p2pbuslabel {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 10pt;
|
||||
font-style: italic;
|
||||
font-weight: bold;
|
||||
text-anchor: start;
|
||||
writing-mode: tb;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.mpbuslabel {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 6pt;
|
||||
font-style: italic;
|
||||
font-weight: bold;
|
||||
text-anchor: start;
|
||||
writing-mode: tb;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
|
||||
text.sharedbuslabel {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 10pt;
|
||||
font-style: italic;
|
||||
font-weight: bold;
|
||||
text-anchor: start;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
|
||||
text.splitbustxt {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 6pt;
|
||||
font-style: normal;
|
||||
font-weight: bold;
|
||||
text-anchor: middle;
|
||||
font-family: sans-serif;
|
||||
}
|
||||
|
||||
text.horizp2pbuslabel {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 6pt;
|
||||
font-style: italic;
|
||||
font-weight: bold;
|
||||
text-anchor: start;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
|
||||
|
||||
text.keytitle {
|
||||
fill: #AA0017;
|
||||
stroke: none;
|
||||
font-size: 12pt;
|
||||
font-weight: bold;
|
||||
text-anchor: middle;
|
||||
font-family: Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.keyheader {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 10pt;
|
||||
font-weight: bold;
|
||||
text-anchor: middle;
|
||||
font-family: Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.keylabel {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-style: italic;
|
||||
font-weight: bold;
|
||||
text-anchor: start;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.keylblul {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-style: italic;
|
||||
font-weight: bold;
|
||||
text-anchor: start;
|
||||
text-decoration: underline;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.specsheader {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 10pt;
|
||||
font-weight: bold;
|
||||
text-anchor: start;
|
||||
font-family: Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.specsvalue {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-style: italic;
|
||||
font-weight: bold;
|
||||
text-anchor: start;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.specsvaluemid {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-style: italic;
|
||||
font-weight: bold;
|
||||
text-anchor: middle;
|
||||
font-family: Verdana Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
text.intrsymbol {
|
||||
fill: #000000;
|
||||
stroke: none;
|
||||
font-size: 8pt;
|
||||
font-weight: bold;
|
||||
text-anchor: start;
|
||||
font-family: Arial Helvetica sans-serif;
|
||||
}
|
||||
|
||||
-->
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,534 @@
|
|||
<?xml version="1.0" standalone="no"?>
|
||||
<xsl:stylesheet version="1.0"
|
||||
xmlns:svg="http://www.w3.org/2000/svg"
|
||||
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
|
||||
xmlns:exsl="http://exslt.org/common"
|
||||
xmlns:xlink="http://www.w3.org/1999/xlink">
|
||||
|
||||
<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
|
||||
doctype-public="-//W3C//DTD SVG 1.0//EN"
|
||||
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
|
||||
|
||||
|
||||
|
||||
<xsl:template name="Define_Busses">
|
||||
<!--
|
||||
<xsl:param name="drawarea_w" select="500"/>
|
||||
<xsl:param name="drawarea_h" select="500"/>
|
||||
-->
|
||||
|
||||
<xsl:for-each select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR">
|
||||
|
||||
<xsl:call-template name="Define_BusArrowsEastWest">
|
||||
<xsl:with-param name="iBusStd" select="@BUSSTD"/>
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:call-template name="Define_BusArrowsNorthSouth">
|
||||
<xsl:with-param name="iBusStd" select="@BUSSTD"/>
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:call-template name="Define_SplitBusses">
|
||||
<xsl:with-param name="iBusStd" select="@BUSSTD"/>
|
||||
</xsl:call-template>
|
||||
|
||||
</xsl:for-each>
|
||||
|
||||
<xsl:call-template name="Define_SharedBus">
|
||||
<xsl:with-param name="iBusStd" select="'PLB'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:call-template name="Define_SharedBus">
|
||||
<xsl:with-param name="iBusStd" select="'PLBV46'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:call-template name="Define_SharedBus">
|
||||
<xsl:with-param name="iBusStd" select="'OPB'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:call-template name="Define_SharedBus_Group"/>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
<xsl:template name="Define_BusArrowsEastWest">
|
||||
<xsl:param name="iBusStd" select="'PLB'"/>
|
||||
|
||||
<xsl:variable name="busStdColor_">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="busStdColor_lt_">
|
||||
<xsl:call-template name="F_BusStd2RGB_LT">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<g id="{$iBusStd}_BusArrowEast">
|
||||
<path class="bus"
|
||||
d="M 0,0
|
||||
L {$BLKD_BUS_ARROW_W}, {ceiling($BLKD_BUS_ARROW_H div 2)}
|
||||
L 0,{$BLKD_BUS_ARROW_H},
|
||||
Z" style="stroke:none; fill:{$busStdColor_}"/>
|
||||
</g>
|
||||
|
||||
<g id="{$iBusStd}_BusArrowWest">
|
||||
<use x="0" y="0" xlink:href="#{$iBusStd}_BusArrowEast" transform="scale(-1,1) translate({$BLKD_BUS_ARROW_W * -1},0)"/>
|
||||
</g>
|
||||
|
||||
<g id="{$iBusStd}_BusArrowHInitiator">
|
||||
<rect x="0"
|
||||
y="{$BLKD_BUS_ARROW_G}"
|
||||
width= "{$BLKD_BUS_ARROW_W}"
|
||||
height="{$BLKD_P2P_BUS_W}"
|
||||
style="stroke:none; fill:{$busStdColor_}"/>
|
||||
</g>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
<!--
|
||||
<xsl:param name="bus_col" select="'OPB'"/>
|
||||
-->
|
||||
|
||||
<xsl:template name="Define_BusArrowsNorthSouth">
|
||||
<xsl:param name="iBusStd" select="'PLB'"/>
|
||||
|
||||
<xsl:variable name="busStdColor_">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="busStdColor_lt_">
|
||||
<xsl:call-template name="F_BusStd2RGB_LT">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<g id="{$iBusStd}_BusArrowSouth">
|
||||
<path class="bus"
|
||||
d="M 0,0
|
||||
L {$BLKD_BUS_ARROW_H},0
|
||||
L {ceiling($BLKD_BUS_ARROW_H div 2)}, {$BLKD_BUS_ARROW_W}
|
||||
Z" style="stroke:none; fill:{$busStdColor_}"/>
|
||||
</g>
|
||||
|
||||
<g id="{$iBusStd}_BusArrowNorth">
|
||||
<use x="0" y="0" xlink:href="#{$iBusStd}_BusArrowSouth" transform="scale(1,-1) translate(0,{$BLKD_BUS_ARROW_H * -1})"/>
|
||||
</g>
|
||||
|
||||
<g id="{$iBusStd}_BusArrowInitiator">
|
||||
<rect x="{$BLKD_BUS_ARROW_G}"
|
||||
y="0"
|
||||
width= "{$BLKD_BUS_ARROW_W - ($BLKD_BUS_ARROW_G * 2)}"
|
||||
height="{$BLKD_BUS_ARROW_H}"
|
||||
style="stroke:none; fill:{$busStdColor_}"/>
|
||||
</g>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
|
||||
<xsl:template name="Draw_P2PBus">
|
||||
|
||||
<xsl:param name="iBusX" select="0"/>
|
||||
<xsl:param name="iBusTop" select="0"/>
|
||||
<xsl:param name="iBusBot" select="0"/>
|
||||
<xsl:param name="iBusStd" select="'_bstd_'"/>
|
||||
<xsl:param name="iBusName" select="'_p2pbus_'"/>
|
||||
<xsl:param name="iBotBifType" select="'_unk_'"/>
|
||||
<xsl:param name="iTopBifType" select="'_unk_'"/>
|
||||
|
||||
<xsl:variable name="busStdColor_">
|
||||
<xsl:choose>
|
||||
|
||||
<xsl:when test="@BUSSTD">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="@BUSSTD"/>
|
||||
</xsl:call-template>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="not($iBusStd = '_bstd_')">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:otherwise>
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="'TRS'"/>
|
||||
</xsl:call-template>
|
||||
</xsl:otherwise>
|
||||
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="p2pH_" select="($iBusBot - $iBusTop) - ($BLKD_BUS_ARROW_H * 2)"/>
|
||||
|
||||
<xsl:variable name="botArrow_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="((($iBotBifType = 'INITIATOR') or ($iBotBifType = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowInitiator</xsl:when>
|
||||
<xsl:otherwise>BusArrowSouth</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="topArrow_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="((($iTopBifType = 'INITIATOR') or ($iTopBifType = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowInitiator</xsl:when>
|
||||
<xsl:otherwise>BusArrowNorth</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:if test="@BUSSTD">
|
||||
<use x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
|
||||
y="{$iBusTop + ($BLKD_BIFC_H - $BLKD_BUS_ARROW_H) + $BLKD_BUS_ARROW_H}"
|
||||
xlink:href="#{@BUSSTD}_{$topArrow_}"/>
|
||||
|
||||
<use x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
|
||||
y="{$iBusBot - $BLKD_BUS_ARROW_H}"
|
||||
xlink:href="#{@BUSSTD}_{$botArrow_}"/>
|
||||
</xsl:if>
|
||||
|
||||
<xsl:if test="(not(@BUSSTD) and not($iBusStd = '_bstd_'))">
|
||||
<use x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
|
||||
y="{$iBusTop + ($BLKD_BIFC_H - $BLKD_BUS_ARROW_H) + $BLKD_BUS_ARROW_H}"
|
||||
xlink:href="#{$iBusStd}_{$topArrow_}"/>
|
||||
|
||||
<use x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
|
||||
y="{$iBusBot - $BLKD_BUS_ARROW_H}"
|
||||
xlink:href="#{$iBusStd}_{$botArrow_}"/>
|
||||
</xsl:if>
|
||||
|
||||
|
||||
<rect x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2) + $BLKD_BUS_ARROW_G}"
|
||||
y="{$iBusTop + $BLKD_BIFC_H + $BLKD_BUS_ARROW_H}"
|
||||
height= "{$p2pH_ - ($BLKD_BUS_ARROW_H * 2)}"
|
||||
width="{$BLKD_BUS_ARROW_W - ($BLKD_BUS_ARROW_G * 2)}"
|
||||
style="stroke:none; fill:{$busStdColor_}"/>
|
||||
|
||||
<!--
|
||||
<text class="p2pbuslabel"
|
||||
x="{$iBusX + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 4}"
|
||||
y="{$iBusTop + ($BLKD_BUS_ARROW_H * 3)}">
|
||||
<xsl:value-of select="$iBusName"/>
|
||||
</text>
|
||||
-->
|
||||
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="($iBusX + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 4)"/>
|
||||
<xsl:with-param name="iY" select="($iBusTop + ($BLKD_BUS_ARROW_H * 3))"/>
|
||||
<xsl:with-param name="iText" select="$iBusName"/>
|
||||
<xsl:with-param name="iClass" select="'p2pbus_label'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:if test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iBusName)]/@GROUP">
|
||||
<!--
|
||||
<text class="ioplblgrp"
|
||||
x="{$iBusX + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 6}"
|
||||
y="{$iBusTop + ($BLKD_BUS_ARROW_H * 10)}">
|
||||
<xsl:value-of select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iBusName)]/@GROUP"/>
|
||||
</text>
|
||||
-->
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="(iBusX + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 6)"/>
|
||||
<xsl:with-param name="iY" select="($iBusTop + ($BLKD_BUS_ARROW_H * 10))"/>
|
||||
<xsl:with-param name="iText" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iBusName)]/@GROUP"/>
|
||||
<xsl:with-param name="iClass" select="'iogrp_label'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
</xsl:if>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
|
||||
<xsl:template name="Draw_Proc2ProcBus">
|
||||
|
||||
<xsl:param name="iBc_Y" select="0"/>
|
||||
<xsl:param name="iBusStd" select="'_bstd_'"/>
|
||||
<xsl:param name="iBusName" select="'_p2pbus_'"/>
|
||||
<xsl:param name="iBcLeft_X" select="0"/>
|
||||
<xsl:param name="iBcRght_X" select="0"/>
|
||||
<xsl:param name="iLeftBifType" select="'_unk_'"/>
|
||||
<xsl:param name="iRghtBifType" select="'_unk_'"/>
|
||||
|
||||
<xsl:variable name="busStdColor_">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="pr2pr_W_" select="($iBcRght_X - $iBcLeft_X)"/>
|
||||
|
||||
<xsl:variable name="leftArrow_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="((($iLeftBifType = 'INITIATOR') or ($iLeftBifType = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowHInitiator</xsl:when>
|
||||
<xsl:otherwise>BusArrowWest</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="rghtArrow_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="((($iRghtBifType = 'INITIATOR') or ($iRghtBifType = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowHInitiator</xsl:when>
|
||||
<xsl:otherwise>BusArrowEast</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
|
||||
<xsl:variable name="bus_Y_" select="($iBc_Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2))"/>
|
||||
|
||||
<use x="{$iBcLeft_X}" y="{$bus_Y_}" xlink:href="#{$iBusStd}_{$leftArrow_}"/>
|
||||
<use x="{$iBcRght_X - $BLKD_BUS_ARROW_W}" y="{$bus_Y_}" xlink:href="#{$iBusStd}_{$rghtArrow_}"/>
|
||||
|
||||
<rect x="{$iBcLeft_X + $BLKD_BUS_ARROW_W}"
|
||||
y="{$bus_Y_ + $BLKD_BUS_ARROW_G}"
|
||||
width= "{$pr2pr_W_ - (2 * $BLKD_BUS_ARROW_W)}"
|
||||
height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$busStdColor_}"/>
|
||||
|
||||
<!--
|
||||
<text class="horizp2pbuslabel"
|
||||
x="{$iBcLeft_X + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 4}"
|
||||
y="{($bus_Y_)}"><xsl:value-of select="$iBusName"/></text>
|
||||
|
||||
<text class="horizp2pbuslabel"
|
||||
x="{$iBcRght_X - (string-length($iBusName) * 8)}"
|
||||
y="{($bus_Y_)}"><xsl:value-of select="$iBusName"/></text>
|
||||
-->
|
||||
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="($iBcLeft_X + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 4)"/>
|
||||
<xsl:with-param name="iY" select="$bus_Y_"/>
|
||||
<xsl:with-param name="iText" select="$iBusName"/>
|
||||
<xsl:with-param name="iClass" select="'p2pbus_label'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="(iBcRght_X - (string-length($iBusName) * 8))"/>
|
||||
<xsl:with-param name="iY" select="$bus_Y_"/>
|
||||
<xsl:with-param name="iText" select="$iBusName"/>
|
||||
<xsl:with-param name="iClass" select="'p2pbus_label'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
|
||||
<xsl:template name="Draw_SplitConnBus">
|
||||
|
||||
<xsl:param name="iBc_X" select="0"/>
|
||||
<xsl:param name="iBc_Y" select="0"/>
|
||||
<xsl:param name="iBc_Type" select="'_unk_'"/>
|
||||
<xsl:param name="iBc_Side" select="'_unk_'"/>
|
||||
<xsl:param name="iBusStd" select="'_bstd_'"/>
|
||||
<xsl:param name="iBusName" select="'_p2pbus_'"/>
|
||||
|
||||
<xsl:variable name="busStdColor_">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="connArrow_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="((($iBc_Type = 'INITIATOR') or ($iBc_Type = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowHInitiator</xsl:when>
|
||||
<xsl:otherwise>BusArrowEast</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="arrow_Y_" select="($iBc_Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2))"/>
|
||||
|
||||
<xsl:variable name="bus_X_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="$iBc_Side = '0'"><xsl:value-of select="($iBc_X - ($BLKD_BUS_ARROW_W * 2))"/></xsl:when>
|
||||
<xsl:when test="$iBc_Side = '1'"><xsl:value-of select="($iBc_X + $BLKD_BIFC_W + $BLKD_BUS_ARROW_W)"/></xsl:when>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<!--
|
||||
<use x="{$bus_X_}" y="{$arrow_Y_}" xlink:href="#{$busStd}_BusArrowHInitiator"/>
|
||||
-->
|
||||
|
||||
<xsl:variable name="arrow_X_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="$iBc_Side = '0'"><xsl:value-of select="($iBc_X - $BLKD_BUS_ARROW_W)"/></xsl:when>
|
||||
<xsl:when test="$iBc_Side = '1'"><xsl:value-of select="($iBc_X + $BLKD_BIFC_W)"/></xsl:when>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
<xsl:choose>
|
||||
<xsl:when test="(($iBusStd = 'FSL') and (($iBc_Type = 'MASTER') or ($iBc_Type = 'INITIATOR')))">
|
||||
<use x="{$arrow_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_{$connArrow_}"/>
|
||||
<use x="{$bus_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_BusArrowHInitiator"/>
|
||||
</xsl:when>
|
||||
<xsl:when test="(($iBc_Side = '1') and not($iBusStd = 'FSL') and (($iBc_Type = 'MASTER') or ($iBc_Type = 'INITIATOR')))">
|
||||
<use x="{$arrow_X_ - $BLKD_BIFC_W}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_SplitBus_WEST"/>
|
||||
</xsl:when>
|
||||
<xsl:when test="(($iBc_Side = '1') and (($iBc_Type = 'SLAVE') or ($iBc_Type = 'TARGET') or ($iBc_Type = 'USER')))">
|
||||
<use x="{$arrow_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_SplitBus_EAST"/>
|
||||
</xsl:when>
|
||||
<xsl:otherwise>
|
||||
<use x="{$arrow_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_{$connArrow_}"/>
|
||||
<use x="{$bus_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_BusArrowHInitiator"/>
|
||||
</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
|
||||
<xsl:variable name="text_X_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="$iBc_Side = '0'"><xsl:value-of select="($bus_X_ - $BLKD_BUS_ARROW_W - (string-length($iBusName) * 5))"/></xsl:when>
|
||||
<xsl:when test="$iBc_Side = '1'"><xsl:value-of select="($bus_X_ + $BLKD_BUS_ARROW_W)"/></xsl:when>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
|
||||
<!--
|
||||
<text class="horizp2pbuslabel"
|
||||
x="{$text_X_}"
|
||||
y="{($arrow_Y_)}">
|
||||
<xsl:value-of select="$iBusName"/>
|
||||
</text>
|
||||
-->
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="$text_X_"/>
|
||||
<xsl:with-param name="iY" select="$arrow_Y_"/>
|
||||
<xsl:with-param name="iText" select="$iBusName"/>
|
||||
<xsl:with-param name="iClass" select="'p2pbus_label'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
|
||||
<xsl:template name="Define_SharedBus">
|
||||
|
||||
<xsl:param name="iBusStd" select="'PLB46'"/>
|
||||
|
||||
<xsl:variable name="sharedbus_w_" select="($G_Total_DrawArea_W - ($BLKD_INNER_GAP * 2))"/>
|
||||
|
||||
<xsl:variable name="busStdColor_">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="busStdColor_lt_">
|
||||
<xsl:call-template name="F_BusStd2RGB_LT">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<g id="{$iBusStd}_SharedBus">
|
||||
<use x="0" y="0" xlink:href="#{$iBusStd}_BusArrowWest"/>
|
||||
<use x="{$sharedbus_w_ - $BLKD_BUS_ARROW_W}" y="0" xlink:href="#{$iBusStd}_BusArrowEast"/>
|
||||
|
||||
<rect x="{$BLKD_BUS_ARROW_W}"
|
||||
y="{$BLKD_BUS_ARROW_G}"
|
||||
width= "{$sharedbus_w_ - ($BLKD_BUS_ARROW_W * 2)}"
|
||||
height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$busStdColor_}"/>
|
||||
</g>
|
||||
</xsl:template>
|
||||
|
||||
|
||||
<xsl:template name="Define_SplitBusses">
|
||||
|
||||
<xsl:param name="iBusStd" select="'FSL'"/>
|
||||
|
||||
<xsl:variable name="busStdColor_">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="bifc_r_" select="ceiling($BLKD_BIFC_W div 3)"/>
|
||||
|
||||
<g id="{$iBusStd}_SplitBus_EAST">
|
||||
<use x="0" y="0" xlink:href="#{$iBusStd}_BusArrowWest"/>
|
||||
|
||||
<rect x="{$BLKD_BUS_ARROW_W}"
|
||||
y="{$BLKD_BUS_ARROW_G}"
|
||||
width= "{$BLKD_BIFC_W}"
|
||||
height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$busStdColor_}"/>
|
||||
|
||||
</g>
|
||||
|
||||
<xsl:variable name="splbus_w_" select="($BLKD_BUS_ARROW_W + $BLKD_BIFC_W + $BLKD_BIFC_Wi)"/>
|
||||
|
||||
<g id="{$iBusStd}_SplitBus_WEST">
|
||||
<use x="0" y="0" xlink:href="#{$iBusStd}_SplitBus_EAST" transform="scale(-1,1) translate({$splbus_w_ * -1},0)"/>
|
||||
</g>
|
||||
|
||||
<g id="{$iBusStd}_SplitBus_OneWay">
|
||||
|
||||
<rect x="0"
|
||||
y="{$BLKD_BUS_ARROW_G}"
|
||||
width= "{($BLKD_BUS_ARROW_W * 2)}"
|
||||
height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$busStdColor_}"/>
|
||||
|
||||
<rect x="{($BLKD_BUS_ARROW_W * 2)}"
|
||||
y="0"
|
||||
width= "{$BLKD_BUS_ARROW_H}"
|
||||
height="{$BLKD_BUS_ARROW_H}" style="stroke:none; fill:{$busStdColor_}"/>
|
||||
|
||||
</g>
|
||||
</xsl:template>
|
||||
|
||||
|
||||
<xsl:template name="Define_SharedBus_Group">
|
||||
|
||||
<!-- The Bridges go into the shared bus shape -->
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BRIDGESHAPES/MODULE">
|
||||
|
||||
<xsl:variable name="modInst_" select="@INSTANCE"/>
|
||||
<xsl:variable name="modType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInst_)]/@MODTYPE"/>
|
||||
|
||||
<xsl:call-template name="Define_Peripheral">
|
||||
<xsl:with-param name="iModVori" select="'normal'"/>
|
||||
<xsl:with-param name="iModInst" select="$modInst_"/>
|
||||
<xsl:with-param name="iModType" select="$modType_"/>
|
||||
</xsl:call-template>
|
||||
|
||||
</xsl:for-each>
|
||||
|
||||
<g id="group_sharedBusses">
|
||||
|
||||
<!-- Draw the shared bus shapes first -->
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSSHAPES/MODULE">
|
||||
<xsl:variable name="instance_" select="@INSTANCE"/>
|
||||
|
||||
<xsl:variable name="busStd_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $instance_)]/@BUSSTD"/>
|
||||
<xsl:variable name="busIndex_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $instance_)]/@BUS_INDEX"/>
|
||||
|
||||
<xsl:variable name="busY_" select="($busIndex_ * $BLKD_SBS_LANE_H)"/>
|
||||
|
||||
<use x="0" y="{$busY_}" xlink:href="#{$busStd_}_SharedBus"/>
|
||||
|
||||
<!--
|
||||
<text class="sharedbuslabel"
|
||||
x="8"
|
||||
y="{$busY_ + $BLKD_BUS_ARROW_H + 10}">
|
||||
<xsl:value-of select="$instance_"/>
|
||||
</text>
|
||||
-->
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="'8'"/>
|
||||
<xsl:with-param name="iY" select="($busY_ + $BLKD_BUS_ARROW_H + 10)"/>
|
||||
<xsl:with-param name="iText" select="$instance_"/>
|
||||
<xsl:with-param name="iClass" select="'sharedbus_label'"/>
|
||||
</xsl:call-template>
|
||||
</xsl:for-each>
|
||||
|
||||
</g>
|
||||
|
||||
<g id="KEY_SharedBus">
|
||||
<use x="0" y="0" xlink:href="#KEY_BusArrowWest"/>
|
||||
<use x="30" y="0" xlink:href="#KEY_BusArrowEast"/>
|
||||
|
||||
<xsl:variable name="key_col_">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="'KEY'"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<rect x="{$BLKD_BUS_ARROW_W}"
|
||||
y="{$BLKD_BUS_ARROW_G}"
|
||||
width= "{30 - $BLKD_BUS_ARROW_W}"
|
||||
height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$key_col_}"/>
|
||||
</g>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
</xsl:stylesheet>
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,115 @@
|
|||
<?xml version="1.0" standalone="no"?>
|
||||
<xsl:stylesheet version="1.0"
|
||||
xmlns:svg="http://www.w3.org/2000/svg"
|
||||
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
|
||||
xmlns:exsl="http://exslt.org/common"
|
||||
xmlns:xlink="http://www.w3.org/1999/xlink">
|
||||
|
||||
<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
|
||||
doctype-public="-//W3C//DTD SVG 1.0//EN"
|
||||
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
|
||||
|
||||
<!--
|
||||
===========================================================================
|
||||
CALCULATE GLOBAL VARIABLES BASED ON BLKDIAGRAM DEF IN INPUT XML
|
||||
===========================================================================
|
||||
-->
|
||||
|
||||
<xsl:variable name="G_Total_StandAloneMpmc_H">
|
||||
<xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/MPMCSHAPE">
|
||||
<xsl:value-of select="($BLKD_MPMC_MOD_H + $BLKD_MPMC2PROC_GAP)"/>
|
||||
</xsl:if>
|
||||
<xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/MPMCSHAPE)">0</xsl:if>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="G_Max_Stack_BlwSbs_H">
|
||||
<xsl:call-template name="F_Calc_Max_Stack_BlwSbs_Height"/>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="G_Max_Stack_AbvSbs_H">
|
||||
<xsl:call-template name="F_Calc_Max_Stack_AbvSbs_Height"/>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="G_Total_Stacks_W">
|
||||
<xsl:call-template name="F_Calc_Stack_X">
|
||||
<xsl:with-param name="iStackIdx" select="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH)"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="G_NumOfSharedBusses" select="count($G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSSHAPES/MODULE)"/>
|
||||
<xsl:variable name="G_Total_SharedBus_H" select="($G_NumOfSharedBusses * $BLKD_SBS_LANE_H)"/>
|
||||
|
||||
<xsl:variable name="G_NumOfBridges" select="count($G_ROOT/EDKSYSTEM/BLKDIAGRAM/BRIDGESHAPES/MODULE)"/>
|
||||
<xsl:variable name="G_Total_Bridges_W" select="(($G_NumOfBridges * ($BLKD_MOD_W + ($BLKD_BUS_LANE_W * 2))) + $BLKD_BRIDGE_GAP)"/>
|
||||
|
||||
<xsl:variable name="G_Total_DrawArea_CLC" select="($G_Total_Stacks_W + $G_Total_Bridges_W + ($BLKD_INNER_GAP * 2))"/>
|
||||
|
||||
<xsl:variable name="G_Total_DrawArea_W">
|
||||
<xsl:if test="$G_Total_DrawArea_CLC > ($BLKD_KEY_W + $BLKD_SPECS_W + $BLKD_SPECS2KEY_GAP)">
|
||||
<xsl:value-of select="$G_Total_DrawArea_CLC"/>
|
||||
</xsl:if>
|
||||
<xsl:if test="not($G_Total_DrawArea_CLC > ($BLKD_KEY_W + $BLKD_SPECS2KEY_GAP + $BLKD_SPECS_W))">
|
||||
<xsl:value-of select="($BLKD_KEY_W + $BLKD_SPECS_W + $BLKD_SPECS2KEY_GAP)"/>
|
||||
</xsl:if>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="G_IpBucketMods_H">
|
||||
<xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/IPBUCKET/@MODS_H"><xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/IPBUCKET/@MODS_H"/></xsl:if>
|
||||
<xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/IPBUCKET/@MODS_H)">0</xsl:if>
|
||||
</xsl:variable>
|
||||
<xsl:variable name="G_Total_IpBucket_H" select="($G_IpBucketMods_H * ($BLKD_MOD_H + $BLKD_BIF_H))"/>
|
||||
|
||||
<xsl:variable name="G_Total_UnkBucket_H">
|
||||
<xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET">
|
||||
|
||||
<xsl:variable name="unkBucketMods_H_">
|
||||
<xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@MODS_H"><xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@MODS_H"/></xsl:if>
|
||||
<xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@MODS_H)">0</xsl:if>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="total_UnkMod_H_" select="($unkBucketMods_H_ * ($BLKD_MOD_H + $BLKD_BIF_H))"/>
|
||||
|
||||
<xsl:variable name="unkBucketBifs_H_">
|
||||
<xsl:if test="/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@BIFS_H"><xsl:value-of select="/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@BIFS_H"/></xsl:if>
|
||||
<xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@BIFS_H)">0</xsl:if>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="total_UnkBif_H_" select="($unkBucketBifs_H_ * ($BLKD_MOD_H + $BLKD_BIF_H))"/>
|
||||
|
||||
<xsl:value-of select="($total_UnkBif_H_ + $total_UnkMod_H_)"/>
|
||||
</xsl:if>
|
||||
|
||||
<xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET)">0</xsl:if>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="G_SharedBus_Y" select="($BLKD_INNER_Y + $G_Total_StandAloneMpmc_H + $G_Max_Stack_AbvSbs_H + $BLKD_PROC2SBS_GAP)"/>
|
||||
|
||||
<!-- ===========================================================================
|
||||
Calculate the width of the Block Diagram based on the total number of
|
||||
buslanes and modules in the design. If there are no buslanes or modules,
|
||||
a default width, just wide enough to display the KEY and SPECS is used
|
||||
=========================================================================== -->
|
||||
<xsl:variable name="G_Total_Blkd_W" select="($G_Total_DrawArea_W + (($BLKD_PRTCHAN_W + $BLKD_IORCHAN_W)* 2))"/>
|
||||
<xsl:variable name="G_Total_Diag_W" select="$G_Total_Blkd_W"/>
|
||||
|
||||
<!-- =========================================================================== -->
|
||||
<!-- Calculate the height of the Block Diagram based on the total number of -->
|
||||
<!-- buslanes and modules in the design. Take into account special shapes such -->
|
||||
<!-- as MultiProc shapes. -->
|
||||
<!-- =========================================================================== -->
|
||||
|
||||
|
||||
<xsl:variable name="G_Total_DrawArea_H" select="($G_Total_StandAloneMpmc_H + $G_Max_Stack_AbvSbs_H + $BLKD_PROC2SBS_GAP + $G_Total_SharedBus_H + $G_Max_Stack_BlwSbs_H + $BLKD_SBS2IP_GAP + $G_Total_IpBucket_H + $BLKD_IP2UNK_GAP + $G_Total_UnkBucket_H + ($BLKD_INNER_GAP * 2))"/>
|
||||
<xsl:variable name="G_Total_Blkd_H" select="($G_Total_DrawArea_H + (($BLKD_PRTCHAN_H + $BLKD_IORCHAN_H)* 2))"/>
|
||||
|
||||
<xsl:variable name="G_Total_Diag_H">
|
||||
<xsl:if test="($IN_TESTMODE = 'TRUE')">
|
||||
<xsl:message>Generating Blkdiagram in TestMode </xsl:message>
|
||||
<xsl:value-of select="$G_Total_Blkd_H"/>
|
||||
</xsl:if>
|
||||
<xsl:if test="(not($IN_TESTMODE) or ($IN_TESTMODE = 'FALSE'))">
|
||||
<xsl:value-of select="($G_Total_Blkd_H + $BLKD_DRAWAREA2KEY_GAP + $BLKD_KEY_H)"/>
|
||||
</xsl:if>
|
||||
</xsl:variable>
|
||||
|
||||
</xsl:stylesheet>
|
||||
|
|
@ -0,0 +1,490 @@
|
|||
<?xml version="1.0" standalone="no"?>
|
||||
<xsl:stylesheet version="1.0"
|
||||
xmlns:svg="http://www.w3.org/2000/svg"
|
||||
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
|
||||
xmlns:math="http://exslt.org/math"
|
||||
xmlns:exsl="http://exslt.org/common"
|
||||
xmlns:xlink="http://www.w3.org/1999/xlink"
|
||||
extension-element-prefixes="math">
|
||||
|
||||
<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
|
||||
doctype-public="-//W3C//DTD SVG 1.0//EN"
|
||||
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
|
||||
|
||||
|
||||
<!-- ======================= DEF BLOCK =============================== -->
|
||||
<xsl:template name="Define_IOPorts">
|
||||
|
||||
<xsl:variable name="key_col_">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="'KEY'"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="key_lt_col_">
|
||||
<xsl:call-template name="F_BusStd2RGB_LT">
|
||||
<xsl:with-param name="iBusStd" select="'KEY'"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<g id="G_IOPort">
|
||||
<rect
|
||||
x="0"
|
||||
y="0"
|
||||
width= "{$BLKD_IOP_W}"
|
||||
height="{$BLKD_IOP_H}" style="fill:{$COL_IORING_LT}; stroke:{$COL_IORING}; stroke-width:1"/>
|
||||
|
||||
<path class="ioport"
|
||||
d="M 0,0
|
||||
L {$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
|
||||
L 0,{$BLKD_IOP_H}
|
||||
Z" style="stroke:none; fill:{$COL_SYSPRT}"/>
|
||||
</g>
|
||||
|
||||
<g id="G_BIPort">
|
||||
<rect
|
||||
x="0"
|
||||
y="0"
|
||||
width= "{$BLKD_IOP_W}"
|
||||
height="{$BLKD_IOP_H}" style="fill:{$COL_IORING_LT}; stroke:{$COL_IORING}; stroke-width:1"/>
|
||||
|
||||
<path class="btop"
|
||||
d="M 0,{ceiling($BLKD_IOP_H div 2)}
|
||||
{ceiling($BLKD_IOP_W div 2)},0
|
||||
{$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
|
||||
Z" style="stroke:none; fill:{$COL_SYSPRT}"/>
|
||||
|
||||
<path class="bbot"
|
||||
d="M 0,{ceiling($BLKD_IOP_H div 2)}
|
||||
{ceiling($BLKD_IOP_W div 2)},{$BLKD_IOP_H}
|
||||
{$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
|
||||
Z" style="stroke:none; fill:{$COL_SYSPRT}"/>
|
||||
|
||||
</g>
|
||||
|
||||
<g id="KEY_IOPort">
|
||||
<rect
|
||||
x="0"
|
||||
y="0"
|
||||
width= "{$BLKD_IOP_W}"
|
||||
height="{$BLKD_IOP_H}" style="fill:{$key_lt_col_}; stroke:none;"/>
|
||||
|
||||
<path class="ioport"
|
||||
d="M 0,0
|
||||
L {$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
|
||||
L 0,{$BLKD_IOP_H}
|
||||
Z" style="stroke:none; fill:{$key_col_}"/>
|
||||
</g>
|
||||
|
||||
<g id="KEY_BIPort">
|
||||
<rect
|
||||
x="0"
|
||||
y="0"
|
||||
width= "{$BLKD_IOP_W}"
|
||||
height="{$BLKD_IOP_H}" style="fill:{$key_lt_col_}; stroke:none;"/>
|
||||
|
||||
<path class="btop"
|
||||
d="M 0,{ceiling($BLKD_IOP_H div 2)}
|
||||
{ceiling($BLKD_IOP_W div 2)},0
|
||||
{$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
|
||||
Z" style="stroke:none; fill:{$key_col_}"/>
|
||||
|
||||
<path class="bbot"
|
||||
d="M 0,{ceiling($BLKD_IOP_H div 2)}
|
||||
{ceiling($BLKD_IOP_W div 2)},{$BLKD_IOP_H}
|
||||
{$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
|
||||
Z" style="stroke:none; fill:{$key_col_}"/>
|
||||
</g>
|
||||
|
||||
<g id="KEY_INPort">
|
||||
<use x="0" y="0" xlink:href="#KEY_IOPort"/>
|
||||
<rect
|
||||
x="{$BLKD_IOP_W}"
|
||||
y="0"
|
||||
width= "{ceiling($BLKD_IOP_W div 2)}"
|
||||
height="{$BLKD_IOP_H}" style="fill:{$COL_SYSPRT}; stroke:none;"/>
|
||||
</g>
|
||||
|
||||
<g id="KEY_OUTPort">
|
||||
<use x="0" y="0" xlink:href="#KEY_IOPort" transform="scale(-1,1) translate({$BLKD_IOP_W * -1},0)"/>
|
||||
<rect
|
||||
x="{$BLKD_IOP_W}"
|
||||
y="0"
|
||||
width= "{ceiling($BLKD_IOP_W div 2)}"
|
||||
height="{$BLKD_IOP_H}" style="fill:{$COL_SYSPRT}; stroke:none;"/>
|
||||
</g>
|
||||
|
||||
<g id="KEY_INOUTPort">
|
||||
<use x="0" y="0" xlink:href="#KEY_BIPort"/>
|
||||
<rect
|
||||
x="{$BLKD_IOP_W}"
|
||||
y="0"
|
||||
width= "{ceiling($BLKD_IOP_W div 2)}"
|
||||
height="{$BLKD_IOP_H}" style="fill:{$COL_SYSPRT}; stroke:none;"/>
|
||||
</g>
|
||||
</xsl:template>
|
||||
|
||||
<!-- ======================= DRAW BLOCK =============================== -->
|
||||
|
||||
<xsl:template name="Draw_IOPorts">
|
||||
|
||||
<xsl:variable name="ports_count_" select="count($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT)"/>
|
||||
|
||||
<xsl:if test="($ports_count_ > 30)">
|
||||
<xsl:call-template name="Draw_IOPorts_4Sides"/>
|
||||
</xsl:if>
|
||||
|
||||
<xsl:if test="($ports_count_ <= 30)">
|
||||
<xsl:call-template name="Draw_IOPorts_2Sides"/>
|
||||
</xsl:if>
|
||||
</xsl:template>
|
||||
|
||||
<xsl:template name="Draw_IOPorts_2Sides">
|
||||
|
||||
<xsl:variable name="ports_count_" select="count($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT)"/>
|
||||
<xsl:variable name="ports_per_side_" select="ceiling($ports_count_ div 2)"/>
|
||||
|
||||
<xsl:variable name="h_ofs_">
|
||||
<xsl:value-of select="$BLKD_PRTCHAN_W + ceiling(($G_Total_DrawArea_W - (($ports_per_side_ * $BLKD_IOP_W) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="v_ofs_">
|
||||
<xsl:value-of select="$BLKD_PRTCHAN_H + ceiling(($G_Total_DrawArea_H - (($ports_per_side_ * $BLKD_IOP_H) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
|
||||
</xsl:variable>
|
||||
|
||||
|
||||
<xsl:for-each select="EXTERNALPORTS/PORT">
|
||||
<xsl:sort data-type="number" select="@INDEX" order="ascending"/>
|
||||
|
||||
<xsl:variable name="poffset_" select="0"/>
|
||||
<xsl:variable name="pcount_" select="$poffset_ + (position() -1)"/>
|
||||
|
||||
<xsl:variable name="pdir_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="(@DIR='I' or @DIR='IN' or @DIR='INPUT')">I</xsl:when>
|
||||
<xsl:when test="(@DIR='O' or @DIR='OUT' or @DIR='OUTPUT')">O</xsl:when>
|
||||
<xsl:when test="(@DIR='IO' or @DIR='INOUT')">B</xsl:when>
|
||||
<xsl:otherwise>I</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="pside_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pcount_ >= ($ports_per_side_ * 0) and ($pcount_ < ($ports_per_side_ * 1)))">W</xsl:when>
|
||||
<xsl:when test="($pcount_ >= ($ports_per_side_ * 1) and ($pcount_ < ($ports_per_side_ * 2)))">E</xsl:when>
|
||||
<xsl:otherwise>D</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="pdec_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($ports_per_side_ * 0)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($ports_per_side_ * 1)"/></xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="px_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($BLKD_PRTCHAN_W - $BLKD_IOP_W)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)) - 2)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($BLKD_PRTCHAN_W + ($BLKD_IORCHAN_W * 2) + $G_Total_DrawArea_W)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'N')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)))"/></xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="py_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_PRTCHAN_H + ($BLKD_IORCHAN_H * 2) + $G_Total_DrawArea_H)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'N')"><xsl:value-of select="($BLKD_PRTCHAN_H - $BLKD_IOP_H)"/></xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="prot_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'I'))">0</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'I'))">-90</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'I'))">180</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'I'))">90</xsl:when>
|
||||
|
||||
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'O'))">180</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'O'))">90</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'O'))">0</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'O'))">-90</xsl:when>
|
||||
|
||||
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'B'))">0</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'B'))">0</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'B'))">0</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'B'))">0</xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
|
||||
<xsl:variable name="txo_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pside_ = 'W')">-10</xsl:when>
|
||||
<xsl:when test="($pside_ = 'S')">6</xsl:when>
|
||||
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="(($BLKD_IOP_W * 2) - 4)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'N')">6</xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="tyo_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_IOP_H * 2) + 4"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'N')">-2</xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:if test="$pdir_ = 'B'">
|
||||
<use x="{$px_}"
|
||||
y="{$py_}"
|
||||
id="{@NAME}"
|
||||
xlink:href="#G_BIPort"
|
||||
transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
|
||||
</xsl:if>
|
||||
|
||||
<xsl:if test="(($pside_ = 'S') and not($pdir_ = 'B'))">
|
||||
<rect
|
||||
x="{$px_}"
|
||||
y="{$py_}"
|
||||
width= "{$BLKD_IOP_W}"
|
||||
height="{$BLKD_IOP_H}" style="stroke:{$COL_IORING}; stroke-width:1"/>
|
||||
</xsl:if>
|
||||
|
||||
<xsl:if test="not($pdir_ = 'B')">
|
||||
<use x="{$px_}"
|
||||
y="{$py_}"
|
||||
id="{@NAME}"
|
||||
xlink:href="#G_IOPort"
|
||||
transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
|
||||
</xsl:if>
|
||||
|
||||
<text class="iopnumb"
|
||||
x="{$px_ + $txo_}"
|
||||
y="{$py_ + $tyo_}">
|
||||
<xsl:value-of select="@INDEX"/><tspan class="iopgrp"><xsl:value-of select="@GROUP"/></tspan>
|
||||
</text>
|
||||
|
||||
</xsl:for-each>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
|
||||
<xsl:template name="Draw_IOPorts_4Sides">
|
||||
|
||||
<xsl:variable name="ports_count_" select="count($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT)"/>
|
||||
<xsl:variable name="ports_per_side_" select="ceiling($ports_count_ div 4)"/>
|
||||
|
||||
<xsl:variable name="h_ofs_">
|
||||
<xsl:value-of select="$BLKD_PRTCHAN_W + ceiling(($G_Total_DrawArea_W - (($ports_per_side_ * $BLKD_IOP_W) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="v_ofs_">
|
||||
<xsl:value-of select="$BLKD_PRTCHAN_H + ceiling(($G_Total_DrawArea_H - (($ports_per_side_ * $BLKD_IOP_H) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
|
||||
</xsl:variable>
|
||||
|
||||
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT">
|
||||
<xsl:sort data-type="number" select="@INDEX" order="ascending"/>
|
||||
|
||||
<xsl:variable name="poffset_" select="0"/>
|
||||
<xsl:variable name="pcount_" select="$poffset_ + (position() -1)"/>
|
||||
|
||||
<xsl:variable name="pdir_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="(@DIR='I' or @DIR='IN' or @DIR='INPUT')">I</xsl:when>
|
||||
<xsl:when test="(@DIR='O' or @DIR='OUT' or @DIR='OUTPUT')">O</xsl:when>
|
||||
<xsl:when test="(@DIR='IO' or @DIR='INOUT')">B</xsl:when>
|
||||
<xsl:otherwise>I</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="pside_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pcount_ >= ($ports_per_side_ * 0) and ($pcount_ < ($ports_per_side_ * 1)))">W</xsl:when>
|
||||
<xsl:when test="($pcount_ >= ($ports_per_side_ * 1) and ($pcount_ < ($ports_per_side_ * 2)))">S</xsl:when>
|
||||
<xsl:when test="($pcount_ >= ($ports_per_side_ * 2) and ($pcount_ < ($ports_per_side_ * 3)))">E</xsl:when>
|
||||
<xsl:when test="($pcount_ >= ($ports_per_side_ * 3) and ($pcount_ < ($ports_per_side_ * 4)))">N</xsl:when>
|
||||
<xsl:otherwise>D</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="pdec_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($ports_per_side_ * 0)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($ports_per_side_ * 1)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($ports_per_side_ * 2)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'N')"><xsl:value-of select="($ports_per_side_ * 3)"/></xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="px_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($BLKD_PRTCHAN_W - $BLKD_IOP_W)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)) - 2)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($BLKD_PRTCHAN_W + ($BLKD_IORCHAN_W * 2) + $G_Total_DrawArea_W)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'N')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)))"/></xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="py_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_PRTCHAN_H + ($BLKD_IORCHAN_H * 2) + $G_Total_DrawArea_H)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'N')"><xsl:value-of select="($BLKD_PRTCHAN_H - $BLKD_IOP_H)"/></xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
|
||||
<xsl:variable name="prot_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'I'))">0</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'I'))">-90</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'I'))">180</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'I'))">90</xsl:when>
|
||||
|
||||
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'O'))">180</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'O'))">90</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'O'))">0</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'O'))">-90</xsl:when>
|
||||
|
||||
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'B'))">0</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'B'))">0</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'B'))">0</xsl:when>
|
||||
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'B'))">0</xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="txo_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pside_ = 'W')">-14</xsl:when>
|
||||
<xsl:when test="($pside_ = 'S')">8</xsl:when>
|
||||
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="(($BLKD_IOP_W * 2) - 4)"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'N')">8</xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="tyo_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_IOP_H * 2) + 4"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
|
||||
<xsl:when test="($pside_ = 'N')">-2</xsl:when>
|
||||
<xsl:otherwise>0</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:if test="$pdir_ = 'B'">
|
||||
<use x="{$px_}"
|
||||
y="{$py_}"
|
||||
id="{@NAME}"
|
||||
xlink:href="#G_BIPort"
|
||||
transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
|
||||
</xsl:if>
|
||||
|
||||
<xsl:if test="(($pside_ = 'S') and not($pdir_ = 'B'))">
|
||||
<rect
|
||||
x="{$px_}"
|
||||
y="{$py_}"
|
||||
width= "{$BLKD_IOP_W}"
|
||||
height="{$BLKD_IOP_H}" style="stroke:{$COL_IORING}; stroke-width:1"/>
|
||||
</xsl:if>
|
||||
|
||||
<xsl:if test="not($pdir_ = 'B')">
|
||||
<use x="{$px_}"
|
||||
y="{$py_}"
|
||||
id="{@NAME}"
|
||||
xlink:href="#G_IOPort"
|
||||
transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
|
||||
</xsl:if>
|
||||
|
||||
<text class="iopnumb"
|
||||
x="{$px_ + $txo_}"
|
||||
y="{$py_ + $tyo_}"><xsl:value-of select="@INDEX"/><tspan class="iopgrp"><xsl:value-of select="@GROUP"/></tspan>
|
||||
</text>
|
||||
|
||||
</xsl:for-each>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
<xsl:template name="Define_ExtPortsTable">
|
||||
|
||||
<!--
|
||||
<xsl:if test="$oriented_= 'WEST'"><xsl:value-of select="$proc2procX_ - (string-length(@BUSNAME) * 6)"/></xsl:if>
|
||||
<xsl:variable name="max_name_" select="math:max(string-length($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT/@NAME))"/>
|
||||
<xsl:variable name="max_sgnm_" select="math:max(string-length($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT/@SIGNAME))"/>
|
||||
|
||||
<xsl:message>MAX NAME <xsl:value-of select="$max_name_"/></xsl:message>
|
||||
<xsl:message>MAX SIG <xsl:value-of select="$max_sgnm_"/></xsl:message>
|
||||
-->
|
||||
|
||||
<xsl:variable name="ext_ports_">
|
||||
<xsl:if test="not($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT)">
|
||||
<EXTPORT NAME="__none__" SIGNAME="__none_" NAMELEN="0" SIGLEN="0"/>
|
||||
</xsl:if>
|
||||
<xsl:if test="$G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT">
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT">
|
||||
<EXTPORT NAME="{@NAME}" SIGNAME="{@SIGNAME}" NAMELEN="{string-length(@NAME)}" SIGLEN="{string-length(@SIGNAME)}"/>
|
||||
</xsl:for-each>
|
||||
</xsl:if>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="max_name_" select="math:max(exsl:node-set($ext_ports_)/EXTPORT/@NAMELEN)"/>
|
||||
<xsl:variable name="max_sign_" select="math:max(exsl:node-set($ext_ports_)/EXTPORT/@SIGLEN)"/>
|
||||
|
||||
<xsl:variable name="h_font_" select="12"/>
|
||||
<xsl:variable name="w_font_" select="12"/>
|
||||
|
||||
<xsl:variable name="w_num_" select="($w_font_ * 5)"/>
|
||||
<xsl:variable name="w_dir_" select="($w_font_ * 3)"/>
|
||||
<xsl:variable name="w_lsbmsb_" select="($w_font_ * 9)"/>
|
||||
<xsl:variable name="w_attr_" select="($w_font_ * 4)"/>
|
||||
<xsl:variable name="w_name_" select="($w_font_ * $max_name_)"/>
|
||||
<xsl:variable name="w_sign_" select="($w_font_ * $max_sign_)"/>
|
||||
|
||||
<xsl:variable name="w_table_" select="($w_num_ + $w_name_ + $w_dir_ + $w_sign_ + $w_attr_)"/>
|
||||
|
||||
<!--
|
||||
<xsl:message>MAX NAME <xsl:value-of select="$max_name_"/></xsl:message>
|
||||
<xsl:message>MAX SIG <xsl:value-of select="$max_sign_"/></xsl:message>
|
||||
|
||||
<xsl:message>W NUM <xsl:value-of select="$w_num_"/></xsl:message>
|
||||
<xsl:message>W DIR <xsl:value-of select="$w_dir_"/></xsl:message>
|
||||
<xsl:message>W NAM <xsl:value-of select="$w_name_"/></xsl:message>
|
||||
<xsl:message>W SIG <xsl:value-of select="$w_sign_"/></xsl:message>
|
||||
<xsl:message>W ATT <xsl:value-of select="$w_attr_"/></xsl:message>
|
||||
|
||||
<xsl:message>W TABLE <xsl:value-of select="$w_table_"/></xsl:message>
|
||||
-->
|
||||
|
||||
<g id="BlkDiagram_ExtPortsTable">
|
||||
<rect
|
||||
x="0"
|
||||
y="0"
|
||||
width= "{$w_table_}"
|
||||
height="{$h_font_}" style="fill:{$COL_RED}; stroke:none; stroke-width:1"/>
|
||||
</g>
|
||||
|
||||
|
||||
|
||||
</xsl:template>
|
||||
|
||||
<!-- ======================= END MAIN BLOCK =========================== -->
|
||||
|
||||
</xsl:stylesheet>
|
||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,462 @@
|
|||
<?xml version="1.0" standalone="no"?>
|
||||
<xsl:stylesheet version="1.0"
|
||||
xmlns:svg="http://www.w3.org/2000/svg"
|
||||
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
|
||||
xmlns:math="http://exslt.org/math"
|
||||
xmlns:exsl="http://exslt.org/common"
|
||||
xmlns:xlink="http://www.w3.org/1999/xlink"
|
||||
extension-element-prefixes="math">
|
||||
|
||||
<xsl:output method="xml"
|
||||
version="1.0"
|
||||
encoding="UTF-8"
|
||||
indent="yes"
|
||||
doctype-public="-//W3C//DTD SVG 1.0//EN"
|
||||
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
|
||||
|
||||
|
||||
<!-- ======================= DEF BLOCK =================================== -->
|
||||
<xsl:template name="Define_AllStacks">
|
||||
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[(@EAST < $G_ROOT/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH)]">
|
||||
|
||||
<xsl:call-template name="Define_Stack">
|
||||
<xsl:with-param name="iStackIdx" select="@EAST"/>
|
||||
</xsl:call-template>
|
||||
|
||||
</xsl:for-each>
|
||||
</xsl:template>
|
||||
|
||||
|
||||
<xsl:template name="Define_Stack">
|
||||
<xsl:param name="iStackIdx" select="100"/>
|
||||
|
||||
<!-- Define the stack's peripheral shapes-->
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and not(@MODCLASS = 'MEMORY_UNIT'))]">
|
||||
|
||||
<xsl:for-each select="MODULE">
|
||||
<xsl:variable name="modInst_" select="@INSTANCE"/>
|
||||
<xsl:variable name="modType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInst_)]/@MODTYPE"/>
|
||||
<xsl:call-template name="Define_Peripheral">
|
||||
<xsl:with-param name="iModInst" select="$modInst_"/>
|
||||
<xsl:with-param name="iModType" select="$modType_"/>
|
||||
<xsl:with-param name="iShapeId" select="../@SHAPE_ID"/>
|
||||
<xsl:with-param name="iHorizIdx" select="../@STACK_HORIZ_INDEX"/>
|
||||
<xsl:with-param name="iVertiIdx" select="../@SHAPE_VERTI_INDEX"/>
|
||||
</xsl:call-template>
|
||||
</xsl:for-each>
|
||||
|
||||
</xsl:for-each>
|
||||
|
||||
<!-- Define the stack's memory shapes-->
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and (@MODCLASS='MEMORY_UNIT'))]">
|
||||
<xsl:call-template name="Define_MemoryUnit">
|
||||
<xsl:with-param name="iShapeId" select="@SHAPE_ID"/>
|
||||
</xsl:call-template>
|
||||
</xsl:for-each>
|
||||
|
||||
|
||||
<!-- Define the stack's processors-->
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[@INSTANCE and @BIFS_W and @BIFS_H and (@STACK_HORIZ_INDEX = $iStackIdx)]">
|
||||
<xsl:call-template name="Define_Processor"/>
|
||||
</xsl:for-each>
|
||||
|
||||
<!-- Make an inventory of all the things in this processor's stack -->
|
||||
<xsl:variable name="pstackW_">
|
||||
<xsl:call-template name="F_Calc_Stack_Width">
|
||||
<xsl:with-param name="iStackIdx" select="$iStackIdx"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="pstackH_">
|
||||
<xsl:call-template name="F_Calc_Stack_Height">
|
||||
<xsl:with-param name="iStackIdx" select="$iStackIdx"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<!--
|
||||
<xsl:message>Proc Stack Height <xsl:value-of select="$pstackH_"/></xsl:message>
|
||||
<xsl:message>Proc Stack Height <xsl:value-of select="$pstackH_"/></xsl:message>
|
||||
-->
|
||||
|
||||
<xsl:variable name="procW_" select="$BLKD_MOD_W"/>
|
||||
<xsl:variable name="procX_" select="(ceiling($pstackW_ div 2) - ceiling($procW_ div 2))"/>
|
||||
|
||||
<xsl:variable name="sbsGap_" select="($BLKD_PROC2SBS_GAP + $G_Total_SharedBus_H)"/>
|
||||
|
||||
<xsl:variable name="stack_name_">
|
||||
<xsl:call-template name="F_generate_Stack_Name">
|
||||
<xsl:with-param name="iHorizIdx" select="$iStackIdx"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<!--
|
||||
<xsl:message>Horiz index<xsl:value-of select="$stackIdx"/></xsl:message>
|
||||
<xsl:message>Drawing stack <xsl:value-of select="$stack_name_"/></xsl:message>
|
||||
-->
|
||||
|
||||
<!-- Now use all this stuff to draw the stack-->
|
||||
<g id="{$stack_name_}">
|
||||
<rect x="0"
|
||||
y="0"
|
||||
rx="6"
|
||||
ry="6"
|
||||
width = "{$pstackW_}"
|
||||
height= "{$pstackH_}"
|
||||
style="fill:{$COL_BG}; stroke:none;"/>
|
||||
|
||||
|
||||
<!-- First draw the the processor's peripherals-->
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@STACK_HORIZ_INDEX = $iStackIdx)]">
|
||||
<xsl:sort select="@STACK_VERTI_INDEX" data-type="number"/>
|
||||
|
||||
|
||||
<xsl:variable name="shapeW_" select="(@MODS_W * $BLKD_MOD_W)"/>
|
||||
<xsl:variable name="shapeX_" select="(ceiling($pstackW_ div 2) - ceiling($shapeW_ div 2))"/>
|
||||
|
||||
<xsl:variable name="stack_SymName_">
|
||||
<xsl:call-template name="F_generate_Stack_SymbolName">
|
||||
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
|
||||
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<!--
|
||||
<xsl:message>Drawing stack peripheral <xsl:value-of select="$stack_SymName_"/></xsl:message>
|
||||
-->
|
||||
<xsl:variable name="shapeY_">
|
||||
<xsl:call-template name="F_Calc_Stack_Shape_Y">
|
||||
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
|
||||
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<use x="{$shapeX_}" y="{$shapeY_}" xlink:href="#{$stack_SymName_}"/>
|
||||
|
||||
</xsl:for-each>
|
||||
|
||||
|
||||
<!-- Then draw the slave buckets for the shared busses that this processor is master to -->
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@STACK_HORIZ_INDEX = $iStackIdx)]">
|
||||
<xsl:sort select="@SHAPE_VERTI_INDEX" data-type="number"/>
|
||||
|
||||
<xsl:variable name="bucketW_" select="(($BLKD_MOD_BKTLANE_W * 2) + (($BLKD_MOD_W * @MODS_W) + ($BLKD_MOD_BUCKET_G * (@MODS_W - 1))))"/>
|
||||
<xsl:variable name="bucketX_" select="(ceiling($pstackW_ div 2) - ceiling($bucketW_ div 2))"/>
|
||||
|
||||
<xsl:variable name="bucketY_">
|
||||
<xsl:call-template name="F_Calc_Stack_Shape_Y">
|
||||
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
|
||||
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<!--
|
||||
<xsl:message>SBS Bucket Y <xsl:value-of select="$bucketY_"/></xsl:message>
|
||||
-->
|
||||
|
||||
<use x="{$bucketX_}" y="{$bucketY_}" xlink:href="#sbsbucket_{@BUSNAME}"/>
|
||||
|
||||
<xsl:variable name="slavesOfTxt_">SLAVES OF <xsl:value-of select="@BUSNAME"/></xsl:variable>
|
||||
<!--
|
||||
<text class="bkt_label"
|
||||
x="{$bucketX_}"
|
||||
y="{$bucketY_ - 4}"><xsl:value-of select="$slavesOfTxt_"/></text>
|
||||
-->
|
||||
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="$bucketX_"/>
|
||||
<xsl:with-param name="iY" select="($bucketY_ - 4)"/>
|
||||
<xsl:with-param name="iText" select="$slavesOfTxt_"/>
|
||||
<xsl:with-param name="iClass" select="'bkt_label'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
|
||||
</xsl:for-each>
|
||||
|
||||
<!-- Then draw the the processor itself -->
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@STACK_HORIZ_INDEX = $iStackIdx)]">
|
||||
<xsl:sort select="@SHAPE_VERTI_INDEX" data-type="number"/>
|
||||
|
||||
<xsl:variable name="procY_">
|
||||
<xsl:call-template name="F_Calc_Stack_Shape_Y">
|
||||
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
|
||||
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="stack_SymName_">
|
||||
<xsl:call-template name="F_generate_Stack_SymbolName">
|
||||
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
|
||||
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<use x="{$procX_}" y="{$procY_}" xlink:href="#{$stack_SymName_}"/>
|
||||
|
||||
|
||||
<!--
|
||||
<xsl:if test = "not(@IS_LIKEPROC)">
|
||||
<text class="ipclass_label"
|
||||
x="{$procX_}"
|
||||
y="{$procY_ - 4}">PROCESSOR</text>
|
||||
</xsl:if>
|
||||
|
||||
<xsl:if test = "@IS_LIKEPROC = 'TRUE'">
|
||||
|
||||
<text class="ipclass_label"
|
||||
x="{$procX_}"
|
||||
y="{$procY_ - 4}">USER MODULE</text>
|
||||
</xsl:if>
|
||||
|
||||
-->
|
||||
|
||||
<xsl:if test = "not(@IS_LIKEPROC)">
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="$procX_"/>
|
||||
<xsl:with-param name="iY" select="($procY_ - 4)"/>
|
||||
<xsl:with-param name="iText" select="'PROCESSOR'"/>
|
||||
<xsl:with-param name="iClass" select="'ipclass_label'"/>
|
||||
</xsl:call-template>
|
||||
</xsl:if>
|
||||
|
||||
<xsl:if test = "@IS_LIKEPROC = 'TRUE'">
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="$procX_"/>
|
||||
<xsl:with-param name="iY" select="($procY_ - 4)"/>
|
||||
<xsl:with-param name="iText" select="'USER MODULE'"/>
|
||||
<xsl:with-param name="iClass" select="'ipclass_label'"/>
|
||||
</xsl:call-template>
|
||||
</xsl:if>
|
||||
|
||||
</xsl:for-each>
|
||||
</g>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
|
||||
<xsl:template name="Define_Processor">
|
||||
<xsl:param name="iProcInst" select="@INSTANCE"/>
|
||||
<xsl:param name="iModType" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/@MODTYPE"/>
|
||||
|
||||
<xsl:variable name="label_y_">
|
||||
<xsl:value-of select="$BLKD_MOD_LANE_H"/>
|
||||
</xsl:variable>
|
||||
|
||||
<!--
|
||||
<xsl:message>The proctype is <xsl:value-of select="$procType"/></xsl:message>
|
||||
-->
|
||||
|
||||
<xsl:variable name="procH_" select="(($BLKD_MOD_LANE_H * 2) + (($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIFS_H) + ($BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
|
||||
<xsl:variable name="procW_" select="(($BLKD_MOD_LANE_W * 2) + (($BLKD_BIF_W * @BIFS_W) + $BLKD_MOD_BIF_GAP_H))"/>
|
||||
|
||||
<xsl:variable name="procColor_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="contains($iModType,'microblaze')"><xsl:value-of select="$COL_PROC_BG_MB"/></xsl:when>
|
||||
<xsl:when test="contains($iModType,'ppc')"><xsl:value-of select="$COL_PROC_BG_PP"/></xsl:when>
|
||||
<xsl:otherwise>
|
||||
<xsl:value-of select="$COL_PROC_BG_USR"/>
|
||||
</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<!--
|
||||
<xsl:message>The proc color is <xsl:value-of select="$procColor"/></xsl:message>
|
||||
-->
|
||||
|
||||
<xsl:variable name="procName_">
|
||||
<xsl:call-template name="F_generate_Stack_SymbolName">
|
||||
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
|
||||
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<!--
|
||||
<xsl:message>The proc name is <xsl:value-of select="$procName_"/></xsl:message>
|
||||
-->
|
||||
|
||||
<g id="{$procName_}">
|
||||
|
||||
<rect x="0"
|
||||
y="0"
|
||||
rx="6"
|
||||
ry="6"
|
||||
width = "{$procW_}"
|
||||
height= "{$procH_}"
|
||||
style="fill:{$procColor_}; stroke:{$COL_WHITE}; stroke-width:2"/>
|
||||
|
||||
|
||||
<rect x="{ceiling($procW_ div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
|
||||
y="{$BLKD_MOD_LANE_H}"
|
||||
rx="3"
|
||||
ry="3"
|
||||
width= "{$BLKD_MOD_LABEL_W}"
|
||||
height="{$BLKD_MOD_LABEL_H}"
|
||||
style="fill:{$COL_WHITE}; stroke:none;"/>
|
||||
<!--
|
||||
<text class="bciptype"
|
||||
x="{ceiling($procW_ div 2)}"
|
||||
y="{$BLKD_MOD_LANE_H + 8}">
|
||||
<xsl:value-of select="$iModType"/>
|
||||
</text>
|
||||
|
||||
<text class="bciplabel"
|
||||
x="{ceiling($procW_ div 2)}"
|
||||
y="{$BLKD_MOD_LANE_H + 16}">
|
||||
<xsl:value-of select="$iProcInst"/>
|
||||
</text>
|
||||
-->
|
||||
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="ceiling($procW_ div 2)"/>
|
||||
<xsl:with-param name="iY" select="($BLKD_MOD_LANE_H + 8)"/>
|
||||
<xsl:with-param name="iText" select="$iModType"/>
|
||||
<xsl:with-param name="iClass" select="'bc_iptype'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="ceiling($procW_ div 2)"/>
|
||||
<xsl:with-param name="iY" select="($BLKD_MOD_LANE_H + 16)"/>
|
||||
<xsl:with-param name="iText" select="$iProcInst"/>
|
||||
<xsl:with-param name="iClass" select="'bc_ipinst'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
|
||||
|
||||
<xsl:if test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/@GROUP">
|
||||
|
||||
<rect x="{ceiling($BLKD_MOD_W div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
|
||||
y="{$BLKD_MOD_LANE_H + $BIF_H + ceiling($BLKD_BIF_H div 3) - 2}"
|
||||
rx="3"
|
||||
ry="3"
|
||||
width= "{$BLKD_MOD_LABEL_W}"
|
||||
height="{$BLKD_BIF_H}"
|
||||
style="fill:{$COL_IORING_LT}; stroke:none;"/>
|
||||
<!--
|
||||
<text class="ioplblgrp"
|
||||
x="{ceiling($BLKD_MOD_W div 2)}"
|
||||
y="{$BLKD_MOD_LANE_H + $BIF_H + ceiling($BIF_H div 3) + 12}">
|
||||
<xsl:value-of select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/@GROUP"/>
|
||||
</text>
|
||||
-->
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="ceiling($BLKD_MOD_W div 2)"/>
|
||||
<xsl:with-param name="iY" select="($BLKD_MOD_LANE_H + $BIF_H + ceiling($BIF_H div 3) + 12)"/>
|
||||
<xsl:with-param name="iText" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/@GROUP"/>
|
||||
<xsl:with-param name="iClass" select="'iogrp_label'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
</xsl:if>
|
||||
|
||||
|
||||
<xsl:for-each select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/BUSINTERFACE[(@BIF_X and @BIF_Y)]">
|
||||
|
||||
<xsl:variable name="bifBusStd_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="@BUSSTD">
|
||||
<xsl:value-of select="@BUSSTD"/>
|
||||
</xsl:when>
|
||||
<xsl:otherwise>
|
||||
<xsl:value-of select="'TRS'"/>
|
||||
</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="bifBusColor_">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="$bifBusStd_"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
|
||||
<xsl:variable name="bifName_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="string-length(@NAME) <= 5">
|
||||
<xsl:value-of select="@NAME"/>
|
||||
</xsl:when>
|
||||
<xsl:otherwise>
|
||||
<xsl:value-of select="substring(@NAME,0,5)"/>
|
||||
</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="bif_x_" select="(( $BLKD_BIF_W * @BIF_X) + ($BLKD_MOD_BIF_GAP_H * @BIF_X) + ($BLKD_MOD_LANE_W * 1))"/>
|
||||
<xsl:variable name="bif_y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
|
||||
|
||||
<xsl:variable name="horz_line_y_" select="($bif_y_ + ceiling($BLKD_BIFC_H div 2))"/>
|
||||
|
||||
<xsl:variable name="horz_line_x1_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="@BIF_X = '0'">0</xsl:when>
|
||||
<xsl:otherwise><xsl:value-of select="($BLKD_MOD_W - $BLKD_MOD_LANE_W)"/></xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="horz_line_x2_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="@BIF_X = '0'"><xsl:value-of select="$BLKD_MOD_LANE_W"/></xsl:when>
|
||||
<xsl:otherwise><xsl:value-of select="$BLKD_MOD_W + 1"/></xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
|
||||
<line x1="{$horz_line_x1_}"
|
||||
y1="{$horz_line_y_ - 2}"
|
||||
x2="{$horz_line_x2_}"
|
||||
y2="{$horz_line_y_ - 2}"
|
||||
style="stroke:{$bifBusColor_};stroke-width:1"/>
|
||||
|
||||
<use x="{$bif_x_}" y="{$bif_y_}" xlink:href="#{$bifBusStd_}_BifLabel"/>
|
||||
|
||||
<!--
|
||||
<text class="bif_label"
|
||||
x="{$bif_x_ + ceiling($BIF_W div 2)}"
|
||||
y="{$bif_y_ + ceiling($BIF_H div 2) + 3}">
|
||||
<xsl:value-of select="$bifName_"/>
|
||||
</text>
|
||||
-->
|
||||
|
||||
<xsl:call-template name="F_WriteText">
|
||||
<xsl:with-param name="iX" select="($bif_x_ + ceiling($BIF_W div 2))"/>
|
||||
<xsl:with-param name="iY" select="($bif_y_ + ceiling($BIF_H div 2) + 3)"/>
|
||||
<xsl:with-param name="iText" select="$bifName_"/>
|
||||
<xsl:with-param name="iClass" select="'bif_label'"/>
|
||||
</xsl:call-template>
|
||||
|
||||
</xsl:for-each>
|
||||
|
||||
<xsl:variable name="intcIdx_">
|
||||
<xsl:choose>
|
||||
<xsl:when test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/INTERRUPTINFO/@INTC_INDEX">
|
||||
<xsl:value-of select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/INTERRUPTINFO/@INTC_INDEX"/>
|
||||
</xsl:when>
|
||||
<xsl:otherwise>"_no_interrupt_cntlr_"</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
</xsl:variable>
|
||||
|
||||
<!--
|
||||
<xsl:message> The intc index should <xsl:value-of select="$interrupt_cntlr_"/></xsl:message>
|
||||
<xsl:message> The intc index is <xsl:value-of select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $interrupt_cntlr_)]/@INTC_INDEX"/></xsl:message>
|
||||
-->
|
||||
<xsl:if test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(INTERRUPTINFO[(@INTC_INDEX = $intcIdx_)])]">
|
||||
|
||||
<xsl:variable name="intrColor_">
|
||||
<xsl:call-template name="F_IntcIdx2RGB">
|
||||
<xsl:with-param name="iIntcIdx" select="$intcIdx_"/>
|
||||
<!--
|
||||
<xsl:with-param name="iIntcIdx" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $interrupt_cntlr_)]/INTERRUPTINFO/@INTC_INDEX"/>
|
||||
-->
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:call-template name="F_draw_InterruptedProc">
|
||||
<xsl:with-param name="iIntr_X" select="($BLKD_MOD_W - ceiling($BLKD_INTR_W div 2))"/>
|
||||
<xsl:with-param name="iIntr_Y" select="3"/>
|
||||
<xsl:with-param name="iIntr_COL" select="$intrColor_"/>
|
||||
<xsl:with-param name="iIntr_IDX" select="$intcIdx_"/>
|
||||
</xsl:call-template>
|
||||
</xsl:if>
|
||||
</g>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
</xsl:stylesheet>
|
||||
|
|
@ -0,0 +1,241 @@
|
|||
<?xml version="1.0" standalone="no"?>
|
||||
<xsl:stylesheet version="1.0"
|
||||
xmlns:svg="http://www.w3.org/2000/svg"
|
||||
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
|
||||
xmlns:exsl="http://exslt.org/common"
|
||||
xmlns:xlink="http://www.w3.org/1999/xlink">
|
||||
|
||||
<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
|
||||
doctype-public="-//W3C//DTD SVG 1.0//EN"
|
||||
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
|
||||
|
||||
<!-- ======================= DEF BLOCK =================================== -->
|
||||
|
||||
<xsl:template name="Define_ConnectedBifTypes">
|
||||
|
||||
<xsl:for-each select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR">
|
||||
<xsl:variable name="busStd_" select="@BUSSTD"/>
|
||||
|
||||
<xsl:for-each select="exsl:node-set($G_BIFTYPES)/BIFTYPE">
|
||||
<xsl:variable name="bifType_" select="@TYPE"/>
|
||||
|
||||
<xsl:variable name="connectedBifs_cnt_" select="count($G_ROOT/EDKSYSTEM/MODULES/MODULE/BUSINTERFACE[((@IS_INMHS = 'TRUE') and (@TYPE = $bifType_) and (@BUSSTD = $busStd_))])"/>
|
||||
|
||||
<xsl:if test="($connectedBifs_cnt_ > 0)">
|
||||
<!--
|
||||
<xsl:message>DEBUG : Connected BifType : <xsl:value-of select="$busStd_"/> : <xsl:value-of select="@TYPE"/> : <xsl:value-of select="$connectedBifs_cnt_"/> </xsl:message>
|
||||
-->
|
||||
<xsl:call-template name="Define_BifTypeConnector">
|
||||
<xsl:with-param name="iBusStd" select="$busStd_"/>
|
||||
<xsl:with-param name="iBifType" select="$bifType_"/>
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:call-template name="Define_BifLabel">
|
||||
<xsl:with-param name="iBusStd" select="$busStd_"/>
|
||||
</xsl:call-template>
|
||||
|
||||
</xsl:if>
|
||||
|
||||
</xsl:for-each>
|
||||
|
||||
</xsl:for-each>
|
||||
|
||||
<xsl:for-each select="exsl:node-set($G_BIFTYPES)/BIFTYPE">
|
||||
<xsl:variable name="bifType_" select="@TYPE"/>
|
||||
|
||||
<xsl:call-template name="Define_BifTypeConnector">
|
||||
<xsl:with-param name="iBusStd" select="'KEY'"/>
|
||||
<xsl:with-param name="iBifType" select="$bifType_"/>
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:call-template name="Define_BifLabel">
|
||||
<xsl:with-param name="iBusStd" select="'KEY'"/>
|
||||
</xsl:call-template>
|
||||
</xsl:for-each>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
<xsl:template name="Define_BifLabel">
|
||||
|
||||
<xsl:param name="iBusStd" select="'OPB'"/>
|
||||
|
||||
<xsl:variable name="busStdColor_">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<g id="{$iBusStd}_BifLabel">
|
||||
<rect x="0"
|
||||
y="0"
|
||||
rx="3"
|
||||
ry="3"
|
||||
width= "{$BIF_W}"
|
||||
height="{$BIF_H}"
|
||||
style="fill:{$busStdColor_}; stroke:black; stroke-width:1"/>
|
||||
</g>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
|
||||
<xsl:template name="Define_BifTypeConnector">
|
||||
|
||||
<xsl:param name="iBusStd" select="'OPB'"/>
|
||||
<xsl:param name="iBifType" select="'USER'"/>
|
||||
|
||||
<xsl:variable name="busStdColor_">
|
||||
<xsl:call-template name="F_BusStd2RGB">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="busStdColor_lt_">
|
||||
<xsl:call-template name="F_BusStd2RGB_LT">
|
||||
<xsl:with-param name="iBusStd" select="$iBusStd"/>
|
||||
</xsl:call-template>
|
||||
</xsl:variable>
|
||||
|
||||
<xsl:variable name="bifc_wi_" select="ceiling($BIFC_W div 3)"/>
|
||||
<xsl:variable name="bifc_hi_" select="ceiling($BIFC_H div 3)"/>
|
||||
|
||||
<xsl:choose>
|
||||
|
||||
<xsl:when test="$iBifType = 'SLAVE'">
|
||||
<g id="{$iBusStd}_busconn_{$iBifType}">
|
||||
<circle
|
||||
cx="{ceiling($BIFC_W div 2)}"
|
||||
cy="{ceiling($BIFC_H div 2)}"
|
||||
r="{ceiling($BIFC_W div 2)}"
|
||||
style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
|
||||
<circle
|
||||
cx="{ceiling($BIFC_W div 2) + 0.5}"
|
||||
cy="{ceiling($BIFC_H div 2)}"
|
||||
r="{ceiling($BIFC_Wi div 2)}"
|
||||
style="fill:{$busStdColor_}; stroke:none;"/>
|
||||
</g>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iBifType = 'MASTER'">
|
||||
<g id="{$iBusStd}_busconn_{$iBifType}">
|
||||
<rect x="0"
|
||||
y="0"
|
||||
width= "{$BIFC_W}"
|
||||
height="{$BIFC_H}"
|
||||
style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
|
||||
<rect x="{$BIFC_dx + 0.5}"
|
||||
y="{$BIFC_dy}"
|
||||
width= "{$BIFC_Wi}"
|
||||
height="{$BIFC_Hi}"
|
||||
style="fill:{$busStdColor_}; stroke:none;"/>
|
||||
</g>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iBifType = 'INITIATOR'">
|
||||
<g id="{$iBusStd}_busconn_{$iBifType}">
|
||||
<rect x="0"
|
||||
y="0"
|
||||
width= "{$BIFC_W}"
|
||||
height="{$BIFC_H}"
|
||||
style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
|
||||
<rect x="{$BIFC_dx + 0.5}"
|
||||
y="{$BIFC_dy}"
|
||||
width= "{$BIFC_Wi}"
|
||||
height="{$BIFC_Hi}"
|
||||
style="fill:{$busStdColor_}; stroke:none;"/>
|
||||
</g>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iBifType = 'TARGET'">
|
||||
<g id="{$iBusStd}_busconn_{$iBifType}">
|
||||
<circle
|
||||
cx="{ceiling($BIFC_W div 2)}"
|
||||
cy="{ceiling($BIFC_H div 2)}"
|
||||
r="{ceiling($BIFC_W div 2)}"
|
||||
style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
|
||||
<circle
|
||||
cx="{ceiling($BIFC_W div 2) + 0.5}"
|
||||
cy="{ceiling($BIFC_H div 2)}"
|
||||
r="{ceiling($BIFC_Wi div 2)}"
|
||||
style="fill:{$busStdColor_}; stroke:none;"/>
|
||||
</g>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iBifType = 'MASTER_SLAVE'">
|
||||
<g id="{$iBusStd}_busconn_{$iBifType}">
|
||||
<circle
|
||||
cx="{ceiling($BIFC_W div 2)}"
|
||||
cy="{ceiling($BIFC_H div 2)}"
|
||||
r="{ceiling($BIFC_W div 2)}"
|
||||
style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
|
||||
<circle
|
||||
cx="{ceiling($BIFC_W div 2) + 0.5}"
|
||||
cy="{ceiling($BIFC_H div 2)}"
|
||||
r="{ceiling($BIFC_Wi div 2)}"
|
||||
style="fill:{$busStdColor_}; stroke:none;"/>
|
||||
<rect
|
||||
x="0"
|
||||
y="{ceiling($BIFC_H div 2)}"
|
||||
width= "{$BIFC_W}"
|
||||
height="{ceiling($BIFC_H div 2)}"
|
||||
style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
|
||||
<rect
|
||||
x="{$BIFC_dx + 0.5}"
|
||||
y="{ceiling($BIFC_H div 2)}"
|
||||
width= "{$BIFC_Wi}"
|
||||
height="{ceiling($BIFC_Hi div 2)}"
|
||||
style="fill:{$busStdColor_}; stroke:none;"/>
|
||||
</g>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iBifType = 'MONITOR'">
|
||||
<g id="{$iBusStd}_busconn_{$iBifType}">
|
||||
<rect
|
||||
x="0"
|
||||
y="0.5"
|
||||
width= "{$BIFC_W}"
|
||||
height="{ceiling($BIFC_Hi div 2)}"
|
||||
style="fill:{$busStdColor_}; stroke:none;"/>
|
||||
<rect
|
||||
x="0"
|
||||
y="{ceiling($BIFC_H div 2) + 4}"
|
||||
width= "{$BIFC_W}"
|
||||
height="{ceiling($BIFC_Hi div 2)}"
|
||||
style="fill:{$busStdColor_}; stroke:none;"/>
|
||||
</g>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:when test="$iBifType = 'USER'">
|
||||
<g id="{$iBusStd}_busconn_USER">
|
||||
<circle
|
||||
cx="{ceiling($BIFC_W div 2)}"
|
||||
cy="{ceiling($BIFC_H div 2)}"
|
||||
r="{ceiling($BIFC_W div 2)}"
|
||||
style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
|
||||
<circle
|
||||
cx="{ceiling($BIFC_W div 2) + 0.5}"
|
||||
cy="{ceiling($BIFC_H div 2)}"
|
||||
r="{ceiling($BIFC_Wi div 2)}"
|
||||
style="fill:{$busStdColor_}; stroke:none;"/>
|
||||
</g>
|
||||
</xsl:when>
|
||||
|
||||
<xsl:otherwise>
|
||||
<g id="{$iBusStd}_busconn_{$iBifType}">
|
||||
<circle
|
||||
cx="{ceiling($BIFC_W div 2)}"
|
||||
cy="{ceiling($BIFC_H div 2)}"
|
||||
r="{ceiling($BIFC_W div 2)}"
|
||||
style="fill:{$COL_WHITE}; stroke:{$busStdColor_}; stroke-width:1"/>
|
||||
<circle
|
||||
cx="{ceiling($BIFC_W div 2) + 0.5}"
|
||||
cy="{ceiling($BIFC_H div 2)}"
|
||||
r="{ceiling($BIFC_Wi div 2)}"
|
||||
style="fill:{$COL_WHITE}; stroke:none;"/>
|
||||
</g>
|
||||
</xsl:otherwise>
|
||||
</xsl:choose>
|
||||
|
||||
</xsl:template>
|
||||
|
||||
|
||||
</xsl:stylesheet>
|
||||
1704
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/.dswkshop/svg10.dtd
Normal file
1704
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/.dswkshop/svg10.dtd
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1 @@
|
|||
$(PPC440_0_BOOTLOOP)
|
||||
|
|
@ -0,0 +1,254 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!-- IMPORTANT: This is an internal file that has been generated
|
||||
by the Xilinx ISE software. Any direct editing or
|
||||
changes made to this file may result in unpredictable
|
||||
behavior or data corruption. It is strongly advised that
|
||||
users do not edit the contents of this file. -->
|
||||
<messages>
|
||||
<msg type="info" file="Map" num="220" delta="old" >The command line option -timing is automatically supported for this architecture. Therefore, it is not necessary to specify this option.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="LIT" num="243" delta="old" >Logical network <arg fmt="%s" index="1">N194</arg> has no load.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="LIT" num="395" delta="new" >The above <arg fmt="%s" index="1">warning</arg> message is repeated <arg fmt="%d" index="2">1200</arg> more times for the following (max. 5 shown):
|
||||
<arg fmt="%s" index="3">N195,
|
||||
N196,
|
||||
N197,
|
||||
N198,
|
||||
N199</arg>
|
||||
To see the details of these <arg fmt="%s" index="4">warning</arg> messages, please use the -detail switch.
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="MapLib" num="562" delta="old" >No environment variables are currently set.
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="MapLib" num="159" delta="old" >Net Timing constraints on signal <arg fmt="%s" index="1">fpga_0_SysACE_CompactFlash_SysACE_CLK_pin</arg> are pushed forward through input buffer.
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="MapLib" num="856" delta="old" >PLL_ADV <arg fmt="%s" index="1">clock_generator_0/clock_generator_0/Using_PLL0.PLL0_INST/PLL_INST/Using_PLL_ADV.PLL_ADV_inst</arg> CLKIN2 pin was disconnected because a constant 1 is driving the CLKINSEL pin.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="MapLib" num="701" delta="old" >Signal <arg fmt="%s" index="1">fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin</arg> connected to top level port <arg fmt="%s" index="2">fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin</arg> has been removed.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="MapLib" num="701" delta="old" >Signal <arg fmt="%s" index="1">fpga_0_Ethernet_MAC_PHY_col_pin</arg> connected to top level port <arg fmt="%s" index="2">fpga_0_Ethernet_MAC_PHY_col_pin</arg> has been removed.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="MapLib" num="41" delta="old" >All members of TNM group "<arg fmt="%s" index="1">ppc440_0_PPCS0PLBMBUSY</arg>" have been optimized out of the design.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">xps_bram_if_cntlr_1_bram/xps_bram_if_cntlr_1_bram/ramb36_0</arg>
|
||||
of frag <arg fmt="%s" index="2">REGCLKAU</arg> connected to power/ground net <arg fmt="%s" index="3">xps_bram_if_cntlr_1_bram/xps_bram_if_cntlr_1_bram/ramb36_0_REGCLKAU_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">xps_bram_if_cntlr_1_bram/xps_bram_if_cntlr_1_bram/ramb36_0</arg>
|
||||
of frag <arg fmt="%s" index="2">REGCLKAL</arg> connected to power/ground net <arg fmt="%s" index="3">xps_bram_if_cntlr_1_bram/xps_bram_if_cntlr_1_bram/ramb36_0_REGCLKAL_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">xps_bram_if_cntlr_1_bram/xps_bram_if_cntlr_1_bram/ramb36_1</arg>
|
||||
of frag <arg fmt="%s" index="2">REGCLKAU</arg> connected to power/ground net <arg fmt="%s" index="3">xps_bram_if_cntlr_1_bram/xps_bram_if_cntlr_1_bram/ramb36_1_REGCLKAU_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">xps_bram_if_cntlr_1_bram/xps_bram_if_cntlr_1_bram/ramb36_1</arg>
|
||||
of frag <arg fmt="%s" index="2">REGCLKAL</arg> connected to power/ground net <arg fmt="%s" index="3">xps_bram_if_cntlr_1_bram/xps_bram_if_cntlr_1_bram/ramb36_1_REGCLKAL_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/pcie_mim_wrapper_i/bram_tl_tx/generate_tdp2[0].ram_tdp2_inst</arg>
|
||||
of frag <arg fmt="%s" index="2">REGCLKAU</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/pcie_mim_wrapper_i/bram_tl_tx/generate_tdp2[0].ram_tdp2_inst_REGCLKAU_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/pcie_mim_wrapper_i/bram_tl_tx/generate_tdp2[0].ram_tdp2_inst</arg>
|
||||
of frag <arg fmt="%s" index="2">REGCLKAL</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/pcie_mim_wrapper_i/bram_tl_tx/generate_tdp2[0].ram_tdp2_inst_REGCLKAL_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/pcie_mim_wrapper_i/bram_tl_tx/generate_tdp2[1].ram_tdp2_inst</arg>
|
||||
of frag <arg fmt="%s" index="2">REGCLKAU</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/pcie_mim_wrapper_i/bram_tl_tx/generate_tdp2[1].ram_tdp2_inst_REGCLKAU_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/pcie_mim_wrapper_i/bram_tl_tx/generate_tdp2[1].ram_tdp2_inst</arg>
|
||||
of frag <arg fmt="%s" index="2">REGCLKAL</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/pcie_mim_wrapper_i/bram_tl_tx/generate_tdp2[1].ram_tdp2_inst_REGCLKAL_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk_if/ll_bridge/rx_bridge/fifo_inst/oq_fifo/Mram_regBank</arg>
|
||||
of frag <arg fmt="%s" index="2">RDRCLKU</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk_if/ll_bridge/rx_bridge/fifo_inst/oq_fifo/Mram_regBank_RDRCLKU_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk_if/ll_bridge/rx_bridge/fifo_inst/oq_fifo/Mram_regBank</arg>
|
||||
of frag <arg fmt="%s" index="2">RDRCLKL</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk_if/ll_bridge/rx_bridge/fifo_inst/oq_fifo/Mram_regBank_RDRCLKL_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_master_bridge/Comp_FIFO/CompFIFO_64.dpram/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP</arg>
|
||||
of frag <arg fmt="%s" index="2">RDRCLKU</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_master_bridge/Comp_FIFO/CompFIFO_64.dpram/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP_RDRCLKU_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_master_bridge/Comp_FIFO/CompFIFO_64.dpram/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP</arg>
|
||||
of frag <arg fmt="%s" index="2">RDRCLKL</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_master_bridge/Comp_FIFO/CompFIFO_64.dpram/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP_RDRCLKL_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_master_bridge/RxSFIFO_64.RxSFIFO/BU2/U0/grf.rf/mem/gbm.gbmg.gbmga.ngecc.bmg/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5.ram/SDP.WIDE_PRIM36.noeccerr.SDP</arg>
|
||||
of frag <arg fmt="%s" index="2">RDRCLKU</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_master_bridge/RxSFIFO_64.RxSFIFO/BU2/U0/grf.rf/mem/gbm.gbmg.gbmga.ngecc.bmg/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5.ram/SDP.WIDE_PRIM36.noeccerr.SDP_RDRCLKU_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_master_bridge/RxSFIFO_64.RxSFIFO/BU2/U0/grf.rf/mem/gbm.gbmg.gbmga.ngecc.bmg/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5.ram/SDP.WIDE_PRIM36.noeccerr.SDP</arg>
|
||||
of frag <arg fmt="%s" index="2">RDRCLKL</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_master_bridge/RxSFIFO_64.RxSFIFO/BU2/U0/grf.rf/mem/gbm.gbmg.gbmga.ngecc.bmg/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5.ram/SDP.WIDE_PRIM36.noeccerr.SDP_RDRCLKL_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_slave_bridge/GEN_TX_64_FIFO.comp_tx_pkt_fifo/COMP_TX_RAM_70.dpram/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP</arg>
|
||||
of frag <arg fmt="%s" index="2">RDRCLKU</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_slave_bridge/GEN_TX_64_FIFO.comp_tx_pkt_fifo/COMP_TX_RAM_70.dpram/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP_RDRCLKU_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_slave_bridge/GEN_TX_64_FIFO.comp_tx_pkt_fifo/COMP_TX_RAM_70.dpram/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP</arg>
|
||||
of frag <arg fmt="%s" index="2">RDRCLKL</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_slave_bridge/GEN_TX_64_FIFO.comp_tx_pkt_fifo/COMP_TX_RAM_70.dpram/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP_RDRCLKL_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_slave_bridge/comp_rx_fifo/GEN_64.COMP_RX_RAM/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP</arg>
|
||||
of frag <arg fmt="%s" index="2">RDRCLKU</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_slave_bridge/comp_rx_fifo/GEN_64.COMP_RX_RAM/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP_RDRCLKU_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Pack" num="2874" delta="new" >Trimming timing constraints from pin <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_slave_bridge/comp_rx_fifo/GEN_64.COMP_RX_RAM/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP</arg>
|
||||
of frag <arg fmt="%s" index="2">RDRCLKL</arg> connected to power/ground net <arg fmt="%s" index="3">PCIe_Bridge/PCIe_Bridge/comp_slave_bridge/comp_rx_fifo/GEN_64.COMP_RX_RAM/BU2/U0/blk_mem_generator/valid.cstr/ramloop[0].ram.r/v5_noinit.ram/SDP.WIDE_PRIM36.noeccerr.SDP_RDRCLKL_tiesig</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="Pack" num="1716" delta="old" >Initializing temperature to <arg fmt="%0.3f" index="1">85.000</arg> Celsius. (default - Range: <arg fmt="%0.3f" index="2">0.000</arg> to <arg fmt="%0.3f" index="3">85.000</arg> Celsius)
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="Pack" num="1720" delta="old" >Initializing voltage to <arg fmt="%0.3f" index="1">0.950</arg> Volts. (default - Range: <arg fmt="%0.3f" index="2">0.950</arg> to <arg fmt="%0.3f" index="3">1.050</arg> Volts)
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Timing" num="3223" delta="old" >Timing constraint <arg fmt="%s" index="1">TS_MC_RDEN_SEL_MUX = MAXDELAY FROM TIMEGRP "TNM_RDEN_SEL_MUX" TO TIMEGRP "TNM_CLK0" TS_MC_CLK * 4</arg> ignored during timing analysis.</msg>
|
||||
|
||||
<msg type="info" file="Timing" num="3386" delta="old" >Intersecting Constraints found and resolved. For more information, see the TSI report. Please consult the Xilinx Command Line Tools User Guide for information on generating a TSI report.</msg>
|
||||
|
||||
<msg type="info" file="Map" num="215" delta="old" >The Interim Design Summary has been generated in the MAP Report (.mrp).
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Place" num="838" delta="old" >An IO Bus with more than one IO standard is found.
|
||||
<arg fmt="%s" index="1">Components associated with this bus are as follows:
|
||||
Comp: fpga_0_LEDs_8Bit_GPIO_IO_pin<7> IOSTANDARD = LVCMOS25
|
||||
Comp: fpga_0_LEDs_8Bit_GPIO_IO_pin<6> IOSTANDARD = LVCMOS25
|
||||
Comp: fpga_0_LEDs_8Bit_GPIO_IO_pin<5> IOSTANDARD = LVCMOS25
|
||||
Comp: fpga_0_LEDs_8Bit_GPIO_IO_pin<4> IOSTANDARD = LVCMOS18
|
||||
Comp: fpga_0_LEDs_8Bit_GPIO_IO_pin<3> IOSTANDARD = LVCMOS25
|
||||
Comp: fpga_0_LEDs_8Bit_GPIO_IO_pin<2> IOSTANDARD = LVCMOS18
|
||||
Comp: fpga_0_LEDs_8Bit_GPIO_IO_pin<1> IOSTANDARD = LVCMOS18
|
||||
Comp: fpga_0_LEDs_8Bit_GPIO_IO_pin<0> IOSTANDARD = LVCMOS18
|
||||
|
||||
</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Place" num="838" delta="old" >An IO Bus with more than one IO standard is found.
|
||||
<arg fmt="%s" index="1">Components associated with this bus are as follows:
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<31> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<30> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<29> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<28> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<27> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<26> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<25> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<24> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<23> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<22> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<21> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<20> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<19> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<18> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<17> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<16> IOSTANDARD = LVDCI_33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<15> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<14> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<13> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<12> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<11> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<10> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<9> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<8> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<7> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<6> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<5> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<4> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<3> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<2> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<1> IOSTANDARD = LVCMOS33
|
||||
Comp: fpga_0_SRAM_Mem_DQ_pin<0> IOSTANDARD = LVCMOS33
|
||||
|
||||
</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="Pack" num="1650" delta="old" >Map created a placed design.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1842" delta="new" >One or more GTXs are being used in this design. Evaluate the SelectIO-To-GTX Crosstalk section of the Virtex-5 RocketIO GTX Transceiver User Guide to ensure that the design SelectIO usage meets the guidelines to minimize the impact on GTX performance.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="372" delta="old" >Gated clock. Clock net <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/SIO/.pcie_gt_wrapper_i/icdrreset<0></arg> is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the flip-flop.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="372" delta="old" >Gated clock. Clock net <arg fmt="%s" index="1">Ethernet_MAC/Ethernet_MAC/phy_tx_clk_i</arg> is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the flip-flop.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="367" delta="old" >The signal <<arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/sig_sb_txrem_n<0></arg>> is incomplete. The signal does not drive any load pins in the design.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="367" delta="old" >The signal <<arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/sig_MB_TxREMn<0></arg>> is incomplete. The signal does not drive any load pins in the design.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="367" delta="old" >The signal <<arg fmt="%s" index="1">xps_bram_if_cntlr_1_port_BRAM_Addr<30></arg>> is incomplete. The signal does not drive any load pins in the design.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="367" delta="old" >The signal <<arg fmt="%s" index="1">xps_bram_if_cntlr_1_port_BRAM_Addr<31></arg>> is incomplete. The signal does not drive any load pins in the design.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="367" delta="old" >The signal <<arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/sig_MB_RxFull</arg>> is incomplete. The signal does not drive any load pins in the design.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1269" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[1].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The Q1 output pin of IFF is not used.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1273" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[1].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The SR pin is used for the IFF Flip-flop but the SRVAL_Q1 set/reset value is not configured.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1269" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[4].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The Q1 output pin of IFF is not used.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1273" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[4].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The SR pin is used for the IFF Flip-flop but the SRVAL_Q1 set/reset value is not configured.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1269" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[7].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The Q1 output pin of IFF is not used.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1273" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[7].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The SR pin is used for the IFF Flip-flop but the SRVAL_Q1 set/reset value is not configured.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1269" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[2].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The Q1 output pin of IFF is not used.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1273" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[2].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The SR pin is used for the IFF Flip-flop but the SRVAL_Q1 set/reset value is not configured.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1269" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[5].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The Q1 output pin of IFF is not used.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1273" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[5].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The SR pin is used for the IFF Flip-flop but the SRVAL_Q1 set/reset value is not configured.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1269" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[0].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The Q1 output pin of IFF is not used.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1273" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[0].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The SR pin is used for the IFF Flip-flop but the SRVAL_Q1 set/reset value is not configured.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1269" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[3].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The Q1 output pin of IFF is not used.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1273" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[3].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The SR pin is used for the IFF Flip-flop but the SRVAL_Q1 set/reset value is not configured.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1269" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[6].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The Q1 output pin of IFF is not used.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="PhysDesignRules" num="1273" delta="old" >Dangling pins on block:<<arg fmt="%s" index="1">DDR2_SDRAM/DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[6].u_iob_dqs/u_iddr_dq_ce</arg>>:<<arg fmt="%s" index="2">ILOGIC_IFF</arg>>. The SR pin is used for the IFF Flip-flop but the SRVAL_Q1 set/reset value is not configured.
|
||||
</msg>
|
||||
|
||||
</messages>
|
||||
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!-- IMPORTANT: This is an internal file that has been generated
|
||||
by the Xilinx ISE software. Any direct editing or
|
||||
changes made to this file may result in unpredictable
|
||||
behavior or data corruption. It is strongly advised that
|
||||
users do not edit the contents of this file. -->
|
||||
<messages>
|
||||
</messages>
|
||||
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,52 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!-- IMPORTANT: This is an internal file that has been generated
|
||||
by the Xilinx ISE software. Any direct editing or
|
||||
changes made to this file may result in unpredictable
|
||||
behavior or data corruption. It is strongly advised that
|
||||
users do not edit the contents of this file. -->
|
||||
<messages>
|
||||
<msg type="warning" file="ConstraintSystem" num="65" delta="new" >Constraint <arg fmt="%s" index="1"><NET "PCIe_Bridge/Bridge_Clk" PERIOD = 8 ns HIGH 50%;> [system.pcf(65973)]</arg> overrides constraint <arg fmt="%s" index="2"><NET "PCIe_Bridge/Bridge_Clk" PERIOD = 8 ns HIGH 50%;> [system.pcf(65972)]</arg>.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Timing" num="3223" delta="old" >Timing constraint <arg fmt="%s" index="1">TS_MC_RDEN_SEL_MUX = MAXDELAY FROM TIMEGRP "TNM_RDEN_SEL_MUX" TO TIMEGRP "TNM_CLK0" TS_MC_CLK * 4;</arg> ignored during timing analysis.</msg>
|
||||
|
||||
<msg type="info" file="Timing" num="3386" delta="old" >Intersecting Constraints found and resolved. For more information, see the TSI report. Please consult the Xilinx Command Line Tools User Guide for information on generating a TSI report.</msg>
|
||||
|
||||
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/sig_sb_txrem_n<0></arg> has no load. PAR will not attempt to route this signal.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/sig_MB_TxREMn<0></arg> has no load. PAR will not attempt to route this signal.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">xps_bram_if_cntlr_1_port_BRAM_Addr<30></arg> has no load. PAR will not attempt to route this signal.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">xps_bram_if_cntlr_1_port_BRAM_Addr<31></arg> has no load. PAR will not attempt to route this signal.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/sig_MB_RxFull</arg> has no load. PAR will not attempt to route this signal.
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="Route" num="501" delta="old" >One or more directed routing (DIRT) constraints generated for a specific device have been found. Note that DIRT strings are guaranteed to work only on the same device they were created for. If the DIRT constraints fail, verify that the same connectivity is available in the target device for this implementation.
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="Timing" num="2761" delta="old" >N/A entries in the Constraints list may indicate that the constraint does not cover any paths or that it has no requested value.</msg>
|
||||
|
||||
<msg type="info" file="Timing" num="2761" delta="old" >N/A entries in the Constraints list may indicate that the constraint does not cover any paths or that it has no requested value.</msg>
|
||||
|
||||
<msg type="warning" file="ParHelpers" num="361" delta="old" >There are <arg fmt="%d" index="1">5</arg> loadless signals in this design. This design will cause Bitgen to issue DRC warnings.
|
||||
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Par" num="283" delta="old" >There are <arg fmt="%d" index="1">5</arg> loadless signals in this design. This design will cause Bitgen to issue DRC warnings.
|
||||
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="ParHelpers" num="197" delta="old" >Number of "Exact" mode Directed Routing Constraints: <arg fmt="%d" index="1">128</arg>
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="ParHelpers" num="199" delta="old" >All "EXACT" mode Directed Routing constrained nets successfully routed. The number of constraints found: <arg fmt="%d" index="1">128</arg>, number successful: <arg fmt="%d" index="2">128</arg>
|
||||
</msg>
|
||||
|
||||
</messages>
|
||||
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!-- IMPORTANT: This is an internal file that has been generated
|
||||
by the Xilinx ISE software. Any direct editing or
|
||||
changes made to this file may result in unpredictable
|
||||
behavior or data corruption. It is strongly advised that
|
||||
users do not edit the contents of this file. -->
|
||||
<messages>
|
||||
<msg type="warning" file="ConstraintSystem" num="65" delta="new" >Constraint <arg fmt="%s" index="1"><NET "PCIe_Bridge/Bridge_Clk" PERIOD = 8 ns HIGH 50%;> [system.pcf(65973)]</arg> overrides constraint <arg fmt="%s" index="2"><NET "PCIe_Bridge/Bridge_Clk" PERIOD = 8 ns HIGH 50%;> [system.pcf(65972)]</arg>.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Timing" num="3223" delta="old" >Timing constraint <arg fmt="%s" index="1">TS_MC_RDEN_SEL_MUX = MAXDELAY FROM TIMEGRP "TNM_RDEN_SEL_MUX" TO TIMEGRP "TNM_CLK0" TS_MC_CLK * 4;</arg> ignored during timing analysis.</msg>
|
||||
|
||||
<msg type="info" file="Timing" num="3386" delta="old" >Intersecting Constraints found and resolved. For more information, see the TSI report. Please consult the Xilinx Command Line Tools User Guide for information on generating a TSI report.</msg>
|
||||
|
||||
<msg type="info" file="Timing" num="2752" delta="old" >To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</msg>
|
||||
|
||||
<msg type="info" file="Timing" num="3339" delta="old" >The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</msg>
|
||||
|
||||
</messages>
|
||||
|
||||
1041
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/ise/_xmsgs/xst.xmsgs
Normal file
1041
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/ise/_xmsgs/xst.xmsgs
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,26 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
|
||||
|
||||
<!-- -->
|
||||
|
||||
<!-- For tool use only. Do not edit. -->
|
||||
|
||||
<!-- -->
|
||||
|
||||
<!-- ProjectNavigator created generated project file. -->
|
||||
|
||||
<!-- For use in tracking generated file and other information -->
|
||||
|
||||
<!-- allowing preservation of process status. -->
|
||||
|
||||
<!-- -->
|
||||
|
||||
<!-- Copyright (c) 1995-2009 Xilinx, Inc. All rights reserved. -->
|
||||
|
||||
<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
|
||||
|
||||
<files xmlns="http://www.xilinx.com/XMLSchema"/>
|
||||
|
||||
<transforms xmlns="http://www.xilinx.com/XMLSchema"/>
|
||||
|
||||
</generated_project>
|
||||
BIN
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/ise/system.ise
Normal file
BIN
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/ise/system.ise
Normal file
Binary file not shown.
|
|
@ -0,0 +1,8 @@
|
|||
--------------------
|
||||
Xst NTRC: "/" : OUT_OF_DATE
|
||||
--------------------
|
||||
Map NTRC: "/" : OUT_OF_DATE
|
||||
--------------------
|
||||
Xst NTRC: "/" : OUT_OF_DATE
|
||||
--------------------
|
||||
Map NTRC: "/" : OUT_OF_DATE
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
|
||||
|
||||
<header>
|
||||
<!-- ISE source project file created by Project Navigator. -->
|
||||
<!-- -->
|
||||
<!-- This file contains project source information including a list of -->
|
||||
<!-- project source files, project and process properties. This file, -->
|
||||
<!-- along with the project source files, is sufficient to open and -->
|
||||
<!-- implement in ISE Project Navigator. -->
|
||||
<!-- -->
|
||||
<!-- Copyright (c) 1995-2009 Xilinx, Inc. All rights reserved. -->
|
||||
</header>
|
||||
|
||||
<version xil_pn:ise_version="11.1" xil_pn:schema_version="2"/>
|
||||
|
||||
<files/>
|
||||
|
||||
<properties>
|
||||
<property xil_pn:name="Device" xil_pn:value="xa2c*"/>
|
||||
<property xil_pn:name="Device Family" xil_pn:value="Automotive CoolRunner2"/>
|
||||
<property xil_pn:name="PROP_DesignName" xil_pn:value="system"/>
|
||||
<property xil_pn:name="PROP_Enable_Incremental_Messaging" xil_pn:value="true"/>
|
||||
<property xil_pn:name="PROP_Enable_Message_Filtering" xil_pn:value="true"/>
|
||||
<property xil_pn:name="Package" xil_pn:value="*"/>
|
||||
<property xil_pn:name="Preferred Language" xil_pn:value="Verilog"/>
|
||||
<property xil_pn:name="Simulator" xil_pn:value="ISim (VHDL/Verilog)"/>
|
||||
<property xil_pn:name="Speed Grade" xil_pn:value="-*"/>
|
||||
<property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)"/>
|
||||
<property xil_pn:name="Top-Level Source Type" xil_pn:value="HDL"/>
|
||||
<property xil_pn:name="Verbose Property Persistence" xil_pn:value="false"/>
|
||||
</properties>
|
||||
|
||||
<bindings/>
|
||||
|
||||
<libraries/>
|
||||
|
||||
<partitions>
|
||||
<partition xil_pn:name="/"/>
|
||||
</partitions>
|
||||
|
||||
</project>
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
|
|
@ -0,0 +1,24 @@
|
|||
CommandLine-Map
|
||||
|
||||
s
|
||||
CommandLine-Ngdbuild
|
||||
ngdbuild -ise ../__xps/ise/system.ise -p xc5vfx70tff1136-1 -nt timestamp -bm system.bmm C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/implementation/system.ngc -uc system.ucf system.ngd
|
||||
s
|
||||
CommandLine-Par
|
||||
|
||||
s
|
||||
CommandLine-Xst
|
||||
|
||||
s
|
||||
Previous-NGD
|
||||
|
||||
s
|
||||
Previous-NGM
|
||||
|
||||
s
|
||||
Previous-Packed-NCD
|
||||
|
||||
s
|
||||
Previous-Routed-NCD
|
||||
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ISE_VERSION_LAST_SAVED_WITH
|
||||
11.1
|
||||
s
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
ISE_VERSION_LAST_SAVED_WITH
|
||||
11.1
|
||||
s
|
||||
XISE_FILE
|
||||
system.xise
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/XSLTProcess.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
ISE_VERSION_CREATED_WITH
|
||||
11.1
|
||||
s
|
||||
ISE_VERSION_LAST_SAVED_WITH
|
||||
11.2
|
||||
s
|
||||
LastRepoDir
|
||||
E:\my_projects\Wittenstein\release\svn\main\FreeRTOS\Demo\PCC440_Xilinx_Virtex5_GCC\__xps\ise\
|
||||
s
|
||||
OBJSTORE_VERSION
|
||||
1.3
|
||||
s
|
||||
PROJECT_CREATION_TIMESTAMP
|
||||
2009-06-11T19:26:19
|
||||
s
|
||||
REGISTRY_VERSION
|
||||
1.1
|
||||
s
|
||||
REPOSITORY_VERSION
|
||||
1.1
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/bitgen.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/bitinit.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
IncrementalMessagingEnabled
|
||||
true
|
||||
s
|
||||
MessageCaptureEnabled
|
||||
true
|
||||
s
|
||||
MessageFilterFile
|
||||
filter.filter
|
||||
s
|
||||
MessageFilteringEnabled
|
||||
true
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/cpldfit.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/dumpngdio.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/fuse.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/hprep6.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/idem.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/libgen.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/map.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/netgen.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/ngc2edif.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/ngcbuild.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/ngdbuild.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/par.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/platgen.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/runner.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/simgen.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/taengine.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/trce.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/tsim.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/vhpcomp.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/vlogcomp.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/xpwr.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
ClientMessageOutputFile
|
||||
_xmsgs/xst.xmsgs
|
||||
s
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
REPOSITORY_VERSION
|
||||
1.1
|
||||
REGISTRY_VERSION
|
||||
1.1
|
||||
OBJSTORE_VERSION
|
||||
1.3
|
||||
ISE_VERSION_CREATED_WITH
|
||||
11.1
|
||||
ISE_VERSION_LAST_SAVED_WITH
|
||||
11.2
|
||||
1
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/libgen.opt
Normal file
1
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/libgen.opt
Normal file
|
|
@ -0,0 +1 @@
|
|||
-p virtex5 -msg __xps/ise/xmsgprops.lst
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
-p xc5vfx70tff1136-1 -lang vhdl -msg __xps/ise/xmsgprops.lst
|
||||
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
ppc440_0
|
||||
RTOSDEMO_SOURCES = /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/BlockQ.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/blocktim.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/comtest.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/countsem.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/death.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/dynamic.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/flash.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/GenQTest.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/integer.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/QPeek.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/recmutex.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../Common/Minimal/semtest.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../../Source/tasks.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../../Source/list.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../../Source/queue.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../../Source/croutine.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../../Source/portable/GCC/PPC440_Xilinx/portasm.S /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../../Source/portable/GCC/PPC440_Xilinx/port.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/../../../Source/portable/MemMang/heap_2.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/main.c
|
||||
RTOSDEMO_HEADERS =
|
||||
RTOSDEMO_CC = powerpc-eabi-gcc
|
||||
RTOSDEMO_CC_SIZE = powerpc-eabi-size
|
||||
RTOSDEMO_CC_OPT = -O0
|
||||
RTOSDEMO_CFLAGS = -D GCC_PPC440 -mregnames
|
||||
RTOSDEMO_CC_SEARCH = # -B
|
||||
RTOSDEMO_LIBPATH = -L./ppc440_0/lib/ # -L
|
||||
RTOSDEMO_INCLUDES = -I./ppc440_0/include/ -I../../Source/include -I../Common/include -I./RTOSDemo -I./RTOSDemo/flop
|
||||
RTOSDEMO_LFLAGS = # -l
|
||||
RTOSDEMO_LINKER_SCRIPT = /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/RTOSDemo_linker_script.ld
|
||||
RTOSDEMO_CC_DEBUG_FLAG = -g
|
||||
RTOSDEMO_CC_PROFILE_FLAG = # -pg
|
||||
RTOSDEMO_CC_GLOBPTR_FLAG= # -msdata=eabi
|
||||
RTOSDEMO_CC_INFERRED_FLAGS= -mcpu=440
|
||||
RTOSDEMO_CC_START_ADDR_FLAG= # # -Wl,-defsym -Wl,_START_ADDR=
|
||||
RTOSDEMO_CC_STACK_SIZE_FLAG= # # -Wl,-defsym -Wl,_STACK_SIZE=
|
||||
RTOSDEMO_CC_HEAP_SIZE_FLAG= # # -Wl,-defsym -Wl,_HEAP_SIZE=
|
||||
$(RTOSDEMO_CC_INFERRED_FLAGS) \
|
||||
1
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/simgen.opt
Normal file
1
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/simgen.opt
Normal file
|
|
@ -0,0 +1 @@
|
|||
-p virtex5 -lang vhdl $(PPC440_0_BOOTLOOP) -msg __xps/ise/xmsgprops.lst -s mti -X C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/
|
||||
121
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/system.filters
Normal file
121
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/system.filters
Normal file
|
|
@ -0,0 +1,121 @@
|
|||
|
||||
<FILTERS>
|
||||
|
||||
<SET CLASS="PROJECT" VIEW_ID="BUSINTERFACE">
|
||||
<HEADERS HSCROLL="0" VSCROLL="0">
|
||||
<VARIABLE COL_INDEX="0" COL_WIDTH="217" IS_VISIBLE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="HEADER"/>
|
||||
</HEADERS>
|
||||
<SET CLASS="FILTER_GROUP" ID="By Connection" IS_EXPANDED="TRUE">
|
||||
<VARIABLE NAME="By Connection" VALUE="By Connection" VIEWDISP="Bus Interface Filters" VIEWTYPE="STATIC"/>
|
||||
<SET CLASS="FILTER" ID="Connected" ROW_INDEX="0">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Connected" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Unconnected" ROW_INDEX="1">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Unconnected" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
</SET>
|
||||
<SET CLASS="FILTER_GROUP" ID="By Bus Standard" IS_EXPANDED="TRUE">
|
||||
<VARIABLE COLINDEX="0" NAME="By Bus Standard" VALUE="By Bus Standard" VIEWDISP="Bus Interface Filters" VIEWTYPE="STATIC"/>
|
||||
<SET CLASS="FILTER" ID="OPB" IS_VISIBLE="FALSE" ROW_INDEX="0">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="OPB" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="LMB" IS_VISIBLE="FALSE" ROW_INDEX="1">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="LMB" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="PLBV34" IS_VISIBLE="FALSE" ROW_INDEX="2">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="PLBV34" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="PLBV46" ROW_INDEX="3">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="PLBV46" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="OCM" IS_VISIBLE="FALSE" ROW_INDEX="4">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="OCM" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="FSL" IS_VISIBLE="FALSE" ROW_INDEX="5">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="FSL" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="DCR" ROW_INDEX="6">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="DCR" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="FCB" ROW_INDEX="7">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="FCB" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="XIL" ROW_INDEX="8">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Xilinx Point To Point" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="USER" IS_VISIBLE="FALSE" ROW_INDEX="9">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="User Defined" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="XCL" IS_VISIBLE="FALSE" ROW_INDEX="10">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="XCL" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
</SET>
|
||||
<SET CLASS="FILTER_GROUP" ID="By Interface Type" IS_EXPANDED="TRUE">
|
||||
<VARIABLE NAME="By Interface Type" VALUE="By Interface Type" VIEWDISP="Bus Interface Filters" VIEWTYPE="STATIC"/>
|
||||
<SET CLASS="FILTER" ID="Slaves" ROW_INDEX="0">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Slaves" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Masters" ROW_INDEX="1">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Masters" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Master Slaves" ROW_INDEX="2">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Master Slaves" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Monitors" ROW_INDEX="3">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Monitors" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Targets" ROW_INDEX="4">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Targets" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Initiators" ROW_INDEX="5">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Initiators" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
</SET>
|
||||
</SET>
|
||||
|
||||
<SET CLASS="PROJECT" VIEW_ID="PORT">
|
||||
<HEADERS>
|
||||
<VARIABLE COL_WIDTH="50" IS_VISIBLE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="HEADER"/>
|
||||
</HEADERS>
|
||||
<SET CLASS="FILTER_GROUP" ID="By Connection" IS_EXPANDED="TRUE">
|
||||
<VARIABLE NAME="By Connection" VALUE="By Connection" VIEWDISP="Port Filters" VIEWTYPE="STATIC"/>
|
||||
<SET CLASS="FILTER" ID="Defaults" ROW_INDEX="0">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Defaults" VALUE="FALSE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Connected" ROW_INDEX="1">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Connected" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Unconnected" ROW_INDEX="2">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Unconnected" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
</SET>
|
||||
<SET CLASS="FILTER_GROUP" ID="By Class" IS_EXPANDED="TRUE">
|
||||
<VARIABLE COL_INDEX="0" NAME="By Class" VALUE="By Class" VIEWDISP="Port Filters" VIEWTYPE="STATIC"/>
|
||||
<SET CLASS="FILTER" ID="Clocks" ROW_INDEX="0">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Clocks" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Resets" ROW_INDEX="1">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Resets" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Interrupts" ROW_INDEX="2">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Interrupts" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Others" ROW_INDEX="3">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Others" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
</SET>
|
||||
<SET CLASS="FILTER_GROUP" ID="By Direction" IS_EXPANDED="TRUE">
|
||||
<VARIABLE NAME="By Direction" VALUE="By Direction" VIEWDISP="Port Filters" VIEWTYPE="STATIC"/>
|
||||
<SET CLASS="FILTER" ID="Inputs" ROW_INDEX="0">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Inputs" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="Outputs" ROW_INDEX="1">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="Outputs" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
<SET CLASS="FILTER" ID="InOuts" ROW_INDEX="2">
|
||||
<VARIABLE IS_LABELED="TRUE" NAME="InOuts" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
|
||||
</SET>
|
||||
</SET>
|
||||
</SET>
|
||||
|
||||
</FILTERS>
|
||||
101
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/system.gui
Normal file
101
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/system.gui
Normal file
|
|
@ -0,0 +1,101 @@
|
|||
|
||||
<SETTINGS>
|
||||
|
||||
<SET CLASS="PROJECT" DISPLAYMODE="TREE" VIEW_ID="BUSINTERFACE">
|
||||
<HEADERS HSCROLL="0" VSCROLL="0">
|
||||
<VARIABLE COL_INDEX="0" COL_WIDTH="189" IS_VISIBLE="TRUE" VIEWDISP="Name" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="1" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="2" IS_VISIBLE="FALSE" VIEWDISP="Bus Standard" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="3" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="4" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="5" COL_WIDTH="227" IS_VISIBLE="TRUE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="6" IS_VISIBLE="FALSE" VIEWDISP="Type" VIEWTYPE="HEADER"/>
|
||||
</HEADERS>
|
||||
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="120,687,306" VERSION="0"/>
|
||||
<STATUS>
|
||||
<SELECTIONS/>
|
||||
</STATUS>
|
||||
</SET>
|
||||
|
||||
<SET CLASS="PROJECT" DISPLAYMODE="FLAT" VIEW_ID="BUSINTERFACE">
|
||||
<HEADERS>
|
||||
<VARIABLE COL_INDEX="0" IS_VISIBLE="TRUE" VIEWDISP="Instance" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="1" IS_VISIBLE="TRUE" VIEWDISP="Bus Interface" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="2" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="3" IS_VISIBLE="FALSE" VIEWDISP="Bus Standard" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="4" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="5" IS_VISIBLE="TRUE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="6" IS_VISIBLE="TRUE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="7" IS_VISIBLE="FALSE" VIEWDISP="Type" VIEWTYPE="HEADER"/>
|
||||
</HEADERS>
|
||||
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="180,450,180" VERSION="0"/>
|
||||
</SET>
|
||||
|
||||
<SET CLASS="PROJECT" DISPLAYMODE="TREE" VIEW_ID="PORT">
|
||||
<HEADERS HSCROLL="0" VSCROLL="0">
|
||||
<VARIABLE COL_INDEX="0" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Name" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="1" COL_WIDTH="231" IS_VISIBLE="TRUE" VIEWDISP="Net" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="2" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Direction" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="3" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Range" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="4" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Class" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="5" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Frequency" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="6" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Reset Polarity" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="7" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Sensitivity" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="8" COL_WIDTH="25" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="9" IS_VISIBLE="FALSE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="10" IS_VISIBLE="TRUE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
|
||||
</HEADERS>
|
||||
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="0,586,143" VERSION="0"/>
|
||||
</SET>
|
||||
|
||||
<SET CLASS="PROJECT" DISPLAYMODE="FLAT" VIEW_ID="PORT">
|
||||
<HEADERS>
|
||||
<VARIABLE COL_INDEX="0" IS_VISIBLE="TRUE" VIEWDISP="Instance" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="1" IS_VISIBLE="TRUE" VIEWDISP="Port Name" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="2" IS_VISIBLE="TRUE" VIEWDISP="Net" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="3" IS_VISIBLE="TRUE" VIEWDISP="Direction" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="4" IS_VISIBLE="TRUE" VIEWDISP="Range" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="5" IS_VISIBLE="TRUE" VIEWDISP="Class" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="6" IS_VISIBLE="TRUE" VIEWDISP="Frequency" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="7" IS_VISIBLE="TRUE" VIEWDISP="Reset Polarity" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="8" IS_VISIBLE="TRUE" VIEWDISP="Sensitivity" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="9" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="10" IS_VISIBLE="FALSE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="11" IS_VISIBLE="TRUE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
|
||||
</HEADERS>
|
||||
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="0,630,180" VERSION="0"/>
|
||||
</SET>
|
||||
|
||||
<SET CLASS="PROJECT" DISPLAYMODE="TREE" VIEW_ID="ADDRESS">
|
||||
<HEADERS>
|
||||
<VARIABLE COL_INDEX="0" IS_VISIBLE="TRUE" VIEWDISP="Instance" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="1" IS_VISIBLE="TRUE" VIEWDISP="Base Name" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="2" IS_VISIBLE="TRUE" VIEWDISP="Base Address" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="3" IS_VISIBLE="TRUE" VIEWDISP="High Address" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="4" IS_VISIBLE="TRUE" VIEWDISP="Size" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="5" IS_VISIBLE="TRUE" VIEWDISP="Bus Interface(s)" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="6" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="7" IS_VISIBLE="TRUE" VIEWDISP="ICache" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="8" IS_VISIBLE="TRUE" VIEWDISP="DCache" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="9" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="10" IS_VISIBLE="TRUE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
|
||||
</HEADERS>
|
||||
</SET>
|
||||
|
||||
<SET CLASS="PROJECT" DISPLAYMODE="FLAT" VIEW_ID="ADDRESS">
|
||||
<HEADERS>
|
||||
<VARIABLE COL_INDEX="0" IS_VISIBLE="TRUE" VIEWDISP="Instance" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="1" IS_VISIBLE="TRUE" VIEWDISP="Base Name" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="2" IS_VISIBLE="TRUE" VIEWDISP="Base Address" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="3" IS_VISIBLE="TRUE" VIEWDISP="High Address" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="4" IS_VISIBLE="TRUE" VIEWDISP="Size" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="5" IS_VISIBLE="TRUE" VIEWDISP="Bus Interface(s)" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="6" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="7" IS_VISIBLE="TRUE" VIEWDISP="ICache" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="8" IS_VISIBLE="TRUE" VIEWDISP="DCache" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="9" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
|
||||
<VARIABLE COL_INDEX="10" IS_VISIBLE="TRUE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
|
||||
</HEADERS>
|
||||
</SET>
|
||||
|
||||
</SETTINGS>
|
||||
4197
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/system.xml
Normal file
4197
FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/__xps/system.xml
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1 @@
|
|||
-device xc5vfx70tff1136-1 data/system.ucf 7 0
|
||||
|
|
@ -0,0 +1 @@
|
|||
-device xc5vfx70tff1136-1 data/system.ucf 0
|
||||
Loading…
Add table
Add a link
Reference in a new issue