len0rd/FreeRTOS-Kernel
1
0
Fork 0
mirror of https://github.com/FreeRTOS/FreeRTOS-Kernel.git synced 2025-08-20 10:08:33 -04:00
Code Issues Projects Releases Packages Wiki Activity

Add FreeRTOS-Plus directory.

Browse source
This commit is contained in:
Richard Barry 2012-08-11 21:34:11 +00:00
parent 7bd5f21ad5
commit f508a5f653
6798 changed files with 134949 additions and 19 deletions
Download patch file Download diff file Expand all files Collapse all files

53
FreeRTOS/Demo/MB91460_Softune/PRC/set_MONITOR.prc Normal file
View file

@ -0,0 +1,53 @@
# THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
# MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
# ELIGIBILITY FOR ANY PURPOSES. */
# (C) Fujitsu Microelectronics Europe GmbH */
# Environment and memory manioulation after program upload
# Settings
SET VARIABLE abortIRQ0 = 0x1
SET VARIABLE intVectorMonitorDebugger = 0x10FFC00
# Disable all Interrupts
SET REGISTER I = 0x0
# Set Table Base Register
SET REGISTER TBR = intVectorMonitorDebugger
# Run to smd_tbr and save TBR of Application
go ,Start91460\smd_tbr
SET VARIABLE intVectorApllication = %r0
SET REGISTER TBR = intVectorApllication
# Copy required vector table entries of monitor debugger in vector table of application
MOVE intVectorMonitorDebugger + 0x3C0..intVectorMonitorDebugger + 0x3FF, intVectorApllication + 0x3C0
# Prepare Entries for INT0
IF %abortIRQ0 == 1
MOVE intVectorMonitorDebugger + 0x3C0..intVectorMonitorDebugger + 0x3C3, intVectorApllication + 0x3BC
SET MEMORY/BYTE 0x32 = 0x3
SET MEMORY/BYTE 0x30 = 0x0
SET MEMORY/BYTE 0x31 = 0x1
SET MEMORY/BYTE 0x440 = 0x10
SET REGISTER ILM = 0x1E
ENDIF
# Setting indicates software reset, which leads to that the clock settings are not changed.
SET REGISTER R4 = 0x8
# Set TBR to Vector table of application
SET REGISTER TBR = intVectorApllication
# Run to smd_c and let the CS enabled
go noClockStartup,Start91460\smd_cs
set register r2 = %r2|0x3
# Run to main()
go ,main

56
FreeRTOS/Demo/MB91460_Softune/PRC/set_MONITOR_INTERNAL.prc Normal file
View file

@ -0,0 +1,56 @@
# THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
# MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
# ELIGIBILITY FOR ANY PURPOSES. */
# (C) Fujitsu Microelectronics Europe GmbH */
# Environment and memory manioulation after program upload
# Settings
SET VARIABLE abortIRQ0 = 0x1
SET VARIABLE intVectorMonitorDebugger = 0xFFC00
# Disable all Interrupts
SET REGISTER I = 0x0
# Set Table Base Register
SET REGISTER TBR = intVectorMonitorDebugger
# Run to smd_tbr and save TBR of Application
go ,Start91460\smd_tbr
SET VARIABLE intVectorApllication = %r0
SET REGISTER TBR = intVectorApllication
# Copy required vector table entries of monitor debugger in vector table of application
MOVE intVectorMonitorDebugger + 0x3C0..intVectorMonitorDebugger + 0x3FF, intVectorApllication + 0x3C0
# Prepare Entries for INT0
IF %abortIRQ0 == 0x1
MOVE intVectorMonitorDebugger + 0x3C0..intVectorMonitorDebugger + 0x3C3, intVectorApllication + 0x3BC
SET MEMORY/BYTE 0x32 = 0x3
SET MEMORY/BYTE 0x30 = 0x0
SET MEMORY/BYTE 0x31 = 0x1
SET MEMORY/BYTE 0x440 = 0x10
SET REGISTER ILM = 0x1E
ENDIF
# Setting indicates software reset, which leads to that the clock settings are not changed.
SET REGISTER R4 = 0x8
# Set TBR to Vector table of application
SET REGISTER TBR = intVectorApllication
# Run to smd_c and let the CS enabled
go noClockStartup,Start91460\smd_cs
set register r2 = %r2|0x2
# Run to main()
go ,main

16
FreeRTOS/Demo/MB91460_Softune/PRC/set_RESET.prc Normal file
View file

@ -0,0 +1,16 @@
# THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU
# MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
# ELIGIBILITY FOR ANY PURPOSES.
# (C) Fujitsu Microelectronics Europe GmbH
# set_ROMS.prc
# ===========
#
# Procedurefile for the FR-Emulator - Target : MB91F467D.
# Should be executed before loading any target-file into
# the RAM of the emulator (use the debug settings).
# The procedure checks sets the ROM Select Register to allow
# the emulation of the whole ROM Area of the MB91F467D
RESET
SET MEMORY/HALFWORD 0x390 = 0xFF00

15
FreeRTOS/Demo/MB91460_Softune/PRC/set_ROMS.prc Normal file
View file

@ -0,0 +1,15 @@
# THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU
# MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
# ELIGIBILITY FOR ANY PURPOSES.
# (C) Fujitsu Microelectronics Europe GmbH
# set_ROMS.prc
# ===========
#
# Procedurefile for the FR-Emulator - Target : MB91F467D.
# Should be executed before loading any target-file into
# the RAM of the emulator (use the debug settings).
# The procedure checks sets the ROM Select Register to allow
# the emulation of the whole ROM Area of the MB91F467D
SET MEMORY/HALFWORD 0x390 = 0xFF00

13
FreeRTOS/Demo/MB91460_Softune/PRC/set_SIMULATE.prc Normal file
View file

@ -0,0 +1,13 @@
# THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
# MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
# ELIGIBILITY FOR ANY PURPOSES. */
# (C) Fujitsu Microelectronics Europe GmbH */
# Environment and memory manioulation after program upload
print "patch reset vector to \"__start\"\n";
SET MEMORY/WORD 0xFFFFC=__start