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Richard Barry 2012-08-11 21:34:11 +00:00
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commit f508a5f653
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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : ButtonInterrupt.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : ExtInt
** Version : Bean 02.025, Driver 01.06, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 19/05/2005, 19:02
** Abstract :
** This bean "ExtInt" implements an external
** interrupt, its control methods and interrupt/event
** handling procedure.
** The bean uses one pin which generates interrupt on
** selected edge.
** Settings :
** Interrupt name : INT_PortP
** User handling procedure : ButtonInterrupt_OnInterrupt
**
** Used pin :
** ----------------------------------------------------
** Number (on package) | Name
** ----------------------------------------------------
** 4 | PP0_PWM0_KWP0
** ----------------------------------------------------
**
** Port name : P
**
** Bit number (in port) : 0
** Bit mask of the port : 1
**
** Signal edge/level : falling
** Priority : 1
** Pull option : up
** Initial state : Disabled
**
** Edge register : PPSP [605]
** Priority register : HPRIO [31]
** Enable register : PIEP [606]
** Request register : PIFP [607]
**
** Port data register : PTP [600]
** Port control register : DDRP [602]
** Contents :
** Enable - void ButtonInterrupt_Enable(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE ButtonInterrupt. */
#include "ButtonInterrupt.h"
/*Including shared modules, which are used for all project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
#include "Events.h"
#include "Cpu.h"
/* Definition of DATA and CODE segments for this bean. User can specify where
these segments will be located on "Build options" tab of the selected CPU bean. */
#pragma DATA_SEG ButtonInterrupt_DATA /* Data section for this module. */
#pragma CODE_SEG ButtonInterrupt_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : ButtonInterrupt_Enable (bean ExtInt)
**
** Description :
** Enable the bean - the external events are accepted.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void ButtonInterrupt_Enable(void)
{
PIFP = 1; /* Clear flag */
PIEP_PIEP0 = 1; /* Enable interrupt */
}
/*
** ===================================================================
** Method : ButtonInterrupt_Interrupt (bean ExtInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void ButtonInterrupt_Interrupt(void)
{
PIFP = 1; /* Clear flag */
ButtonInterrupt_OnInterrupt();
}
#pragma CODE_SEG ButtonInterrupt_CODE /* Code section for this module. */
/* END ButtonInterrupt. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : ButtonInterrupt.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : ExtInt
** Version : Bean 02.025, Driver 01.06, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 19/05/2005, 19:02
** Abstract :
** This bean "ExtInt" implements an external
** interrupt, its control methods and interrupt/event
** handling procedure.
** The bean uses one pin which generates interrupt on
** selected edge.
** Settings :
** Interrupt name : INT_PortP
** User handling procedure : ButtonInterrupt_OnInterrupt
**
** Used pin :
** ----------------------------------------------------
** Number (on package) | Name
** ----------------------------------------------------
** 4 | PP0_PWM0_KWP0
** ----------------------------------------------------
**
** Port name : P
**
** Bit number (in port) : 0
** Bit mask of the port : 1
**
** Signal edge/level : falling
** Priority : 1
** Pull option : up
** Initial state : Disabled
**
** Edge register : PPSP [605]
** Priority register : HPRIO [31]
** Enable register : PIEP [606]
** Request register : PIFP [607]
**
** Port data register : PTP [600]
** Port control register : DDRP [602]
** Contents :
** Enable - void ButtonInterrupt_Enable(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __ButtonInterrupt_H
#define __ButtonInterrupt_H
/* MODULE ButtonInterrupt. */
/*Including shared modules, which are used in the whole project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
#include "Events.h"
#include "Cpu.h"
#pragma CODE_SEG ButtonInterrupt_CODE /* Code section for this module. */
void ButtonInterrupt_Enable(void);
/*
** ===================================================================
** Method : ButtonInterrupt_Enable (bean ExtInt)
**
** Description :
** Enable the bean - the external events are accepted.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void ButtonInterrupt_Interrupt(void);
#pragma CODE_SEG ButtonInterrupt_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : ButtonInterrupt_Interrupt (bean ExtInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/* END ButtonInterrupt. */
#endif /* __ButtonInterrupt_H*/
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Byte1.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : ByteIO
** Version : Bean 02.019, Driver 01.03, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:49
** Abstract :
** This bean "ByteIO" implements an one-byte input/output.
** It uses one 8-bit port.
** Note: This bean is set to work in Output direction only.
** Methods of this bean are mostly implemented as a macros
** (if supported by target langauage and compiler).
** Settings :
** Port name : B
**
** Initial direction : Output (direction cannot be changed)
** Initial output value : 0 = 000H
** Initial pull option : off
**
** 8-bit data register : PORTB [1]
** 8-bit control register : DDRB [3]
**
** ----------------------------------------------------
** Bit | Pin | Name
** ----------------------------------------------------
** 0 | 16 | PB0_ADDR0_DATA0
** 1 | 17 | PB1_ADDR1_DATA1
** 2 | 18 | PB2_ADDR2_DATA2
** 3 | 19 | PB3_ADDR3_DATA3
** 4 | 20 | PB4_ADDR4_DATA4
** 5 | 21 | PB5_ADDR5_DATA5
** 6 | 22 | PB6_ADDR6_DATA6
** 7 | 23 | PB7_ADDR7_DATA7
** ----------------------------------------------------
** Contents :
** PutBit - void Byte1_PutBit(byte Bit,bool Val);
** NegBit - void Byte1_NegBit(byte Bit);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Byte1. */
#include "Byte1.h"
/*Including shared modules, which are used for all project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "Cpu.h"
/* Definition of DATA and CODE segments for this bean. User can specify where
these segments will be located on "Build options" tab of the selected CPU bean. */
#pragma DATA_SEG Byte1_DATA /* Data section for this module. */
#pragma CODE_SEG Byte1_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : Byte1_GetMsk (bean ByteIO)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
byte Byte1_Table[8]={ 1, 2, 4, 8, 16, 32, 64, 128 }; /* Table of mask constants */
byte Byte1_GetMsk(byte Value)
{
return((Value<8)?Byte1_Table[Value]:0); /* Return appropriate bit mask */
}
/*
** ===================================================================
** Method : Byte1_PutBit (bean ByteIO)
**
** Description :
** This method writes the new value to the specified bit
** of the output value.
** Parameters :
** NAME - DESCRIPTION
** Bitnum - Number of the bit (0 to 7)
** Val - New value of the bit (FALSE or TRUE)
** FALSE = "0" or "Low", TRUE = "1" or "High"
** Returns : Nothing
** ===================================================================
*/
void Byte1_PutBit(byte BitNum, byte Value)
{
byte Mask=Byte1_GetMsk(BitNum); /* Temporary variable - bit mask */
if (Mask) /* Is bit mask correct? */
if (Value) { /* Is it one to be written? */
PORTB |= Mask; /* Set appropriate bit on port */
}
else { /* Is it zero to be written? */
PORTB &= ~Mask; /* Clear appropriate bit on port */
}
}
/*
** ===================================================================
** Method : Byte1_NegBit (bean ByteIO)
**
** Description :
** This method negates (invertes) the specified bit of the
** output value.
** Parameters :
** NAME - DESCRIPTION
** Bit - Number of the bit to invert (0 to 7)
** Returns : Nothing
** ===================================================================
*/
void Byte1_NegBit(byte BitNum)
{
byte Mask=Byte1_GetMsk(BitNum); /* Temporary variable - bit mask */
if (Mask) { /* Is bit mask correct? */
PORTB ^= Mask; /* Negate appropriate bit on port */
}
}
/* END Byte1. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Byte1.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : ByteIO
** Version : Bean 02.019, Driver 01.03, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:49
** Abstract :
** This bean "ByteIO" implements an one-byte input/output.
** It uses one 8-bit port.
** Note: This bean is set to work in Output direction only.
** Methods of this bean are mostly implemented as a macros
** (if supported by target langauage and compiler).
** Settings :
** Port name : B
**
** Initial direction : Output (direction cannot be changed)
** Initial output value : 0 = 000H
** Initial pull option : off
**
** 8-bit data register : PORTB [1]
** 8-bit control register : DDRB [3]
**
** ----------------------------------------------------
** Bit | Pin | Name
** ----------------------------------------------------
** 0 | 16 | PB0_ADDR0_DATA0
** 1 | 17 | PB1_ADDR1_DATA1
** 2 | 18 | PB2_ADDR2_DATA2
** 3 | 19 | PB3_ADDR3_DATA3
** 4 | 20 | PB4_ADDR4_DATA4
** 5 | 21 | PB5_ADDR5_DATA5
** 6 | 22 | PB6_ADDR6_DATA6
** 7 | 23 | PB7_ADDR7_DATA7
** ----------------------------------------------------
** Contents :
** PutBit - void Byte1_PutBit(byte Bit,bool Val);
** NegBit - void Byte1_NegBit(byte Bit);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __Byte1_H
#define __Byte1_H
/* MODULE Byte1. */
/*Including shared modules, which are used in the whole project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "Cpu.h"
#pragma CODE_SEG Byte1_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : Byte1_PutBit (bean ByteIO)
**
** Description :
** This method writes the new value to the specified bit
** of the output value.
** Parameters :
** NAME - DESCRIPTION
** BitNum - Number of the bit (0 to 7)
** Val - New value of the bit (FALSE or TRUE)
** FALSE = "0" or "Low", TRUE = "1" or "High"
** Returns : Nothing
** ===================================================================
*/
void Byte1_PutBit(byte BitNum, byte Value);
/*
** ===================================================================
** Method : Byte1_NegBit (bean ByteIO)
**
** Description :
** This method negates (invertes) the specified bit of the
** output value.
** Parameters :
** NAME - DESCRIPTION
** BitNum - Number of the bit to invert (0 to 7)
** Returns : Nothing
** ===================================================================
*/
void Byte1_NegBit(byte BitNum);
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/* END Byte1. */
#endif /* __Byte1_H*/
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : MC9S12C32_80
** Version : Bean 01.002, Driver 01.09, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 18:22
** Abstract :
** This bean "MC9S12C32_80" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** SetWaitMode - void Cpu_SetWaitMode(void);
** SetStopMode - void Cpu_SetStopMode(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#include "Cpu.h"
#include "Byte1.h"
#include "TickTimer.h"
#include "ButtonInterrupt.h"
extern void near _EntryPoint(void); /* Startup routine */
extern void near vPortTickInterrupt( void );
extern void near vPortYield( void );
extern void near vButtonPush( void );
typedef void (*near tIsrFunc)(void);
const tIsrFunc _vect[] @0xFF80 = { /* Interrupt table */
Cpu_Interrupt, /* 0 Default (unused) interrupt */
Cpu_Interrupt, /* 1 Default (unused) interrupt */
Cpu_Interrupt, /* 2 Default (unused) interrupt */
Cpu_Interrupt, /* 3 Default (unused) interrupt */
Cpu_Interrupt, /* 4 Default (unused) interrupt */
Cpu_Interrupt, /* 5 Default (unused) interrupt */
Cpu_Interrupt, /* 6 Default (unused) interrupt */
vButtonPush, /* 7 Default (unused) interrupt */
Cpu_Interrupt, /* 8 Default (unused) interrupt */
Cpu_Interrupt, /* 9 Default (unused) interrupt */
Cpu_Interrupt, /* 10 Default (unused) interrupt */
Cpu_Interrupt, /* 11 Default (unused) interrupt */
Cpu_Interrupt, /* 12 Default (unused) interrupt */
Cpu_Interrupt, /* 13 Default (unused) interrupt */
Cpu_Interrupt, /* 14 Default (unused) interrupt */
Cpu_Interrupt, /* 15 Default (unused) interrupt */
Cpu_Interrupt, /* 16 Default (unused) interrupt */
Cpu_Interrupt, /* 17 Default (unused) interrupt */
Cpu_Interrupt, /* 18 Default (unused) interrupt */
Cpu_Interrupt, /* 19 Default (unused) interrupt */
Cpu_Interrupt, /* 20 Default (unused) interrupt */
Cpu_Interrupt, /* 21 Default (unused) interrupt */
Cpu_Interrupt, /* 22 Default (unused) interrupt */
Cpu_Interrupt, /* 23 Default (unused) interrupt */
Cpu_Interrupt, /* 24 Default (unused) interrupt */
Cpu_Interrupt, /* 25 Default (unused) interrupt */
Cpu_Interrupt, /* 26 Default (unused) interrupt */
Cpu_Interrupt, /* 27 Default (unused) interrupt */
Cpu_Interrupt, /* 28 Default (unused) interrupt */
Cpu_Interrupt, /* 29 Default (unused) interrupt */
Cpu_Interrupt, /* 30 Default (unused) interrupt */
Cpu_Interrupt, /* 31 Default (unused) interrupt */
Cpu_Interrupt, /* 32 Default (unused) interrupt */
Cpu_Interrupt, /* 33 Default (unused) interrupt */
Cpu_Interrupt, /* 34 Default (unused) interrupt */
Cpu_Interrupt, /* 35 Default (unused) interrupt */
Cpu_Interrupt, /* 36 Default (unused) interrupt */
Cpu_Interrupt, /* 37 Default (unused) interrupt */
Cpu_Interrupt, /* 38 Default (unused) interrupt */
Cpu_Interrupt, /* 39 Default (unused) interrupt */
Cpu_Interrupt, /* 40 Default (unused) interrupt */
Cpu_Interrupt, /* 41 Default (unused) interrupt */
Cpu_Interrupt, /* 42 Default (unused) interrupt */
Cpu_Interrupt, /* 43 Default (unused) interrupt */
Cpu_Interrupt, /* 44 Default (unused) interrupt */
Cpu_Interrupt, /* 45 Default (unused) interrupt */
Cpu_Interrupt, /* 46 Default (unused) interrupt */
Cpu_Interrupt, /* 47 Default (unused) interrupt */
Cpu_Interrupt, /* 48 Default (unused) interrupt */
Cpu_Interrupt, /* 49 Default (unused) interrupt */
Cpu_Interrupt, /* 50 Default (unused) interrupt */
Cpu_Interrupt, /* 51 Default (unused) interrupt */
Cpu_Interrupt, /* 52 Default (unused) interrupt */
Cpu_Interrupt, /* 53 Default (unused) interrupt */
Cpu_Interrupt, /* 54 Default (unused) interrupt */
vPortTickInterrupt,
Cpu_Interrupt, /* 56 Default (unused) interrupt */
Cpu_Interrupt, /* 57 Default (unused) interrupt */
Cpu_Interrupt, /* 58 Default (unused) interrupt */
vPortYield, /* 59 Default (unused) interrupt */
Cpu_Interrupt, /* 60 Default (unused) interrupt */
Cpu_Interrupt, /* 61 Default (unused) interrupt */
Cpu_Interrupt, /* 62 Default (unused) interrupt */
_EntryPoint /* Reset vector */
};
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : MC9S12C32_80
** Version : Bean 01.002, Driver 01.09, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 18/06/2005, 18:00
** Abstract :
** This bean "MC9S12C32_80" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** SetWaitMode - void Cpu_SetWaitMode(void);
** SetStopMode - void Cpu_SetStopMode(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Cpu. */
#include "Byte1.h"
#include "TickTimer.h"
#include "ButtonInterrupt.h"
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
#include "Events.h"
#include "Cpu.h"
#define CGM_DELAY 3071UL
/* Global variables */
volatile byte CCR_reg; /* Current CCR reegister */
byte CpuMode = HIGH_SPEED; /* Current speed mode */
/*
** ===================================================================
** Method : Cpu_Interrupt (bean MC9S12C32_80)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void Cpu_Interrupt(void)
{
}
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/*
** ===================================================================
** Method : Cpu_DisableInt (bean MC9S12C32_80)
**
** Description :
** Disable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_EnableInt (bean MC9S12C32_80)
**
** Description :
** Enable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_SetStopMode (bean MC9S12C32_80)
**
** Description :
** Set low power mode - Stop mode. For more information
** about the stop mode see documentation of this CPU.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_SetStopMode(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_SetWaitMode (bean MC9S12C32_80)
**
** Description :
** Set low power mode - Wait mode. For more information
** about the wait mode see documentation of this CPU.
** Release from Watch mode: Reset or interrupt
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_SetWaitMode(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : _EntryPoint (bean MC9S12C32_80)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
extern void _Startup(void); /* Forward declaration of external startup function declared in file Start12.c */
#define INITRG_ADR 0x0011 /* Register map position register */
#pragma NO_FRAME
#pragma NO_EXIT
void _EntryPoint(void)
{
/*** ### MC9S12C32_80 "Cpu" init code ... ***/
/*** PE initialization code after reset ***/
/* Initialization of the registers INITRG, INITRM, INITEE is done to protect them to be written accidentally later by the application */
*(byte*)INITRG_ADR = 0; /* Set the register map position */
asm nop; /* nop instruction */
INITRM=8; /* Set the RAM map position */
/* MISC: ??=0,??=0,??=0,??=0,EXSTR1=0,EXSTR0=0,ROMHM=0,ROMON=1 */
MISC=1;
/* System clock initialization */
CLKSEL=0;
CLKSEL_PLLSEL = 0; /* Select clock source from XTAL */
PLLCTL_PLLON = 0; /* Disable the PLL */
SYNR = 23; /* Set the multiplier register */
REFDV = 15; /* Set the divider register */
PLLCTL = 192;
PLLCTL_PLLON = 1; /* Enable the PLL */
while(!CRGFLG_LOCK); /* Wait */
CLKSEL_PLLSEL = 1; /* Select clock source from PLL */
/*** End of PE initialization code after reset ***/
__asm jmp _Startup; /* Jump to C startup code */
}
/*
** ===================================================================
** Method : PE_low_level_init (bean MC9S12C32_80)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void PE_low_level_init(void)
{
/* Common initialization of the CPU registers */
/* TSCR1: TEN=0,TSWAI=0,TSFRZ=1 */
output( TSCR1, input( TSCR1 ) & ~192 | 32 );
/* TCTL2: OM0=0,OL0=0 */
output( TCTL2, input( TCTL2 ) & ~3 );
/* TCTL1: OM7=0,OL7=0 */
output( TCTL1, input( TCTL1 ) & ~192 );
/* TIE: C0I=0 */
output( TIE, input( TIE ) & ~1 );
/* TTOV: TOV0=0 */
output( TTOV, input( TTOV ) & ~1 );
/* TSCR2: TOI=0,TCRE=1 */
output( TSCR2, input( TSCR2 ) & ~128 | 8 );
/* TIOS: IOS7=1,IOS0=1 */
output( TIOS, input( TIOS ) | 129 );
/* PPSP: PPSP0=0 */
output( PPSP, input( PPSP ) & ~1 );
/* PERP: PERP0=1 */
output( PERP, input( PERP ) | 1 );
/* DDRP: DDRP0=0 */
output( DDRP, input( DDRP ) & ~1 );
/* PWMCTL: PSWAI=0,PFRZ=0 */
output( PWMCTL, input( PWMCTL ) & ~12 );
/* PWMSDN: PWMIF=0,PWMIE=0,PWMRSTRT=0,PWMLVL=0,??=0,PWM7IN=0,PWM7INL=0,PWM7ENA=0 */
output( PWMSDN, 0 );
/* ### MC9S12C32_80 "Cpu" init code ... */
/* ### ByteIO "Byte1" init code ... */
PORTB = 0; /* Prepare value for output */
DDRB = 255; /* Set direction to output */
/* ### TimerInt "TickTimer" init code ... */
TickTimer_Init();
/* ### External interrupt "ButtonInterrupt" init code ... */
PIEP_PIEP0 = 0; /* Disable interrupt */
/* Common peripheral initialization - ENABLE */
/* TSCR1: TEN=1 */
output( TSCR1, input( TSCR1 ) | 128 );
INTCR_IRQEN = 0; /* Disable the IRQ interrupt. IRQ interrupt is enabled after CPU reset by default. */
__DI(); /* Disable interrupts */
}
/* END Cpu. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : MC9S12C32_80
** Version : Bean 01.002, Driver 01.09, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 08:36
** Abstract :
** This bean "MC9S12C32_80" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** SetWaitMode - void Cpu_SetWaitMode(void);
** SetStopMode - void Cpu_SetStopMode(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __Cpu
#define __Cpu
/* Active configuration define symbol */
#define PEcfg_80pin 1
/*Include shared modules, which are used for whole project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
/* MODULE Cpu. */
/* Global variables */
extern volatile byte CCR_reg; /* Current CCR reegister */
extern byte CpuMode; /* Current speed mode */
#define Cpu_SetStopMode() __asm("STOP") /* Set STOP mode */
/*
** ===================================================================
** Method : Cpu_SetStopMode (bean MC9S12C32_80)
**
** Description :
** Set low power mode - Stop mode. For more information
** about the stop mode see documentation of this CPU.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#define Cpu_SetWaitMode() __asm("WAIT") /* Set WAIT mode */
/*
** ===================================================================
** Method : Cpu_SetWaitMode (bean MC9S12C32_80)
**
** Description :
** Set low power mode - Wait mode. For more information
** about the wait mode see documentation of this CPU.
** Release from Watch mode: Reset or interrupt
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#define Cpu_DisableInt() __DI() /* Disable interrupts */
/*
** ===================================================================
** Method : Cpu_DisableInt (bean MC9S12C32_80)
**
** Description :
** Disable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#define Cpu_EnableInt() __EI() /* Enable interrupts */
/*
** ===================================================================
** Method : Cpu_EnableInt (bean MC9S12C32_80)
**
** Description :
** Enable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void Cpu_Interrupt(void);
/*
** ===================================================================
** Method : Cpu_Interrupt (bean MC9S12C32_80)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
void PE_low_level_init(void);
/*
** ===================================================================
** Method : PE_low_level_init (bean MC9S12C32_80)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
/* END Cpu. */
#endif /* ifndef __Cpu */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** Filename : Events.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : Events
** Version : Driver 01.01
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 08:36
** Abstract :
** This is user's event module.
** Put your event handler code here.
** Settings :
** Contents :
** vTaskTickInterrupt - void vTaskTickInterrupt(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Events */
/*Including used modules for compilling procedure*/
#include "Cpu.h"
#include "Events.h"
#include "Byte1.h"
#include "TickTimer.h"
#include "ButtonInterrupt.h"
/*Include shared modules, which are used for whole project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
/*
** ===================================================================
** Event : vTaskTickInterrupt (module Events)
**
** From bean : TickTimer [TimerInt]
** Description :
** When a timer interrupt occurs this event is called (only
** when the bean is enabled - "Enable" and the events are
** enabled - "EnableEvent").
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void vTaskTickInterrupt(void)
{
/* Write your code here ... */
}
/*
** ===================================================================
** Event : ButtonInterrupt_OnInterrupt (module Events)
**
** From bean : ButtonInterrupt [ExtInt]
** Description :
** This event is called when the active signal edge/level
** occurs.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void ButtonInterrupt_OnInterrupt(void)
{
/* place your ButtonInterrupt interrupt procedure body here */
}
/* END Events */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** Filename : Events.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : Events
** Version : Driver 01.01
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 08:36
** Abstract :
** This is user's event module.
** Put your event handler code here.
** Settings :
** Contents :
** vTaskTickInterrupt - void vTaskTickInterrupt(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __Events_H
#define __Events_H
/* MODULE Events */
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
void vTaskTickInterrupt(void);
/*
** ===================================================================
** Event : vTaskTickInterrupt (module Events)
**
** From bean : TickTimer [TimerInt]
** Description :
** When a timer interrupt occurs this event is called (only
** when the bean is enabled - "Enable" and the events are
** enabled - "EnableEvent").
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void ButtonInterrupt_OnInterrupt(void);
/*
** ===================================================================
** Event : ButtonInterrupt_OnInterrupt (module Events)
**
** From bean : ButtonInterrupt [ExtInt]
** Description :
** This event is called when the active signal edge/level
** occurs.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/* END Events */
#endif /* __Events_H*/
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : IO_Map.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : IO_Map
** Version : Driver 01.01
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:11
** Abstract :
** This bean "IO_Map" implements an IO devices mapping.
** Settings :
**
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* Based on CPU DB MC9S12C32_80, version 2.87.264 */
#include "PE_types.h"
#include "IO_Map.h"
volatile ARMCOPSTR _ARMCOP; /* CRG COP Timer Arm/Reset Register */
volatile ATDDIENSTR _ATDDIEN; /* ATD Input Enable Mask Register */
volatile ATDSTAT0STR _ATDSTAT0; /* A/D Status Register 0 */
volatile ATDSTAT1STR _ATDSTAT1; /* A/D Status Register 1 */
volatile BDMCCRSTR _BDMCCR; /* BDM CCR Holding Register */
volatile BDMINRSTR _BDMINR; /* BDM Internal Register Position Register */
volatile BDMSTSSTR _BDMSTS; /* BDM Status Register */
volatile BKP0HSTR _BKP0H; /* First Address High Byte Breakpoint Register */
volatile BKP0LSTR _BKP0L; /* First Address Low Byte Breakpoint Register */
volatile BKP0XSTR _BKP0X; /* First Address Memory Expansion Breakpoint Register */
volatile BKP1HSTR _BKP1H; /* Data (Second Address) High Byte Breakpoint Register */
volatile BKP1LSTR _BKP1L; /* Data (Second Address) Low Byte Breakpoint Register */
volatile BKP1XSTR _BKP1X; /* Second Address Memory Expansion Breakpoint Register */
volatile BKPCT0STR _BKPCT0; /* Breakpoint Control Register 0 */
volatile BKPCT1STR _BKPCT1; /* Breakpoint Control Register 1 */
volatile CANBTR0STR _CANBTR0; /* MSCAN Bus Timing Register 0 */
volatile CANBTR1STR _CANBTR1; /* MSCAN Bus Timing Register 1 */
volatile CANCTL0STR _CANCTL0; /* MSCAN Control 0 Register */
volatile CANCTL1STR _CANCTL1; /* MSCAN Control 1 Register */
volatile CANIDACSTR _CANIDAC; /* MSCAN Identifier Acceptance Control Register */
volatile CANIDAR0STR _CANIDAR0; /* MSCAN Identifier Acceptance Register 0 */
volatile CANIDAR1STR _CANIDAR1; /* MSCAN Identifier Acceptance Register 1 */
volatile CANIDAR2STR _CANIDAR2; /* MSCAN Identifier Acceptance Register 2 */
volatile CANIDAR3STR _CANIDAR3; /* MSCAN Identifier Acceptance Register 3 */
volatile CANIDAR4STR _CANIDAR4; /* MSCAN Identifier Acceptance Register 4 */
volatile CANIDAR5STR _CANIDAR5; /* MSCAN Identifier Acceptance Register 5 */
volatile CANIDAR6STR _CANIDAR6; /* MSCAN Identifier Acceptance Register 6 */
volatile CANIDAR7STR _CANIDAR7; /* MSCAN Identifier Acceptance Register 7 */
volatile CANIDMR0STR _CANIDMR0; /* MSCAN Identifier Mask Register 0 */
volatile CANIDMR1STR _CANIDMR1; /* MSCAN Identifier Mask Register 1 */
volatile CANIDMR2STR _CANIDMR2; /* MSCAN Identifier Mask Register 2 */
volatile CANIDMR3STR _CANIDMR3; /* MSCAN Identifier Mask Register 3 */
volatile CANIDMR4STR _CANIDMR4; /* MSCAN Identifier Mask Register 4 */
volatile CANIDMR5STR _CANIDMR5; /* MSCAN Identifier Mask Register 5 */
volatile CANIDMR6STR _CANIDMR6; /* MSCAN Identifier Mask Register 6 */
volatile CANIDMR7STR _CANIDMR7; /* MSCAN Identifier Mask Register 7 */
volatile CANRFLGSTR _CANRFLG; /* MSCAN Receiver Flag Register */
volatile CANRIERSTR _CANRIER; /* MSCAN Receiver Interrupt Enable Register */
volatile CANRXDLRSTR _CANRXDLR; /* MSCAN Receive Data Length Register */
volatile CANRXDSR0STR _CANRXDSR0; /* MSCAN Receive Data Segment Register 0 */
volatile CANRXDSR1STR _CANRXDSR1; /* MSCAN Receive Data Segment Register 1 */
volatile CANRXDSR2STR _CANRXDSR2; /* MSCAN Receive Data Segment Register 2 */
volatile CANRXDSR3STR _CANRXDSR3; /* MSCAN Receive Data Segment Register 3 */
volatile CANRXDSR4STR _CANRXDSR4; /* MSCAN Receive Data Segment Register 4 */
volatile CANRXDSR5STR _CANRXDSR5; /* MSCAN Receive Data Segment Register 5 */
volatile CANRXDSR6STR _CANRXDSR6; /* MSCAN Receive Data Segment Register 6 */
volatile CANRXDSR7STR _CANRXDSR7; /* MSCAN Receive Data Segment Register 7 */
volatile CANRXERRSTR _CANRXERR; /* MSCAN Receive Error Counter Register */
volatile CANRXIDR0STR _CANRXIDR0; /* MSCAN Receive Identifier Register 0 */
volatile CANRXIDR1STR _CANRXIDR1; /* MSCAN Receive Identifier Register 1 */
volatile CANRXIDR2STR _CANRXIDR2; /* MSCAN Receive Identifier Register 2 */
volatile CANRXIDR3STR _CANRXIDR3; /* MSCAN Receive Identifier Register 3 */
volatile CANTAAKSTR _CANTAAK; /* MSCAN Transmitter Message Abort Control */
volatile CANTARQSTR _CANTARQ; /* MSCAN Transmitter Message Abort Request */
volatile CANTBSELSTR _CANTBSEL; /* MSCAN Transmit Buffer Selection */
volatile CANTFLGSTR _CANTFLG; /* MSCAN Transmitter Flag Register */
volatile CANTIERSTR _CANTIER; /* MSCAN Transmitter Interrupt Enable Register */
volatile CANTXDLRSTR _CANTXDLR; /* MSCAN Transmit Data Length Register */
volatile CANTXDSR0STR _CANTXDSR0; /* MSCAN Transmit Data Segment Register 0 */
volatile CANTXDSR1STR _CANTXDSR1; /* MSCAN Transmit Data Segment Register 1 */
volatile CANTXDSR2STR _CANTXDSR2; /* MSCAN Transmit Data Segment Register 2 */
volatile CANTXDSR3STR _CANTXDSR3; /* MSCAN Transmit Data Segment Register 3 */
volatile CANTXDSR4STR _CANTXDSR4; /* MSCAN Transmit Data Segment Register 4 */
volatile CANTXDSR5STR _CANTXDSR5; /* MSCAN Transmit Data Segment Register 5 */
volatile CANTXDSR6STR _CANTXDSR6; /* MSCAN Transmit Data Segment Register 6 */
volatile CANTXDSR7STR _CANTXDSR7; /* MSCAN Transmit Data Segment Register 7 */
volatile CANTXERRSTR _CANTXERR; /* MSCAN Transmit Error Counter Register */
volatile CANTXIDR0STR _CANTXIDR0; /* MSCAN Transmit Identifier Register 0 */
volatile CANTXIDR1STR _CANTXIDR1; /* MSCAN Transmit Identifier Register 1 */
volatile CANTXIDR2STR _CANTXIDR2; /* MSCAN Transmit Identifier Register 2 */
volatile CANTXIDR3STR _CANTXIDR3; /* MSCAN Transmit Identifier Register 3 */
volatile CANTXTBPRSTR _CANTXTBPR; /* MSCAN Transmit Buffer Priority */
volatile CFORCSTR _CFORC; /* Timer Compare Force Register */
volatile CLKSELSTR _CLKSEL; /* CRG Clock Select Register */
volatile COPCTLSTR _COPCTL; /* CRG COP Control Register */
volatile CRGFLGSTR _CRGFLG; /* CRG Flags Register */
volatile CRGINTSTR _CRGINT; /* CRG Interrupt Enable Register */
volatile CTCTLSTR _CTCTL; /* CRG Test Control Register */
volatile CTFLGSTR _CTFLG; /* CRG Test Flags Register */
volatile DDRADSTR _DDRAD; /* Port AD Data Direction Register */
volatile DDRESTR _DDRE; /* Port E Data Direction Register */
volatile DDRJSTR _DDRJ; /* Port J Data Direction Register */
volatile DDRKSTR _DDRK; /* Port K Data Direction Register */
volatile DDRMSTR _DDRM; /* Port M Data Direction Register */
volatile DDRPSTR _DDRP; /* Port P Data Direction Register */
volatile DDRSSTR _DDRS; /* Port S Data Direction Register */
volatile DDRTSTR _DDRT; /* Port T Data Direction Register */
volatile EBICTLSTR _EBICTL; /* External Bus Interface Control */
volatile FCLKDIVSTR _FCLKDIV; /* Flash Clock Divider Register */
volatile FCMDSTR _FCMD; /* Flash Command Buffer and Register */
volatile FCNFGSTR _FCNFG; /* Flash Configuration Register */
volatile FPROTSTR _FPROT; /* Flash Protection Register */
volatile FSECSTR _FSEC; /* Flash Security Register */
volatile FSTATSTR _FSTAT; /* Flash Status Register */
volatile HPRIOSTR _HPRIO; /* Highest Priority I Interrupt */
volatile INITEESTR _INITEE; /* Initialization of Internal EEPROM Position Register */
volatile INITRGSTR _INITRG; /* Initialization of Internal Register Position Register */
volatile INITRMSTR _INITRM; /* Initialization of Internal RAM Position Register */
volatile INTCRSTR _INTCR; /* Interrupt Control Register */
volatile ITCRSTR _ITCR; /* Interrupt Test Control Register */
volatile ITESTSTR _ITEST; /* Interrupt Test Register */
volatile MEMSIZ0STR _MEMSIZ0; /* Memory Size Register Zero */
volatile MEMSIZ1STR _MEMSIZ1; /* Memory Size Register One */
volatile MISCSTR _MISC; /* Miscellaneous Mapping Control Register */
volatile MODESTR _MODE; /* Mode Register */
volatile MODRRSTR _MODRR; /* Module Routing Register */
volatile MTST0STR _MTST0; /* MTST0 */
volatile MTST1STR _MTST1; /* MTST1 */
volatile OC7DSTR _OC7D; /* Output Compare 7 Data Register */
volatile OC7MSTR _OC7M; /* Output Compare 7 Mask Register */
volatile PACTLSTR _PACTL; /* 16-Bit Pulse Accumulator A Control Register */
volatile PAFLGSTR _PAFLG; /* Pulse Accumulator A Flag Register */
volatile PARTIDHSTR _PARTIDH; /* Part ID Register High */
volatile PARTIDLSTR _PARTIDL; /* Part ID Register Low */
volatile PEARSTR _PEAR; /* Port E Assignment Register */
volatile PERADSTR _PERAD; /* Port AD Pull Device Enable Register */
volatile PERJSTR _PERJ; /* Port J Pull Device Enable Register */
volatile PERMSTR _PERM; /* Port M Pull Device Enable Register */
volatile PERPSTR _PERP; /* Port P Pull Device Enable Register */
volatile PERSSTR _PERS; /* Port S Pull Device Enable Register */
volatile PERTSTR _PERT; /* Port T Pull Device Enable Register */
volatile PIEJSTR _PIEJ; /* Port J Interrupt Enable Register */
volatile PIEPSTR _PIEP; /* Port P Interrupt Enable Register */
volatile PIFJSTR _PIFJ; /* Port J Interrupt Flag Register */
volatile PIFPSTR _PIFP; /* Port P Interrupt Flag Register */
volatile PLLCTLSTR _PLLCTL; /* CRG PLL Control Register */
volatile PORTAD0STR _PORTAD0; /* Port AD0 Register */
volatile PORTESTR _PORTE; /* Port E Register */
volatile PORTKSTR _PORTK; /* Port K Data Register */
volatile PPAGESTR _PPAGE; /* Page Index Register */
volatile PPSADSTR _PPSAD; /* Port AD Polarity Select Register */
volatile PPSJSTR _PPSJ; /* PortJP Polarity Select Register */
volatile PPSMSTR _PPSM; /* Port M Polarity Select Register */
volatile PPSPSTR _PPSP; /* Port P Polarity Select Register */
volatile PPSSSTR _PPSS; /* Port S Polarity Select Register */
volatile PPSTSTR _PPST; /* Port T Polarity Select Register */
volatile PTADSTR _PTAD; /* Port AD I/O Register */
volatile PTIADSTR _PTIAD; /* Port AD Input Register */
volatile PTIJSTR _PTIJ; /* Port J Input Register */
volatile PTIMSTR _PTIM; /* Port M Input */
volatile PTIPSTR _PTIP; /* Port P Input */
volatile PTISSTR _PTIS; /* Port S Input */
volatile PTITSTR _PTIT; /* Port T Input */
volatile PTJSTR _PTJ; /* Port J I/O Register */
volatile PTMSTR _PTM; /* Port M I/O Register */
volatile PTPSTR _PTP; /* Port P I/O Register */
volatile PTSSTR _PTS; /* Port S I/O Register */
volatile PTTSTR _PTT; /* Port T I/O Register */
volatile PUCRSTR _PUCR; /* Pull-Up Control Register */
volatile PWMCAESTR _PWMCAE; /* PWM Center Align Enable Register */
volatile PWMCLKSTR _PWMCLK; /* PWM Clock Select Register */
volatile PWMCTLSTR _PWMCTL; /* PWM Control Register */
volatile PWMESTR _PWME; /* PWM Enable Register */
volatile PWMPOLSTR _PWMPOL; /* PWM Polarity Register */
volatile PWMPRCLKSTR _PWMPRCLK; /* PWM Prescale Clock Select Register */
volatile PWMSCLASTR _PWMSCLA; /* PWM Scale A Register */
volatile PWMSCLBSTR _PWMSCLB; /* PWM Scale B Register */
volatile PWMSDNSTR _PWMSDN; /* PWM Shutdown Register */
volatile RDRADSTR _RDRAD; /* Port AD Reduced Drive Register */
volatile RDRIVSTR _RDRIV; /* Reduced Drive of I/O Lines */
volatile RDRJSTR _RDRJ; /* Port J Reduced Drive Register */
volatile RDRMSTR _RDRM; /* Port M Reduced Drive Register */
volatile RDRPSTR _RDRP; /* Port P Reduced Drive Register */
volatile RDRSSTR _RDRS; /* Port S Reduced Drive Register */
volatile RDRTSTR _RDRT; /* Port T Reduced Drive Register */
volatile REFDVSTR _REFDV; /* CRG Reference Divider Register */
volatile RTICTLSTR _RTICTL; /* CRG RTI Control Register */
volatile SCICR1STR _SCICR1; /* SCI Control Register 1 */
volatile SCICR2STR _SCICR2; /* SCI Control Register 2 */
volatile SCIDRHSTR _SCIDRH; /* SCI Data Register High */
volatile SCIDRLSTR _SCIDRL; /* SCI Data Register Low */
volatile SCISR1STR _SCISR1; /* SCI Status Register 1 */
volatile SCISR2STR _SCISR2; /* SCI Status Register 2 */
volatile SPIBRSTR _SPIBR; /* SPI Baud Rate Register */
volatile SPICR1STR _SPICR1; /* SPI Control Register */
volatile SPICR2STR _SPICR2; /* SPI Control Register 2 */
volatile SPIDRSTR _SPIDR; /* SPI Data Register */
volatile SPISRSTR _SPISR; /* SPI Status Register */
volatile SYNRSTR _SYNR; /* CRG Synthesizer Register */
volatile TCTL1STR _TCTL1; /* Timer Control Register 1 */
volatile TCTL2STR _TCTL2; /* Timer Control Register 2 */
volatile TCTL3STR _TCTL3; /* Timer Control Register 3 */
volatile TCTL4STR _TCTL4; /* Timer Control Register 4 */
volatile TFLG1STR _TFLG1; /* Main Timer Interrupt Flag 1 */
volatile TFLG2STR _TFLG2; /* Main Timer Interrupt Flag 2 */
volatile TIESTR _TIE; /* Timer Interrupt Enable Register */
volatile TIOSSTR _TIOS; /* Timer Input Capture/Output Compare Select */
volatile TSCR1STR _TSCR1; /* Timer System Control Register1 */
volatile TSCR2STR _TSCR2; /* Timer System Control Register 2 */
volatile TTOVSTR _TTOV; /* Timer Toggle On Overflow Register */
volatile WOMMSTR _WOMM; /* Port M Wired-Or Mode Register */
volatile WOMSSTR _WOMS; /* Port S Wired-Or Mode Register */
volatile ATDCTL23STR _ATDCTL23; /* ATD Control Register 23 */
volatile ATDCTL45STR _ATDCTL45; /* ATD Control Register 45 */
volatile ATDDR0STR _ATDDR0; /* A/D Conversion Result Register 0 */
volatile ATDDR1STR _ATDDR1; /* A/D Conversion Result Register 1 */
volatile ATDDR2STR _ATDDR2; /* A/D Conversion Result Register 2 */
volatile ATDDR3STR _ATDDR3; /* A/D Conversion Result Register 3 */
volatile ATDDR4STR _ATDDR4; /* A/D Conversion Result Register 4 */
volatile ATDDR5STR _ATDDR5; /* A/D Conversion Result Register 5 */
volatile ATDDR6STR _ATDDR6; /* A/D Conversion Result Register 6 */
volatile ATDDR7STR _ATDDR7; /* A/D Conversion Result Register 7 */
volatile DDRABSTR _DDRAB; /* Port AB Data Direction Register */
volatile PACNTSTR _PACNT; /* Pulse Accumulators Count Register */
volatile PORTABSTR _PORTAB; /* Port AB Register */
volatile PWMCNT01STR _PWMCNT01; /* PWM Channel Counter 01 Register */
volatile PWMCNT23STR _PWMCNT23; /* PWM Channel Counter 23 Register */
volatile PWMCNT45STR _PWMCNT45; /* PWM Channel Counter 45 Register */
volatile PWMDTY01STR _PWMDTY01; /* PWM Channel Duty 01 Register */
volatile PWMDTY23STR _PWMDTY23; /* PWM Channel Duty 23 Register */
volatile PWMDTY45STR _PWMDTY45; /* PWM Channel Duty 45 Register */
volatile PWMPER01STR _PWMPER01; /* PWM Channel Period 01 Register */
volatile PWMPER23STR _PWMPER23; /* PWM Channel Period 23 Register */
volatile PWMPER45STR _PWMPER45; /* PWM Channel Period 45 Register */
volatile SCIBDSTR _SCIBD; /* SCI Baud Rate Register */
volatile TC0STR _TC0; /* Timer Input Capture/Output Compare Register 0 */
volatile TC1STR _TC1; /* Timer Input Capture/Output Compare Register 1 */
volatile TC2STR _TC2; /* Timer Input Capture/Output Compare Register 2 */
volatile TC3STR _TC3; /* Timer Input Capture/Output Compare Register 3 */
volatile TC4STR _TC4; /* Timer Input Capture/Output Compare Register 4 */
volatile TC5STR _TC5; /* Timer Input Capture/Output Compare Register 5 */
volatile TC6STR _TC6; /* Timer Input Capture/Output Compare Register 6 */
volatile TC7STR _TC7; /* Timer Input Capture/Output Compare Register 7 */
volatile TCNTSTR _TCNT; /* Timer Count Register */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/* ================================================================================================================================= **
** ================================================================================================================================= **
** CONFIGURATION FILE FOR PESL LIBRARY **
** ================================================================================================================================= **
** ================================================================================================================================= */
#define _MC9S12A128_112 1
#define _MC9S12A128_80 2
#define _MC9S12A256_112 3
#define _MC9S12A256_80 4
#define _MC9S12A64_112 5
#define _MC9S12A64_80 6
#define _MC9S12C32_48 7
#define _MC9S12C32_52 8
#define _MC9S12C32_80 9
#define _MC9S12D64_112 10
#define _MC9S12D64_80 11
#define _MC9S12DB128_112 12
#define _MC9S12DG128_112 13
#define _MC9S12DG128_80 14
#define _MC9S12DG256_112 15
#define _MC9S12DJ128_112 16
#define _MC9S12DJ128_80 17
#define _MC9S12DJ256_112 18
#define _MC9S12DJ256_80 19
#define _MC9S12DJ64_112 20
#define _MC9S12DJ64_80 21
#define _MC9S12DP256_112 22
#define _MC9S12DT128_112 23
#define _MC9S12DT256_112 24
#define _MC9S12A32_80 25
#define _MC9S12D32_80 26
#define _MC9S12DP512_112 27
#define _MC9S12A512_112 28
#define _MC9S12E128_112 29
#define _MC9S12E128_80 30
#define _MC9S12E64_112 31
/* Selected target MCU */
#define CPUtype _MC9S12C32_80
/* PESL library */
#pragma MESSAGE DISABLE C4000 /* WARNING C4000: Condition is always TRUE */
#pragma MESSAGE DISABLE C4001 /* WARNING C4001: Condition is always FALSE */
#include "PESLlib.h"

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Const.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : PE_Const
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:11
** Abstract :
** This bean "PE_Const" contains internal definitions
** of the constants.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Const_H
#define __PE_Const_H
/* Constants for detecting running mode */
#define HIGH_SPEED 0 /* High speed */
#define LOW_SPEED 1 /* Low speed */
#define SLOW_SPEED 2 /* Slow speed */
/* Reset cause constants */
#define RSTSRC_POR 1 /* Power-on reset */
#define RSTSRC_PIN 8 /* External reset bit */
#define RSTSRC_COP 4 /* COP reset */
#define RSTSRC_ILOP 2 /* Illegal opcode reset */
#define RSTSRC_ILAD 16 /* Illegal address reset */
#define RSTSRC_LVI 32 /* Low voltage inhibit reset */
#endif /* _PE_Const_H */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Error.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : PE_Error
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:11
** Abstract :
** This bean "PE_Error" contains internal definitions
** of the error constants.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Error_H
#define __PE_Error_H
#define ERR_OK 0 /* OK */
#define ERR_SPEED 1 /* This device does not work in the active speed mode. */
#define ERR_RANGE 2 /* Parameter out of range. */
#define ERR_VALUE 3 /* Parameter of incorrect value. */
#define ERR_OVERFLOW 4 /* Timer overflow. */
#define ERR_MATH 5 /* Overflow during evaluation. */
#define ERR_ENABLED 6 /* Device is enabled. */
#define ERR_DISABLED 7 /* Device is disabled. */
#define ERR_BUSY 8 /* Device is busy. */
#define ERR_NOTAVAIL 9 /* Requested value or method not available. */
#define ERR_RXEMPTY 10 /* No data in receiver. */
#define ERR_TXFULL 11 /* Transmitter is full. */
#define ERR_BUSOFF 12 /* Bus not available. */
#define ERR_OVERRUN 13 /* Overrun error is detected. */
#define ERR_FRAMING 14 /* Framing error is detected. */
#define ERR_PARITY 15 /* Parity error is detected. */
#define ERR_NOISE 16 /* Noise error is detected. */
#define ERR_IDLE 17 /* Idle error is detectes. */
#define ERR_FAULT 18 /* Fault error is detected. */
#define ERR_BREAK 19 /* Break char is received during communication. */
#define ERR_CRC 20 /* CRC error is detected. */
#define ERR_ARBITR 21 /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */
#define ERR_PROTECT 22 /* Protection error is detected. */
#endif __PE_Error_H

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Timer.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : PE_Timer
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 08:44
** Abstract :
** This bean "PE_Timer" implements internal methods and definitions
** used by beans working with timers.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE PE_Timer. */
#include "PE_Timer.h"
/*
** ===================================================================
** Method : PE_Timer_LngHi1 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
bool PE_Timer_LngHi1(dword High, dword Low, word *Out)
{
if ((High == 0) && ((Low >> 24) == 0))
if ((Low & 0x80) != 0) {
if ((Low >> 8) < 0xFFFF) {
*Out = ((unsigned int)(Low >> 8))+1;
return FALSE;
}
}
else {
*Out = (unsigned int)(Low >> 8);
return FALSE;
}
*Out = (unsigned int)(Low >> 8);
return TRUE;
}
/* END PE_Timer. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Timer.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : PE_Timer
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 08:44
** Abstract :
** This bean "PE_Timer" implements internal methods and definitions
** used by beans working with timers.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Timer
#define __PE_Timer
/*Include shared modules, which are used for whole project*/
#include "PE_types.h"
#include "PE_const.h"
/* MODULE PE_Timer. */
bool PE_Timer_LngHi1(dword Low, dword High, word *Out);
/*
** ===================================================================
** Method : PE_Timer_LngHi1 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#endif /* END PE_Timer. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Types.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : PE_Types
** Version : Driver 01.04
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:11
** Abstract :
** This bean "PE_Types" contains internal definitions
** of the types.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Types_H
#define __PE_Types_H
#define FALSE 0
#define TRUE 1
/*Types definition*/
typedef unsigned char bool;
typedef unsigned char byte;
typedef unsigned int word;
typedef unsigned long dword;
typedef unsigned long dlong[2];
typedef void (*tIntFunc)(void);
/* Motorola types */
typedef unsigned char VUINT8;
typedef signed char VINT8;
typedef unsigned short int VUINT16;
typedef signed short int VINT16;
typedef unsigned long int VUINT32;
#define in16(var,l,h) var = ((word)(l)) | (((word)(h)) << 8)
#define out16(l,h,val) { l = (byte)val; h = (byte)(val >> 8); }
#define output(P, V) P = (V)
#define input(P) (P)
#define __DI() { asm sei; } /* Disable global interrupts */
#define __EI() { asm cli; } /* Enable global interrupts */
#define EnterCritical() { __asm pshc; __asm sei; __asm movb 1,SP+,CCR_reg; } /* This macro is used by Processor Expert. It saves CCR register and disable global interrupts. */
#define ExitCritical() { __asm movb CCR_reg, 1,-SP; __asm pulc; } /* This macro is used by Processor Expert. It restores CCR register saved in SaveStatusReg(). */
/* obsolete definition for backward compatibility */
#define SaveStatusReg() EnterCritical()
#define RestoreStatusReg() ExitCritical()
typedef struct { /* Black&White Image */
word width; /* Image width */
word height; /* Image height */
byte *pixmap; /* Image pixel bitmap */
word size; /* Image size */
char *name; /* Image name */
} TIMAGE;
typedef TIMAGE* PIMAGE ; /* Pointer to image */
/* 16-bit register (Motorola format - big endian) */
typedef union {
word w;
struct {
byte high,low;
} b;
} TWREG;
#endif /* __PE_Types_H */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** Filename : RTOSDemo.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Version : Driver 01.05
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:11
** Abstract :
** Main module.
** Here is to be placed user's code.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE RTOSDemo */
/* Including used modules for compilling procedure */
#include "Cpu.h"
#include "Events.h"
#include "Byte1.h"
#include "TickTimer.h"
#include "ButtonInterrupt.h"
/* Include shared modules, which are used for whole project */
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
extern void vMain( void );
void main(void)
{
/*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/
PE_low_level_init();
/*** End of Processor Expert internal initialization. ***/
/*Write your code here*/
/* Just jump to the real main(). */
__asm
{
jmp vMain
}
/*** Processor Expert end of main routine. DON'T MODIFY THIS CODE!!! ***/
for(;;);
/*** Processor Expert end of main routine. DON'T WRITE CODE BELOW!!! ***/
} /*** End of main routine. DO NOT MODIFY THIS TEXT!!! ***/
/* END RTOSDemo */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/*
** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : RTOSDemo.PRM
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 18/06/2005, 18:00
** Abstract :
** This file is used by the linker. It describes files to be linked,
** memory ranges, stack size, etc. For detailed description of the PRM file
** see CodeWarrior documentation. This file is generated by default.
** You can switch off generation by setting the property
** "Generate PRM file = no" on the "Build options" tab in CPU bean and then modify
** this file if needed.
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################
*/
NAMES
END
SECTIONS
/* List of all sections specified on the "Build options" tab */
RAM = READ_WRITE 0x00000800 TO 0x00000FFF;
ROM_C000 = READ_ONLY 0x0000C000 TO 0x0000FF7F;
ROM_4000 = READ_ONLY 0x00004000 TO 0x00007FFF;
END
PLACEMENT
DEFAULT_RAM INTO RAM;
_PRESTART, STARTUP,
ROM_VAR, STRINGS,
NON_BANKED, DEFAULT_ROM, COPY INTO ROM_C000, ROM_4000;
END
INIT _EntryPoint /* The entry point of the application. This function is generated into the CPU module. */
STACKSIZE 0x0030 /* Size of the system stack. Value can be changed on the "Build options" tab */

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : TickTimer.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : TimerInt
** Version : Bean 02.063, Driver 01.05, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 18/06/2005, 17:53
** Abstract :
** This bean "TimerInt" implements a periodic interrupt.
** When the bean and its events are enabled, the "OnInterrupt"
** event is called periodically with the period that you specify.
** TimerInt supports also changing the period in runtime.
** The source of periodic interrupt can be timer compare or reload
** register or timer-overflow interrupt (of free running counter).
** Settings :
** Timer name : TIM (16-bit)
** Compare name : TC0
** Counter shared : No
**
** High-speed CPU mode
** Prescaler : divide-by-4
** Clock : 5999000 Hz
** Initial period/frequency
** Xtal ticks : 16000
** microseconds : 1000
** milliseconds : 1
** seconds (real) : 0.0010000
** Hz : 1000
** kHz : 1
**
** Runtime setting : period/frequency interval (continual setting)
** ticks : 16000 to 160000 ticks
** microseconds : 1000 to 10000 microseconds
** milliseconds : 1 to 10 milliseconds
** seconds (real) : 0.0010000 to 0.0100000 seconds
** Hz : 100 to 1000 Hz
**
** Initialization:
** Timer : Disabled
** Events : Enabled
**
** Timer registers
** Counter : TCNT [68]
** Mode : TIOS [64]
** Run : TSCR1 [70]
** Prescaler : TSCR2 [77]
**
** Compare registers
** Compare : TC0 [80]
**
** Flip-flop registers
** Mode : TCTL2 [73]
** Contents :
** Enable - byte TickTimer_Enable(void);
** SetFreqHz - byte TickTimer_SetFreqHz(word Freq);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE TickTimer. */
#include "Events.h"
#include "TickTimer.h"
/* Definition of DATA and CODE segments for this bean. User can specify where
these segments will be located on "Build options" tab of the selected CPU bean. */
#pragma DATA_SEG TickTimer_DATA /* Data section for this module. */
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
static bool EnUser; /* Enable/Disable device by user */
static word CmpHighVal; /* Compare register value for high speed CPU mode */
/*
** ===================================================================
** Method : SetCV (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
static void SetCV(word Val)
{
if (Val == 0) /* If the given value is zero */
Val = 65535; /* then change it to the maximal one */
TC0 = Val; /* Store given value to the compare register */
TC7 = Val; /* Store given value to the modulo register */
}
/*
** ===================================================================
** Method : SetPV (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
static void SetPV(byte Val)
{
TSCR2_PR = Val; /* Store given value to the prescaler */
}
/*
** ===================================================================
** Method : HWEnDi (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
static void HWEnDi(void)
{
if (EnUser) { /* Enable device? */
TFLG1 = 1; /* Reset interrupt request flag */
TIE_C0I = 1; /* Enable interrupt */
}
else { /* Disable device? */
TIE_C0I = 0; /* Disable interrupt */
}
}
/*
** ===================================================================
** Method : TickTimer_Enable (bean TimerInt)
**
** Description :
** Enable the bean - it starts the timer. Events may be
** generated ("DisableEvent"/"EnableEvent").
** Parameters : None
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ===================================================================
*/
byte TickTimer_Enable(void)
{
if (!EnUser) { /* Is the device disabled by user? */
EnUser = TRUE; /* If yes then set the flag "device enabled" */
HWEnDi(); /* Enable the device */
}
return ERR_OK; /* OK */
}
/*
** ===================================================================
** Method : TickTimer_SetFreqHz (bean TimerInt)
**
** Description :
** This method sets the new frequency of the generated
** events. The frequency is expressed in Hz as a 16-bit
** unsigned integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Freq - Frequency to set [in Hz]
** (100 to 1000 Hz)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
byte TickTimer_SetFreqHz(word Freq)
{
dlong rtval; /* Result of two 32-bit numbers division */
word rtword; /* Result of 64-bit number division */
if ((Freq > 1000) || (Freq < 100)) /* Is the given value out of range? */
return ERR_RANGE; /* If yes then error */
rtval[1] = 1535744000 / (dword)Freq; /* Divide high speed CPU mode coefficient by the given value */
rtval[0] = 0; /* Convert result to the type dlong */
if (PE_Timer_LngHi1(rtval[0],rtval[1],&rtword)) /* Is the result greater or equal than 65536 ? */
rtword = 65535; /* If yes then use maximal possible value */
CmpHighVal = rtword; /* Store result (compare register value for high speed CPU mode) to the variable CmpHighVal */
SetCV(CmpHighVal); /* Store appropriate value to the compare register according to the selected high speed CPU mode */
return ERR_OK; /* OK */
}
/*
** ===================================================================
** Method : TickTimer_Init (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void TickTimer_Init(void)
{
CmpHighVal = 5999; /* Compare register value for high speed CPU mode */
EnUser = FALSE; /* Disable device */
SetCV(CmpHighVal); /* Store appropriate value to the compare register according to the selected high speed CPU mode */
SetPV(2); /* Set prescaler register according to the selected high speed CPU mode */
HWEnDi(); /* Enable/disable device according to status flags */
}
/*
** ===================================================================
** Method : TickTimer_Interrupt (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void TickTimer_Interrupt(void)
{
TFLG1 = 1; /* Reset interrupt request flag */
vTaskTickInterrupt(); /* Invoke user event */
}
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
/* END TickTimer. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : TickTimer.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : TimerInt
** Version : Bean 02.063, Driver 01.05, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 18/06/2005, 17:53
** Abstract :
** This bean "TimerInt" implements a periodic interrupt.
** When the bean and its events are enabled, the "OnInterrupt"
** event is called periodically with the period that you specify.
** TimerInt supports also changing the period in runtime.
** The source of periodic interrupt can be timer compare or reload
** register or timer-overflow interrupt (of free running counter).
** Settings :
** Timer name : TIM (16-bit)
** Compare name : TC0
** Counter shared : No
**
** High-speed CPU mode
** Prescaler : divide-by-4
** Clock : 5999000 Hz
** Initial period/frequency
** Xtal ticks : 16000
** microseconds : 1000
** milliseconds : 1
** seconds (real) : 0.0010000
** Hz : 1000
** kHz : 1
**
** Runtime setting : period/frequency interval (continual setting)
** ticks : 16000 to 160000 ticks
** microseconds : 1000 to 10000 microseconds
** milliseconds : 1 to 10 milliseconds
** seconds (real) : 0.0010000 to 0.0100000 seconds
** Hz : 100 to 1000 Hz
**
** Initialization:
** Timer : Disabled
** Events : Enabled
**
** Timer registers
** Counter : TCNT [68]
** Mode : TIOS [64]
** Run : TSCR1 [70]
** Prescaler : TSCR2 [77]
**
** Compare registers
** Compare : TC0 [80]
**
** Flip-flop registers
** Mode : TCTL2 [73]
** Contents :
** Enable - byte TickTimer_Enable(void);
** SetFreqHz - byte TickTimer_SetFreqHz(word Freq);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __TickTimer
#define __TickTimer
/* MODULE TickTimer. */
#include "Cpu.h"
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
#define TickTimer_SFHzMin 100 /* Lower bound of interval for method SetFreqHz */
#define TickTimer_SFHzMax 1000 /* Upper bound of interval for method SetFreqHz */
byte TickTimer_Enable(void);
/*
** ===================================================================
** Method : TickTimer_Enable (bean TimerInt)
**
** Description :
** Enable the bean - it starts the timer. Events may be
** generated ("DisableEvent"/"EnableEvent").
** Parameters : None
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ===================================================================
*/
byte TickTimer_SetFreqHz(word Freq);
/*
** ===================================================================
** Method : TickTimer_SetFreqHz (bean TimerInt)
**
** Description :
** This method sets the new frequency of the generated
** events. The frequency is expressed in Hz as a 16-bit
** unsigned integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Freq - Frequency to set [in Hz]
** (100 to 1000 Hz)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void TickTimer_Interrupt(void);
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : TickTimer_Interrupt (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void TickTimer_Init(void);
/*
** ===================================================================
** Method : TickTimer_Init (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/* END TickTimer. */
#endif /* ifndef __TickTimer */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : MC9S12C32_80
** Version : Bean 01.002, Driver 01.09, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 18:22
** Abstract :
** This bean "MC9S12C32_80" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** SetWaitMode - void Cpu_SetWaitMode(void);
** SetStopMode - void Cpu_SetStopMode(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#include "Cpu.h"
#include "Byte1.h"
#include "TickTimer.h"
#include "ButtonInterrupt.h"
extern void near _EntryPoint(void); /* Startup routine */
extern void near vPortTickInterrupt( void );
extern void near vPortYield( void );
extern void near vButtonPush( void );
typedef void (*near tIsrFunc)(void);
const tIsrFunc _vect[] @0xFF80 = { /* Interrupt table */
Cpu_Interrupt, /* 0 Default (unused) interrupt */
Cpu_Interrupt, /* 1 Default (unused) interrupt */
Cpu_Interrupt, /* 2 Default (unused) interrupt */
Cpu_Interrupt, /* 3 Default (unused) interrupt */
Cpu_Interrupt, /* 4 Default (unused) interrupt */
Cpu_Interrupt, /* 5 Default (unused) interrupt */
Cpu_Interrupt, /* 6 Default (unused) interrupt */
vButtonPush, /* 7 Default (unused) interrupt */
Cpu_Interrupt, /* 8 Default (unused) interrupt */
Cpu_Interrupt, /* 9 Default (unused) interrupt */
Cpu_Interrupt, /* 10 Default (unused) interrupt */
Cpu_Interrupt, /* 11 Default (unused) interrupt */
Cpu_Interrupt, /* 12 Default (unused) interrupt */
Cpu_Interrupt, /* 13 Default (unused) interrupt */
Cpu_Interrupt, /* 14 Default (unused) interrupt */
Cpu_Interrupt, /* 15 Default (unused) interrupt */
Cpu_Interrupt, /* 16 Default (unused) interrupt */
Cpu_Interrupt, /* 17 Default (unused) interrupt */
Cpu_Interrupt, /* 18 Default (unused) interrupt */
Cpu_Interrupt, /* 19 Default (unused) interrupt */
Cpu_Interrupt, /* 20 Default (unused) interrupt */
Cpu_Interrupt, /* 21 Default (unused) interrupt */
Cpu_Interrupt, /* 22 Default (unused) interrupt */
Cpu_Interrupt, /* 23 Default (unused) interrupt */
Cpu_Interrupt, /* 24 Default (unused) interrupt */
Cpu_Interrupt, /* 25 Default (unused) interrupt */
Cpu_Interrupt, /* 26 Default (unused) interrupt */
Cpu_Interrupt, /* 27 Default (unused) interrupt */
Cpu_Interrupt, /* 28 Default (unused) interrupt */
Cpu_Interrupt, /* 29 Default (unused) interrupt */
Cpu_Interrupt, /* 30 Default (unused) interrupt */
Cpu_Interrupt, /* 31 Default (unused) interrupt */
Cpu_Interrupt, /* 32 Default (unused) interrupt */
Cpu_Interrupt, /* 33 Default (unused) interrupt */
Cpu_Interrupt, /* 34 Default (unused) interrupt */
Cpu_Interrupt, /* 35 Default (unused) interrupt */
Cpu_Interrupt, /* 36 Default (unused) interrupt */
Cpu_Interrupt, /* 37 Default (unused) interrupt */
Cpu_Interrupt, /* 38 Default (unused) interrupt */
Cpu_Interrupt, /* 39 Default (unused) interrupt */
Cpu_Interrupt, /* 40 Default (unused) interrupt */
Cpu_Interrupt, /* 41 Default (unused) interrupt */
Cpu_Interrupt, /* 42 Default (unused) interrupt */
Cpu_Interrupt, /* 43 Default (unused) interrupt */
Cpu_Interrupt, /* 44 Default (unused) interrupt */
Cpu_Interrupt, /* 45 Default (unused) interrupt */
Cpu_Interrupt, /* 46 Default (unused) interrupt */
Cpu_Interrupt, /* 47 Default (unused) interrupt */
Cpu_Interrupt, /* 48 Default (unused) interrupt */
Cpu_Interrupt, /* 49 Default (unused) interrupt */
Cpu_Interrupt, /* 50 Default (unused) interrupt */
Cpu_Interrupt, /* 51 Default (unused) interrupt */
Cpu_Interrupt, /* 52 Default (unused) interrupt */
Cpu_Interrupt, /* 53 Default (unused) interrupt */
Cpu_Interrupt, /* 54 Default (unused) interrupt */
vPortTickInterrupt,
Cpu_Interrupt, /* 56 Default (unused) interrupt */
Cpu_Interrupt, /* 57 Default (unused) interrupt */
Cpu_Interrupt, /* 58 Default (unused) interrupt */
vPortYield, /* 59 Default (unused) interrupt */
Cpu_Interrupt, /* 60 Default (unused) interrupt */
Cpu_Interrupt, /* 61 Default (unused) interrupt */
Cpu_Interrupt, /* 62 Default (unused) interrupt */
_EntryPoint /* Reset vector */
};
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/