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Add FreeRTOS-Plus directory.
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Richard Barry
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6798 changed files with 134949 additions and 19 deletions
323
FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/startup_efm32.s
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FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/startup_efm32.s
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;/*************************************************************************//**
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; * @file: startup_efm32.s
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; * @purpose: CMSIS Cortex-M3 Core Device Startup File
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; * for the Energy Micro 'EFM32G' Device Series
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; * @version 1.0.2
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; * @date: 10. September 2009
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; *----------------------------------------------------------------------------
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; *
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; * Copyright (C) 2009 ARM Limited. All rights reserved.
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; *
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; * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
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; * processor based microcontrollers. This file can be freely distributed
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; * within development tools that are supporting such ARM based processors.
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; *
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; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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; *
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; ******************************************************************************/
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;
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; The modules in this file are included in the libraries, and may be replaced
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; by any user-defined modules that define the PUBLIC symbol _program_start or
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; a user defined start symbol.
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; To override the cstartup defined in the library, simply add your modified
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; version to the workbench project.
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;
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; The vector table is normally located at address 0.
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; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
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; The name "__vector_table" has special meaning for C-SPY:
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; it is where the SP start value is found, and the NVIC vector
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; table register (VTOR) is initialized to this address if != 0.
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;
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; Cortex-M version
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;
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MODULE ?cstartup
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;; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .intvec:CODE:NOROOT(2)
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EXTERN __iar_program_start
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EXTERN SystemInit
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PUBLIC __vector_table
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PUBLIC __vector_table_0x1c
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PUBLIC __Vectors
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PUBLIC __Vectors_End
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PUBLIC __Vectors_Size
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DATA
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__vector_table
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DCD sfe(CSTACK)
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DCD Reset_Handler
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DCD NMI_Handler
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DCD HardFault_Handler
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DCD MemManage_Handler
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DCD BusFault_Handler
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DCD UsageFault_Handler
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__vector_table_0x1c
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD vPortSVCHandler
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DCD DebugMon_Handler
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DCD 0
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DCD xPortPendSVHandler
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DCD xPortSysTickHandler
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; External Interrupts
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DCD DMA_IRQHandler ; 0: DMA Interrupt
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DCD GPIO_EVEN_IRQHandler ; 1: GPIO_EVEN Interrupt
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DCD TIMER0_IRQHandler ; 2: TIMER0 Interrupt
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DCD USART0_RX_IRQHandler ; 3: USART0_RX Interrupt
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DCD USART0_TX_IRQHandler ; 4: USART0_TX Interrupt
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DCD ACMP0_IRQHandler ; 5: ACMP0 Interrupt
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DCD ADC0_IRQHandler ; 6: ADC0 Interrupt
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DCD DAC0_IRQHandler ; 7: DAC0 Interrupt
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DCD I2C0_IRQHandler ; 8: I2C0 Interrupt
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DCD GPIO_ODD_IRQHandler ; 9: GPIO_ODD Interrupt
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DCD TIMER1_IRQHandler ; 10: TIMER1 Interrupt
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DCD TIMER2_IRQHandler ; 11: TIMER2 Interrupt
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DCD USART1_RX_IRQHandler ; 12: USART1_RX Interrupt
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DCD USART1_TX_IRQHandler ; 13: USART1_TX Interrupt
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DCD USART2_RX_IRQHandler ; 14: USART2_RX Interrupt
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DCD USART2_TX_IRQHandler ; 15: USART2_TX Interrupt
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DCD UART0_RX_IRQHandler ; 16: UART0_RX Interrupt
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DCD UART0_TX_IRQHandler ; 17: UART0_TX Interrupt
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DCD LEUART0_IRQHandler ; 18: LEUART0 Interrupt
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DCD LEUART1_IRQHandler ; 19: LEUART1 Interrupt
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DCD LETIMER0_IRQHandler ; 20: LETIMER0 Interrupt
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DCD PCNT0_IRQHandler ; 21: PCNT0 Interrupt
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DCD PCNT1_IRQHandler ; 22: PCNT1 Interrupt
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DCD PCNT2_IRQHandler ; 23: PCNT2 Interrupt
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DCD SYSTICCK_IRQHandler;DCD RTC_IRQHandler ; 24: RTC Interrupt
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DCD CMU_IRQHandler ; 25: CMU Interrupt
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DCD VCMP_IRQHandler ; 26: VCMP Interrupt
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DCD LCD_IRQHandler ; 27: LCD Interrupt
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DCD MSC_IRQHandler ; 28: MSC Interrupt
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DCD AES_IRQHandler ; 29: AES Interrupt
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__Vectors_End
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__Vectors EQU __vector_table
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__Vectors_Size EQU __Vectors_End - __Vectors
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Default interrupt handlers.
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;;
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THUMB
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PUBWEAK Reset_Handler
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SECTION .text:CODE:REORDER(2)
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Reset_Handler
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__iar_program_start
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BX R0
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PUBWEAK NMI_Handler
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SECTION .text:CODE:REORDER(1)
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NMI_Handler
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B NMI_Handler
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PUBWEAK HardFault_Handler
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SECTION .text:CODE:REORDER(1)
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HardFault_Handler
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B HardFault_Handler
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PUBWEAK MemManage_Handler
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SECTION .text:CODE:REORDER(1)
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MemManage_Handler
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B MemManage_Handler
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PUBWEAK BusFault_Handler
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SECTION .text:CODE:REORDER(1)
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BusFault_Handler
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B BusFault_Handler
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PUBWEAK UsageFault_Handler
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SECTION .text:CODE:REORDER(1)
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UsageFault_Handler
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B UsageFault_Handler
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PUBWEAK vPortSVCHandler
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SECTION .text:CODE:REORDER(1)
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vPortSVCHandler
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B vPortSVCHandler
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PUBWEAK DebugMon_Handler
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SECTION .text:CODE:REORDER(1)
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DebugMon_Handler
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B DebugMon_Handler
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PUBWEAK xPortPendSVHandler
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SECTION .text:CODE:REORDER(1)
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xPortPendSVHandler
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B xPortPendSVHandler
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PUBWEAK SYSTICCK_IRQHandler
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SECTION .text:CODE:REORDER(1)
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SYSTICCK_IRQHandler
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B SYSTICCK_IRQHandler
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; EFM32G specific interrupt handlers
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PUBWEAK DMA_IRQHandler
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SECTION .text:CODE:REORDER(1)
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DMA_IRQHandler
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B DMA_IRQHandler
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PUBWEAK GPIO_EVEN_IRQHandler
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SECTION .text:CODE:REORDER(1)
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GPIO_EVEN_IRQHandler
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B GPIO_EVEN_IRQHandler
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PUBWEAK TIMER0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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TIMER0_IRQHandler
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B TIMER0_IRQHandler
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PUBWEAK USART0_RX_IRQHandler
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SECTION .text:CODE:REORDER(1)
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USART0_RX_IRQHandler
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B USART0_RX_IRQHandler
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PUBWEAK USART0_TX_IRQHandler
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SECTION .text:CODE:REORDER(1)
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USART0_TX_IRQHandler
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B USART0_TX_IRQHandler
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PUBWEAK ACMP0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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ACMP0_IRQHandler
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B ACMP0_IRQHandler
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PUBWEAK ADC0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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ADC0_IRQHandler
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B ADC0_IRQHandler
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PUBWEAK DAC0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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DAC0_IRQHandler
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B DAC0_IRQHandler
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PUBWEAK I2C0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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I2C0_IRQHandler
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B I2C0_IRQHandler
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PUBWEAK GPIO_ODD_IRQHandler
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SECTION .text:CODE:REORDER(1)
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GPIO_ODD_IRQHandler
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B GPIO_ODD_IRQHandler
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PUBWEAK TIMER1_IRQHandler
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SECTION .text:CODE:REORDER(1)
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TIMER1_IRQHandler
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B TIMER1_IRQHandler
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PUBWEAK TIMER2_IRQHandler
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SECTION .text:CODE:REORDER(1)
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TIMER2_IRQHandler
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B TIMER2_IRQHandler
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PUBWEAK USART1_RX_IRQHandler
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SECTION .text:CODE:REORDER(1)
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USART1_RX_IRQHandler
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B USART1_RX_IRQHandler
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PUBWEAK USART1_TX_IRQHandler
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SECTION .text:CODE:REORDER(1)
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USART1_TX_IRQHandler
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B USART1_TX_IRQHandler
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PUBWEAK USART2_RX_IRQHandler
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SECTION .text:CODE:REORDER(1)
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USART2_RX_IRQHandler
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B USART2_RX_IRQHandler
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PUBWEAK USART2_TX_IRQHandler
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SECTION .text:CODE:REORDER(1)
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USART2_TX_IRQHandler
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B USART2_TX_IRQHandler
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PUBWEAK UART0_RX_IRQHandler
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SECTION .text:CODE:REORDER(1)
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UART0_RX_IRQHandler
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B UART0_RX_IRQHandler
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PUBWEAK UART0_TX_IRQHandler
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SECTION .text:CODE:REORDER(1)
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UART0_TX_IRQHandler
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B UART0_TX_IRQHandler
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PUBWEAK LEUART0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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LEUART0_IRQHandler
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B LEUART0_IRQHandler
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PUBWEAK LEUART1_IRQHandler
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SECTION .text:CODE:REORDER(1)
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LEUART1_IRQHandler
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B LEUART1_IRQHandler
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PUBWEAK LETIMER0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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LETIMER0_IRQHandler
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B LETIMER0_IRQHandler
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PUBWEAK PCNT0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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PCNT0_IRQHandler
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B PCNT0_IRQHandler
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PUBWEAK PCNT1_IRQHandler
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SECTION .text:CODE:REORDER(1)
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PCNT1_IRQHandler
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B PCNT1_IRQHandler
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PUBWEAK PCNT2_IRQHandler
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SECTION .text:CODE:REORDER(1)
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PCNT2_IRQHandler
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B PCNT2_IRQHandler
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PUBWEAK xPortSysTickHandler
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SECTION .text:CODE:REORDER(1)
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xPortSysTickHandler
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B xPortSysTickHandler
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PUBWEAK CMU_IRQHandler
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SECTION .text:CODE:REORDER(1)
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CMU_IRQHandler
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B CMU_IRQHandler
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PUBWEAK VCMP_IRQHandler
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SECTION .text:CODE:REORDER(1)
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VCMP_IRQHandler
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B VCMP_IRQHandler
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PUBWEAK LCD_IRQHandler
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SECTION .text:CODE:REORDER(1)
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LCD_IRQHandler
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B LCD_IRQHandler
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PUBWEAK MSC_IRQHandler
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SECTION .text:CODE:REORDER(1)
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MSC_IRQHandler
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B MSC_IRQHandler
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PUBWEAK AES_IRQHandler
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SECTION .text:CODE:REORDER(1)
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AES_IRQHandler
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B AES_IRQHandler
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END
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