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Add FreeRTOS-Plus directory.
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Richard Barry
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6798 changed files with 134949 additions and 19 deletions
6517
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/at91sam3u4/AT91SAM3U4.h
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6517
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/at91sam3u4/AT91SAM3U4.h
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/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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* ----------------------------------------------------------------------------
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* Copyright (c) 2008, Atmel Corporation
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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//------------------------------------------------------------------------------
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/// \unit
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/// !Purpose
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///
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/// Definition of AT91SAM3U4 characteristics and features
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///
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/// !Usage
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/// -# For ARM core feature, see "AT91SAM3U4 - ARM core features".
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/// -# For IP features, see "AT91SAM3U4 - IP features".
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/// -# For misc, see "AT91SAM3U4 - Misc".
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//------------------------------------------------------------------------------
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#ifndef CHIP_H
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#define CHIP_H
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//------------------------------------------------------------------------------
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// Headers
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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// Definitions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// \page "AT91SAM3U4 - ARM core features"
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/// This page lists several characteristics related to the ARM core
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///
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//ARM core features
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/// ARM core definition.
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#define cortexm3
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/// family definition.
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#define at91sam3u
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// \page "AT91SAM3U4 - IP features"
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/// This page lists several characteristics related to the embedded IP
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///
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//IP FEATURES
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// EFC GPNVM number
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#define CHIP_EFC_NUM_GPNVMS 3
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/// Indicates chip has an Enhanced EFC.
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#define CHIP_FLASH_EEFC
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// DMA channels number
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#define CHIP_DMA_CHANNEL_NUM 4
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// Indicate chip has a nandflash controller.
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#define CHIP_NAND_CTRL
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// \page "AT91SAM3U4 - Misc "
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/// This page lists misc features
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///
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//Misc
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//------------------------------------------------------------------------------
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#endif //#ifndef CHIP_H
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
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/*-Vector table start*/
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define symbol __ICFEDIT_vector_start__ = 0x00080000; /*Add for CMSIS*/
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF;
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define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000;
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define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF;
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define symbol __ICFEDIT_region_ROM0_start__ = 0x00080000;
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define symbol __ICFEDIT_region_ROM0_end__ = 0x0009FFFF;
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define symbol __ICFEDIT_region_ROM1_start__ = 0x00100000;
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define symbol __ICFEDIT_region_ROM1_end__ = 0x0011FFFF;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x800;
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define symbol __ICFEDIT_size_heap__ = 0x200;
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/*-Specials-*/
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/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/
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/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/
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/*-Exports-*/
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/*export symbol __ICFEDIT_region_RAM_VECT_start__;*/
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export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ /*Referenced for CMSIS*/
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/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/
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define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
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define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
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/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
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mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/
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define region ROM0_region = mem:[from __ICFEDIT_region_ROM0_start__ to __ICFEDIT_region_ROM0_end__];
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define region ROM1_region = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__];
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/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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/*place at start of ROM0_region { readonly section .vectors };*/ /*Referenced for CMSIS*/
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place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; /*Add for CMSIS*/
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place in ROM0_region { readonly };
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place in RAM0_region { readwrite, block CSTACK, block HEAP };
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/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
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/*-Vector table start*/
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define symbol __ICFEDIT_vector_start__ = 0x20000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF;
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define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000;
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define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x400;
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define symbol __ICFEDIT_size_heap__ = 0x200;
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/*-Exports-*/
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export symbol __ICFEDIT_vector_start__;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
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define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
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/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
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mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/
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/* define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { }; */
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors };
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place in RAM0_region { readonly };
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place in RAM1_region { readwrite, block CSTACK, block HEAP };
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