mirror of
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synced 2025-08-19 09:38:32 -04:00
Add FreeRTOS-Plus directory.
This commit is contained in:
parent
7bd5f21ad5
commit
f508a5f653
6798 changed files with 134949 additions and 19 deletions
6517
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/AT91SAM3U4.h
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6517
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/AT91SAM3U4.h
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// ---------------------------------------------------------
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// ATMEL Microcontroller Software Support - ROUSSET -
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// ---------------------------------------------------------
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// The software is delivered "AS IS" without warranty or
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||||
// condition of any kind, either express, implied or
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// statutory. This includes without limitation any warranty
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||||
// or condition with respect to merchantability or fitness
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// for any particular purpose, or against the infringements of
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// intellectual property rights of others.
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// ---------------------------------------------------------
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// File: at91sam3u-ek-flash.mac
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// User setup file for CSPY debugger.
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// ---------------------------------------------------------
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__var __mac_i;
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__var __mac_pt;
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/*********************************************************************
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*
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* execUserReset()
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*/
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execUserReset()
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{
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__message "------------------------------ execUserReset ---------------------------------";
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__message "-------------------------------Set PC Reset ----------------------------------";
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}
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/*********************************************************************
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*
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* execUserPreload()
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*/
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execUserPreload()
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{
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__message "------------------------------ execUserPreload ---------------------------------";
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__hwReset(0); //* Hardware Reset: CPU is automatically halted after the reset
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}
|
6517
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/at91sam3u4/AT91SAM3U4.h
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6517
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/at91sam3u4/AT91SAM3U4.h
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|||
/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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||||
* ----------------------------------------------------------------------------
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||||
* Copyright (c) 2008, Atmel Corporation
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||||
*
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* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
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||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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||||
* ----------------------------------------------------------------------------
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*/
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//------------------------------------------------------------------------------
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/// \unit
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/// !Purpose
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///
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/// Definition of AT91SAM3U4 characteristics and features
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///
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/// !Usage
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/// -# For ARM core feature, see "AT91SAM3U4 - ARM core features".
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/// -# For IP features, see "AT91SAM3U4 - IP features".
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/// -# For misc, see "AT91SAM3U4 - Misc".
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//------------------------------------------------------------------------------
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#ifndef CHIP_H
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#define CHIP_H
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//------------------------------------------------------------------------------
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// Headers
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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// Definitions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// \page "AT91SAM3U4 - ARM core features"
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/// This page lists several characteristics related to the ARM core
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///
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//ARM core features
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/// ARM core definition.
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#define cortexm3
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/// family definition.
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#define at91sam3u
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// \page "AT91SAM3U4 - IP features"
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/// This page lists several characteristics related to the embedded IP
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///
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//IP FEATURES
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// EFC GPNVM number
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#define CHIP_EFC_NUM_GPNVMS 3
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/// Indicates chip has an Enhanced EFC.
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#define CHIP_FLASH_EEFC
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// DMA channels number
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#define CHIP_DMA_CHANNEL_NUM 4
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// Indicate chip has a nandflash controller.
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#define CHIP_NAND_CTRL
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// \page "AT91SAM3U4 - Misc "
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/// This page lists misc features
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///
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//Misc
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//------------------------------------------------------------------------------
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#endif //#ifndef CHIP_H
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|
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@ -0,0 +1,47 @@
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
|
||||
/*-Vector table start*/
|
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define symbol __ICFEDIT_vector_start__ = 0x00080000; /*Add for CMSIS*/
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF;
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define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000;
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define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF;
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define symbol __ICFEDIT_region_ROM0_start__ = 0x00080000;
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define symbol __ICFEDIT_region_ROM0_end__ = 0x0009FFFF;
|
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define symbol __ICFEDIT_region_ROM1_start__ = 0x00100000;
|
||||
define symbol __ICFEDIT_region_ROM1_end__ = 0x0011FFFF;
|
||||
/*-Sizes-*/
|
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define symbol __ICFEDIT_size_cstack__ = 0x800;
|
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define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/*-Specials-*/
|
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/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/
|
||||
/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/
|
||||
/*-Exports-*/
|
||||
/*export symbol __ICFEDIT_region_RAM_VECT_start__;*/
|
||||
export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ /*Referenced for CMSIS*/
|
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/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/
|
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define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
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define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
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/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
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mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/
|
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define region ROM0_region = mem:[from __ICFEDIT_region_ROM0_start__ to __ICFEDIT_region_ROM0_end__];
|
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define region ROM1_region = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__];
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||||
|
||||
/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/
|
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
/*place at start of ROM0_region { readonly section .vectors };*/ /*Referenced for CMSIS*/
|
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place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; /*Add for CMSIS*/
|
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place in ROM0_region { readonly };
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place in RAM0_region { readwrite, block CSTACK, block HEAP };
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/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/
|
|
@ -0,0 +1,33 @@
|
|||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
|
||||
/*-Vector table start*/
|
||||
define symbol __ICFEDIT_vector_start__ = 0x20000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF;
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define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000;
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define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF;
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||||
/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x400;
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define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/*-Exports-*/
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||||
export symbol __ICFEDIT_vector_start__;
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||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
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||||
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
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||||
/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
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||||
mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/
|
||||
|
||||
/* define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { }; */
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
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||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors };
|
||||
place in RAM0_region { readonly };
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||||
place in RAM1_region { readwrite, block CSTACK, block HEAP };
|
747
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/board.h
Normal file
747
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/board.h
Normal file
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@ -0,0 +1,747 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2008, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \dir
|
||||
/// !Purpose
|
||||
///
|
||||
/// Definition and functions for using AT91SAM3UE-related features, such
|
||||
/// has PIO pins, memories, etc.
|
||||
///
|
||||
/// !Usage
|
||||
/// -# The code for booting the board is provided by board_cstartup.S and
|
||||
/// board_lowlevel.c.
|
||||
/// -# For using board PIOs, board characteristics (clock, etc.) and external
|
||||
/// components, see board.h.
|
||||
/// -# For manipulating memories (remapping, SDRAM, etc.), see board_memories.h.
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \unit
|
||||
/// !Purpose
|
||||
///
|
||||
/// Definition of AT91SAM3UE-EK characteristics, AT91SAM3UE-dependant PIOs and
|
||||
/// external components interfacing.
|
||||
///
|
||||
/// !Usage
|
||||
/// -# For operating frequency information, see "SAM3UE-EK - Operating frequencies".
|
||||
/// -# For using portable PIO definitions, see "SAM3UE-EK - PIO definitions".
|
||||
/// -# Several USB definitions are included here (see "SAM3UE-EK - USB device").
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Headers
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#if defined(at91sam3u4)
|
||||
#include "at91sam3u4/chip.h"
|
||||
#include "at91sam3u4/AT91SAM3U4.h"
|
||||
#else
|
||||
#error Board does not support the specified chip.
|
||||
#endif
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Definitions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \page "SAM3UE-EK - Board Description"
|
||||
/// This page lists several definition related to the board description.
|
||||
///
|
||||
/// !Definitions
|
||||
/// - BOARD_NAME
|
||||
|
||||
/// Name of the board.
|
||||
#define BOARD_NAME "AT91SAM3U-EK"
|
||||
/// Board definition.
|
||||
#define at91sam3uek
|
||||
/// Family definition (already defined).
|
||||
#define at91sam3u
|
||||
/// Core definition
|
||||
#define cortexm3
|
||||
// Chip type
|
||||
//#define fpgasimulation
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#if defined(fpgasimulation)
|
||||
#define PMC_BY_HARD
|
||||
#endif
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \page "SAM3UE-EK - Operating frequencies"
|
||||
/// This page lists several definition related to the board operating frequency
|
||||
/// (when using the initialization done by board_lowlevel.c).
|
||||
///
|
||||
/// !Definitions
|
||||
/// - BOARD_MAINOSC
|
||||
/// - BOARD_MCK
|
||||
|
||||
/// Frequency of the board main oscillator.
|
||||
#define BOARD_MAINOSC 12000000
|
||||
|
||||
/// Master clock frequency (when using board_lowlevel.c).
|
||||
#if !defined(fpgasimulation)
|
||||
#define BOARD_MCK 48000000
|
||||
#else
|
||||
#define BOARD_MCK 22579200
|
||||
#endif
|
||||
|
||||
#if defined (fpgasimulation)
|
||||
//#define BOARD_ConfigureSdram(...) { }
|
||||
#endif // fpgasimulation
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// ADC
|
||||
//------------------------------------------------------------------------------
|
||||
/// ADC clock frequency, at 10-bit resolution (in Hz)
|
||||
#define ADC_MAX_CK_10BIT 5000000
|
||||
/// Startup time max, return from Idle mode (in µs)
|
||||
#define ADC_STARTUP_TIME_MAX 15
|
||||
/// Track and hold Acquisition Time min (in ns)
|
||||
#define ADC_TRACK_HOLD_TIME_MIN 1200
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \page "SAM3UE-EK - USB device"
|
||||
/// This page lists constants describing several characteristics (controller
|
||||
/// type, D+ pull-up type, etc.) of the USB device controller of the chip/board.
|
||||
///
|
||||
/// !Constants
|
||||
/// - BOARD_USB_UDP
|
||||
/// - BOARD_USB_PULLUP_EXTERNAL
|
||||
/// - BOARD_USB_NUMENDPOINTS
|
||||
/// - BOARD_USB_ENDPOINTS_MAXPACKETSIZE
|
||||
/// - BOARD_USB_ENDPOINTS_BANKS
|
||||
|
||||
/// Chip has a UDP controller.
|
||||
#define BOARD_USB_UDPHS
|
||||
|
||||
/// Indicates the D+ pull-up is external.
|
||||
#define BOARD_USB_PULLUP_INTERNAL
|
||||
|
||||
/// Number of endpoints in the USB controller.
|
||||
#define BOARD_USB_NUMENDPOINTS 7
|
||||
|
||||
/// Returns the maximum packet size of the given endpoint.
|
||||
#define BOARD_USB_ENDPOINTS_MAXPACKETSIZE(i) (((i == 0)||(i == 3)||(i == 4)) ? 64 :\
|
||||
(((i == 1) || (i == 2)) ? 512 : 1024))
|
||||
|
||||
/// Returns the number of FIFO banks for the given endpoint.
|
||||
#define BOARD_USB_ENDPOINTS_BANKS(i) ((i == 0) ? 1 : ((i == 1) || (i == 2)) ? 2 : 3)
|
||||
|
||||
/// USB attributes configuration descriptor (bus or self powered, remote wakeup)
|
||||
#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP
|
||||
//#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \page "SAM3UE-EK - PIO definitions"
|
||||
/// This pages lists all the pio definitions contained in board.h. The constants
|
||||
/// are named using the following convention: PIN_* for a constant which defines
|
||||
/// a single Pin instance (but may include several PIOs sharing the same
|
||||
/// controller), and PINS_* for a list of Pin instances.
|
||||
///
|
||||
/// !ADC
|
||||
/// - PIN_ADC0_AD0
|
||||
/// - PIN_ADC0_AD1
|
||||
/// - PIN_ADC0_AD2
|
||||
/// - PIN_ADC0_AD3
|
||||
/// - PIN_ADC0_AD4
|
||||
/// - PIN_ADC0_AD5
|
||||
/// - PIN_ADC0_AD6
|
||||
/// - PIN_ADC0_AD7
|
||||
/// - PINS_ADC0
|
||||
///
|
||||
/// !CAN
|
||||
/// - PIN_CAN_TRANSCEIVER_RS
|
||||
/// - PIN_CAN1_TRANSCEIVER_TXD
|
||||
/// - PIN_CAN1_TRANSCEIVER_RXD
|
||||
/// - PIN_CAN2_TRANSCEIVER_TXD
|
||||
/// - PIN_CAN2_TRANSCEIVER_RXD
|
||||
/// - PINS_CAN_TRANSCEIVER_TXD
|
||||
/// - PINS_CAN_TRANSCEIVER_RXD
|
||||
///
|
||||
/// !DBGU
|
||||
/// - PINS_DBGU
|
||||
///
|
||||
/// !Joystick buttons
|
||||
/// - PIN_JOYSTICK_UP
|
||||
/// - PIN_JOYSTICK_DOWN
|
||||
/// - PIN_JOYSTICK_LEFT
|
||||
/// - PIN_JOYSTICK_RIGHT
|
||||
/// - PIN_JOYSTICK_LCLIC, PIN_JOYSTICK_PUSH
|
||||
/// - PINS_JOYSTICK_MOVE, PINS_JOYSTICK_CLIC, PINS_JOYSTICK
|
||||
/// - JOYSTICK_UP
|
||||
/// - JOYSTICK_DOWN
|
||||
/// - JOYSTICK_LEFT
|
||||
/// - JOYSTICK_RIGHT
|
||||
/// - JOYSTICK_LCLIC, JOYSTICK_PUSH
|
||||
///
|
||||
/// !EBI
|
||||
/// - PIN_EBI_DATA_BUS
|
||||
/// - PIN_EBI_NCS0
|
||||
/// - PIN_EBI_NRD
|
||||
/// - PIN_EBI_NWE
|
||||
/// - PIN_EBI_ADDR_BUS
|
||||
/// - PIN_EBI_PSRAM_NBS
|
||||
/// - PIN_EBI_A1
|
||||
/// - PIN_EBI_LCD_RS
|
||||
///
|
||||
/// !LEDs
|
||||
/// - PIN_LED_DS1
|
||||
/// - PIN_LED_DS2
|
||||
/// - PIN_LED_DS3
|
||||
/// - PIN_LED_DS4
|
||||
/// - PINS_LEDS
|
||||
/// - LED_DS1
|
||||
/// - LED_DS2
|
||||
/// - LED_DS3
|
||||
/// - LED_DS4
|
||||
///
|
||||
/// !MCI
|
||||
/// - PINS_MCI
|
||||
///
|
||||
/// !Push buttons
|
||||
/// - PIN_PUSHBUTTON_1
|
||||
/// - PIN_PUSHBUTTON_2
|
||||
/// - PIN_PUSHBUTTON_3
|
||||
/// - PIN_PUSHBUTTON_4
|
||||
/// - PINS_PUSHBUTTONS
|
||||
/// - PUSHBUTTON_BP1
|
||||
/// - PUSHBUTTON_BP2
|
||||
/// - PUSHBUTTON_BP3
|
||||
/// - PUSHBUTTON_BP4
|
||||
///
|
||||
/// !PWMC
|
||||
/// - PIN_PWMC_PWM0
|
||||
/// - PIN_PWMC_PWM1
|
||||
/// - PIN_PWMC_PWM2
|
||||
/// - PIN_PWMC_PWM3
|
||||
/// - PIN_PWMC_PWM4
|
||||
/// - PIN_PWMC_PWM5
|
||||
/// - PIN_PWMC_PWM6
|
||||
/// - PIN_PWMC_PWM7
|
||||
/// - PIN_PWM_LED0
|
||||
/// - PIN_PWM_LED1
|
||||
/// - CHANNEL_PWM_LED0
|
||||
/// - CHANNEL_PWM_LED1
|
||||
///
|
||||
/// !SPI0
|
||||
/// - PIN_SPI0_MISO
|
||||
/// - PIN_SPI0_MOSI
|
||||
/// - PIN_SPI0_SPCK
|
||||
/// - PINS_SPI0
|
||||
/// - PIN_SPI0_NPCS3
|
||||
///
|
||||
/// !SPI1
|
||||
/// - PIN_SPI1_MISO
|
||||
/// - PIN_SPI1_MOSI
|
||||
/// - PIN_SPI1_SPCK
|
||||
/// - PINS_SPI1
|
||||
/// - PIN_SPI1_NPCS3
|
||||
///
|
||||
/// ! SSC
|
||||
/// - PIN_SSC_TD
|
||||
/// - PIN_SSC_TK
|
||||
/// - PIN_SSC_TF
|
||||
/// - PINS_SSC_CODEC
|
||||
///
|
||||
/// ! PCK0
|
||||
/// - PIN_PCK0
|
||||
///
|
||||
/// !TWI
|
||||
/// - PIN_TWI_TWD0
|
||||
/// - PIN_TWI_TWCK0
|
||||
/// - PINS_TWI
|
||||
///
|
||||
/// !USART0
|
||||
/// - PIN_USART0_RXD
|
||||
/// - PIN_USART0_TXD
|
||||
/// - PIN_USART0_CTS
|
||||
/// - PIN_USART0_RTS
|
||||
/// - PIN_USART0_SCK
|
||||
///
|
||||
/// !USB
|
||||
/// - PIN_USB_PULLUP
|
||||
///
|
||||
|
||||
/// ADC_AD0 pin definition.
|
||||
#define PIN_ADC0_AD0 {1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD1 pin definition.
|
||||
#define PIN_ADC0_AD1 {1 << 30, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD2 pin definition.
|
||||
#define PIN_ADC0_AD2 {1 << 3, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD3 pin definition.
|
||||
#define PIN_ADC0_AD3 {1 << 4, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD4 pin definition.
|
||||
#define PIN_ADC0_AD4 {1 << 15, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD5 pin definition.
|
||||
#define PIN_ADC0_AD5 {1 << 16, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD6 pin definition.
|
||||
#define PIN_ADC0_AD6 {1 << 17, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD7 pin definition.
|
||||
#define PIN_ADC0_AD7 {1 << 18, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
|
||||
/// Pins ADC
|
||||
#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7
|
||||
|
||||
/// CAN Definition
|
||||
/// RS: Select input for high speed mode or silent mode
|
||||
//#define PIN_CAN_TRANSCEIVER_RS {1<<23, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
//
|
||||
///// TXD: Transmit data input
|
||||
//#define PIN_CAN1_TRANSCEIVER_TXD {1<<27, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
///// RXD: Receive data output
|
||||
//#define PIN_CAN1_TRANSCEIVER_RXD {1<<26, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/// TXD: Transmit data input
|
||||
//#define PIN_CAN2_TRANSCEIVER_TXD {1<<29, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
///// RXD: Receive data output
|
||||
//#define PIN_CAN2_TRANSCEIVER_RXD {1<<28, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
///// TXD pins
|
||||
//#define PINS_CAN_TRANSCEIVER_TXD PIN_CAN1_TRANSCEIVER_TXD, PIN_CAN2_TRANSCEIVER_TXD
|
||||
///// RXD pins
|
||||
//#define PINS_CAN_TRANSCEIVER_RXD PIN_CAN1_TRANSCEIVER_RXD, PIN_CAN2_TRANSCEIVER_RXD
|
||||
|
||||
/// DBGU pins (DTXD and DRXD) definitions, PA11,12.
|
||||
#define PINS_DBGU {0x00001800, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
|
||||
/// EBI
|
||||
#define PIN_EBI_DATA_BUS {0xfe01fe00, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}, \
|
||||
{1 << 6, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}
|
||||
#define PIN_EBI_NCS0 {1 << 20, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NRD {1 << 19, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NWE {1 << 23, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_PSRAM_ADDR_BUS {0x3f00fff, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_PSRAM_NBS {1 << 7, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \
|
||||
{1 << 15, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_A1 {1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}
|
||||
|
||||
#define PIN_EBI_NCS2 {1 << 16, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_LCD_RS {1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}
|
||||
|
||||
|
||||
/// LED #0 pin definition.
|
||||
#define PIN_LED_0 {1 << 0, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
/// LED #1 pin definition.
|
||||
#define PIN_LED_1 {1 << 2, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/// LED #2 pin definition.
|
||||
#define PIN_LED_2 {1 << 1, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/// List of all LEDs definitions.
|
||||
#define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2
|
||||
|
||||
///// MCI pins definition.
|
||||
#define PINS_MCI {0x1f8, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}, \
|
||||
{1 << 3, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
|
||||
/// MCI pin Card Detect
|
||||
#define PIN_MCI_CD \
|
||||
{AT91C_PIO_PA25, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
|
||||
/// Push button #0 definition.
|
||||
#define PIN_PUSHBUTTON_1 {1 << 18, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEGLITCH | PIO_PULLUP}
|
||||
/// Push button #1 definition.
|
||||
#define PIN_PUSHBUTTON_2 {1 << 19, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEGLITCH | PIO_PULLUP}
|
||||
/// Push button #2 definition
|
||||
/// List of all push button definitions.
|
||||
#define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2
|
||||
|
||||
/// Push button #1 index.
|
||||
#define PUSHBUTTON_BP1 0
|
||||
/// Push button #2 index.
|
||||
#define PUSHBUTTON_BP2 1
|
||||
|
||||
/// Simulated joystick LEFT index.
|
||||
#define JOYSTICK_LEFT 0
|
||||
/// Simulated joystick RIGHT index.
|
||||
#define JOYSTICK_RIGHT 1
|
||||
|
||||
/// SPI0 MISO pin definition.
|
||||
#define PIN_SPI0_MISO {1 << 13, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/// SPI0 MOSI pin definition.
|
||||
#define PIN_SPI0_MOSI {1 << 14, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/// SPI0 SPCK pin definition.
|
||||
#define PIN_SPI0_SPCK {1 << 15, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/// SPI0 chip select 2 pin definition.
|
||||
//#define PIN_SPI0_NPCS2_PC14 {1 << 14, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_SPI0_NPCS2_PC14 {1 << 14, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_OUTPUT_0, PIO_PULLUP}
|
||||
/// List of SPI0 pin definitions (MISO, MOSI & SPCK).
|
||||
#define PINS_SPI0 PIN_SPI0_MISO, PIN_SPI0_MOSI, PIN_SPI0_SPCK
|
||||
|
||||
/// SSC pins definition.
|
||||
#define PIN_SSC_TD {0x1 << 26, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_SSC_TK {0x1 << 28, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_SSC_TF {0x1 << 30, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF
|
||||
|
||||
/// PCK0
|
||||
#define PIN_PCK0 {0x1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
|
||||
/// TWI pins definition.
|
||||
#define TWI_V3XX
|
||||
#define PIN_TWI_TWD0 {0x1 << 9, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_TWI_TWCK0 {0x1 << 10, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0
|
||||
#define PIN_TWI_TWD1 {0x1 << 24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_TWI_TWCK1 {0x1 << 25, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1
|
||||
|
||||
/// USART0
|
||||
#define PIN_USART0_RXD {0x1 << 19, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_TXD {0x1 << 18, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_CTS {0x1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_RTS {0x1 << 7, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_SCK {0x1 << 17, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
|
||||
/// USART1
|
||||
#define PIN_USART1_RXD {0x1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART1_TXD {0x1 << 20, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART1_CTS {0x1 << 23, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_USART1_RTS {0x1 << 22, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_USART1_SCK {0x1 << 24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
|
||||
/// USB VBus monitoring pin definition.
|
||||
#define PIN_USB_VBUS {1 << 31, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \page "SAM3UE-EK - External components"
|
||||
/// This page lists the definitions related to external on-board components
|
||||
/// located in the board.h file for the AT91SAM3UE-EK.
|
||||
///
|
||||
/// !AT45 Dataflash Card
|
||||
/// - BOARD_AT45_A_SPI_BASE
|
||||
/// - BOARD_AT45_A_SPI_ID
|
||||
/// - BOARD_AT45_A_SPI_PINS
|
||||
/// - BOARD_AT45_A_SPI
|
||||
/// - BOARD_AT45_A_NPCS
|
||||
/// - BOARD_AT45_A_NPCS_PIN
|
||||
///
|
||||
/// !AT45 Dataflash (serial onboard DataFlash)
|
||||
/// - BOARD_AT45_B_SPI_BASE
|
||||
/// - BOARD_AT45_B_SPI_ID
|
||||
/// - BOARD_AT45_B_SPI_PINS
|
||||
/// - BOARD_AT45_B_SPI
|
||||
/// - BOARD_AT45_B_NPCS
|
||||
/// - BOARD_AT45_B_NPCS_PIN
|
||||
///
|
||||
/// !AT26 Serial Flash
|
||||
/// - BOARD_AT26_A_SPI_BASE
|
||||
/// - BOARD_AT26_A_SPI_ID
|
||||
/// - BOARD_AT26_A_SPI_PINS
|
||||
/// - BOARD_AT26_A_SPI
|
||||
/// - BOARD_AT26_A_NPCS
|
||||
/// - BOARD_AT26_A_NPCS_PIN
|
||||
///
|
||||
/// !SD Card
|
||||
/// - MCI2_INTERFACE
|
||||
/// - BOARD_SD_MCI_BASE
|
||||
/// - BOARD_SD_MCI_ID
|
||||
/// - BOARD_SD_PINS
|
||||
/// - BOARD_SD_SLOT
|
||||
///
|
||||
/// !PSRAM
|
||||
/// - BOARD_PSRAM_PINS
|
||||
/// - BOARD_LCD_PINS
|
||||
|
||||
/// Base address of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_A_SPI_BASE AT91C_BASE_SPI0
|
||||
///// Identifier of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_A_SPI_ID AT91C_ID_SPI0
|
||||
///// Pins of the SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_A_SPI_PINS PINS_SPI0
|
||||
///// Dataflahs SPI number.
|
||||
//#define BOARD_AT45_A_SPI 0
|
||||
///// Chip select connected to the dataflash.
|
||||
//#define BOARD_AT45_A_NPCS 3
|
||||
///// Chip select pin connected to the dataflash.
|
||||
//#define BOARD_AT45_A_NPCS_PIN PIN_SPI0_NPCS3
|
||||
|
||||
/// Base address of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_B_SPI_BASE AT91C_BASE_SPI1
|
||||
///// Identifier of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_B_SPI_ID AT91C_ID_SPI1
|
||||
///// Pins of the SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_B_SPI_PINS PINS_SPI1
|
||||
///// Dataflahs SPI number.
|
||||
//#define BOARD_AT45_B_SPI 1
|
||||
///// Chip select connected to the dataflash.
|
||||
//#define BOARD_AT45_B_NPCS 3
|
||||
///// Chip select pin connected to the dataflash.
|
||||
//#define BOARD_AT45_B_NPCS_PIN PIN_SPI1_NPCS3
|
||||
|
||||
/// Base address of SPI peripheral connected to the serialflash.
|
||||
//#define BOARD_AT26_A_SPI_BASE AT91C_BASE_SPI0
|
||||
///// Identifier of SPI peripheral connected to the serialflash.
|
||||
//#define BOARD_AT26_A_SPI_ID AT91C_ID_SPI0
|
||||
///// Pins of the SPI peripheral connected to the serialflash.
|
||||
//#define BOARD_AT26_A_SPI_PINS PINS_SPI0
|
||||
///// Serialflash SPI number.
|
||||
//#define BOARD_AT26_A_SPI 0
|
||||
///// Chip select connected to the serialflash.
|
||||
//#define BOARD_AT26_A_NPCS 3
|
||||
///// Chip select pin connected to the serialflash.
|
||||
//#define BOARD_AT26_A_NPCS_PIN PIN_SPI0_NPCS3
|
||||
|
||||
/// HS MCI interface
|
||||
#define MCI2_INTERFACE
|
||||
/// Base address of the MCI peripheral connected to the SD card.
|
||||
#define BOARD_SD_MCI_BASE AT91C_BASE_MCI0//AT91C_BASE_MCI
|
||||
///// Peripheral identifier of the MCI connected to the SD card.
|
||||
#define BOARD_SD_MCI_ID AT91C_ID_MCI0 //AT91C_ID_MCI
|
||||
///// MCI pins that shall be configured to access the SD card.
|
||||
#define BOARD_SD_PINS PINS_MCI
|
||||
///// MCI slot to which the SD card is connected to.
|
||||
#define BOARD_SD_SLOT MCI_SD_SLOTA
|
||||
///// MCI Card Detect pin.
|
||||
#define BOARD_SD_PIN_CD PIN_MCI_CD
|
||||
|
||||
#define BOARD_PSRAM_PINS PIN_EBI_DATA_BUS, PIN_EBI_NCS0, PIN_EBI_NRD, PIN_EBI_NWE, \
|
||||
PIN_EBI_PSRAM_ADDR_BUS, PIN_EBI_PSRAM_NBS, PIN_EBI_A1
|
||||
|
||||
/// Indicates board has an HX8347 external component to manage LCD.
|
||||
#define BOARD_LCD_HX8347
|
||||
|
||||
/// LCD pins definition.
|
||||
#define BOARD_LCD_PINS PIN_EBI_DATA_BUS, PIN_EBI_LCD_RS, PIN_EBI_NRD, PIN_EBI_NWE, \
|
||||
PIN_EBI_NCS2
|
||||
/// Backlight pin definition.
|
||||
#define BOARD_BACKLIGHT_PIN {1 << 19, AT91C_BASE_PIOC, AT91C_ID_PIOC, \
|
||||
PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
/// Define HX8347 base address.
|
||||
#define BOARD_LCD_BASE 0x62000000
|
||||
/// Define HX8347 register select signal.
|
||||
#define BOARD_LCD_RS (1 << 1)
|
||||
/// Display width in pixels.
|
||||
#define BOARD_LCD_WIDTH 240
|
||||
/// Display height in pixels.
|
||||
#define BOARD_LCD_HEIGHT 320
|
||||
|
||||
/// Indicates board has an ADS7843 external component to manage Touch Screen
|
||||
#define BOARD_TSC_ADS7843
|
||||
|
||||
/// Touchscreen controller IRQ pin definition.
|
||||
#define PIN_TCS_IRQ {AT91C_PIO_PA24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
/// Touchscreen controller Busy pin definition.
|
||||
#define PIN_TCS_BUSY {AT91C_PIO_PA2, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
|
||||
/// Base address of SPI peripheral connected to the touchscreen controller.
|
||||
#define BOARD_TSC_SPI_BASE AT91C_BASE_SPI0
|
||||
/// Identifier of SPI peripheral connected to the touchscreen controller.
|
||||
#define BOARD_TSC_SPI_ID AT91C_ID_SPI0
|
||||
/// Pins of the SPI peripheral connected to the touchscreen controller.
|
||||
#define BOARD_TSC_SPI_PINS PINS_SPI0
|
||||
/// Chip select connected to the touchscreen controller.
|
||||
#define BOARD_TSC_NPCS 2//2
|
||||
/// Chip select pin connected to the touchscreen controller.
|
||||
#define BOARD_TSC_NPCS_PIN PIN_SPI0_NPCS2_PC14
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \page "SAM3UE-EK - Memories"
|
||||
/// This page lists definitions related to internal & external on-board memories.
|
||||
///
|
||||
/// !Embedded Flash
|
||||
/// - BOARD_FLASH_EFC
|
||||
|
||||
/// Internal SRAM address
|
||||
#define AT91C_ISRAM AT91C_IRAM
|
||||
#define AT91C_ISRAM_SIZE AT91C_IRAM_SIZE
|
||||
|
||||
#define AT91C_IFLASH (0x80000)
|
||||
#define AT91C_IFLASH_SIZE (0x20000)
|
||||
#define AT91C_IFLASH_PAGE_SIZE (256) // Internal FLASH 0 Page Size: 256 bytes
|
||||
#define AT91C_IFLASH_NB_OF_PAGES (512) // Internal FLASH 0 Number of Pages: 512
|
||||
#define AT91C_IFLASH_LOCK_REGION_SIZE (8192) // Internal FLASH 0 Lock Region Size: 8 Kbytes
|
||||
#define AT91C_IFLASH_NB_OF_LOCK_BITS (16) // Internal FLASH 0 Number of Lock Bits: 32
|
||||
#if 0
|
||||
#define AT91C_IFLASH1 (0x100000)
|
||||
#define AT91C_IFLASH1_SIZE (0x20000)
|
||||
#define AT91C_IFLASH1_PAGE_SIZE (256) // Internal FLASH 1 Page Size: 256 bytes
|
||||
#define AT91C_IFLASH1_NB_OF_PAGES (512) // Internal FLASH 1 Number of Pages: 512
|
||||
#define AT91C_IFLASH1_LOCK_REGION_SIZE (8192) // Internal FLASH 1 Lock Region Size: 8 Kbytes
|
||||
#define AT91C_IFLASH1_NB_OF_LOCK_BITS (16) // Internal FLASH 1 Number of Lock Bits: 32
|
||||
#endif
|
||||
/// Indicates chip has an EFC.
|
||||
#define AT91C_BASE_EFC AT91C_BASE_EFC0
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \page "SAM3UE-EK - External components"
|
||||
/// This page lists the definitions related to external on-board components
|
||||
/// located in the board.h file for the SAM3UE-EK.
|
||||
///
|
||||
/// !ISO7816
|
||||
/// - PIN_SMARTCARD_CONNECT
|
||||
/// - PIN_ISO7816_RSTMC
|
||||
/// - PINS_ISO7816
|
||||
|
||||
/// Smartcard detection pin
|
||||
//#define PIN_SMARTCARD_CONNECT {1 << 5, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
/// PIN used for reset the smartcard
|
||||
//#define PIN_ISO7816_RSTMC {1 << 7, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
/// Pins used for connect the smartcard
|
||||
//#define PINS_ISO7816 PIN_USART0_TXD, PIN_USART0_SCK, PIN_ISO7816_RSTMC
|
||||
|
||||
/// Dma channel number
|
||||
#define BOARD_MCI_DMA_CHANNEL 0
|
||||
/// MCI0 DMA hardware handshaking ID
|
||||
#define DMA_HW_SRC_REQ_ID_MCI0 AT91C_HDMA_SRC_PER_0
|
||||
#define DMA_HW_DEST_REQ_ID_MCI0 AT91C_HDMA_DST_PER_0
|
||||
/// MCI1 DMA hardware handshaking ID
|
||||
#define DMA_HW_SRC_REQ_ID_MCI1 AT91C_HDMA_SRC_PER_13
|
||||
#define DMA_HW_DEST_REQ_ID_MCI1 AT91C_HDMA_DST_PER_13
|
||||
/// SD DMA hardware handshaking ID
|
||||
#define BOARD_SD_DMA_HW_SRC_REQ_ID DMA_HW_SRC_REQ_ID_MCI0
|
||||
#define BOARD_SD_DMA_HW_DEST_REQ_ID DMA_HW_DEST_REQ_ID_MCI0
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \page "SAM3UE-EK - Individual chip definition"
|
||||
/// This page lists the definitions related to different chip's definition
|
||||
/// located in the board.h file for the SAM3UE-EK.
|
||||
|
||||
/// DBGU
|
||||
#define BOARD_DBGU_ID AT91C_ID_DBGU
|
||||
|
||||
/// Rtc
|
||||
#define BOARD_RTC_ID AT91C_ID_RTC
|
||||
|
||||
/// Twi eeprom
|
||||
#define BOARD_ID_TWI_EEPROM AT91C_ID_TWI1
|
||||
#define BOARD_BASE_TWI_EEPROM AT91C_BASE_TWI1
|
||||
#define BOARD_PINS_TWI_EEPROM PINS_TWI1
|
||||
|
||||
/// USART
|
||||
#define BOARD_PIN_USART_RXD PIN_USART1_RXD
|
||||
#define BOARD_PIN_USART_TXD PIN_USART1_TXD
|
||||
#define BOARD_PIN_USART_CTS PIN_USART1_CTS
|
||||
#define BOARD_PIN_USART_RTS PIN_USART1_RTS
|
||||
#define BOARD_USART_BASE AT91C_BASE_US1
|
||||
#define BOARD_ID_USART AT91C_ID_US1
|
||||
|
||||
/// Interrupt source
|
||||
typedef enum IRQn
|
||||
{
|
||||
/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/
|
||||
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
|
||||
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
|
||||
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
|
||||
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
|
||||
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
|
||||
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
|
||||
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
|
||||
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
|
||||
|
||||
/****** AT91SAM3U4 specific Interrupt Numbers *********************************************************/
|
||||
IROn_SUPC = AT91C_ID_SUPC , // SUPPLY CONTROLLER
|
||||
IROn_RSTC = AT91C_ID_RSTC , // RESET CONTROLLER
|
||||
IROn_RTC = AT91C_ID_RTC , // REAL TIME CLOCK
|
||||
IROn_RTT = AT91C_ID_RTT , // REAL TIME TIMER
|
||||
IROn_WDG = AT91C_ID_WDG , // WATCHDOG TIMER
|
||||
IROn_PMC = AT91C_ID_PMC , // PMC
|
||||
IROn_EFC0 = AT91C_ID_EFC0 , // EFC0
|
||||
IROn_EFC1 = AT91C_ID_EFC1 , // EFC1
|
||||
IROn_DBGU = AT91C_ID_DBGU , // DBGU
|
||||
IROn_HSMC4 = AT91C_ID_HSMC4, // HSMC4
|
||||
IROn_PIOA = AT91C_ID_PIOA , // Parallel IO Controller A
|
||||
IROn_PIOB = AT91C_ID_PIOB , // Parallel IO Controller B
|
||||
IROn_PIOC = AT91C_ID_PIOC , // Parallel IO Controller C
|
||||
IROn_US0 = AT91C_ID_US0 , // USART 0
|
||||
IROn_US1 = AT91C_ID_US1 , // USART 1
|
||||
IROn_US2 = AT91C_ID_US2 , // USART 2
|
||||
IROn_US3 = AT91C_ID_US3 , // USART 3
|
||||
IROn_MCI0 = AT91C_ID_MCI0 , // Multimedia Card Interface
|
||||
IROn_TWI0 = AT91C_ID_TWI0 , // TWI 0
|
||||
IROn_TWI1 = AT91C_ID_TWI1 , // TWI 1
|
||||
IROn_SPI0 = AT91C_ID_SPI0 , // Serial Peripheral Interface
|
||||
IROn_SSC0 = AT91C_ID_SSC0 , // Serial Synchronous Controller 0
|
||||
IROn_TC0 = AT91C_ID_TC0 , // Timer Counter 0
|
||||
IROn_TC1 = AT91C_ID_TC1 , // Timer Counter 1
|
||||
IROn_TC2 = AT91C_ID_TC2 , // Timer Counter 2
|
||||
IROn_PWMC = AT91C_ID_PWMC , // Pulse Width Modulation Controller
|
||||
IROn_ADCC0 = AT91C_ID_ADCC0, // ADC controller0
|
||||
IROn_ADCC1 = AT91C_ID_ADCC1, // ADC controller1
|
||||
IROn_HDMA = AT91C_ID_HDMA , // HDMA
|
||||
IROn_UDPHS = AT91C_ID_UDPHS // USB Device High Speed
|
||||
} IRQn_Type;
|
||||
|
||||
/// Dummy define SDRAM bus width
|
||||
#define BOARD_SDRAM_BUSWIDTH 32
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
#define PIN_EBI_NANDOE {1 << 17, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NANDWE {1 << 18, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NANDCLE {1 << 22, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NANDALE {1 << 21, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
||||
|
||||
#ifdef CHIP_NAND_CTRL
|
||||
/// Nandflash chip enable pin definition.
|
||||
#define BOARD_NF_CE_PIN {1 << 12, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
/// Nandflash ready/busy pin definition.
|
||||
#define BOARD_NF_RB_PIN {1 << 24, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
||||
|
||||
/// Nandflash controller peripheral pins definition.
|
||||
#define PINS_NANDFLASH BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, PIN_EBI_NANDWE,\
|
||||
PIN_EBI_NANDCLE, PIN_EBI_NANDALE, PIN_EBI_DATA_BUS
|
||||
|
||||
/// Address for transferring command bytes to the nandflash.
|
||||
#define BOARD_NF_COMMAND_ADDR 0x60000000
|
||||
/// Address for transferring address bytes to the nandflash.
|
||||
#define BOARD_NF_ADDRESS_ADDR 0x61200000
|
||||
/// Address for transferring data bytes to the nandflash.
|
||||
#define BOARD_NF_DATA_ADDR 0x61000000
|
||||
|
||||
#else
|
||||
/// Nandflash controller peripheral pins definition.
|
||||
#define PINS_NANDFLASH BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, PIN_EBI_NANDWE,\
|
||||
PIN_EBI_NANDCLE, PIN_EBI_NANDALE
|
||||
/// Nandflash chip enable pin definition.
|
||||
#define BOARD_NF_CE_PIN {1 << 12, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/// Nandflash ready/busy pin definition.
|
||||
#define BOARD_NF_RB_PIN {1 << 24, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_PULLUP}
|
||||
/// Address for transferring command bytes to the nandflash.
|
||||
#define BOARD_NF_COMMAND_ADDR 0x61400000
|
||||
/// Address for transferring address bytes to the nandflash.
|
||||
#define BOARD_NF_ADDRESS_ADDR 0x61200000
|
||||
/// Address for transferring data bytes to the nandflash.
|
||||
#define BOARD_NF_DATA_ADDR 0x61000000
|
||||
|
||||
#endif
|
||||
|
||||
#endif //#ifndef BOARD_H
|
||||
|
|
@ -0,0 +1,140 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2008, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Headers
|
||||
//------------------------------------------------------------------------------
|
||||
#include "board.h"
|
||||
#include "exceptions.h"
|
||||
#include "board_lowlevel.h"
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Types
|
||||
//------------------------------------------------------------------------------
|
||||
typedef union { IntFunc __fun; void * __ptr; } IntVector;
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// ProtoTypes
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
extern void __iar_program_start( void );
|
||||
extern void xPortPendSVHandler(void);
|
||||
extern void xPortSysTickHandler(void);
|
||||
extern void vPortSVCHandler(void);
|
||||
extern void vSerialISR( void );
|
||||
|
||||
int __low_level_init( void );
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Variables
|
||||
//------------------------------------------------------------------------------
|
||||
extern unsigned int __ICFEDIT_vector_start__;
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Exception Table
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#pragma language=extended
|
||||
#pragma segment="CSTACK"
|
||||
|
||||
// The name "__vector_table" has special meaning for C-SPY:
|
||||
// it is where the SP start value is found, and the NVIC vector
|
||||
// table register (VTOR) is initialized to this address if != 0.
|
||||
|
||||
#pragma section = ".vectors"
|
||||
#pragma location = ".vectors"
|
||||
const IntVector __vector_table[] =
|
||||
{
|
||||
{ .__ptr = __sfe( "CSTACK" ) },
|
||||
__iar_program_start,
|
||||
|
||||
NMI_Handler,
|
||||
HardFault_Handler,
|
||||
MemManage_Handler,
|
||||
BusFault_Handler,
|
||||
UsageFault_Handler,
|
||||
0, 0, 0, 0, // Reserved
|
||||
vPortSVCHandler, // SVCall handler
|
||||
DebugMon_Handler,
|
||||
0, // Reserved
|
||||
xPortPendSVHandler, // The PendSV handler
|
||||
xPortSysTickHandler, // The SysTick handler
|
||||
|
||||
// Configurable interrupts
|
||||
SUPC_IrqHandler, // 0 SUPPLY CONTROLLER
|
||||
RSTC_IrqHandler, // 1 RESET CONTROLLER
|
||||
RTC_IrqHandler, // 2 REAL TIME CLOCK
|
||||
RTT_IrqHandler, // 3 REAL TIME TIMER
|
||||
WDT_IrqHandler, // 4 WATCHDOG TIMER
|
||||
PMC_IrqHandler, // 5 PMC
|
||||
EFC0_IrqHandler, // 6 EFC0
|
||||
EFC1_IrqHandler, // 7 EFC1
|
||||
DBGU_IrqHandler, // 8 DBGU
|
||||
HSMC4_IrqHandler, // 9 HSMC4
|
||||
PIOA_IrqHandler, // 10 Parallel IO Controller A
|
||||
PIOB_IrqHandler, // 11 Parallel IO Controller B
|
||||
PIOC_IrqHandler, // 12 Parallel IO Controller C
|
||||
USART0_IrqHandler, // 13 USART 0
|
||||
vSerialISR, // 14 USART 1
|
||||
USART2_IrqHandler, // 15 USART 2
|
||||
USART3_IrqHandler, // 16 USART 3
|
||||
MCI0_IrqHandler, // 17 Multimedia Card Interface
|
||||
TWI0_IrqHandler, // 18 TWI 0
|
||||
TWI1_IrqHandler, // 19 TWI 1
|
||||
SPI0_IrqHandler, // 20 Serial Peripheral Interface
|
||||
SSC0_IrqHandler, // 21 Serial Synchronous Controller 0
|
||||
TC0_IrqHandler, // 22 Timer Counter 0
|
||||
TC1_IrqHandler, // 23 Timer Counter 1
|
||||
TC2_IrqHandler, // 24 Timer Counter 2
|
||||
PWM_IrqHandler, // 25 Pulse Width Modulation Controller
|
||||
ADCC0_IrqHandler, // 26 ADC controller0
|
||||
ADCC1_IrqHandler, // 27 ADC controller1
|
||||
HDMA_IrqHandler, // 28 HDMA
|
||||
UDPD_IrqHandler, // 29 USB Device High Speed UDP_HS
|
||||
IrqHandlerNotUsed // 30 not used
|
||||
};
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Exported functions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// This is the code that gets called on processor reset. To initialize the
|
||||
/// device.
|
||||
//------------------------------------------------------------------------------
|
||||
int __low_level_init( void )
|
||||
{
|
||||
unsigned int * src = __section_begin(".vectors");
|
||||
|
||||
LowLevelInit();
|
||||
|
||||
AT91C_BASE_NVIC->NVIC_VTOFFR = ((unsigned int)(src)) | (0x0 << 7);
|
||||
|
||||
return 1; // if return 0, the data sections will not be initialized.
|
||||
}
|
215
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/board_lowlevel.c
Normal file
215
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/board_lowlevel.c
Normal file
|
@ -0,0 +1,215 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2008, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \unit
|
||||
///
|
||||
/// !Purpose
|
||||
///
|
||||
/// Provides the low-level initialization function that gets called on chip
|
||||
/// startup.
|
||||
///
|
||||
/// !Usage
|
||||
///
|
||||
/// LowLevelInit() is called in #board_cstartup_xxx.c#.
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Headers
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#include "board.h"
|
||||
#include "board_memories.h"
|
||||
#include "board_lowlevel.h"
|
||||
#include <pio/pio.h>
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Local definitions
|
||||
//------------------------------------------------------------------------------
|
||||
// Settings at 48/48MHz
|
||||
#define AT91C_CKGR_MUL_SHIFT 16
|
||||
#define AT91C_CKGR_OUT_SHIFT 14
|
||||
#define AT91C_CKGR_PLLCOUNT_SHIFT 8
|
||||
#define AT91C_CKGR_DIV_SHIFT 0
|
||||
|
||||
#define BOARD_OSCOUNT (AT91C_CKGR_MOSCXTST & (0x3F << 8))
|
||||
#define BOARD_PLLR ((1 << 29) | (0x7 << AT91C_CKGR_MUL_SHIFT) \
|
||||
| (0x0 << AT91C_CKGR_OUT_SHIFT) |(0x3f << AT91C_CKGR_PLLCOUNT_SHIFT) \
|
||||
| (0x1 << AT91C_CKGR_DIV_SHIFT))
|
||||
#define BOARD_MCKR ( AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_PLLA_CLK)
|
||||
|
||||
// Define clock timeout
|
||||
#define CLOCK_TIMEOUT 0xFFFFFFFF
|
||||
|
||||
#define AT91C_SUPC_SR_OSCSEL_CRYST 0x80UL
|
||||
#define AT91C_SUPC_CR_XTALSEL_CRYSTAL_SEL 0x08UL
|
||||
|
||||
void SetDefaultMaster(unsigned char enable);
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Local variables
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Local functions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Exported functions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// After POR, at91sam3u device is running on 4MHz internal RC
|
||||
/// At the end of the LowLevelInit procedure MCK = 48MHz PLLA = 96 CPU=48MHz
|
||||
/// Performs the low-level initialization of the chip. This includes EFC, master
|
||||
/// clock, IRQ & watchdog configuration.
|
||||
//------------------------------------------------------------------------------
|
||||
void LowLevelInit(void)
|
||||
{
|
||||
unsigned int timeout = 0;
|
||||
|
||||
/* Set 2 WS for Embedded Flash Access
|
||||
************************************/
|
||||
AT91C_BASE_EFC0->EFC_FMR = AT91C_EFC_FWS_2WS;
|
||||
AT91C_BASE_EFC1->EFC_FMR = AT91C_EFC_FWS_2WS;
|
||||
|
||||
/* Watchdog initialization
|
||||
*************************/
|
||||
AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
|
||||
|
||||
/* Select external slow clock
|
||||
****************************/
|
||||
if ((AT91C_BASE_SUPC->SUPC_SR & AT91C_SUPC_SR_OSCSEL_CRYST) != AT91C_SUPC_SR_OSCSEL_CRYST) {
|
||||
AT91C_BASE_SUPC->SUPC_CR = AT91C_SUPC_CR_XTALSEL_CRYSTAL_SEL | (0xA5UL << 24UL);
|
||||
timeout = 0;
|
||||
while (!(AT91C_BASE_SUPC->SUPC_SR & AT91C_SUPC_SR_OSCSEL_CRYST) && (timeout++ < CLOCK_TIMEOUT));
|
||||
}
|
||||
|
||||
/* Initialize main oscillator
|
||||
****************************/
|
||||
|
||||
if(!(AT91C_BASE_PMC->PMC_MOR & AT91C_CKGR_MOSCSEL))
|
||||
{
|
||||
AT91C_BASE_PMC->PMC_MOR = (0x37 << 16) | BOARD_OSCOUNT | AT91C_CKGR_MOSCRCEN | AT91C_CKGR_MOSCXTEN;
|
||||
timeout = 0;
|
||||
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCXTS) && (timeout++ < CLOCK_TIMEOUT));
|
||||
}
|
||||
else
|
||||
{
|
||||
AT91C_BASE_PMC->PMC_MOR = (0x37 << 16) | BOARD_OSCOUNT | AT91C_CKGR_MOSCRCEN | AT91C_CKGR_MOSCXTEN | AT91C_CKGR_MOSCSEL;
|
||||
timeout = 0;
|
||||
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCRCS) && (timeout++ < CLOCK_TIMEOUT));
|
||||
AT91C_BASE_PMC->PMC_MOR = (0x37 << 16) | BOARD_OSCOUNT | AT91C_CKGR_MOSCRCEN | AT91C_CKGR_MOSCXTEN;
|
||||
timeout = 0;
|
||||
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCSELS) && (timeout++ < CLOCK_TIMEOUT));
|
||||
}
|
||||
|
||||
/* Switch to moscsel */
|
||||
AT91C_BASE_PMC->PMC_MOR = (0x37 << 16) | BOARD_OSCOUNT | AT91C_CKGR_MOSCRCEN | AT91C_CKGR_MOSCXTEN | AT91C_CKGR_MOSCSEL;
|
||||
timeout = 0;
|
||||
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCSELS) && (timeout++ < CLOCK_TIMEOUT));
|
||||
AT91C_BASE_PMC->PMC_MCKR = (AT91C_BASE_PMC->PMC_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
|
||||
timeout = 0;
|
||||
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
|
||||
|
||||
/* Initialize PLLA */
|
||||
AT91C_BASE_PMC->PMC_PLLAR = BOARD_PLLR;
|
||||
timeout = 0;
|
||||
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKA) && (timeout++ < CLOCK_TIMEOUT));
|
||||
|
||||
/* Initialize UTMI for USB usage */
|
||||
AT91C_BASE_CKGR->CKGR_UCKR |= (AT91C_CKGR_UPLLCOUNT & (3 << 20)) | AT91C_CKGR_UPLLEN;
|
||||
timeout = 0;
|
||||
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKU) && (timeout++ < CLOCK_TIMEOUT));
|
||||
|
||||
/* Switch to fast clock
|
||||
**********************/
|
||||
AT91C_BASE_PMC->PMC_MCKR = (BOARD_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
|
||||
timeout = 0;
|
||||
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
|
||||
|
||||
AT91C_BASE_PMC->PMC_MCKR = BOARD_MCKR;
|
||||
timeout = 0;
|
||||
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
|
||||
|
||||
/* Enable clock for UART
|
||||
************************/
|
||||
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_DBGU);
|
||||
|
||||
/* Optimize CPU setting for speed */
|
||||
SetDefaultMaster(1);
|
||||
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// Enable or disable default master access
|
||||
/// \param enalbe 1 enable defaultMaster settings, 0 disable it.
|
||||
//------------------------------------------------------------------------------
|
||||
void SetDefaultMaster(unsigned char enable)
|
||||
{
|
||||
AT91PS_HMATRIX2 pMatrix = AT91C_BASE_MATRIX;
|
||||
|
||||
// Set default master
|
||||
if (enable == 1) {
|
||||
|
||||
// Set default master: SRAM0 -> Cortex-M3 System
|
||||
pMatrix->HMATRIX2_SCFG0 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG0_ARMS |
|
||||
AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR;
|
||||
|
||||
// Set default master: SRAM1 -> Cortex-M3 System
|
||||
pMatrix->HMATRIX2_SCFG1 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG1_ARMS |
|
||||
AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR;
|
||||
|
||||
// Set default master: Internal flash0 -> Cortex-M3 Instruction/Data
|
||||
pMatrix->HMATRIX2_SCFG3 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG3_ARMC |
|
||||
AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR;
|
||||
} else {
|
||||
|
||||
// Clear default master: SRAM0 -> Cortex-M3 System
|
||||
pMatrix->HMATRIX2_SCFG0 &= (~AT91C_MATRIX_DEFMSTR_TYPE);
|
||||
|
||||
// Clear default master: SRAM1 -> Cortex-M3 System
|
||||
pMatrix->HMATRIX2_SCFG1 &= (~AT91C_MATRIX_DEFMSTR_TYPE);
|
||||
|
||||
// Clear default master: Internal flash0 -> Cortex-M3 Instruction/Data
|
||||
pMatrix->HMATRIX2_SCFG3 &= (~AT91C_MATRIX_DEFMSTR_TYPE);
|
||||
}
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// Set flash wait state
|
||||
/// \param ws Value of flash wait state
|
||||
//------------------------------------------------------------------------------
|
||||
void SetFlashWaitState(unsigned char ws)
|
||||
{
|
||||
// Set Wait State for Embedded Flash Access
|
||||
AT91C_BASE_EFC0->EFC_FMR = ((ws << 8) & AT91C_EFC_FWS);
|
||||
AT91C_BASE_EFC1->EFC_FMR = ((ws << 8) & AT91C_EFC_FWS);
|
||||
}
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2008, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \unit
|
||||
///
|
||||
/// !!!Purpose
|
||||
///
|
||||
/// Collection of methods for lowlevel.
|
||||
///
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#ifndef BOARD_LOWLEVEL_H
|
||||
#define BOARD_LOWLEVEL_H
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Exported functions
|
||||
//------------------------------------------------------------------------------
|
||||
extern void LowLevelInit(void);
|
||||
extern void OptimizeCpuSpeed(void);
|
||||
|
||||
#endif // BOARD_LOWLEVEL_H
|
||||
|
101
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/board_memories.c
Normal file
101
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/board_memories.c
Normal file
|
@ -0,0 +1,101 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2009, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*
|
||||
Title: Memories implementation
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Headers
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#include <board.h>
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Exported functions
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
/// Dummy function to initialize and configure the SDRAM
|
||||
//------------------------------------------------------------------------------
|
||||
void BOARD_ConfigureSdram(unsigned char busWidth)
|
||||
{
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// Configures the EBI for NandFlash access. Pins must be configured after or
|
||||
/// before calling this function.
|
||||
//------------------------------------------------------------------------------
|
||||
void BOARD_ConfigureNandFlash(unsigned char busWidth)
|
||||
{
|
||||
AT91PS_HSMC4 pHSMC4 = AT91C_BASE_HSMC4;
|
||||
AT91PS_HSMC4_CS pSMC = AT91C_BASE_HSMC4_CS1;
|
||||
|
||||
// Open EBI clock
|
||||
AT91C_BASE_PMC->PMC_PCER = (1<< AT91C_ID_HSMC4);
|
||||
|
||||
#ifdef CHIP_NAND_CTRL
|
||||
// Enable the Nand Flash Controller
|
||||
pHSMC4 ->HSMC4_CTRL = AT91C_HSMC4_NFCEN;
|
||||
#endif
|
||||
|
||||
pSMC->HSMC4_SETUP = 0
|
||||
| ((0 << 0) & AT91C_HSMC4_NWE_SETUP)
|
||||
| ((1 << 8) & AT91C_HSMC4_NCS_WR_SETUP)
|
||||
| ((0 << 16) & AT91C_HSMC4_NRD_SETUP)
|
||||
| ((1 << 24) & AT91C_HSMC4_NCS_RD_SETUP);
|
||||
|
||||
pSMC->HSMC4_PULSE = 0
|
||||
| ((2 << 0) & AT91C_HSMC4_NWE_PULSE)
|
||||
| ((3 << 8) & AT91C_HSMC4_NCS_WR_PULSE)
|
||||
| ((3 << 16) & AT91C_HSMC4_NRD_PULSE)
|
||||
| ((4 << 24) & AT91C_HSMC4_NCS_RD_PULSE);
|
||||
|
||||
pSMC->HSMC4_CYCLE = 0
|
||||
| ((4 << 0) & AT91C_HSMC4_NWE_CYCLE)
|
||||
| ((7 << 16) & AT91C_HSMC4_NRD_CYCLE);
|
||||
|
||||
pSMC->HSMC4_TIMINGS = 0
|
||||
| ((1 << 0) & AT91C_HSMC4_TCLR) // CLE to REN
|
||||
| ((2 << 4) & AT91C_HSMC4_TADL) // ALE to Data
|
||||
| ((1 << 8) & AT91C_HSMC4_TAR) // ALE to REN
|
||||
| ((1 << 16) & AT91C_HSMC4_TRR) // Ready to REN
|
||||
| ((2 << 24) & AT91C_HSMC4_TWB) // WEN to REN
|
||||
| (7<<28)
|
||||
|(AT91C_HSMC4_NFSEL) // Nand Flash Timing
|
||||
;
|
||||
|
||||
|
||||
if (busWidth == 8) {
|
||||
pSMC->HSMC4_MODE = AT91C_HSMC4_DBW_WIDTH_EIGTH_BITS | AT91C_HSMC4_READ_MODE | AT91C_HSMC4_WRITE_MODE;
|
||||
}
|
||||
else if (busWidth == 16) {
|
||||
pSMC->HSMC4_MODE = AT91C_HSMC4_DBW_WIDTH_SIXTEEN_BITS | AT91C_HSMC4_READ_MODE | AT91C_HSMC4_WRITE_MODE;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2008, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \unit
|
||||
/// !Purpose
|
||||
///
|
||||
///
|
||||
/// !Usage
|
||||
///
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#ifndef BOARD_MEMORIES_H
|
||||
#define BOARD_MEMORIES_H
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Exported functions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
extern void BOARD_ConfigureSdram(unsigned char busWidth);
|
||||
|
||||
extern void BOARD_ConfigureNandFlash(unsigned char busWidth);
|
||||
|
||||
#endif //#ifndef BOARD_MEMORIES_H
|
||||
|
99
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/chip.h
Normal file
99
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/chip.h
Normal file
|
@ -0,0 +1,99 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2008, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \unit
|
||||
/// !Purpose
|
||||
///
|
||||
/// Definition of AT91SAM3U4 characteristics and features
|
||||
///
|
||||
/// !Usage
|
||||
/// -# For ARM core feature, see "AT91SAM3U4 - ARM core features".
|
||||
/// -# For IP features, see "AT91SAM3U4 - IP features".
|
||||
/// -# For misc, see "AT91SAM3U4 - Misc".
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#ifndef CHIP_H
|
||||
#define CHIP_H
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Headers
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Definitions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \page "AT91SAM3U4 - ARM core features"
|
||||
/// This page lists several characteristics related to the ARM core
|
||||
///
|
||||
|
||||
//ARM core features
|
||||
|
||||
/// ARM core definition.
|
||||
#define cortexm3
|
||||
|
||||
/// family definition.
|
||||
#define at91sam3u
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \page "AT91SAM3U4 - IP features"
|
||||
/// This page lists several characteristics related to the embedded IP
|
||||
///
|
||||
|
||||
//IP FEATURES
|
||||
|
||||
// EFC GPNVM number
|
||||
#define CHIP_EFC_NUM_GPNVMS 3
|
||||
|
||||
/// Indicates chip has an Enhanced EFC.
|
||||
#define CHIP_FLASH_EEFC
|
||||
|
||||
// DMA channels number
|
||||
#define CHIP_DMA_CHANNEL_NUM 4
|
||||
|
||||
// Indicate chip has a nandflash controller.
|
||||
#define CHIP_NAND_CTRL
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \page "AT91SAM3U4 - Misc "
|
||||
/// This page lists misc features
|
||||
///
|
||||
|
||||
//Misc
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#endif //#ifndef CHIP_H
|
||||
|
378
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/exceptions.c
Normal file
378
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/exceptions.c
Normal file
|
@ -0,0 +1,378 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2008, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*
|
||||
** This file contains the default exception handlers
|
||||
** and exception table.
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Headers
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#include "exceptions.h"
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Types
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Exception Handlers
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Default irq handler
|
||||
//------------------------------------------------------------------------------
|
||||
void IrqHandlerNotUsed(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Provide weak aliases for each Exception handler to the IrqHandlerNotUsed.
|
||||
// As they are weak aliases, any function with the same name will override
|
||||
// this definition.
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// System interrupt
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void NMI_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void MemManage_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void BusFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void UsageFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void SVC_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void DebugMon_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void PendSV_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// for Cortex-M3
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void SysTick_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// External interrupt
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// for SAM7/9
|
||||
//------------------------------------------------------------------------------
|
||||
void SYS_IrqHandler( void )
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// SUPPLY CONTROLLER
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void SUPC_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// RESET CONTROLLER
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void RSTC_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// REAL TIME CLOCK
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void RTC_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// REAL TIME TIMER
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void RTT_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// WATCHDOG TIMER
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void WDT_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// PMC
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void PMC_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// EFC0
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void EFC0_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// EFC1
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void EFC1_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
//------------------------------------------------------------------------------
|
||||
// DBGU
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void DBGU_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// HSMC4
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void HSMC4_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Parallel IO Controller A
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void PIOA_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Parallel IO Controller B
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void PIOB_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Parallel IO Controller C
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void PIOC_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// USART 0
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void USART0_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// USART 1
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void USART1_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// USART 2
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void USART2_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// USART 3
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void USART3_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Multimedia Card Interface
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void MCI0_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// TWI 0
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void TWI0_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// TWI 1
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void TWI1_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Serial Peripheral Interface 0
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void SPI0_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Serial Synchronous Controller 0
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void SSC0_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Timer Counter 0
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void TC0_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Timer Counter 1
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void TC1_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Timer Counter 2
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void TC2_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// PWM Controller
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void PWM_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// ADC controller0
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void ADCC0_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// ADC controller1
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void ADCC1_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// HDMA
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void HDMA_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// USB Device High Speed UDP_HS
|
||||
//------------------------------------------------------------------------------
|
||||
WEAK void UDPD_IrqHandler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
135
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/exceptions.h
Normal file
135
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/exceptions.h
Normal file
|
@ -0,0 +1,135 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2008, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*
|
||||
** This file contains the default exception handlers
|
||||
** and exception table.
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Types
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
/// Function prototype for exception table items - interrupt handler.
|
||||
//typedef void( *IrqHandler )( void );
|
||||
typedef void( *IntFunc )( void );
|
||||
|
||||
/// Weak attribute
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#elif defined ( __ICCARM__ )
|
||||
#define WEAK __weak
|
||||
#elif defined ( __GNUC__ )
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#endif
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Global functions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Exception Handlers
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
extern WEAK void NMI_Handler( void );
|
||||
extern WEAK void HardFault_Handler( void );
|
||||
extern WEAK void MemManage_Handler( void );
|
||||
extern WEAK void BusFault_Handler( void );
|
||||
extern WEAK void UsageFault_Handler( void );
|
||||
extern WEAK void SVC_Handler( void );
|
||||
extern WEAK void DebugMon_Handler( void );
|
||||
extern WEAK void PendSV_Handler( void );
|
||||
extern WEAK void SysTick_Handler( void );
|
||||
void IrqHandlerNotUsed(void);
|
||||
|
||||
|
||||
// System Controller
|
||||
extern void SYS_IrqHandler(void);
|
||||
// SUPPLY CONTROLLER
|
||||
extern WEAK void SUPC_IrqHandler(void);
|
||||
// RESET CONTROLLER
|
||||
extern WEAK void RSTC_IrqHandler(void);
|
||||
// REAL TIME CLOCK
|
||||
extern WEAK void RTC_IrqHandler(void);
|
||||
// REAL TIME TIMER
|
||||
extern WEAK void RTT_IrqHandler(void);
|
||||
// WATCHDOG TIMER
|
||||
extern WEAK void WDT_IrqHandler(void);
|
||||
// PMC
|
||||
extern WEAK void PMC_IrqHandler(void);
|
||||
// EFC0
|
||||
extern WEAK void EFC0_IrqHandler(void);
|
||||
// EFC1
|
||||
extern WEAK void EFC1_IrqHandler(void);
|
||||
// DBGU
|
||||
extern WEAK void DBGU_IrqHandler(void);
|
||||
// HSMC4
|
||||
extern WEAK void HSMC4_IrqHandler(void);
|
||||
// Parallel IO Controller A
|
||||
extern WEAK void PIOA_IrqHandler(void);
|
||||
// Parallel IO Controller B
|
||||
extern WEAK void PIOB_IrqHandler(void);
|
||||
// Parallel IO Controller C
|
||||
extern WEAK void PIOC_IrqHandler(void);
|
||||
// USART 0
|
||||
extern WEAK void USART0_IrqHandler(void);
|
||||
// USART 1
|
||||
extern WEAK void USART1_IrqHandler(void);
|
||||
// USART 2
|
||||
extern WEAK void USART2_IrqHandler(void);
|
||||
// USART 3
|
||||
extern WEAK void USART3_IrqHandler(void);
|
||||
// Multimedia Card Interface
|
||||
extern WEAK void MCI0_IrqHandler(void);
|
||||
// TWI 0
|
||||
extern WEAK void TWI0_IrqHandler(void);
|
||||
// TWI 1
|
||||
extern WEAK void TWI1_IrqHandler(void);
|
||||
// Serial Peripheral Interface 0
|
||||
extern WEAK void SPI0_IrqHandler(void);
|
||||
// Serial Synchronous Controller 0
|
||||
extern WEAK void SSC0_IrqHandler(void);
|
||||
// Timer Counter 0
|
||||
extern WEAK void TC0_IrqHandler(void);
|
||||
// Timer Counter 1
|
||||
extern WEAK void TC1_IrqHandler(void);
|
||||
// Timer Counter 2
|
||||
extern WEAK void TC2_IrqHandler(void);
|
||||
// PWM Controller
|
||||
extern WEAK void PWM_IrqHandler(void);
|
||||
// ADC controller0
|
||||
extern WEAK void ADCC0_IrqHandler(void);
|
||||
// ADC controller1
|
||||
extern WEAK void ADCC1_IrqHandler(void);
|
||||
// HDMA
|
||||
extern WEAK void HDMA_IrqHandler(void);
|
||||
// USB Device High Speed UDP_HS
|
||||
extern WEAK void UDPD_IrqHandler(void);
|
||||
|
47
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/flash.icf
Normal file
47
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/flash.icf
Normal file
|
@ -0,0 +1,47 @@
|
|||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
|
||||
/*-Vector table start*/
|
||||
define symbol __ICFEDIT_vector_start__ = 0x00080000; /*Add for CMSIS*/
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF;
|
||||
define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000;
|
||||
define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF;
|
||||
define symbol __ICFEDIT_region_ROM0_start__ = 0x00080000;
|
||||
define symbol __ICFEDIT_region_ROM0_end__ = 0x0009FFFF;
|
||||
define symbol __ICFEDIT_region_ROM1_start__ = 0x00100000;
|
||||
define symbol __ICFEDIT_region_ROM1_end__ = 0x0011FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x200;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x4;
|
||||
/*-Specials-*/
|
||||
/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/
|
||||
/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/
|
||||
/*-Exports-*/
|
||||
/*export symbol __ICFEDIT_region_RAM_VECT_start__;*/
|
||||
export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ /*Referenced for CMSIS*/
|
||||
/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/
|
||||
define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
|
||||
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
|
||||
/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
|
||||
mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/
|
||||
define region ROM0_region = mem:[from __ICFEDIT_region_ROM0_start__ to __ICFEDIT_region_ROM0_end__];
|
||||
define region ROM1_region = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__];
|
||||
|
||||
/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
/*place at start of ROM0_region { readonly section .vectors };*/ /*Referenced for CMSIS*/
|
||||
place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors }; /*Add for CMSIS*/
|
||||
place in ROM0_region { readonly };
|
||||
place in RAM0_region { readwrite, block CSTACK, block HEAP };
|
||||
/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/
|
162
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/led.c
Normal file
162
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/led.c
Normal file
|
@ -0,0 +1,162 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2008, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Headers
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#include "led.h"
|
||||
#include <board.h>
|
||||
#include <pio/pio.h>
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Local Variables
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#ifdef PINS_LEDS
|
||||
static const Pin pinsLeds[] = {PINS_LEDS};
|
||||
static const unsigned int numLeds = PIO_LISTSIZE(pinsLeds);
|
||||
#endif
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Global Functions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// Configures the pin associated with the given LED number. If the LED does
|
||||
/// not exist on the board, the function does nothing.
|
||||
/// \param led Number of the LED to configure.
|
||||
/// \return 1 if the LED exists and has been configured; otherwise 0.
|
||||
//------------------------------------------------------------------------------
|
||||
unsigned char LED_Configure(unsigned int led)
|
||||
{
|
||||
#ifdef PINS_LEDS
|
||||
// Check that LED exists
|
||||
if (led >= numLeds) {
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Configure LED
|
||||
return (PIO_Configure(&pinsLeds[led], 1));
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// Turns the given LED on if it exists; otherwise does nothing.
|
||||
/// \param led Number of the LED to turn on.
|
||||
/// \return 1 if the LED has been turned on; 0 otherwise.
|
||||
//------------------------------------------------------------------------------
|
||||
unsigned char LED_Set(unsigned int led)
|
||||
{
|
||||
#ifdef PINS_LEDS
|
||||
// Check if LED exists
|
||||
if (led >= numLeds) {
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Turn LED on
|
||||
if (pinsLeds[led].type == PIO_OUTPUT_0) {
|
||||
|
||||
PIO_Set(&pinsLeds[led]);
|
||||
}
|
||||
else {
|
||||
|
||||
PIO_Clear(&pinsLeds[led]);
|
||||
}
|
||||
|
||||
return 1;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// Turns a LED off.
|
||||
/// \param led Number of the LED to turn off.
|
||||
/// \param 1 if the LED has been turned off; 0 otherwise.
|
||||
//------------------------------------------------------------------------------
|
||||
unsigned char LED_Clear(unsigned int led)
|
||||
{
|
||||
#ifdef PINS_LEDS
|
||||
// Check if LED exists
|
||||
if (led >= numLeds) {
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Turn LED off
|
||||
if (pinsLeds[led].type == PIO_OUTPUT_0) {
|
||||
|
||||
PIO_Clear(&pinsLeds[led]);
|
||||
}
|
||||
else {
|
||||
|
||||
PIO_Set(&pinsLeds[led]);
|
||||
}
|
||||
|
||||
return 1;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// Toggles the current state of a LED.
|
||||
/// \param led Number of the LED to toggle.
|
||||
/// \return 1 if the LED has been toggled; otherwise 0.
|
||||
//------------------------------------------------------------------------------
|
||||
unsigned char LED_Toggle(unsigned int led)
|
||||
{
|
||||
#ifdef PINS_LEDS
|
||||
// Check if LED exists
|
||||
if (led >= numLeds) {
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Toggle LED
|
||||
if (PIO_GetOutputDataStatus(&pinsLeds[led])) {
|
||||
|
||||
PIO_Clear(&pinsLeds[led]);
|
||||
}
|
||||
else {
|
||||
|
||||
PIO_Set(&pinsLeds[led]);
|
||||
}
|
||||
|
||||
return 1;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
70
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/led.h
Normal file
70
FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/system/led.h
Normal file
|
@ -0,0 +1,70 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2008, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \unit
|
||||
///
|
||||
/// !Purpose
|
||||
///
|
||||
/// Small set of functions for simple and portable LED usage.
|
||||
///
|
||||
/// !Usage
|
||||
///
|
||||
/// -# Configure one or more LEDs using LED_Configure and
|
||||
/// LED_ConfigureAll.
|
||||
/// -# Set, clear and toggle LEDs using LED_Set, LED_Clear and
|
||||
/// LED_Toggle.
|
||||
///
|
||||
/// LEDs are numbered starting from 0; the number of LEDs depend on the
|
||||
/// board being used. All the functions defined here will compile properly
|
||||
/// regardless of whether the LED is defined or not; they will simply
|
||||
/// return 0 when a LED which does not exist is given as an argument.
|
||||
/// Also, these functions take into account how each LED is connected on to
|
||||
/// board; thus, <LED_Set> might change the level on the corresponding pin
|
||||
/// to 0 or 1, but it will always light the LED on; same thing for the other
|
||||
/// methods.
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#ifndef LED_H
|
||||
#define LED_H
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Global Functions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
extern unsigned char LED_Configure(unsigned int led);
|
||||
|
||||
extern unsigned char LED_Set(unsigned int led);
|
||||
|
||||
extern unsigned char LED_Clear(unsigned int led);
|
||||
|
||||
extern unsigned char LED_Toggle(unsigned int led);
|
||||
|
||||
#endif //#ifndef LED_H
|
||||
|
Loading…
Add table
Add a link
Reference in a new issue