len0rd/FreeRTOS-Kernel
1
0
Fork 0
mirror of https://github.com/FreeRTOS/FreeRTOS-Kernel.git synced 2025-08-19 17:48:33 -04:00
Code Issues Projects Releases Packages Wiki Activity

Add FreeRTOS-Plus directory.

Browse source
This commit is contained in:
Richard Barry 2012-08-11 21:34:11 +00:00
parent 7bd5f21ad5
commit f508a5f653
6798 changed files with 134949 additions and 19 deletions
Download patch file Download diff file Expand all files Collapse all files

231
FreeRTOS/Demo/AVR_ATMega323_IAR/serial/serial.c Normal file
View file

@ -0,0 +1,231 @@
/*
FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong? *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, training, latest information,
license and contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool.
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
the code with commercial support, indemnification, and middleware, under
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
provide a safety engineered and independently SIL3 certified version under
the SafeRTOS brand: http://www.SafeRTOS.com.
*/
/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR IAR AVR PORT. */
#include <stdlib.h>
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
#include "serial.h"
#define serBAUD_DIV_CONSTANT ( ( unsigned long ) 16 )
/* Constants for writing to UCSRB. */
#define serRX_INT_ENABLE ( ( unsigned char ) 0x80 )
#define serRX_ENABLE ( ( unsigned char ) 0x10 )
#define serTX_ENABLE ( ( unsigned char ) 0x08 )
#define serTX_INT_ENABLE ( ( unsigned char ) 0x20 )
/* Constants for writing to UCSRC. */
#define serUCSRC_SELECT ( ( unsigned char ) 0x80 )
#define serEIGHT_DATA_BITS ( ( unsigned char ) 0x06 )
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
#define vInterruptOn() \
{ \
unsigned char ucByte; \
\
ucByte = UCSRB; \
ucByte |= serTX_INT_ENABLE; \
outb( UCSRB, ucByte ); \
}
/*-----------------------------------------------------------*/
#define vInterruptOff() \
{ \
unsigned char ucByte; \
\
ucByte = UCSRB; \
ucByte &= ~serTX_INT_ENABLE; \
outb( UCSRB, ucByte ); \
}
/*-----------------------------------------------------------*/
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
unsigned long ulBaudRateCounter;
unsigned char ucByte;
portENTER_CRITICAL();
{
/* Create the queues used by the com test task. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
/* Calculate the baud rate register value from the equation in the
data sheet. */
ulBaudRateCounter = ( configCPU_CLOCK_HZ / ( serBAUD_DIV_CONSTANT * ulWantedBaud ) ) - ( unsigned long ) 1;
/* Set the baud rate. */
ucByte = ( unsigned char ) ( ulBaudRateCounter & ( unsigned long ) 0xff );
outb( UBRRL, ucByte );
ulBaudRateCounter >>= ( unsigned long ) 8;
ucByte = ( unsigned char ) ( ulBaudRateCounter & ( unsigned long ) 0xff );
outb( UBRRH, ucByte );
/* Enable the Rx interrupt. The Tx interrupt will get enabled
later. Also enable the Rx and Tx. */
outb( UCSRB, serRX_INT_ENABLE | serRX_ENABLE | serTX_ENABLE );
/* Set the data bits to 8. */
outb( UCSRC, serUCSRC_SELECT | serEIGHT_DATA_BITS );
}
portEXIT_CRITICAL();
/* Unlike other ports, this serial code does not allow for more than one
com port. We therefore don't return a pointer to a port structure and can
instead just return NULL. */
return NULL;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
{
/* Get the next character from the buffer. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
{
/* Return false if after the block time there is no room on the Tx queue. */
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
{
return pdFAIL;
}
vInterruptOn();
return pdPASS;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
unsigned char ucByte;
/* Turn off the interrupts. We may also want to delete the queues and/or
re-install the original ISR. */
portENTER_CRITICAL();
{
vInterruptOff();
ucByte = UCSRB;
ucByte &= ~serRX_INT_ENABLE;
outb( UCSRB, ucByte );
}
portEXIT_CRITICAL();
}
/*-----------------------------------------------------------*/
__interrupt void SIG_UART_RECV( void )
{
signed char ucChar, xHigherPriorityTaskWoken = pdFALSE;
/* Get the character and post it on the queue of Rxed characters.
If the post causes a task to wake force a context switch as the woken task
may have a higher priority than the task we have interrupted. */
ucChar = UDR;
xQueueSendFromISR( xRxedChars, &ucChar, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken != pdFALSE )
{
taskYIELD();
}
}
/*-----------------------------------------------------------*/
__interrupt void SIG_UART_DATA( void )
{
signed char cChar, cTaskWoken = pdFALSE;
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &cTaskWoken ) == pdTRUE )
{
/* Send the next character queued for Tx. */
outb( UDR, cChar );
}
else
{
/* Queue empty, nothing to send. */
vInterruptOff();
}
}