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Add FreeRTOS-Plus directory.
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6798 changed files with 134949 additions and 19 deletions
869
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_adc.c
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869
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_adc.c
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/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
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* File Name : 75x_adc.c
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* Author : MCD Application Team
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* Date First Issued : 03/10/2006
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* Description : This file provides all the ADC software functions.
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********************************************************************************
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* History:
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* 07/17/2006 : V1.0
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* 03/10/2006 : V0.1
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "75x_adc.h"
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#include "75x_mrcc.h"
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Mask for Power Down Mode */
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#define ADC_PowerDown_Enable 0x8000
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#define ADC_PowerDown_Disable 0x7FFF
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/* Mask for Watchdog Thresholds Enable */
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#define ADC_AnalogWatchdog_Enable 0x8000
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#define ADC_AnalogWatchdog_Disable 0x7FFF
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/* Mask for Injected conversion start */
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#define ADC_Injec_ConversionStart 0x8000
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/* DMA enable */
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#define ADC_DMA_ExtEnable_Mask 0x4000
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/* Injected start trigger enable */
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#define ADC_Injec_ExtTrigger_Enable 0x4000
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/* ADC Masks */
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#define ADC_DMAFirstEnabledChannel_Mask 0x000F
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#define ADC_DataRegisterOffset 0x0050
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#define ADC_FirstChannel_Mask 0xFFF0
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#define ADC_ChannelNumber_Mask 0xFC3F
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#define ADC_Threshold_Mask 0xFC00
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#define ADC_AnalogWatchdogChannel_Mask 0xC3FF
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#define ADC_Prescalers_Mask 0x7F18
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#define ADC_SPEN_Mask 0x8000
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#define ADC_FallingEdge_Mask 0xEFFF
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#define ADC_LowLevel_Mask 0x4000
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#define ADC_HighLevel_Mask 0xDFFF
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#define ADC_Calibration_Mask 0x0002
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/*******************************************************************************
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* Function Name : ADC_DeInit
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* Description : Deinitializes the ADC peripheral registers to their default
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* reset values.
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* Input : None.
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* Output : None
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* Return : None.
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*******************************************************************************/
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void ADC_DeInit(void)
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{
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/* Reset the ADC registers values*/
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MRCC_PeripheralSWResetConfig(MRCC_Peripheral_ADC,ENABLE);
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MRCC_PeripheralSWResetConfig(MRCC_Peripheral_ADC,DISABLE);
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}
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/*******************************************************************************
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* Function Name : ADC_Init
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* Description : Initializes the ADC peripheral according to the specified
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* parameters in the ADC_InitStruct.
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* Input : - ADC_InitStruct: pointer to an ADC_InitTypeDef structure that
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contains the configuration information for the ADC peripheral.
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* Output : None
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* Return : None
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*******************************************************************************/
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void ADC_Init(ADC_InitTypeDef* ADC_InitStruct)
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{
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/* Configure the conversion mode */
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if(ADC_InitStruct->ADC_ConversionMode == ADC_ConversionMode_Scan)
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{
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/* Set the scan conversion mode */
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ADC->CLR2 |= ADC_ConversionMode_Scan;
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}
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else
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{
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/* Set the one-shot conversion mode */
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ADC->CLR2 &= ADC_ConversionMode_OneShot;
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}
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/* Configure the external start conversion trigger */
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switch(ADC_InitStruct->ADC_ExtTrigger)
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{
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case ADC_ExtTrigger_HighLevel:
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/* Start conversion on High level of the external trigger (TIM0) */
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ADC->CLR0 &= ADC_HighLevel_Mask;
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ADC->CLR0 |= ADC_ExtTrigger_HighLevel;
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break;
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case ADC_ExtTrigger_LowLevel:
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/* Start conversion on low level of the external trigger (TIM0) */
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ADC->CLR0 &= ADC_ExtTrigger_LowLevel;
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ADC->CLR0 |= ADC_LowLevel_Mask;
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break;
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case ADC_ExtTrigger_RisingEdge:
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/* Start conversion on rising edge of the external trigger (TIM0) */
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ADC->CLR0 |= ADC_ExtTrigger_RisingEdge;
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break;
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case ADC_ExtTrigger_FallingEdge:
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/* Start conversion on falling edge of the external trigger (TIM0) */
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ADC->CLR0 &= ADC_FallingEdge_Mask;
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ADC->CLR0 |= ADC_ExtTrigger_FallingEdge;
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break;
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case ADC_ExtTrigger_Disable:
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/* Disable the external trigger and start the conversion by software */
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ADC->CLR0 &= ADC_ExtTrigger_Disable;
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break;
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default:
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break;
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}
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/* Configure the auto clock off feature */
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if (ADC_InitStruct->ADC_AutoClockOff == ADC_AutoClockOff_Enable)
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{
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/* Enable the auto clock off feature */
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ADC->CLR4 |= ADC_AutoClockOff_Enable;
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}
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else
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{
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/* Disable the auto clock off feature */
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ADC->CLR4 &= ADC_AutoClockOff_Disable;
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}
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/* Clear conversion prescaler CNVP[2:0], sampling prescaler SMPP[2:0] bits
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and Sample prescaler enable SPEN bit */
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ADC->CLR1 &= ADC_Prescalers_Mask;
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/* Set conversion prescaler value (sampling and conversion prescalers are equal
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while SPEN bit is reset */
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ADC->CLR1 |= (ADC_InitStruct->ADC_ConversionPrescaler<<5);
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/* In case ADC_SamplingPrescaler member is different from the conversion one */
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if(ADC_InitStruct->ADC_SamplingPrescaler != ADC_InitStruct->ADC_ConversionPrescaler)
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{
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/* Set the sampling prescaler value */
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ADC->CLR1 |= ADC_InitStruct->ADC_SamplingPrescaler;
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/* Set SPEN bit (sampling and conversion prescalers are different */
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ADC->CLR1 = (ADC->CLR1 | ADC_SPEN_Mask);
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}
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/* Clear first channel to be converted FCH[3:0] bits */
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ADC->CLR2 &= ADC_FirstChannel_Mask;
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/* Set the first channel to be converted */
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ADC->CLR2 |= ADC_InitStruct->ADC_FirstChannel;
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/* Clear number of channels to be converted NCH[3:0] bits */
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ADC->CLR2 &= ADC_ChannelNumber_Mask;
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/* Set the number of channels to be converted */
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ADC->CLR2 |= ((ADC_InitStruct->ADC_ChannelNumber)-1<<6);
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}
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/*******************************************************************************
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* Function Name : ADC_StructInit
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* Description : Fills each ADC_InitStruct member with its default value.
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* Input : - ADC_InitStruct: pointer to an ADC_InitTypeDef structure
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which will be initialized.
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* Output : None
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* Return : None.
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*******************************************************************************/
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void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
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{
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/* Initialize the ADC_ConversionMode member */
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ADC_InitStruct->ADC_ConversionMode = ADC_ConversionMode_OneShot;
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/* Initialize the ADC_ExtTrigger member */
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ADC_InitStruct->ADC_ExtTrigger = ADC_ExtTrigger_Disable;
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/* Initialize the ADC_AutoClockOff member */
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ADC_InitStruct->ADC_AutoClockOff = ADC_AutoClockOff_Disable;
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/* Initialize the ADC_SamplingPrescaler member */
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ADC_InitStruct->ADC_SamplingPrescaler = 0;
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/* Initialize the ADC_ConversionPrescaler member */
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ADC_InitStruct->ADC_ConversionPrescaler = 0;
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/* Initialize the ADC_FirstChannel member */
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ADC_InitStruct->ADC_FirstChannel = ADC_CHANNEL0;
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/* Initialize the ADC_ChannelNumber member */
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ADC_InitStruct->ADC_ChannelNumber = 1;
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}
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/*******************************************************************************
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* Function Name : ADC_StartCalibration
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* Description : Starts the ADC Calibration. Calibration average enabled/disabled.
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* Input : - ADC_CalibAverage: Enables or disables ADC calibration average.
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* This parameter can be one of the following values:
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* - ADC_CalibAverage_Enable: enable calibration average
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* - ADC_CalibAverage_Disable: disable calibration average
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* Output : None
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* Return : None
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*******************************************************************************/
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void ADC_StartCalibration(u16 ADC_CalibAverage)
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{
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if (ADC_CalibAverage == ADC_CalibAverage_Enable)
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{
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/* Enable ADC Calibration Average */
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ADC->CLR4 &= ADC_CalibAverage_Enable;
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}
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else
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{
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/* Disable ADC Calibration Average */
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ADC->CLR4 |= ADC_CalibAverage_Disable;
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}
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/* Start Calibration */
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ADC->CLR0 |= ADC_Calibration_ON;
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}
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/*******************************************************************************
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* Function Name : ADC_GetCalibrationStatus
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* Description : Get the ADC Calibration Status.
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* Input : None
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* Output : None
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* Return : The NewState of the ADC calibration (SET or RESET).
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*******************************************************************************/
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FlagStatus ADC_GetCalibrationStatus(void)
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{
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/* Check the status of the ADC calibration */
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if((ADC->CLR0 & ADC_Calibration_Mask) != RESET)
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{
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/* Return SET if ADC Calibration is on going */
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return SET;
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}
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else
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{
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/* Return RESET if ADC Calibration is finished */
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return RESET;
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}
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}
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/*******************************************************************************
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* Function Name : ADC_ConversionCmd
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* Description : Starts or stops the ADC conversion.
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* Input : - ADC_Conversion: specifies the ADC command to apply.
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* This parameter can be one of the following values:
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* - ADC_Conversion_Start: start conversion
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* - ADC_Conversion_Stop: stop conversion
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* Output : None
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* Return : None
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*******************************************************************************/
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void ADC_ConversionCmd (u16 ADC_Conversion)
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{
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if (ADC_Conversion == ADC_Conversion_Start)
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{
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/* Start the ADC Conversion */
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ADC->CLR0 |= ADC_Conversion_Start;
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}
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else
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{
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/* Stop the ADC Conversion */
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ADC->CLR0 &= ADC_Conversion_Stop;
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}
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}
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/*******************************************************************************
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* Function Name : ADC_GetSTARTBitStatus
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* Description : Gets the ADC START/STOP bit Status.
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* Input : None
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* Output : None
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* Return : The NewState of the ADC START/STOP bit (SET or RESET).
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*******************************************************************************/
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FlagStatus ADC_GetSTARTBitStatus(void)
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{
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/* Check the status of the ADC START/STOP bit */
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if((ADC->CLR0 & ADC_Conversion_Start) != RESET)
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{
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/* Return SET if ADC Conversion is started */
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return SET;
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}
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else
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{
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/* Return RESET if ADC Conversion is stopped */
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return RESET;
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}
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}
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/*******************************************************************************
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* Function Name : ADC_Cmd
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* Description : Enables the ADC peripheral or puts it in power down mode.
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* - NewState: new state of the ADC peripheral.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None.
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*******************************************************************************/
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void ADC_Cmd(FunctionalState NewState)
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{
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if (NewState == DISABLE)
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{
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/* Enable ADC Power Down Mode */
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ADC->CLR4 |= ADC_PowerDown_Enable;
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}
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else
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{
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/* Disable ADC Power Down Mode */
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ADC->CLR4 &= ADC_PowerDown_Disable;
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}
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}
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/*******************************************************************************
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* Function Name : ADC_AutoClockOffConfig
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* Description : Enables or disables the Auto clock off feature.
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* - NewState: new state of the Auto clock off feature. This
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* parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None.
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*******************************************************************************/
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void ADC_AutoClockOffConfig(FunctionalState NewState)
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{
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if (NewState == ENABLE)
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{
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/* Enable ADC Auto Clock Off */
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ADC->CLR4 |= ADC_AutoClockOff_Enable;
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}
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else
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{
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/* Disable ADC Auto Clock Off */
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ADC->CLR4 &= ADC_AutoClockOff_Disable;
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}
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}
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/*******************************************************************************
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* Function Name : ADC_AnalogWatchdogConfig
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* Description : Configures the analog input channel to be used for the selected
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* Analog Watchdog and defines its corresponding High and Low
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* threshold values.
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* Input : - ADC_AnalogWatchdog: specifies the analog watchdog which will
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* be affected to the desired converted channel. This parameter
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* can be one of the following values:
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* - ADC_AnalogWatchdog0: select analog watchdog 0
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* - ADC_AnalogWatchdog1: select analog watchdog 1
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* - ADC_AnalogWatchdog2: select analog watchdog 2
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* - ADC_AnalogWatchdog3: select analog watchdog 3
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* - ADC_CHANNEL: specifies the channel linked to the selected
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* analog watchdog. This parameter can be ADC_CHANNELx where x
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* can be (0..15)
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* - LowThreshold: Low Threshold for the selected Analog watchdog
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* - HighThreshold: High Threshold for the selected Analog watchdog
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* Output : None
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* Return : None
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*******************************************************************************/
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void ADC_AnalogWatchdogConfig(u16 ADC_AnalogWatchdog, u8 ADC_CHANNEL,
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u16 LowThreshold, u16 HighThreshold)
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{
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switch (ADC_AnalogWatchdog)
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{
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/* Set the selected channel and their corresponding High and Low thresholds */
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case ADC_AnalogWatchdog0 :
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ADC->TRA0 = (ADC->TRA0 & ADC_AnalogWatchdogChannel_Mask) | ((u16) ADC_CHANNEL<<10);
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ADC->TRA0 = (ADC->TRA0 & ADC_Threshold_Mask) | HighThreshold;
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ADC->TRB0 = (ADC->TRB0 & ADC_Threshold_Mask) | LowThreshold;
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break;
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case ADC_AnalogWatchdog1 :
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ADC->TRA1 = (ADC->TRA1 & ADC_AnalogWatchdogChannel_Mask) | ((u16) ADC_CHANNEL<<10);
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ADC->TRA1 = (ADC->TRA1 & ADC_Threshold_Mask) | HighThreshold;
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ADC->TRB1 = (ADC->TRB1 & ADC_Threshold_Mask) | LowThreshold;
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break;
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case ADC_AnalogWatchdog2 :
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ADC->TRA2 = (ADC->TRA2 & ADC_AnalogWatchdogChannel_Mask) | ((u16) ADC_CHANNEL<<10);
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ADC->TRA2 = (ADC->TRA2 & ADC_Threshold_Mask) | HighThreshold;
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ADC->TRB2 = (ADC->TRB2 & ADC_Threshold_Mask) | LowThreshold;
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break;
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case ADC_AnalogWatchdog3 :
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ADC->TRA3 = (ADC->TRA3 & ADC_AnalogWatchdogChannel_Mask) | ((u16) ADC_CHANNEL<<10);
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ADC->TRA3 = (ADC->TRA3 & ADC_Threshold_Mask) | HighThreshold;
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ADC->TRB3 = (ADC->TRB3 & ADC_Threshold_Mask) | LowThreshold;
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break;
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default:
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break;
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}
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}
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/*******************************************************************************
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* Function Name : ADC_AnalogWatchdogCmd
|
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* Description : Enables or disables the selected analog Watchdog.
|
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* Input : - ADC_AnalogWatchdog: specifies the analog watchdog to be
|
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* enabled or disabled. This parameter can be one of the
|
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* following values:
|
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* - ADC_AnalogWatchdog0: select analog watchdog 0
|
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* - ADC_AnalogWatchdog1: select analog watchdog 1
|
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* - ADC_AnalogWatchdog2: select analog watchdog 2
|
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* - ADC_AnalogWatchdog3: select analog watchdog 3
|
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* - NewState: new state of the specified analog watchdog.
|
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
|
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* Return : None.
|
||||
*******************************************************************************/
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void ADC_AnalogWatchdogCmd(u16 ADC_AnalogWatchdog, FunctionalState NewState)
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{
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if (NewState == ENABLE)
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{
|
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/* Enable the selected ADC AnalogWatchdogx */
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switch (ADC_AnalogWatchdog)
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{
|
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case ADC_AnalogWatchdog0 :
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ADC->TRB0 |= ADC_AnalogWatchdog_Enable;
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break;
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case ADC_AnalogWatchdog1 :
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ADC->TRB1 |= ADC_AnalogWatchdog_Enable;
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break;
|
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case ADC_AnalogWatchdog2 :
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ADC->TRB2 |= ADC_AnalogWatchdog_Enable;
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break;
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case ADC_AnalogWatchdog3 :
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ADC->TRB3 |= ADC_AnalogWatchdog_Enable;
|
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break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected ADC AnalogWatchdogx */
|
||||
switch (ADC_AnalogWatchdog)
|
||||
{
|
||||
case ADC_AnalogWatchdog0 :
|
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ADC->TRB0 &= ADC_AnalogWatchdog_Disable;
|
||||
break;
|
||||
|
||||
case ADC_AnalogWatchdog1 :
|
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ADC->TRB1 &= ADC_AnalogWatchdog_Disable;
|
||||
break;
|
||||
|
||||
case ADC_AnalogWatchdog2 :
|
||||
ADC->TRB2 &= ADC_AnalogWatchdog_Disable;
|
||||
break;
|
||||
|
||||
case ADC_AnalogWatchdog3 :
|
||||
ADC->TRB3 &= ADC_AnalogWatchdog_Disable;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_GetAnalogWatchdogResult
|
||||
* Description : Returns the comparison result of the selected analog watchdog.
|
||||
* Input : - ADC_AnalogWatchdog: specifies the analog watchdog channel
|
||||
* which its comparison result will be returned. This parameter
|
||||
* can be one of the following values:
|
||||
* - ADC_AnalogWatchdog0: select analog watchdog 0
|
||||
* - ADC_AnalogWatchdog1: select analog watchdog 1
|
||||
* - ADC_AnalogWatchdog2: select analog watchdog 2
|
||||
* - ADC_AnalogWatchdog3: select analog watchdog 3
|
||||
* Output : None
|
||||
* Return : The analog watchdog comparaison result value
|
||||
*******************************************************************************/
|
||||
u16 ADC_GetAnalogWatchdogResult(u16 ADC_AnalogWatchdog)
|
||||
{
|
||||
/* Return the selected ADC AnalogWatchdogx comparaison result */
|
||||
switch(ADC_AnalogWatchdog)
|
||||
{
|
||||
case ADC_AnalogWatchdog0 :
|
||||
return ((ADC->PBR & ADC_AnalogWatchdog)>>4);
|
||||
|
||||
case ADC_AnalogWatchdog1 :
|
||||
return ((ADC->PBR & ADC_AnalogWatchdog)>>6);
|
||||
|
||||
case ADC_AnalogWatchdog2 :
|
||||
return ((ADC->PBR & ADC_AnalogWatchdog)>>8);
|
||||
|
||||
case ADC_AnalogWatchdog3 :
|
||||
return ((ADC->PBR & ADC_AnalogWatchdog)>>10);
|
||||
|
||||
default : return (0xFF); /* if a wrong value of ADC_AnalogWatchdog is selected */
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_InjectedConversionConfig
|
||||
* Description : Configures the start trigger level for the injected channels
|
||||
* and the injected analog input channels to be converted.
|
||||
* Input : - ADC_Injec_ExtTrigger: specifies the start trigger level.
|
||||
* This parameter can be one of the following values:
|
||||
* - ADC_Injec_ExtTrigger_Disable : external trigger disabled
|
||||
* - ADC_Injec_ExtTrigger_RisingEdge: external trigger
|
||||
* configured as rising edge of PWM Timer TRGO signal
|
||||
* - ADC_Injec_ExtTrigger_FallingEdge: external trigger
|
||||
* configured as falling edge of PWM Timer TRGO signal
|
||||
* - FirstChannel: specifies the first injected channel to be
|
||||
* converted.
|
||||
* This parameter can be ADC_CHANNELx where x can be (0..15).
|
||||
* - ChannelNumber: specifies the Number of the injected channels
|
||||
* to be converted. This parameter can be a value from 1 to 16.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void ADC_InjectedConversionConfig(u16 ADC_Injec_ExtTrigger, u8 FirstChannel, u8 ChannelNumber)
|
||||
{
|
||||
/* Configure the external start injected conversion trigger */
|
||||
switch (ADC_Injec_ExtTrigger)
|
||||
{
|
||||
case ADC_Injec_ExtTrigger_Disable :
|
||||
/* Disable the external trigger and start the injected conversion by software */
|
||||
ADC->CLR3 &= ADC_Injec_ExtTrigger_Disable ;
|
||||
break;
|
||||
case ADC_Injec_ExtTrigger_RisingEdge :
|
||||
/* Start injected conversion on rising edge of the external trigger (PWM) */
|
||||
ADC->CLR3 |= ADC_Injec_ExtTrigger_RisingEdge;
|
||||
break;
|
||||
case ADC_Injec_ExtTrigger_FallingEdge :
|
||||
/* Start injected conversion on falling edge of the external trigger (PWM) */
|
||||
ADC->CLR3 |= ADC_Injec_ExtTrigger_Enable;
|
||||
ADC->CLR3 &= ADC_Injec_ExtTrigger_FallingEdge;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
/* Clear first injected channel to be converted JFCH[3:0] bits */
|
||||
ADC->CLR3 &= ADC_FirstChannel_Mask;
|
||||
/* Set the first injected channel to be converted */
|
||||
ADC->CLR3 |= FirstChannel;
|
||||
/* Clear number of injected channels to be converted JNCH[3:0] bits */
|
||||
ADC->CLR3 &= ADC_ChannelNumber_Mask;
|
||||
/* Set the number of injected channels to be converted */
|
||||
ADC->CLR3 |= ((ChannelNumber-1)<<6);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_StartInjectedConversion
|
||||
* Description : Starts by software the conversion of the injected input channels.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void ADC_StartInjectedConversion(void)
|
||||
{
|
||||
/* Start the injected ADC Conversion */
|
||||
ADC->CLR3 |= ADC_Injec_ConversionStart;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_GetConversionValue
|
||||
* Description : Reads the conversion result from the appropriate data register.
|
||||
* Input : - ADC_CHANNEL :specifies the ADC channel which its conversion
|
||||
* value have to be returned. This parameter can be ADC_CHANNELx
|
||||
* where x can be (0..15) to select channelx
|
||||
* Output : None
|
||||
* Return : The returned value holds the conversion result of the selected
|
||||
* channel.
|
||||
*******************************************************************************/
|
||||
u16 ADC_GetConversionValue(u8 ADC_CHANNEL)
|
||||
{
|
||||
/* Return the conversion result of the selected channel */
|
||||
return *((u16 *)(ADC_BASE + ((ADC_CHANNEL<<2) + ADC_DataRegisterOffset)));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_ITConfig
|
||||
* Description : Enables or disables the specified ADC interrupts.
|
||||
* Input : - ADC_IT: specifies the ADC interrupts to be enabled or disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* - ADC_IT_ECH: End of chain conversion interrupt
|
||||
* - ADC_IT_EOC: End of channel conversion interrupt
|
||||
* - ADC_IT_JECH: Injected end of chain conversion interrupt
|
||||
* - ADC_IT_JEOC: Injected end of channel conversion interrupt
|
||||
* - ADC_IT_AnalogWatchdog0_LowThreshold:
|
||||
* Analog Watchdog 0 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog0_HighThreshold:
|
||||
* Analog Watchdog 0 HighThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog1_LowThreshold:
|
||||
* Analog Watchdog 1 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog1_HighThreshold:
|
||||
* Analog Watchdog 1 HighThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog2_LowThreshold:
|
||||
* Analog Watchdog 2 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog2_HighThreshold:
|
||||
* Analog Watchdog 2 HighThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog3_LowThreshold:
|
||||
* Analog Watchdog 3 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog3_HighThreshold:
|
||||
* Analog Watchdog 5 HighThreshold interrupt
|
||||
* - ADC_IT_ALL: All interrupts
|
||||
* - NewState: new state of the specified ADC interrupts.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void ADC_ITConfig(u16 ADC_IT, FunctionalState NewState)
|
||||
{
|
||||
if (NewState == ENABLE)
|
||||
{
|
||||
/* Enable the selected ADC interrupts */
|
||||
ADC->IMR |= ADC_IT;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected ADC interrupts */
|
||||
ADC->IMR &= ~ADC_IT;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_DMAConfig
|
||||
* Description : Configures the ADC’s DMA interface.
|
||||
* Input : - ADC_DMA_CHANNEL: specifies the channels to be enabled or
|
||||
* disabled for DMA transfer. This parameter can be any
|
||||
* combination of ADC_DMA_CHANNELx where x can be (0..15).
|
||||
* - NewState: new state of the specified ADC DMA channels.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void ADC_DMAConfig(u16 ADC_DMA_CHANNEL, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Enable DMA for the selected channels */
|
||||
ADC->DMAR |= ADC_DMA_CHANNEL ;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable DMA for the selected channels */
|
||||
ADC->DMAR &= ~ADC_DMA_CHANNEL;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_DMACmd
|
||||
* Description : Enable or disable the DMA transfer for the ADC.
|
||||
* Input : - ADC_DMA: specifies the DMA command. This parameter can be
|
||||
* one of the following values:
|
||||
* - ADC_DMA_Disable: disable the DMA capability
|
||||
* - ADC_DMA_Enable: enabled by setting the global
|
||||
* enable bit
|
||||
* - ADC_DMA_ExtTrigger_HighLevel: enabled by detection of
|
||||
* high level of TIM2 OC2 signal
|
||||
* - ADC_DMA_ExtTrigger_LowLevel: enabled by detection of
|
||||
* low level of TIM2 OC2 signal
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void ADC_DMACmd(u16 ADC_DMA)
|
||||
{
|
||||
/* Configure the DMA external trigger enable */
|
||||
switch (ADC_DMA)
|
||||
{
|
||||
case ADC_DMA_Disable :
|
||||
/* Disable DMA transfer */
|
||||
ADC->DMAE &= ADC_DMA_Disable;
|
||||
break;
|
||||
|
||||
case ADC_DMA_Enable :
|
||||
/* Enable DMA transfer */
|
||||
ADC->DMAE |= ADC_DMA_Enable;
|
||||
break;
|
||||
|
||||
case ADC_DMA_ExtTrigger_HighLevel :
|
||||
/* Enable DMA transfer on high level of the external trigger (TIM2) */
|
||||
ADC->DMAE &= ADC_DMA_Disable;
|
||||
ADC->DMAE |= ADC_DMA_ExtTrigger_HighLevel;
|
||||
break;
|
||||
|
||||
case ADC_DMA_ExtTrigger_LowLevel :
|
||||
/* Enable DMA transfer on low level of the external trigger (TIM2) */
|
||||
ADC->DMAE |= ADC_DMA_ExtEnable_Mask;
|
||||
ADC->DMAE &= ADC_DMA_ExtTrigger_LowLevel;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_GetDMAFirstEnabledChannel
|
||||
* Description : Gets the first DMA-enabled channel configured at the time that
|
||||
* DMA was last globally enabled.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The first DMA enabled channel
|
||||
*******************************************************************************/
|
||||
u16 ADC_GetDMAFirstEnabledChannel(void)
|
||||
{
|
||||
/* Return the DMA first enabled channel */
|
||||
return (ADC->DMAE & ADC_DMAFirstEnabledChannel_Mask);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_GetFlagStatus
|
||||
* Description : Checks whether the specified ADC flag is set or not.
|
||||
* Input : - ADC_FLAG: specifies the ADC flag to check. This parameter
|
||||
* can be one of the following values:
|
||||
* - ADC_FLAG_ECH: End of chain conversion Flag
|
||||
* - ADC_FLAG_EOC: End of channel conversion Flag
|
||||
* - ADC_FLAG_JECH: End of injected chain conversion Flag
|
||||
* - ADC_FLAG_JEOC: End of injected channel conversion Flag
|
||||
* - ADC_FLAG_AnalogWatchdog0_LowThreshold:
|
||||
* Analog Watchdog 0 LowThreshold Flag
|
||||
* - ADC_FLAG_AnalogWatchdog0_HighThreshold:
|
||||
* Analog Watchdog 0 HighThreshold Flag
|
||||
* - ADC_FLAG_AnalogWatchdog1_LowThreshold:
|
||||
* Analog Watchdog 1 LowThreshold Flag
|
||||
* - ADC_FLAG_AnalogWatchdog1_HighThreshold:
|
||||
* Analog Watchdog 1 HighThreshold Flag
|
||||
* - ADC_FLAG_AnalogWatchdog2_LowThreshold:
|
||||
* Analog Watchdog 2 LowThreshold Flag
|
||||
* - ADC_FLAG_AnalogWatchdog2_HighThreshold:
|
||||
* Analog Watchdog 2 HighThreshold Flag
|
||||
* - ADC_FLAG_AnalogWatchdog3_LowThreshold:
|
||||
* Analog Watchdog 3 LowThreshold Flag
|
||||
* - ADC_FLAG_AnalogWatchdog3_HighThreshold:
|
||||
* Analog Watchdog 3 HighThreshold Flag
|
||||
* Output : None
|
||||
* Return : The new state of the ADC_FLAG (SET or RESET).
|
||||
*******************************************************************************/
|
||||
FlagStatus ADC_GetFlagStatus(u16 ADC_FLAG)
|
||||
{
|
||||
/* Check the status of the specified ADC flag */
|
||||
if((ADC->PBR & ADC_FLAG) != RESET)
|
||||
{
|
||||
/* Return SET if ADC_FLAG is set */
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Return RESET if ADC_FLAG is reset */
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_ClearFlag
|
||||
* Description : Clears the ADC’s pending flags.
|
||||
* Input : - ADC_FLAG: specifies the flag to clear. This parameter can
|
||||
* be any combination of the following values:
|
||||
* - ADC_FLAG_ECH: End of chain conversion flag
|
||||
* - ADC_FLAG_EOC: End of channel conversion flag
|
||||
* - ADC_FLAG_JECH: Injected end of chain conversion flag
|
||||
* - ADC_FLAG_JEOC: Injected end of channel conversion flag
|
||||
* - ADC_FLAG_AnalogWatchdog0_LowThreshold:
|
||||
* Analog Watchdog 0 LowThreshold flag
|
||||
* - ADC_FLAG_AnalogWatchdog0_HighThreshold:
|
||||
* Analog Watchdog 0 HighThreshold flag
|
||||
* - ADC_FLAG_AnalogWatchdog1_LowThreshold:
|
||||
* Analog Watchdog 1 LowThreshold flag
|
||||
* - ADC_FLAG_AnalogWatchdog1_HighThreshold:
|
||||
* Analog Watchdog 1 HighThreshold flag
|
||||
* - ADC_FLAG_AnalogWatchdog2_LowThreshold:
|
||||
* Analog Watchdog 2 LowThreshold flag
|
||||
* - ADC_FLAG_AnalogWatchdog2_HighThreshold:
|
||||
* Analog Watchdog 2 HighThreshold flag
|
||||
* - ADC_FLAG_AnalogWatchdog3_LowThreshold:
|
||||
* Analog Watchdog 3 LowThreshold flag
|
||||
* - ADC_FLAG_AnalogWatchdog3_HighThreshold:
|
||||
* Analog Watchdog 3 HighThreshold flag
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void ADC_ClearFlag(u16 ADC_FLAG)
|
||||
{
|
||||
/* Clear the selected ADC flag */
|
||||
ADC->PBR = ADC_FLAG;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_GetITStatus
|
||||
* Description : Checks whether the specified ADC interrupt has occured or not.
|
||||
* Input : - ADC_IT: specifies the ADC interrupt source to check. This
|
||||
* parameter can be one of the following values:
|
||||
* - ADC_IT_ECH :End of chain conversion interrupt
|
||||
* - ADC_IT_EOC :End of channel conversion interrupt
|
||||
* - ADC_IT_JECH :End of injected chain conversion interrupt
|
||||
* - ADC_IT_JEOC :End of injected channel conversion interrupt
|
||||
* - ADC_IT_AnalogWatchdog0_LowThreshold:
|
||||
* Analog Watchdog 0 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog0_HighThreshold:
|
||||
* Analog Watchdog 0 HighThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog1_LowThreshold:
|
||||
* Analog Watchdog 1 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog1_HighThreshold:
|
||||
* Analog Watchdog 1 HighThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog2_LowThreshold:
|
||||
* Analog Watchdog 2 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog2_HighThreshold:
|
||||
* Analog Watchdog 2 HighThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog3_LowThreshold:
|
||||
* Analog Watchdog 3 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog3_HighThreshold:
|
||||
* Analog Watchdog 3 HighThreshold interrupt
|
||||
* Output : None
|
||||
* Return : The new state of the ADC_IT (SET or RESET).
|
||||
*******************************************************************************/
|
||||
ITStatus ADC_GetITStatus(u16 ADC_IT)
|
||||
{
|
||||
/* Check the status of the specified ADC interrupt */
|
||||
if((ADC->PBR & ADC_IT) != RESET)
|
||||
{
|
||||
/* Return SET if the ADC interrupt flag is set */
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Return RESET if the ADC interrupt flag is reset */
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_ClearITPendingBit
|
||||
* Description : Clears the ADC’s interrupt pending bits.
|
||||
* Input : - ADC_IT: specifies the interrupt pending bit to clear. This
|
||||
* parameter can be can be any combination of the following
|
||||
* values:
|
||||
* - ADC_IT_ECH: End of chain conversion interrupt
|
||||
* - ADC_IT_EOC: End of channel conversion interrupt
|
||||
* - ADC_IT_JECH: Injected end of chain conversion interrupt
|
||||
* - ADC_IT_JEOC: Injected end of channel conversion interrupt
|
||||
* - ADC_IT_AnalogWatchdog0_LowThreshold:
|
||||
* Analog Watchdog 0 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog0_HighThreshold:
|
||||
* Analog Watchdog 0 HighThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog1_LowThreshold:
|
||||
* Analog Watchdog 1 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog1_HighThreshold:
|
||||
* Analog Watchdog 1 HighThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog2_LowThreshold:
|
||||
* Analog Watchdog 2 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog2_HighThreshold:
|
||||
* Analog Watchdog 2 HighThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog3_LowThreshold:
|
||||
* Analog Watchdog 3 LowThreshold interrupt
|
||||
* - ADC_IT_AnalogWatchdog3_HighThreshold:
|
||||
* Analog Watchdog 5 HighThreshold interrupt
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void ADC_ClearITPendingBit(u16 ADC_IT)
|
||||
{
|
||||
/* Clear the selected ADC interrupts pending bits */
|
||||
ADC->PBR = ADC_IT;
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
765
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_can.c
Normal file
765
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_can.c
Normal file
|
@ -0,0 +1,765 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_can.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the CAN software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_can.h"
|
||||
#include "75x_mrcc.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/* Macro Name : xxx_ID_MSK, xxx_ID_ARB */
|
||||
/* Description : Form the Mask and Arbitration registers value to filter */
|
||||
/* a range of identifiers or a fixed identifier, for standard*/
|
||||
/* and extended IDs */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
#define RANGE_ID_MSK(range_start, range_end) (~((range_end) - (range_start)))
|
||||
#define RANGE_ID_ARB(range_start, range_end) ((range_start) & (range_end))
|
||||
|
||||
#define FIXED_ID_MSK(id) RANGE_ID_MSK((id), (id))
|
||||
#define FIXED_ID_ARB(id) RANGE_ID_ARB((id), (id))
|
||||
|
||||
#define STD_RANGE_ID_MSK(range_start, range_end) ((u16)((RANGE_ID_MSK((range_start), (range_end)) & 0x7FF) << 2))
|
||||
#define STD_RANGE_ID_ARB(range_start, range_end) ((u16)(RANGE_ID_ARB((range_start), (range_end)) << 2))
|
||||
|
||||
#define STD_FIXED_ID_MSK(id) ((u16)((FIXED_ID_MSK(id) & 0x7FF) << 2))
|
||||
#define STD_FIXED_ID_ARB(id) ((u16)(FIXED_ID_ARB(id) << 2))
|
||||
|
||||
#define EXT_RANGE_ID_MSK_L(range_start, range_end) ((u16)(RANGE_ID_MSK((range_start), (range_end)) >> 11))
|
||||
#define EXT_RANGE_ID_MSK_H(range_start, range_end) ((u16)(STD_RANGE_ID_MSK((range_start), (range_end)) | ((RANGE_ID_MSK((range_start), (range_end)) >> 27) & 0x03)))
|
||||
#define EXT_RANGE_ID_ARB_L(range_start, range_end) ((u16)(RANGE_ID_ARB((range_start), (range_end)) >> 11))
|
||||
#define EXT_RANGE_ID_ARB_H(range_start, range_end) ((u16)(STD_RANGE_ID_ARB((range_start), (range_end)) | ((RANGE_ID_ARB((range_start), (range_end)) >> 27) & 0x03)))
|
||||
|
||||
#define EXT_FIXED_ID_MSK_L(id) ((u16)(FIXED_ID_MSK(id) >> 11))
|
||||
#define EXT_FIXED_ID_MSK_H(id) ((u16)(STD_FIXED_ID_MSK(id) | ((FIXED_ID_MSK(id) >> 27) & 0x03)))
|
||||
#define EXT_FIXED_ID_ARB_L(id) ((u16)(FIXED_ID_ARB(id) >> 11))
|
||||
#define EXT_FIXED_ID_ARB_H(id) ((u16)(STD_FIXED_ID_ARB(id) | ((FIXED_ID_ARB(id) >> 27) & 0x03)))
|
||||
|
||||
/* macro to format the timing register value from the timing parameters*/
|
||||
#define CAN_TIMING(tseg1, tseg2, sjw, brp) ((((tseg2-1) & 0x07) << 12) | (((tseg1-1) & 0x0F) << 8) | (((sjw-1) & 0x03) << 6) | ((brp-1) & 0x3F))
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* array of pre-defined timing parameters for standard bitrates*/
|
||||
u16 CanTimings[] = { /* value bitrate NTQ TSEG1 TSEG2 SJW BRP */
|
||||
CAN_TIMING(11, 4, 4, 5), /* 0x3AC4 100 kbit/s 16 11 4 4 5 */
|
||||
CAN_TIMING(11, 4, 4, 4), /* 0x3AC3 125 kbit/s 16 11 4 4 4 */
|
||||
CAN_TIMING( 4, 3, 3, 4), /* 0x2383 250 kbit/s 8 4 3 3 4 */
|
||||
CAN_TIMING(13, 2, 1, 1), /* 0x1C00 500 kbit/s 16 13 2 1 1 */
|
||||
CAN_TIMING( 4, 3, 1, 1), /* 0x2300 1 Mbit/s 8 4 3 1 1 */
|
||||
};
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
static u32 GetFreeIF(void);
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_DeInit
|
||||
* Description : Deinitializes the CAN peripheral registers to their default
|
||||
* reset values.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_DeInit (void)
|
||||
{
|
||||
/* Reset the CAN registers values*/
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_CAN,ENABLE);
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_CAN,DISABLE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_Init
|
||||
* Description : Initializes the CAN peripheral according to the specified
|
||||
* parameters in the CAN_InitStruct.
|
||||
* Input : CAN_InitStruct: pointer to a CAN_InitTypeDef structure that
|
||||
* contains the configuration information for the CAN peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_Init(CAN_InitTypeDef* CAN_InitStruct)
|
||||
{
|
||||
CAN_EnterInitMode(CAN_CR_CCE | CAN_InitStruct->CAN_ConfigParameters);
|
||||
CAN_SetBitrate(CAN_InitStruct->CAN_Bitrate);
|
||||
CAN_LeaveInitMode();
|
||||
CAN_LeaveTestMode();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_StructInit
|
||||
* Description : Fills each CAN_InitStruct member with its reset value.
|
||||
* Input : CAN_InitStruct : pointer to a CAN_InitTypeDef structure which
|
||||
* will be initialized.
|
||||
* Output : None
|
||||
* Return : None.
|
||||
*******************************************************************************/
|
||||
void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct)
|
||||
{
|
||||
/* Reset CAN init structure parameters values */
|
||||
CAN_InitStruct->CAN_ConfigParameters = 0x0;
|
||||
CAN_InitStruct->CAN_Bitrate = 0x2301;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_SetBitrate
|
||||
* Description : Setups a standard CAN bitrate.
|
||||
* Input : bitrate: specifies the bit rate.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_SetBitrate(u32 bitrate)
|
||||
{
|
||||
CAN->BTR = CanTimings[bitrate]; /* write the predefined timing value */
|
||||
CAN->BRPR = 0; /* clear the Extended Baud Rate Prescaler */
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_SetTiming
|
||||
* Description : Setups the CAN timing with specific parameters
|
||||
* Input : - tseg1: specifies Time Segment before the sample point.
|
||||
* This parameter must be a number between 1 and 16.
|
||||
* - tseg2: Time Segment after the sample point. This parameter
|
||||
* must be a number between 1 and 8.
|
||||
* - sjw: Synchronisation Jump Width. This parameter must be
|
||||
* a number between 1 and 4.
|
||||
* - brp: Baud Rate Prescaler. This parameter must be a number
|
||||
* between 1 and 1024.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_SetTiming(u32 tseg1, u32 tseg2, u32 sjw, u32 brp)
|
||||
{
|
||||
CAN->BTR = CAN_TIMING(tseg1, tseg2, sjw, brp);
|
||||
CAN->BRPR = ((brp-1) >> 6) & 0x0F;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : GetFreeIF
|
||||
* Description : Searchs the first free message interface, starting from 0.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : A free message interface number (0 or 1) if found, else 2
|
||||
*******************************************************************************/
|
||||
static u32 GetFreeIF(void)
|
||||
{
|
||||
if ((CAN->sMsgObj[0].CRR & CAN_CRR_BUSY) == 0)
|
||||
return 0;
|
||||
else if ((CAN->sMsgObj[1].CRR & CAN_CRR_BUSY) == 0)
|
||||
return 1;
|
||||
else
|
||||
return 2;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_SetUnusedMsgObj
|
||||
* Description : Configures the message object as unused
|
||||
* Input : msgobj: specifies the Message object number, from 0 to 31.
|
||||
* Output : None
|
||||
* Return : An ErrorStatus enumuration value:
|
||||
* - SUCCESS: Interface to treat the message
|
||||
* - ERROR: No interface found to treat the message
|
||||
*******************************************************************************/
|
||||
ErrorStatus CAN_SetUnusedMsgObj(u32 msgobj)
|
||||
{
|
||||
u32 msg_if=0;
|
||||
|
||||
if ((msg_if = GetFreeIF()) == 2)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD
|
||||
| CAN_CMR_MASK
|
||||
| CAN_CMR_ARB
|
||||
| CAN_CMR_CONTROL
|
||||
| CAN_CMR_DATAA
|
||||
| CAN_CMR_DATAB;
|
||||
|
||||
CAN->sMsgObj[msg_if].M1R = 0;
|
||||
CAN->sMsgObj[msg_if].M2R = 0;
|
||||
|
||||
CAN->sMsgObj[msg_if].A1R = 0;
|
||||
CAN->sMsgObj[msg_if].A2R = 0;
|
||||
|
||||
CAN->sMsgObj[msg_if].MCR = 0;
|
||||
|
||||
CAN->sMsgObj[msg_if].DA1R = 0;
|
||||
CAN->sMsgObj[msg_if].DA2R = 0;
|
||||
CAN->sMsgObj[msg_if].DB1R = 0;
|
||||
CAN->sMsgObj[msg_if].DB2R = 0;
|
||||
|
||||
CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_SetTxMsgObj
|
||||
* Description : Configures the message object as TX.
|
||||
* Input : - msgobj: specifies the Message object number, from 0 to 31.
|
||||
* - idType: specifies the identifier type of the frames that
|
||||
* will be transmitted using this message object.
|
||||
* This parameter can be one of the following values:
|
||||
* - CAN_STD_ID (standard ID, 11-bit)
|
||||
* - CAN_EXT_ID (extended ID, 29-bit)
|
||||
* Output : None
|
||||
* Return : An ErrorStatus enumuration value:
|
||||
* - SUCCESS: Interface to treat the message
|
||||
* - ERROR: No interface found to treat the message
|
||||
*******************************************************************************/
|
||||
ErrorStatus CAN_SetTxMsgObj(u32 msgobj, u32 idType)
|
||||
{
|
||||
u32 msg_if=0;
|
||||
|
||||
if ((msg_if = GetFreeIF()) == 2)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD
|
||||
| CAN_CMR_MASK
|
||||
| CAN_CMR_ARB
|
||||
| CAN_CMR_CONTROL
|
||||
| CAN_CMR_DATAA
|
||||
| CAN_CMR_DATAB;
|
||||
|
||||
CAN->sMsgObj[msg_if].M1R = 0;
|
||||
CAN->sMsgObj[msg_if].A1R = 0;
|
||||
|
||||
if (idType == CAN_STD_ID)
|
||||
{
|
||||
CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR;
|
||||
CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR;
|
||||
}
|
||||
else
|
||||
{
|
||||
CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR | CAN_M2R_MXTD;
|
||||
CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR | CAN_A2R_XTD;
|
||||
}
|
||||
|
||||
CAN->sMsgObj[msg_if].MCR = CAN_MCR_TXIE | CAN_MCR_EOB;
|
||||
|
||||
CAN->sMsgObj[msg_if].DA1R = 0;
|
||||
CAN->sMsgObj[msg_if].DA2R = 0;
|
||||
CAN->sMsgObj[msg_if].DB1R = 0;
|
||||
CAN->sMsgObj[msg_if].DB2R = 0;
|
||||
|
||||
CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_SetRxMsgObj
|
||||
* Description : Configures the message object as RX.
|
||||
* Input : - msgobj: specifies the Message object number, from 0 to 31.
|
||||
* - idType: specifies the identifier type of the frames that
|
||||
* will be transmitted using this message object.
|
||||
* This parameter can be one of the following values:
|
||||
* - CAN_STD_ID (standard ID, 11-bit)
|
||||
* - CAN_EXT_ID (extended ID, 29-bit)
|
||||
* - idLow: specifies the low part of the identifier range used
|
||||
* for acceptance filtering.
|
||||
* - idHigh: specifies the high part of the identifier range
|
||||
* used for acceptance filtering.
|
||||
* - singleOrFifoLast: specifies the end-of-buffer indicator.
|
||||
* This parameter can be one of the following values:
|
||||
* - TRUE: for a single receive object or a FIFO receive
|
||||
* object that is the last one of the FIFO.
|
||||
* - FALSE: for a FIFO receive object that is not the
|
||||
* last one.
|
||||
* Output : None
|
||||
* Return : An ErrorStatus enumuration value:
|
||||
* - SUCCESS: Interface to treat the message
|
||||
* - ERROR: No interface found to treat the message
|
||||
*******************************************************************************/
|
||||
ErrorStatus CAN_SetRxMsgObj(u32 msgobj, u32 idType, u32 idLow, u32 idHigh, bool singleOrFifoLast)
|
||||
{
|
||||
u32 msg_if=0;
|
||||
|
||||
if ((msg_if = GetFreeIF()) == 2)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD
|
||||
| CAN_CMR_MASK
|
||||
| CAN_CMR_ARB
|
||||
| CAN_CMR_CONTROL
|
||||
| CAN_CMR_DATAA
|
||||
| CAN_CMR_DATAB;
|
||||
|
||||
if (idType == CAN_STD_ID)
|
||||
{
|
||||
CAN->sMsgObj[msg_if].M1R = 0;
|
||||
CAN->sMsgObj[msg_if].M2R = STD_RANGE_ID_MSK(idLow, idHigh);
|
||||
|
||||
CAN->sMsgObj[msg_if].A1R = 0;
|
||||
CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | STD_RANGE_ID_ARB(idLow, idHigh);
|
||||
}
|
||||
else
|
||||
{
|
||||
CAN->sMsgObj[msg_if].M1R = EXT_RANGE_ID_MSK_L(idLow, idHigh);
|
||||
CAN->sMsgObj[msg_if].M2R = CAN_M2R_MXTD | EXT_RANGE_ID_MSK_H(idLow, idHigh);
|
||||
|
||||
CAN->sMsgObj[msg_if].A1R = EXT_RANGE_ID_ARB_L(idLow, idHigh);
|
||||
CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_XTD | EXT_RANGE_ID_ARB_H(idLow, idHigh);
|
||||
}
|
||||
|
||||
CAN->sMsgObj[msg_if].MCR = CAN_MCR_RXIE | CAN_MCR_UMASK | (singleOrFifoLast ? CAN_MCR_EOB : 0);
|
||||
|
||||
CAN->sMsgObj[msg_if].DA1R = 0;
|
||||
CAN->sMsgObj[msg_if].DA2R = 0;
|
||||
CAN->sMsgObj[msg_if].DB1R = 0;
|
||||
CAN->sMsgObj[msg_if].DB2R = 0;
|
||||
|
||||
CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_InvalidateAllMsgObj
|
||||
* Description : Configures all the message objects as unused.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_InvalidateAllMsgObj(void)
|
||||
{
|
||||
u32 i=0;
|
||||
for (i = 0; i < 32; i++)
|
||||
CAN_SetUnusedMsgObj(i);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_ReleaseMessage
|
||||
* Description : Releases the message object
|
||||
* Input : - msgobj: specifies the Message object number, from 0 to 31.
|
||||
* Output : None
|
||||
* Return : An ErrorStatus enumuration value:
|
||||
* - SUCCESS: Interface to treat the message
|
||||
* - ERROR: No interface found to treat the message
|
||||
*******************************************************************************/
|
||||
ErrorStatus CAN_ReleaseMessage(u32 msgobj)
|
||||
{
|
||||
u32 msg_if=0;
|
||||
|
||||
if ((msg_if = GetFreeIF()) == 2)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
CAN->sMsgObj[msg_if].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQSTNEWDAT;
|
||||
CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_SendMessage
|
||||
* Description : Start transmission of a message
|
||||
* Input : - msgobj: specifies the Message object number, from 0 to 31.
|
||||
* : - pCanMsg: pointer to the message structure containing data
|
||||
* to transmit.
|
||||
* Output : None
|
||||
* Return : An ErrorStatus enumuration value:
|
||||
* - SUCCESS: Transmission OK
|
||||
* - ERROR: No transmission
|
||||
*******************************************************************************/
|
||||
ErrorStatus CAN_SendMessage(u32 msgobj, canmsg* pCanMsg)
|
||||
{
|
||||
if (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
CAN->SR &= ~CAN_SR_TXOK;
|
||||
|
||||
/* read the Arbitration and Message Control*/
|
||||
CAN->sMsgObj[0].CMR = CAN_CMR_ARB | CAN_CMR_CONTROL;
|
||||
|
||||
CAN->sMsgObj[0].CRR = 1 + msgobj;
|
||||
|
||||
if (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/* update the contents needed for transmission*/
|
||||
CAN->sMsgObj[0].CMR = CAN_CMR_WRRD
|
||||
| CAN_CMR_ARB
|
||||
| CAN_CMR_CONTROL
|
||||
| CAN_CMR_DATAA
|
||||
| CAN_CMR_DATAB;
|
||||
|
||||
if ((CAN->sMsgObj[0].A2R & CAN_A2R_XTD) == 0)
|
||||
{
|
||||
/* standard ID*/
|
||||
CAN->sMsgObj[0].A1R = 0;
|
||||
CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* extended ID*/
|
||||
CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id);
|
||||
CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id);
|
||||
}
|
||||
|
||||
CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFEF0) | CAN_MCR_NEWDAT | CAN_MCR_TXRQST | pCanMsg->Dlc;
|
||||
|
||||
CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0];
|
||||
CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2];
|
||||
CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4];
|
||||
CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6];
|
||||
|
||||
CAN->sMsgObj[0].CRR = 1 + msgobj;
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_ReceiveMessage
|
||||
* Description : Gets the message, if received.
|
||||
* Input : - msgobj: specifies the Message object number, from 0 to 31.
|
||||
* - release: specifies the message release indicator.
|
||||
* This parameter can be one of the following values:
|
||||
* - TRUE: the message object is released when getting
|
||||
* the data.
|
||||
* - FALSE: the message object is not released.
|
||||
* - pCanMsg: pointer to the message structure where received
|
||||
* data is copied.
|
||||
* Output : None
|
||||
* Return : An ErrorStatus enumuration value:
|
||||
* - SUCCESS: Reception OK
|
||||
* - ERROR: No message pending
|
||||
*******************************************************************************/
|
||||
ErrorStatus CAN_ReceiveMessage(u32 msgobj, bool release, canmsg* pCanMsg)
|
||||
{
|
||||
if (!CAN_IsMessageWaiting(msgobj))
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
CAN->SR &= ~CAN_SR_RXOK;
|
||||
|
||||
/* read the message contents*/
|
||||
CAN->sMsgObj[1].CMR = CAN_CMR_MASK
|
||||
| CAN_CMR_ARB
|
||||
| CAN_CMR_CONTROL
|
||||
| CAN_CMR_CLRINTPND
|
||||
| (release ? CAN_CMR_TXRQSTNEWDAT : 0)
|
||||
| CAN_CMR_DATAA
|
||||
| CAN_CMR_DATAB;
|
||||
|
||||
CAN->sMsgObj[1].CRR = 1 + msgobj;
|
||||
|
||||
if (CAN->sMsgObj[1].CRR & CAN_CRR_BUSY)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0)
|
||||
{
|
||||
/* standard ID*/
|
||||
pCanMsg->IdType = CAN_STD_ID;
|
||||
pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* extended ID*/
|
||||
pCanMsg->IdType = CAN_EXT_ID;
|
||||
pCanMsg->Id = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF);
|
||||
pCanMsg->Id |= ((u32)CAN->sMsgObj[1].A1R << 11);
|
||||
pCanMsg->Id |= (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27);
|
||||
}
|
||||
|
||||
pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F;
|
||||
|
||||
pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R;
|
||||
pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8);
|
||||
pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R;
|
||||
pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8);
|
||||
pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R;
|
||||
pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8);
|
||||
pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R;
|
||||
pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8);
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_WaitEndOfTx
|
||||
* Description : Waits until current transmission is finished.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : An ErrorStatus enumuration value:
|
||||
* - SUCCESS: Transmission ended
|
||||
* - ERROR: Transmission did not occur yet
|
||||
*******************************************************************************/
|
||||
ErrorStatus CAN_WaitEndOfTx(void)
|
||||
{
|
||||
if ((CAN->SR & CAN_SR_TXOK) == 0)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
CAN->SR &= ~CAN_SR_TXOK;
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_BasicSendMessage
|
||||
* Description : Starts transmission of a message in BASIC mode. This mode
|
||||
* does not use the message RAM.
|
||||
* Input : pCanMsg: Pointer to the message structure containing data to
|
||||
* transmit.
|
||||
* Output : None
|
||||
* Return : An ErrorStatus enumuration value:
|
||||
* - SUCCESS: Transmission OK
|
||||
* - ERROR: No transmission
|
||||
*******************************************************************************/
|
||||
ErrorStatus CAN_BasicSendMessage(canmsg* pCanMsg)
|
||||
{
|
||||
/* clear NewDat bit in IF2 to detect next reception*/
|
||||
CAN->sMsgObj[1].MCR &= ~CAN_MCR_NEWDAT;
|
||||
|
||||
CAN->SR &= ~CAN_SR_TXOK;
|
||||
CAN->sMsgObj[0].CMR = CAN_CMR_WRRD
|
||||
| CAN_CMR_ARB
|
||||
| CAN_CMR_CONTROL
|
||||
| CAN_CMR_DATAA
|
||||
| CAN_CMR_DATAB;
|
||||
|
||||
if (pCanMsg->IdType == CAN_STD_ID)
|
||||
{
|
||||
/* standard ID*/
|
||||
CAN->sMsgObj[0].A1R = 0;
|
||||
CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* extended ID*/
|
||||
CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id);
|
||||
CAN->sMsgObj[0].A2R = ((CAN->sMsgObj[0].A2R) & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id);
|
||||
}
|
||||
|
||||
CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFCF0) | pCanMsg->Dlc;
|
||||
|
||||
CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0];
|
||||
CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2];
|
||||
CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4];
|
||||
CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6];
|
||||
|
||||
/* request transmission*/
|
||||
if (CAN->sMsgObj[0].CRR == CAN_CRR_BUSY )
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_BasicReceiveMessage
|
||||
* Description : Gets the message in BASIC mode, if received. This mode does
|
||||
* not use the message RAM.
|
||||
* Input : pCanMsg: pointer to the message structure where message is copied.
|
||||
* Output : None
|
||||
* Return : An ErrorStatus enumuration value:
|
||||
* - SUCCESS: Reception OK
|
||||
* - ERROR: No message pending
|
||||
*******************************************************************************/
|
||||
ErrorStatus CAN_BasicReceiveMessage(canmsg* pCanMsg)
|
||||
{
|
||||
if ((CAN->sMsgObj[1].MCR & CAN_MCR_NEWDAT) == 0)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
CAN->SR &= ~CAN_SR_RXOK;
|
||||
|
||||
CAN->sMsgObj[1].CMR = CAN_CMR_ARB
|
||||
| CAN_CMR_CONTROL
|
||||
| CAN_CMR_DATAA
|
||||
| CAN_CMR_DATAB;
|
||||
|
||||
if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0)
|
||||
{
|
||||
/* standard ID*/
|
||||
pCanMsg->IdType = CAN_STD_ID;
|
||||
pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* extended ID*/
|
||||
pCanMsg->IdType = CAN_EXT_ID;
|
||||
pCanMsg->Id = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF);
|
||||
pCanMsg->Id |= ((u32)CAN->sMsgObj[1].A1R << 11);
|
||||
pCanMsg->Id |= (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27);
|
||||
}
|
||||
|
||||
pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F;
|
||||
|
||||
pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R;
|
||||
pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8);
|
||||
pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R;
|
||||
pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8);
|
||||
pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R;
|
||||
pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8);
|
||||
pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R;
|
||||
pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8);
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_EnterInitMode
|
||||
* Description : Switchs the CAN into initialization mode. This function must
|
||||
* be used in conjunction with CAN_LeaveInitMode().
|
||||
* Input : InitMask: specifies the CAN configuration in normal mode.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_EnterInitMode(u8 InitMask)
|
||||
{
|
||||
CAN->CR = InitMask | CAN_CR_INIT;
|
||||
CAN->SR = 0; /* reset the status*/
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_LeaveInitMode
|
||||
* Description : Leaves the initialization mode (switch into normal mode).
|
||||
* This function must be used in conjunction with CAN_EnterInitMode().
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_LeaveInitMode(void)
|
||||
{
|
||||
CAN->CR &= ~(CAN_CR_INIT | CAN_CR_CCE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_EnterTestMode
|
||||
* Description : Switchs the CAN into test mode. This function must be used in
|
||||
* conjunction with CAN_LeaveTestMode().
|
||||
* Input : TestMask: specifies the configuration in test modes.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_EnterTestMode(u8 TestMask)
|
||||
{
|
||||
CAN->CR |= CAN_CR_TEST;
|
||||
CAN->TESTR |= TestMask;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_LeaveTestMode
|
||||
* Description : Leaves the current test mode (switch into normal mode).
|
||||
* This function must be used in conjunction with CAN_EnterTestMode().
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_LeaveTestMode(void)
|
||||
{
|
||||
CAN->CR |= CAN_CR_TEST;
|
||||
CAN->TESTR &= ~(CAN_TESTR_LBACK | CAN_TESTR_SILENT | CAN_TESTR_BASIC);
|
||||
CAN->CR &= ~CAN_CR_TEST;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_ReleaseTxMessage
|
||||
* Description : Releases the transmit message object.
|
||||
* Input : - msgobj: specifies the Message object number, from 0 to 31.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_ReleaseTxMessage(u32 msgobj)
|
||||
{
|
||||
CAN->sMsgObj[0].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQSTNEWDAT;
|
||||
CAN->sMsgObj[0].CRR = 1 + msgobj;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_ReleaseRxMessage
|
||||
* Description : Releases the receive message object.
|
||||
* Input : - msgobj: specifies the Message object number, from 0 to 31.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_ReleaseRxMessage(u32 msgobj)
|
||||
{
|
||||
CAN->sMsgObj[1].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQSTNEWDAT;
|
||||
CAN->sMsgObj[1].CRR = 1 + msgobj;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_IsMessageWaiting
|
||||
* Description : Tests the waiting status of a received message.
|
||||
* Input : - msgobj: specifies the Message object number, from 0 to 31.
|
||||
* Output : None
|
||||
* Return : A non-zero value if the corresponding message object has
|
||||
* received a message waiting to be copied, else 0.
|
||||
*******************************************************************************/
|
||||
u32 CAN_IsMessageWaiting(u32 msgobj)
|
||||
{
|
||||
return (msgobj < 16 ? CAN->ND1R & (1 << msgobj) : CAN->ND2R & (1 << (msgobj-16)));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_IsTransmitRequested
|
||||
* Description : Tests the request status of a transmitted message.
|
||||
* Input : - msgobj: specifies the Message object number, from 0 to 31.
|
||||
* Output : None
|
||||
* Return : A non-zero value if the corresponding message is requested
|
||||
* to transmit, else 0.
|
||||
*******************************************************************************/
|
||||
u32 CAN_IsTransmitRequested(u32 msgobj)
|
||||
{
|
||||
return (msgobj < 16 ? CAN->TXR1R & (1 << msgobj) : CAN->TXR2R & (1 << (msgobj-16)));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_IsInterruptPending
|
||||
* Description : Tests the interrupt status of a message object.
|
||||
* Input : - msgobj: specifies the Message object number, from 0 to 31.
|
||||
* Output : None
|
||||
* Return : A non-zero value if the corresponding message has an
|
||||
* interrupt pending, else 0.
|
||||
*******************************************************************************/
|
||||
u32 CAN_IsInterruptPending(u32 msgobj)
|
||||
{
|
||||
return (msgobj < 16 ? CAN->IP1R & (1 << msgobj) : CAN->IP2R & (1 << (msgobj-16)));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_IsObjectValid
|
||||
* Description : Tests the validity of a message object (ready to use).
|
||||
* Input : - msgobj: specifies the Message object number, from 0 to 31.
|
||||
* Output : None
|
||||
* Return : A non-zero value if the corresponding message object is
|
||||
* valid, else 0.
|
||||
*******************************************************************************/
|
||||
u32 CAN_IsObjectValid(u32 msgobj)
|
||||
{
|
||||
return (msgobj < 16 ? CAN->MV1R & (1 << msgobj) : CAN->MV2R & (1 << (msgobj-16)));
|
||||
}
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
122
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_cfg.c
Normal file
122
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_cfg.c
Normal file
|
@ -0,0 +1,122 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_cfg.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the CFG software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_cfg.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
#define CFG_SWBOOT_Mask 0xFFFFFFFC
|
||||
#define CFG_FLASHBusy_Mask 0x00000080
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CFG_BootSpaceConfig
|
||||
* Description : Selects which memory space will be remapped at address 0x00.
|
||||
* Input : - CFG_BootSpace: specifies the memory space to be remapped
|
||||
* at address 0x00.
|
||||
* This parameter can be one of the following values:
|
||||
* - CFG_BootSpace_FLASH
|
||||
* - CFG_BootSpace_SRAM
|
||||
* - CFG_BootSpace_ExtSMI
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CFG_BootSpaceConfig(u32 CFG_BootSpace)
|
||||
{
|
||||
u32 Temp = 0;
|
||||
|
||||
/* Clear SW_BOOT[1:0] bits */
|
||||
Temp = CFG->GLCONF & CFG_SWBOOT_Mask;
|
||||
|
||||
/* Set SW_BOOT[1:0] bits according to CFG_BootSpace parameter value */
|
||||
Temp |= CFG_BootSpace;
|
||||
|
||||
/* Store the new value */
|
||||
CFG->GLCONF = Temp;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CFG_FLASHBurstConfig
|
||||
* Description : Enables or disables the FLASH Burst mode.
|
||||
* Input : - CCFG_FLASHBurst: specifies the new state of the FLASH Burst
|
||||
* mode.
|
||||
* This parameter can be one of the following values:
|
||||
* - CFG_FLASHBurst_Disable
|
||||
* - CFG_FLASHBurst_Enable
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CFG_FLASHBurstConfig(u32 CFG_FLASHBurst)
|
||||
{
|
||||
if(CFG_FLASHBurst == CFG_FLASHBurst_Enable)
|
||||
{
|
||||
CFG->GLCONF |= CFG_FLASHBurst_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
CFG->GLCONF &= CFG_FLASHBurst_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CFG_USBFilterConfig
|
||||
* Description : Enables or disables the USB Filter.
|
||||
* Input : - CFG_USBFilter: specifies the new state of the USB Filter.
|
||||
* This parameter can be one of the following values:
|
||||
* - CFG_USBFilter_Disable
|
||||
* - CFG_USBFilter_Enable
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CFG_USBFilterConfig(u32 CFG_USBFilter)
|
||||
{
|
||||
if(CFG_USBFilter == CFG_USBFilter_Enable)
|
||||
{
|
||||
CFG->GLCONF |= CFG_USBFilter_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
CFG->GLCONF &= CFG_USBFilter_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CFG_GetFlagStatus
|
||||
* Description : Checks whether the FLASH Busy flag is set or not.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The new state of FLASH Busy flag (SET or RESET).
|
||||
*******************************************************************************/
|
||||
FlagStatus CFG_GetFlagStatus(void)
|
||||
{
|
||||
if((CFG->GLCONF & CFG_FLASHBusy_Mask) != RESET)
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
596
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_dma.c
Normal file
596
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_dma.c
Normal file
|
@ -0,0 +1,596 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_dma.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the DMA software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_dma.h"
|
||||
#include "75x_mrcc.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
/* DMA enable */
|
||||
#define DMA_Enable 0x0001
|
||||
#define DMA_Disable 0xFFFE
|
||||
|
||||
/* DMA Last Buffer Sweep */
|
||||
#define DMA_Last0_Enable_Mask 0x0001
|
||||
#define DMA_Last0_Disable_Mask 0xFFFE
|
||||
#define DMA_Last1_Enable_Mask 0x0002
|
||||
#define DMA_Last1_Disable_Mask 0xFFFD
|
||||
#define DMA_Last2_Enable_Mask 0x0004
|
||||
#define DMA_Last2_Disable_Mask 0xFFFB
|
||||
#define DMA_Last3_Enable_Mask 0x0008
|
||||
#define DMA_Last3_Disable_Mask 0xFFF7
|
||||
|
||||
/* DMA Masks */
|
||||
#define DMA_Stream0_MASK_Mask 0xFFEE
|
||||
#define DMA_Stream0_CLR_Mask 0x0011
|
||||
#define DMA_Stream0_LAST_Mask 0xFFFE
|
||||
|
||||
#define DMA_Stream1_MASK_Mask 0xFFDD
|
||||
#define DMA_Stream1_CLR_Mask 0x0022
|
||||
#define DMA_Stream1_LAST_Mask 0xFFFD
|
||||
|
||||
#define DMA_Stream2_MASK_Mask 0xFFBB
|
||||
#define DMA_Stream2_CLR_Mask 0x0044
|
||||
#define DMA_Stream2_LAST_Mask 0xFFFB
|
||||
|
||||
#define DMA_Stream3_MASK_Mask 0xFF77
|
||||
#define DMA_Stream3_CLR_Mask 0x0088
|
||||
#define DMA_Stream3_LAST_Mask 0xFFF7
|
||||
|
||||
#define DMA_SRCSize_Mask 0xFFE7
|
||||
#define DMA_SRCBurst_Mask 0xFF9F
|
||||
#define DMA_DSTSize_Mask 0xFE7F
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_DeInit
|
||||
* Description : Deinitializes the DMA streamx registers to their default reset
|
||||
* values.
|
||||
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
|
||||
* Stream.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void DMA_DeInit(DMA_Stream_TypeDef* DMA_Streamx)
|
||||
{
|
||||
/* Reset streamx source base address register */
|
||||
DMA_Streamx->SOURCEL = 0;
|
||||
DMA_Streamx->SOURCEH = 0;
|
||||
|
||||
/* Reset streamx destination base address register */
|
||||
DMA_Streamx->DESTL = 0;
|
||||
DMA_Streamx->DESTH = 0;
|
||||
|
||||
/* Reset streamx maximum count register */
|
||||
DMA_Streamx->MAX = 0;
|
||||
/* Reset streamx control register */
|
||||
DMA_Streamx->CTRL = 0;
|
||||
/* Reset streamx last used buffer location register */
|
||||
DMA_Streamx->LUBUFF = 0;
|
||||
|
||||
switch(*(u32*)&DMA_Streamx)
|
||||
{
|
||||
case DMA_Stream0_BASE:
|
||||
/* Reset interrupt mask, clear and flag bits for stream0 */
|
||||
DMA->MASK &= DMA_Stream0_MASK_Mask;
|
||||
DMA->CLR |= DMA_Stream0_CLR_Mask;
|
||||
DMA->LAST &= DMA_Stream0_LAST_Mask;
|
||||
break;
|
||||
|
||||
case DMA_Stream1_BASE:
|
||||
/* Reset interrupt mask, clear and flag bits for stream1 */
|
||||
DMA->MASK &= DMA_Stream1_MASK_Mask;
|
||||
DMA->CLR |= DMA_Stream1_CLR_Mask;
|
||||
DMA->LAST &= DMA_Stream1_LAST_Mask;
|
||||
break;
|
||||
|
||||
case DMA_Stream2_BASE:
|
||||
/* Reset interrupt mask, clear and flag bits for stream2 */
|
||||
DMA->MASK &= DMA_Stream2_MASK_Mask;
|
||||
DMA->CLR |= DMA_Stream2_CLR_Mask;
|
||||
DMA->LAST &= DMA_Stream2_LAST_Mask;
|
||||
break;
|
||||
|
||||
case DMA_Stream3_BASE:
|
||||
/* Reset interrupt mask, clear and flag bits for stream3 */
|
||||
DMA->MASK &= DMA_Stream3_MASK_Mask;
|
||||
DMA->CLR |= DMA_Stream3_CLR_Mask;
|
||||
DMA->LAST &= DMA_Stream3_LAST_Mask;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_Init
|
||||
* Description : Initializes the DMAx stream according to the specified
|
||||
* parameters in the DMA_InitStruct.
|
||||
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
|
||||
* Stream.
|
||||
* - DMA_InitStruct: pointer to a DMA_InitTypeDef structure that
|
||||
* contains the configuration information for the specified
|
||||
* DMA stream.
|
||||
* Output : None
|
||||
* Return : None
|
||||
******************************************************************************/
|
||||
void DMA_Init(DMA_Stream_TypeDef* DMA_Streamx, DMA_InitTypeDef* DMA_InitStruct)
|
||||
{
|
||||
/* set the buffer Size */
|
||||
DMA_Streamx->MAX = DMA_InitStruct->DMA_BufferSize ;
|
||||
|
||||
/* Configure the incrementation of the current source Register */
|
||||
if(DMA_InitStruct->DMA_SRC == DMA_SRC_INCR)
|
||||
{
|
||||
/* Increment current source register */
|
||||
DMA_Streamx->CTRL |= DMA_SRC_INCR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Current source register unchanged */
|
||||
DMA_Streamx->CTRL &= DMA_SRC_NOT_INCR;
|
||||
}
|
||||
|
||||
/* Configure the incrementation of the current destination Register */
|
||||
if(DMA_InitStruct->DMA_DST == DMA_DST_INCR)
|
||||
{
|
||||
/* Increment current source register */
|
||||
DMA_Streamx->CTRL |= DMA_DST_INCR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Current source register unchanged */
|
||||
DMA_Streamx->CTRL &= DMA_DST_NOT_INCR;
|
||||
}
|
||||
|
||||
/* Clear source to DMA data width SOSIZE[1:0] bits */
|
||||
DMA_Streamx->CTRL &= DMA_SRCSize_Mask;
|
||||
/* Set the source to DMA data width */
|
||||
DMA_Streamx->CTRL |= DMA_InitStruct->DMA_SRCSize;
|
||||
|
||||
/* Clear the DMA peripheral burst size SOBURST[1:0] bits */
|
||||
DMA_Streamx->CTRL &= DMA_SRCBurst_Mask;
|
||||
/* Set the DMA peripheral burst size */
|
||||
DMA_Streamx->CTRL |= DMA_InitStruct->DMA_SRCBurst;
|
||||
|
||||
/* Clear destination to DMA dat width DESIZE[1:0] bits */
|
||||
DMA_Streamx->CTRL &= DMA_DSTSize_Mask;
|
||||
/* Set the destination to DMA data width */
|
||||
DMA_Streamx->CTRL |= DMA_InitStruct->DMA_DSTSize;
|
||||
|
||||
/* Configure the circular mode */
|
||||
if(DMA_InitStruct->DMA_Mode == DMA_Mode_Circular)
|
||||
{
|
||||
/* Set circular mode */
|
||||
DMA_Streamx->CTRL |= DMA_Mode_Circular;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set normal mode */
|
||||
DMA_Streamx->CTRL &= DMA_Mode_Normal;
|
||||
}
|
||||
|
||||
/* Configure the direction transfer */
|
||||
if(DMA_InitStruct->DMA_DIR == DMA_DIR_PeriphDST)
|
||||
{
|
||||
/* Set peripheral as destination */
|
||||
DMA_Streamx->CTRL |= DMA_DIR_PeriphDST;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set peripheral as source */
|
||||
DMA_Streamx->CTRL &= DMA_DIR_PeriphSRC;
|
||||
}
|
||||
|
||||
/* Configure the memory to memory transfer only for stream3 */
|
||||
if(DMA_Streamx == DMA_Stream3)
|
||||
{
|
||||
if(DMA_InitStruct->DMA_M2M == DMA_M2M_Enable)
|
||||
{
|
||||
/* Enable memory to memory transfer for stream3 */
|
||||
DMA_Streamx->CTRL |= DMA_M2M_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable memory to memory transfer for stream3 */
|
||||
DMA_Streamx->CTRL &= DMA_M2M_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/* Configure the source base address */
|
||||
DMA_Streamx->SOURCEL = DMA_InitStruct->DMA_SRCBaseAddr;
|
||||
DMA_Streamx->SOURCEH = DMA_InitStruct->DMA_SRCBaseAddr >> 16;
|
||||
|
||||
/* Configure the destination base address */
|
||||
DMA_Streamx->DESTL = DMA_InitStruct->DMA_DSTBaseAddr;
|
||||
DMA_Streamx->DESTH = DMA_InitStruct->DMA_DSTBaseAddr >> 16;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_StructInit
|
||||
* Description : Fills each DMA_InitStruct member with its default value.
|
||||
* Input : DMA_InitStruct : pointer to a DMA_InitTypeDef structure
|
||||
* which will be initialized.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct)
|
||||
{
|
||||
/* Initialize the DMA_BufferSize member */
|
||||
DMA_InitStruct->DMA_BufferSize = 0;
|
||||
|
||||
/* initialize the DMA_SRCBaseAddr member */
|
||||
DMA_InitStruct->DMA_SRCBaseAddr = 0;
|
||||
|
||||
/* Initialize the DMA_DSTBaseAddr member */
|
||||
DMA_InitStruct ->DMA_DSTBaseAddr = 0;
|
||||
|
||||
/* Initialize the DMA_SRC member */
|
||||
DMA_InitStruct->DMA_SRC = DMA_SRC_NOT_INCR;
|
||||
|
||||
/* Initialize the DMA_DST member */
|
||||
DMA_InitStruct->DMA_DST = DMA_DST_NOT_INCR;
|
||||
|
||||
/* Initialize the DMA_SRCSize member */
|
||||
DMA_InitStruct->DMA_SRCSize = DMA_SRCSize_Byte;
|
||||
|
||||
/* Initialize the DMA_SRCBurst member */
|
||||
DMA_InitStruct->DMA_SRCBurst = DMA_SRCBurst_1Data;
|
||||
|
||||
/* Initialize the DMA_DSTSize member */
|
||||
DMA_InitStruct->DMA_DSTSize = DMA_DSTSize_Byte;
|
||||
|
||||
/* Initialize the DMA_Mode member */
|
||||
DMA_InitStruct->DMA_Mode = DMA_Mode_Normal;
|
||||
|
||||
/* Initialize the DMA_M2M member */
|
||||
DMA_InitStruct->DMA_M2M = DMA_M2M_Disable;
|
||||
|
||||
/* Initialize the DMA_DIR member */
|
||||
DMA_InitStruct->DMA_DIR = DMA_DIR_PeriphSRC;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_Cmd
|
||||
* Description : Enables or disables the specified DMA stream.
|
||||
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
|
||||
* Stream.
|
||||
* - NewState: new state of the DMAx stream. This parameter can
|
||||
* be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void DMA_Cmd(DMA_Stream_TypeDef* DMA_Streamx, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Enable the selected DMA streamx */
|
||||
DMA_Streamx->CTRL |= DMA_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected DMA streamx */
|
||||
DMA_Streamx->CTRL &= DMA_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_ITConfig
|
||||
* Description : Enables or disables the specified DMA interrupts.
|
||||
* Input : - DMA_IT: specifies the DMA interrupts sources to be enabled
|
||||
* or disabled. This parameter can be any combination of the
|
||||
* following values:
|
||||
* - DMA_IT_SI0: Stream0 transfer end interrupt mask
|
||||
* - DMA_IT_SI1: Stream1 transfer end interrupt mask
|
||||
* - DMA_IT_SI2: Stream2 transfer end interrupt mask
|
||||
* - DMA_IT_SI3: Stream3 transfer end interrupt mask
|
||||
* - DMA_IT_SE0: Stream0 transfer error interrupt mask
|
||||
* - DMA_IT_SE1: Stream1 transfer error interrupt mask
|
||||
* - DMA_IT_SE2: Stream2 transfer error interrupt mask
|
||||
* - DMA_IT_SE3: Stream3 transfer error interrupt mask
|
||||
* - DMA_IT_ALL: ALL DMA interrupts mask
|
||||
* - NewState: new state of the specified DMA interrupts.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void DMA_ITConfig(u16 DMA_IT, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Enable the selected DMA interrupts */
|
||||
DMA->MASK |= DMA_IT;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected DMA interrupts */
|
||||
DMA->MASK &= ~DMA_IT;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_GetCurrDSTAddr
|
||||
* Description : Returns the current value of the destination address pointer
|
||||
* related to the specified DMA stream.
|
||||
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
|
||||
* Stream.
|
||||
* Output : None
|
||||
* Return : The current value of the destination address pointer related
|
||||
* to the specified DMA stream.
|
||||
*******************************************************************************/
|
||||
u32 DMA_GetCurrDSTAddr(DMA_Stream_TypeDef* DMA_Streamx)
|
||||
{
|
||||
u32 Tmp = 0;
|
||||
|
||||
/* Get high current destination address */
|
||||
Tmp = (DMA_Streamx->DECURRH)<<16;
|
||||
/* Get low current destination address */
|
||||
Tmp |= DMA_Streamx->DECURRL;
|
||||
|
||||
/* Return the current destination address value for streamx */
|
||||
return Tmp;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_GetCurrSRCAddr
|
||||
* Description : Returns the current value of the source address pointer
|
||||
* related to the specified DMA stream.
|
||||
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
|
||||
* Stream.
|
||||
* Output : None
|
||||
* Return : The current value of the source address pointer related to
|
||||
* the specified DMA stream.
|
||||
*******************************************************************************/
|
||||
u32 DMA_GetCurrSRCAddr(DMA_Stream_TypeDef* DMA_Streamx)
|
||||
{
|
||||
u32 Tmp = 0;
|
||||
|
||||
/* Get high current source address */
|
||||
Tmp = (DMA_Streamx->SOCURRH)<<16;
|
||||
/* Get slow current source address */
|
||||
Tmp |= DMA_Streamx->SOCURRL;
|
||||
|
||||
/* Return the current source address value for streamx */
|
||||
return Tmp;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_GetTerminalCounter
|
||||
* Description : Returns the number of data units remaining in the current
|
||||
* DMA stream transfer.
|
||||
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
|
||||
* Stream.
|
||||
* Output : None
|
||||
* Return : The number of data units remaining in the current DMA stream
|
||||
* transfer.
|
||||
*******************************************************************************/
|
||||
u16 DMA_GetTerminalCounter(DMA_Stream_TypeDef* DMA_Streamx)
|
||||
{
|
||||
/* Return the terminal counter value for streamx */
|
||||
return(DMA_Streamx->TCNT);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_LastBufferSweepConfig
|
||||
* Description : Activates or disactivates the last buffer sweep mode for the
|
||||
* DMA streamx configured in circular buffer mode.
|
||||
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
|
||||
* Stream.
|
||||
* - NewState: new state of the Last buffer sweep DMA_Streamx.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void DMA_LastBufferSweepConfig(DMA_Stream_TypeDef* DMA_Streamx, FunctionalState NewState)
|
||||
{
|
||||
switch(*(u32*)&DMA_Streamx)
|
||||
{
|
||||
case DMA_Stream0_BASE:
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Activates the last circular buffer sweep mode for stream0 */
|
||||
DMA->LAST |= DMA_Last0_Enable_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disactivates the last circular buffer sweep mode for stream0 */
|
||||
DMA->LAST &= DMA_Last0_Disable_Mask;
|
||||
}
|
||||
break;
|
||||
|
||||
case DMA_Stream1_BASE:
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Activates the last circular buffer sweep mode for stream1 */
|
||||
DMA->LAST |= DMA_Last1_Enable_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disactivates the last circular buffer sweep mode for stream1 */
|
||||
DMA->LAST &= DMA_Last1_Disable_Mask;
|
||||
}
|
||||
break;
|
||||
|
||||
case DMA_Stream2_BASE:
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Activates the last circular buffer sweep mode for stream2 */
|
||||
DMA->LAST |= DMA_Last2_Enable_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disactivates the last circular buffer sweep mode for stream2 */
|
||||
DMA->LAST &= DMA_Last2_Disable_Mask;
|
||||
}
|
||||
break;
|
||||
|
||||
case DMA_Stream3_BASE:
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Activates the last circular buffer sweep mode for stream3 */
|
||||
DMA->LAST |= DMA_Last3_Enable_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disactivates the last circular buffer sweep mode for stream3 */
|
||||
DMA->LAST &= DMA_Last3_Disable_Mask;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_LastBufferAddrConfig
|
||||
* Description : Configures the circular buffer position where the last data
|
||||
* to be used by the specified DMA stream is located.
|
||||
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
|
||||
* Stream.
|
||||
* - DMA_LastBufferAddr: specifies the circular buffer position
|
||||
* where the last data to be used by the specified DMA stream
|
||||
* is located.
|
||||
* This member must be a number between 0 and the stream BufferSize-1.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void DMA_LastBufferAddrConfig(DMA_Stream_TypeDef* DMA_Streamx, u16 DMA_LastBufferAddr)
|
||||
{
|
||||
/* Set the streamx last data circular buffer location */
|
||||
DMA_Streamx->LUBUFF = DMA_LastBufferAddr;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_GetFlagStatus
|
||||
* Description : Checks whether the specified DMA flag is set or not.
|
||||
* Input : - DMA_FLAG: specifies the flag to check. This parameter can
|
||||
* be one of the following values:
|
||||
* - DMA_FLAG_SI0: Stream0 transfer end flag.
|
||||
* - DMA_FLAG_SI1: Stream1 transfer end flag.
|
||||
* - DMA_FLAG_SI2: Stream2 transfer end flag.
|
||||
* - DMA_FLAG_SI3: Stream3 transfer end flag.
|
||||
* - DMA_FLAG_SE0: Stream0 transfer error flag.
|
||||
* - DMA_FLAG_SE1: Stream1 transfer error flag.
|
||||
* - DMA_FLAG_SE2: Stream2 transfer error flag.
|
||||
* - DMA_FLAG_SE3: Stream3 transfer error flag.
|
||||
* - DMA_FLAG_ACT0: Stream0 status.
|
||||
* - DMA_FLAG_ACT1: Stream1 status.
|
||||
* - DMA_FLAG_ACT2: Stream2 status.
|
||||
* - DMA_FLAG_ACT3: Stream3 status.
|
||||
* Output : None
|
||||
* Return : The new state of DMA_FLAG (SET or RESET).
|
||||
*******************************************************************************/
|
||||
FlagStatus DMA_GetFlagStatus(u16 DMA_FLAG)
|
||||
{
|
||||
/* Check the status of the specified DMA flag */
|
||||
if((DMA->STATUS & DMA_FLAG) != RESET)
|
||||
{
|
||||
/* Return SET if DMA_FLAG is set */
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Return RESET if DMA_FLAG is reset */
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_ClearFlag
|
||||
* Description : Clears the DMA’s pending flags.
|
||||
* Input : - DMA_FLAG: specifies the flag to clear. This parameter can
|
||||
* be any combination of the following values:
|
||||
* - DMA_FLAG_SI0: Stream0 transfer end flag.
|
||||
* - DMA_FLAG_SI1: Stream1 transfer end flag.
|
||||
* - DMA_FLAG_SI2: Stream2 transfer end flag.
|
||||
* - DMA_FLAG_SI3: Stream3 transfer end flag.
|
||||
* - DMA_FLAG_SE0: Stream0 transfer error flag.
|
||||
* - DMA_FLAG_SE1: Stream1 transfer error flag.
|
||||
* - DMA_FLAG_SE2: Stream2 transfer error flag.
|
||||
* - DMA_FLAG_SE3: Stream3 transfer error flag.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void DMA_ClearFlag(u16 DMA_FLAG)
|
||||
{
|
||||
/* Clear the selected DMA flags */
|
||||
DMA->CLR = DMA_FLAG ;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_GetITStatus
|
||||
* Description : Checks whether the specified DMA interrupt has occured or not.
|
||||
* Input : - DMA_IT: specifies the DMA interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* - DMA_IT_SI0: Stream0 transfer end interrupt
|
||||
* - DMA_IT_SI1: Stream1 transfer end interrupt
|
||||
* - DMA_IT_SI2: Stream2 transfer end interrupt
|
||||
* - DMA_IT_SI3: Stream3 transfer end interrupt
|
||||
* - DMA_IT_SE0: Stream0 transfer error interrupt
|
||||
* - DMA_IT_SE1: Stream1 transfer error interrupt
|
||||
* - DMA_IT_SE2: Stream2 transfer error interrupt
|
||||
* - DMA_IT_SE3: Stream3 transfer error interrupt
|
||||
* Output : None
|
||||
* Return : The new state of DMA_IT (SET or RESET).
|
||||
*******************************************************************************/
|
||||
ITStatus DMA_GetITStatus(u16 DMA_IT)
|
||||
{
|
||||
/* Check the status of the specified DMA interrupt */
|
||||
if((DMA->STATUS & DMA_IT) != RESET)
|
||||
{
|
||||
/* Return SET if the DMA interrupt flag is set */
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Return RESET if the DMA interrupt flag is reset */
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_ClearITPendingBit
|
||||
* Description : Clears the DMA’s interrupt pending bits.
|
||||
* Input : - DMA_IT: specifies the interrupt pending bit to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* - DMA_IT_SI0: Stream0 transfer end interrupt.
|
||||
* - DMA_IT_SI1: Stream1 transfer end interrupt.
|
||||
* - DMA_IT_SI2: Stream2 transfer end interrupt.
|
||||
* - DMA_IT_SI3: Stream3 transfer end interrupt.
|
||||
* - DMA_IT_SE0: Stream0 transfer error interrupt.
|
||||
* - DMA_IT_SE1: Stream1 transfer error interrupt.
|
||||
* - DMA_IT_SE2: Stream2 transfer error interrupt.
|
||||
* - DMA_IT_SE3: Stream3 transfer error interrupt.
|
||||
* - DMA_IT_ALL: All DMA interrupts.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void DMA_ClearITPendingBit(u16 DMA_IT)
|
||||
{
|
||||
/* Clear the selected DMA interrupts pending bits */
|
||||
DMA->CLR = DMA_IT ;
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
258
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_eic.c
Normal file
258
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_eic.c
Normal file
|
@ -0,0 +1,258 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_eic.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the EIC software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_eic.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
#define EIC_IRQEnable_Mask 0x00000001
|
||||
#define EIC_IRQDisable_Mask 0xFFFFFFFE
|
||||
|
||||
#define EIC_FIQEnable_Mask 0x00000002
|
||||
#define EIC_FIQDisable_Mask 0xFFFFFFFD
|
||||
|
||||
#define EIC_SIPL_Mask 0x0000000F
|
||||
#define EIC_SIPL_Reset_Mask 0xFFFFFFF0
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_DeInit
|
||||
* Description : Deinitializes the EIC peripheral registers to their default
|
||||
* reset values.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EIC_DeInit(void)
|
||||
{
|
||||
EIC->ICR = 0x00;
|
||||
EIC->CIPR = 0x00;
|
||||
EIC->FIR = 0x0C;
|
||||
EIC->IER = 0x00;
|
||||
EIC->IPR = 0xFFFFFFFF;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_IRQInit
|
||||
* Description : Configures the IRQ channels according to the specified
|
||||
* parameters in the EIC_IRQInitStruct.
|
||||
* Input : EIC_IRQInitStruct: pointer to a EIC_IRQInitTypeDef structure.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EIC_IRQInit(EIC_IRQInitTypeDef* EIC_IRQInitStruct)
|
||||
{
|
||||
u32 Tmp = 0;
|
||||
|
||||
if(EIC_IRQInitStruct->EIC_IRQChannelCmd == ENABLE)
|
||||
{
|
||||
/* Enable the selected IRQ channel */
|
||||
EIC->IER |= 1 << EIC_IRQInitStruct->EIC_IRQChannel;
|
||||
|
||||
/* Configure the selected IRQ channel priority ***************************/
|
||||
/* Clear SIPL[3:0] bits */
|
||||
EIC->SIRn[EIC_IRQInitStruct->EIC_IRQChannel] &= EIC_SIPL_Reset_Mask;
|
||||
|
||||
/* Configure SIPL[3:0] bits according to EIC_IRQChannelPriority parameter */
|
||||
Tmp = EIC_IRQInitStruct->EIC_IRQChannelPriority & EIC_SIPL_Mask;
|
||||
EIC->SIRn[EIC_IRQInitStruct->EIC_IRQChannel] |= Tmp;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the select IRQ channel */
|
||||
EIC->IER &=~ (1 << EIC_IRQInitStruct->EIC_IRQChannel);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_FIQInit
|
||||
* Description : Configures the FIQ channels according to the specified
|
||||
* parameters in the EIC_FIQInitStruct.
|
||||
* Input : EIC_FIQInitStruct: pointer to a EIC_FIQInitTypeDef structure.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EIC_FIQInit(EIC_FIQInitTypeDef* EIC_FIQInitStruct)
|
||||
{
|
||||
if(EIC_FIQInitStruct->EIC_FIQChannelCmd == ENABLE)
|
||||
{
|
||||
/* Enable the selected FIQ channel */
|
||||
EIC->FIER |= EIC_FIQInitStruct->EIC_FIQChannel ;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected FIQ channel */
|
||||
EIC->FIER &= ~EIC_FIQInitStruct->EIC_FIQChannel;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_IRQStructInit
|
||||
* Description : Fills each EIC_IRQInitStruct member with its default value.
|
||||
* Input : EIC_IRQInitStruct: pointer to a EIC_IRQInitTypeDef structure
|
||||
* which will be initialized.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EIC_IRQStructInit(EIC_IRQInitTypeDef* EIC_IRQInitStruct)
|
||||
{
|
||||
EIC_IRQInitStruct->EIC_IRQChannel = 0x1F;
|
||||
EIC_IRQInitStruct->EIC_IRQChannelPriority = 0;
|
||||
EIC_IRQInitStruct->EIC_IRQChannelCmd = DISABLE;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_FIQStructInit
|
||||
* Description : Fills each EIC_FIQInitStruct member with its default value.
|
||||
* Input : EIC_FIQInitStruct: pointer to a EIC_FIQInitTypeDef structure
|
||||
* which will be initialized.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EIC_FIQStructInit(EIC_FIQInitTypeDef* EIC_FIQInitStruct)
|
||||
{
|
||||
EIC_FIQInitStruct->EIC_FIQChannel = 0x03;
|
||||
EIC_FIQInitStruct->EIC_FIQChannelCmd = DISABLE;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_IRQCmd
|
||||
* Description : Enables or disables EIC IRQ output request to CPU.
|
||||
* Input : NewState: new state of the EIC IRQ output request to CPU.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EIC_IRQCmd(FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Enable EIC IRQ output request to CPU */
|
||||
EIC->ICR |= EIC_IRQEnable_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable EIC IRQ output request to CPU */
|
||||
EIC->ICR &= EIC_IRQDisable_Mask;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_FIQCmd
|
||||
* Description : Enables or disables EIC FIQ output request to CPU.
|
||||
* Input : NewState: new state of the EIC FIQ output request to CPU.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EIC_FIQCmd(FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Enable EIC FIQ output request to CPU */
|
||||
EIC->ICR |= EIC_FIQEnable_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable EIC FIQ output request to CPU */
|
||||
EIC->ICR &= EIC_FIQDisable_Mask;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_GetCurrentIRQChannel
|
||||
* Description : Returns the current served IRQ channel identifier.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The current served IRQ channel.
|
||||
*******************************************************************************/
|
||||
u8 EIC_GetCurrentIRQChannel(void)
|
||||
{
|
||||
/* Read and return the CIC[4:0] bits of CICR register */
|
||||
return ((u8) (EIC->CICR));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_GetCurrentIRQChannelPriority
|
||||
* Description : Returns the priority level of the current served IRQ channel.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The priority level of the current served IRQ channel.
|
||||
*******************************************************************************/
|
||||
u8 EIC_GetCurrentIRQChannelPriority(void)
|
||||
{
|
||||
/* Read and return the CIP[3:0] bits of CIPR register */
|
||||
return ((u8) (EIC->CIPR));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_CurrentIRQPriorityConfig
|
||||
* Description : Changes the priority of the current served IRQ channel.
|
||||
* The new priority value must be higher, or equal, than the
|
||||
* priority value associated to the interrupt channel currently
|
||||
* serviced.
|
||||
* Input : NewPriority: new priority value of the IRQ interrupt routine
|
||||
* currently serviced.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EIC_CurrentIRQPriorityConfig(u8 NewPriority)
|
||||
{
|
||||
/* Disable EIC IRQ output request to CPU */
|
||||
EIC->ICR &= EIC_IRQDisable_Mask;
|
||||
|
||||
/* Change the current priority */
|
||||
EIC->CIPR = NewPriority;
|
||||
|
||||
/* Enable EIC IRQ output request to CPU */
|
||||
EIC->ICR |= EIC_IRQEnable_Mask;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_GetCurrentFIQChannel
|
||||
* Description : Returns the current served FIQ channel identifier.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The current served FIQ channel.
|
||||
*******************************************************************************/
|
||||
u8 EIC_GetCurrentFIQChannel(void)
|
||||
{
|
||||
/* Read and return the FIP[1:0] bits of FIPR register */
|
||||
return ((u8) (EIC->FIPR));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EIC_ClearFIQPendingBit
|
||||
* Description : Clears the pending bit of the selected FIQ Channel.
|
||||
* Input : EIC_FIQChannel: specifies the FIQ channel to clear its
|
||||
* pending bit.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EIC_ClearFIQPendingBit(u8 EIC_FIQChannel)
|
||||
{
|
||||
/* Clear the correspondent FIQ pending bit */
|
||||
EIC->FIPR = EIC_FIQChannel ;
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
179
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_extit.c
Normal file
179
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_extit.c
Normal file
|
@ -0,0 +1,179 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_extit.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the EXTIT software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_extit.h"
|
||||
#include "75x_mrcc.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EXTIT_DeInit
|
||||
* Description : Deinitializes the EXTIT peripheral registers to their default
|
||||
* reset values.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EXTIT_DeInit(void)
|
||||
{
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_EXTIT,ENABLE);
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_EXTIT,DISABLE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EXTIT_Init
|
||||
* Description : Initializes the EXTIT peripheral according to the specified
|
||||
* parameters in the EXTIT_InitStruct .
|
||||
* Input : - EXTIT_InitStruct: pointer to a EXTIT_InitTypeDef structure
|
||||
* that contains the configuration information for the EXTIT
|
||||
* peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EXTIT_Init(EXTIT_InitTypeDef* EXTIT_InitStruct)
|
||||
{
|
||||
if(EXTIT_InitStruct->EXTIT_ITLineCmd == ENABLE)
|
||||
{
|
||||
/* Enable the selected external interrupts */
|
||||
EXTIT->MR |= EXTIT_InitStruct->EXTIT_ITLine;
|
||||
|
||||
/* Select the trigger for the selected external interrupts */
|
||||
if(EXTIT_InitStruct->EXTIT_ITTrigger == EXTIT_ITTrigger_Falling)
|
||||
{
|
||||
/* Falling edge */
|
||||
EXTIT->TSR &= ~EXTIT_InitStruct->EXTIT_ITLine;
|
||||
}
|
||||
else if (EXTIT_InitStruct->EXTIT_ITTrigger == EXTIT_ITTrigger_Rising)
|
||||
{
|
||||
/* Rising edge */
|
||||
EXTIT->TSR |= EXTIT_InitStruct->EXTIT_ITLine;
|
||||
}
|
||||
}
|
||||
else if(EXTIT_InitStruct->EXTIT_ITLineCmd == DISABLE)
|
||||
{
|
||||
/* Disable the selected external interrupts */
|
||||
EXTIT->MR &= ~EXTIT_InitStruct->EXTIT_ITLine;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EXTIT_StructInit
|
||||
* Description : Fills each EXTIT_InitStruct member with its reset value.
|
||||
* Input : - EXTIT_InitStruct: pointer to a EXTIT_InitTypeDef structure
|
||||
* which will be initialized.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EXTIT_StructInit(EXTIT_InitTypeDef* EXTIT_InitStruct)
|
||||
{
|
||||
EXTIT_InitStruct->EXTIT_ITLine = EXTIT_ITLineNone;
|
||||
EXTIT_InitStruct->EXTIT_ITTrigger = EXTIT_ITTrigger_Falling;
|
||||
EXTIT_InitStruct->EXTIT_ITLineCmd = DISABLE;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EXTIT_GenerateSWInterrupt
|
||||
* Description : Generates a Software interrupt.
|
||||
* Input : - EXTIT_ITLine: specifies the EXTIT lines to be enabled or
|
||||
* disabled. This parameter can be:
|
||||
* - EXTIT_ITLinex: External interrupt line x where x(0..15)
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EXTIT_GenerateSWInterrupt(u16 EXTIT_ITLine)
|
||||
{
|
||||
EXTIT->SWIR |= EXTIT_ITLine;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EXTIT_GetFlagStatus
|
||||
* Description : Checks whether the specified EXTIT line flag is set or not.
|
||||
* Input : - EXTIT_ITLine: specifies the EXTIT lines flag to check.
|
||||
* This parameter can be:
|
||||
* - EXTIT_ITLinex: External interrupt line x where x(0..15)
|
||||
* Output : None
|
||||
* Return : The new state of EXTIT_ITLine (SET or RESET).
|
||||
*******************************************************************************/
|
||||
FlagStatus EXTIT_GetFlagStatus(u16 EXTIT_ITLine)
|
||||
{
|
||||
if((EXTIT->PR & EXTIT_ITLine) != RESET)
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EXTIT_ClearFlag
|
||||
* Description : Clears the EXTIT’s line pending flags.
|
||||
* Input : - EXTIT_ITLine: specifies the EXTIT lines flags to clear.
|
||||
* This parameter can be:
|
||||
* - EXTIT_ITLinex: External interrupt line x where x(0..15)
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EXTIT_ClearFlag(u16 EXTIT_ITLine)
|
||||
{
|
||||
EXTIT->PR = EXTIT_ITLine;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EXTIT_GetITStatus
|
||||
* Description : Checks whether the specified EXTIT line is asserted or not.
|
||||
* Input : - EXTIT_ITLine: specifies the EXTIT lines to check.
|
||||
* This parameter can be:
|
||||
* - EXTIT_ITLinex: External interrupt line x where x(0..15)
|
||||
* Output : None
|
||||
* Return : The new state of EXTIT_ITLine (SET or RESET).
|
||||
*******************************************************************************/
|
||||
ITStatus EXTIT_GetITStatus(u16 EXTIT_ITLine)
|
||||
{
|
||||
if(((EXTIT->PR & EXTIT_ITLine) != RESET)&& ((EXTIT->MR & EXTIT_ITLine) != RESET))
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EXTIT_ClearITPendingBit
|
||||
* Description : Clears the EXTIT’s line pending bits.
|
||||
* Input : - EXTIT_ITLine: specifies the EXTIT lines to clear.
|
||||
* This parameter can be:
|
||||
* - EXTIT_ITLinex: External interrupt line x where x(0..15)
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EXTIT_ClearITPendingBit(u16 EXTIT_ITLine)
|
||||
{
|
||||
EXTIT->PR = EXTIT_ITLine;
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
320
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_gpio.c
Normal file
320
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_gpio.c
Normal file
|
@ -0,0 +1,320 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_gpio.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the GPIO software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_gpio.h"
|
||||
#include "75x_mrcc.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
#define GPIO_Remap_Mask 0x1F /* GPIO remapping mask */
|
||||
#define GPIO_Pin_Mask 0x000FFFFF /* GPIO1 and GPIO2 all pins mask */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : GPIO_DeInit
|
||||
* Description : Deinitializes the GPIOx peripheral registers to their default
|
||||
* reset values.
|
||||
* The I/O remapping register 0 and 1 are not reset by this function.
|
||||
* Input : GPIOx: where x can be 0,1 or 2 to select the GPIO peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void GPIO_DeInit(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Reset the GPIOx registers values */
|
||||
GPIOx->PC0 = 0xFFFFFFFF;
|
||||
GPIOx->PC1 = 0x0;
|
||||
GPIOx->PC2 = 0x0;
|
||||
GPIOx->PM = 0x0;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : GPIO_Init
|
||||
* Description : Initializes the GPIOx peripheral according to the specified
|
||||
* parameters in the GPIO_InitStruct. This function will not
|
||||
* change the configuration for a pin if the corresponding mask
|
||||
* bit is set, except pins configured as input pull-up or pull-down.
|
||||
* These pins are automatically masked after each configuration.
|
||||
* Input :- GPIOx: where x can be (0..2) to select the GPIO peripheral.
|
||||
* - GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
|
||||
* contains the configuration information for the specified GPIO
|
||||
* peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
|
||||
{
|
||||
/* GPIOx Mode and Pins Set */
|
||||
if((GPIOx != GPIO0) && (GPIO_InitStruct->GPIO_Pin == GPIO_Pin_All))
|
||||
{
|
||||
GPIO_InitStruct->GPIO_Pin = GPIO_Pin_Mask;
|
||||
}
|
||||
|
||||
switch(GPIO_InitStruct->GPIO_Mode)
|
||||
{
|
||||
case GPIO_Mode_AIN:
|
||||
GPIOx->PC0 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC1 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC2 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
break;
|
||||
|
||||
case GPIO_Mode_IN_FLOATING:
|
||||
GPIOx->PC0 |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC1 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC2 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
break;
|
||||
|
||||
case GPIO_Mode_IPD:
|
||||
GPIOx->PM &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC0 |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC1 |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC2 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PD &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PM |= GPIO_InitStruct->GPIO_Pin;
|
||||
break;
|
||||
|
||||
case GPIO_Mode_IPU:
|
||||
GPIOx->PM &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC0 |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC1 |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC2 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PD |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PM |= GPIO_InitStruct->GPIO_Pin;
|
||||
break;
|
||||
|
||||
case GPIO_Mode_Out_OD:
|
||||
GPIOx->PC0 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC1 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC2 |= GPIO_InitStruct->GPIO_Pin;
|
||||
break;
|
||||
|
||||
case GPIO_Mode_Out_PP:
|
||||
GPIOx->PC0 |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC1 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC2 |= GPIO_InitStruct->GPIO_Pin;
|
||||
break;
|
||||
|
||||
case GPIO_Mode_AF_OD:
|
||||
GPIOx->PD |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC1 |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC0 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC2 |= GPIO_InitStruct->GPIO_Pin;
|
||||
break;
|
||||
|
||||
case GPIO_Mode_AF_PP:
|
||||
GPIOx->PC0 |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC1 |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC2 |= GPIO_InitStruct->GPIO_Pin;
|
||||
break;
|
||||
|
||||
default :
|
||||
GPIOx->PC0 |= GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC1 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
GPIOx->PC2 &= ~GPIO_InitStruct->GPIO_Pin;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : GPIO_StructInit
|
||||
* Description : Fills each GPIO_InitStruct member with its default value.
|
||||
* Input : GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure
|
||||
* which will be initialized.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
|
||||
{
|
||||
/* Reset GPIO init structure parameters values */
|
||||
GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
|
||||
GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : GPIO_Read
|
||||
* Description : Reads the specified GPIO data port.
|
||||
* Input : GPIOx: where x can be 0,1 or 2 to select the GPIO peripheral.
|
||||
* Output : None
|
||||
* Return : GPIO data port word value.
|
||||
*******************************************************************************/
|
||||
u32 GPIO_Read(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
return GPIOx->PD;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : GPIO_ReadBit
|
||||
* Description : Reads the specified data port bit.
|
||||
* Input : - GPIOx: where x can be (0..2) to select the GPIO peripheral.
|
||||
* : - GPIO_Pin: specifies the port bit to read.
|
||||
* This parameter can be GPIO_Pin_x where x can be (0..31) for
|
||||
* GPIO0 and x(0..19) for GPIO1 and GPIO2.
|
||||
* Output : None
|
||||
* Return : The port pin value
|
||||
*******************************************************************************/
|
||||
u8 GPIO_ReadBit(GPIO_TypeDef* GPIOx, u32 GPIO_Pin)
|
||||
{
|
||||
if ((GPIOx->PD & GPIO_Pin) != Bit_RESET)
|
||||
{
|
||||
return Bit_SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return Bit_RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : GPIO_Write
|
||||
* Description : Writes data to the specified GPIO data port.
|
||||
* Input :- GPIOx: where x can be 0,1 or 2 to select the GPIO peripheral.
|
||||
* - PortVal: specifies the value to be written to the data port
|
||||
* register.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void GPIO_Write(GPIO_TypeDef* GPIOx, u32 PortVal)
|
||||
{
|
||||
GPIOx->PD = PortVal;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : GPIO_WriteBit
|
||||
* Description : Sets or clears the selected data port bit.
|
||||
* Input : - GPIOx: where x can be (0..2) to select the GPIO peripheral.
|
||||
* - GPIO_Pin: specifies the port bit to be written.
|
||||
* This parameter can be GPIO_Pin_x where x can be (0..31) for
|
||||
* GPIO0 and x(0..19) for GPIO1 and GPIO2.
|
||||
* - BitVal: specifies the value to be written to the selected bit.
|
||||
* This parameter must be one of the BitAction enum values:
|
||||
* - Bit_RESET: to clear the port pin
|
||||
* - Bit_SET: to set the port pin
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, u32 GPIO_Pin, BitAction BitVal)
|
||||
{
|
||||
if(BitVal != Bit_RESET)
|
||||
{
|
||||
GPIOx->PD |= GPIO_Pin;
|
||||
}
|
||||
else
|
||||
{
|
||||
GPIOx->PD &= ~GPIO_Pin;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : GPIO_PinMaskConfig
|
||||
* Description : Enables or disables write protection to the selected bits in
|
||||
* the I/O port registers (PxC2, PxC1, PxC0 and PxD).
|
||||
* Input :- GPIOx: where x can be 0,1 or 2 to select the GPIO peripheral.
|
||||
* - GPIO_Pin: specifies the port bit to be protected.
|
||||
* This parameter can be GPIO_Pin_x where x can be (0..31) for
|
||||
* GPIO0 and x(0..19) for GPIO1 and GPIO2.
|
||||
* - NewState: new state of the port pin.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void GPIO_PinMaskConfig(GPIO_TypeDef* GPIOx, u32 GPIO_Pin, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
GPIOx->PM |= GPIO_Pin;
|
||||
}
|
||||
else
|
||||
{
|
||||
GPIOx->PM &= ~GPIO_Pin;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : GPIO_GetPortMask
|
||||
* Description : Gets the GPIOx port mask value.
|
||||
* Input : GPIOx: where x can be 0,1 or 2 to select the GPIO peripheral.
|
||||
* Output : None
|
||||
* Return : GPIO port mask value.
|
||||
*******************************************************************************/
|
||||
u32 GPIO_GetPortMask(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
return GPIOx->PM;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : GPIO_PinRemapConfig
|
||||
* Description : Changes the mapping of the specified pin.
|
||||
* Input :- GPIO_Remap: selects the pin to remap.
|
||||
* This parameter can be one of the following values:
|
||||
* - GPIO_Remap_SMI_CS3_EN: Enable SMI CS3
|
||||
* - GPIO_Remap_SMI_CS2_EN: Enable SMI CS2
|
||||
* - GPIO_Remap_SMI_CS1_EN: Enable SMI CS1
|
||||
* - GPIO_Remap_SMI_EN: Enable SMI Alternate Functions:
|
||||
* SMI_CS0, SMI_CK, SMI_DIN and SMI_DOUT
|
||||
* - GPIO_Remap_DBGOFF: JTAG Disable
|
||||
* - GPIO_Remap_UART1: UART1 Alternate Function mapping
|
||||
* - GPIO_Remap_UART2: UART2 Alternate Function mapping
|
||||
* - GPIO_Remap_SSP1: SSP1 Alternate Function mapping
|
||||
* - GPIO_Remap_TIM2: TIM2 Alternate Function mapping
|
||||
* - GPIO_Remap_TIM0: TIM0 Alternate Function mapping
|
||||
* - NewState: new state of the port pin.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void GPIO_PinRemapConfig(u16 GPIO_Remap, FunctionalState NewState)
|
||||
{
|
||||
u32 GPIOReg = 0;
|
||||
u32 PinPos = 0;
|
||||
|
||||
/* Get the GPIO register index */
|
||||
GPIOReg = GPIO_Remap >> 5;
|
||||
|
||||
/* Get the pin position */
|
||||
PinPos = GPIO_Remap & GPIO_Remap_Mask;
|
||||
|
||||
if(GPIOReg == 1) /* The pin to remap is in REMAP0R register */
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
GPIOREMAP->REMAP0R |= (1 << PinPos);
|
||||
}
|
||||
else
|
||||
{
|
||||
GPIOREMAP->REMAP0R &= ~(1 << PinPos);
|
||||
}
|
||||
}
|
||||
else if(GPIOReg == 2) /* The pin to remap is in REMAP1R register */
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
GPIOREMAP->REMAP1R |= (1 << PinPos);
|
||||
}
|
||||
else
|
||||
{
|
||||
GPIOREMAP->REMAP1R &= ~(1 << PinPos);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
568
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_i2c.c
Normal file
568
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_i2c.c
Normal file
|
@ -0,0 +1,568 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_i2c.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the I2C software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_i2c.h"
|
||||
#include "75x_mrcc.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
|
||||
/* I2C IT enable */
|
||||
#define I2C_IT_Enable 0x01
|
||||
#define I2C_IT_Disable 0xFE
|
||||
|
||||
/* I2C Peripheral Enable/Disable */
|
||||
#define I2C_PE_Set 0x20
|
||||
#define I2C_PE_Reset 0xDF
|
||||
|
||||
/* I2C START Enable/Disable */
|
||||
#define I2C_Start_Enable 0x08
|
||||
#define I2C_Start_Disable 0xF7
|
||||
|
||||
/* I2C STOP Enable/Disable */
|
||||
#define I2C_Stop_Enable 0x02
|
||||
#define I2C_Stop_Disable 0xFD
|
||||
|
||||
/* Address direction bit */
|
||||
#define I2C_ADD0_Set 0x01
|
||||
#define I2C_ADD0_Reset 0xFE
|
||||
|
||||
/* I2C Masks */
|
||||
#define I2C_Frequency_Mask 0x1F
|
||||
#define I2C_AddressHigh_Mask 0xF9
|
||||
#define I2C_OwnAddress_Mask 0x0300
|
||||
#define I2C_StandardMode_Mask 0x7f
|
||||
#define I2C_FastMode_Mask 0x80
|
||||
#define I2C_Event_Mask 0x3FFF
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_DeInit
|
||||
* Description : Deinitializes the I2C peripheral registers to their default
|
||||
* reset values.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void I2C_DeInit(void)
|
||||
{
|
||||
/* Reset the I2C registers values*/
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_I2C,ENABLE);
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_I2C,DISABLE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_Init
|
||||
* Description : Initializes the I2C peripheral according to the specified
|
||||
* parameters in the I2C_Initstruct.
|
||||
* Input : - I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
|
||||
* contains the configuration information for the specified I2C
|
||||
* peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void I2C_Init(I2C_InitTypeDef* I2C_InitStruct)
|
||||
{
|
||||
u8 ITEState = 0;
|
||||
u16 Result = 0x0F;
|
||||
u32 APBClock = 8000000;
|
||||
MRCC_ClocksTypeDef MRCC_ClocksStatus;
|
||||
|
||||
/* Get APBClock frequency value */
|
||||
MRCC_GetClocksStatus(&MRCC_ClocksStatus);
|
||||
APBClock = MRCC_ClocksStatus.PCLK_Frequency;
|
||||
/* Save ITE bit state */
|
||||
ITEState = I2C->CR & 0xFE;
|
||||
/* Disable I2C peripheral to set FR[2:0] bits */
|
||||
I2C_Cmd(DISABLE);
|
||||
/* Clear frequency FR[2:0] bits */
|
||||
I2C->OAR2 &= I2C_Frequency_Mask;
|
||||
|
||||
/* Set frequency bits depending on APBClock value */
|
||||
if (APBClock < 10000000)
|
||||
I2C->OAR2 &= 0x1F;
|
||||
else if (APBClock < 16670000)
|
||||
I2C->OAR2 |= 0x20;
|
||||
else if (APBClock < 26670000)
|
||||
I2C->OAR2 |= 0x40;
|
||||
else if (APBClock < 40000000)
|
||||
I2C->OAR2 |= 0x60;
|
||||
else if (APBClock < 53330000)
|
||||
I2C->OAR2 |= 0x80;
|
||||
else if (APBClock < 66000000)
|
||||
I2C->OAR2 |= 0xA0;
|
||||
else if (APBClock < 80000000)
|
||||
I2C->OAR2 |= 0xC0;
|
||||
else if (APBClock < 100000000)
|
||||
I2C->OAR2 |= 0xE0;
|
||||
I2C_Cmd(ENABLE);
|
||||
|
||||
/* Restore the ITE bit state */
|
||||
I2C->CR |= ITEState;
|
||||
|
||||
/* Configure general call */
|
||||
if (I2C_InitStruct->I2C_GeneralCall == I2C_GeneralCall_Enable)
|
||||
{
|
||||
/* Enable general call */
|
||||
I2C->CR |= I2C_GeneralCall_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable general call */
|
||||
I2C->CR &= I2C_GeneralCall_Disable;
|
||||
}
|
||||
|
||||
/* Configure acknowledgement */
|
||||
if (I2C_InitStruct->I2C_Ack == I2C_Ack_Enable)
|
||||
{
|
||||
/* Enable acknowledgement */
|
||||
I2C->CR |= I2C_Ack_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable acknowledgement */
|
||||
I2C->CR &= I2C_Ack_Disable;
|
||||
}
|
||||
|
||||
/* Configure LSB own address */
|
||||
I2C->OAR1 = I2C_InitStruct->I2C_OwnAddress;
|
||||
/* Clear MSB own address ADD[9:8] bits */
|
||||
I2C->OAR2 &= I2C_AddressHigh_Mask;
|
||||
/* Set MSB own address value */
|
||||
I2C->OAR2 |= (I2C_InitStruct->I2C_OwnAddress & I2C_OwnAddress_Mask)>>7;
|
||||
|
||||
/* Configure speed in standard mode */
|
||||
if (I2C_InitStruct->I2C_CLKSpeed <= 100000)
|
||||
{
|
||||
/* Standard mode speed calculate */
|
||||
Result = ((APBClock/I2C_InitStruct->I2C_CLKSpeed)-7)/2;
|
||||
/* Set speed value and clear FM/SM bit for standard mode in LSB clock divider */
|
||||
I2C->CCR = Result & I2C_StandardMode_Mask;
|
||||
}
|
||||
/* Configure speed in fast mode */
|
||||
else if (I2C_InitStruct->I2C_CLKSpeed <= 400000)
|
||||
{
|
||||
/* Fast mode speed calculate */
|
||||
Result = ((APBClock/I2C_InitStruct->I2C_CLKSpeed)-9)/3;
|
||||
/* Set speed value and set FM/SM bit for fast mode in LSB clock divider */
|
||||
I2C->CCR = Result | I2C_FastMode_Mask;
|
||||
}
|
||||
/* Set speed in MSB clock divider */
|
||||
I2C->ECCR = Result >>7;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_StructInit
|
||||
* Description : Fills each I2C_InitStruct member with its default value.
|
||||
* Input : - I2C_InitStruct: pointer to an I2C_InitTypeDef structure
|
||||
which will be initialized.
|
||||
* Output : None
|
||||
* Return : None.
|
||||
*******************************************************************************/
|
||||
void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
|
||||
{
|
||||
/* Initialize the I2C_CLKSpeed member */
|
||||
I2C_InitStruct->I2C_CLKSpeed = 5000;
|
||||
|
||||
/* Initialize the I2C_OwnAddress member */
|
||||
I2C_InitStruct->I2C_OwnAddress = 0x0;
|
||||
|
||||
/* Initialize the I2C_GeneralCall member */
|
||||
I2C_InitStruct->I2C_GeneralCall = I2C_GeneralCall_Disable;
|
||||
|
||||
/* Initialize the I2C_Ack member */
|
||||
I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_Cmd
|
||||
* Description : Enables or disables the I2C peripheral.
|
||||
* Input : - NewState: new state of the I2C peripheral. This parameter
|
||||
* can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None.
|
||||
*******************************************************************************/
|
||||
void I2C_Cmd(FunctionalState NewState)
|
||||
{
|
||||
if (NewState == ENABLE)
|
||||
{
|
||||
/* Enable the I2C peripheral by setting twice the PE bit on the CR register */
|
||||
I2C->CR |= I2C_PE_Set;
|
||||
I2C->CR |= I2C_PE_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the I2C peripheral */
|
||||
I2C->CR &= I2C_PE_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_GenerateSTART
|
||||
* Description : Generates I2C communication START condition.
|
||||
* Input : - NewState: new state of the I2C START condition generation.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None.
|
||||
*******************************************************************************/
|
||||
void I2C_GenerateSTART(FunctionalState NewState)
|
||||
{
|
||||
if (NewState == ENABLE)
|
||||
{
|
||||
/* Generate a START condition */
|
||||
I2C->CR |= I2C_Start_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the START condition generation */
|
||||
I2C->CR &= I2C_Start_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_GenerateSTOP
|
||||
* Description : Generates I2C communication STOP condition.
|
||||
* Input : - NewState: new state of the I2C STOP condition generation.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None.
|
||||
*******************************************************************************/
|
||||
void I2C_GenerateSTOP(FunctionalState NewState)
|
||||
{
|
||||
if (NewState == ENABLE)
|
||||
{
|
||||
/* Generate a SIOP condition */
|
||||
I2C->CR |= I2C_Stop_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the STOP condition generation */
|
||||
I2C->CR &= I2C_Stop_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_AcknowledgeConfig
|
||||
* Description : Enables or disables I2C acknowledge feature.
|
||||
* Input : - NewState: new state of the I2C Acknowledgement.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None.
|
||||
*******************************************************************************/
|
||||
void I2C_AcknowledgeConfig(FunctionalState NewState)
|
||||
{
|
||||
if (NewState == ENABLE)
|
||||
{
|
||||
/* Enable the acknowledgement */
|
||||
I2C->CR |= I2C_Ack_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the acknowledgement */
|
||||
I2C->CR &= I2C_Ack_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_ITConfig
|
||||
* Description : Enables or disables the I2C interrupt.
|
||||
* Input : - NewState: new state of the I2C interrupt.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None.
|
||||
*******************************************************************************/
|
||||
void I2C_ITConfig(FunctionalState NewState)
|
||||
{
|
||||
if (NewState == ENABLE)
|
||||
{
|
||||
/* Enable the I2C interrupt */
|
||||
I2C->CR |= I2C_IT_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the I2C interrupt */
|
||||
I2C->CR &= I2C_IT_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_GetLastEvent
|
||||
* Description : Gets the last I2C event that has occurred.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The Last happened Event.
|
||||
*******************************************************************************/
|
||||
u16 I2C_GetLastEvent(void)
|
||||
{
|
||||
u16 Flag1 = 0, Flag2 = 0, LastEvent = 0;
|
||||
|
||||
Flag1 = I2C->SR1;
|
||||
Flag2 = I2C->SR2;
|
||||
Flag2 = Flag2<<8;
|
||||
/* Get the last event value from I2C status register */
|
||||
LastEvent = (((Flag1 | (Flag2)) & I2C_Event_Mask));
|
||||
/* Return the last event */
|
||||
return LastEvent;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_CheckEvent
|
||||
* Description : Checks whether the Last I2C Event is equal to the one passed
|
||||
* as parameter.
|
||||
* Input : - I2C_EVENT: specifies the event to be checked. This parameter
|
||||
* can be one of the following values:
|
||||
* - I2C_EVENT_SLAVE_ADDRESS_MATCHED
|
||||
* - I2C_EVENT_SLAVE_BYTE_RECEIVED
|
||||
* - I2C_EVENT_SLAVE_BYTE_TRANSMITTED
|
||||
* - I2C_EVENT_SLAVE_ACK_FAILURE
|
||||
* - I2C_EVENT_MASTER_MODE_SELECT
|
||||
* - I2C_EVENT_MASTER_MODE_SELECTED
|
||||
* - I2C_EVENT_MASTER_BYTE_RECEIVED
|
||||
* - I2C_EVENT_MASTER_BYTE_TRANSMITTED
|
||||
* - I2C_EVENT_MASTER_MODE_ADDRESS10
|
||||
* - I2C_EVENT_SLAVE_STOP_DETECTED
|
||||
* Output : None
|
||||
* Return : An ErrorStatus enumuration value:
|
||||
* - SUCCESS: Last event is equal to the I2C_Event
|
||||
* - ERROR: Last event is different from the I2C_Event
|
||||
*******************************************************************************/
|
||||
ErrorStatus I2C_CheckEvent(u16 I2C_EVENT)
|
||||
{
|
||||
u16 LastEvent = I2C_GetLastEvent();
|
||||
|
||||
/* Check whether the last event is equal to I2C_EVENT */
|
||||
if (LastEvent == I2C_EVENT)
|
||||
{
|
||||
/* Return SUCCESS when last event is equal to I2C_EVENT */
|
||||
return SUCCESS;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Return ERROR when last event is different from I2C_EVENT */
|
||||
return ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_SendData
|
||||
* Description : Sends a data byte.
|
||||
* Input : - Data: indicates the byte to be transmitted.
|
||||
* Output : None
|
||||
* Return : None.
|
||||
*******************************************************************************/
|
||||
void I2C_SendData(u8 Data)
|
||||
{
|
||||
/* Write in the DR register the byte to be sent */
|
||||
I2C->DR = Data;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_ReceiveData
|
||||
* Description : Reads the received byte.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The received byte
|
||||
*******************************************************************************/
|
||||
u8 I2C_ReceiveData(void)
|
||||
{
|
||||
/* Return from the DR register the received byte */
|
||||
return I2C->DR;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_Send7bitAddress
|
||||
* Description : Transmits the address byte to select the slave device.
|
||||
* Input : - Address: specifies the slave address which will be transmitted
|
||||
* - Direction: specifies whether the I2C device will be a
|
||||
* Transmitter or a Receiver. This parameter can be one of the
|
||||
* following values
|
||||
* - I2C_MODE_TRANSMITTER: Transmitter mode
|
||||
* - I2C_MODE_RECEIVER: Receiver mode
|
||||
* Output : None
|
||||
* Return : None.
|
||||
*******************************************************************************/
|
||||
void I2C_Send7bitAddress(u8 Address, u8 Direction)
|
||||
{
|
||||
/* Test on the direction to define the read/write bit */
|
||||
if (Direction == I2C_MODE_RECEIVER)
|
||||
{
|
||||
/* Set the address bit0 for read */
|
||||
Address |= I2C_ADD0_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset the address bit0 for write */
|
||||
Address &= I2C_ADD0_Reset;
|
||||
}
|
||||
/* Send the address */
|
||||
I2C->DR = Address;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_ReadRegister
|
||||
* Description : Reads the specified I2C register and returns its value.
|
||||
* Input1 : - I2C_Register: specifies the register to read.
|
||||
* This parameter can be one of the following values:
|
||||
* - I2C_CR: CR register.
|
||||
* - I2C_SR1: SR1 register.
|
||||
* - I2C_SR2: SR2 register.
|
||||
* - I2C_CCR: CCR register.
|
||||
* - I2C_OAR1: OAR1 register.
|
||||
* - I2C_OAR2: OAR2 register.
|
||||
* - I2C_DR: DR register.
|
||||
* - I2C_ECCR: ECCR register.
|
||||
* Output : None
|
||||
* Return : The value of the read register.
|
||||
*******************************************************************************/
|
||||
u8 I2C_ReadRegister(u8 I2C_Register)
|
||||
{
|
||||
/* Return the selected register value */
|
||||
return (*(u8 *)(I2C_BASE + I2C_Register));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_GetFlagStatus
|
||||
* Description : Checks whether the specified I2C flag is set or not.
|
||||
* Input : - I2C_FLAG: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* - I2C_FLAG_SB: Start bit flag (Master mode)
|
||||
* - I2C_FLAG_M_SL: Master/Slave flag
|
||||
* - I2C_FLAG_ADSL: Address matched flag (Slave mode)
|
||||
* - I2C_FLAG_BTF: Byte transfer finished flag
|
||||
* - I2C_FLAG_BUSY: Bus busy flag
|
||||
* - I2C_FLAG_TRA: Transmitter/Receiver flag
|
||||
* - I2C_FLAG_ADD10: 10-bit addressing in Master mode flag
|
||||
* - I2C_FLAG_EVF: Event flag
|
||||
* - I2C_FLAG_GCAL: General call flag (slave mode)
|
||||
* - I2C_FLAG_BERR: Bus error flag
|
||||
* - I2C_FLAG_ARLO: Arbitration lost flag
|
||||
* - I2C_FLAG_STOPF: Stop detection flag (slave mode)
|
||||
* - I2C_FLAG_AF: Acknowledge failure flag
|
||||
* - I2C_FLAG_ENDAD: End of address transmission flag
|
||||
* - I2C_FLAG_ACK: Acknowledge enable flag
|
||||
* Output : None
|
||||
* Return : The NewState of the I2C_FLAG (SET or RESET).
|
||||
*******************************************************************************/
|
||||
FlagStatus I2C_GetFlagStatus(u16 I2C_FLAG)
|
||||
{
|
||||
u16 Flag1 = 0, Flag2 = 0, Flag3 = 0, Tmp = 0;
|
||||
|
||||
Flag1 = I2C->SR1;
|
||||
Flag2 = I2C->SR2;
|
||||
Flag2 = Flag2<<8;
|
||||
Flag3 = I2C->CR & 0x04;
|
||||
|
||||
/* Get all the I2C flags in a unique register*/
|
||||
Tmp = (((Flag1 | (Flag2)) & I2C_Event_Mask) | (Flag3<<12));
|
||||
|
||||
/* Check the status of the specified I2C flag */
|
||||
if((Tmp & I2C_FLAG) != RESET)
|
||||
{
|
||||
/* Return SET if I2C_FLAG is set */
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Return RESET if I2C_FLAG is reset */
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_ClearFlag
|
||||
* Description : Clears the I2C’s pending flags
|
||||
* Input : - I2C_FLAG: specifies the flag to clear.
|
||||
* This parameter can be one of the following values:
|
||||
* - I2C_FLAG_SB: Start bit flag
|
||||
* - I2C_FLAG_M_SL: Master/Slave flag
|
||||
* - I2C_FLAG_ADSL: Adress matched flag
|
||||
* - I2C_FLAG_BTF: Byte transfer finished flag
|
||||
* - I2C_FLAG_BUSY: Bus busy flag
|
||||
* - I2C_FLAG_TRA: Transmitter/Receiver flag
|
||||
* - I2C_FLAG_ADD10: 10-bit addressing in Master mode flag
|
||||
* - I2C_FLAG_EVF: Event flag
|
||||
* - I2C_FLAG_GCAL: General call flag
|
||||
* - I2C_FLAG_BERR: Bus error flag
|
||||
* - I2C_FLAG_ARLO: Arbitration lost flag
|
||||
* - I2C_FLAG_STOPF: Stop detection flag
|
||||
* - I2C_FLAG_AF: Acknowledge failure flag
|
||||
* - I2C_FLAG_ENDAD: End of address transmission flag
|
||||
* - I2C_FLAG_ACK: Acknowledge enable flag
|
||||
* - parameter needed in the case that the flag to be cleared
|
||||
* need a write in one register
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void I2C_ClearFlag(u16 I2C_FLAG, ...)
|
||||
{
|
||||
u8 Tmp = (u8)*((u32 *) & I2C_FLAG + sizeof(I2C_FLAG));
|
||||
|
||||
/* flags that need a read of the SR2 register to be cleared */
|
||||
if ((I2C_FLAG == I2C_FLAG_ADD10) || (I2C_FLAG == I2C_FLAG_EVF) ||
|
||||
(I2C_FLAG == I2C_FLAG_STOPF) || (I2C_FLAG == I2C_FLAG_AF) ||
|
||||
(I2C_FLAG == I2C_FLAG_BERR) || (I2C_FLAG == I2C_FLAG_ARLO) ||
|
||||
(I2C_FLAG == I2C_FLAG_ENDAD))
|
||||
{
|
||||
/* Read the SR2 register */
|
||||
(void)I2C->SR2;
|
||||
|
||||
/* Two flags need a second step to be cleared */
|
||||
switch (I2C_FLAG)
|
||||
{
|
||||
case I2C_FLAG_ADD10:
|
||||
/* Send the MSB 10bit address passed as second parameter */
|
||||
I2C->DR = Tmp;
|
||||
break;
|
||||
case I2C_FLAG_ENDAD:
|
||||
/* Write to the I2C_CR register by setting PE bit */
|
||||
I2C->CR |= I2C_PE_Set;
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* flags that need a read of the SR1 register to be cleared */
|
||||
else if (I2C_FLAG==I2C_FLAG_SB || I2C_FLAG==I2C_FLAG_ADSL || I2C_FLAG==I2C_FLAG_BTF || I2C_FLAG==I2C_FLAG_TRA)
|
||||
{
|
||||
/* Read the SR1 register */
|
||||
(void)I2C->SR1;
|
||||
|
||||
/* three flags need a second step to be cleared */
|
||||
if (I2C_FLAG == I2C_FLAG_SB)
|
||||
{
|
||||
/* Send the address byte passed as second parameter */
|
||||
I2C->DR=Tmp;
|
||||
}
|
||||
else if (I2C_FLAG==I2C_FLAG_BTF || I2C_FLAG==I2C_FLAG_TRA)
|
||||
{
|
||||
/* return the received byte in the variable passed as second parameter */
|
||||
Tmp=I2C->DR;
|
||||
}
|
||||
}
|
||||
/* flags that need to disable the I2C interface */
|
||||
else if ( I2C_FLAG==I2C_FLAG_M_SL || I2C_FLAG==I2C_FLAG_GCAL)
|
||||
{
|
||||
I2C_Cmd(DISABLE);
|
||||
I2C_Cmd(ENABLE);
|
||||
}
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
448
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_it.c
Normal file
448
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_it.c
Normal file
|
@ -0,0 +1,448 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_it.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : Main Interrupt Service Routines.
|
||||
* This file can be used to describe all the exceptions
|
||||
* subroutines that may occur within user application.
|
||||
* When an interrupt happens, the software will branch
|
||||
* automatically to the corresponding routine according
|
||||
* to the interrupt vector loaded in the PC register.
|
||||
* The following routines are all empty, user can write code
|
||||
* for exceptions handlers and peripherals IRQ interrupts.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Undefined_Handler
|
||||
* Description : This function handles Undefined instruction exception.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Undefined_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : FIQ_Handler
|
||||
* Description : This function handles FIQ exception.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void FIQ_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SWI_Handler
|
||||
* Description : This function handles SW exception.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SWI_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Prefetch_Handler
|
||||
* Description : This function handles preftetch abort exception.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Prefetch_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Abort_Handler
|
||||
* Description : This function handles data abort exception.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Abort_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WAKUP_IRQHandler
|
||||
* Description : This function handles External line 15(WAKUP) interrupt
|
||||
* request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void WAKUP_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM2_OC2_IRQHandler
|
||||
* Description : This function handles TIM2 Output Compare 2 interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM2_OC2_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM2_OC1_IRQHandler
|
||||
* Description : This function handles TIM2 Output Compare 1 interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM2_OC1_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM2_IC12_IRQHandler
|
||||
* Description : This function handles TIM2 Input Capture 1 & 2 interrupt
|
||||
* request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM2_IC12_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM2_UP_IRQHandler
|
||||
* Description : This function handles TIM2 Update interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM2_UP_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM1_OC2_IRQHandler
|
||||
* Description : This function handles TIM1 Output Compare 2 interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM1_OC2_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM1_OC1_IRQHandler
|
||||
* Description : This function handles TIM1 Output Compare 1 interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM1_OC1_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM1_IC12_IRQHandler
|
||||
* Description : This function handles TIM1 Input Capture 1 & 2 interrupt
|
||||
* request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM1_IC12_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM1_UP_IRQHandler
|
||||
* Description : This function handles TIM1 Update interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM1_UP_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM0_OC2_IRQHandler
|
||||
* Description : This function handles TIM0 Output Compare 2 interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM0_OC2_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM0_OC1_IRQHandler
|
||||
* Description : This function handles TIM0 Output Compare 1 interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM0_OC1_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM0_IC12_IRQHandler
|
||||
* Description : This function handles TIM0 Input Capture 1 & 2 interrupt
|
||||
* request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM0_IC12_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TIM0_UP_IRQHandler
|
||||
* Description : This function handles TIM0 Update interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TIM0_UP_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : PWM_OC123_IRQHandler
|
||||
* Description : This function handles PWM Output Compare 1,2&3 interrupt
|
||||
* request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void PWM_OC123_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : PWM_EM_IRQHandler
|
||||
* Description : This function handles PWM Emergency interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void PWM_EM_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : PWM_UP_IRQHandler
|
||||
* Description : This function handles PWM Update interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void PWM_UP_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : I2C_IRQHandler
|
||||
* Description : This function handles I2C global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void I2C_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP1_IRQHandler
|
||||
* Description : This function handles SSP1 interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP1_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP0_IRQHandler
|
||||
* Description : This function handles SSP0 interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP0_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART2_IRQHandler
|
||||
* Description : This function handles UART2 global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART2_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART1_IRQHandler
|
||||
* Description : This function handles UART1 global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART1_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART0_IRQHandler
|
||||
* Description : This function handles UART0 global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART0_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CAN_IRQHandler
|
||||
* Description : This function handles CAN global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void CAN_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : USBLP_IRQHandler
|
||||
* Description : This function handles USB Low Priority event interrupt
|
||||
* request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void USB_LP_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : USBHP_IRQHandler
|
||||
* Description : This function handles USB High Priority event interrupt
|
||||
* request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void USB_HP_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ADC_IRQHandler
|
||||
* Description : This function handles ADC global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void ADC_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA_IRQHandler
|
||||
* Description : This function handles DMA global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void DMA_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : EXTIT_IRQHandler
|
||||
* Description : This function handles External lines 14 to 1 interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void EXTIT_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : MRCC_IRQHandler
|
||||
* Description : This function handles MRCC interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void MRCC_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : FLASHSMI_IRQHandler
|
||||
* Description : This function handles Flash and SMI global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void FLASHSMI_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_IRQHandler
|
||||
* Description : This function handles RTC global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_IRQHandler
|
||||
* Description : This function handles TB global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_IRQHandler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
178
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_lib.c
Normal file
178
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_lib.c
Normal file
|
@ -0,0 +1,178 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_lib.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all peripherals pointers initialization.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
#define EXT
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_lib.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
#ifdef DEBUG
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : debug
|
||||
* Description : This function initialize peripherals pointers.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void debug(void)
|
||||
{
|
||||
/************************************* SMI ************************************/
|
||||
#ifdef _SMI
|
||||
SMI = (SMI_TypeDef *) SMIR_BASE;
|
||||
#endif /*_SMI */
|
||||
|
||||
/************************************* CFG ************************************/
|
||||
#ifdef _CFG
|
||||
CFG = (CFG_TypeDef *) CFG_BASE;
|
||||
#endif /*_CFG */
|
||||
|
||||
/************************************* MRCC ***********************************/
|
||||
#ifdef _MRCC
|
||||
MRCC = (MRCC_TypeDef *) MRCC_BASE;
|
||||
#endif /*_MRCC */
|
||||
|
||||
/************************************* ADC ************************************/
|
||||
#ifdef _ADC
|
||||
ADC = (ADC_TypeDef *) ADC_BASE;
|
||||
#endif /*_ADC */
|
||||
|
||||
/************************************* TB *************************************/
|
||||
#ifdef _TB
|
||||
TB = (TB_TypeDef *) TB_BASE;
|
||||
#endif /*_TB */
|
||||
|
||||
/************************************* TIM ************************************/
|
||||
#ifdef _TIM0
|
||||
TIM0 = (TIM_TypeDef *) TIM0_BASE;
|
||||
#endif /*_TIM0 */
|
||||
|
||||
#ifdef _TIM1
|
||||
TIM1 = (TIM_TypeDef *) TIM1_BASE;
|
||||
#endif /*_TIM1 */
|
||||
|
||||
#ifdef _TIM2
|
||||
TIM2 = (TIM_TypeDef *) TIM2_BASE;
|
||||
#endif /*_TIM2 */
|
||||
|
||||
/************************************* PWM ************************************/
|
||||
#ifdef _PWM
|
||||
PWM = (PWM_TypeDef *) PWM_BASE;
|
||||
#endif /*_PWM */
|
||||
|
||||
/************************************* WDG ************************************/
|
||||
#ifdef _WDG
|
||||
WDG = (WDG_TypeDef *) WDG_BASE;
|
||||
#endif /*_WDG */
|
||||
|
||||
/************************************* SSP ************************************/
|
||||
#ifdef _SSP0
|
||||
SSP0 = (SSP_TypeDef *) SSP0_BASE;
|
||||
#endif /*_SSP0 */
|
||||
|
||||
#ifdef _SSP1
|
||||
SSP1 = (SSP_TypeDef *) SSP1_BASE;
|
||||
#endif /*_SSP1 */
|
||||
|
||||
/************************************* CAN ************************************/
|
||||
#ifdef _CAN
|
||||
CAN = (CAN_TypeDef *) CAN_BASE;
|
||||
#endif /*_CAN */
|
||||
|
||||
/************************************* I2C ************************************/
|
||||
#ifdef _I2C
|
||||
I2C = (I2C_TypeDef *) I2C_BASE;
|
||||
#endif /*_I2C */
|
||||
|
||||
/************************************* UART ***********************************/
|
||||
#ifdef _UART0
|
||||
UART0 = (UART_TypeDef *) UART0_BASE;
|
||||
#endif /*_UART0 */
|
||||
|
||||
#ifdef _UART1
|
||||
UART1 = (UART_TypeDef *) UART1_BASE;
|
||||
#endif /*_UART1 */
|
||||
|
||||
#ifdef _UART2
|
||||
UART2 = (UART_TypeDef *) UART2_BASE;
|
||||
#endif /*_UART2 */
|
||||
|
||||
/************************************* GPIO ***********************************/
|
||||
#ifdef _GPIO0
|
||||
GPIO0 = (GPIO_TypeDef *) GPIO0_BASE;
|
||||
#endif /*_GPIO0 */
|
||||
|
||||
#ifdef _GPIO1
|
||||
GPIO1 = (GPIO_TypeDef *) GPIO1_BASE;
|
||||
#endif /*_GPIO1 */
|
||||
|
||||
#ifdef _GPIO2
|
||||
GPIO2 = (GPIO_TypeDef *) GPIO2_BASE;
|
||||
#endif /*_GPIO2 */
|
||||
|
||||
#ifdef _GPIOREMAP
|
||||
GPIOREMAP = (GPIOREMAP_TypeDef *) GPIOREMAP_BASE;
|
||||
#endif /*_GPIOREMAP */
|
||||
|
||||
/************************************* DMA ************************************/
|
||||
#ifdef _DMA
|
||||
DMA = (DMA_TypeDef *) DMA_BASE;
|
||||
#endif /*_DMA */
|
||||
|
||||
#ifdef _DMA_Stream0
|
||||
DMA_Stream0 = (DMA_Stream_TypeDef *) DMA_Stream0_BASE;
|
||||
#endif /*_DMA_Stream0 */
|
||||
|
||||
#ifdef _DMA_Stream1
|
||||
DMA_Stream1 = (DMA_Stream_TypeDef *) DMA_Stream1_BASE;
|
||||
#endif /*_DMA_Stream1 */
|
||||
|
||||
#ifdef _DMA_Stream2
|
||||
DMA_Stream2 = (DMA_Stream_TypeDef *) DMA_Stream2_BASE;
|
||||
#endif /*_DMA_Stream2 */
|
||||
|
||||
#ifdef _DMA_Stream3
|
||||
DMA_Stream3 = (DMA_Stream_TypeDef *) DMA_Stream3_BASE;
|
||||
#endif /*_DMA_Stream3 */
|
||||
|
||||
/************************************* RTC ************************************/
|
||||
#ifdef _RTC
|
||||
RTC = (RTC_TypeDef *) RTC_BASE;
|
||||
#endif /*_RTC */
|
||||
|
||||
/************************************* EXTIT **********************************/
|
||||
#ifdef _EXTIT
|
||||
EXTIT = (EXTIT_TypeDef *) EXTIT_BASE;
|
||||
#endif /*_EXTIT */
|
||||
|
||||
/************************************* EIC ************************************/
|
||||
#ifdef _EIC
|
||||
EIC = (EIC_TypeDef *) EIC_BASE;
|
||||
#endif /*_EIC */
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
1673
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_mrcc.c
Normal file
1673
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_mrcc.c
Normal file
File diff suppressed because it is too large
Load diff
1153
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_pwm.c
Normal file
1153
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_pwm.c
Normal file
File diff suppressed because it is too large
Load diff
326
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_rtc.c
Normal file
326
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_rtc.c
Normal file
|
@ -0,0 +1,326 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_rtc.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the RTC software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_rtc.h"
|
||||
#include "75x_mrcc.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
#define RTC_CNF_Enable_Mask 0x0010 /* Configuration Flag Enable Mask */
|
||||
#define RTC_CNF_Disable_Mask 0xFFEF /* Configuration Flag Disable Mask */
|
||||
#define RTC_LSB_Mask 0x0000FFFF /* RTC LSB Mask */
|
||||
#define RTC_MSB_Mask 0xFFFF0000 /* RTC MSB Mask */
|
||||
#define RTC_Prescaler_MSB_Mask 0x000F0000 /* RTC Prescaler MSB Mask */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_DeInit
|
||||
* Description : Deinitializes the RTC peripheral registers to their
|
||||
* default reset values.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_DeInit(void)
|
||||
{
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_RTC,ENABLE);
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_RTC,DISABLE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_ITConfig
|
||||
* Description : Enables or disables the specified RTC interrupts.
|
||||
* Input : - RTC_IT: specifies the RTC interrupts sources to be enabled
|
||||
* or disabled.
|
||||
* This parameter can be a combination of one or more of the
|
||||
* following values:
|
||||
* - RTC_IT_Overflow: Overflow interrupt
|
||||
* - RTC_IT_Alarm: Alarm interrupt
|
||||
* - RTC_IT_Second: Second interrupt
|
||||
* - NewState: new state of the specified RTC interrupts.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_ITConfig(u16 RTC_IT, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
RTC->CRH |= RTC_IT;
|
||||
}
|
||||
else
|
||||
{
|
||||
RTC->CRH &= ~RTC_IT;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_EnterConfigMode
|
||||
* Description : Enters the RTC configuration mode.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_EnterConfigMode(void)
|
||||
{
|
||||
/* Set the CNF flag to enter in the Configuration Mode */
|
||||
RTC->CRL |= RTC_CNF_Enable_Mask;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_ExitConfigMode
|
||||
* Description : Exits from the RTC configuration mode.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_ExitConfigMode(void)
|
||||
{
|
||||
/* Reset the CNF flag to exit from the Configuration Mode */
|
||||
RTC->CRL &= RTC_CNF_Disable_Mask;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_GetCounter
|
||||
* Description : Gets the RTC counter value.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : RTC counter value.
|
||||
*******************************************************************************/
|
||||
u32 RTC_GetCounter(void)
|
||||
{
|
||||
u16 Tmp = 0;
|
||||
Tmp = RTC->CNTL;
|
||||
|
||||
return (((u32)RTC->CNTH << 16 ) |Tmp) ;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_SetCounter
|
||||
* Description : Sets the RTC counter value.
|
||||
* Input : RTC counter new value.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_SetCounter(u32 CounterValue)
|
||||
{
|
||||
RTC_EnterConfigMode();
|
||||
|
||||
/* COUNTER Config ------------------------------------------------------------*/
|
||||
/* Set RTC COUNTER MSB word */
|
||||
RTC->CNTH =(CounterValue & RTC_MSB_Mask) >> 16;
|
||||
/* Set RTC COUNTER LSB word */
|
||||
RTC->CNTL =(CounterValue & RTC_LSB_Mask);
|
||||
|
||||
RTC_ExitConfigMode();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_SetPrescaler
|
||||
* Description : Sets the RTC prescaler value.
|
||||
* Input : RTC prescaler new value.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_SetPrescaler(u32 PrescalerValue)
|
||||
{
|
||||
RTC_EnterConfigMode();
|
||||
|
||||
/* PRESCALER Config ----------------------------------------------------------*/
|
||||
/* Set RTC PRESCALER MSB word */
|
||||
RTC->PRLH = (PrescalerValue & RTC_Prescaler_MSB_Mask) >> 16;
|
||||
/* Set RTC PRESCALER LSB word */
|
||||
RTC->PRLL = (PrescalerValue & RTC_LSB_Mask);
|
||||
|
||||
RTC_ExitConfigMode();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_GetPrescaler
|
||||
* Description : Gets the RTC prescaler value.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : RTC prescaler value.
|
||||
*******************************************************************************/
|
||||
u32 RTC_GetPrescaler(void)
|
||||
{
|
||||
u16 Tmp = 0;
|
||||
Tmp = RTC->PRLL;
|
||||
|
||||
return (((u32)(RTC->PRLH & 0x000F) << 16 ) | Tmp);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_SetAlarm
|
||||
* Description : Sets the RTC alarm value.
|
||||
* Input : RTC alarm new value.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_SetAlarm(u32 AlarmValue)
|
||||
{
|
||||
RTC_EnterConfigMode();
|
||||
|
||||
/* ALARM Config --------------------------------------------------------------*/
|
||||
/* Set the ALARM MSB word */
|
||||
RTC->ALRH = (AlarmValue & RTC_MSB_Mask) >> 16;
|
||||
/* Set the ALARM LSB word */
|
||||
RTC->ALRL = (AlarmValue & RTC_LSB_Mask);
|
||||
|
||||
RTC_ExitConfigMode();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_GetDivider
|
||||
* Description : Gets the RTC divider value.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : RTC Divider value.
|
||||
*******************************************************************************/
|
||||
u32 RTC_GetDivider(void)
|
||||
{
|
||||
u16 Tmp = 0;
|
||||
Tmp = RTC->DIVL ;
|
||||
return (((u32)(RTC->DIVH & 0x000F) << 16 ) | Tmp);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_WaitForLastTask
|
||||
* Description : Waits until last write operation on RTC registers has finished.
|
||||
* This function must be called before any write to RTC registers.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_WaitForLastTask(void)
|
||||
{
|
||||
/* Loop until RTOFF flag is set */
|
||||
while ((RTC->CRL & RTC_FLAG_RTOFF) == RESET);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_WaitForSynchro
|
||||
* Description : Waits until the RTC registers (RTC_CNT, RTC_ALR and RTC_PRL)
|
||||
* are synchronized with RTC APB clock.
|
||||
* This function must be called before any read operation after
|
||||
* an APB reset or an APB clock stop.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_WaitForSynchro(void)
|
||||
{
|
||||
/* Clear RSF flag */
|
||||
RTC->CRL &= ~RTC_FLAG_RSF;
|
||||
|
||||
/* Loop until RSF flag is set */
|
||||
while((RTC->CRL & RTC_FLAG_RSF)== RESET);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_GetFlagStatus
|
||||
* Description : Checks whether the specified RTC flag is set or not.
|
||||
* Input : RTC_FLAG: specifies the flag to check.
|
||||
* This parameter can be one the following values:
|
||||
* - RTC_FLAG_RTOFF: RTC Operation OFF flag
|
||||
* - RTC_FLAG_RSF: Registers Synchronized flag
|
||||
* - RTC_FLAG_Overflow: Overflow interrupt flag
|
||||
* - RTC_FLAG_Alarm: Alarm interrupt flag
|
||||
* - RTC_FLAG_Second: Second interrupt flag
|
||||
* Output : None
|
||||
* Return : The new state of RTC_FLAG (SET or RESET).
|
||||
*******************************************************************************/
|
||||
FlagStatus RTC_GetFlagStatus(u16 RTC_FLAG)
|
||||
{
|
||||
if((RTC->CRL & RTC_FLAG) != RESET)
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_ClearFlag
|
||||
* Description : Clears the RTC’s pending flags.
|
||||
* Input : RTC_FLAG: specifies the flag to clear.
|
||||
* This parameter can be a combination of one or more of
|
||||
* the following values:
|
||||
* - RTC_FLAG_RSF: Registers Synchronized flag. This flag
|
||||
* is cleared only after an APB reset or an APB Clock stop.
|
||||
* - RTC_FLAG_Overflow: Overflow interrupt flag
|
||||
* - RTC_FLAG_Alarm: Alarm interrupt flag
|
||||
* - RTC_FLAG_Second: Second interrupt flag
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_ClearFlag(u16 RTC_FLAG)
|
||||
{
|
||||
/* Clear the coressponding RTC flag */
|
||||
RTC->CRL &= ~RTC_FLAG;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_GetITStatus
|
||||
* Description : Checks whether the specified RTC interrupt has occured or not.
|
||||
* Input : RTC_IT: specifies the RTC interrupts sources to check.
|
||||
* This parameter can be a combination of one or more of
|
||||
* the following values:
|
||||
* - RTC_IT_Overflow: Overflow interrupt
|
||||
* - RTC_IT_Alarm: Alarm interrupt
|
||||
* - RTC_IT_Second: Second interrupt
|
||||
* Output : None
|
||||
* Return : The new state of the RTC_IT (SET or RESET).
|
||||
*******************************************************************************/
|
||||
ITStatus RTC_GetITStatus(u16 RTC_IT)
|
||||
{
|
||||
if(((RTC->CRH & RTC_IT) != RESET)&& ((RTC->CRL & RTC_IT) != RESET))
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_ClearITPendingBit
|
||||
* Description : Clears the RTC’s interrupt pending bits.
|
||||
* Input : RTC_IT: specifies the interrupt pending bit to clear.
|
||||
* This parameter can be any combination of one or more of
|
||||
* the following values:
|
||||
* - RTC_IT_Overflow: Overflow interrupt
|
||||
* - RTC_IT_Alarm: Alarm interrupt
|
||||
* - RTC_IT_Second: Second interrupt
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void RTC_ClearITPendingBit(u16 RTC_IT)
|
||||
{
|
||||
/* Clear the coressponding RTC pending bit */
|
||||
RTC->CRL &= ~RTC_IT;
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
551
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_smi.c
Normal file
551
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_smi.c
Normal file
|
@ -0,0 +1,551 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_smi.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the SMI software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_smi.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* SMI_CR1 mask bits */
|
||||
#define SMI_HOLDPRESCTCS_RESET_Mask 0xFF00800F
|
||||
#define SMI_Prescaler_MaxValue 0x7F
|
||||
#define SMI_DeselectTime_MaxValue 0x0F
|
||||
#define SMI_ClockHold_Mask 0x00
|
||||
#define SMI_Prescaler_Mask 0x02
|
||||
#define SMI_DeselectTime_Mask 0x5
|
||||
|
||||
/* SMI_CR2 mask bits */
|
||||
#define SMI_BS_RESET_Mask 0xFFFFCFFF
|
||||
#define SMI_BS_Bank1_Mask 0x00001000
|
||||
#define SMI_BS_Bank2_Mask 0x00002000
|
||||
#define SMI_BS_Bank3_Mask 0x00003000
|
||||
#define SMI_WEN_Mask 0x00000800
|
||||
#define SMI_RSR_Mask 0x00000400
|
||||
#define SMI_SEND_Mask 0x00000080
|
||||
#define SMI_TRARECLENGTH_RESET_Mask 0xFFFFFF88
|
||||
|
||||
/* SMI_SR mask bits */
|
||||
#define SMI_STATUSREGISTER_Mask 0xFF
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_DeInit
|
||||
* Description : Deinitializes the SMI peripheral registers to their default
|
||||
* reset values. This function must not be used when booting
|
||||
* from the SMI external memory.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_DeInit(void)
|
||||
{
|
||||
SMI->CR1 = 0x00000250;
|
||||
SMI->CR2 = 0x00;
|
||||
SMI->SR &= 0xFFFFF0FF;
|
||||
SMI->TR = 0x00;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_Init
|
||||
* Description : Initializes the SMI peripheral according to the specified
|
||||
* parameters in the SMI_InitStruct.
|
||||
* Input : - SMI_InitStruct: pointer to a SMI_InitTypeDef structure that
|
||||
* contains the configuration information for the specified
|
||||
* SMI peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_Init(SMI_InitTypeDef* SMI_InitStruct)
|
||||
{
|
||||
u32 Temp = 0;
|
||||
|
||||
/* Clear HOLD[7:0], PRESC[6:0] and TCS[3:0] bits */
|
||||
Temp = SMI->CR1 & SMI_HOLDPRESCTCS_RESET_Mask;
|
||||
|
||||
/* Set HOLD[7:0] bits according to SMI_ClockHold value */
|
||||
Temp |= SMI_InitStruct->SMI_ClockHold << 16;
|
||||
|
||||
if(SMI_InitStruct->SMI_Prescaler <= SMI_Prescaler_MaxValue)
|
||||
{
|
||||
/* Set PRESC[6:0] bits according to SMI_Prescaler value */
|
||||
Temp |= SMI_InitStruct->SMI_Prescaler << 8;
|
||||
}
|
||||
|
||||
if(SMI_InitStruct->SMI_DeselectTime <= SMI_DeselectTime_MaxValue)
|
||||
{
|
||||
/* Set TCS[3:0] bits according to SMI_DeselectTime value */
|
||||
Temp |= SMI_InitStruct->SMI_DeselectTime << 4;
|
||||
}
|
||||
|
||||
/* Store the new value */
|
||||
SMI->CR1 = Temp;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_StructInit
|
||||
* Description : Fills each SMI_InitStruct member with its reset value.
|
||||
* Input : - SMI_InitStruct: pointer to a SMI_InitTypeDef structure which
|
||||
* will be initialized.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_StructInit(SMI_InitTypeDef* SMI_InitStruct)
|
||||
{
|
||||
/* SMI_CK is sent continuously */
|
||||
SMI_InitStruct->SMI_ClockHold = SMI_ClockHold_Mask;
|
||||
|
||||
/* SMI_CK = HCLK/2 */
|
||||
SMI_InitStruct->SMI_Prescaler = SMI_Prescaler_Mask;
|
||||
|
||||
/* Deselect Time set to 6*SMI_CK periods */
|
||||
SMI_InitStruct->SMI_DeselectTime = SMI_DeselectTime_Mask;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_ModeConfig
|
||||
* Description : Selects the SMI mode: hardware or software.
|
||||
* Input : - SMI_Mode: specifies the SMI mode.
|
||||
* This parameter can be one of the following values:
|
||||
* - SMI_Mode_HW: SMI in hardware mode
|
||||
* - SMI_Mode_SW: SMI in software mode
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_ModeConfig(u32 SMI_Mode)
|
||||
{
|
||||
if(SMI_Mode == SMI_Mode_SW)
|
||||
{
|
||||
SMI->CR1 |= SMI_Mode_SW;
|
||||
}
|
||||
else
|
||||
{
|
||||
SMI->CR1 &= SMI_Mode_HW;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_TxRxLengthConfig
|
||||
* Description : Configures the number of bytes to be transmitted and received
|
||||
* to/from external memory. This function is used in Software
|
||||
* mode only.
|
||||
* Input : - SMI_TxLength: specifies the number of bytes to be transmitted
|
||||
* to external memory.
|
||||
* This parameter can be one of the following values:
|
||||
* - SMI_TxLength_0Bytes: No bytes transmitted
|
||||
* - SMI_TxLength_1Byte: 1 byte transmitted
|
||||
* - SMI_TxLength_2Bytes: 2 bytes transmitted
|
||||
* - SMI_TxLength_3Bytes: 3 bytes transmitted
|
||||
* - SMI_TxLength_4Bytes: 4 bytes transmitted
|
||||
* - SMI_RxLength: specifies the number of bytes to be received
|
||||
* from external memory.
|
||||
* This parameter can be one of the following values:
|
||||
* - SMI_RxLength_0Bytes: No bytes received
|
||||
* - SMI_RxLength_1Byte: 1 byte received
|
||||
* - SMI_RxLength_2Bytes: 2 bytes received
|
||||
* - SMI_RxLength_3Bytes: 3 bytes received
|
||||
* - SMI_RxLength_4Bytes: 4 bytes received
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_TxRxLengthConfig(u32 SMI_TxLength, u32 SMI_RxLength)
|
||||
{
|
||||
u32 Temp = 0;
|
||||
|
||||
/* Clear TRA_LENGTH[2:0] and REC_LENGTH[2:0] bits */
|
||||
Temp = SMI->CR2 & SMI_TRARECLENGTH_RESET_Mask;
|
||||
|
||||
/* Set TRA_LENGTH[2:0] and REC_LENGTH[2:0] bits according to function parameters */
|
||||
Temp |= SMI_TxLength | SMI_RxLength;
|
||||
|
||||
/* Store the new value */
|
||||
SMI->CR2 = Temp;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_BankCmd
|
||||
* Description : Enables or disables the specified memory Bank.
|
||||
* Input : - SMI_Bank: specifies the memory Bank to be enabled or disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* - SMI_Bank_0
|
||||
* - SMI_Bank_1
|
||||
* - SMI_Bank_2
|
||||
* - SMI_Bank_3
|
||||
* - NewState: new state of the specified memory Bank.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_BankCmd(u32 SMI_Bank, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
SMI->CR1 |= SMI_Bank;
|
||||
}
|
||||
else
|
||||
{
|
||||
SMI->CR1 &= ~SMI_Bank;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_ITConfig
|
||||
* Description : Enables or disables the specified SMI interrupts.
|
||||
* Input : - SMI_IT: specifies the SMI interrupts sources to be
|
||||
* enabled or disabled. This parameter can be any combination
|
||||
* of the following values:
|
||||
* - SMI_IT_WC : Write Complete Interrupt
|
||||
* - SMI_IT_TF : Transfer Finished Interrupt
|
||||
* - NewState: new state of the specified SMI interrupts.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_ITConfig(u32 SMI_IT, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
SMI->CR2 |= SMI_IT;
|
||||
}
|
||||
else
|
||||
{
|
||||
SMI->CR2 &= ~SMI_IT;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_SelectBank
|
||||
* Description : Selects the memory Bank to be accessed. Only one Bank can be
|
||||
* selected at a time.
|
||||
* Input : - SMI_Bank: specifies the memory Bank to be selected.
|
||||
* This parameter can be one of the following values:
|
||||
* - SMI_Bank_0
|
||||
* - SMI_Bank_1
|
||||
* - SMI_Bank_2
|
||||
* - SMI_Bank_3
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_SelectBank(u32 SMI_Bank)
|
||||
{
|
||||
/* Clear BS[1:0] bits (Bank0 is selected)*/
|
||||
SMI->CR2 &= SMI_BS_RESET_Mask;
|
||||
|
||||
switch(SMI_Bank)
|
||||
{
|
||||
case SMI_Bank_1:
|
||||
/* Select Bank1 */
|
||||
SMI->CR2 |= SMI_BS_Bank1_Mask;
|
||||
break;
|
||||
|
||||
case SMI_Bank_2:
|
||||
/* Select Bank2 */
|
||||
SMI->CR2 |= SMI_BS_Bank2_Mask;
|
||||
break;
|
||||
|
||||
case SMI_Bank_3:
|
||||
/* Select Bank3 */
|
||||
SMI->CR2 |= SMI_BS_Bank3_Mask;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_SendWENCmd
|
||||
* Description : Sends a Write Enable command to the selected memory Bank.
|
||||
* This function is used in Hardware mode only.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_SendWENCmd(void)
|
||||
{
|
||||
SMI->CR2 |= SMI_WEN_Mask;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_SendRSRCmd
|
||||
* Description : Sends a Read Status Register Command to the selected memory
|
||||
* Bank.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_SendRSRCmd(void)
|
||||
{
|
||||
SMI->CR2 |= SMI_RSR_Mask;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_SendCmd
|
||||
* Description : Sends command to the selected memory Bank. This function is
|
||||
* used in Software mode only.
|
||||
* Input : - Command: specifies the command to send to the external memory.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_SendCmd(u32 Command)
|
||||
{
|
||||
/* Load the command in the Transmit Register */
|
||||
SMI->TR = Command;
|
||||
|
||||
/* Start transfer */
|
||||
SMI->CR2 |= SMI_SEND_Mask;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_FastReadConfig
|
||||
* Description : Enables or disables the Fast Read Mode.
|
||||
* Input : - SMI_FastRead: specifies whether the Fast Read Mode is
|
||||
* enabled or disabled.
|
||||
* This parameter can be one of the following values:
|
||||
* - SMI_FastRead_Disable : Fast Read Mode disabled
|
||||
* - SMI_FastRead_Enable : Fast Read Mode enabled
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_FastReadConfig(u32 SMI_FastRead)
|
||||
{
|
||||
if(SMI_FastRead == SMI_FastRead_Enable)
|
||||
{
|
||||
SMI->CR1 |= SMI_FastRead_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
SMI->CR1 &= SMI_FastRead_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_WriteBurstConfig
|
||||
* Description : Enables or disables the Write Burst Mode.
|
||||
* Input : - SMI_WriteBurst: specifies whether the Write Burst Mode is
|
||||
* enabled or disabled.
|
||||
* This parameter can be one of the following values:
|
||||
* - SMI_WriteBurst_Disable : Write Burst Mode disabled
|
||||
* - SMI_WriteBurst_Enable : Write Burst Mode enabled
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_WriteBurstConfig(u32 SMI_WriteBurst)
|
||||
{
|
||||
if(SMI_WriteBurst == SMI_WriteBurst_Enable)
|
||||
{
|
||||
SMI->CR1 |= SMI_WriteBurst_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
SMI->CR1 &= SMI_WriteBurst_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_WriteByte
|
||||
* Description : Writes a Byte to the selected memory Bank. This function is
|
||||
* used in Hardware mode only.
|
||||
* Before calling this function, send a Write Enable command to
|
||||
* the selected memory Bank using SMI_SendWENCmd() function.
|
||||
* Input : - WriteAddr: external memory address from which the data will
|
||||
* be written.
|
||||
* - Data: data to be written to the external memory.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_WriteByte(u32 WriteAddr, u8 Data)
|
||||
{
|
||||
/* Transfer data to the memory */
|
||||
*(u8 *) WriteAddr = Data;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_WriteHalfWord
|
||||
* Description : Writes a Half Word to the selected memory Bank. This function
|
||||
* is used in Hardware mode only.
|
||||
* Before calling this function, send a Write Enable command to
|
||||
* the selected memory Bank using SMI_SendWENCmd() function.
|
||||
* Input : - WriteAddr: external memory address from which the data will
|
||||
* be written.
|
||||
* - Data: data to be written to the external memory.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_WriteHalfWord(u32 WriteAddr, u16 Data)
|
||||
{
|
||||
/* Transfer data to the memory */
|
||||
*(u16 *) WriteAddr = Data;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_WriteWord
|
||||
* Description : Writes a Word to the selected memory Bank. This function is
|
||||
* used in Hardware mode only.
|
||||
* Before calling this function, send a Write Enable command to
|
||||
* the selected memory Bank using SMI_SendWENCmd() function.
|
||||
* Input : - WriteAddr: external memory address from which the data will
|
||||
* be written.
|
||||
* - Data: data to be written to the external memory.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_WriteWord(u32 WriteAddr, u32 Data)
|
||||
{
|
||||
/* Transfer data to the memory */
|
||||
*(u32 *) WriteAddr = Data;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_ReadByte
|
||||
* Description : Reads a Byte from the selected memory Bank. This function is
|
||||
* used in Hardware mode only.
|
||||
* Input : - ReadAddr: external memory address to read from.
|
||||
* Output : None
|
||||
* Return : Data read from the external memory.
|
||||
*******************************************************************************/
|
||||
u8 SMI_ReadByte(u32 ReadAddr)
|
||||
{
|
||||
return(*(u8 *) ReadAddr);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_ReadHalfWord
|
||||
* Description : Reads a Half Word from the selected memory Bank. This function
|
||||
* is used in Hardware mode only.
|
||||
* Input : - ReadAddr: external memory address to read from.
|
||||
* Output : None
|
||||
* Return : Data read from the external memory.
|
||||
*******************************************************************************/
|
||||
u16 SMI_ReadHalfWord(u32 ReadAddr)
|
||||
{
|
||||
return(*(u16 *) ReadAddr);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_ReadWord
|
||||
* Description : Reads a Word from the selected memory Bank. This function is
|
||||
* used in Hardware mode only.
|
||||
* Input : - ReadAddr: external memory address to read from.
|
||||
* Output : None
|
||||
* Return : Data read from the external memory.
|
||||
*******************************************************************************/
|
||||
u32 SMI_ReadWord(u32 ReadAddr)
|
||||
{
|
||||
return(*(u32 *) ReadAddr);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_ReadMemoryStatusRegister
|
||||
* Description : Reads the status register of the memory connected to the
|
||||
* selected Bank.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : External memory status register value.
|
||||
*******************************************************************************/
|
||||
u8 SMI_ReadMemoryStatusRegister(void)
|
||||
{
|
||||
return((u8) (SMI->SR & SMI_STATUSREGISTER_Mask));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_GetFlagStatus
|
||||
* Description : Checks whether the specified SMI flag is set or not.
|
||||
* Input : - SMI_FLAG: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* - SMI_FLAG_Bank3_WM : Memory Bank3 Write Mode flag
|
||||
* - SMI_FLAG_Bank2_WM : Memory Bank2 Write Mode flag
|
||||
* - SMI_FLAG_Bank1_WM : Memory Bank1 Write Mode flag
|
||||
* - SMI_FLAG_Bank0_WM : Memory Bank0 Write Mode flag
|
||||
* - SMI_FLAG_ERF2 : Error Flag 2: Forbidden Write Request
|
||||
* - SMI_FLAG_ERF1 : Error Flag 1: Forbidden Access
|
||||
* - SMI_FLAG_WC : Write Complete flag
|
||||
* - SMI_FLAG_TF : Transfer Finished flag
|
||||
* Output : None
|
||||
* Return : The new state of SMI_FLAG (SET or RESET).
|
||||
*******************************************************************************/
|
||||
FlagStatus SMI_GetFlagStatus(u32 SMI_FLAG)
|
||||
{
|
||||
if((SMI->SR & SMI_FLAG) != RESET)
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_ClearFlag
|
||||
* Description : Clears the SMI’s pending flags.
|
||||
* Input : - SMI_FLAG: specifies the flag to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* - SMI_FLAG_ERF2 : Error Flag 2: Forbidden Write Request
|
||||
* - SMI_FLAG_ERF1 : Error Flag 1: Forbidden Access
|
||||
* - SMI_FLAG_WC : Write Complete flag
|
||||
* - SMI_FLAG_TF : Transfer Finished flag
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_ClearFlag(u32 SMI_FLAG)
|
||||
{
|
||||
SMI->SR &= ~SMI_FLAG;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_GetITStatus
|
||||
* Description : Checks whether the specified SMI interrupt has occurred or not.
|
||||
* Input : - SMI_FLAG: specifies the interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* - SMI_IT_WC : Write Complete Interrupt
|
||||
* - SMI_IT_TF : Transfer Finished Interrupt
|
||||
* Output : None
|
||||
* Return : The new state of SMI_IT (SET or RESET).
|
||||
*******************************************************************************/
|
||||
ITStatus SMI_GetITStatus(u32 SMI_IT)
|
||||
{
|
||||
if(((SMI->CR2 & SMI_IT) != RESET) && ((SMI->SR & SMI_IT) != RESET))
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SMI_ClearITPendingBit
|
||||
* Description : Clears the SMI’s interrupt pending bits.
|
||||
* Input : - SMI_FLAG: specifies the interrupts sources to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* - SMI_IT_WC : Write Complete Interrupt
|
||||
* - SMI_IT_TF : Transfer Finished Interrupt
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SMI_ClearITPendingBit(u32 SMI_IT)
|
||||
{
|
||||
SMI->SR &= ~SMI_IT;
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
588
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_ssp.c
Normal file
588
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_ssp.c
Normal file
|
@ -0,0 +1,588 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_ssp.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the SSP software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_ssp.h"
|
||||
#include "75x_mrcc.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
/* SSP peripheral Enable */
|
||||
#define SSP_Enable 0x0002
|
||||
#define SSP_Disable 0xFFFD
|
||||
|
||||
/* SSP Loop Back Mode Enable */
|
||||
#define SSP_LoopBackMode_Enable 0x0001
|
||||
#define SSP_LoopBackMode_Disable 0xFFFE
|
||||
|
||||
/* SSP Flag Mask */
|
||||
#define SSP_Flag_Mask 0x001F
|
||||
|
||||
/* SSP DMA transmit/ receive enable/disable Masks */
|
||||
#define SSP0_DMA_TransmitEnable 0x0002
|
||||
#define SSP0_DMA_TransmitDisable 0xFFFD
|
||||
#define SSP0_DMA_ReceiveEnable 0x0001
|
||||
#define SSP0_DMA_ReceiveDisable 0xFFFE
|
||||
|
||||
/* SSP Masks */
|
||||
#define SSP_FrameFormat_Mask 0xFFCF
|
||||
#define SSP_DataSize_Mask 0xFFF0
|
||||
#define SSP_ClockRate_Mask 0x00FF
|
||||
#define SSP_ClockPrescaler_Mask 0xFF00
|
||||
#define SSP_SSI_Set_Mask 0x0020
|
||||
#define SSP_SSI_Reset_Mask 0xFFDF
|
||||
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_DeInit
|
||||
* Description : Deinitializes the SSPx peripheral registers to their default
|
||||
* reset values.
|
||||
* Input : SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_DeInit(SSP_TypeDef* SSPx)
|
||||
{
|
||||
if(SSPx == SSP0)
|
||||
{
|
||||
/* Reset the SSP0 registers values*/
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_SSP0,ENABLE);
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_SSP0,DISABLE);
|
||||
}
|
||||
else if (SSPx == SSP1)
|
||||
{
|
||||
/* Reset the SSP1 registers values*/
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_SSP1,ENABLE);
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_SSP1,DISABLE);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_Init
|
||||
* Description : Initializes the SSPx peripheral according to the specified
|
||||
* parameters in the SSP_InitTypeDef structure.
|
||||
* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* - SSP_InitStruct: pointer to a SSP_InitTypeDef structure that
|
||||
* contains the configuration information for the specified SSP
|
||||
* peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_Init(SSP_TypeDef* SSPx, SSP_InitTypeDef* SSP_InitStruct)
|
||||
{
|
||||
/* Configure the Frame format */
|
||||
if(SSP_InitStruct->SSP_FrameFormat == SSP_FrameFormat_TI)
|
||||
{
|
||||
/* Clear the FRF[1:0] bits */
|
||||
SSPx->CR0 &= SSP_FrameFormat_Mask;
|
||||
/* Set the TI frame format */
|
||||
SSPx->CR0 |= SSP_FrameFormat_TI;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the Motorola frame format */
|
||||
SSPx->CR0 &= SSP_FrameFormat_Motorola;
|
||||
/* Configure the Clock polarity */
|
||||
if(SSP_InitStruct->SSP_CPOL == SSP_CPOL_High)
|
||||
{
|
||||
/* SCK is held high when no data is being transfered */
|
||||
SSPx->CR0 |= SSP_CPOL_High;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SCK is held low when no data is being transfered */
|
||||
SSPx->CR0 &= SSP_CPOL_Low;
|
||||
}
|
||||
/* Configure the Clock Phase */
|
||||
if(SSP_InitStruct->SSP_CPHA == SSP_CPHA_2Edge)
|
||||
{
|
||||
/* Data captured on second clock edge */
|
||||
SSPx->CR0 |= SSP_CPHA_2Edge;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Data captured on first clock edge */
|
||||
SSPx->CR0 &= SSP_CPHA_1Edge;
|
||||
}
|
||||
}
|
||||
|
||||
/* Configure the Mode */
|
||||
if(SSP_InitStruct->SSP_Mode == SSP_Mode_Slave)
|
||||
{
|
||||
/* Set the slave mode */
|
||||
SSPx->CR1 |= SSP_Mode_Slave;
|
||||
/* Configure the Slave output */
|
||||
if(SSP_InitStruct->SSP_SlaveOutput == SSP_SlaveOutput_Disable)
|
||||
{
|
||||
/* Slave output disabled */
|
||||
SSPx->CR1 |= SSP_SlaveOutput_Disable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Slave output enabled */
|
||||
SSPx->CR1 &= SSP_SlaveOutput_Enable;
|
||||
}
|
||||
/* Configure the NSS pin */
|
||||
if(SSP_InitStruct->SSP_NSS == SSP_NSS_Soft)
|
||||
{
|
||||
/* Slave selected by software through SSI bit */
|
||||
SSPx->CR1 |= SSP_NSS_Soft;
|
||||
SSPx->CR1 &= SSP_SSI_Reset_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Slave selected by hardware through external SSpin */
|
||||
SSPx->CR1 &= SSP_NSS_Hard;
|
||||
}
|
||||
/* Configure the Clock rate and prescaler in TI slave mode */
|
||||
if(SSP_InitStruct->SSP_FrameFormat == SSP_FrameFormat_TI)
|
||||
{
|
||||
/* Clear clock rate SCR[7:0] bits */
|
||||
SSPx->CR0 &= SSP_ClockRate_Mask;
|
||||
/* Set the serial clock rate */
|
||||
SSPx->CR0 |= (SSP_InitStruct->SSP_ClockRate<<8);
|
||||
/* Clear clock prescaler CPSDVSR[7:0] bits */
|
||||
SSPx->PR &= SSP_ClockPrescaler_Mask;
|
||||
/* Set the serial clock prescaler */
|
||||
SSPx->PR |= SSP_InitStruct->SSP_ClockPrescaler;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the master mode */
|
||||
SSPx->CR1 &= SSP_Mode_Master;
|
||||
/* Configure the NSS pin */
|
||||
if(SSP_InitStruct->SSP_NSS == SSP_NSS_Soft)
|
||||
{
|
||||
/* Master selected by software through SSI bit */
|
||||
SSPx->CR1 |= SSP_NSS_Soft;
|
||||
SSPx->CR1 |= SSP_SSI_Set_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Master selected by hardware through external SSpin */
|
||||
SSPx->CR1 &= SSP_NSS_Hard;
|
||||
}
|
||||
/* Clear clock rate SCR[7:0] bits */
|
||||
SSPx->CR0 &= SSP_ClockRate_Mask;
|
||||
/* Set the serial clock rate */
|
||||
SSPx->CR0 |= (SSP_InitStruct->SSP_ClockRate<<8);
|
||||
/* Clear clock prescaler CPSDVSR[7:0] bits */
|
||||
SSPx->PR &= SSP_ClockPrescaler_Mask;
|
||||
/* Set the serial clock prescaler */
|
||||
SSPx->PR |= SSP_InitStruct->SSP_ClockPrescaler;
|
||||
}
|
||||
|
||||
/* Clear data size DSS[3:0] bits */
|
||||
SSPx->CR0 &= SSP_DataSize_Mask;
|
||||
/* Set the data size */
|
||||
SSPx->CR0 |= SSP_InitStruct->SSP_DataSize;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_StructInit
|
||||
* Description : Fills each SSP_InitStruct member with its default value.
|
||||
* Input : SSP_InitStruct : pointer to a SSP_InitTypeDef structure
|
||||
which will be initialized.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_StructInit(SSP_InitTypeDef* SSP_InitStruct)
|
||||
{
|
||||
/* Initialize the SSP_FrameFormat member */
|
||||
SSP_InitStruct->SSP_FrameFormat = SSP_FrameFormat_Motorola;
|
||||
|
||||
/* Initialize the SSP_Mode member */
|
||||
SSP_InitStruct->SSP_Mode = SSP_Mode_Master;
|
||||
|
||||
/* Initialize the SSP_CPOL member */
|
||||
SSP_InitStruct->SSP_CPOL = SSP_CPOL_Low;
|
||||
|
||||
/* Initialize the SSP_CPHA member */
|
||||
SSP_InitStruct->SSP_CPHA = SSP_CPHA_1Edge;
|
||||
|
||||
/* Initialize the SSP_DataSize member */
|
||||
SSP_InitStruct->SSP_DataSize = SSP_DataSize_8b;
|
||||
|
||||
/* Initialize the SSP_NSS member */
|
||||
SSP_InitStruct->SSP_NSS = SSP_NSS_Hard;
|
||||
|
||||
/* Initialize the SSP_SlaveOutput member */
|
||||
SSP_InitStruct->SSP_SlaveOutput = SSP_SlaveOutput_Enable;
|
||||
|
||||
/* Initialize the SSP_ClockRate member */
|
||||
SSP_InitStruct->SSP_ClockRate = 0;
|
||||
|
||||
/* Initialize the SSP_ClockPrescaler member */
|
||||
SSP_InitStruct->SSP_ClockPrescaler = 0;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_Cmd
|
||||
* Description : Enables or disables the specified SSP peripheral.
|
||||
* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* - NewState: new state of the SSPx peripheral.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_Cmd(SSP_TypeDef* SSPx, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Enable the SSP peripheral */
|
||||
SSPx->CR1 |= SSP_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the SSP peripheral */
|
||||
SSPx->CR1 &= SSP_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_ITConfig
|
||||
* Description : Enables or disables the specified SSP interrupts.
|
||||
* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* - SSP_IT: specifies the SSP interrupts sources to be enabled
|
||||
* or disabled. This parameter can be any combination of the
|
||||
* following values:
|
||||
* - SSP_IT_TxFifo: Transmit FIFO half empty or less interrupt
|
||||
* - SSP_IT_RxFifo: Receive FIFO half full or less interrupt
|
||||
* - SSP_IT_RxTimeOut: Receive timeout interrupt
|
||||
* - SSP_IT_RxOverrun: Receive overrun interrupt
|
||||
* - NewState: new state of the specified SSP interrupts.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_ITConfig(SSP_TypeDef* SSPx, u16 SSP_IT, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Enable the selected SSP interrupts */
|
||||
SSPx->IMSCR |= SSP_IT;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SSP interrupts */
|
||||
SSPx->IMSCR &= ~SSP_IT;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_DMACmd
|
||||
* Description : Configures the SSP0 DMA interface.
|
||||
* Input : - SSP0_DMAtransfer : specifies the DMA transfer to be
|
||||
* enabled or disabled. This parameter can be one of the
|
||||
* following values:
|
||||
* - SSP0_DMA_Transmit: transmit Fifo DMA transfer
|
||||
* - SSP0_DMA_Receive: receive Fifo DMA transfer
|
||||
* - NewState: new state of SSP0 DMA transfer.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_DMACmd(u16 SSP0_DMAtransfer, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
if(SSP0_DMAtransfer == SSP0_DMA_Transmit)
|
||||
{
|
||||
/* Enable DMA for the transmit FIFO */
|
||||
SSP0->DMACR |= SSP0_DMA_TransmitEnable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Enable DMA for the receive FIFO */
|
||||
SSP0->DMACR |= SSP0_DMA_ReceiveEnable;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(SSP0_DMAtransfer == SSP0_DMA_Transmit)
|
||||
{
|
||||
/* Disable DMA for the transmit FIFO */
|
||||
SSP0->DMACR &= SSP0_DMA_TransmitDisable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable DMA for the receive FIFO */
|
||||
SSP0->DMACR &= SSP0_DMA_ReceiveDisable;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_DMATxConfig
|
||||
* Description : Configures the SSP0 DMA transmit transfer.
|
||||
* Input : - SSP0_DMATxReq : specifies the SSP0 DMA transmit request to
|
||||
* be enabled. This parameter can be one of the following
|
||||
* values:
|
||||
* - SSP0_DMATxReq_Single: Transmit FIFO DMA single
|
||||
* request enabled
|
||||
* - SSP0_DMATxReq_Burst: Transmit FIFO DMA burst request
|
||||
* enabled
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_DMATxConfig(u16 SSP0_DMATxReq)
|
||||
{
|
||||
if(SSP0_DMATxReq == SSP0_DMATxReq_Burst)
|
||||
{
|
||||
/* Enable DMA transmit burst request */
|
||||
SSP0->DMACR |= SSP0_DMATxReq_Burst;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Enable DMA transmit single request */
|
||||
SSP0->DMACR &= SSP0_DMATxReq_Single;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_DMARxConfig
|
||||
* Description : Configures the SSP0 DMA receive transfer.
|
||||
* Input : - SSP0_DMARxReq : specifies the SSP0 DMA receive request to
|
||||
* be enabled. This parameter can be one of the following
|
||||
* values:
|
||||
* - SSP0_DMARxReq_Single: Receive FIFO DMA burst request
|
||||
* enabled
|
||||
* - SSP0_DMARxReq_Burst: Receive FIFO DMA single request
|
||||
* enabled
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_DMARxConfig(u16 SSP0_DMARxReq)
|
||||
{
|
||||
if(SSP0_DMARxReq == SSP0_DMARxReq_Burst)
|
||||
{
|
||||
/* Enable DMA receive burst request */
|
||||
SSP0->DMACR |= SSP0_DMARxReq_Burst;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Enable DMA receive single request */
|
||||
SSP0->DMACR &= SSP0_DMARxReq_Single;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_SendData
|
||||
* Description : Transmits a Data through the SSP peripheral.
|
||||
* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* - Data : Data to be transmitted.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_SendData(SSP_TypeDef* SSPx, u16 Data)
|
||||
{
|
||||
/* Write in the DR register the data to be sent */
|
||||
SSPx->DR = Data;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_ReceiveData
|
||||
* Description : Returns the most recent received data by the SSP peripheral.
|
||||
* Input : SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* Output : None
|
||||
* Return : The value of the received data.
|
||||
*******************************************************************************/
|
||||
u16 SSP_ReceiveData(SSP_TypeDef* SSPx)
|
||||
{
|
||||
/* Return the data in the DR register */
|
||||
return SSPx->DR;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_LoopBackConfig
|
||||
* Description : Enables or disables the Loop back mode for the selected SSP
|
||||
* peripheral.
|
||||
* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* - NewState: new state of the Loop Back mode.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_LoopBackConfig(SSP_TypeDef* SSPx, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Enable loop back mode */
|
||||
SSPx->CR1 |= SSP_LoopBackMode_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable loop back mode */
|
||||
SSPx->CR1 &= SSP_LoopBackMode_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_NSSInternalConfig
|
||||
* Description : Configures by software the NSS pin.
|
||||
* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* - SSP_NSSState: NSS internal state.This parameter can be one
|
||||
* of the following values:
|
||||
* - SSP_NSSInternal_Set: Set NSS pin internally
|
||||
* - SSP_NSSInternal_Reset: Reset NSS pin internally
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_NSSInternalConfig(SSP_TypeDef* SSPx, u16 SSP_NSSState)
|
||||
{
|
||||
if(SSP_NSSState == SSP_NSSInternal_Set)
|
||||
{
|
||||
/* Set NSS pin internally */
|
||||
SSPx->CR1 |= SSP_NSSInternal_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset NSS pin internally */
|
||||
SSPx->CR1 &= SSP_NSSInternal_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_GetFlagStatus
|
||||
* Description : Checks whether the specified SSP flag is set or not.
|
||||
* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* - SSP_FLAG: specifies the flag to check. This parameter can
|
||||
* be one of the following values:
|
||||
* - SSP_FLAG_Busy: busy flag
|
||||
* - SSP_FLAG_RxFifoFull: Receive FIFO full flag
|
||||
* - SSP_FLAG_RxFifoNotEmpty: Receive FIFO not empty flag
|
||||
* - SSP_FLAG_TxFifoNotFull: Transmit FIFO not full flag
|
||||
* - SSP_FLAG_TxFifoEmpty: Transmit FIFO empty flag
|
||||
* - SSP_FLAG_TxFifo: Transmit FIFO half empty or less flag
|
||||
* - SSP_FLAG_RxFifo: Receive FIFO half full or less flag
|
||||
* - SSP_FLAG_RxTimeOut: Receive timeout flag
|
||||
* - SSP_FLAG_RxOverrun: Receive overrun flag
|
||||
* Output : None
|
||||
* Return : The new state of SSP_FLAG(SET or RESET).
|
||||
*******************************************************************************/
|
||||
FlagStatus SSP_GetFlagStatus(SSP_TypeDef* SSPx, u16 SSP_FLAG)
|
||||
{
|
||||
u32 SSPReg = 0, FlagPos = 0;
|
||||
u32 StatusReg = 0;
|
||||
|
||||
/* Get the SSP register index */
|
||||
SSPReg = SSP_FLAG >> 5;
|
||||
|
||||
/* Get the flag position */
|
||||
FlagPos = SSP_FLAG & SSP_Flag_Mask;
|
||||
|
||||
/* Find the register of the flag to check */
|
||||
if(SSPReg == 1)
|
||||
{
|
||||
/* The flag to check is in SR register */
|
||||
StatusReg = SSPx->SR;
|
||||
}
|
||||
else if (SSPReg == 2)
|
||||
{
|
||||
/* The flag to check is in RISR register */
|
||||
StatusReg = SSPx->RISR;
|
||||
}
|
||||
|
||||
/* Check the status of the specified SSP flag */
|
||||
if((StatusReg & (1 << FlagPos)) != RESET)
|
||||
{
|
||||
/* Return SET if the SSP flag is set */
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Return RESET if the SSP flag is reset */
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_ClearFlag
|
||||
* Description : Clears the SSPx’s pending flags.
|
||||
* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* - SSP_FLAG: specifies the flag to clear. This parameter can
|
||||
* be one of the following values:
|
||||
* - SSP_FLAG_RxTimeOut: Receive timeout flag
|
||||
* - SSP_FLAG_RxOverrun: Receive overrun flag
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_ClearFlag(SSP_TypeDef* SSPx, u16 SSP_FLAG)
|
||||
{
|
||||
u8 FlagPos = 0;
|
||||
|
||||
/* Get the flag position */
|
||||
FlagPos = SSP_FLAG & SSP_Flag_Mask;
|
||||
|
||||
/* Clear the selected SSP flag */
|
||||
SSPx->ICR = (1 << FlagPos);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_GetITStatus
|
||||
* Description : Checks whether the specified SSP interrupt has occurred or not.
|
||||
* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* - SSP_IT: specifies the interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* - SSP_IT_TxFifo: Transmit FIFO half empty or less interrupt
|
||||
* - SSP_IT_RxFifo: Receive FIFO half full or less interrupt
|
||||
* - SSP_IT_RxTimeOut: Receive timeout interrupt
|
||||
* - SSP_IT_RxOverrun: Receive overrun interrupt
|
||||
* Output : None
|
||||
* Return : The new state of SSP_IT(SET or RESET).
|
||||
*******************************************************************************/
|
||||
ITStatus SSP_GetITStatus(SSP_TypeDef* SSPx, u16 SSP_IT)
|
||||
{
|
||||
/* Check the status of the specified interrupt flag */
|
||||
if((SSPx->MISR & SSP_IT) != RESET)
|
||||
{
|
||||
/* Return SET if the SSP interrupt flag is set */
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Return RESET if SSP interrupt flag is reset */
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SSP_ClearITPendingBit
|
||||
* Description : Clears the SSPx’s interrupt pending bits.
|
||||
* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
|
||||
* - SSP_IT: specifies the interrupt pending bit to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* - SSP_IT_RxTimeOut: Receive timeout interrupt
|
||||
* - SSP_IT_RxOverrun: Receive overrun interrupt
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SSP_ClearITPendingBit(SSP_TypeDef* SSPx, u16 SSP_IT)
|
||||
{
|
||||
/* Clear the selected SSP interrupts pending bits */
|
||||
SSPx->ICR = SSP_IT;
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
425
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_tb.c
Normal file
425
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_tb.c
Normal file
|
@ -0,0 +1,425 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_tb.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the TB software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_tb.h"
|
||||
#include "75x_mrcc.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
#define TB_IT_Enable_Mask 0x7FFF
|
||||
#define TB_IT_Clear_Mask 0x7FFF
|
||||
#define TB_IC_Enable 0x0004
|
||||
#define TB_ICPolarity_Set 0x0008
|
||||
#define TB_ICPolarity_Reset 0xFFF7
|
||||
#define TB_UFS_Reset 0xFFFE
|
||||
#define TB_UFS_Set 0x0001
|
||||
|
||||
/* TB debug state */
|
||||
#define TB_DBGC_Set 0x0400
|
||||
#define TB_DBGC_Reset 0xFB7F
|
||||
|
||||
/* TB counter state */
|
||||
#define TB_COUNTER_Reset 0x0002
|
||||
#define TB_COUNTER_Start 0x0004
|
||||
#define TB_COUNTER_Stop 0xFFFB
|
||||
|
||||
#define TB_SMS_EXTCLK_Set 0x0008
|
||||
#define TB_SMS_RESETCLK_Set 0x0000
|
||||
|
||||
/* TB Slave Mode Enable Set/Reset value */
|
||||
#define TB_SME_Reset 0x731B
|
||||
#define TB_SME_Set 0x0004
|
||||
|
||||
/* TB Trigger Selection value */
|
||||
#define TB_TS_IC1_Set 0x0200
|
||||
|
||||
/* TB SCR Masks bit */
|
||||
#define TB_SlaveModeSelection_Mask 0x7307
|
||||
#define TB_TriggerSelection_Mask 0x701F
|
||||
|
||||
/* Reset Register Masks */
|
||||
#define TB_Prescaler_Reset_Mask 0x0000
|
||||
#define TB_CounterMode_Mask 0xFF8F
|
||||
#define TB_AutoReload_Reset_Mask 0xFFFF
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/******************************************************************************
|
||||
* Function Name : TB_DeInit
|
||||
* Description : Deinitializes the TB peripheral registers to their default
|
||||
* reset values.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_DeInit(void)
|
||||
{
|
||||
/* Enters and exits the TB peripheral to and from reset */
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_TB,ENABLE);
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_TB,DISABLE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_Init
|
||||
* Description : Initializes TB peripheral according to the specified
|
||||
* parameters in the TB_InitStruct.
|
||||
* Input : TB_InitStruct: pointer to a TB_InitTypeDef structure that
|
||||
* contains the configuration information for the TB peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_Init(TB_InitTypeDef* TB_InitStruct)
|
||||
{
|
||||
/* Set the TB prescaler value */
|
||||
TB->PSC = TB_InitStruct->TB_Prescaler;
|
||||
|
||||
/* Set the TB period value */
|
||||
TB->ARR = TB_InitStruct->TB_AutoReload;
|
||||
|
||||
/* Set the corresponding counter mode */
|
||||
TB->CR = (TB->CR & TB_CounterMode_Mask) | TB_InitStruct->TB_CounterMode;
|
||||
|
||||
/* Set the corresponding clock source */
|
||||
if(TB_InitStruct->TB_ClockSource == TB_ClockSource_CKRTC)
|
||||
{
|
||||
TB->SCR &= TB_SME_Reset & TB_SlaveModeSelection_Mask & TB_TriggerSelection_Mask;
|
||||
TB->SCR |= TB_SMS_EXTCLK_Set | TB_SME_Set | TB_TS_IC1_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
TB->SCR &= TB_SME_Reset & TB_SlaveModeSelection_Mask & TB_TriggerSelection_Mask;
|
||||
}
|
||||
|
||||
if(TB_InitStruct->TB_Mode == TB_Mode_IC)
|
||||
{
|
||||
/* Set the corresponding value in TB SCR register */
|
||||
TB->SCR &= TB_SME_Reset & TB_SlaveModeSelection_Mask & TB_TriggerSelection_Mask;
|
||||
TB->SCR |= TB_SMS_RESETCLK_Set | TB_SME_Set | TB_TS_IC1_Set;
|
||||
|
||||
/* Set the IC1 enable bit */
|
||||
TB->IMCR |= TB_IC_Enable;
|
||||
|
||||
/* Set the input signal polarity */
|
||||
if (TB_InitStruct->TB_ICAPolarity == TB_ICAPolarity_Falling)
|
||||
{
|
||||
TB->IMCR |= TB_ICPolarity_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
TB->IMCR &= TB_ICPolarity_Reset;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_StructInit
|
||||
* Description : Fills each TB_InitStruct member with its default value
|
||||
* Input : TB_InitStruct : pointer to a TB_InitTypeDef structure which
|
||||
* will be initialized.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_StructInit(TB_InitTypeDef *TB_InitStruct)
|
||||
{
|
||||
TB_InitStruct->TB_Mode = TB_Mode_Timing;
|
||||
TB_InitStruct->TB_ClockSource = TB_ClockSource_CKTIM;
|
||||
TB_InitStruct->TB_CounterMode = TB_CounterMode_Up;
|
||||
TB_InitStruct->TB_ICAPolarity = TB_ICAPolarity_Rising;
|
||||
TB_InitStruct->TB_Prescaler = TB_Prescaler_Reset_Mask;
|
||||
TB_InitStruct->TB_AutoReload = TB_AutoReload_Reset_Mask;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_Cmd
|
||||
* Description : Enables or disables the TB peripheral.
|
||||
* Input : Newstate: new state of the TB peripheral. This parameter can
|
||||
* be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_Cmd(FunctionalState Newstate)
|
||||
{
|
||||
if(Newstate == ENABLE)
|
||||
{
|
||||
TB->CR |= TB_COUNTER_Start;
|
||||
}
|
||||
else
|
||||
{
|
||||
TB->CR &= TB_COUNTER_Stop;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_ITConfig
|
||||
* Description : Enables or disables the specified TB interrupt.
|
||||
* Input : - TB_IT: specifies the TB interrupt sources to be enabled or
|
||||
* disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* - TB_IT_Update: TB Update interrupt
|
||||
* - TB_IT_GlobalUpdate: TB Global Update interrupt
|
||||
* - TB_IT_IC: TB Input Capture interrupt
|
||||
* - Newstate: new state of the specified TB interrupts.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_ITConfig(u16 TB_IT, FunctionalState Newstate)
|
||||
{
|
||||
u16 TB_IT_Enable = 0;
|
||||
|
||||
TB_IT_Enable = TB_IT & TB_IT_Enable_Mask;
|
||||
|
||||
if(Newstate == ENABLE)
|
||||
{
|
||||
/* Update interrupt global source: overflow/undeflow, counter reset operation
|
||||
or slave mode controller in reset mode */
|
||||
if ((TB_IT & TB_IT_GlobalUpdate) == TB_IT_GlobalUpdate)
|
||||
{
|
||||
TB->CR &= TB_UFS_Reset;
|
||||
}
|
||||
/* Update interrupt source: counter overflow/underflow */
|
||||
else if ((TB_IT & TB_IT_Update) == TB_IT_Update)
|
||||
{
|
||||
TB->CR |= TB_UFS_Set;
|
||||
}
|
||||
/* Select and enable the interrupts requests */
|
||||
TB->RSR |= TB_IT_Enable;
|
||||
TB->RER |= TB_IT_Enable;
|
||||
}
|
||||
/* Disable the interrupts requests */
|
||||
else
|
||||
{
|
||||
TB->RSR &= ~TB_IT_Enable;
|
||||
TB->RER &= ~TB_IT_Enable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_SetPrescaler
|
||||
* Description : Sets the TB Prescaler value.
|
||||
* Input : Prescaler: specifies the TB Prescaler value.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_SetPrescaler(u16 Prescaler)
|
||||
{
|
||||
/* Sets the prescaler value */
|
||||
TB->PSC = Prescaler;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_ResetCounter
|
||||
* Description : Re-intializes the counter and generates an update of the
|
||||
* registers.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_ResetCounter(void)
|
||||
{
|
||||
/* Re-intializes TB counter */
|
||||
TB->CR |= TB_COUNTER_Reset;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_DebugCmd
|
||||
* Description : Enables or disables TB peripheral Debug control.
|
||||
* Input : Newstate: new state of the TB Debug control.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_DebugCmd(FunctionalState Newstate)
|
||||
{
|
||||
if(Newstate == ENABLE)
|
||||
{
|
||||
TB->CR |= TB_DBGC_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
TB->CR &= TB_DBGC_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_CounterModeConfig
|
||||
* Description : Configures the TB Counter Mode.
|
||||
* Input : TB_CounterMode: specifies the TB counter mode to be used.
|
||||
* This parameter can be one of the following values:
|
||||
* - TB_CounterMode_Up: TB Up Counting Mode
|
||||
* - TB_CounterMode_Down: TB Down Counting Mode
|
||||
* - TB_CounterMode_CenterAligned: TB Center Aligned Mode
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_CounterModeConfig(u16 TB_CounterMode)
|
||||
{
|
||||
/* Counter mode configuration */
|
||||
TB->CR &= TB_CounterMode_Mask;
|
||||
TB->CR |= TB_CounterMode;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_SLaveModeConfig
|
||||
* Description : Configures the TB slave Mode.
|
||||
* Input : TB_SMSMode: specifies the TB slave mode to be used.
|
||||
* This parameter can be one of the following values:
|
||||
* - TB_SMSMode_Trigger: The counter starts at a rising
|
||||
* edge of the trigger
|
||||
* - TB_SMSMode_Gated: The counter clock is enabled when
|
||||
* trigger signal is high
|
||||
* - TB_SMSMode_External: The rising edge of selected trigger
|
||||
* clocks the counter
|
||||
* - TB_SMSMode_Reset: The rising edge of the selected
|
||||
* trigger signal resets the counter
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_SLaveModeConfig(u16 TB_SMSMode)
|
||||
{
|
||||
TB->SCR &= TB_SME_Reset & TB_SlaveModeSelection_Mask & TB_TriggerSelection_Mask;
|
||||
TB->SCR |= TB_SME_Set | TB_SMSMode | TB_TS_IC1_Set;
|
||||
}
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_GetCounter
|
||||
* Description : Gets the TB Counter value.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The TB counter register value.
|
||||
*******************************************************************************/
|
||||
u16 TB_GetCounter(void)
|
||||
{
|
||||
return TB->CNT;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_GetICAP1
|
||||
* Description : Gets the TB Input capture value.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The TB ICR1 register value.
|
||||
*******************************************************************************/
|
||||
u16 TB_GetICAP1(void)
|
||||
{
|
||||
return TB->ICR1;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_SetCounter
|
||||
* Description : Sets the TB Counter value.
|
||||
* Input : Counter: specifies the TB Counter value.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_SetCounter(u16 Counter)
|
||||
{
|
||||
TB->CNT = Counter;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_GetFlagStatus
|
||||
* Description : Checks whether the specified TB flag is set or not.
|
||||
* Input : TB_FLAG: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* - TB_FLAG_IC: TB Input Capture flag
|
||||
* - TB_FLAG_Update: TB update flag
|
||||
* Output : None
|
||||
* Return : The new state of the TB_FLAG (SET or RESET).
|
||||
*******************************************************************************/
|
||||
FlagStatus TB_GetFlagStatus(u16 TB_FLAG)
|
||||
{
|
||||
if((TB->ISR & TB_FLAG) != RESET )
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_ClearFlag
|
||||
* Description : Clears the TB’s pending flags.
|
||||
* Input : TB_FLAG: specifies the flag to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* - TB_FLAG_IC: TB Input Capture flag
|
||||
* - TB_FLAG_Update: TB update flag
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_ClearFlag(u16 TB_FLAG)
|
||||
{
|
||||
/* Clears the flags */
|
||||
TB->ISR &= ~TB_FLAG;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_GetITStatus
|
||||
* Description : Checks whether the specified TB interrupt has occurred or not.
|
||||
* Input : TB_IT: specifies the interrupt to check.
|
||||
* This parameter can be one of the following values:
|
||||
* - TB_IT_Update: TB Update interrupt
|
||||
* - TB_IT_GlobalUpdate: TB Global Update interrupt
|
||||
* - TB_IT_IC: TB Input Capture interrupt
|
||||
* Output : None
|
||||
* Return : The new state of the TB_IT (SET or RESET).
|
||||
*******************************************************************************/
|
||||
ITStatus TB_GetITStatus(u16 TB_IT)
|
||||
{
|
||||
u16 TB_IT_Check = 0;
|
||||
|
||||
/* Calculates the pending bits to be checked */
|
||||
TB_IT_Check = TB_IT & TB_IT_Clear_Mask;
|
||||
|
||||
if((TB->ISR & TB_IT_Check) != RESET )
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : TB_ClearITPendingBit
|
||||
* Description : Clears the TB's interrupt pending bits.
|
||||
* Input : TB_IT: specifies the interrupt pending bit to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* - TB_IT_Update: TB Update interrupt
|
||||
* - TB_IT_GlobalUpdate: TB Global Update interrupt
|
||||
* - TB_IT_IC: TB Input Capture interrupt
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void TB_ClearITPendingBit(u16 TB_IT)
|
||||
{
|
||||
u16 TB_IT_Clear = 0;
|
||||
|
||||
/* Calculates the pending bits to be cleared */
|
||||
TB_IT_Clear = TB_IT & TB_IT_Clear_Mask;
|
||||
|
||||
/* Clears the pending bits */
|
||||
TB->ISR &= ~TB_IT_Clear;
|
||||
}
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
1360
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_tim.c
Normal file
1360
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_tim.c
Normal file
File diff suppressed because it is too large
Load diff
599
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_uart.c
Normal file
599
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_uart.c
Normal file
|
@ -0,0 +1,599 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_uart.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the UART software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_uart.h"
|
||||
#include "75x_mrcc.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* UART LIN Mask */
|
||||
#define UART_LIN_Disable_Mask 0xFEFF /* LIN Disable Mask */
|
||||
#define UART_LIN_Enable_Mask 0x0100 /* LIN Enable Mask */
|
||||
|
||||
/* UART Mask */
|
||||
#define UART_Enable_Mask 0x0001 /* UART Enable Mask */
|
||||
#define UART_Disable_Mask 0xFFFE /* UART Disable Mask */
|
||||
|
||||
/* UART LoopBack */
|
||||
#define UART_LoopBack_Disable_Mask 0xFF7F/* LoopBack Disable Mask */
|
||||
#define UART_LoopBack_Enable_Mask 0x0080/* LoopBack Enable Mask */
|
||||
|
||||
#define UART_WordLength_Mask 0xFF9F /* UART Word Length Mask */
|
||||
#define UART_Parity_Mask 0xFF79 /* UART Parity Mask */
|
||||
#define UART_HardwareFlowControl_Mask 0x3FFF /* UART Hardware Flow Control Mask */
|
||||
#define UART_TxRxFIFOLevel_Mask 0xFFC0 /* UART Tx Rx FIFO Level Mask */
|
||||
#define UART_LINBreakLength_Mask 0xE1FF /* UART LIN Break Length Mask */
|
||||
#define UART_BreakChar_Mask 0x0001 /* UART Break Character send Mask */
|
||||
#define UART_FLAG_Mask 0x1F /* UART Flag Mask */
|
||||
#define UART_Mode_Mask 0xFCFF /* UART Mode Mask */
|
||||
#define UART_RTSSET_Mask 0xF7FF /* RTS signal is high */
|
||||
#define UART_RTSRESET_Mask 0x0800 /* RTS signal is low */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_DeInit
|
||||
* Description : Deinitializes the UARTx peripheral registers to their default
|
||||
* reset values.
|
||||
* Input : UARTx: where x can be 0,1 or 2 to select the UART peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_DeInit(UART_TypeDef* UARTx)
|
||||
{
|
||||
/* Reset the UARTx registers values */
|
||||
if(UARTx == UART0)
|
||||
{
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_UART0,ENABLE);
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_UART0,DISABLE);
|
||||
}
|
||||
else if(UARTx == UART1)
|
||||
{
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_UART1,ENABLE);
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_UART1,DISABLE);
|
||||
}
|
||||
else if(UARTx == UART2)
|
||||
{
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_UART2,ENABLE);
|
||||
MRCC_PeripheralSWResetConfig(MRCC_Peripheral_UART2,DISABLE);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_Init
|
||||
* Description : Initializes the UARTx peripheral according to the specified
|
||||
* parameters in the UART_InitStruct .
|
||||
* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
|
||||
* - UART_InitStruct: pointer to a UART_InitTypeDef structure
|
||||
* that contains the configuration information for the
|
||||
* specified UART peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct)
|
||||
{
|
||||
|
||||
u32 APBClock = 0;
|
||||
u32 IntegerDivider = 0;
|
||||
u32 FractionalDivider = 0;
|
||||
MRCC_ClocksTypeDef MRCC_ClocksStatus;
|
||||
|
||||
/* Clear the WLEN bits */
|
||||
UARTx->LCR &= UART_WordLength_Mask;
|
||||
/* Set the WLEN bits according to UART_WordLength value */
|
||||
UARTx->LCR |= UART_InitStruct->UART_WordLength;
|
||||
|
||||
/* Choose Stop Bits */
|
||||
if(UART_InitStruct->UART_StopBits == UART_StopBits_1)
|
||||
{
|
||||
/* One Stop Bit */
|
||||
UARTx->LCR &= UART_StopBits_1;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Two Stop Bits */
|
||||
UARTx->LCR |= UART_StopBits_2;
|
||||
}
|
||||
|
||||
/* Clear SPS, EPS and PEN bits */
|
||||
UARTx->LCR &= UART_Parity_Mask;
|
||||
/* Set PS, EPS and PEN bits according to UART_Parity value */
|
||||
UARTx->LCR |= UART_InitStruct->UART_Parity;
|
||||
|
||||
/* Configure the BaudRate --------------------------------------------------*/
|
||||
/* Get the APB frequency */
|
||||
MRCC_GetClocksStatus(&MRCC_ClocksStatus);
|
||||
APBClock = MRCC_ClocksStatus.PCLK_Frequency;
|
||||
|
||||
/* Determine the integer part */
|
||||
IntegerDivider = ((100) * (APBClock) / (16 * (UART_InitStruct->UART_BaudRate)));
|
||||
UARTx->IBRD = IntegerDivider / 100;
|
||||
|
||||
/* Determine the fractional part */
|
||||
FractionalDivider = IntegerDivider - (100 * (UARTx->IBRD));
|
||||
UARTx->FBRD = ((((FractionalDivider * 64) + 50) / 100));
|
||||
|
||||
/* Choose the Hardware Flow Control */
|
||||
/* Clear RTSEn and CTSEn bits */
|
||||
UARTx->CR &= UART_HardwareFlowControl_Mask;
|
||||
/* Set RTSEn and CTSEn bits according to UART_HardwareFlowControl value */
|
||||
UARTx->CR |= UART_InitStruct->UART_HardwareFlowControl;
|
||||
|
||||
/* Configure the UART mode */
|
||||
/* Clear TXE and RXE bits */
|
||||
UARTx->CR &= UART_Mode_Mask;
|
||||
/* Set TXE and RXE bits according to UART_Mode value */
|
||||
UARTx->CR |= UART_InitStruct->UART_Mode;
|
||||
|
||||
/* Enable or disable the FIFOs */
|
||||
/* Set the FIFOs Levels */
|
||||
if(UART_InitStruct->UART_FIFO == UART_FIFO_Enable)
|
||||
{
|
||||
/* Enable the FIFOs */
|
||||
UARTx->LCR |= UART_FIFO_Enable;
|
||||
|
||||
/* Clear TXIFLSEL and RXIFLSEL bits */
|
||||
UARTx->IFLS &= UART_TxRxFIFOLevel_Mask;
|
||||
|
||||
/* Set RXIFLSEL bits according to UART_RxFIFOLevel value */
|
||||
UARTx->IFLS |= (UART_InitStruct->UART_RxFIFOLevel << 3);
|
||||
|
||||
/* Set TXIFLSEL bits according to UART_TxFIFOLevel value */
|
||||
UARTx->IFLS |= UART_InitStruct->UART_TxFIFOLevel;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the FIFOs */
|
||||
UARTx->LCR &= UART_FIFO_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_StructInit
|
||||
* Description : Fills each UART_InitStruct member with its default value.
|
||||
* Input : UART_InitStruct: pointer to a UART_InitTypeDef structure which
|
||||
* will be initialized.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_StructInit(UART_InitTypeDef* UART_InitStruct)
|
||||
{
|
||||
/* UART_InitStruct members default value */
|
||||
UART_InitStruct->UART_WordLength = UART_WordLength_8D;
|
||||
UART_InitStruct->UART_StopBits = UART_StopBits_1;
|
||||
UART_InitStruct->UART_Parity = UART_Parity_Odd ;
|
||||
UART_InitStruct->UART_BaudRate = 9600;
|
||||
UART_InitStruct->UART_HardwareFlowControl = UART_HardwareFlowControl_None;
|
||||
UART_InitStruct->UART_Mode = UART_Mode_Tx_Rx;
|
||||
UART_InitStruct->UART_FIFO = UART_FIFO_Enable;
|
||||
UART_InitStruct->UART_TxFIFOLevel = UART_FIFOLevel_1_2;
|
||||
UART_InitStruct->UART_RxFIFOLevel = UART_FIFOLevel_1_2;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_Cmd
|
||||
* Description : Enables or disables the specified UART peripheral.
|
||||
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
|
||||
* - NewState: new state of the UARTx peripheral.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_Cmd(UART_TypeDef* UARTx, FunctionalState NewState)
|
||||
{
|
||||
if (NewState == ENABLE)
|
||||
{
|
||||
/* Enable the selected UART by setting the UARTEN bit in the CR register */
|
||||
UARTx->CR |= UART_Enable_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected UART by clearing the UARTEN bit in the CR register */
|
||||
UARTx->CR &= UART_Disable_Mask;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_ITConfig
|
||||
* Description : Enables or disables the specified UART interrupts.
|
||||
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
|
||||
* - UART_IT: specifies the UART interrupts sources to be
|
||||
* enabled or disabled. This parameter can be any combination
|
||||
* of the following values:
|
||||
* - UART_IT_OverrunError: Overrun Error interrupt
|
||||
* - UART_IT_BreakError: Break Error interrupt
|
||||
* - UART_IT_ParityError: Parity Error interrupt
|
||||
* - UART_IT_FrameError: Frame Error interrupt
|
||||
* - UART_IT_ReceiveTimeOut: Receive Time Out interrupt
|
||||
* - UART_IT_Transmit: Transmit interrupt
|
||||
* - UART_IT_Receive: Receive interrupt
|
||||
* - UART_IT_CTS: CTS interrupt
|
||||
* - NewState: new state of the UARTx peripheral.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_ITConfig(UART_TypeDef* UARTx, u16 UART_IT, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Enables the selected interrupts */
|
||||
UARTx->IMSC |= UART_IT;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disables the selected interrupts */
|
||||
UARTx->IMSC &= ~UART_IT;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_DMAConfig
|
||||
* Description : Configures the UART0 DMA interface.
|
||||
* Input : - UART0_DMAtransfer : specifies the configuration of DMA request.
|
||||
* This parameter can be:
|
||||
* - UART0_DMATransfer_Single: Single DMA transfer
|
||||
* - UART0_DMATransfer_Burst: Burst DMA transfer
|
||||
* - UART0_DMAOnError: specifies the DMA on error request.
|
||||
* This parameter can be:
|
||||
* - UART0_DMAOnError_Enable: DMA receive request enabled
|
||||
* when the UART error interrupt is asserted.
|
||||
* - UART0_DMAOnError_Disable: DMA receive request disabled
|
||||
* when the UART error interrupt is asserted.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_DMAConfig(u16 UART0_DMATransfer, u16 UART0_DMAOnError)
|
||||
{
|
||||
if(UART0_DMATransfer == UART0_DMATransfer_Single)
|
||||
{
|
||||
/* Configure the DMA request from the UART0 as single transfer */
|
||||
UART0->DMACR &= UART0_DMATransfer_Single;
|
||||
}
|
||||
else
|
||||
{
|
||||
UART0->DMACR |= UART0_DMATransfer_Burst;
|
||||
}
|
||||
|
||||
if(UART0_DMAOnError == UART0_DMAOnError_Enable)
|
||||
{
|
||||
UART0->DMACR &= UART0_DMAOnError_Enable;
|
||||
}
|
||||
else
|
||||
{
|
||||
UART0->DMACR |= UART0_DMAOnError_Disable;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_DMACmd
|
||||
* Description : Enables or disables the UART0’s DMA interface.
|
||||
* Input : - UART0_DMAReq: specifies the DMA request.
|
||||
* This parameter can be:
|
||||
* - UART0_DMAReq_Tx: Transmit DMA request
|
||||
* - UART0_DMAReq_Rx: Receive DMA request
|
||||
* - NewState: new state of the UART0’s DMA request.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_DMACmd(u16 UART0_DMAReq, FunctionalState NewState)
|
||||
{
|
||||
if(UART0_DMAReq == UART0_DMAReq_Tx)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
UART0->DMACR |= UART0_DMAReq_Tx;
|
||||
}
|
||||
else
|
||||
{
|
||||
UART0->DMACR &= ~UART0_DMAReq_Tx;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
UART0->DMACR |= UART0_DMAReq_Rx;
|
||||
}
|
||||
else
|
||||
{
|
||||
UART0->DMACR &= ~UART0_DMAReq_Rx;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_LoopBackConfig
|
||||
* Description : Enables or disables LoopBack mode in UARTx.
|
||||
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
|
||||
* - NewState: new state of the UARTx’s LoopBack mode.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_LoopBackConfig(UART_TypeDef* UARTx, FunctionalState NewState)
|
||||
{
|
||||
if (NewState == ENABLE)
|
||||
{
|
||||
/* Enable the LoopBack mode of the specified UART */
|
||||
UARTx->CR |= UART_LoopBack_Enable_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the LoopBack mode of the specified UART */
|
||||
UARTx->CR &= UART_LoopBack_Disable_Mask;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_LINConfig
|
||||
* Description : Sets the LIN break length.
|
||||
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral.
|
||||
* - UART_LINBreakLength: Break length value.
|
||||
* This parameter can be:
|
||||
* - UART_LINBreakLength_10: 10 low bits
|
||||
* - UART_LINBreakLength_11: 11 low bits
|
||||
* - UART_LINBreakLength_12: 12 low bits
|
||||
* - UART_LINBreakLength_13: 13 low bits
|
||||
* - UART_LINBreakLength_14: 14 low bits
|
||||
* - UART_LINBreakLength_15: 15 low bits
|
||||
* - UART_LINBreakLength_16: 16 low bits
|
||||
* - UART_LINBreakLength_17: 17 low bits
|
||||
* - UART_LINBreakLength_18: 18 low bits
|
||||
* - UART_LINBreakLength_19: 19 low bits
|
||||
* - UART_LINBreakLength_20: 20 low bits
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_LINConfig(UART_TypeDef* UARTx, u16 UART_LINBreakLength)
|
||||
{
|
||||
/* Clear LBKLEN bits */
|
||||
UARTx->LCR &= UART_LINBreakLength_Mask;
|
||||
|
||||
/* Set LBKLEN bits according to UART_LINBreakLength value */
|
||||
UARTx->LCR |= UART_LINBreakLength;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_LINCmd
|
||||
* Description : Enables or disables LIN master mode in UARTx.
|
||||
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
|
||||
* - NewState: new state of the UARTx’s LIN interface.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_LINCmd(UART_TypeDef* UARTx, FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Enable the LIN mode of the specified UART */
|
||||
UARTx->LCR |= UART_LIN_Enable_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the LIN mode of the specified UART */
|
||||
UARTx->LCR &= UART_LIN_Disable_Mask;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_SendData
|
||||
* Description : Transmits a signle Byte of data through the UARTx peripheral.
|
||||
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral.
|
||||
* - Data: the byte to transmit
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_SendData(UART_TypeDef* UARTx, u8 Data)
|
||||
{
|
||||
/* Transmit one byte */
|
||||
UARTx->DR = Data;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_ReceiveData
|
||||
* Description : Returns the most recent received Byte by the UARTx peripheral.
|
||||
* Input : UARTx: where x can be 0,1 or 2 to select the UART peripheral.
|
||||
* Output : None
|
||||
* Return : The received data
|
||||
*******************************************************************************/
|
||||
u8 UART_ReceiveData(UART_TypeDef* UARTx)
|
||||
{
|
||||
/* Receive one byte */
|
||||
return ((u8)UARTx->DR);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_SendBreak
|
||||
* Description : Transmits break characters.
|
||||
* Input : UARTx: where x can be 0,1 or 2 to select the UART peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_SendBreak(UART_TypeDef* UARTx)
|
||||
{
|
||||
/* Send break characters */
|
||||
UARTx->BKR |= UART_BreakChar_Mask;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_RTSConfig
|
||||
* Description : Sets or Resets the RTS signal
|
||||
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral.
|
||||
* - RTSState: new state of the RTS signal.
|
||||
* This parameter can be: RTSSET or RTSRESET
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_RTSConfig(UART_TypeDef* UARTx, UART_RTSTypeDef RTSState)
|
||||
{
|
||||
if(RTSState == RTSRESET)
|
||||
{
|
||||
UARTx->CR |= UART_RTSRESET_Mask;
|
||||
}
|
||||
else if(RTSState == RTSSET)
|
||||
{
|
||||
UARTx->CR &= UART_RTSSET_Mask;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_GetFlagStatus
|
||||
* Description : Checks whether the specified UART flag is set or not.
|
||||
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
|
||||
* - UART_FLAG: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* - UART_FLAG_OverrunError: Overrun error flag
|
||||
* - UART_FLAG_Break: break error flag
|
||||
* - UART_FLAG_ParityError: parity error flag
|
||||
* - UART_FLAG_FrameError: frame error flag
|
||||
* - UART_FLAG_TxFIFOEmpty: Transmit FIFO Empty flag
|
||||
* - UART_FLAG_RxFIFOFull: Receive FIFO Full flag
|
||||
* - UART_FLAG_TxFIFOFull: Transmit FIFO Full flag
|
||||
* - UART_FLAG_RxFIFOEmpty: Receive FIFO Empty flag
|
||||
* - UART_FLAG_Busy: Busy flag
|
||||
* - UART_FLAG_CTS: CTS flag
|
||||
* - UART_RawIT_OverrunError: Overrun Error interrupt flag
|
||||
* - UART_RawIT_BreakError: Break Error interrupt flag
|
||||
* - UART_RawIT_ParityError: Parity Error interrupt flag
|
||||
* - UART_RawIT_FrameError: Frame Error interrupt flag
|
||||
* - UART_RawIT_ReceiveTimeOut: ReceiveTimeOut interrupt flag
|
||||
* - UART_RawIT_Transmit: Transmit interrupt flag
|
||||
* - UART_RawIT_Receive: Receive interrupt flag
|
||||
* - UART_RawIT_CTS: CTS interrupt flag
|
||||
* Output : None
|
||||
* Return : The new state of UART_FLAG (SET or RESET).
|
||||
*******************************************************************************/
|
||||
FlagStatus UART_GetFlagStatus(UART_TypeDef* UARTx, u16 UART_FLAG)
|
||||
{
|
||||
u32 UARTReg = 0, FlagPos = 0;
|
||||
u32 StatusReg = 0;
|
||||
|
||||
/* Get the UART register index */
|
||||
UARTReg = UART_FLAG >> 5;
|
||||
|
||||
/* Get the flag position */
|
||||
FlagPos = UART_FLAG & UART_FLAG_Mask;
|
||||
|
||||
if(UARTReg == 1) /* The flag to check is in RSR register */
|
||||
{
|
||||
StatusReg = UARTx->RSR;
|
||||
}
|
||||
else if (UARTReg == 2) /* The flag to check is in FR register */
|
||||
{
|
||||
StatusReg = UARTx->FR;
|
||||
}
|
||||
else if(UARTReg == 3) /* The flag to check is in RIS register */
|
||||
{
|
||||
StatusReg = UARTx->RIS;
|
||||
}
|
||||
|
||||
if((StatusReg & (1 << FlagPos))!= RESET)
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_ClearFlag
|
||||
* Description : Clears the UARTx’s pending flags.
|
||||
* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
|
||||
* - UART_FLAG: specifies the flag to clear.
|
||||
* This parameter can be one of the following values:
|
||||
* - UART_FLAG_OverrunError: Overrun error flag
|
||||
* - UART_FLAG_Break: break error flag
|
||||
* - UART_FLAG_ParityError: parity error flag
|
||||
* - UART_FLAG_FrameError: frame error flag
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_ClearFlag(UART_TypeDef* UARTx, u16 UART_FLAG)
|
||||
{
|
||||
u8 FlagPos = 0;
|
||||
|
||||
/* Get the flag position */
|
||||
FlagPos = UART_FLAG & UART_FLAG_Mask;
|
||||
|
||||
/* Clear the sepecified flag */
|
||||
UARTx->RSR &= ~(1 << FlagPos);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_GetITStatus
|
||||
* Description : Checks whether the specified UART interrupt has occurred or not.
|
||||
* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
|
||||
* - UART_IT: specifies the interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* - UART_IT_OverrunError: Overrun Error interrupt
|
||||
* - UART_IT_BreakError: Break Error interrupt
|
||||
* - UART_IT_ParityError: Parity Error interrupt
|
||||
* - UART_IT_FrameError: Frame Error interrupt
|
||||
* - UART_IT_ReceiveTimeOut: Receive Time Out interrupt
|
||||
* - UART_IT_Transmit: Transmit interrupt
|
||||
* - UART_IT_Receive: Receive interrupt
|
||||
* - UART_IT_CTS: CTS interrupt
|
||||
* Output : None
|
||||
* Return : The new state of UART_IT (SET or RESET).
|
||||
*******************************************************************************/
|
||||
ITStatus UART_GetITStatus(UART_TypeDef* UARTx, u16 UART_IT)
|
||||
{
|
||||
if((UARTx->MIS & UART_IT) != RESET)
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UART_ClearITPendingBit
|
||||
* Description : Clears the UARTx’s interrupt pending bits.
|
||||
* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
|
||||
* - UART_IT: specifies the interrupt pending bit to clear.
|
||||
* More than one interrupt can be cleared using the “|” operator.
|
||||
* This parameter can be:
|
||||
* - UART_IT_OverrunError: Overrun Error interrupt
|
||||
* - UART_IT_BreakError: Break Error interrupt
|
||||
* - UART_IT_ParityError: Parity Error interrupt
|
||||
* - UART_IT_FrameError: Frame Error interrupt
|
||||
* - UART_IT_ReceiveTimeOut: Receive Time Out interrupt
|
||||
* - UART_IT_Transmit: Transmit interrupt
|
||||
* - UART_IT_Receive: Receive interrupt
|
||||
* - UART_IT_CTS: CTS interrupt
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void UART_ClearITPendingBit(UART_TypeDef* UARTx, u16 UART_IT)
|
||||
{
|
||||
/* Clear the specified interrupt */
|
||||
UARTx->ICR = UART_IT;
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
244
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_wdg.c
Normal file
244
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/75x_wdg.c
Normal file
|
@ -0,0 +1,244 @@
|
|||
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
||||
* File Name : 75x_wdg.c
|
||||
* Author : MCD Application Team
|
||||
* Date First Issued : 03/10/2006
|
||||
* Description : This file provides all the WDG software functions.
|
||||
********************************************************************************
|
||||
* History:
|
||||
* 07/17/2006 : V1.0
|
||||
* 03/10/2006 : V0.1
|
||||
********************************************************************************
|
||||
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*******************************************************************************/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "75x_wdg.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Registers reset value */
|
||||
#define WDG_Preload_Mask 0xFFFF
|
||||
#define WDG_Prescaler_Mask 0xFF
|
||||
|
||||
/* WDG Start/Stop counter */
|
||||
#define WDG_Counter_Start_Mask 0x0002
|
||||
#define WDG_Counter_Stop_Mask 0xFFFD
|
||||
|
||||
/* WDG Sequence */
|
||||
#define WDG_KeyValue1_Mask 0xA55A
|
||||
#define WDG_KeyValue2_Mask 0x5AA5
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/******************************************************************************
|
||||
* Function Name : WDG_DeInit
|
||||
* Description : Deinitializes the WDG peripheral registers to their default
|
||||
* reset values.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void WDG_DeInit(void)
|
||||
{
|
||||
/* Reset all the WDG registers */
|
||||
WDG->CR = 0x0000;
|
||||
WDG->PR = 0x00FF;
|
||||
WDG->VR = 0xFFFF;
|
||||
WDG->CNT = 0xFFFF;
|
||||
WDG->SR = 0x0000;
|
||||
WDG->MR = 0x0000;
|
||||
WDG->KR = 0x0000;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDG_Init
|
||||
* Description : Initializes WDG peripheral according to the specified
|
||||
* parameters in the WDG_InitStruct.
|
||||
* Input : WDG_InitStruct: pointer to a WDG_InitTypeDef structure that
|
||||
* contains the configuration information for the WDG peripheral.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void WDG_Init(WDG_InitTypeDef* WDG_InitStruct)
|
||||
{
|
||||
/* Configure WDG Prescaler register value */
|
||||
WDG->PR = WDG_InitStruct->WDG_Prescaler;
|
||||
|
||||
/* Configure WDG Pre-load register value */
|
||||
WDG->VR = WDG_InitStruct->WDG_Preload ;
|
||||
|
||||
if(WDG_InitStruct->WDG_Mode == WDG_Mode_WDG)
|
||||
{
|
||||
/* Select WDG mode */
|
||||
WDG->CR |= WDG_Mode_WDG ;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Select Timer mode */
|
||||
WDG->CR &= WDG_Mode_Timer;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDG_StructInit
|
||||
* Description : Fills each WDG_InitStruct member with its default value.
|
||||
* Input : WDG_InitStruct : pointer to a WDG_InitTypeDef structure
|
||||
* which will be initialized.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void WDG_StructInit(WDG_InitTypeDef *WDG_InitStruct)
|
||||
{
|
||||
/* Initialize mode */
|
||||
WDG_InitStruct->WDG_Mode = WDG_Mode_Timer;
|
||||
|
||||
/* Initialize Preload */
|
||||
WDG_InitStruct->WDG_Preload = WDG_Preload_Mask ;
|
||||
|
||||
/* Initialize Prescaler */
|
||||
WDG_InitStruct->WDG_Prescaler = WDG_Prescaler_Mask;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDG_Cmd
|
||||
* Description : Enables or disables the WDG peripheral.
|
||||
* Input : NewState: new state of the WDG peripheral.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void WDG_Cmd(FunctionalState NewState)
|
||||
{
|
||||
if((WDG->CR & WDG_Mode_WDG) == 0)
|
||||
{
|
||||
/* Timer mode */
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Start timer by setting SC bit in Control register */
|
||||
WDG->CR |= WDG_Counter_Start_Mask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop timer by clearing SC bit in Control register */
|
||||
WDG->CR &= WDG_Counter_Stop_Mask;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Watchdog mode */
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
WDG->KR = WDG_KeyValue1_Mask;
|
||||
WDG->KR = WDG_KeyValue2_Mask;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDG_ITConfig
|
||||
* Description : Enables or disables the WDG End of Count(EC) interrupt.
|
||||
* Input : Newstate: new state of the WDG End of Count(EC) interrupt.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void WDG_ITConfig(FunctionalState NewState)
|
||||
{
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
/* Enable the End of Count interrupt */
|
||||
WDG->MR |= WDG_IT_EC;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the End of Count interrupt */
|
||||
WDG->MR &= ~WDG_IT_EC;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDG_GetCounter
|
||||
* Description : Gets the WDG’s current counter value.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The WDG current counter value
|
||||
*******************************************************************************/
|
||||
u16 WDG_GetCounter(void)
|
||||
{
|
||||
return WDG->CNT;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDG_GetFlagStatus
|
||||
* Description : Checks whether the WDG End of Count(EC) flag is set or not.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The new state of WDG End of Count(EC) flag (SET or RESET).
|
||||
*******************************************************************************/
|
||||
FlagStatus WDG_GetFlagStatus(void)
|
||||
{
|
||||
if((WDG->SR & WDG_FLAG_EC) != RESET )
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDG_ClearFlag
|
||||
* Description : Clears the WDG’s End of Count(EC) pending flag.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void WDG_ClearFlag(void)
|
||||
{
|
||||
/* Clear the EC pending bit */
|
||||
WDG->SR &= ~WDG_FLAG_EC;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDG_GetITStatus
|
||||
* Description : Checks whether the WDG End of Count(EC) interrupt has
|
||||
* occurred or not.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : The new state of WDG End of Count(EC) interrupt (SET or RESET).
|
||||
*******************************************************************************/
|
||||
ITStatus WDG_GetITStatus(void)
|
||||
{
|
||||
if(((WDG->SR & WDG_IT_EC) != RESET )&&((WDG->MR & WDG_IT_EC) != RESET ))
|
||||
{
|
||||
return SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDG_ClearITPendingBit
|
||||
* Description : Clears the WDG's End of Count(EC) interrupt pending bit.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void WDG_ClearITPendingBit(void)
|
||||
{
|
||||
/* Clear the EC pending bit */
|
||||
WDG->SR &= ~WDG_IT_EC;
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
1403
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/lcd.c
Normal file
1403
FreeRTOS/Demo/ARM7_STR75x_GCC/STLibrary/src/lcd.c
Normal file
File diff suppressed because it is too large
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